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CommitLineData
f8a95309
ACM
1/*
2 * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
3 *
4 * Parts came from builtin-{top,stat,record}.c, see those files for further
5 * copyright notes.
6 *
7 * Released under the GPL v2. (and only v2, not any later version)
8 */
9
936be503 10#include <byteswap.h>
0f6a3015 11#include <linux/bitops.h>
553873e1 12#include <api/fs/debugfs.h>
4e319027
RR
13#include <traceevent/event-parse.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/perf_event.h>
bec19672 16#include <sys/resource.h>
4e319027 17#include "asm/bug.h"
69aad6f1 18#include "evsel.h"
70082dd9 19#include "evlist.h"
69aad6f1 20#include "util.h"
86bd5e86 21#include "cpumap.h"
fd78260b 22#include "thread_map.h"
12864b31 23#include "target.h"
26d33022 24#include "perf_regs.h"
e3e1a54f 25#include "debug.h"
97978b3e 26#include "trace-event.h"
69aad6f1 27
594ac61a
ACM
28static struct {
29 bool sample_id_all;
30 bool exclude_guest;
5c5e854b 31 bool mmap2;
594ac61a
ACM
32} perf_missing_features;
33
c52b12ed
ACM
34#define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y))
35
75562573 36int __perf_evsel__sample_size(u64 sample_type)
c2a70653
ACM
37{
38 u64 mask = sample_type & PERF_SAMPLE_MASK;
39 int size = 0;
40 int i;
41
42 for (i = 0; i < 64; i++) {
43 if (mask & (1ULL << i))
44 size++;
45 }
46
47 size *= sizeof(u64);
48
49 return size;
50}
51
75562573
AH
52/**
53 * __perf_evsel__calc_id_pos - calculate id_pos.
54 * @sample_type: sample type
55 *
56 * This function returns the position of the event id (PERF_SAMPLE_ID or
57 * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct
58 * sample_event.
59 */
60static int __perf_evsel__calc_id_pos(u64 sample_type)
61{
62 int idx = 0;
63
64 if (sample_type & PERF_SAMPLE_IDENTIFIER)
65 return 0;
66
67 if (!(sample_type & PERF_SAMPLE_ID))
68 return -1;
69
70 if (sample_type & PERF_SAMPLE_IP)
71 idx += 1;
72
73 if (sample_type & PERF_SAMPLE_TID)
74 idx += 1;
75
76 if (sample_type & PERF_SAMPLE_TIME)
77 idx += 1;
78
79 if (sample_type & PERF_SAMPLE_ADDR)
80 idx += 1;
81
82 return idx;
83}
84
85/**
86 * __perf_evsel__calc_is_pos - calculate is_pos.
87 * @sample_type: sample type
88 *
89 * This function returns the position (counting backwards) of the event id
90 * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if
91 * sample_id_all is used there is an id sample appended to non-sample events.
92 */
93static int __perf_evsel__calc_is_pos(u64 sample_type)
94{
95 int idx = 1;
96
97 if (sample_type & PERF_SAMPLE_IDENTIFIER)
98 return 1;
99
100 if (!(sample_type & PERF_SAMPLE_ID))
101 return -1;
102
103 if (sample_type & PERF_SAMPLE_CPU)
104 idx += 1;
105
106 if (sample_type & PERF_SAMPLE_STREAM_ID)
107 idx += 1;
108
109 return idx;
110}
111
112void perf_evsel__calc_id_pos(struct perf_evsel *evsel)
113{
114 evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type);
115 evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type);
116}
117
4bf9ce1b 118void hists__init(struct hists *hists)
0e2a5f10
ACM
119{
120 memset(hists, 0, sizeof(*hists));
121 hists->entries_in_array[0] = hists->entries_in_array[1] = RB_ROOT;
122 hists->entries_in = &hists->entries_in_array[0];
123 hists->entries_collapsed = RB_ROOT;
124 hists->entries = RB_ROOT;
125 pthread_mutex_init(&hists->lock, NULL);
126}
127
7be5ebe8
ACM
128void __perf_evsel__set_sample_bit(struct perf_evsel *evsel,
129 enum perf_event_sample_format bit)
130{
131 if (!(evsel->attr.sample_type & bit)) {
132 evsel->attr.sample_type |= bit;
133 evsel->sample_size += sizeof(u64);
75562573 134 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
135 }
136}
137
138void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel,
139 enum perf_event_sample_format bit)
140{
141 if (evsel->attr.sample_type & bit) {
142 evsel->attr.sample_type &= ~bit;
143 evsel->sample_size -= sizeof(u64);
75562573 144 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
145 }
146}
147
75562573
AH
148void perf_evsel__set_sample_id(struct perf_evsel *evsel,
149 bool can_sample_identifier)
7a5a5ca5 150{
75562573
AH
151 if (can_sample_identifier) {
152 perf_evsel__reset_sample_bit(evsel, ID);
153 perf_evsel__set_sample_bit(evsel, IDENTIFIER);
154 } else {
155 perf_evsel__set_sample_bit(evsel, ID);
156 }
7a5a5ca5
ACM
157 evsel->attr.read_format |= PERF_FORMAT_ID;
158}
159
ef1d1af2
ACM
160void perf_evsel__init(struct perf_evsel *evsel,
161 struct perf_event_attr *attr, int idx)
162{
163 evsel->idx = idx;
164 evsel->attr = *attr;
2cfda562 165 evsel->leader = evsel;
410136f5
SE
166 evsel->unit = "";
167 evsel->scale = 1.0;
ef1d1af2 168 INIT_LIST_HEAD(&evsel->node);
1980c2eb 169 hists__init(&evsel->hists);
bde09467 170 evsel->sample_size = __perf_evsel__sample_size(attr->sample_type);
75562573 171 perf_evsel__calc_id_pos(evsel);
ef1d1af2
ACM
172}
173
ef503831 174struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
69aad6f1
ACM
175{
176 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
177
ef1d1af2
ACM
178 if (evsel != NULL)
179 perf_evsel__init(evsel, attr, idx);
69aad6f1
ACM
180
181 return evsel;
182}
183
ef503831 184struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx)
efd2b924
ACM
185{
186 struct perf_evsel *evsel = zalloc(sizeof(*evsel));
187
188 if (evsel != NULL) {
189 struct perf_event_attr attr = {
0b80f8b3
ACM
190 .type = PERF_TYPE_TRACEPOINT,
191 .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME |
192 PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD),
efd2b924
ACM
193 };
194
e48ffe2b
ACM
195 if (asprintf(&evsel->name, "%s:%s", sys, name) < 0)
196 goto out_free;
197
97978b3e 198 evsel->tp_format = trace_event__tp_format(sys, name);
efd2b924
ACM
199 if (evsel->tp_format == NULL)
200 goto out_free;
201
0b80f8b3 202 event_attr_init(&attr);
efd2b924 203 attr.config = evsel->tp_format->id;
0b80f8b3 204 attr.sample_period = 1;
efd2b924 205 perf_evsel__init(evsel, &attr, idx);
efd2b924
ACM
206 }
207
208 return evsel;
209
210out_free:
e48ffe2b 211 free(evsel->name);
efd2b924
ACM
212 free(evsel);
213 return NULL;
214}
215
8ad7013b 216const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = {
c410431c
ACM
217 "cycles",
218 "instructions",
219 "cache-references",
220 "cache-misses",
221 "branches",
222 "branch-misses",
223 "bus-cycles",
224 "stalled-cycles-frontend",
225 "stalled-cycles-backend",
226 "ref-cycles",
227};
228
dd4f5223 229static const char *__perf_evsel__hw_name(u64 config)
c410431c
ACM
230{
231 if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config])
232 return perf_evsel__hw_names[config];
233
234 return "unknown-hardware";
235}
236
27f18617 237static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size)
c410431c 238{
27f18617 239 int colon = 0, r = 0;
c410431c 240 struct perf_event_attr *attr = &evsel->attr;
c410431c
ACM
241 bool exclude_guest_default = false;
242
243#define MOD_PRINT(context, mod) do { \
244 if (!attr->exclude_##context) { \
27f18617 245 if (!colon) colon = ++r; \
c410431c
ACM
246 r += scnprintf(bf + r, size - r, "%c", mod); \
247 } } while(0)
248
249 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) {
250 MOD_PRINT(kernel, 'k');
251 MOD_PRINT(user, 'u');
252 MOD_PRINT(hv, 'h');
253 exclude_guest_default = true;
254 }
255
256 if (attr->precise_ip) {
257 if (!colon)
27f18617 258 colon = ++r;
c410431c
ACM
259 r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp");
260 exclude_guest_default = true;
261 }
262
263 if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) {
264 MOD_PRINT(host, 'H');
265 MOD_PRINT(guest, 'G');
266 }
267#undef MOD_PRINT
268 if (colon)
27f18617 269 bf[colon - 1] = ':';
c410431c
ACM
270 return r;
271}
272
27f18617
ACM
273static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size)
274{
275 int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config));
276 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
277}
278
8ad7013b 279const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = {
335c2f5d
ACM
280 "cpu-clock",
281 "task-clock",
282 "page-faults",
283 "context-switches",
8ad7013b 284 "cpu-migrations",
335c2f5d
ACM
285 "minor-faults",
286 "major-faults",
287 "alignment-faults",
288 "emulation-faults",
d22d1a2a 289 "dummy",
335c2f5d
ACM
290};
291
dd4f5223 292static const char *__perf_evsel__sw_name(u64 config)
335c2f5d
ACM
293{
294 if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config])
295 return perf_evsel__sw_names[config];
296 return "unknown-software";
297}
298
299static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size)
300{
301 int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config));
302 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
303}
304
287e74aa
JO
305static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type)
306{
307 int r;
308
309 r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr);
310
311 if (type & HW_BREAKPOINT_R)
312 r += scnprintf(bf + r, size - r, "r");
313
314 if (type & HW_BREAKPOINT_W)
315 r += scnprintf(bf + r, size - r, "w");
316
317 if (type & HW_BREAKPOINT_X)
318 r += scnprintf(bf + r, size - r, "x");
319
320 return r;
321}
322
323static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size)
324{
325 struct perf_event_attr *attr = &evsel->attr;
326 int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type);
327 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
328}
329
0b668bc9
ACM
330const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX]
331 [PERF_EVSEL__MAX_ALIASES] = {
332 { "L1-dcache", "l1-d", "l1d", "L1-data", },
333 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
334 { "LLC", "L2", },
335 { "dTLB", "d-tlb", "Data-TLB", },
336 { "iTLB", "i-tlb", "Instruction-TLB", },
337 { "branch", "branches", "bpu", "btb", "bpc", },
338 { "node", },
339};
340
341const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX]
342 [PERF_EVSEL__MAX_ALIASES] = {
343 { "load", "loads", "read", },
344 { "store", "stores", "write", },
345 { "prefetch", "prefetches", "speculative-read", "speculative-load", },
346};
347
348const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX]
349 [PERF_EVSEL__MAX_ALIASES] = {
350 { "refs", "Reference", "ops", "access", },
351 { "misses", "miss", },
352};
353
354#define C(x) PERF_COUNT_HW_CACHE_##x
355#define CACHE_READ (1 << C(OP_READ))
356#define CACHE_WRITE (1 << C(OP_WRITE))
357#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
358#define COP(x) (1 << x)
359
360/*
361 * cache operartion stat
362 * L1I : Read and prefetch only
363 * ITLB and BPU : Read-only
364 */
365static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = {
366 [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
367 [C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
368 [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
369 [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
370 [C(ITLB)] = (CACHE_READ),
371 [C(BPU)] = (CACHE_READ),
372 [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
373};
374
375bool perf_evsel__is_cache_op_valid(u8 type, u8 op)
376{
377 if (perf_evsel__hw_cache_stat[type] & COP(op))
378 return true; /* valid */
379 else
380 return false; /* invalid */
381}
382
383int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result,
384 char *bf, size_t size)
385{
386 if (result) {
387 return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0],
388 perf_evsel__hw_cache_op[op][0],
389 perf_evsel__hw_cache_result[result][0]);
390 }
391
392 return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0],
393 perf_evsel__hw_cache_op[op][1]);
394}
395
dd4f5223 396static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size)
0b668bc9
ACM
397{
398 u8 op, result, type = (config >> 0) & 0xff;
399 const char *err = "unknown-ext-hardware-cache-type";
400
401 if (type > PERF_COUNT_HW_CACHE_MAX)
402 goto out_err;
403
404 op = (config >> 8) & 0xff;
405 err = "unknown-ext-hardware-cache-op";
406 if (op > PERF_COUNT_HW_CACHE_OP_MAX)
407 goto out_err;
408
409 result = (config >> 16) & 0xff;
410 err = "unknown-ext-hardware-cache-result";
411 if (result > PERF_COUNT_HW_CACHE_RESULT_MAX)
412 goto out_err;
413
414 err = "invalid-cache";
415 if (!perf_evsel__is_cache_op_valid(type, op))
416 goto out_err;
417
418 return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size);
419out_err:
420 return scnprintf(bf, size, "%s", err);
421}
422
423static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size)
424{
425 int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size);
426 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
427}
428
6eef3d9c
ACM
429static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size)
430{
431 int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config);
432 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
433}
434
7289f83c 435const char *perf_evsel__name(struct perf_evsel *evsel)
a4460836 436{
7289f83c 437 char bf[128];
a4460836 438
7289f83c
ACM
439 if (evsel->name)
440 return evsel->name;
c410431c
ACM
441
442 switch (evsel->attr.type) {
443 case PERF_TYPE_RAW:
6eef3d9c 444 perf_evsel__raw_name(evsel, bf, sizeof(bf));
c410431c
ACM
445 break;
446
447 case PERF_TYPE_HARDWARE:
7289f83c 448 perf_evsel__hw_name(evsel, bf, sizeof(bf));
c410431c 449 break;
0b668bc9
ACM
450
451 case PERF_TYPE_HW_CACHE:
7289f83c 452 perf_evsel__hw_cache_name(evsel, bf, sizeof(bf));
0b668bc9
ACM
453 break;
454
335c2f5d 455 case PERF_TYPE_SOFTWARE:
7289f83c 456 perf_evsel__sw_name(evsel, bf, sizeof(bf));
335c2f5d
ACM
457 break;
458
a4460836 459 case PERF_TYPE_TRACEPOINT:
7289f83c 460 scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint");
a4460836
ACM
461 break;
462
287e74aa
JO
463 case PERF_TYPE_BREAKPOINT:
464 perf_evsel__bp_name(evsel, bf, sizeof(bf));
465 break;
466
c410431c 467 default:
ca1b1457
RR
468 scnprintf(bf, sizeof(bf), "unknown attr type: %d",
469 evsel->attr.type);
a4460836 470 break;
c410431c
ACM
471 }
472
7289f83c
ACM
473 evsel->name = strdup(bf);
474
475 return evsel->name ?: "unknown";
c410431c
ACM
476}
477
717e263f
NK
478const char *perf_evsel__group_name(struct perf_evsel *evsel)
479{
480 return evsel->group_name ?: "anon group";
481}
482
483int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size)
484{
485 int ret;
486 struct perf_evsel *pos;
487 const char *group_name = perf_evsel__group_name(evsel);
488
489 ret = scnprintf(buf, size, "%s", group_name);
490
491 ret += scnprintf(buf + ret, size - ret, " { %s",
492 perf_evsel__name(evsel));
493
494 for_each_group_member(pos, evsel)
495 ret += scnprintf(buf + ret, size - ret, ", %s",
496 perf_evsel__name(pos));
497
498 ret += scnprintf(buf + ret, size - ret, " }");
499
500 return ret;
501}
502
774cb499
JO
503/*
504 * The enable_on_exec/disabled value strategy:
505 *
506 * 1) For any type of traced program:
507 * - all independent events and group leaders are disabled
508 * - all group members are enabled
509 *
510 * Group members are ruled by group leaders. They need to
511 * be enabled, because the group scheduling relies on that.
512 *
513 * 2) For traced programs executed by perf:
514 * - all independent events and group leaders have
515 * enable_on_exec set
516 * - we don't specifically enable or disable any event during
517 * the record command
518 *
519 * Independent events and group leaders are initially disabled
520 * and get enabled by exec. Group members are ruled by group
521 * leaders as stated in 1).
522 *
523 * 3) For traced programs attached by perf (pid/tid):
524 * - we specifically enable or disable all events during
525 * the record command
526 *
527 * When attaching events to already running traced we
528 * enable/disable events specifically, as there's no
529 * initial traced exec call.
530 */
cac21425
JO
531void perf_evsel__config(struct perf_evsel *evsel,
532 struct perf_record_opts *opts)
0f82ebc4 533{
3c176311 534 struct perf_evsel *leader = evsel->leader;
0f82ebc4
ACM
535 struct perf_event_attr *attr = &evsel->attr;
536 int track = !evsel->idx; /* only the first counter needs these */
3aa5939d 537 bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread;
0f82ebc4 538
594ac61a 539 attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1;
0f82ebc4 540 attr->inherit = !opts->no_inherit;
0f82ebc4 541
7be5ebe8
ACM
542 perf_evsel__set_sample_bit(evsel, IP);
543 perf_evsel__set_sample_bit(evsel, TID);
0f82ebc4 544
3c176311
JO
545 if (evsel->sample_read) {
546 perf_evsel__set_sample_bit(evsel, READ);
547
548 /*
549 * We need ID even in case of single event, because
550 * PERF_SAMPLE_READ process ID specific data.
551 */
75562573 552 perf_evsel__set_sample_id(evsel, false);
3c176311
JO
553
554 /*
555 * Apply group format only if we belong to group
556 * with more than one members.
557 */
558 if (leader->nr_members > 1) {
559 attr->read_format |= PERF_FORMAT_GROUP;
560 attr->inherit = 0;
561 }
562 }
563
0f82ebc4
ACM
564 /*
565 * We default some events to a 1 default interval. But keep
566 * it a weak assumption overridable by the user.
567 */
568 if (!attr->sample_period || (opts->user_freq != UINT_MAX &&
569 opts->user_interval != ULLONG_MAX)) {
570 if (opts->freq) {
7be5ebe8 571 perf_evsel__set_sample_bit(evsel, PERIOD);
0f82ebc4
ACM
572 attr->freq = 1;
573 attr->sample_freq = opts->freq;
574 } else {
575 attr->sample_period = opts->default_interval;
576 }
577 }
578
3c176311
JO
579 /*
580 * Disable sampling for all group members other
581 * than leader in case leader 'leads' the sampling.
582 */
583 if ((leader != evsel) && leader->sample_read) {
584 attr->sample_freq = 0;
585 attr->sample_period = 0;
586 }
587
0f82ebc4
ACM
588 if (opts->no_samples)
589 attr->sample_freq = 0;
590
591 if (opts->inherit_stat)
592 attr->inherit_stat = 1;
593
594 if (opts->sample_address) {
7be5ebe8 595 perf_evsel__set_sample_bit(evsel, ADDR);
0f82ebc4
ACM
596 attr->mmap_data = track;
597 }
598
26d33022 599 if (opts->call_graph) {
7be5ebe8 600 perf_evsel__set_sample_bit(evsel, CALLCHAIN);
0f82ebc4 601
26d33022 602 if (opts->call_graph == CALLCHAIN_DWARF) {
7be5ebe8
ACM
603 perf_evsel__set_sample_bit(evsel, REGS_USER);
604 perf_evsel__set_sample_bit(evsel, STACK_USER);
26d33022
JO
605 attr->sample_regs_user = PERF_REGS_MASK;
606 attr->sample_stack_user = opts->stack_dump_size;
607 attr->exclude_callchain_user = 1;
608 }
609 }
610
3aa5939d 611 if (target__has_cpu(&opts->target))
7be5ebe8 612 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4 613
3e76ac78 614 if (opts->period)
7be5ebe8 615 perf_evsel__set_sample_bit(evsel, PERIOD);
3e76ac78 616
594ac61a 617 if (!perf_missing_features.sample_id_all &&
d67356e7 618 (opts->sample_time || !opts->no_inherit ||
3aa5939d 619 target__has_cpu(&opts->target) || per_cpu))
7be5ebe8 620 perf_evsel__set_sample_bit(evsel, TIME);
0f82ebc4
ACM
621
622 if (opts->raw_samples) {
7be5ebe8
ACM
623 perf_evsel__set_sample_bit(evsel, TIME);
624 perf_evsel__set_sample_bit(evsel, RAW);
625 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4
ACM
626 }
627
ccf49bfc 628 if (opts->sample_address)
1e7ed5ec 629 perf_evsel__set_sample_bit(evsel, DATA_SRC);
ccf49bfc 630
0f82ebc4
ACM
631 if (opts->no_delay) {
632 attr->watermark = 0;
633 attr->wakeup_events = 1;
634 }
bdfebd84 635 if (opts->branch_stack) {
7be5ebe8 636 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
bdfebd84
RAV
637 attr->branch_sample_type = opts->branch_stack;
638 }
0f82ebc4 639
05484298 640 if (opts->sample_weight)
1e7ed5ec 641 perf_evsel__set_sample_bit(evsel, WEIGHT);
05484298 642
5c5e854b 643 attr->mmap = track;
5c5e854b 644 attr->comm = track;
0f82ebc4 645
475eeab9 646 if (opts->sample_transaction)
1e7ed5ec 647 perf_evsel__set_sample_bit(evsel, TRANSACTION);
475eeab9 648
774cb499
JO
649 /*
650 * XXX see the function comment above
651 *
652 * Disabling only independent events or group leaders,
653 * keeping group members enabled.
654 */
823254ed 655 if (perf_evsel__is_group_leader(evsel))
774cb499
JO
656 attr->disabled = 1;
657
658 /*
659 * Setting enable_on_exec for independent events and
660 * group leaders for traced executed by perf.
661 */
602ad878 662 if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel))
0f82ebc4 663 attr->enable_on_exec = 1;
0f82ebc4
ACM
664}
665
69aad6f1
ACM
666int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
667{
4af4c955 668 int cpu, thread;
69aad6f1 669 evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int));
4af4c955
DA
670
671 if (evsel->fd) {
672 for (cpu = 0; cpu < ncpus; cpu++) {
673 for (thread = 0; thread < nthreads; thread++) {
674 FD(evsel, cpu, thread) = -1;
675 }
676 }
677 }
678
69aad6f1
ACM
679 return evsel->fd != NULL ? 0 : -ENOMEM;
680}
681
e2407bef
AK
682static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads,
683 int ioc, void *arg)
745cefc5
ACM
684{
685 int cpu, thread;
686
687 for (cpu = 0; cpu < ncpus; cpu++) {
688 for (thread = 0; thread < nthreads; thread++) {
689 int fd = FD(evsel, cpu, thread),
e2407bef 690 err = ioctl(fd, ioc, arg);
745cefc5
ACM
691
692 if (err)
693 return err;
694 }
695 }
696
697 return 0;
698}
699
e2407bef
AK
700int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads,
701 const char *filter)
702{
703 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
704 PERF_EVENT_IOC_SET_FILTER,
705 (void *)filter);
706}
707
708int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads)
709{
710 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
711 PERF_EVENT_IOC_ENABLE,
712 0);
713}
714
70db7533
ACM
715int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads)
716{
a91e5431
ACM
717 evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id));
718 if (evsel->sample_id == NULL)
719 return -ENOMEM;
720
721 evsel->id = zalloc(ncpus * nthreads * sizeof(u64));
722 if (evsel->id == NULL) {
723 xyarray__delete(evsel->sample_id);
724 evsel->sample_id = NULL;
725 return -ENOMEM;
726 }
727
728 return 0;
70db7533
ACM
729}
730
a7e191c3
FD
731void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus)
732{
733 memset(evsel->counts, 0, (sizeof(*evsel->counts) +
734 (ncpus * sizeof(struct perf_counts_values))));
735}
736
c52b12ed
ACM
737int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus)
738{
739 evsel->counts = zalloc((sizeof(*evsel->counts) +
740 (ncpus * sizeof(struct perf_counts_values))));
741 return evsel->counts != NULL ? 0 : -ENOMEM;
742}
743
69aad6f1
ACM
744void perf_evsel__free_fd(struct perf_evsel *evsel)
745{
746 xyarray__delete(evsel->fd);
747 evsel->fd = NULL;
748}
749
70db7533
ACM
750void perf_evsel__free_id(struct perf_evsel *evsel)
751{
a91e5431
ACM
752 xyarray__delete(evsel->sample_id);
753 evsel->sample_id = NULL;
754 free(evsel->id);
70db7533
ACM
755 evsel->id = NULL;
756}
757
c52b12ed
ACM
758void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
759{
760 int cpu, thread;
761
762 for (cpu = 0; cpu < ncpus; cpu++)
763 for (thread = 0; thread < nthreads; ++thread) {
764 close(FD(evsel, cpu, thread));
765 FD(evsel, cpu, thread) = -1;
766 }
767}
768
43f8e76e
NK
769void perf_evsel__free_counts(struct perf_evsel *evsel)
770{
771 free(evsel->counts);
772}
773
ef1d1af2 774void perf_evsel__exit(struct perf_evsel *evsel)
69aad6f1
ACM
775{
776 assert(list_empty(&evsel->node));
736b05a0
NK
777 perf_evsel__free_fd(evsel);
778 perf_evsel__free_id(evsel);
ef1d1af2
ACM
779}
780
781void perf_evsel__delete(struct perf_evsel *evsel)
782{
783 perf_evsel__exit(evsel);
023695d9 784 close_cgroup(evsel->cgrp);
6a4bb04c 785 free(evsel->group_name);
e48ffe2b 786 if (evsel->tp_format)
efd2b924 787 pevent_free_format(evsel->tp_format);
f0c55bcf 788 free(evsel->name);
69aad6f1
ACM
789 free(evsel);
790}
c52b12ed 791
c7a79c47
SE
792static inline void compute_deltas(struct perf_evsel *evsel,
793 int cpu,
794 struct perf_counts_values *count)
795{
796 struct perf_counts_values tmp;
797
798 if (!evsel->prev_raw_counts)
799 return;
800
801 if (cpu == -1) {
802 tmp = evsel->prev_raw_counts->aggr;
803 evsel->prev_raw_counts->aggr = *count;
804 } else {
805 tmp = evsel->prev_raw_counts->cpu[cpu];
806 evsel->prev_raw_counts->cpu[cpu] = *count;
807 }
808
809 count->val = count->val - tmp.val;
810 count->ena = count->ena - tmp.ena;
811 count->run = count->run - tmp.run;
812}
813
c52b12ed
ACM
814int __perf_evsel__read_on_cpu(struct perf_evsel *evsel,
815 int cpu, int thread, bool scale)
816{
817 struct perf_counts_values count;
818 size_t nv = scale ? 3 : 1;
819
820 if (FD(evsel, cpu, thread) < 0)
821 return -EINVAL;
822
4eed11d5
ACM
823 if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0)
824 return -ENOMEM;
825
c52b12ed
ACM
826 if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0)
827 return -errno;
828
c7a79c47
SE
829 compute_deltas(evsel, cpu, &count);
830
c52b12ed
ACM
831 if (scale) {
832 if (count.run == 0)
833 count.val = 0;
834 else if (count.run < count.ena)
835 count.val = (u64)((double)count.val * count.ena / count.run + 0.5);
836 } else
837 count.ena = count.run = 0;
838
839 evsel->counts->cpu[cpu] = count;
840 return 0;
841}
842
843int __perf_evsel__read(struct perf_evsel *evsel,
844 int ncpus, int nthreads, bool scale)
845{
846 size_t nv = scale ? 3 : 1;
847 int cpu, thread;
848 struct perf_counts_values *aggr = &evsel->counts->aggr, count;
849
52bcd994 850 aggr->val = aggr->ena = aggr->run = 0;
c52b12ed
ACM
851
852 for (cpu = 0; cpu < ncpus; cpu++) {
853 for (thread = 0; thread < nthreads; thread++) {
854 if (FD(evsel, cpu, thread) < 0)
855 continue;
856
857 if (readn(FD(evsel, cpu, thread),
858 &count, nv * sizeof(u64)) < 0)
859 return -errno;
860
861 aggr->val += count.val;
862 if (scale) {
863 aggr->ena += count.ena;
864 aggr->run += count.run;
865 }
866 }
867 }
868
c7a79c47
SE
869 compute_deltas(evsel, -1, aggr);
870
c52b12ed
ACM
871 evsel->counts->scaled = 0;
872 if (scale) {
873 if (aggr->run == 0) {
874 evsel->counts->scaled = -1;
875 aggr->val = 0;
876 return 0;
877 }
878
879 if (aggr->run < aggr->ena) {
880 evsel->counts->scaled = 1;
881 aggr->val = (u64)((double)aggr->val * aggr->ena / aggr->run + 0.5);
882 }
883 } else
884 aggr->ena = aggr->run = 0;
885
886 return 0;
887}
48290609 888
6a4bb04c
JO
889static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread)
890{
891 struct perf_evsel *leader = evsel->leader;
892 int fd;
893
823254ed 894 if (perf_evsel__is_group_leader(evsel))
6a4bb04c
JO
895 return -1;
896
897 /*
898 * Leader must be already processed/open,
899 * if not it's a bug.
900 */
901 BUG_ON(!leader->fd);
902
903 fd = FD(leader, cpu, thread);
904 BUG_ON(fd == -1);
905
906 return fd;
907}
908
e3e1a54f
AH
909#define __PRINT_ATTR(fmt, cast, field) \
910 fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field)
911
912#define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field)
913#define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field)
914#define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field)
915#define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field)
916
917#define PRINT_ATTR2N(name1, field1, name2, field2) \
918 fprintf(fp, " %-19s %u %-19s %u\n", \
919 name1, attr->field1, name2, attr->field2)
920
921#define PRINT_ATTR2(field1, field2) \
922 PRINT_ATTR2N(#field1, field1, #field2, field2)
923
924static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp)
925{
926 size_t ret = 0;
927
928 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
929 ret += fprintf(fp, "perf_event_attr:\n");
930
931 ret += PRINT_ATTR_U32(type);
932 ret += PRINT_ATTR_U32(size);
933 ret += PRINT_ATTR_X64(config);
934 ret += PRINT_ATTR_U64(sample_period);
935 ret += PRINT_ATTR_U64(sample_freq);
936 ret += PRINT_ATTR_X64(sample_type);
937 ret += PRINT_ATTR_X64(read_format);
938
939 ret += PRINT_ATTR2(disabled, inherit);
940 ret += PRINT_ATTR2(pinned, exclusive);
941 ret += PRINT_ATTR2(exclude_user, exclude_kernel);
942 ret += PRINT_ATTR2(exclude_hv, exclude_idle);
943 ret += PRINT_ATTR2(mmap, comm);
944 ret += PRINT_ATTR2(freq, inherit_stat);
945 ret += PRINT_ATTR2(enable_on_exec, task);
946 ret += PRINT_ATTR2(watermark, precise_ip);
947 ret += PRINT_ATTR2(mmap_data, sample_id_all);
948 ret += PRINT_ATTR2(exclude_host, exclude_guest);
949 ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel,
950 "excl.callchain_user", exclude_callchain_user);
40d54ec2 951 ret += PRINT_ATTR_U32(mmap2);
e3e1a54f
AH
952
953 ret += PRINT_ATTR_U32(wakeup_events);
954 ret += PRINT_ATTR_U32(wakeup_watermark);
955 ret += PRINT_ATTR_X32(bp_type);
956 ret += PRINT_ATTR_X64(bp_addr);
957 ret += PRINT_ATTR_X64(config1);
958 ret += PRINT_ATTR_U64(bp_len);
959 ret += PRINT_ATTR_X64(config2);
960 ret += PRINT_ATTR_X64(branch_sample_type);
961 ret += PRINT_ATTR_X64(sample_regs_user);
962 ret += PRINT_ATTR_U32(sample_stack_user);
963
964 ret += fprintf(fp, "%.60s\n", graph_dotted_line);
965
966 return ret;
967}
968
0252208e 969static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 970 struct thread_map *threads)
48290609 971{
0252208e 972 int cpu, thread;
023695d9 973 unsigned long flags = 0;
727ab04e 974 int pid = -1, err;
bec19672 975 enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE;
48290609 976
0252208e
ACM
977 if (evsel->fd == NULL &&
978 perf_evsel__alloc_fd(evsel, cpus->nr, threads->nr) < 0)
727ab04e 979 return -ENOMEM;
4eed11d5 980
023695d9
SE
981 if (evsel->cgrp) {
982 flags = PERF_FLAG_PID_CGROUP;
983 pid = evsel->cgrp->fd;
984 }
985
594ac61a 986fallback_missing_features:
5c5e854b
SE
987 if (perf_missing_features.mmap2)
988 evsel->attr.mmap2 = 0;
594ac61a
ACM
989 if (perf_missing_features.exclude_guest)
990 evsel->attr.exclude_guest = evsel->attr.exclude_host = 0;
991retry_sample_id:
992 if (perf_missing_features.sample_id_all)
993 evsel->attr.sample_id_all = 0;
994
e3e1a54f
AH
995 if (verbose >= 2)
996 perf_event_attr__fprintf(&evsel->attr, stderr);
997
86bd5e86 998 for (cpu = 0; cpu < cpus->nr; cpu++) {
9d04f178 999
0252208e 1000 for (thread = 0; thread < threads->nr; thread++) {
6a4bb04c 1001 int group_fd;
023695d9
SE
1002
1003 if (!evsel->cgrp)
1004 pid = threads->map[thread];
1005
6a4bb04c 1006 group_fd = get_group_fd(evsel, cpu, thread);
bec19672 1007retry_open:
e3e1a54f
AH
1008 pr_debug2("perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n",
1009 pid, cpus->map[cpu], group_fd, flags);
1010
0252208e 1011 FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr,
023695d9 1012 pid,
f08199d3 1013 cpus->map[cpu],
023695d9 1014 group_fd, flags);
727ab04e
ACM
1015 if (FD(evsel, cpu, thread) < 0) {
1016 err = -errno;
f852fd62
AH
1017 pr_debug2("perf_event_open failed, error %d\n",
1018 err);
594ac61a 1019 goto try_fallback;
727ab04e 1020 }
bec19672 1021 set_rlimit = NO_CHANGE;
0252208e 1022 }
48290609
ACM
1023 }
1024
1025 return 0;
1026
594ac61a 1027try_fallback:
bec19672
AK
1028 /*
1029 * perf stat needs between 5 and 22 fds per CPU. When we run out
1030 * of them try to increase the limits.
1031 */
1032 if (err == -EMFILE && set_rlimit < INCREASED_MAX) {
1033 struct rlimit l;
1034 int old_errno = errno;
1035
1036 if (getrlimit(RLIMIT_NOFILE, &l) == 0) {
1037 if (set_rlimit == NO_CHANGE)
1038 l.rlim_cur = l.rlim_max;
1039 else {
1040 l.rlim_cur = l.rlim_max + 1000;
1041 l.rlim_max = l.rlim_cur;
1042 }
1043 if (setrlimit(RLIMIT_NOFILE, &l) == 0) {
1044 set_rlimit++;
1045 errno = old_errno;
1046 goto retry_open;
1047 }
1048 }
1049 errno = old_errno;
1050 }
1051
594ac61a
ACM
1052 if (err != -EINVAL || cpu > 0 || thread > 0)
1053 goto out_close;
1054
5c5e854b
SE
1055 if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
1056 perf_missing_features.mmap2 = true;
1057 goto fallback_missing_features;
1058 } else if (!perf_missing_features.exclude_guest &&
1059 (evsel->attr.exclude_guest || evsel->attr.exclude_host)) {
594ac61a
ACM
1060 perf_missing_features.exclude_guest = true;
1061 goto fallback_missing_features;
1062 } else if (!perf_missing_features.sample_id_all) {
1063 perf_missing_features.sample_id_all = true;
1064 goto retry_sample_id;
1065 }
1066
48290609 1067out_close:
0252208e
ACM
1068 do {
1069 while (--thread >= 0) {
1070 close(FD(evsel, cpu, thread));
1071 FD(evsel, cpu, thread) = -1;
1072 }
1073 thread = threads->nr;
1074 } while (--cpu >= 0);
727ab04e
ACM
1075 return err;
1076}
1077
1078void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads)
1079{
1080 if (evsel->fd == NULL)
1081 return;
1082
1083 perf_evsel__close_fd(evsel, ncpus, nthreads);
1084 perf_evsel__free_fd(evsel);
1085 evsel->fd = NULL;
48290609
ACM
1086}
1087
0252208e
ACM
1088static struct {
1089 struct cpu_map map;
1090 int cpus[1];
1091} empty_cpu_map = {
1092 .map.nr = 1,
1093 .cpus = { -1, },
1094};
1095
1096static struct {
1097 struct thread_map map;
1098 int threads[1];
1099} empty_thread_map = {
1100 .map.nr = 1,
1101 .threads = { -1, },
1102};
1103
f08199d3 1104int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1105 struct thread_map *threads)
48290609 1106{
0252208e
ACM
1107 if (cpus == NULL) {
1108 /* Work around old compiler warnings about strict aliasing */
1109 cpus = &empty_cpu_map.map;
48290609
ACM
1110 }
1111
0252208e
ACM
1112 if (threads == NULL)
1113 threads = &empty_thread_map.map;
48290609 1114
6a4bb04c 1115 return __perf_evsel__open(evsel, cpus, threads);
48290609
ACM
1116}
1117
f08199d3 1118int perf_evsel__open_per_cpu(struct perf_evsel *evsel,
6a4bb04c 1119 struct cpu_map *cpus)
48290609 1120{
6a4bb04c 1121 return __perf_evsel__open(evsel, cpus, &empty_thread_map.map);
0252208e 1122}
48290609 1123
f08199d3 1124int perf_evsel__open_per_thread(struct perf_evsel *evsel,
6a4bb04c 1125 struct thread_map *threads)
0252208e 1126{
6a4bb04c 1127 return __perf_evsel__open(evsel, &empty_cpu_map.map, threads);
48290609 1128}
70082dd9 1129
0807d2d8
ACM
1130static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel,
1131 const union perf_event *event,
1132 struct perf_sample *sample)
d0dd74e8 1133{
0807d2d8 1134 u64 type = evsel->attr.sample_type;
d0dd74e8 1135 const u64 *array = event->sample.array;
0807d2d8 1136 bool swapped = evsel->needs_swap;
37073f9e 1137 union u64_swap u;
d0dd74e8
ACM
1138
1139 array += ((event->header.size -
1140 sizeof(event->header)) / sizeof(u64)) - 1;
1141
75562573
AH
1142 if (type & PERF_SAMPLE_IDENTIFIER) {
1143 sample->id = *array;
1144 array--;
1145 }
1146
d0dd74e8 1147 if (type & PERF_SAMPLE_CPU) {
37073f9e
JO
1148 u.val64 = *array;
1149 if (swapped) {
1150 /* undo swap of u64, then swap on individual u32s */
1151 u.val64 = bswap_64(u.val64);
1152 u.val32[0] = bswap_32(u.val32[0]);
1153 }
1154
1155 sample->cpu = u.val32[0];
d0dd74e8
ACM
1156 array--;
1157 }
1158
1159 if (type & PERF_SAMPLE_STREAM_ID) {
1160 sample->stream_id = *array;
1161 array--;
1162 }
1163
1164 if (type & PERF_SAMPLE_ID) {
1165 sample->id = *array;
1166 array--;
1167 }
1168
1169 if (type & PERF_SAMPLE_TIME) {
1170 sample->time = *array;
1171 array--;
1172 }
1173
1174 if (type & PERF_SAMPLE_TID) {
37073f9e
JO
1175 u.val64 = *array;
1176 if (swapped) {
1177 /* undo swap of u64, then swap on individual u32s */
1178 u.val64 = bswap_64(u.val64);
1179 u.val32[0] = bswap_32(u.val32[0]);
1180 u.val32[1] = bswap_32(u.val32[1]);
1181 }
1182
1183 sample->pid = u.val32[0];
1184 sample->tid = u.val32[1];
dd44bc6b 1185 array--;
d0dd74e8
ACM
1186 }
1187
1188 return 0;
1189}
1190
03b6ea9b
AH
1191static inline bool overflow(const void *endp, u16 max_size, const void *offset,
1192 u64 size)
98e1da90 1193{
03b6ea9b
AH
1194 return size > max_size || offset + size > endp;
1195}
98e1da90 1196
03b6ea9b
AH
1197#define OVERFLOW_CHECK(offset, size, max_size) \
1198 do { \
1199 if (overflow(endp, (max_size), (offset), (size))) \
1200 return -EFAULT; \
1201 } while (0)
98e1da90 1202
03b6ea9b
AH
1203#define OVERFLOW_CHECK_u64(offset) \
1204 OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64))
98e1da90 1205
a3f698fe 1206int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event,
0807d2d8 1207 struct perf_sample *data)
d0dd74e8 1208{
a3f698fe 1209 u64 type = evsel->attr.sample_type;
0807d2d8 1210 bool swapped = evsel->needs_swap;
d0dd74e8 1211 const u64 *array;
03b6ea9b
AH
1212 u16 max_size = event->header.size;
1213 const void *endp = (void *)event + max_size;
1214 u64 sz;
d0dd74e8 1215
936be503
DA
1216 /*
1217 * used for cross-endian analysis. See git commit 65014ab3
1218 * for why this goofiness is needed.
1219 */
6a11f92e 1220 union u64_swap u;
936be503 1221
f3bda2c9 1222 memset(data, 0, sizeof(*data));
d0dd74e8
ACM
1223 data->cpu = data->pid = data->tid = -1;
1224 data->stream_id = data->id = data->time = -1ULL;
a4a03fc7 1225 data->period = 1;
05484298 1226 data->weight = 0;
d0dd74e8
ACM
1227
1228 if (event->header.type != PERF_RECORD_SAMPLE) {
a3f698fe 1229 if (!evsel->attr.sample_id_all)
d0dd74e8 1230 return 0;
0807d2d8 1231 return perf_evsel__parse_id_sample(evsel, event, data);
d0dd74e8
ACM
1232 }
1233
1234 array = event->sample.array;
1235
03b6ea9b
AH
1236 /*
1237 * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes
1238 * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to
1239 * check the format does not go past the end of the event.
1240 */
a3f698fe 1241 if (evsel->sample_size + sizeof(event->header) > event->header.size)
a2854124
FW
1242 return -EFAULT;
1243
75562573
AH
1244 data->id = -1ULL;
1245 if (type & PERF_SAMPLE_IDENTIFIER) {
1246 data->id = *array;
1247 array++;
1248 }
1249
d0dd74e8 1250 if (type & PERF_SAMPLE_IP) {
ef89325f 1251 data->ip = *array;
d0dd74e8
ACM
1252 array++;
1253 }
1254
1255 if (type & PERF_SAMPLE_TID) {
936be503
DA
1256 u.val64 = *array;
1257 if (swapped) {
1258 /* undo swap of u64, then swap on individual u32s */
1259 u.val64 = bswap_64(u.val64);
1260 u.val32[0] = bswap_32(u.val32[0]);
1261 u.val32[1] = bswap_32(u.val32[1]);
1262 }
1263
1264 data->pid = u.val32[0];
1265 data->tid = u.val32[1];
d0dd74e8
ACM
1266 array++;
1267 }
1268
1269 if (type & PERF_SAMPLE_TIME) {
1270 data->time = *array;
1271 array++;
1272 }
1273
7cec0922 1274 data->addr = 0;
d0dd74e8
ACM
1275 if (type & PERF_SAMPLE_ADDR) {
1276 data->addr = *array;
1277 array++;
1278 }
1279
d0dd74e8
ACM
1280 if (type & PERF_SAMPLE_ID) {
1281 data->id = *array;
1282 array++;
1283 }
1284
1285 if (type & PERF_SAMPLE_STREAM_ID) {
1286 data->stream_id = *array;
1287 array++;
1288 }
1289
1290 if (type & PERF_SAMPLE_CPU) {
936be503
DA
1291
1292 u.val64 = *array;
1293 if (swapped) {
1294 /* undo swap of u64, then swap on individual u32s */
1295 u.val64 = bswap_64(u.val64);
1296 u.val32[0] = bswap_32(u.val32[0]);
1297 }
1298
1299 data->cpu = u.val32[0];
d0dd74e8
ACM
1300 array++;
1301 }
1302
1303 if (type & PERF_SAMPLE_PERIOD) {
1304 data->period = *array;
1305 array++;
1306 }
1307
1308 if (type & PERF_SAMPLE_READ) {
9ede473c
JO
1309 u64 read_format = evsel->attr.read_format;
1310
03b6ea9b 1311 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1312 if (read_format & PERF_FORMAT_GROUP)
1313 data->read.group.nr = *array;
1314 else
1315 data->read.one.value = *array;
1316
1317 array++;
1318
1319 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
03b6ea9b 1320 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1321 data->read.time_enabled = *array;
1322 array++;
1323 }
1324
1325 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
03b6ea9b 1326 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1327 data->read.time_running = *array;
1328 array++;
1329 }
1330
1331 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1332 if (read_format & PERF_FORMAT_GROUP) {
03b6ea9b
AH
1333 const u64 max_group_nr = UINT64_MAX /
1334 sizeof(struct sample_read_value);
1335
1336 if (data->read.group.nr > max_group_nr)
1337 return -EFAULT;
1338 sz = data->read.group.nr *
1339 sizeof(struct sample_read_value);
1340 OVERFLOW_CHECK(array, sz, max_size);
1341 data->read.group.values =
1342 (struct sample_read_value *)array;
1343 array = (void *)array + sz;
9ede473c 1344 } else {
03b6ea9b 1345 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1346 data->read.one.id = *array;
1347 array++;
1348 }
d0dd74e8
ACM
1349 }
1350
1351 if (type & PERF_SAMPLE_CALLCHAIN) {
03b6ea9b 1352 const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);
98e1da90 1353
03b6ea9b
AH
1354 OVERFLOW_CHECK_u64(array);
1355 data->callchain = (struct ip_callchain *)array++;
1356 if (data->callchain->nr > max_callchain_nr)
98e1da90 1357 return -EFAULT;
03b6ea9b
AH
1358 sz = data->callchain->nr * sizeof(u64);
1359 OVERFLOW_CHECK(array, sz, max_size);
1360 array = (void *)array + sz;
d0dd74e8
ACM
1361 }
1362
1363 if (type & PERF_SAMPLE_RAW) {
03b6ea9b 1364 OVERFLOW_CHECK_u64(array);
936be503
DA
1365 u.val64 = *array;
1366 if (WARN_ONCE(swapped,
1367 "Endianness of raw data not corrected!\n")) {
1368 /* undo swap of u64, then swap on individual u32s */
1369 u.val64 = bswap_64(u.val64);
1370 u.val32[0] = bswap_32(u.val32[0]);
1371 u.val32[1] = bswap_32(u.val32[1]);
1372 }
936be503 1373 data->raw_size = u.val32[0];
03b6ea9b 1374 array = (void *)array + sizeof(u32);
98e1da90 1375
03b6ea9b
AH
1376 OVERFLOW_CHECK(array, data->raw_size, max_size);
1377 data->raw_data = (void *)array;
1378 array = (void *)array + data->raw_size;
d0dd74e8
ACM
1379 }
1380
b5387528 1381 if (type & PERF_SAMPLE_BRANCH_STACK) {
03b6ea9b
AH
1382 const u64 max_branch_nr = UINT64_MAX /
1383 sizeof(struct branch_entry);
b5387528 1384
03b6ea9b
AH
1385 OVERFLOW_CHECK_u64(array);
1386 data->branch_stack = (struct branch_stack *)array++;
b5387528 1387
03b6ea9b
AH
1388 if (data->branch_stack->nr > max_branch_nr)
1389 return -EFAULT;
b5387528 1390 sz = data->branch_stack->nr * sizeof(struct branch_entry);
03b6ea9b
AH
1391 OVERFLOW_CHECK(array, sz, max_size);
1392 array = (void *)array + sz;
b5387528 1393 }
0f6a3015
JO
1394
1395 if (type & PERF_SAMPLE_REGS_USER) {
03b6ea9b 1396 OVERFLOW_CHECK_u64(array);
5b95a4a3
AH
1397 data->user_regs.abi = *array;
1398 array++;
0f6a3015 1399
5b95a4a3 1400 if (data->user_regs.abi) {
03b6ea9b
AH
1401 u64 regs_user = evsel->attr.sample_regs_user;
1402
1403 sz = hweight_long(regs_user) * sizeof(u64);
1404 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1405 data->user_regs.regs = (u64 *)array;
03b6ea9b 1406 array = (void *)array + sz;
0f6a3015
JO
1407 }
1408 }
1409
1410 if (type & PERF_SAMPLE_STACK_USER) {
03b6ea9b
AH
1411 OVERFLOW_CHECK_u64(array);
1412 sz = *array++;
0f6a3015
JO
1413
1414 data->user_stack.offset = ((char *)(array - 1)
1415 - (char *) event);
1416
03b6ea9b 1417 if (!sz) {
0f6a3015
JO
1418 data->user_stack.size = 0;
1419 } else {
03b6ea9b 1420 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1421 data->user_stack.data = (char *)array;
03b6ea9b
AH
1422 array = (void *)array + sz;
1423 OVERFLOW_CHECK_u64(array);
54bd2692 1424 data->user_stack.size = *array++;
a65cb4b9
JO
1425 if (WARN_ONCE(data->user_stack.size > sz,
1426 "user stack dump failure\n"))
1427 return -EFAULT;
0f6a3015
JO
1428 }
1429 }
1430
05484298
AK
1431 data->weight = 0;
1432 if (type & PERF_SAMPLE_WEIGHT) {
03b6ea9b 1433 OVERFLOW_CHECK_u64(array);
05484298
AK
1434 data->weight = *array;
1435 array++;
1436 }
1437
98a3b32c
SE
1438 data->data_src = PERF_MEM_DATA_SRC_NONE;
1439 if (type & PERF_SAMPLE_DATA_SRC) {
03b6ea9b 1440 OVERFLOW_CHECK_u64(array);
98a3b32c
SE
1441 data->data_src = *array;
1442 array++;
1443 }
1444
475eeab9
AK
1445 data->transaction = 0;
1446 if (type & PERF_SAMPLE_TRANSACTION) {
87b95524 1447 OVERFLOW_CHECK_u64(array);
475eeab9
AK
1448 data->transaction = *array;
1449 array++;
1450 }
1451
d0dd74e8
ACM
1452 return 0;
1453}
74eec26f 1454
b1cf6f65
AH
1455size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
1456 u64 sample_regs_user, u64 read_format)
1457{
1458 size_t sz, result = sizeof(struct sample_event);
1459
1460 if (type & PERF_SAMPLE_IDENTIFIER)
1461 result += sizeof(u64);
1462
1463 if (type & PERF_SAMPLE_IP)
1464 result += sizeof(u64);
1465
1466 if (type & PERF_SAMPLE_TID)
1467 result += sizeof(u64);
1468
1469 if (type & PERF_SAMPLE_TIME)
1470 result += sizeof(u64);
1471
1472 if (type & PERF_SAMPLE_ADDR)
1473 result += sizeof(u64);
1474
1475 if (type & PERF_SAMPLE_ID)
1476 result += sizeof(u64);
1477
1478 if (type & PERF_SAMPLE_STREAM_ID)
1479 result += sizeof(u64);
1480
1481 if (type & PERF_SAMPLE_CPU)
1482 result += sizeof(u64);
1483
1484 if (type & PERF_SAMPLE_PERIOD)
1485 result += sizeof(u64);
1486
1487 if (type & PERF_SAMPLE_READ) {
1488 result += sizeof(u64);
1489 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED)
1490 result += sizeof(u64);
1491 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
1492 result += sizeof(u64);
1493 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1494 if (read_format & PERF_FORMAT_GROUP) {
1495 sz = sample->read.group.nr *
1496 sizeof(struct sample_read_value);
1497 result += sz;
1498 } else {
1499 result += sizeof(u64);
1500 }
1501 }
1502
1503 if (type & PERF_SAMPLE_CALLCHAIN) {
1504 sz = (sample->callchain->nr + 1) * sizeof(u64);
1505 result += sz;
1506 }
1507
1508 if (type & PERF_SAMPLE_RAW) {
1509 result += sizeof(u32);
1510 result += sample->raw_size;
1511 }
1512
1513 if (type & PERF_SAMPLE_BRANCH_STACK) {
1514 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1515 sz += sizeof(u64);
1516 result += sz;
1517 }
1518
1519 if (type & PERF_SAMPLE_REGS_USER) {
1520 if (sample->user_regs.abi) {
1521 result += sizeof(u64);
1522 sz = hweight_long(sample_regs_user) * sizeof(u64);
1523 result += sz;
1524 } else {
1525 result += sizeof(u64);
1526 }
1527 }
1528
1529 if (type & PERF_SAMPLE_STACK_USER) {
1530 sz = sample->user_stack.size;
1531 result += sizeof(u64);
1532 if (sz) {
1533 result += sz;
1534 result += sizeof(u64);
1535 }
1536 }
1537
1538 if (type & PERF_SAMPLE_WEIGHT)
1539 result += sizeof(u64);
1540
1541 if (type & PERF_SAMPLE_DATA_SRC)
1542 result += sizeof(u64);
1543
42d88910
AH
1544 if (type & PERF_SAMPLE_TRANSACTION)
1545 result += sizeof(u64);
1546
b1cf6f65
AH
1547 return result;
1548}
1549
74eec26f 1550int perf_event__synthesize_sample(union perf_event *event, u64 type,
d03f2170 1551 u64 sample_regs_user, u64 read_format,
74eec26f
AV
1552 const struct perf_sample *sample,
1553 bool swapped)
1554{
1555 u64 *array;
d03f2170 1556 size_t sz;
74eec26f
AV
1557 /*
1558 * used for cross-endian analysis. See git commit 65014ab3
1559 * for why this goofiness is needed.
1560 */
6a11f92e 1561 union u64_swap u;
74eec26f
AV
1562
1563 array = event->sample.array;
1564
75562573
AH
1565 if (type & PERF_SAMPLE_IDENTIFIER) {
1566 *array = sample->id;
1567 array++;
1568 }
1569
74eec26f 1570 if (type & PERF_SAMPLE_IP) {
ef89325f 1571 *array = sample->ip;
74eec26f
AV
1572 array++;
1573 }
1574
1575 if (type & PERF_SAMPLE_TID) {
1576 u.val32[0] = sample->pid;
1577 u.val32[1] = sample->tid;
1578 if (swapped) {
1579 /*
a3f698fe 1580 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1581 */
1582 u.val32[0] = bswap_32(u.val32[0]);
1583 u.val32[1] = bswap_32(u.val32[1]);
1584 u.val64 = bswap_64(u.val64);
1585 }
1586
1587 *array = u.val64;
1588 array++;
1589 }
1590
1591 if (type & PERF_SAMPLE_TIME) {
1592 *array = sample->time;
1593 array++;
1594 }
1595
1596 if (type & PERF_SAMPLE_ADDR) {
1597 *array = sample->addr;
1598 array++;
1599 }
1600
1601 if (type & PERF_SAMPLE_ID) {
1602 *array = sample->id;
1603 array++;
1604 }
1605
1606 if (type & PERF_SAMPLE_STREAM_ID) {
1607 *array = sample->stream_id;
1608 array++;
1609 }
1610
1611 if (type & PERF_SAMPLE_CPU) {
1612 u.val32[0] = sample->cpu;
1613 if (swapped) {
1614 /*
a3f698fe 1615 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1616 */
1617 u.val32[0] = bswap_32(u.val32[0]);
1618 u.val64 = bswap_64(u.val64);
1619 }
1620 *array = u.val64;
1621 array++;
1622 }
1623
1624 if (type & PERF_SAMPLE_PERIOD) {
1625 *array = sample->period;
1626 array++;
1627 }
1628
d03f2170
AH
1629 if (type & PERF_SAMPLE_READ) {
1630 if (read_format & PERF_FORMAT_GROUP)
1631 *array = sample->read.group.nr;
1632 else
1633 *array = sample->read.one.value;
1634 array++;
1635
1636 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
1637 *array = sample->read.time_enabled;
1638 array++;
1639 }
1640
1641 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
1642 *array = sample->read.time_running;
1643 array++;
1644 }
1645
1646 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1647 if (read_format & PERF_FORMAT_GROUP) {
1648 sz = sample->read.group.nr *
1649 sizeof(struct sample_read_value);
1650 memcpy(array, sample->read.group.values, sz);
1651 array = (void *)array + sz;
1652 } else {
1653 *array = sample->read.one.id;
1654 array++;
1655 }
1656 }
1657
1658 if (type & PERF_SAMPLE_CALLCHAIN) {
1659 sz = (sample->callchain->nr + 1) * sizeof(u64);
1660 memcpy(array, sample->callchain, sz);
1661 array = (void *)array + sz;
1662 }
1663
1664 if (type & PERF_SAMPLE_RAW) {
1665 u.val32[0] = sample->raw_size;
1666 if (WARN_ONCE(swapped,
1667 "Endianness of raw data not corrected!\n")) {
1668 /*
1669 * Inverse of what is done in perf_evsel__parse_sample
1670 */
1671 u.val32[0] = bswap_32(u.val32[0]);
1672 u.val32[1] = bswap_32(u.val32[1]);
1673 u.val64 = bswap_64(u.val64);
1674 }
1675 *array = u.val64;
1676 array = (void *)array + sizeof(u32);
1677
1678 memcpy(array, sample->raw_data, sample->raw_size);
1679 array = (void *)array + sample->raw_size;
1680 }
1681
1682 if (type & PERF_SAMPLE_BRANCH_STACK) {
1683 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1684 sz += sizeof(u64);
1685 memcpy(array, sample->branch_stack, sz);
1686 array = (void *)array + sz;
1687 }
1688
1689 if (type & PERF_SAMPLE_REGS_USER) {
1690 if (sample->user_regs.abi) {
1691 *array++ = sample->user_regs.abi;
1692 sz = hweight_long(sample_regs_user) * sizeof(u64);
1693 memcpy(array, sample->user_regs.regs, sz);
1694 array = (void *)array + sz;
1695 } else {
1696 *array++ = 0;
1697 }
1698 }
1699
1700 if (type & PERF_SAMPLE_STACK_USER) {
1701 sz = sample->user_stack.size;
1702 *array++ = sz;
1703 if (sz) {
1704 memcpy(array, sample->user_stack.data, sz);
1705 array = (void *)array + sz;
1706 *array++ = sz;
1707 }
1708 }
1709
1710 if (type & PERF_SAMPLE_WEIGHT) {
1711 *array = sample->weight;
1712 array++;
1713 }
1714
1715 if (type & PERF_SAMPLE_DATA_SRC) {
1716 *array = sample->data_src;
1717 array++;
1718 }
1719
42d88910
AH
1720 if (type & PERF_SAMPLE_TRANSACTION) {
1721 *array = sample->transaction;
1722 array++;
1723 }
1724
74eec26f
AV
1725 return 0;
1726}
5555ded4 1727
efd2b924
ACM
1728struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
1729{
1730 return pevent_find_field(evsel->tp_format, name);
1731}
1732
5d2074ea 1733void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
5555ded4
ACM
1734 const char *name)
1735{
efd2b924 1736 struct format_field *field = perf_evsel__field(evsel, name);
5555ded4
ACM
1737 int offset;
1738
efd2b924
ACM
1739 if (!field)
1740 return NULL;
5555ded4
ACM
1741
1742 offset = field->offset;
1743
1744 if (field->flags & FIELD_IS_DYNAMIC) {
1745 offset = *(int *)(sample->raw_data + field->offset);
1746 offset &= 0xffff;
1747 }
1748
1749 return sample->raw_data + offset;
1750}
1751
1752u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample,
1753 const char *name)
1754{
efd2b924 1755 struct format_field *field = perf_evsel__field(evsel, name);
e6b6f679
ACM
1756 void *ptr;
1757 u64 value;
5555ded4 1758
efd2b924
ACM
1759 if (!field)
1760 return 0;
5555ded4 1761
e6b6f679 1762 ptr = sample->raw_data + field->offset;
5555ded4 1763
e6b6f679
ACM
1764 switch (field->size) {
1765 case 1:
1766 return *(u8 *)ptr;
1767 case 2:
1768 value = *(u16 *)ptr;
1769 break;
1770 case 4:
1771 value = *(u32 *)ptr;
1772 break;
1773 case 8:
1774 value = *(u64 *)ptr;
1775 break;
1776 default:
1777 return 0;
1778 }
1779
1780 if (!evsel->needs_swap)
1781 return value;
1782
1783 switch (field->size) {
1784 case 2:
1785 return bswap_16(value);
1786 case 4:
1787 return bswap_32(value);
1788 case 8:
1789 return bswap_64(value);
1790 default:
1791 return 0;
1792 }
1793
1794 return 0;
5555ded4 1795}
0698aedd
ACM
1796
1797static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...)
1798{
1799 va_list args;
1800 int ret = 0;
1801
1802 if (!*first) {
1803 ret += fprintf(fp, ",");
1804 } else {
1805 ret += fprintf(fp, ":");
1806 *first = false;
1807 }
1808
1809 va_start(args, fmt);
1810 ret += vfprintf(fp, fmt, args);
1811 va_end(args);
1812 return ret;
1813}
1814
1815static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value)
1816{
1817 if (value == 0)
1818 return 0;
1819
1820 return comma_fprintf(fp, first, " %s: %" PRIu64, field, value);
1821}
1822
1823#define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field)
1824
c79a4393
ACM
1825struct bit_names {
1826 int bit;
1827 const char *name;
1828};
1829
1830static int bits__fprintf(FILE *fp, const char *field, u64 value,
1831 struct bit_names *bits, bool *first)
1832{
1833 int i = 0, printed = comma_fprintf(fp, first, " %s: ", field);
1834 bool first_bit = true;
1835
1836 do {
1837 if (value & bits[i].bit) {
1838 printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name);
1839 first_bit = false;
1840 }
1841 } while (bits[++i].name != NULL);
1842
1843 return printed;
1844}
1845
1846static int sample_type__fprintf(FILE *fp, bool *first, u64 value)
1847{
1848#define bit_name(n) { PERF_SAMPLE_##n, #n }
1849 struct bit_names bits[] = {
1850 bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
1851 bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
1852 bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
1853 bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
75562573 1854 bit_name(IDENTIFIER),
c79a4393
ACM
1855 { .name = NULL, }
1856 };
1857#undef bit_name
1858 return bits__fprintf(fp, "sample_type", value, bits, first);
1859}
1860
1861static int read_format__fprintf(FILE *fp, bool *first, u64 value)
1862{
1863#define bit_name(n) { PERF_FORMAT_##n, #n }
1864 struct bit_names bits[] = {
1865 bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
1866 bit_name(ID), bit_name(GROUP),
1867 { .name = NULL, }
1868 };
1869#undef bit_name
1870 return bits__fprintf(fp, "read_format", value, bits, first);
1871}
1872
0698aedd
ACM
1873int perf_evsel__fprintf(struct perf_evsel *evsel,
1874 struct perf_attr_details *details, FILE *fp)
1875{
1876 bool first = true;
e6ab07d0
NK
1877 int printed = 0;
1878
e35ef355 1879 if (details->event_group) {
e6ab07d0
NK
1880 struct perf_evsel *pos;
1881
1882 if (!perf_evsel__is_group_leader(evsel))
1883 return 0;
1884
1885 if (evsel->nr_members > 1)
1886 printed += fprintf(fp, "%s{", evsel->group_name ?: "");
1887
1888 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
1889 for_each_group_member(pos, evsel)
1890 printed += fprintf(fp, ",%s", perf_evsel__name(pos));
1891
1892 if (evsel->nr_members > 1)
1893 printed += fprintf(fp, "}");
1894 goto out;
1895 }
1896
1897 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
0698aedd
ACM
1898
1899 if (details->verbose || details->freq) {
1900 printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
1901 (u64)evsel->attr.sample_freq);
1902 }
1903
1904 if (details->verbose) {
1905 if_print(type);
1906 if_print(config);
1907 if_print(config1);
1908 if_print(config2);
1909 if_print(size);
c79a4393
ACM
1910 printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type);
1911 if (evsel->attr.read_format)
1912 printed += read_format__fprintf(fp, &first, evsel->attr.read_format);
0698aedd
ACM
1913 if_print(disabled);
1914 if_print(inherit);
1915 if_print(pinned);
1916 if_print(exclusive);
1917 if_print(exclude_user);
1918 if_print(exclude_kernel);
1919 if_print(exclude_hv);
1920 if_print(exclude_idle);
1921 if_print(mmap);
5c5e854b 1922 if_print(mmap2);
0698aedd
ACM
1923 if_print(comm);
1924 if_print(freq);
1925 if_print(inherit_stat);
1926 if_print(enable_on_exec);
1927 if_print(task);
1928 if_print(watermark);
1929 if_print(precise_ip);
1930 if_print(mmap_data);
1931 if_print(sample_id_all);
1932 if_print(exclude_host);
1933 if_print(exclude_guest);
1934 if_print(__reserved_1);
1935 if_print(wakeup_events);
1936 if_print(bp_type);
1937 if_print(branch_sample_type);
1938 }
e6ab07d0 1939out:
0698aedd
ACM
1940 fputc('\n', fp);
1941 return ++printed;
1942}
c0a54341
ACM
1943
1944bool perf_evsel__fallback(struct perf_evsel *evsel, int err,
1945 char *msg, size_t msgsize)
1946{
2b821cce 1947 if ((err == ENOENT || err == ENXIO || err == ENODEV) &&
c0a54341
ACM
1948 evsel->attr.type == PERF_TYPE_HARDWARE &&
1949 evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
1950 /*
1951 * If it's cycles then fall back to hrtimer based
1952 * cpu-clock-tick sw counter, which is always available even if
1953 * no PMU support.
1954 *
1955 * PPC returns ENXIO until 2.6.37 (behavior changed with commit
1956 * b0a873e).
1957 */
1958 scnprintf(msg, msgsize, "%s",
1959"The cycles event is not supported, trying to fall back to cpu-clock-ticks");
1960
1961 evsel->attr.type = PERF_TYPE_SOFTWARE;
1962 evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK;
1963
1964 free(evsel->name);
1965 evsel->name = NULL;
1966 return true;
1967 }
1968
1969 return false;
1970}
56e52e85 1971
602ad878 1972int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target,
56e52e85
ACM
1973 int err, char *msg, size_t size)
1974{
1975 switch (err) {
1976 case EPERM:
1977 case EACCES:
b69e63a4 1978 return scnprintf(msg, size,
56e52e85
ACM
1979 "You may not have permission to collect %sstats.\n"
1980 "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n"
1981 " -1 - Not paranoid at all\n"
1982 " 0 - Disallow raw tracepoint access for unpriv\n"
1983 " 1 - Disallow cpu events for unpriv\n"
1984 " 2 - Disallow kernel profiling for unpriv",
1985 target->system_wide ? "system-wide " : "");
1986 case ENOENT:
1987 return scnprintf(msg, size, "The %s event is not supported.",
1988 perf_evsel__name(evsel));
1989 case EMFILE:
1990 return scnprintf(msg, size, "%s",
1991 "Too many events are opened.\n"
1992 "Try again after reducing the number of events.");
1993 case ENODEV:
1994 if (target->cpu_list)
1995 return scnprintf(msg, size, "%s",
1996 "No such device - did you specify an out-of-range profile CPU?\n");
1997 break;
1998 case EOPNOTSUPP:
1999 if (evsel->attr.precise_ip)
2000 return scnprintf(msg, size, "%s",
2001 "\'precise\' request may not be supported. Try removing 'p' modifier.");
2002#if defined(__i386__) || defined(__x86_64__)
2003 if (evsel->attr.type == PERF_TYPE_HARDWARE)
2004 return scnprintf(msg, size, "%s",
2005 "No hardware sampling interrupt available.\n"
2006 "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.");
2007#endif
2008 break;
2009 default:
2010 break;
2011 }
2012
2013 return scnprintf(msg, size,
2014 "The sys_perf_event_open() syscall returned with %d (%s) for event (%s). \n"
2015 "/bin/dmesg may provide additional information.\n"
2016 "No CONFIG_PERF_EVENTS=y kernel support configured?\n",
2017 err, strerror(err), perf_evsel__name(evsel));
2018}