]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - tools/perf/util/evsel.c
perf tools: Add support for event post configuration
[mirror_ubuntu-artful-kernel.git] / tools / perf / util / evsel.c
CommitLineData
f8a95309
ACM
1/*
2 * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
3 *
4 * Parts came from builtin-{top,stat,record}.c, see those files for further
5 * copyright notes.
6 *
7 * Released under the GPL v2. (and only v2, not any later version)
8 */
9
936be503 10#include <byteswap.h>
0f6a3015 11#include <linux/bitops.h>
553873e1 12#include <api/fs/debugfs.h>
4e319027
RR
13#include <traceevent/event-parse.h>
14#include <linux/hw_breakpoint.h>
15#include <linux/perf_event.h>
bec19672 16#include <sys/resource.h>
4e319027 17#include "asm/bug.h"
8f651eae 18#include "callchain.h"
f14d5707 19#include "cgroup.h"
69aad6f1 20#include "evsel.h"
70082dd9 21#include "evlist.h"
69aad6f1 22#include "util.h"
86bd5e86 23#include "cpumap.h"
fd78260b 24#include "thread_map.h"
12864b31 25#include "target.h"
26d33022 26#include "perf_regs.h"
e3e1a54f 27#include "debug.h"
97978b3e 28#include "trace-event.h"
a9a3a4d9 29#include "stat.h"
69aad6f1 30
594ac61a
ACM
31static struct {
32 bool sample_id_all;
33 bool exclude_guest;
5c5e854b 34 bool mmap2;
57480d2c 35 bool cloexec;
814c8c38
PZ
36 bool clockid;
37 bool clockid_wrong;
594ac61a
ACM
38} perf_missing_features;
39
814c8c38
PZ
40static clockid_t clockid;
41
ce8ccff5
ACM
42static int perf_evsel__no_extra_init(struct perf_evsel *evsel __maybe_unused)
43{
44 return 0;
45}
46
47static void perf_evsel__no_extra_fini(struct perf_evsel *evsel __maybe_unused)
48{
49}
50
51static struct {
52 size_t size;
53 int (*init)(struct perf_evsel *evsel);
54 void (*fini)(struct perf_evsel *evsel);
55} perf_evsel__object = {
56 .size = sizeof(struct perf_evsel),
57 .init = perf_evsel__no_extra_init,
58 .fini = perf_evsel__no_extra_fini,
59};
60
61int perf_evsel__object_config(size_t object_size,
62 int (*init)(struct perf_evsel *evsel),
63 void (*fini)(struct perf_evsel *evsel))
64{
65
66 if (object_size == 0)
67 goto set_methods;
68
69 if (perf_evsel__object.size > object_size)
70 return -EINVAL;
71
72 perf_evsel__object.size = object_size;
73
74set_methods:
75 if (init != NULL)
76 perf_evsel__object.init = init;
77
78 if (fini != NULL)
79 perf_evsel__object.fini = fini;
80
81 return 0;
82}
83
c52b12ed
ACM
84#define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y))
85
75562573 86int __perf_evsel__sample_size(u64 sample_type)
c2a70653
ACM
87{
88 u64 mask = sample_type & PERF_SAMPLE_MASK;
89 int size = 0;
90 int i;
91
92 for (i = 0; i < 64; i++) {
93 if (mask & (1ULL << i))
94 size++;
95 }
96
97 size *= sizeof(u64);
98
99 return size;
100}
101
75562573
AH
102/**
103 * __perf_evsel__calc_id_pos - calculate id_pos.
104 * @sample_type: sample type
105 *
106 * This function returns the position of the event id (PERF_SAMPLE_ID or
107 * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct
108 * sample_event.
109 */
110static int __perf_evsel__calc_id_pos(u64 sample_type)
111{
112 int idx = 0;
113
114 if (sample_type & PERF_SAMPLE_IDENTIFIER)
115 return 0;
116
117 if (!(sample_type & PERF_SAMPLE_ID))
118 return -1;
119
120 if (sample_type & PERF_SAMPLE_IP)
121 idx += 1;
122
123 if (sample_type & PERF_SAMPLE_TID)
124 idx += 1;
125
126 if (sample_type & PERF_SAMPLE_TIME)
127 idx += 1;
128
129 if (sample_type & PERF_SAMPLE_ADDR)
130 idx += 1;
131
132 return idx;
133}
134
135/**
136 * __perf_evsel__calc_is_pos - calculate is_pos.
137 * @sample_type: sample type
138 *
139 * This function returns the position (counting backwards) of the event id
140 * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if
141 * sample_id_all is used there is an id sample appended to non-sample events.
142 */
143static int __perf_evsel__calc_is_pos(u64 sample_type)
144{
145 int idx = 1;
146
147 if (sample_type & PERF_SAMPLE_IDENTIFIER)
148 return 1;
149
150 if (!(sample_type & PERF_SAMPLE_ID))
151 return -1;
152
153 if (sample_type & PERF_SAMPLE_CPU)
154 idx += 1;
155
156 if (sample_type & PERF_SAMPLE_STREAM_ID)
157 idx += 1;
158
159 return idx;
160}
161
162void perf_evsel__calc_id_pos(struct perf_evsel *evsel)
163{
164 evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type);
165 evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type);
166}
167
7be5ebe8
ACM
168void __perf_evsel__set_sample_bit(struct perf_evsel *evsel,
169 enum perf_event_sample_format bit)
170{
171 if (!(evsel->attr.sample_type & bit)) {
172 evsel->attr.sample_type |= bit;
173 evsel->sample_size += sizeof(u64);
75562573 174 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
175 }
176}
177
178void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel,
179 enum perf_event_sample_format bit)
180{
181 if (evsel->attr.sample_type & bit) {
182 evsel->attr.sample_type &= ~bit;
183 evsel->sample_size -= sizeof(u64);
75562573 184 perf_evsel__calc_id_pos(evsel);
7be5ebe8
ACM
185 }
186}
187
75562573
AH
188void perf_evsel__set_sample_id(struct perf_evsel *evsel,
189 bool can_sample_identifier)
7a5a5ca5 190{
75562573
AH
191 if (can_sample_identifier) {
192 perf_evsel__reset_sample_bit(evsel, ID);
193 perf_evsel__set_sample_bit(evsel, IDENTIFIER);
194 } else {
195 perf_evsel__set_sample_bit(evsel, ID);
196 }
7a5a5ca5
ACM
197 evsel->attr.read_format |= PERF_FORMAT_ID;
198}
199
ef1d1af2
ACM
200void perf_evsel__init(struct perf_evsel *evsel,
201 struct perf_event_attr *attr, int idx)
202{
203 evsel->idx = idx;
60b0896c 204 evsel->tracking = !idx;
ef1d1af2 205 evsel->attr = *attr;
2cfda562 206 evsel->leader = evsel;
410136f5
SE
207 evsel->unit = "";
208 evsel->scale = 1.0;
ef1d1af2 209 INIT_LIST_HEAD(&evsel->node);
930a2e29 210 INIT_LIST_HEAD(&evsel->config_terms);
ce8ccff5 211 perf_evsel__object.init(evsel);
bde09467 212 evsel->sample_size = __perf_evsel__sample_size(attr->sample_type);
75562573 213 perf_evsel__calc_id_pos(evsel);
15bfd2cc 214 evsel->cmdline_group_boundary = false;
ef1d1af2
ACM
215}
216
ef503831 217struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
69aad6f1 218{
ce8ccff5 219 struct perf_evsel *evsel = zalloc(perf_evsel__object.size);
69aad6f1 220
ef1d1af2
ACM
221 if (evsel != NULL)
222 perf_evsel__init(evsel, attr, idx);
69aad6f1
ACM
223
224 return evsel;
225}
226
ef503831 227struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx)
efd2b924 228{
ce8ccff5 229 struct perf_evsel *evsel = zalloc(perf_evsel__object.size);
efd2b924
ACM
230
231 if (evsel != NULL) {
232 struct perf_event_attr attr = {
0b80f8b3
ACM
233 .type = PERF_TYPE_TRACEPOINT,
234 .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME |
235 PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD),
efd2b924
ACM
236 };
237
e48ffe2b
ACM
238 if (asprintf(&evsel->name, "%s:%s", sys, name) < 0)
239 goto out_free;
240
97978b3e 241 evsel->tp_format = trace_event__tp_format(sys, name);
efd2b924
ACM
242 if (evsel->tp_format == NULL)
243 goto out_free;
244
0b80f8b3 245 event_attr_init(&attr);
efd2b924 246 attr.config = evsel->tp_format->id;
0b80f8b3 247 attr.sample_period = 1;
efd2b924 248 perf_evsel__init(evsel, &attr, idx);
efd2b924
ACM
249 }
250
251 return evsel;
252
253out_free:
74cf249d 254 zfree(&evsel->name);
efd2b924
ACM
255 free(evsel);
256 return NULL;
257}
258
8ad7013b 259const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = {
c410431c
ACM
260 "cycles",
261 "instructions",
262 "cache-references",
263 "cache-misses",
264 "branches",
265 "branch-misses",
266 "bus-cycles",
267 "stalled-cycles-frontend",
268 "stalled-cycles-backend",
269 "ref-cycles",
270};
271
dd4f5223 272static const char *__perf_evsel__hw_name(u64 config)
c410431c
ACM
273{
274 if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config])
275 return perf_evsel__hw_names[config];
276
277 return "unknown-hardware";
278}
279
27f18617 280static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size)
c410431c 281{
27f18617 282 int colon = 0, r = 0;
c410431c 283 struct perf_event_attr *attr = &evsel->attr;
c410431c
ACM
284 bool exclude_guest_default = false;
285
286#define MOD_PRINT(context, mod) do { \
287 if (!attr->exclude_##context) { \
27f18617 288 if (!colon) colon = ++r; \
c410431c
ACM
289 r += scnprintf(bf + r, size - r, "%c", mod); \
290 } } while(0)
291
292 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) {
293 MOD_PRINT(kernel, 'k');
294 MOD_PRINT(user, 'u');
295 MOD_PRINT(hv, 'h');
296 exclude_guest_default = true;
297 }
298
299 if (attr->precise_ip) {
300 if (!colon)
27f18617 301 colon = ++r;
c410431c
ACM
302 r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp");
303 exclude_guest_default = true;
304 }
305
306 if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) {
307 MOD_PRINT(host, 'H');
308 MOD_PRINT(guest, 'G');
309 }
310#undef MOD_PRINT
311 if (colon)
27f18617 312 bf[colon - 1] = ':';
c410431c
ACM
313 return r;
314}
315
27f18617
ACM
316static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size)
317{
318 int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config));
319 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
320}
321
8ad7013b 322const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = {
335c2f5d
ACM
323 "cpu-clock",
324 "task-clock",
325 "page-faults",
326 "context-switches",
8ad7013b 327 "cpu-migrations",
335c2f5d
ACM
328 "minor-faults",
329 "major-faults",
330 "alignment-faults",
331 "emulation-faults",
d22d1a2a 332 "dummy",
335c2f5d
ACM
333};
334
dd4f5223 335static const char *__perf_evsel__sw_name(u64 config)
335c2f5d
ACM
336{
337 if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config])
338 return perf_evsel__sw_names[config];
339 return "unknown-software";
340}
341
342static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size)
343{
344 int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config));
345 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
346}
347
287e74aa
JO
348static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type)
349{
350 int r;
351
352 r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr);
353
354 if (type & HW_BREAKPOINT_R)
355 r += scnprintf(bf + r, size - r, "r");
356
357 if (type & HW_BREAKPOINT_W)
358 r += scnprintf(bf + r, size - r, "w");
359
360 if (type & HW_BREAKPOINT_X)
361 r += scnprintf(bf + r, size - r, "x");
362
363 return r;
364}
365
366static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size)
367{
368 struct perf_event_attr *attr = &evsel->attr;
369 int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type);
370 return r + perf_evsel__add_modifiers(evsel, bf + r, size - r);
371}
372
0b668bc9
ACM
373const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX]
374 [PERF_EVSEL__MAX_ALIASES] = {
375 { "L1-dcache", "l1-d", "l1d", "L1-data", },
376 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
377 { "LLC", "L2", },
378 { "dTLB", "d-tlb", "Data-TLB", },
379 { "iTLB", "i-tlb", "Instruction-TLB", },
380 { "branch", "branches", "bpu", "btb", "bpc", },
381 { "node", },
382};
383
384const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX]
385 [PERF_EVSEL__MAX_ALIASES] = {
386 { "load", "loads", "read", },
387 { "store", "stores", "write", },
388 { "prefetch", "prefetches", "speculative-read", "speculative-load", },
389};
390
391const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX]
392 [PERF_EVSEL__MAX_ALIASES] = {
393 { "refs", "Reference", "ops", "access", },
394 { "misses", "miss", },
395};
396
397#define C(x) PERF_COUNT_HW_CACHE_##x
398#define CACHE_READ (1 << C(OP_READ))
399#define CACHE_WRITE (1 << C(OP_WRITE))
400#define CACHE_PREFETCH (1 << C(OP_PREFETCH))
401#define COP(x) (1 << x)
402
403/*
404 * cache operartion stat
405 * L1I : Read and prefetch only
406 * ITLB and BPU : Read-only
407 */
408static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = {
409 [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
410 [C(L1I)] = (CACHE_READ | CACHE_PREFETCH),
411 [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
412 [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
413 [C(ITLB)] = (CACHE_READ),
414 [C(BPU)] = (CACHE_READ),
415 [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH),
416};
417
418bool perf_evsel__is_cache_op_valid(u8 type, u8 op)
419{
420 if (perf_evsel__hw_cache_stat[type] & COP(op))
421 return true; /* valid */
422 else
423 return false; /* invalid */
424}
425
426int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result,
427 char *bf, size_t size)
428{
429 if (result) {
430 return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0],
431 perf_evsel__hw_cache_op[op][0],
432 perf_evsel__hw_cache_result[result][0]);
433 }
434
435 return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0],
436 perf_evsel__hw_cache_op[op][1]);
437}
438
dd4f5223 439static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size)
0b668bc9
ACM
440{
441 u8 op, result, type = (config >> 0) & 0xff;
442 const char *err = "unknown-ext-hardware-cache-type";
443
444 if (type > PERF_COUNT_HW_CACHE_MAX)
445 goto out_err;
446
447 op = (config >> 8) & 0xff;
448 err = "unknown-ext-hardware-cache-op";
449 if (op > PERF_COUNT_HW_CACHE_OP_MAX)
450 goto out_err;
451
452 result = (config >> 16) & 0xff;
453 err = "unknown-ext-hardware-cache-result";
454 if (result > PERF_COUNT_HW_CACHE_RESULT_MAX)
455 goto out_err;
456
457 err = "invalid-cache";
458 if (!perf_evsel__is_cache_op_valid(type, op))
459 goto out_err;
460
461 return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size);
462out_err:
463 return scnprintf(bf, size, "%s", err);
464}
465
466static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size)
467{
468 int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size);
469 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
470}
471
6eef3d9c
ACM
472static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size)
473{
474 int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config);
475 return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret);
476}
477
7289f83c 478const char *perf_evsel__name(struct perf_evsel *evsel)
a4460836 479{
7289f83c 480 char bf[128];
a4460836 481
7289f83c
ACM
482 if (evsel->name)
483 return evsel->name;
c410431c
ACM
484
485 switch (evsel->attr.type) {
486 case PERF_TYPE_RAW:
6eef3d9c 487 perf_evsel__raw_name(evsel, bf, sizeof(bf));
c410431c
ACM
488 break;
489
490 case PERF_TYPE_HARDWARE:
7289f83c 491 perf_evsel__hw_name(evsel, bf, sizeof(bf));
c410431c 492 break;
0b668bc9
ACM
493
494 case PERF_TYPE_HW_CACHE:
7289f83c 495 perf_evsel__hw_cache_name(evsel, bf, sizeof(bf));
0b668bc9
ACM
496 break;
497
335c2f5d 498 case PERF_TYPE_SOFTWARE:
7289f83c 499 perf_evsel__sw_name(evsel, bf, sizeof(bf));
335c2f5d
ACM
500 break;
501
a4460836 502 case PERF_TYPE_TRACEPOINT:
7289f83c 503 scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint");
a4460836
ACM
504 break;
505
287e74aa
JO
506 case PERF_TYPE_BREAKPOINT:
507 perf_evsel__bp_name(evsel, bf, sizeof(bf));
508 break;
509
c410431c 510 default:
ca1b1457
RR
511 scnprintf(bf, sizeof(bf), "unknown attr type: %d",
512 evsel->attr.type);
a4460836 513 break;
c410431c
ACM
514 }
515
7289f83c
ACM
516 evsel->name = strdup(bf);
517
518 return evsel->name ?: "unknown";
c410431c
ACM
519}
520
717e263f
NK
521const char *perf_evsel__group_name(struct perf_evsel *evsel)
522{
523 return evsel->group_name ?: "anon group";
524}
525
526int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size)
527{
528 int ret;
529 struct perf_evsel *pos;
530 const char *group_name = perf_evsel__group_name(evsel);
531
532 ret = scnprintf(buf, size, "%s", group_name);
533
534 ret += scnprintf(buf + ret, size - ret, " { %s",
535 perf_evsel__name(evsel));
536
537 for_each_group_member(pos, evsel)
538 ret += scnprintf(buf + ret, size - ret, ", %s",
539 perf_evsel__name(pos));
540
541 ret += scnprintf(buf + ret, size - ret, " }");
542
543 return ret;
544}
545
6bedfab6 546static void
aad2b21c
KL
547perf_evsel__config_callgraph(struct perf_evsel *evsel,
548 struct record_opts *opts)
6bedfab6
JO
549{
550 bool function = perf_evsel__is_function_event(evsel);
551 struct perf_event_attr *attr = &evsel->attr;
552
553 perf_evsel__set_sample_bit(evsel, CALLCHAIN);
554
aad2b21c
KL
555 if (callchain_param.record_mode == CALLCHAIN_LBR) {
556 if (!opts->branch_stack) {
557 if (attr->exclude_user) {
558 pr_warning("LBR callstack option is only available "
559 "to get user callchain information. "
560 "Falling back to framepointers.\n");
561 } else {
562 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
563 attr->branch_sample_type = PERF_SAMPLE_BRANCH_USER |
564 PERF_SAMPLE_BRANCH_CALL_STACK;
565 }
566 } else
567 pr_warning("Cannot use LBR callstack with branch stack. "
568 "Falling back to framepointers.\n");
569 }
570
72a128aa 571 if (callchain_param.record_mode == CALLCHAIN_DWARF) {
6bedfab6
JO
572 if (!function) {
573 perf_evsel__set_sample_bit(evsel, REGS_USER);
574 perf_evsel__set_sample_bit(evsel, STACK_USER);
575 attr->sample_regs_user = PERF_REGS_MASK;
72a128aa 576 attr->sample_stack_user = callchain_param.dump_size;
6bedfab6
JO
577 attr->exclude_callchain_user = 1;
578 } else {
579 pr_info("Cannot use DWARF unwind for function trace event,"
580 " falling back to framepointers.\n");
581 }
582 }
583
584 if (function) {
585 pr_info("Disabling user space callchains for function trace event.\n");
586 attr->exclude_callchain_user = 1;
587 }
588}
589
930a2e29
JO
590static void apply_config_terms(struct perf_event_attr *attr __maybe_unused,
591 struct list_head *config_terms)
592{
593 struct perf_evsel_config_term *term;
594
595 list_for_each_entry(term, config_terms, list) {
596 switch (term->type) {
597 default:
598 break;
599 }
600 }
601}
602
774cb499
JO
603/*
604 * The enable_on_exec/disabled value strategy:
605 *
606 * 1) For any type of traced program:
607 * - all independent events and group leaders are disabled
608 * - all group members are enabled
609 *
610 * Group members are ruled by group leaders. They need to
611 * be enabled, because the group scheduling relies on that.
612 *
613 * 2) For traced programs executed by perf:
614 * - all independent events and group leaders have
615 * enable_on_exec set
616 * - we don't specifically enable or disable any event during
617 * the record command
618 *
619 * Independent events and group leaders are initially disabled
620 * and get enabled by exec. Group members are ruled by group
621 * leaders as stated in 1).
622 *
623 * 3) For traced programs attached by perf (pid/tid):
624 * - we specifically enable or disable all events during
625 * the record command
626 *
627 * When attaching events to already running traced we
628 * enable/disable events specifically, as there's no
629 * initial traced exec call.
630 */
b4006796 631void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts)
0f82ebc4 632{
3c176311 633 struct perf_evsel *leader = evsel->leader;
0f82ebc4 634 struct perf_event_attr *attr = &evsel->attr;
60b0896c 635 int track = evsel->tracking;
3aa5939d 636 bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread;
0f82ebc4 637
594ac61a 638 attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1;
0f82ebc4 639 attr->inherit = !opts->no_inherit;
0f82ebc4 640
7be5ebe8
ACM
641 perf_evsel__set_sample_bit(evsel, IP);
642 perf_evsel__set_sample_bit(evsel, TID);
0f82ebc4 643
3c176311
JO
644 if (evsel->sample_read) {
645 perf_evsel__set_sample_bit(evsel, READ);
646
647 /*
648 * We need ID even in case of single event, because
649 * PERF_SAMPLE_READ process ID specific data.
650 */
75562573 651 perf_evsel__set_sample_id(evsel, false);
3c176311
JO
652
653 /*
654 * Apply group format only if we belong to group
655 * with more than one members.
656 */
657 if (leader->nr_members > 1) {
658 attr->read_format |= PERF_FORMAT_GROUP;
659 attr->inherit = 0;
660 }
661 }
662
0f82ebc4 663 /*
17314e23 664 * We default some events to have a default interval. But keep
0f82ebc4
ACM
665 * it a weak assumption overridable by the user.
666 */
17314e23 667 if (!attr->sample_period || (opts->user_freq != UINT_MAX ||
0f82ebc4
ACM
668 opts->user_interval != ULLONG_MAX)) {
669 if (opts->freq) {
7be5ebe8 670 perf_evsel__set_sample_bit(evsel, PERIOD);
0f82ebc4
ACM
671 attr->freq = 1;
672 attr->sample_freq = opts->freq;
673 } else {
674 attr->sample_period = opts->default_interval;
675 }
676 }
677
3c176311
JO
678 /*
679 * Disable sampling for all group members other
680 * than leader in case leader 'leads' the sampling.
681 */
682 if ((leader != evsel) && leader->sample_read) {
683 attr->sample_freq = 0;
684 attr->sample_period = 0;
685 }
686
0f82ebc4
ACM
687 if (opts->no_samples)
688 attr->sample_freq = 0;
689
690 if (opts->inherit_stat)
691 attr->inherit_stat = 1;
692
693 if (opts->sample_address) {
7be5ebe8 694 perf_evsel__set_sample_bit(evsel, ADDR);
0f82ebc4
ACM
695 attr->mmap_data = track;
696 }
697
f140373b
JO
698 /*
699 * We don't allow user space callchains for function trace
700 * event, due to issues with page faults while tracing page
701 * fault handler and its overall trickiness nature.
702 */
703 if (perf_evsel__is_function_event(evsel))
704 evsel->attr.exclude_callchain_user = 1;
705
72a128aa 706 if (callchain_param.enabled && !evsel->no_aux_samples)
aad2b21c 707 perf_evsel__config_callgraph(evsel, opts);
26d33022 708
6a21c0b5
SE
709 if (opts->sample_intr_regs) {
710 attr->sample_regs_intr = PERF_REGS_MASK;
711 perf_evsel__set_sample_bit(evsel, REGS_INTR);
712 }
713
3aa5939d 714 if (target__has_cpu(&opts->target))
7be5ebe8 715 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4 716
3e76ac78 717 if (opts->period)
7be5ebe8 718 perf_evsel__set_sample_bit(evsel, PERIOD);
3e76ac78 719
8affc2b8
AK
720 /*
721 * When the user explicitely disabled time don't force it here.
722 */
723 if (opts->sample_time &&
724 (!perf_missing_features.sample_id_all &&
3abebc55
AH
725 (!opts->no_inherit || target__has_cpu(&opts->target) || per_cpu ||
726 opts->sample_time_set)))
7be5ebe8 727 perf_evsel__set_sample_bit(evsel, TIME);
0f82ebc4 728
6ff1ce76 729 if (opts->raw_samples && !evsel->no_aux_samples) {
7be5ebe8
ACM
730 perf_evsel__set_sample_bit(evsel, TIME);
731 perf_evsel__set_sample_bit(evsel, RAW);
732 perf_evsel__set_sample_bit(evsel, CPU);
0f82ebc4
ACM
733 }
734
ccf49bfc 735 if (opts->sample_address)
1e7ed5ec 736 perf_evsel__set_sample_bit(evsel, DATA_SRC);
ccf49bfc 737
509051ea 738 if (opts->no_buffering) {
0f82ebc4
ACM
739 attr->watermark = 0;
740 attr->wakeup_events = 1;
741 }
6ff1ce76 742 if (opts->branch_stack && !evsel->no_aux_samples) {
7be5ebe8 743 perf_evsel__set_sample_bit(evsel, BRANCH_STACK);
bdfebd84
RAV
744 attr->branch_sample_type = opts->branch_stack;
745 }
0f82ebc4 746
05484298 747 if (opts->sample_weight)
1e7ed5ec 748 perf_evsel__set_sample_bit(evsel, WEIGHT);
05484298 749
62e503b7 750 attr->task = track;
5c5e854b 751 attr->mmap = track;
a5a5ba72 752 attr->mmap2 = track && !perf_missing_features.mmap2;
5c5e854b 753 attr->comm = track;
0f82ebc4 754
b757bb09
AH
755 if (opts->record_switch_events)
756 attr->context_switch = track;
757
475eeab9 758 if (opts->sample_transaction)
1e7ed5ec 759 perf_evsel__set_sample_bit(evsel, TRANSACTION);
475eeab9 760
85c273d2
AK
761 if (opts->running_time) {
762 evsel->attr.read_format |=
763 PERF_FORMAT_TOTAL_TIME_ENABLED |
764 PERF_FORMAT_TOTAL_TIME_RUNNING;
765 }
766
774cb499
JO
767 /*
768 * XXX see the function comment above
769 *
770 * Disabling only independent events or group leaders,
771 * keeping group members enabled.
772 */
823254ed 773 if (perf_evsel__is_group_leader(evsel))
774cb499
JO
774 attr->disabled = 1;
775
776 /*
777 * Setting enable_on_exec for independent events and
778 * group leaders for traced executed by perf.
779 */
6619a53e
AK
780 if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) &&
781 !opts->initial_delay)
0f82ebc4 782 attr->enable_on_exec = 1;
2afd2bcf
AH
783
784 if (evsel->immediate) {
785 attr->disabled = 0;
786 attr->enable_on_exec = 0;
787 }
814c8c38
PZ
788
789 clockid = opts->clockid;
790 if (opts->use_clockid) {
791 attr->use_clockid = 1;
792 attr->clockid = opts->clockid;
793 }
930a2e29
JO
794
795 /*
796 * Apply event specific term settings,
797 * it overloads any global configuration.
798 */
799 apply_config_terms(attr, &evsel->config_terms);
0f82ebc4
ACM
800}
801
8885846f 802static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
69aad6f1 803{
4af4c955 804 int cpu, thread;
bf8e8f4b
AH
805
806 if (evsel->system_wide)
807 nthreads = 1;
808
69aad6f1 809 evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int));
4af4c955
DA
810
811 if (evsel->fd) {
812 for (cpu = 0; cpu < ncpus; cpu++) {
813 for (thread = 0; thread < nthreads; thread++) {
814 FD(evsel, cpu, thread) = -1;
815 }
816 }
817 }
818
69aad6f1
ACM
819 return evsel->fd != NULL ? 0 : -ENOMEM;
820}
821
e2407bef
AK
822static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads,
823 int ioc, void *arg)
745cefc5
ACM
824{
825 int cpu, thread;
826
bf8e8f4b
AH
827 if (evsel->system_wide)
828 nthreads = 1;
829
745cefc5
ACM
830 for (cpu = 0; cpu < ncpus; cpu++) {
831 for (thread = 0; thread < nthreads; thread++) {
832 int fd = FD(evsel, cpu, thread),
e2407bef 833 err = ioctl(fd, ioc, arg);
745cefc5
ACM
834
835 if (err)
836 return err;
837 }
838 }
839
840 return 0;
841}
842
f47805a2
ACM
843int perf_evsel__apply_filter(struct perf_evsel *evsel, int ncpus, int nthreads,
844 const char *filter)
e2407bef
AK
845{
846 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
847 PERF_EVENT_IOC_SET_FILTER,
848 (void *)filter);
849}
850
12467ae4
ACM
851int perf_evsel__set_filter(struct perf_evsel *evsel, const char *filter)
852{
853 char *new_filter = strdup(filter);
854
855 if (new_filter != NULL) {
856 free(evsel->filter);
857 evsel->filter = new_filter;
858 return 0;
859 }
860
861 return -1;
862}
863
64ec84f5
ACM
864int perf_evsel__append_filter(struct perf_evsel *evsel,
865 const char *op, const char *filter)
866{
867 char *new_filter;
868
869 if (evsel->filter == NULL)
870 return perf_evsel__set_filter(evsel, filter);
871
872 if (asprintf(&new_filter,"(%s) %s (%s)", evsel->filter, op, filter) > 0) {
873 free(evsel->filter);
874 evsel->filter = new_filter;
875 return 0;
876 }
877
878 return -1;
879}
880
e2407bef
AK
881int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads)
882{
883 return perf_evsel__run_ioctl(evsel, ncpus, nthreads,
884 PERF_EVENT_IOC_ENABLE,
885 0);
886}
887
70db7533
ACM
888int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads)
889{
8d9cbd8f
VG
890 if (ncpus == 0 || nthreads == 0)
891 return 0;
892
bf8e8f4b
AH
893 if (evsel->system_wide)
894 nthreads = 1;
895
a91e5431
ACM
896 evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id));
897 if (evsel->sample_id == NULL)
898 return -ENOMEM;
899
900 evsel->id = zalloc(ncpus * nthreads * sizeof(u64));
901 if (evsel->id == NULL) {
902 xyarray__delete(evsel->sample_id);
903 evsel->sample_id = NULL;
904 return -ENOMEM;
905 }
906
907 return 0;
70db7533
ACM
908}
909
8885846f 910static void perf_evsel__free_fd(struct perf_evsel *evsel)
69aad6f1
ACM
911{
912 xyarray__delete(evsel->fd);
913 evsel->fd = NULL;
914}
915
8885846f 916static void perf_evsel__free_id(struct perf_evsel *evsel)
70db7533 917{
a91e5431
ACM
918 xyarray__delete(evsel->sample_id);
919 evsel->sample_id = NULL;
04662523 920 zfree(&evsel->id);
70db7533
ACM
921}
922
930a2e29
JO
923static void perf_evsel__free_config_terms(struct perf_evsel *evsel)
924{
925 struct perf_evsel_config_term *term, *h;
926
927 list_for_each_entry_safe(term, h, &evsel->config_terms, list) {
928 list_del(&term->list);
929 free(term);
930 }
931}
932
c52b12ed
ACM
933void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
934{
935 int cpu, thread;
936
bf8e8f4b
AH
937 if (evsel->system_wide)
938 nthreads = 1;
939
c52b12ed
ACM
940 for (cpu = 0; cpu < ncpus; cpu++)
941 for (thread = 0; thread < nthreads; ++thread) {
942 close(FD(evsel, cpu, thread));
943 FD(evsel, cpu, thread) = -1;
944 }
945}
946
ef1d1af2 947void perf_evsel__exit(struct perf_evsel *evsel)
69aad6f1
ACM
948{
949 assert(list_empty(&evsel->node));
736b05a0
NK
950 perf_evsel__free_fd(evsel);
951 perf_evsel__free_id(evsel);
930a2e29 952 perf_evsel__free_config_terms(evsel);
597e48c1 953 close_cgroup(evsel->cgrp);
f30a79b0 954 cpu_map__put(evsel->cpus);
578e91ec 955 thread_map__put(evsel->threads);
597e48c1 956 zfree(&evsel->group_name);
597e48c1 957 zfree(&evsel->name);
ce8ccff5 958 perf_evsel__object.fini(evsel);
ef1d1af2
ACM
959}
960
961void perf_evsel__delete(struct perf_evsel *evsel)
962{
963 perf_evsel__exit(evsel);
69aad6f1
ACM
964 free(evsel);
965}
c52b12ed 966
a6fa0038 967void perf_evsel__compute_deltas(struct perf_evsel *evsel, int cpu, int thread,
857a94a2 968 struct perf_counts_values *count)
c7a79c47
SE
969{
970 struct perf_counts_values tmp;
971
972 if (!evsel->prev_raw_counts)
973 return;
974
975 if (cpu == -1) {
976 tmp = evsel->prev_raw_counts->aggr;
977 evsel->prev_raw_counts->aggr = *count;
978 } else {
a6fa0038
JO
979 tmp = *perf_counts(evsel->prev_raw_counts, cpu, thread);
980 *perf_counts(evsel->prev_raw_counts, cpu, thread) = *count;
c7a79c47
SE
981 }
982
983 count->val = count->val - tmp.val;
984 count->ena = count->ena - tmp.ena;
985 count->run = count->run - tmp.run;
986}
987
13112bbf
JO
988void perf_counts_values__scale(struct perf_counts_values *count,
989 bool scale, s8 *pscaled)
990{
991 s8 scaled = 0;
992
993 if (scale) {
994 if (count->run == 0) {
995 scaled = -1;
996 count->val = 0;
997 } else if (count->run < count->ena) {
998 scaled = 1;
999 count->val = (u64)((double) count->val * count->ena / count->run + 0.5);
1000 }
1001 } else
1002 count->ena = count->run = 0;
1003
1004 if (pscaled)
1005 *pscaled = scaled;
1006}
1007
f99f4719
JO
1008int perf_evsel__read(struct perf_evsel *evsel, int cpu, int thread,
1009 struct perf_counts_values *count)
1010{
1011 memset(count, 0, sizeof(*count));
1012
1013 if (FD(evsel, cpu, thread) < 0)
1014 return -EINVAL;
1015
1016 if (readn(FD(evsel, cpu, thread), count, sizeof(*count)) < 0)
1017 return -errno;
1018
1019 return 0;
1020}
1021
c52b12ed
ACM
1022int __perf_evsel__read_on_cpu(struct perf_evsel *evsel,
1023 int cpu, int thread, bool scale)
1024{
1025 struct perf_counts_values count;
1026 size_t nv = scale ? 3 : 1;
1027
1028 if (FD(evsel, cpu, thread) < 0)
1029 return -EINVAL;
1030
a6fa0038 1031 if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1, thread + 1) < 0)
4eed11d5
ACM
1032 return -ENOMEM;
1033
c52b12ed
ACM
1034 if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0)
1035 return -errno;
1036
a6fa0038 1037 perf_evsel__compute_deltas(evsel, cpu, thread, &count);
13112bbf 1038 perf_counts_values__scale(&count, scale, NULL);
a6fa0038 1039 *perf_counts(evsel->counts, cpu, thread) = count;
c52b12ed
ACM
1040 return 0;
1041}
1042
6a4bb04c
JO
1043static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread)
1044{
1045 struct perf_evsel *leader = evsel->leader;
1046 int fd;
1047
823254ed 1048 if (perf_evsel__is_group_leader(evsel))
6a4bb04c
JO
1049 return -1;
1050
1051 /*
1052 * Leader must be already processed/open,
1053 * if not it's a bug.
1054 */
1055 BUG_ON(!leader->fd);
1056
1057 fd = FD(leader, cpu, thread);
1058 BUG_ON(fd == -1);
1059
1060 return fd;
1061}
1062
2c5e8c52
PZ
1063struct bit_names {
1064 int bit;
1065 const char *name;
1066};
1067
1068static void __p_bits(char *buf, size_t size, u64 value, struct bit_names *bits)
1069{
1070 bool first_bit = true;
1071 int i = 0;
1072
1073 do {
1074 if (value & bits[i].bit) {
1075 buf += scnprintf(buf, size, "%s%s", first_bit ? "" : "|", bits[i].name);
1076 first_bit = false;
1077 }
1078 } while (bits[++i].name != NULL);
1079}
1080
1081static void __p_sample_type(char *buf, size_t size, u64 value)
1082{
1083#define bit_name(n) { PERF_SAMPLE_##n, #n }
1084 struct bit_names bits[] = {
1085 bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR),
1086 bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU),
1087 bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW),
1088 bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER),
1089 bit_name(IDENTIFIER), bit_name(REGS_INTR),
1090 { .name = NULL, }
1091 };
1092#undef bit_name
1093 __p_bits(buf, size, value, bits);
1094}
1095
1096static void __p_read_format(char *buf, size_t size, u64 value)
1097{
1098#define bit_name(n) { PERF_FORMAT_##n, #n }
1099 struct bit_names bits[] = {
1100 bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING),
1101 bit_name(ID), bit_name(GROUP),
1102 { .name = NULL, }
1103 };
1104#undef bit_name
1105 __p_bits(buf, size, value, bits);
1106}
1107
1108#define BUF_SIZE 1024
1109
7310aed7 1110#define p_hex(val) snprintf(buf, BUF_SIZE, "%#"PRIx64, (uint64_t)(val))
2c5e8c52
PZ
1111#define p_unsigned(val) snprintf(buf, BUF_SIZE, "%"PRIu64, (uint64_t)(val))
1112#define p_signed(val) snprintf(buf, BUF_SIZE, "%"PRId64, (int64_t)(val))
1113#define p_sample_type(val) __p_sample_type(buf, BUF_SIZE, val)
1114#define p_read_format(val) __p_read_format(buf, BUF_SIZE, val)
1115
1116#define PRINT_ATTRn(_n, _f, _p) \
1117do { \
1118 if (attr->_f) { \
1119 _p(attr->_f); \
1120 ret += attr__fprintf(fp, _n, buf, priv);\
1121 } \
1122} while (0)
1123
1124#define PRINT_ATTRf(_f, _p) PRINT_ATTRn(#_f, _f, _p)
1125
1126int perf_event_attr__fprintf(FILE *fp, struct perf_event_attr *attr,
1127 attr__fprintf_f attr__fprintf, void *priv)
1128{
1129 char buf[BUF_SIZE];
1130 int ret = 0;
1131
1132 PRINT_ATTRf(type, p_unsigned);
1133 PRINT_ATTRf(size, p_unsigned);
1134 PRINT_ATTRf(config, p_hex);
1135 PRINT_ATTRn("{ sample_period, sample_freq }", sample_period, p_unsigned);
1136 PRINT_ATTRf(sample_type, p_sample_type);
1137 PRINT_ATTRf(read_format, p_read_format);
1138
1139 PRINT_ATTRf(disabled, p_unsigned);
1140 PRINT_ATTRf(inherit, p_unsigned);
1141 PRINT_ATTRf(pinned, p_unsigned);
1142 PRINT_ATTRf(exclusive, p_unsigned);
1143 PRINT_ATTRf(exclude_user, p_unsigned);
1144 PRINT_ATTRf(exclude_kernel, p_unsigned);
1145 PRINT_ATTRf(exclude_hv, p_unsigned);
1146 PRINT_ATTRf(exclude_idle, p_unsigned);
1147 PRINT_ATTRf(mmap, p_unsigned);
1148 PRINT_ATTRf(comm, p_unsigned);
1149 PRINT_ATTRf(freq, p_unsigned);
1150 PRINT_ATTRf(inherit_stat, p_unsigned);
1151 PRINT_ATTRf(enable_on_exec, p_unsigned);
1152 PRINT_ATTRf(task, p_unsigned);
1153 PRINT_ATTRf(watermark, p_unsigned);
1154 PRINT_ATTRf(precise_ip, p_unsigned);
1155 PRINT_ATTRf(mmap_data, p_unsigned);
1156 PRINT_ATTRf(sample_id_all, p_unsigned);
1157 PRINT_ATTRf(exclude_host, p_unsigned);
1158 PRINT_ATTRf(exclude_guest, p_unsigned);
1159 PRINT_ATTRf(exclude_callchain_kernel, p_unsigned);
1160 PRINT_ATTRf(exclude_callchain_user, p_unsigned);
1161 PRINT_ATTRf(mmap2, p_unsigned);
1162 PRINT_ATTRf(comm_exec, p_unsigned);
1163 PRINT_ATTRf(use_clockid, p_unsigned);
0286039f 1164 PRINT_ATTRf(context_switch, p_unsigned);
2c5e8c52
PZ
1165
1166 PRINT_ATTRn("{ wakeup_events, wakeup_watermark }", wakeup_events, p_unsigned);
1167 PRINT_ATTRf(bp_type, p_unsigned);
1168 PRINT_ATTRn("{ bp_addr, config1 }", bp_addr, p_hex);
1169 PRINT_ATTRn("{ bp_len, config2 }", bp_len, p_hex);
1170 PRINT_ATTRf(sample_regs_user, p_hex);
1171 PRINT_ATTRf(sample_stack_user, p_unsigned);
1172 PRINT_ATTRf(clockid, p_signed);
1173 PRINT_ATTRf(sample_regs_intr, p_hex);
70d73de4 1174 PRINT_ATTRf(aux_watermark, p_unsigned);
e3e1a54f
AH
1175
1176 return ret;
1177}
1178
2c5e8c52
PZ
1179static int __open_attr__fprintf(FILE *fp, const char *name, const char *val,
1180 void *priv __attribute__((unused)))
1181{
1182 return fprintf(fp, " %-32s %s\n", name, val);
1183}
1184
0252208e 1185static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1186 struct thread_map *threads)
48290609 1187{
bf8e8f4b 1188 int cpu, thread, nthreads;
57480d2c 1189 unsigned long flags = PERF_FLAG_FD_CLOEXEC;
727ab04e 1190 int pid = -1, err;
bec19672 1191 enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE;
48290609 1192
bf8e8f4b
AH
1193 if (evsel->system_wide)
1194 nthreads = 1;
1195 else
1196 nthreads = threads->nr;
1197
0252208e 1198 if (evsel->fd == NULL &&
bf8e8f4b 1199 perf_evsel__alloc_fd(evsel, cpus->nr, nthreads) < 0)
727ab04e 1200 return -ENOMEM;
4eed11d5 1201
023695d9 1202 if (evsel->cgrp) {
57480d2c 1203 flags |= PERF_FLAG_PID_CGROUP;
023695d9
SE
1204 pid = evsel->cgrp->fd;
1205 }
1206
594ac61a 1207fallback_missing_features:
814c8c38
PZ
1208 if (perf_missing_features.clockid_wrong)
1209 evsel->attr.clockid = CLOCK_MONOTONIC; /* should always work */
1210 if (perf_missing_features.clockid) {
1211 evsel->attr.use_clockid = 0;
1212 evsel->attr.clockid = 0;
1213 }
57480d2c
YD
1214 if (perf_missing_features.cloexec)
1215 flags &= ~(unsigned long)PERF_FLAG_FD_CLOEXEC;
5c5e854b
SE
1216 if (perf_missing_features.mmap2)
1217 evsel->attr.mmap2 = 0;
594ac61a
ACM
1218 if (perf_missing_features.exclude_guest)
1219 evsel->attr.exclude_guest = evsel->attr.exclude_host = 0;
1220retry_sample_id:
1221 if (perf_missing_features.sample_id_all)
1222 evsel->attr.sample_id_all = 0;
1223
2c5e8c52
PZ
1224 if (verbose >= 2) {
1225 fprintf(stderr, "%.60s\n", graph_dotted_line);
1226 fprintf(stderr, "perf_event_attr:\n");
1227 perf_event_attr__fprintf(stderr, &evsel->attr, __open_attr__fprintf, NULL);
1228 fprintf(stderr, "%.60s\n", graph_dotted_line);
1229 }
e3e1a54f 1230
86bd5e86 1231 for (cpu = 0; cpu < cpus->nr; cpu++) {
9d04f178 1232
bf8e8f4b 1233 for (thread = 0; thread < nthreads; thread++) {
6a4bb04c 1234 int group_fd;
023695d9 1235
bf8e8f4b 1236 if (!evsel->cgrp && !evsel->system_wide)
e13798c7 1237 pid = thread_map__pid(threads, thread);
023695d9 1238
6a4bb04c 1239 group_fd = get_group_fd(evsel, cpu, thread);
bec19672 1240retry_open:
a33f6efc 1241 pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n",
e3e1a54f
AH
1242 pid, cpus->map[cpu], group_fd, flags);
1243
0252208e 1244 FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr,
023695d9 1245 pid,
f08199d3 1246 cpus->map[cpu],
023695d9 1247 group_fd, flags);
727ab04e
ACM
1248 if (FD(evsel, cpu, thread) < 0) {
1249 err = -errno;
a33f6efc 1250 pr_debug2("sys_perf_event_open failed, error %d\n",
f852fd62 1251 err);
594ac61a 1252 goto try_fallback;
727ab04e 1253 }
bec19672 1254 set_rlimit = NO_CHANGE;
814c8c38
PZ
1255
1256 /*
1257 * If we succeeded but had to kill clockid, fail and
1258 * have perf_evsel__open_strerror() print us a nice
1259 * error.
1260 */
1261 if (perf_missing_features.clockid ||
1262 perf_missing_features.clockid_wrong) {
1263 err = -EINVAL;
1264 goto out_close;
1265 }
0252208e 1266 }
48290609
ACM
1267 }
1268
1269 return 0;
1270
594ac61a 1271try_fallback:
bec19672
AK
1272 /*
1273 * perf stat needs between 5 and 22 fds per CPU. When we run out
1274 * of them try to increase the limits.
1275 */
1276 if (err == -EMFILE && set_rlimit < INCREASED_MAX) {
1277 struct rlimit l;
1278 int old_errno = errno;
1279
1280 if (getrlimit(RLIMIT_NOFILE, &l) == 0) {
1281 if (set_rlimit == NO_CHANGE)
1282 l.rlim_cur = l.rlim_max;
1283 else {
1284 l.rlim_cur = l.rlim_max + 1000;
1285 l.rlim_max = l.rlim_cur;
1286 }
1287 if (setrlimit(RLIMIT_NOFILE, &l) == 0) {
1288 set_rlimit++;
1289 errno = old_errno;
1290 goto retry_open;
1291 }
1292 }
1293 errno = old_errno;
1294 }
1295
594ac61a
ACM
1296 if (err != -EINVAL || cpu > 0 || thread > 0)
1297 goto out_close;
1298
814c8c38
PZ
1299 /*
1300 * Must probe features in the order they were added to the
1301 * perf_event_attr interface.
1302 */
1303 if (!perf_missing_features.clockid_wrong && evsel->attr.use_clockid) {
1304 perf_missing_features.clockid_wrong = true;
1305 goto fallback_missing_features;
1306 } else if (!perf_missing_features.clockid && evsel->attr.use_clockid) {
1307 perf_missing_features.clockid = true;
1308 goto fallback_missing_features;
1309 } else if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) {
57480d2c
YD
1310 perf_missing_features.cloexec = true;
1311 goto fallback_missing_features;
1312 } else if (!perf_missing_features.mmap2 && evsel->attr.mmap2) {
5c5e854b
SE
1313 perf_missing_features.mmap2 = true;
1314 goto fallback_missing_features;
1315 } else if (!perf_missing_features.exclude_guest &&
1316 (evsel->attr.exclude_guest || evsel->attr.exclude_host)) {
594ac61a
ACM
1317 perf_missing_features.exclude_guest = true;
1318 goto fallback_missing_features;
1319 } else if (!perf_missing_features.sample_id_all) {
1320 perf_missing_features.sample_id_all = true;
1321 goto retry_sample_id;
1322 }
1323
48290609 1324out_close:
0252208e
ACM
1325 do {
1326 while (--thread >= 0) {
1327 close(FD(evsel, cpu, thread));
1328 FD(evsel, cpu, thread) = -1;
1329 }
bf8e8f4b 1330 thread = nthreads;
0252208e 1331 } while (--cpu >= 0);
727ab04e
ACM
1332 return err;
1333}
1334
1335void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads)
1336{
1337 if (evsel->fd == NULL)
1338 return;
1339
1340 perf_evsel__close_fd(evsel, ncpus, nthreads);
1341 perf_evsel__free_fd(evsel);
48290609
ACM
1342}
1343
0252208e
ACM
1344static struct {
1345 struct cpu_map map;
1346 int cpus[1];
1347} empty_cpu_map = {
1348 .map.nr = 1,
1349 .cpus = { -1, },
1350};
1351
1352static struct {
1353 struct thread_map map;
1354 int threads[1];
1355} empty_thread_map = {
1356 .map.nr = 1,
1357 .threads = { -1, },
1358};
1359
f08199d3 1360int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus,
6a4bb04c 1361 struct thread_map *threads)
48290609 1362{
0252208e
ACM
1363 if (cpus == NULL) {
1364 /* Work around old compiler warnings about strict aliasing */
1365 cpus = &empty_cpu_map.map;
48290609
ACM
1366 }
1367
0252208e
ACM
1368 if (threads == NULL)
1369 threads = &empty_thread_map.map;
48290609 1370
6a4bb04c 1371 return __perf_evsel__open(evsel, cpus, threads);
48290609
ACM
1372}
1373
f08199d3 1374int perf_evsel__open_per_cpu(struct perf_evsel *evsel,
6a4bb04c 1375 struct cpu_map *cpus)
48290609 1376{
6a4bb04c 1377 return __perf_evsel__open(evsel, cpus, &empty_thread_map.map);
0252208e 1378}
48290609 1379
f08199d3 1380int perf_evsel__open_per_thread(struct perf_evsel *evsel,
6a4bb04c 1381 struct thread_map *threads)
0252208e 1382{
6a4bb04c 1383 return __perf_evsel__open(evsel, &empty_cpu_map.map, threads);
48290609 1384}
70082dd9 1385
0807d2d8
ACM
1386static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel,
1387 const union perf_event *event,
1388 struct perf_sample *sample)
d0dd74e8 1389{
0807d2d8 1390 u64 type = evsel->attr.sample_type;
d0dd74e8 1391 const u64 *array = event->sample.array;
0807d2d8 1392 bool swapped = evsel->needs_swap;
37073f9e 1393 union u64_swap u;
d0dd74e8
ACM
1394
1395 array += ((event->header.size -
1396 sizeof(event->header)) / sizeof(u64)) - 1;
1397
75562573
AH
1398 if (type & PERF_SAMPLE_IDENTIFIER) {
1399 sample->id = *array;
1400 array--;
1401 }
1402
d0dd74e8 1403 if (type & PERF_SAMPLE_CPU) {
37073f9e
JO
1404 u.val64 = *array;
1405 if (swapped) {
1406 /* undo swap of u64, then swap on individual u32s */
1407 u.val64 = bswap_64(u.val64);
1408 u.val32[0] = bswap_32(u.val32[0]);
1409 }
1410
1411 sample->cpu = u.val32[0];
d0dd74e8
ACM
1412 array--;
1413 }
1414
1415 if (type & PERF_SAMPLE_STREAM_ID) {
1416 sample->stream_id = *array;
1417 array--;
1418 }
1419
1420 if (type & PERF_SAMPLE_ID) {
1421 sample->id = *array;
1422 array--;
1423 }
1424
1425 if (type & PERF_SAMPLE_TIME) {
1426 sample->time = *array;
1427 array--;
1428 }
1429
1430 if (type & PERF_SAMPLE_TID) {
37073f9e
JO
1431 u.val64 = *array;
1432 if (swapped) {
1433 /* undo swap of u64, then swap on individual u32s */
1434 u.val64 = bswap_64(u.val64);
1435 u.val32[0] = bswap_32(u.val32[0]);
1436 u.val32[1] = bswap_32(u.val32[1]);
1437 }
1438
1439 sample->pid = u.val32[0];
1440 sample->tid = u.val32[1];
dd44bc6b 1441 array--;
d0dd74e8
ACM
1442 }
1443
1444 return 0;
1445}
1446
03b6ea9b
AH
1447static inline bool overflow(const void *endp, u16 max_size, const void *offset,
1448 u64 size)
98e1da90 1449{
03b6ea9b
AH
1450 return size > max_size || offset + size > endp;
1451}
98e1da90 1452
03b6ea9b
AH
1453#define OVERFLOW_CHECK(offset, size, max_size) \
1454 do { \
1455 if (overflow(endp, (max_size), (offset), (size))) \
1456 return -EFAULT; \
1457 } while (0)
98e1da90 1458
03b6ea9b
AH
1459#define OVERFLOW_CHECK_u64(offset) \
1460 OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64))
98e1da90 1461
a3f698fe 1462int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event,
0807d2d8 1463 struct perf_sample *data)
d0dd74e8 1464{
a3f698fe 1465 u64 type = evsel->attr.sample_type;
0807d2d8 1466 bool swapped = evsel->needs_swap;
d0dd74e8 1467 const u64 *array;
03b6ea9b
AH
1468 u16 max_size = event->header.size;
1469 const void *endp = (void *)event + max_size;
1470 u64 sz;
d0dd74e8 1471
936be503
DA
1472 /*
1473 * used for cross-endian analysis. See git commit 65014ab3
1474 * for why this goofiness is needed.
1475 */
6a11f92e 1476 union u64_swap u;
936be503 1477
f3bda2c9 1478 memset(data, 0, sizeof(*data));
d0dd74e8
ACM
1479 data->cpu = data->pid = data->tid = -1;
1480 data->stream_id = data->id = data->time = -1ULL;
bc529086 1481 data->period = evsel->attr.sample_period;
05484298 1482 data->weight = 0;
d0dd74e8
ACM
1483
1484 if (event->header.type != PERF_RECORD_SAMPLE) {
a3f698fe 1485 if (!evsel->attr.sample_id_all)
d0dd74e8 1486 return 0;
0807d2d8 1487 return perf_evsel__parse_id_sample(evsel, event, data);
d0dd74e8
ACM
1488 }
1489
1490 array = event->sample.array;
1491
03b6ea9b
AH
1492 /*
1493 * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes
1494 * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to
1495 * check the format does not go past the end of the event.
1496 */
a3f698fe 1497 if (evsel->sample_size + sizeof(event->header) > event->header.size)
a2854124
FW
1498 return -EFAULT;
1499
75562573
AH
1500 data->id = -1ULL;
1501 if (type & PERF_SAMPLE_IDENTIFIER) {
1502 data->id = *array;
1503 array++;
1504 }
1505
d0dd74e8 1506 if (type & PERF_SAMPLE_IP) {
ef89325f 1507 data->ip = *array;
d0dd74e8
ACM
1508 array++;
1509 }
1510
1511 if (type & PERF_SAMPLE_TID) {
936be503
DA
1512 u.val64 = *array;
1513 if (swapped) {
1514 /* undo swap of u64, then swap on individual u32s */
1515 u.val64 = bswap_64(u.val64);
1516 u.val32[0] = bswap_32(u.val32[0]);
1517 u.val32[1] = bswap_32(u.val32[1]);
1518 }
1519
1520 data->pid = u.val32[0];
1521 data->tid = u.val32[1];
d0dd74e8
ACM
1522 array++;
1523 }
1524
1525 if (type & PERF_SAMPLE_TIME) {
1526 data->time = *array;
1527 array++;
1528 }
1529
7cec0922 1530 data->addr = 0;
d0dd74e8
ACM
1531 if (type & PERF_SAMPLE_ADDR) {
1532 data->addr = *array;
1533 array++;
1534 }
1535
d0dd74e8
ACM
1536 if (type & PERF_SAMPLE_ID) {
1537 data->id = *array;
1538 array++;
1539 }
1540
1541 if (type & PERF_SAMPLE_STREAM_ID) {
1542 data->stream_id = *array;
1543 array++;
1544 }
1545
1546 if (type & PERF_SAMPLE_CPU) {
936be503
DA
1547
1548 u.val64 = *array;
1549 if (swapped) {
1550 /* undo swap of u64, then swap on individual u32s */
1551 u.val64 = bswap_64(u.val64);
1552 u.val32[0] = bswap_32(u.val32[0]);
1553 }
1554
1555 data->cpu = u.val32[0];
d0dd74e8
ACM
1556 array++;
1557 }
1558
1559 if (type & PERF_SAMPLE_PERIOD) {
1560 data->period = *array;
1561 array++;
1562 }
1563
1564 if (type & PERF_SAMPLE_READ) {
9ede473c
JO
1565 u64 read_format = evsel->attr.read_format;
1566
03b6ea9b 1567 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1568 if (read_format & PERF_FORMAT_GROUP)
1569 data->read.group.nr = *array;
1570 else
1571 data->read.one.value = *array;
1572
1573 array++;
1574
1575 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
03b6ea9b 1576 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1577 data->read.time_enabled = *array;
1578 array++;
1579 }
1580
1581 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
03b6ea9b 1582 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1583 data->read.time_running = *array;
1584 array++;
1585 }
1586
1587 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1588 if (read_format & PERF_FORMAT_GROUP) {
03b6ea9b
AH
1589 const u64 max_group_nr = UINT64_MAX /
1590 sizeof(struct sample_read_value);
1591
1592 if (data->read.group.nr > max_group_nr)
1593 return -EFAULT;
1594 sz = data->read.group.nr *
1595 sizeof(struct sample_read_value);
1596 OVERFLOW_CHECK(array, sz, max_size);
1597 data->read.group.values =
1598 (struct sample_read_value *)array;
1599 array = (void *)array + sz;
9ede473c 1600 } else {
03b6ea9b 1601 OVERFLOW_CHECK_u64(array);
9ede473c
JO
1602 data->read.one.id = *array;
1603 array++;
1604 }
d0dd74e8
ACM
1605 }
1606
1607 if (type & PERF_SAMPLE_CALLCHAIN) {
03b6ea9b 1608 const u64 max_callchain_nr = UINT64_MAX / sizeof(u64);
98e1da90 1609
03b6ea9b
AH
1610 OVERFLOW_CHECK_u64(array);
1611 data->callchain = (struct ip_callchain *)array++;
1612 if (data->callchain->nr > max_callchain_nr)
98e1da90 1613 return -EFAULT;
03b6ea9b
AH
1614 sz = data->callchain->nr * sizeof(u64);
1615 OVERFLOW_CHECK(array, sz, max_size);
1616 array = (void *)array + sz;
d0dd74e8
ACM
1617 }
1618
1619 if (type & PERF_SAMPLE_RAW) {
03b6ea9b 1620 OVERFLOW_CHECK_u64(array);
936be503
DA
1621 u.val64 = *array;
1622 if (WARN_ONCE(swapped,
1623 "Endianness of raw data not corrected!\n")) {
1624 /* undo swap of u64, then swap on individual u32s */
1625 u.val64 = bswap_64(u.val64);
1626 u.val32[0] = bswap_32(u.val32[0]);
1627 u.val32[1] = bswap_32(u.val32[1]);
1628 }
936be503 1629 data->raw_size = u.val32[0];
03b6ea9b 1630 array = (void *)array + sizeof(u32);
98e1da90 1631
03b6ea9b
AH
1632 OVERFLOW_CHECK(array, data->raw_size, max_size);
1633 data->raw_data = (void *)array;
1634 array = (void *)array + data->raw_size;
d0dd74e8
ACM
1635 }
1636
b5387528 1637 if (type & PERF_SAMPLE_BRANCH_STACK) {
03b6ea9b
AH
1638 const u64 max_branch_nr = UINT64_MAX /
1639 sizeof(struct branch_entry);
b5387528 1640
03b6ea9b
AH
1641 OVERFLOW_CHECK_u64(array);
1642 data->branch_stack = (struct branch_stack *)array++;
b5387528 1643
03b6ea9b
AH
1644 if (data->branch_stack->nr > max_branch_nr)
1645 return -EFAULT;
b5387528 1646 sz = data->branch_stack->nr * sizeof(struct branch_entry);
03b6ea9b
AH
1647 OVERFLOW_CHECK(array, sz, max_size);
1648 array = (void *)array + sz;
b5387528 1649 }
0f6a3015
JO
1650
1651 if (type & PERF_SAMPLE_REGS_USER) {
03b6ea9b 1652 OVERFLOW_CHECK_u64(array);
5b95a4a3
AH
1653 data->user_regs.abi = *array;
1654 array++;
0f6a3015 1655
5b95a4a3 1656 if (data->user_regs.abi) {
352ea45a 1657 u64 mask = evsel->attr.sample_regs_user;
03b6ea9b 1658
352ea45a 1659 sz = hweight_long(mask) * sizeof(u64);
03b6ea9b 1660 OVERFLOW_CHECK(array, sz, max_size);
352ea45a 1661 data->user_regs.mask = mask;
0f6a3015 1662 data->user_regs.regs = (u64 *)array;
03b6ea9b 1663 array = (void *)array + sz;
0f6a3015
JO
1664 }
1665 }
1666
1667 if (type & PERF_SAMPLE_STACK_USER) {
03b6ea9b
AH
1668 OVERFLOW_CHECK_u64(array);
1669 sz = *array++;
0f6a3015
JO
1670
1671 data->user_stack.offset = ((char *)(array - 1)
1672 - (char *) event);
1673
03b6ea9b 1674 if (!sz) {
0f6a3015
JO
1675 data->user_stack.size = 0;
1676 } else {
03b6ea9b 1677 OVERFLOW_CHECK(array, sz, max_size);
0f6a3015 1678 data->user_stack.data = (char *)array;
03b6ea9b
AH
1679 array = (void *)array + sz;
1680 OVERFLOW_CHECK_u64(array);
54bd2692 1681 data->user_stack.size = *array++;
a65cb4b9
JO
1682 if (WARN_ONCE(data->user_stack.size > sz,
1683 "user stack dump failure\n"))
1684 return -EFAULT;
0f6a3015
JO
1685 }
1686 }
1687
05484298
AK
1688 data->weight = 0;
1689 if (type & PERF_SAMPLE_WEIGHT) {
03b6ea9b 1690 OVERFLOW_CHECK_u64(array);
05484298
AK
1691 data->weight = *array;
1692 array++;
1693 }
1694
98a3b32c
SE
1695 data->data_src = PERF_MEM_DATA_SRC_NONE;
1696 if (type & PERF_SAMPLE_DATA_SRC) {
03b6ea9b 1697 OVERFLOW_CHECK_u64(array);
98a3b32c
SE
1698 data->data_src = *array;
1699 array++;
1700 }
1701
475eeab9
AK
1702 data->transaction = 0;
1703 if (type & PERF_SAMPLE_TRANSACTION) {
87b95524 1704 OVERFLOW_CHECK_u64(array);
475eeab9
AK
1705 data->transaction = *array;
1706 array++;
1707 }
1708
6a21c0b5
SE
1709 data->intr_regs.abi = PERF_SAMPLE_REGS_ABI_NONE;
1710 if (type & PERF_SAMPLE_REGS_INTR) {
1711 OVERFLOW_CHECK_u64(array);
1712 data->intr_regs.abi = *array;
1713 array++;
1714
1715 if (data->intr_regs.abi != PERF_SAMPLE_REGS_ABI_NONE) {
1716 u64 mask = evsel->attr.sample_regs_intr;
1717
1718 sz = hweight_long(mask) * sizeof(u64);
1719 OVERFLOW_CHECK(array, sz, max_size);
1720 data->intr_regs.mask = mask;
1721 data->intr_regs.regs = (u64 *)array;
1722 array = (void *)array + sz;
1723 }
1724 }
1725
d0dd74e8
ACM
1726 return 0;
1727}
74eec26f 1728
b1cf6f65 1729size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type,
352ea45a 1730 u64 read_format)
b1cf6f65
AH
1731{
1732 size_t sz, result = sizeof(struct sample_event);
1733
1734 if (type & PERF_SAMPLE_IDENTIFIER)
1735 result += sizeof(u64);
1736
1737 if (type & PERF_SAMPLE_IP)
1738 result += sizeof(u64);
1739
1740 if (type & PERF_SAMPLE_TID)
1741 result += sizeof(u64);
1742
1743 if (type & PERF_SAMPLE_TIME)
1744 result += sizeof(u64);
1745
1746 if (type & PERF_SAMPLE_ADDR)
1747 result += sizeof(u64);
1748
1749 if (type & PERF_SAMPLE_ID)
1750 result += sizeof(u64);
1751
1752 if (type & PERF_SAMPLE_STREAM_ID)
1753 result += sizeof(u64);
1754
1755 if (type & PERF_SAMPLE_CPU)
1756 result += sizeof(u64);
1757
1758 if (type & PERF_SAMPLE_PERIOD)
1759 result += sizeof(u64);
1760
1761 if (type & PERF_SAMPLE_READ) {
1762 result += sizeof(u64);
1763 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED)
1764 result += sizeof(u64);
1765 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING)
1766 result += sizeof(u64);
1767 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1768 if (read_format & PERF_FORMAT_GROUP) {
1769 sz = sample->read.group.nr *
1770 sizeof(struct sample_read_value);
1771 result += sz;
1772 } else {
1773 result += sizeof(u64);
1774 }
1775 }
1776
1777 if (type & PERF_SAMPLE_CALLCHAIN) {
1778 sz = (sample->callchain->nr + 1) * sizeof(u64);
1779 result += sz;
1780 }
1781
1782 if (type & PERF_SAMPLE_RAW) {
1783 result += sizeof(u32);
1784 result += sample->raw_size;
1785 }
1786
1787 if (type & PERF_SAMPLE_BRANCH_STACK) {
1788 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1789 sz += sizeof(u64);
1790 result += sz;
1791 }
1792
1793 if (type & PERF_SAMPLE_REGS_USER) {
1794 if (sample->user_regs.abi) {
1795 result += sizeof(u64);
352ea45a 1796 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
b1cf6f65
AH
1797 result += sz;
1798 } else {
1799 result += sizeof(u64);
1800 }
1801 }
1802
1803 if (type & PERF_SAMPLE_STACK_USER) {
1804 sz = sample->user_stack.size;
1805 result += sizeof(u64);
1806 if (sz) {
1807 result += sz;
1808 result += sizeof(u64);
1809 }
1810 }
1811
1812 if (type & PERF_SAMPLE_WEIGHT)
1813 result += sizeof(u64);
1814
1815 if (type & PERF_SAMPLE_DATA_SRC)
1816 result += sizeof(u64);
1817
42d88910
AH
1818 if (type & PERF_SAMPLE_TRANSACTION)
1819 result += sizeof(u64);
1820
6a21c0b5
SE
1821 if (type & PERF_SAMPLE_REGS_INTR) {
1822 if (sample->intr_regs.abi) {
1823 result += sizeof(u64);
1824 sz = hweight_long(sample->intr_regs.mask) * sizeof(u64);
1825 result += sz;
1826 } else {
1827 result += sizeof(u64);
1828 }
1829 }
1830
b1cf6f65
AH
1831 return result;
1832}
1833
74eec26f 1834int perf_event__synthesize_sample(union perf_event *event, u64 type,
352ea45a 1835 u64 read_format,
74eec26f
AV
1836 const struct perf_sample *sample,
1837 bool swapped)
1838{
1839 u64 *array;
d03f2170 1840 size_t sz;
74eec26f
AV
1841 /*
1842 * used for cross-endian analysis. See git commit 65014ab3
1843 * for why this goofiness is needed.
1844 */
6a11f92e 1845 union u64_swap u;
74eec26f
AV
1846
1847 array = event->sample.array;
1848
75562573
AH
1849 if (type & PERF_SAMPLE_IDENTIFIER) {
1850 *array = sample->id;
1851 array++;
1852 }
1853
74eec26f 1854 if (type & PERF_SAMPLE_IP) {
ef89325f 1855 *array = sample->ip;
74eec26f
AV
1856 array++;
1857 }
1858
1859 if (type & PERF_SAMPLE_TID) {
1860 u.val32[0] = sample->pid;
1861 u.val32[1] = sample->tid;
1862 if (swapped) {
1863 /*
a3f698fe 1864 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1865 */
1866 u.val32[0] = bswap_32(u.val32[0]);
1867 u.val32[1] = bswap_32(u.val32[1]);
1868 u.val64 = bswap_64(u.val64);
1869 }
1870
1871 *array = u.val64;
1872 array++;
1873 }
1874
1875 if (type & PERF_SAMPLE_TIME) {
1876 *array = sample->time;
1877 array++;
1878 }
1879
1880 if (type & PERF_SAMPLE_ADDR) {
1881 *array = sample->addr;
1882 array++;
1883 }
1884
1885 if (type & PERF_SAMPLE_ID) {
1886 *array = sample->id;
1887 array++;
1888 }
1889
1890 if (type & PERF_SAMPLE_STREAM_ID) {
1891 *array = sample->stream_id;
1892 array++;
1893 }
1894
1895 if (type & PERF_SAMPLE_CPU) {
1896 u.val32[0] = sample->cpu;
1897 if (swapped) {
1898 /*
a3f698fe 1899 * Inverse of what is done in perf_evsel__parse_sample
74eec26f
AV
1900 */
1901 u.val32[0] = bswap_32(u.val32[0]);
1902 u.val64 = bswap_64(u.val64);
1903 }
1904 *array = u.val64;
1905 array++;
1906 }
1907
1908 if (type & PERF_SAMPLE_PERIOD) {
1909 *array = sample->period;
1910 array++;
1911 }
1912
d03f2170
AH
1913 if (type & PERF_SAMPLE_READ) {
1914 if (read_format & PERF_FORMAT_GROUP)
1915 *array = sample->read.group.nr;
1916 else
1917 *array = sample->read.one.value;
1918 array++;
1919
1920 if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) {
1921 *array = sample->read.time_enabled;
1922 array++;
1923 }
1924
1925 if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) {
1926 *array = sample->read.time_running;
1927 array++;
1928 }
1929
1930 /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */
1931 if (read_format & PERF_FORMAT_GROUP) {
1932 sz = sample->read.group.nr *
1933 sizeof(struct sample_read_value);
1934 memcpy(array, sample->read.group.values, sz);
1935 array = (void *)array + sz;
1936 } else {
1937 *array = sample->read.one.id;
1938 array++;
1939 }
1940 }
1941
1942 if (type & PERF_SAMPLE_CALLCHAIN) {
1943 sz = (sample->callchain->nr + 1) * sizeof(u64);
1944 memcpy(array, sample->callchain, sz);
1945 array = (void *)array + sz;
1946 }
1947
1948 if (type & PERF_SAMPLE_RAW) {
1949 u.val32[0] = sample->raw_size;
1950 if (WARN_ONCE(swapped,
1951 "Endianness of raw data not corrected!\n")) {
1952 /*
1953 * Inverse of what is done in perf_evsel__parse_sample
1954 */
1955 u.val32[0] = bswap_32(u.val32[0]);
1956 u.val32[1] = bswap_32(u.val32[1]);
1957 u.val64 = bswap_64(u.val64);
1958 }
1959 *array = u.val64;
1960 array = (void *)array + sizeof(u32);
1961
1962 memcpy(array, sample->raw_data, sample->raw_size);
1963 array = (void *)array + sample->raw_size;
1964 }
1965
1966 if (type & PERF_SAMPLE_BRANCH_STACK) {
1967 sz = sample->branch_stack->nr * sizeof(struct branch_entry);
1968 sz += sizeof(u64);
1969 memcpy(array, sample->branch_stack, sz);
1970 array = (void *)array + sz;
1971 }
1972
1973 if (type & PERF_SAMPLE_REGS_USER) {
1974 if (sample->user_regs.abi) {
1975 *array++ = sample->user_regs.abi;
352ea45a 1976 sz = hweight_long(sample->user_regs.mask) * sizeof(u64);
d03f2170
AH
1977 memcpy(array, sample->user_regs.regs, sz);
1978 array = (void *)array + sz;
1979 } else {
1980 *array++ = 0;
1981 }
1982 }
1983
1984 if (type & PERF_SAMPLE_STACK_USER) {
1985 sz = sample->user_stack.size;
1986 *array++ = sz;
1987 if (sz) {
1988 memcpy(array, sample->user_stack.data, sz);
1989 array = (void *)array + sz;
1990 *array++ = sz;
1991 }
1992 }
1993
1994 if (type & PERF_SAMPLE_WEIGHT) {
1995 *array = sample->weight;
1996 array++;
1997 }
1998
1999 if (type & PERF_SAMPLE_DATA_SRC) {
2000 *array = sample->data_src;
2001 array++;
2002 }
2003
42d88910
AH
2004 if (type & PERF_SAMPLE_TRANSACTION) {
2005 *array = sample->transaction;
2006 array++;
2007 }
2008
6a21c0b5
SE
2009 if (type & PERF_SAMPLE_REGS_INTR) {
2010 if (sample->intr_regs.abi) {
2011 *array++ = sample->intr_regs.abi;
2012 sz = hweight_long(sample->intr_regs.mask) * sizeof(u64);
2013 memcpy(array, sample->intr_regs.regs, sz);
2014 array = (void *)array + sz;
2015 } else {
2016 *array++ = 0;
2017 }
2018 }
2019
74eec26f
AV
2020 return 0;
2021}
5555ded4 2022
efd2b924
ACM
2023struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
2024{
2025 return pevent_find_field(evsel->tp_format, name);
2026}
2027
5d2074ea 2028void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
5555ded4
ACM
2029 const char *name)
2030{
efd2b924 2031 struct format_field *field = perf_evsel__field(evsel, name);
5555ded4
ACM
2032 int offset;
2033
efd2b924
ACM
2034 if (!field)
2035 return NULL;
5555ded4
ACM
2036
2037 offset = field->offset;
2038
2039 if (field->flags & FIELD_IS_DYNAMIC) {
2040 offset = *(int *)(sample->raw_data + field->offset);
2041 offset &= 0xffff;
2042 }
2043
2044 return sample->raw_data + offset;
2045}
2046
2047u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample,
2048 const char *name)
2049{
efd2b924 2050 struct format_field *field = perf_evsel__field(evsel, name);
e6b6f679
ACM
2051 void *ptr;
2052 u64 value;
5555ded4 2053
efd2b924
ACM
2054 if (!field)
2055 return 0;
5555ded4 2056
e6b6f679 2057 ptr = sample->raw_data + field->offset;
5555ded4 2058
e6b6f679
ACM
2059 switch (field->size) {
2060 case 1:
2061 return *(u8 *)ptr;
2062 case 2:
2063 value = *(u16 *)ptr;
2064 break;
2065 case 4:
2066 value = *(u32 *)ptr;
2067 break;
2068 case 8:
e94eedab 2069 memcpy(&value, ptr, sizeof(u64));
e6b6f679
ACM
2070 break;
2071 default:
2072 return 0;
2073 }
2074
2075 if (!evsel->needs_swap)
2076 return value;
2077
2078 switch (field->size) {
2079 case 2:
2080 return bswap_16(value);
2081 case 4:
2082 return bswap_32(value);
2083 case 8:
2084 return bswap_64(value);
2085 default:
2086 return 0;
2087 }
2088
2089 return 0;
5555ded4 2090}
0698aedd
ACM
2091
2092static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...)
2093{
2094 va_list args;
2095 int ret = 0;
2096
2097 if (!*first) {
2098 ret += fprintf(fp, ",");
2099 } else {
2100 ret += fprintf(fp, ":");
2101 *first = false;
2102 }
2103
2104 va_start(args, fmt);
2105 ret += vfprintf(fp, fmt, args);
2106 va_end(args);
2107 return ret;
2108}
2109
2c5e8c52 2110static int __print_attr__fprintf(FILE *fp, const char *name, const char *val, void *priv)
c79a4393 2111{
2c5e8c52 2112 return comma_fprintf(fp, (bool *)priv, " %s: %s", name, val);
c79a4393
ACM
2113}
2114
0698aedd
ACM
2115int perf_evsel__fprintf(struct perf_evsel *evsel,
2116 struct perf_attr_details *details, FILE *fp)
2117{
2118 bool first = true;
e6ab07d0
NK
2119 int printed = 0;
2120
e35ef355 2121 if (details->event_group) {
e6ab07d0
NK
2122 struct perf_evsel *pos;
2123
2124 if (!perf_evsel__is_group_leader(evsel))
2125 return 0;
2126
2127 if (evsel->nr_members > 1)
2128 printed += fprintf(fp, "%s{", evsel->group_name ?: "");
2129
2130 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
2131 for_each_group_member(pos, evsel)
2132 printed += fprintf(fp, ",%s", perf_evsel__name(pos));
2133
2134 if (evsel->nr_members > 1)
2135 printed += fprintf(fp, "}");
2136 goto out;
2137 }
2138
2139 printed += fprintf(fp, "%s", perf_evsel__name(evsel));
0698aedd 2140
2c5e8c52
PZ
2141 if (details->verbose) {
2142 printed += perf_event_attr__fprintf(fp, &evsel->attr,
2143 __print_attr__fprintf, &first);
2144 } else if (details->freq) {
0698aedd
ACM
2145 printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64,
2146 (u64)evsel->attr.sample_freq);
2147 }
e6ab07d0 2148out:
0698aedd
ACM
2149 fputc('\n', fp);
2150 return ++printed;
2151}
c0a54341
ACM
2152
2153bool perf_evsel__fallback(struct perf_evsel *evsel, int err,
2154 char *msg, size_t msgsize)
2155{
2b821cce 2156 if ((err == ENOENT || err == ENXIO || err == ENODEV) &&
c0a54341
ACM
2157 evsel->attr.type == PERF_TYPE_HARDWARE &&
2158 evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) {
2159 /*
2160 * If it's cycles then fall back to hrtimer based
2161 * cpu-clock-tick sw counter, which is always available even if
2162 * no PMU support.
2163 *
2164 * PPC returns ENXIO until 2.6.37 (behavior changed with commit
2165 * b0a873e).
2166 */
2167 scnprintf(msg, msgsize, "%s",
2168"The cycles event is not supported, trying to fall back to cpu-clock-ticks");
2169
2170 evsel->attr.type = PERF_TYPE_SOFTWARE;
2171 evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK;
2172
04662523 2173 zfree(&evsel->name);
c0a54341
ACM
2174 return true;
2175 }
2176
2177 return false;
2178}
56e52e85 2179
602ad878 2180int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target,
56e52e85
ACM
2181 int err, char *msg, size_t size)
2182{
6e81c74c
MH
2183 char sbuf[STRERR_BUFSIZE];
2184
56e52e85
ACM
2185 switch (err) {
2186 case EPERM:
2187 case EACCES:
b69e63a4 2188 return scnprintf(msg, size,
56e52e85
ACM
2189 "You may not have permission to collect %sstats.\n"
2190 "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n"
2191 " -1 - Not paranoid at all\n"
2192 " 0 - Disallow raw tracepoint access for unpriv\n"
2193 " 1 - Disallow cpu events for unpriv\n"
2194 " 2 - Disallow kernel profiling for unpriv",
2195 target->system_wide ? "system-wide " : "");
2196 case ENOENT:
2197 return scnprintf(msg, size, "The %s event is not supported.",
2198 perf_evsel__name(evsel));
2199 case EMFILE:
2200 return scnprintf(msg, size, "%s",
2201 "Too many events are opened.\n"
18ffdfe8
JO
2202 "Probably the maximum number of open file descriptors has been reached.\n"
2203 "Hint: Try again after reducing the number of events.\n"
2204 "Hint: Try increasing the limit with 'ulimit -n <limit>'");
56e52e85
ACM
2205 case ENODEV:
2206 if (target->cpu_list)
2207 return scnprintf(msg, size, "%s",
2208 "No such device - did you specify an out-of-range profile CPU?\n");
2209 break;
2210 case EOPNOTSUPP:
2211 if (evsel->attr.precise_ip)
2212 return scnprintf(msg, size, "%s",
2213 "\'precise\' request may not be supported. Try removing 'p' modifier.");
2214#if defined(__i386__) || defined(__x86_64__)
2215 if (evsel->attr.type == PERF_TYPE_HARDWARE)
2216 return scnprintf(msg, size, "%s",
2217 "No hardware sampling interrupt available.\n"
2218 "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it.");
2219#endif
2220 break;
63914aca
JO
2221 case EBUSY:
2222 if (find_process("oprofiled"))
2223 return scnprintf(msg, size,
2224 "The PMU counters are busy/taken by another profiler.\n"
2225 "We found oprofile daemon running, please stop it and try again.");
2226 break;
814c8c38
PZ
2227 case EINVAL:
2228 if (perf_missing_features.clockid)
2229 return scnprintf(msg, size, "clockid feature not supported.");
2230 if (perf_missing_features.clockid_wrong)
2231 return scnprintf(msg, size, "wrong clockid (%d).", clockid);
2232 break;
56e52e85
ACM
2233 default:
2234 break;
2235 }
2236
2237 return scnprintf(msg, size,
6e81c74c 2238 "The sys_perf_event_open() syscall returned with %d (%s) for event (%s).\n"
56e52e85
ACM
2239 "/bin/dmesg may provide additional information.\n"
2240 "No CONFIG_PERF_EVENTS=y kernel support configured?\n",
6e81c74c
MH
2241 err, strerror_r(err, sbuf, sizeof(sbuf)),
2242 perf_evsel__name(evsel));
56e52e85 2243}