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7fe2f639 DB |
1 | /* |
2 | * (C) 2010,2011 Thomas Renninger <trenn@suse.de>, Novell Inc. | |
3 | * | |
4 | * Licensed under the terms of the GNU GPL License version 2. | |
5 | * | |
6 | * Miscellaneous helpers which do not fit or are worth | |
7 | * to put into separate headers | |
8 | */ | |
9 | ||
10 | #ifndef __CPUPOWERUTILS_HELPERS__ | |
11 | #define __CPUPOWERUTILS_HELPERS__ | |
12 | ||
13 | #include <libintl.h> | |
14 | #include <locale.h> | |
15 | ||
16 | #include "helpers/bitmask.h" | |
17 | ||
18 | /* Internationalization ****************************/ | |
47c33630 DB |
19 | #ifdef NLS |
20 | ||
7fe2f639 DB |
21 | #define _(String) gettext(String) |
22 | #ifndef gettext_noop | |
23 | #define gettext_noop(String) String | |
24 | #endif | |
2cd005ca | 25 | #define N_(String) gettext_noop(String) |
47c33630 DB |
26 | |
27 | #else /* !NLS */ | |
28 | ||
29 | #define _(String) String | |
30 | #define N_(String) String | |
31 | ||
32 | #endif | |
7fe2f639 DB |
33 | /* Internationalization ****************************/ |
34 | ||
35 | extern int run_as_root; | |
36 | extern struct bitmask *cpus_chosen; | |
37 | ||
38 | /* Global verbose (-d) stuff *********************************/ | |
39 | /* | |
40 | * define DEBUG via global Makefile variable | |
41 | * Debug output is sent to stderr, do: | |
42 | * cpupower monitor 2>/tmp/debug | |
43 | * to split debug output away from normal output | |
44 | */ | |
45 | #ifdef DEBUG | |
46 | extern int be_verbose; | |
47 | ||
48 | #define dprint(fmt, ...) { \ | |
49 | if (be_verbose) { \ | |
50 | fprintf(stderr, "%s: " fmt, \ | |
2cd005ca | 51 | __func__, ##__VA_ARGS__); \ |
7fe2f639 DB |
52 | } \ |
53 | } | |
54 | #else | |
2cd005ca | 55 | static inline void dprint(const char *fmt, ...) { } |
7fe2f639 DB |
56 | #endif |
57 | extern int be_verbose; | |
58 | /* Global verbose (-v) stuff *********************************/ | |
59 | ||
60 | /* cpuid and cpuinfo helpers **************************/ | |
61 | enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL, | |
62 | X86_VENDOR_AMD, X86_VENDOR_MAX}; | |
63 | ||
8fb2e440 TR |
64 | #define CPUPOWER_CAP_INV_TSC 0x00000001 |
65 | #define CPUPOWER_CAP_APERF 0x00000002 | |
66 | #define CPUPOWER_CAP_AMD_CBP 0x00000004 | |
67 | #define CPUPOWER_CAP_PERF_BIAS 0x00000008 | |
68 | #define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010 | |
69 | #define CPUPOWER_CAP_IS_SNB 0x00000011 | |
029e9f73 | 70 | #define CPUPOWER_CAP_INTEL_IDA 0x00000012 |
7fe2f639 DB |
71 | |
72 | #define MAX_HW_PSTATES 10 | |
73 | ||
74 | struct cpupower_cpu_info { | |
75 | enum cpupower_cpu_vendor vendor; | |
76 | unsigned int family; | |
77 | unsigned int model; | |
78 | unsigned int stepping; | |
79 | /* CPU capabilities read out from cpuid */ | |
80 | unsigned long long caps; | |
81 | }; | |
82 | ||
83 | /* get_cpu_info | |
84 | * | |
85 | * Extract CPU vendor, family, model, stepping info from /proc/cpuinfo | |
86 | * | |
87 | * Returns 0 on success or a negativ error code | |
88 | * Only used on x86, below global's struct values are zero/unknown on | |
89 | * other archs | |
90 | */ | |
91 | extern int get_cpu_info(unsigned int cpu, struct cpupower_cpu_info *cpu_info); | |
92 | extern struct cpupower_cpu_info cpupower_cpu_info; | |
93 | /* cpuid and cpuinfo helpers **************************/ | |
94 | ||
95 | ||
96 | /* CPU topology/hierarchy parsing ******************/ | |
97 | struct cpupower_topology { | |
98 | /* Amount of CPU cores, packages and threads per core in the system */ | |
99 | unsigned int cores; | |
100 | unsigned int pkgs; | |
101 | unsigned int threads; /* per core */ | |
102 | ||
103 | /* Array gets mallocated with cores entries, holding per core info */ | |
104 | struct { | |
105 | int pkg; | |
106 | int core; | |
107 | int cpu; | |
7c74d2bc TR |
108 | |
109 | /* flags */ | |
110 | unsigned int is_online:1; | |
7fe2f639 DB |
111 | } *core_info; |
112 | }; | |
113 | ||
114 | extern int get_cpu_topology(struct cpupower_topology *cpu_top); | |
115 | extern void cpu_topology_release(struct cpupower_topology cpu_top); | |
116 | /* CPU topology/hierarchy parsing ******************/ | |
117 | ||
118 | /* X86 ONLY ****************************************/ | |
119 | #if defined(__i386__) || defined(__x86_64__) | |
120 | ||
121 | #include <pci/pci.h> | |
122 | ||
123 | /* Read/Write msr ****************************/ | |
124 | extern int read_msr(int cpu, unsigned int idx, unsigned long long *val); | |
125 | extern int write_msr(int cpu, unsigned int idx, unsigned long long val); | |
126 | ||
127 | extern int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val); | |
128 | extern int msr_intel_get_perf_bias(unsigned int cpu); | |
8fb2e440 | 129 | extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu); |
7fe2f639 | 130 | |
7fe2f639 DB |
131 | /* Read/Write msr ****************************/ |
132 | ||
133 | /* PCI stuff ****************************/ | |
134 | extern int amd_pci_get_num_boost_states(int *active, int *states); | |
135 | extern struct pci_dev *pci_acc_init(struct pci_access **pacc, int vendor_id, | |
136 | int *dev_ids); | |
137 | ||
138 | /* PCI stuff ****************************/ | |
139 | ||
140 | /* AMD HW pstate decoding **************************/ | |
141 | ||
142 | extern int decode_pstates(unsigned int cpu, unsigned int cpu_family, | |
143 | int boost_states, unsigned long *pstates, int *no); | |
144 | ||
145 | /* AMD HW pstate decoding **************************/ | |
146 | ||
147 | extern int cpufreq_has_boost_support(unsigned int cpu, int *support, | |
148 | int *active, int * states); | |
149 | /* | |
150 | * CPUID functions returning a single datum | |
151 | */ | |
152 | unsigned int cpuid_eax(unsigned int op); | |
153 | unsigned int cpuid_ebx(unsigned int op); | |
154 | unsigned int cpuid_ecx(unsigned int op); | |
155 | unsigned int cpuid_edx(unsigned int op); | |
156 | ||
157 | /* cpuid and cpuinfo helpers **************************/ | |
158 | /* X86 ONLY ********************************************/ | |
159 | #else | |
160 | static inline int decode_pstates(unsigned int cpu, unsigned int cpu_family, | |
161 | int boost_states, unsigned long *pstates, | |
162 | int *no) | |
163 | { return -1; }; | |
164 | ||
165 | static inline int read_msr(int cpu, unsigned int idx, unsigned long long *val) | |
166 | { return -1; }; | |
167 | static inline int write_msr(int cpu, unsigned int idx, unsigned long long val) | |
168 | { return -1; }; | |
169 | static inline int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val) | |
170 | { return -1; }; | |
171 | static inline int msr_intel_get_perf_bias(unsigned int cpu) | |
172 | { return -1; }; | |
8fb2e440 TR |
173 | static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu) |
174 | { return 0; }; | |
7fe2f639 | 175 | |
7fe2f639 DB |
176 | /* Read/Write msr ****************************/ |
177 | ||
178 | static inline int cpufreq_has_boost_support(unsigned int cpu, int *support, | |
179 | int *active, int * states) | |
180 | { return -1; } | |
181 | ||
182 | /* cpuid and cpuinfo helpers **************************/ | |
183 | ||
184 | static inline unsigned int cpuid_eax(unsigned int op) { return 0; }; | |
185 | static inline unsigned int cpuid_ebx(unsigned int op) { return 0; }; | |
186 | static inline unsigned int cpuid_ecx(unsigned int op) { return 0; }; | |
187 | static inline unsigned int cpuid_edx(unsigned int op) { return 0; }; | |
188 | #endif /* defined(__i386__) || defined(__x86_64__) */ | |
189 | ||
190 | #endif /* __CPUPOWERUTILS_HELPERS__ */ |