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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
7fe2f639 DB |
2 | #if defined(__i386__) || defined(__x86_64__) |
3 | ||
4 | #include "helpers/helpers.h" | |
5 | ||
902bef73 SH |
6 | #define MSR_AMD_HWCR 0xc0010015 |
7 | ||
2cd005ca DB |
8 | int cpufreq_has_boost_support(unsigned int cpu, int *support, int *active, |
9 | int *states) | |
7fe2f639 DB |
10 | { |
11 | struct cpupower_cpu_info cpu_info; | |
12 | int ret; | |
902bef73 | 13 | unsigned long long val; |
7fe2f639 DB |
14 | |
15 | *support = *active = *states = 0; | |
16 | ||
d0e4a193 | 17 | ret = get_cpu_info(&cpu_info); |
7fe2f639 DB |
18 | if (ret) |
19 | return ret; | |
20 | ||
21 | if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_CBP) { | |
22 | *support = 1; | |
902bef73 SH |
23 | |
24 | /* AMD Family 0x17 does not utilize PCI D18F4 like prior | |
25 | * families and has no fixed discrete boost states but | |
26 | * has Hardware determined variable increments instead. | |
27 | */ | |
28 | ||
29 | if (cpu_info.family == 0x17) { | |
30 | if (!read_msr(cpu, MSR_AMD_HWCR, &val)) { | |
31 | if (!(val & CPUPOWER_AMD_CPBDIS)) | |
32 | *active = 1; | |
33 | } | |
34 | } else { | |
35 | ret = amd_pci_get_num_boost_states(active, states); | |
36 | if (ret) | |
37 | return ret; | |
38 | } | |
029e9f73 TR |
39 | } else if (cpupower_cpu_info.caps & CPUPOWER_CAP_INTEL_IDA) |
40 | *support = *active = 1; | |
7fe2f639 DB |
41 | return 0; |
42 | } | |
43 | #endif /* #if defined(__i386__) || defined(__x86_64__) */ |