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tools/power turbostat: correct DRAM RAPL units on recent Xeon processors
[mirror_ubuntu-artful-kernel.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
d8af6f5f 36#include <getopt.h>
103a8fea
LB		 37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
88c3281f 40#include <sched.h>
2b92865e 41#include <cpuid.h>
98481e79
LB		 42#include <linux/capability.h>
43#include <errno.h>
103a8fea 44
103a8fea 45char *proc_stat = "/proc/stat";
d8af6f5f
LB		 46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
103a8fea
LB		 51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
ee7e38e3
LB		 55unsigned int do_pc2;
56unsigned int do_pc3;
57unsigned int do_pc6;
58unsigned int do_pc7;
ca58710f 59unsigned int do_c8_c9_c10;
0b2bb692 60unsigned int do_skl_residency;
144b44b1
LB		 61unsigned int do_slm_cstates;
62unsigned int use_c1_residency_msr;
103a8fea 63unsigned int has_aperf;
889facbe 64unsigned int has_epb;
fc04cc67 65unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 66unsigned int genuine_intel;
67unsigned int has_invariant_tsc;
d7899447 68unsigned int do_nhm_platform_info;
2f32edf1
LB		 69unsigned int extra_msr_offset32;
70unsigned int extra_msr_offset64;
8e180f3c
LB		 71unsigned int extra_delta_offset32;
72unsigned int extra_delta_offset64;
1ed51011 73int do_smi;
103a8fea
LB		 74double bclk;
75unsigned int show_pkg;
76unsigned int show_core;
77unsigned int show_cpu;
c98d5d94
LB		 78unsigned int show_pkg_only;
79unsigned int show_core_only;
80char *output_buffer, *outp;
889facbe
LB		 81unsigned int do_rapl;
82unsigned int do_dts;
83unsigned int do_ptm;
84unsigned int tcc_activation_temp;
85unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 86double rapl_power_units, rapl_time_units;
87double rapl_dram_energy_units, rapl_energy_units;
889facbe 88double rapl_joule_counter_range;
3a9a941d
LB		 89unsigned int do_core_perf_limit_reasons;
90unsigned int do_gfx_perf_limit_reasons;
91unsigned int do_ring_perf_limit_reasons;
889facbe 92
e6f9bb3c
LB		 93#define RAPL_PKG (1 << 0)
94 /* 0x610 MSR_PKG_POWER_LIMIT */
95 /* 0x611 MSR_PKG_ENERGY_STATUS */
96#define RAPL_PKG_PERF_STATUS (1 << 1)
97 /* 0x613 MSR_PKG_PERF_STATUS */
98#define RAPL_PKG_POWER_INFO (1 << 2)
99 /* 0x614 MSR_PKG_POWER_INFO */
100
101#define RAPL_DRAM (1 << 3)
102 /* 0x618 MSR_DRAM_POWER_LIMIT */
103 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 104#define RAPL_DRAM_PERF_STATUS (1 << 4)
105 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 106#define RAPL_DRAM_POWER_INFO (1 << 5)
107 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 108
0b2bb692 109#define RAPL_CORES (1 << 6)
e6f9bb3c
LB		 110 /* 0x638 MSR_PP0_POWER_LIMIT */
111 /* 0x639 MSR_PP0_ENERGY_STATUS */
0b2bb692 112#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 113 /* 0x63a MSR_PP0_POLICY */
114
0b2bb692 115#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 116 /* 0x640 MSR_PP1_POWER_LIMIT */
117 /* 0x641 MSR_PP1_ENERGY_STATUS */
118 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 119#define TJMAX_DEFAULT 100
120
121#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 122
123int aperf_mperf_unstable;
124int backwards_count;
125char *progname;
103a8fea 126
c98d5d94
LB		 127cpu_set_t *cpu_present_set, *cpu_affinity_set;
128size_t cpu_present_setsize, cpu_affinity_setsize;
129
130struct thread_data {
131 unsigned long long tsc;
132 unsigned long long aperf;
133 unsigned long long mperf;
144b44b1 134 unsigned long long c1;
2f32edf1 135 unsigned long long extra_msr64;
8e180f3c
LB		 136 unsigned long long extra_delta64;
137 unsigned long long extra_msr32;
138 unsigned long long extra_delta32;
1ed51011 139 unsigned int smi_count;
c98d5d94
LB		 140 unsigned int cpu_id;
141 unsigned int flags;
142#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
143#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
144} *thread_even, *thread_odd;
145
146struct core_data {
147 unsigned long long c3;
148 unsigned long long c6;
149 unsigned long long c7;
889facbe 150 unsigned int core_temp_c;
c98d5d94
LB		 151 unsigned int core_id;
152} *core_even, *core_odd;
153
154struct pkg_data {
155 unsigned long long pc2;
156 unsigned long long pc3;
157 unsigned long long pc6;
158 unsigned long long pc7;
ca58710f
KCA		 159 unsigned long long pc8;
160 unsigned long long pc9;
161 unsigned long long pc10;
0b2bb692
LB		 162 unsigned long long pkg_wtd_core_c0;
163 unsigned long long pkg_any_core_c0;
164 unsigned long long pkg_any_gfxe_c0;
165 unsigned long long pkg_both_core_gfxe_c0;
c98d5d94 166 unsigned int package_id;
889facbe
LB		 167 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
168 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
169 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
170 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
171 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
172 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
173 unsigned int pkg_temp_c;
174
c98d5d94
LB		 175} *package_even, *package_odd;
176
177#define ODD_COUNTERS thread_odd, core_odd, package_odd
178#define EVEN_COUNTERS thread_even, core_even, package_even
179
180#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
181 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
182 topo.num_threads_per_core + \
183 (core_no) * topo.num_threads_per_core + (thread_no))
184#define GET_CORE(core_base, core_no, pkg_no) \
185 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
186#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
187
188struct system_summary {
189 struct thread_data threads;
190 struct core_data cores;
191 struct pkg_data packages;
192} sum, average;
193
194
195struct topo_params {
196 int num_packages;
197 int num_cpus;
198 int num_cores;
199 int max_cpu_num;
200 int num_cores_per_pkg;
201 int num_threads_per_core;
202} topo;
203
204struct timeval tv_even, tv_odd, tv_delta;
205
206void setup_all_buffers(void);
207
208int cpu_is_not_present(int cpu)
d15cf7c1 209{
c98d5d94 210 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 211}
88c3281f 212/*
c98d5d94
LB		 213 * run func(thread, core, package) in topology order
214 * skip non-present cpus
88c3281f 215 */
c98d5d94
LB		 216
217int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
218 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 219{
c98d5d94 220 int retval, pkg_no, core_no, thread_no;
d15cf7c1 221
c98d5d94
LB		 222 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
223 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
224 for (thread_no = 0; thread_no <
225 topo.num_threads_per_core; ++thread_no) {
226 struct thread_data *t;
227 struct core_data *c;
228 struct pkg_data *p;
88c3281f 229
c98d5d94
LB		 230 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
231
232 if (cpu_is_not_present(t->cpu_id))
233 continue;
234
235 c = GET_CORE(core_base, core_no, pkg_no);
236 p = GET_PKG(pkg_base, pkg_no);
237
238 retval = func(t, c, p);
239 if (retval)
240 return retval;
241 }
242 }
243 }
244 return 0;
88c3281f
LB		 245}
246
247int cpu_migrate(int cpu)
248{
c98d5d94
LB		 249 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
250 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
251 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 252 return -1;
253 else
254 return 0;
255}
256
15aaa346 257int get_msr(int cpu, off_t offset, unsigned long long *msr)
103a8fea
LB		 258{
259 ssize_t retval;
103a8fea
LB		 260 char pathname[32];
261 int fd;
262
263 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
264 fd = open(pathname, O_RDONLY);
15aaa346 265 if (fd < 0)
98481e79 266 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 267
15aaa346 268 retval = pread(fd, msr, sizeof *msr, offset);
103a8fea 269 close(fd);
15aaa346 270
98481e79
LB		 271 if (retval != sizeof *msr)
272 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
15aaa346
LB		 273
274 return 0;
103a8fea
LB		 275}
276
fc04cc67
LB		 277/*
278 * Example Format w/ field column widths:
279 *
e7c95ff3
LB		 280 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
281 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 282 */
283
a829eb4d 284void print_header(void)
103a8fea
LB		 285{
286 if (show_pkg)
e7c95ff3 287 outp += sprintf(outp, " Package");
103a8fea 288 if (show_core)
e7c95ff3 289 outp += sprintf(outp, " Core");
103a8fea 290 if (show_cpu)
e7c95ff3 291 outp += sprintf(outp, " CPU");
fc04cc67 292 if (has_aperf)
e7c95ff3 293 outp += sprintf(outp, " Avg_MHz");
d7899447 294 if (has_aperf)
e7c95ff3 295 outp += sprintf(outp, " %%Busy");
103a8fea 296 if (has_aperf)
e7c95ff3
LB		 297 outp += sprintf(outp, " Bzy_MHz");
298 outp += sprintf(outp, " TSC_MHz");
1cc21f7b 299
8e180f3c 300 if (extra_delta_offset32)
e7c95ff3 301 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 302 if (extra_delta_offset64)
e7c95ff3 303 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 304 if (extra_msr_offset32)
e7c95ff3 305 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 306 if (extra_msr_offset64)
e7c95ff3 307 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
1cc21f7b
LB		 308
309 if (!debug)
310 goto done;
311
312 if (do_smi)
313 outp += sprintf(outp, " SMI");
314
103a8fea 315 if (do_nhm_cstates)
e7c95ff3 316 outp += sprintf(outp, " CPU%%c1");
144b44b1 317 if (do_nhm_cstates && !do_slm_cstates)
e7c95ff3 318 outp += sprintf(outp, " CPU%%c3");
103a8fea 319 if (do_nhm_cstates)
e7c95ff3 320 outp += sprintf(outp, " CPU%%c6");
103a8fea 321 if (do_snb_cstates)
e7c95ff3 322 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 323
324 if (do_dts)
e7c95ff3 325 outp += sprintf(outp, " CoreTmp");
889facbe 326 if (do_ptm)
e7c95ff3 327 outp += sprintf(outp, " PkgTmp");
889facbe 328
0b2bb692
LB		 329 if (do_skl_residency) {
330 outp += sprintf(outp, " Totl%%C0");
331 outp += sprintf(outp, " Any%%C0");
332 outp += sprintf(outp, " GFX%%C0");
333 outp += sprintf(outp, " CPUGFX%%");
334 }
335
ee7e38e3 336 if (do_pc2)
e7c95ff3 337 outp += sprintf(outp, " Pkg%%pc2");
ee7e38e3 338 if (do_pc3)
e7c95ff3 339 outp += sprintf(outp, " Pkg%%pc3");
ee7e38e3 340 if (do_pc6)
e7c95ff3 341 outp += sprintf(outp, " Pkg%%pc6");
ee7e38e3 342 if (do_pc7)
e7c95ff3 343 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 344 if (do_c8_c9_c10) {
e7c95ff3
LB		 345 outp += sprintf(outp, " Pkg%%pc8");
346 outp += sprintf(outp, " Pkg%%pc9");
347 outp += sprintf(outp, " Pk%%pc10");
ca58710f 348 }
103a8fea 349
5c56be9a
DB		 350 if (do_rapl && !rapl_joules) {
351 if (do_rapl & RAPL_PKG)
e7c95ff3 352 outp += sprintf(outp, " PkgWatt");
5c56be9a 353 if (do_rapl & RAPL_CORES)
e7c95ff3 354 outp += sprintf(outp, " CorWatt");
5c56be9a 355 if (do_rapl & RAPL_GFX)
e7c95ff3 356 outp += sprintf(outp, " GFXWatt");
5c56be9a 357 if (do_rapl & RAPL_DRAM)
e7c95ff3 358 outp += sprintf(outp, " RAMWatt");
5c56be9a 359 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 360 outp += sprintf(outp, " PKG_%%");
5c56be9a 361 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 362 outp += sprintf(outp, " RAM_%%");
d7899447 363 } else if (do_rapl && rapl_joules) {
5c56be9a 364 if (do_rapl & RAPL_PKG)
e7c95ff3 365 outp += sprintf(outp, " Pkg_J");
5c56be9a 366 if (do_rapl & RAPL_CORES)
e7c95ff3 367 outp += sprintf(outp, " Cor_J");
5c56be9a 368 if (do_rapl & RAPL_GFX)
e7c95ff3 369 outp += sprintf(outp, " GFX_J");
5c56be9a 370 if (do_rapl & RAPL_DRAM)
e7c95ff3 371 outp += sprintf(outp, " RAM_W");
5c56be9a 372 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 373 outp += sprintf(outp, " PKG_%%");
5c56be9a 374 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 375 outp += sprintf(outp, " RAM_%%");
376 outp += sprintf(outp, " time");
889facbe 377
5c56be9a 378 }
1cc21f7b 379 done:
c98d5d94 380 outp += sprintf(outp, "\n");
103a8fea
LB		 381}
382
c98d5d94
LB		 383int dump_counters(struct thread_data *t, struct core_data *c,
384 struct pkg_data *p)
103a8fea 385{
3b4d5c7f 386 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 387
388 if (t) {
3b4d5c7f
AS		 389 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
390 t->cpu_id, t->flags);
391 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
392 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
393 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
394 outp += sprintf(outp, "c1: %016llX\n", t->c1);
395 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 396 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 397 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 398 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 399 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 400 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 401 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 402 extra_msr_offset64, t->extra_msr64);
1ed51011 403 if (do_smi)
3b4d5c7f 404 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 405 }
103a8fea 406
c98d5d94 407 if (c) {
3b4d5c7f
AS		 408 outp += sprintf(outp, "core: %d\n", c->core_id);
409 outp += sprintf(outp, "c3: %016llX\n", c->c3);
410 outp += sprintf(outp, "c6: %016llX\n", c->c6);
411 outp += sprintf(outp, "c7: %016llX\n", c->c7);
412 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 413 }
103a8fea 414
c98d5d94 415 if (p) {
3b4d5c7f 416 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 417
418 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
419 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
420 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
421 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
422
3b4d5c7f 423 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
ee7e38e3
LB		 424 if (do_pc3)
425 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
426 if (do_pc6)
427 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
428 if (do_pc7)
429 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 430 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
431 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
432 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
433 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
434 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
435 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
436 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
437 outp += sprintf(outp, "Throttle PKG: %0X\n",
438 p->rapl_pkg_perf_status);
439 outp += sprintf(outp, "Throttle RAM: %0X\n",
440 p->rapl_dram_perf_status);
441 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 442 }
3b4d5c7f
AS		 443
444 outp += sprintf(outp, "\n");
445
c98d5d94 446 return 0;
103a8fea
LB		 447}
448
e23da037
LB		 449/*
450 * column formatting convention & formats
e23da037 451 */
c98d5d94
LB		 452int format_counters(struct thread_data *t, struct core_data *c,
453 struct pkg_data *p)
103a8fea
LB		 454{
455 double interval_float;
fc04cc67 456 char *fmt8;
103a8fea 457
c98d5d94
LB		 458 /* if showing only 1st thread in core and this isn't one, bail out */
459 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
460 return 0;
461
462 /* if showing only 1st thread in pkg and this isn't one, bail out */
463 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
464 return 0;
465
103a8fea
LB		 466 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
467
c98d5d94
LB		 468 /* topo columns, print blanks on 1st (average) line */
469 if (t == &average.threads) {
103a8fea 470 if (show_pkg)
fc04cc67 471 outp += sprintf(outp, " -");
103a8fea 472 if (show_core)
fc04cc67 473 outp += sprintf(outp, " -");
103a8fea 474 if (show_cpu)
fc04cc67 475 outp += sprintf(outp, " -");
103a8fea 476 } else {
c98d5d94
LB		 477 if (show_pkg) {
478 if (p)
fc04cc67 479 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 480 else
fc04cc67 481 outp += sprintf(outp, " -");
c98d5d94 482 }
c98d5d94
LB		 483 if (show_core) {
484 if (c)
fc04cc67 485 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 486 else
fc04cc67 487 outp += sprintf(outp, " -");
c98d5d94 488 }
103a8fea 489 if (show_cpu)
fc04cc67 490 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 491 }
fc04cc67 492
d7899447 493 /* Avg_MHz */
fc04cc67
LB		 494 if (has_aperf)
495 outp += sprintf(outp, "%8.0f",
496 1.0 / units * t->aperf / interval_float);
497
d7899447
LB		 498 /* %Busy */
499 if (has_aperf) {
103a8fea 500 if (!skip_c0)
fc04cc67 501 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
103a8fea 502 else
fc04cc67 503 outp += sprintf(outp, "********");
103a8fea
LB		 504 }
505
d7899447 506 /* Bzy_MHz */
fc04cc67
LB		 507 if (has_aperf)
508 outp += sprintf(outp, "%8.0f",
509 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
103a8fea 510
d7899447 511 /* TSC_MHz */
fc04cc67 512 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 513
8e180f3c
LB		 514 /* delta */
515 if (extra_delta_offset32)
516 outp += sprintf(outp, " %11llu", t->extra_delta32);
517
518 /* DELTA */
519 if (extra_delta_offset64)
520 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 521 /* msr */
522 if (extra_msr_offset32)
8e180f3c 523 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 524
130ff304 525 /* MSR */
2f32edf1
LB		 526 if (extra_msr_offset64)
527 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 528
1cc21f7b
LB		 529 if (!debug)
530 goto done;
531
532 /* SMI */
533 if (do_smi)
534 outp += sprintf(outp, "%8d", t->smi_count);
535
103a8fea
LB		 536 if (do_nhm_cstates) {
537 if (!skip_c1)
fc04cc67 538 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 539 else
fc04cc67 540 outp += sprintf(outp, "********");
103a8fea 541 }
c98d5d94
LB		 542
543 /* print per-core data only for 1st thread in core */
544 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
545 goto done;
546
144b44b1 547 if (do_nhm_cstates && !do_slm_cstates)
fc04cc67 548 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 549 if (do_nhm_cstates)
fc04cc67 550 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 551 if (do_snb_cstates)
fc04cc67 552 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 553
889facbe 554 if (do_dts)
fc04cc67 555 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 556
c98d5d94
LB		 557 /* print per-package data only for 1st core in package */
558 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
559 goto done;
560
0b2bb692 561 /* PkgTmp */
889facbe 562 if (do_ptm)
fc04cc67 563 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 564
0b2bb692
LB		 565 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
566 if (do_skl_residency) {
567 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
568 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
569 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
570 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
571 }
572
ee7e38e3 573 if (do_pc2)
fc04cc67 574 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
ee7e38e3 575 if (do_pc3)
fc04cc67 576 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
ee7e38e3 577 if (do_pc6)
fc04cc67 578 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
ee7e38e3 579 if (do_pc7)
fc04cc67 580 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 581 if (do_c8_c9_c10) {
fc04cc67
LB		 582 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
583 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
584 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 585 }
889facbe
LB		 586
587 /*
588 * If measurement interval exceeds minimum RAPL Joule Counter range,
589 * indicate that results are suspect by printing "**" in fraction place.
590 */
fc04cc67
LB		 591 if (interval_float < rapl_joule_counter_range)
592 fmt8 = "%8.2f";
593 else
594 fmt8 = " %6.0f**";
889facbe 595
5c56be9a
DB		 596 if (do_rapl && !rapl_joules) {
597 if (do_rapl & RAPL_PKG)
fc04cc67 598 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 599 if (do_rapl & RAPL_CORES)
fc04cc67 600 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 601 if (do_rapl & RAPL_GFX)
fc04cc67 602 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 603 if (do_rapl & RAPL_DRAM)
40ee8e3b 604 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
5c56be9a 605 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 606 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 607 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 608 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 609 } else if (do_rapl && rapl_joules) {
5c56be9a 610 if (do_rapl & RAPL_PKG)
fc04cc67 611 outp += sprintf(outp, fmt8,
5c56be9a
DB		 612 p->energy_pkg * rapl_energy_units);
613 if (do_rapl & RAPL_CORES)
fc04cc67 614 outp += sprintf(outp, fmt8,
5c56be9a
DB		 615 p->energy_cores * rapl_energy_units);
616 if (do_rapl & RAPL_GFX)
fc04cc67 617 outp += sprintf(outp, fmt8,
5c56be9a
DB		 618 p->energy_gfx * rapl_energy_units);
619 if (do_rapl & RAPL_DRAM)
fc04cc67 620 outp += sprintf(outp, fmt8,
40ee8e3b 621 p->energy_dram * rapl_dram_energy_units);
5c56be9a 622 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 623 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 624 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 625 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 626
d7899447 627 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 628 }
c98d5d94 629done:
c98d5d94
LB		 630 outp += sprintf(outp, "\n");
631
632 return 0;
103a8fea
LB		 633}
634
c98d5d94
LB		 635void flush_stdout()
636{
637 fputs(output_buffer, stdout);
ddac0d68 638 fflush(stdout);
c98d5d94
LB		 639 outp = output_buffer;
640}
641void flush_stderr()
642{
643 fputs(output_buffer, stderr);
644 outp = output_buffer;
645}
646void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 647{
e23da037 648 static int printed;
103a8fea 649
e23da037
LB		 650 if (!printed || !summary_only)
651 print_header();
103a8fea 652
c98d5d94
LB		 653 if (topo.num_cpus > 1)
654 format_counters(&average.threads, &average.cores,
655 &average.packages);
103a8fea 656
e23da037
LB		 657 printed = 1;
658
659 if (summary_only)
660 return;
661
c98d5d94 662 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 663}
664
889facbe
LB		 665#define DELTA_WRAP32(new, old) \
666 if (new > old) { \
667 old = new - old; \
668 } else { \
669 old = 0x100000000 + new - old; \
670 }
671
c98d5d94
LB		 672void
673delta_package(struct pkg_data *new, struct pkg_data *old)
674{
0b2bb692
LB		 675
676 if (do_skl_residency) {
677 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
678 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
679 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
680 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
681 }
c98d5d94 682 old->pc2 = new->pc2 - old->pc2;
ee7e38e3
LB		 683 if (do_pc3)
684 old->pc3 = new->pc3 - old->pc3;
685 if (do_pc6)
686 old->pc6 = new->pc6 - old->pc6;
687 if (do_pc7)
688 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 689 old->pc8 = new->pc8 - old->pc8;
690 old->pc9 = new->pc9 - old->pc9;
691 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 692 old->pkg_temp_c = new->pkg_temp_c;
693
694 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
695 DELTA_WRAP32(new->energy_cores, old->energy_cores);
696 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
697 DELTA_WRAP32(new->energy_dram, old->energy_dram);
698 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
699 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 700}
103a8fea 701
c98d5d94
LB		 702void
703delta_core(struct core_data *new, struct core_data *old)
103a8fea 704{
c98d5d94
LB		 705 old->c3 = new->c3 - old->c3;
706 old->c6 = new->c6 - old->c6;
707 old->c7 = new->c7 - old->c7;
889facbe 708 old->core_temp_c = new->core_temp_c;
c98d5d94 709}
103a8fea 710
c3ae331d
LB		 711/*
712 * old = new - old
713 */
c98d5d94
LB		 714void
715delta_thread(struct thread_data *new, struct thread_data *old,
716 struct core_data *core_delta)
717{
718 old->tsc = new->tsc - old->tsc;
719
720 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 721 if (old->tsc < (1000 * 1000))
722 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
723 "You can disable all c-states by booting with \"idle=poll\"\n"
724 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 725
c98d5d94 726 old->c1 = new->c1 - old->c1;
103a8fea 727
a729617c
LB		 728 if (has_aperf) {
729 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
730 old->aperf = new->aperf - old->aperf;
731 old->mperf = new->mperf - old->mperf;
732 } else {
103a8fea 733
a729617c
LB		 734 if (!aperf_mperf_unstable) {
735 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
736 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
737 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 738
a729617c
LB		 739 aperf_mperf_unstable = 1;
740 }
741 /*
742 * mperf delta is likely a huge "positive" number
743 * can not use it for calculating c0 time
744 */
745 skip_c0 = 1;
746 skip_c1 = 1;
103a8fea 747 }
c98d5d94 748 }
103a8fea 749
103a8fea 750
144b44b1
LB		 751 if (use_c1_residency_msr) {
752 /*
753 * Some models have a dedicated C1 residency MSR,
754 * which should be more accurate than the derivation below.
755 */
756 } else {
757 /*
758 * As counter collection is not atomic,
759 * it is possible for mperf's non-halted cycles + idle states
760 * to exceed TSC's all cycles: show c1 = 0% in that case.
761 */
762 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
763 old->c1 = 0;
764 else {
765 /* normal case, derive c1 */
766 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 767 - core_delta->c6 - core_delta->c7;
144b44b1 768 }
c98d5d94 769 }
c3ae331d 770
c98d5d94 771 if (old->mperf == 0) {
d8af6f5f 772 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 773 old->mperf = 1; /* divide by 0 protection */
103a8fea 774 }
c98d5d94 775
8e180f3c
LB		 776 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
777 old->extra_delta32 &= 0xFFFFFFFF;
778
779 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
780
c98d5d94 781 /*
8e180f3c 782 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 783 */
2f32edf1
LB		 784 old->extra_msr32 = new->extra_msr32;
785 old->extra_msr64 = new->extra_msr64;
1ed51011
LB		 786
787 if (do_smi)
788 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 789}
790
791int delta_cpu(struct thread_data *t, struct core_data *c,
792 struct pkg_data *p, struct thread_data *t2,
793 struct core_data *c2, struct pkg_data *p2)
794{
795 /* calculate core delta only for 1st thread in core */
796 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
797 delta_core(c, c2);
798
799 /* always calculate thread delta */
800 delta_thread(t, t2, c2); /* c2 is core delta */
801
802 /* calculate package delta only for 1st core in package */
803 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
804 delta_package(p, p2);
805
103a8fea
LB		 806 return 0;
807}
808
c98d5d94
LB		 809void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
810{
811 t->tsc = 0;
812 t->aperf = 0;
813 t->mperf = 0;
814 t->c1 = 0;
815
1ed51011 816 t->smi_count = 0;
8e180f3c
LB		 817 t->extra_delta32 = 0;
818 t->extra_delta64 = 0;
819
c98d5d94
LB		 820 /* tells format_counters to dump all fields from this set */
821 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
822
823 c->c3 = 0;
824 c->c6 = 0;
825 c->c7 = 0;
889facbe 826 c->core_temp_c = 0;
c98d5d94 827
0b2bb692
LB		 828 p->pkg_wtd_core_c0 = 0;
829 p->pkg_any_core_c0 = 0;
830 p->pkg_any_gfxe_c0 = 0;
831 p->pkg_both_core_gfxe_c0 = 0;
832
c98d5d94 833 p->pc2 = 0;
ee7e38e3
LB		 834 if (do_pc3)
835 p->pc3 = 0;
836 if (do_pc6)
837 p->pc6 = 0;
838 if (do_pc7)
839 p->pc7 = 0;
ca58710f
KCA		 840 p->pc8 = 0;
841 p->pc9 = 0;
842 p->pc10 = 0;
889facbe
LB		 843
844 p->energy_pkg = 0;
845 p->energy_dram = 0;
846 p->energy_cores = 0;
847 p->energy_gfx = 0;
848 p->rapl_pkg_perf_status = 0;
849 p->rapl_dram_perf_status = 0;
850 p->pkg_temp_c = 0;
c98d5d94
LB		 851}
852int sum_counters(struct thread_data *t, struct core_data *c,
853 struct pkg_data *p)
103a8fea 854{
c98d5d94
LB		 855 average.threads.tsc += t->tsc;
856 average.threads.aperf += t->aperf;
857 average.threads.mperf += t->mperf;
858 average.threads.c1 += t->c1;
103a8fea 859
8e180f3c
LB		 860 average.threads.extra_delta32 += t->extra_delta32;
861 average.threads.extra_delta64 += t->extra_delta64;
862
c98d5d94
LB		 863 /* sum per-core values only for 1st thread in core */
864 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
865 return 0;
103a8fea 866
c98d5d94
LB		 867 average.cores.c3 += c->c3;
868 average.cores.c6 += c->c6;
869 average.cores.c7 += c->c7;
870
889facbe
LB		 871 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
872
c98d5d94
LB		 873 /* sum per-pkg values only for 1st core in pkg */
874 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
875 return 0;
876
0b2bb692
LB		 877 if (do_skl_residency) {
878 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
879 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
880 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
881 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
882 }
883
c98d5d94 884 average.packages.pc2 += p->pc2;
ee7e38e3
LB		 885 if (do_pc3)
886 average.packages.pc3 += p->pc3;
887 if (do_pc6)
888 average.packages.pc6 += p->pc6;
889 if (do_pc7)
890 average.packages.pc7 += p->pc7;
ca58710f
KCA		 891 average.packages.pc8 += p->pc8;
892 average.packages.pc9 += p->pc9;
893 average.packages.pc10 += p->pc10;
c98d5d94 894
889facbe
LB		 895 average.packages.energy_pkg += p->energy_pkg;
896 average.packages.energy_dram += p->energy_dram;
897 average.packages.energy_cores += p->energy_cores;
898 average.packages.energy_gfx += p->energy_gfx;
899
900 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
901
902 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
903 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 904 return 0;
905}
906/*
907 * sum the counters for all cpus in the system
908 * compute the weighted average
909 */
910void compute_average(struct thread_data *t, struct core_data *c,
911 struct pkg_data *p)
912{
913 clear_counters(&average.threads, &average.cores, &average.packages);
914
915 for_all_cpus(sum_counters, t, c, p);
916
917 average.threads.tsc /= topo.num_cpus;
918 average.threads.aperf /= topo.num_cpus;
919 average.threads.mperf /= topo.num_cpus;
920 average.threads.c1 /= topo.num_cpus;
921
8e180f3c
LB		 922 average.threads.extra_delta32 /= topo.num_cpus;
923 average.threads.extra_delta32 &= 0xFFFFFFFF;
924
925 average.threads.extra_delta64 /= topo.num_cpus;
926
c98d5d94
LB		 927 average.cores.c3 /= topo.num_cores;
928 average.cores.c6 /= topo.num_cores;
929 average.cores.c7 /= topo.num_cores;
930
0b2bb692
LB		 931 if (do_skl_residency) {
932 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
933 average.packages.pkg_any_core_c0 /= topo.num_packages;
934 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
935 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
936 }
937
c98d5d94 938 average.packages.pc2 /= topo.num_packages;
ee7e38e3
LB		 939 if (do_pc3)
940 average.packages.pc3 /= topo.num_packages;
941 if (do_pc6)
942 average.packages.pc6 /= topo.num_packages;
943 if (do_pc7)
944 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 945
946 average.packages.pc8 /= topo.num_packages;
947 average.packages.pc9 /= topo.num_packages;
948 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 949}
950
c98d5d94 951static unsigned long long rdtsc(void)
103a8fea 952{
c98d5d94 953 unsigned int low, high;
15aaa346 954
c98d5d94 955 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 956
c98d5d94
LB		 957 return low | ((unsigned long long)high) << 32;
958}
15aaa346 959
15aaa346 960
c98d5d94
LB		 961/*
962 * get_counters(...)
963 * migrate to cpu
964 * acquire and record local counters for that cpu
965 */
966int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
967{
968 int cpu = t->cpu_id;
889facbe 969 unsigned long long msr;
88c3281f 970
e52966c0
LB		 971 if (cpu_migrate(cpu)) {
972 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
c98d5d94 973 return -1;
e52966c0 974 }
15aaa346 975
c98d5d94
LB		 976 t->tsc = rdtsc(); /* we are running on local CPU of interest */
977
978 if (has_aperf) {
9c63a650 979 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 980 return -3;
9c63a650 981 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94
LB		 982 return -4;
983 }
984
1ed51011
LB		 985 if (do_smi) {
986 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
987 return -5;
988 t->smi_count = msr & 0xFFFFFFFF;
989 }
8e180f3c 990 if (extra_delta_offset32) {
889facbe 991 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 992 return -5;
889facbe 993 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 994 }
995
996 if (extra_delta_offset64)
997 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 998 return -5;
999
8e180f3c 1000 if (extra_msr_offset32) {
889facbe 1001 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 1002 return -5;
889facbe 1003 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1004 }
1005
2f32edf1
LB		 1006 if (extra_msr_offset64)
1007 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 1008 return -5;
1009
144b44b1
LB		 1010 if (use_c1_residency_msr) {
1011 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1012 return -6;
1013 }
1014
c98d5d94
LB		 1015 /* collect core counters only for 1st thread in core */
1016 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1017 return 0;
1018
144b44b1 1019 if (do_nhm_cstates && !do_slm_cstates) {
c98d5d94
LB		 1020 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1021 return -6;
144b44b1
LB		 1022 }
1023
1024 if (do_nhm_cstates) {
c98d5d94
LB		 1025 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1026 return -7;
1027 }
1028
1029 if (do_snb_cstates)
1030 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1031 return -8;
1032
889facbe
LB		 1033 if (do_dts) {
1034 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1035 return -9;
1036 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1037 }
1038
1039
c98d5d94
LB		 1040 /* collect package counters only for 1st core in package */
1041 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1042 return 0;
1043
0b2bb692
LB		 1044 if (do_skl_residency) {
1045 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1046 return -10;
1047 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1048 return -11;
1049 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1050 return -12;
1051 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1052 return -13;
1053 }
ee7e38e3 1054 if (do_pc3)
c98d5d94
LB		 1055 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1056 return -9;
ee7e38e3 1057 if (do_pc6)
c98d5d94
LB		 1058 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1059 return -10;
ee7e38e3 1060 if (do_pc2)
c98d5d94
LB		 1061 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1062 return -11;
ee7e38e3 1063 if (do_pc7)
c98d5d94
LB		 1064 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1065 return -12;
ca58710f
KCA		 1066 if (do_c8_c9_c10) {
1067 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1068 return -13;
1069 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1070 return -13;
1071 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1072 return -13;
1073 }
889facbe
LB		 1074 if (do_rapl & RAPL_PKG) {
1075 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1076 return -13;
1077 p->energy_pkg = msr & 0xFFFFFFFF;
1078 }
1079 if (do_rapl & RAPL_CORES) {
1080 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1081 return -14;
1082 p->energy_cores = msr & 0xFFFFFFFF;
1083 }
1084 if (do_rapl & RAPL_DRAM) {
1085 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1086 return -15;
1087 p->energy_dram = msr & 0xFFFFFFFF;
1088 }
1089 if (do_rapl & RAPL_GFX) {
1090 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1091 return -16;
1092 p->energy_gfx = msr & 0xFFFFFFFF;
1093 }
1094 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1095 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1096 return -16;
1097 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1098 }
1099 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1100 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1101 return -16;
1102 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1103 }
1104 if (do_ptm) {
1105 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1106 return -17;
1107 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1108 }
15aaa346 1109 return 0;
103a8fea
LB		 1110}
1111
ee7e38e3
LB		 1112/*
1113 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1114 * If you change the values, note they are used both in comparisons
1115 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1116 */
1117
1118#define PCLUKN 0 /* Unknown */
1119#define PCLRSV 1 /* Reserved */
1120#define PCL__0 2 /* PC0 */
1121#define PCL__1 3 /* PC1 */
1122#define PCL__2 4 /* PC2 */
1123#define PCL__3 5 /* PC3 */
1124#define PCL__4 6 /* PC4 */
1125#define PCL__6 7 /* PC6 */
1126#define PCL_6N 8 /* PC6 No Retention */
1127#define PCL_6R 9 /* PC6 Retention */
1128#define PCL__7 10 /* PC7 */
1129#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1130#define PCL__8 12 /* PC8 */
1131#define PCL__9 13 /* PC9 */
1132#define PCLUNL 14 /* Unlimited */
ee7e38e3
LB		 1133
1134int pkg_cstate_limit = PCLUKN;
1135char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
0b2bb692 1136 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
ee7e38e3
LB		 1137
1138int nhm_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL};
1139int snb_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL};
1140int hsw_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCLRSV, PCLUNL};
0b2bb692 1141int skl_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9};
ee7e38e3
LB		 1142int slv_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7};
1143int amt_pkg_cstate_limits[8] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
1144int phi_pkg_cstate_limits[8] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL};
1145
fcd17211
LB		 1146static void
1147dump_nhm_platform_info(void)
103a8fea
LB		 1148{
1149 unsigned long long msr;
1150 unsigned int ratio;
1151
9c63a650 1152 get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
103a8fea 1153
67920418 1154 fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
6574a5d5 1155
103a8fea 1156 ratio = (msr >> 40) & 0xFF;
8f61f359 1157 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
103a8fea
LB		 1158 ratio, bclk, ratio * bclk);
1159
1160 ratio = (msr >> 8) & 0xFF;
8f61f359 1161 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
103a8fea
LB		 1162 ratio, bclk, ratio * bclk);
1163
67920418 1164 get_msr(0, MSR_IA32_POWER_CTL, &msr);
144b44b1 1165 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
67920418
LB		 1166 msr, msr & 0x2 ? "EN" : "DIS");
1167
fcd17211
LB		 1168 return;
1169}
1170
1171static void
1172dump_hsw_turbo_ratio_limits(void)
1173{
1174 unsigned long long msr;
1175 unsigned int ratio;
1176
1177 get_msr(0, MSR_TURBO_RATIO_LIMIT2, &msr);
1178
1179 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", msr);
1180
1181 ratio = (msr >> 8) & 0xFF;
1182 if (ratio)
1183 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1184 ratio, bclk, ratio * bclk);
1185
1186 ratio = (msr >> 0) & 0xFF;
1187 if (ratio)
1188 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1189 ratio, bclk, ratio * bclk);
1190 return;
1191}
1192
1193static void
1194dump_ivt_turbo_ratio_limits(void)
1195{
1196 unsigned long long msr;
1197 unsigned int ratio;
6574a5d5 1198
12bb43c6 1199 get_msr(0, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 1200
12bb43c6 1201 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", msr);
6574a5d5
LB		 1202
1203 ratio = (msr >> 56) & 0xFF;
1204 if (ratio)
1205 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1206 ratio, bclk, ratio * bclk);
1207
1208 ratio = (msr >> 48) & 0xFF;
1209 if (ratio)
1210 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1211 ratio, bclk, ratio * bclk);
1212
1213 ratio = (msr >> 40) & 0xFF;
1214 if (ratio)
1215 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1216 ratio, bclk, ratio * bclk);
1217
1218 ratio = (msr >> 32) & 0xFF;
1219 if (ratio)
1220 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1221 ratio, bclk, ratio * bclk);
1222
1223 ratio = (msr >> 24) & 0xFF;
1224 if (ratio)
1225 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1226 ratio, bclk, ratio * bclk);
1227
1228 ratio = (msr >> 16) & 0xFF;
1229 if (ratio)
1230 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1231 ratio, bclk, ratio * bclk);
1232
1233 ratio = (msr >> 8) & 0xFF;
1234 if (ratio)
1235 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1236 ratio, bclk, ratio * bclk);
1237
1238 ratio = (msr >> 0) & 0xFF;
1239 if (ratio)
1240 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1241 ratio, bclk, ratio * bclk);
fcd17211
LB		 1242 return;
1243}
6574a5d5 1244
fcd17211
LB		 1245static void
1246dump_nhm_turbo_ratio_limits(void)
1247{
1248 unsigned long long msr;
1249 unsigned int ratio;
103a8fea 1250
12bb43c6 1251 get_msr(0, MSR_TURBO_RATIO_LIMIT, &msr);
103a8fea 1252
12bb43c6 1253 fprintf(stderr, "cpu0: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
6574a5d5
LB		 1254
1255 ratio = (msr >> 56) & 0xFF;
1256 if (ratio)
1257 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1258 ratio, bclk, ratio * bclk);
1259
1260 ratio = (msr >> 48) & 0xFF;
1261 if (ratio)
1262 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1263 ratio, bclk, ratio * bclk);
1264
1265 ratio = (msr >> 40) & 0xFF;
1266 if (ratio)
1267 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1268 ratio, bclk, ratio * bclk);
1269
1270 ratio = (msr >> 32) & 0xFF;
1271 if (ratio)
1272 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1273 ratio, bclk, ratio * bclk);
1274
103a8fea
LB		 1275 ratio = (msr >> 24) & 0xFF;
1276 if (ratio)
1277 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1278 ratio, bclk, ratio * bclk);
1279
1280 ratio = (msr >> 16) & 0xFF;
1281 if (ratio)
1282 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1283 ratio, bclk, ratio * bclk);
1284
1285 ratio = (msr >> 8) & 0xFF;
1286 if (ratio)
1287 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1288 ratio, bclk, ratio * bclk);
1289
1290 ratio = (msr >> 0) & 0xFF;
1291 if (ratio)
1292 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1293 ratio, bclk, ratio * bclk);
fcd17211
LB		 1294 return;
1295}
3a9a941d 1296
fcd17211
LB		 1297static void
1298dump_nhm_cst_cfg(void)
1299{
1300 unsigned long long msr;
1301
1302 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1303
1304#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1305#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1306
1307 fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
1308
1309 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1310 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1311 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1312 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1313 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1314 (msr & (1 << 15)) ? "" : "UN",
1315 (unsigned int)msr & 7,
1316 pkg_cstate_limit_strings[pkg_cstate_limit]);
1317 return;
103a8fea
LB		 1318}
1319
c98d5d94 1320void free_all_buffers(void)
103a8fea 1321{
c98d5d94
LB		 1322 CPU_FREE(cpu_present_set);
1323 cpu_present_set = NULL;
1324 cpu_present_set = 0;
103a8fea 1325
c98d5d94
LB		 1326 CPU_FREE(cpu_affinity_set);
1327 cpu_affinity_set = NULL;
1328 cpu_affinity_setsize = 0;
103a8fea 1329
c98d5d94
LB		 1330 free(thread_even);
1331 free(core_even);
1332 free(package_even);
103a8fea 1333
c98d5d94
LB		 1334 thread_even = NULL;
1335 core_even = NULL;
1336 package_even = NULL;
103a8fea 1337
c98d5d94
LB		 1338 free(thread_odd);
1339 free(core_odd);
1340 free(package_odd);
103a8fea 1341
c98d5d94
LB		 1342 thread_odd = NULL;
1343 core_odd = NULL;
1344 package_odd = NULL;
103a8fea 1345
c98d5d94
LB		 1346 free(output_buffer);
1347 output_buffer = NULL;
1348 outp = NULL;
103a8fea
LB		 1349}
1350
57a42a34
JT		 1351/*
1352 * Open a file, and exit on failure
1353 */
1354FILE *fopen_or_die(const char *path, const char *mode)
1355{
1356 FILE *filep = fopen(path, "r");
b2c95d90
JT		 1357 if (!filep)
1358 err(1, "%s: open failed", path);
57a42a34
JT		 1359 return filep;
1360}
1361
c98d5d94 1362/*
95aebc44 1363 * Parse a file containing a single int.
c98d5d94 1364 */
95aebc44 1365int parse_int_file(const char *fmt, ...)
103a8fea 1366{
95aebc44
JT		 1367 va_list args;
1368 char path[PATH_MAX];
c98d5d94 1369 FILE *filep;
95aebc44 1370 int value;
103a8fea 1371
95aebc44
JT		 1372 va_start(args, fmt);
1373 vsnprintf(path, sizeof(path), fmt, args);
1374 va_end(args);
57a42a34 1375 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1376 if (fscanf(filep, "%d", &value) != 1)
1377 err(1, "%s: failed to parse number from file", path);
c98d5d94 1378 fclose(filep);
95aebc44
JT		 1379 return value;
1380}
1381
1382/*
1383 * cpu_is_first_sibling_in_core(cpu)
1384 * return 1 if given CPU is 1st HT sibling in the core
1385 */
1386int cpu_is_first_sibling_in_core(int cpu)
1387{
1388 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
103a8fea
LB		 1389}
1390
c98d5d94
LB		 1391/*
1392 * cpu_is_first_core_in_package(cpu)
1393 * return 1 if given CPU is 1st core in package
1394 */
1395int cpu_is_first_core_in_package(int cpu)
103a8fea 1396{
95aebc44 1397 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1398}
1399
1400int get_physical_package_id(int cpu)
1401{
95aebc44 1402 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1403}
1404
1405int get_core_id(int cpu)
1406{
95aebc44 1407 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1408}
1409
c98d5d94
LB		 1410int get_num_ht_siblings(int cpu)
1411{
1412 char path[80];
1413 FILE *filep;
1414 int sib1, sib2;
1415 int matches;
1416 char character;
1417
1418 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1419 filep = fopen_or_die(path, "r");
c98d5d94
LB		 1420 /*
1421 * file format:
1422 * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4)
1423 * otherwinse 1 sibling (self).
1424 */
1425 matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2);
1426
1427 fclose(filep);
1428
1429 if (matches == 3)
1430 return 2;
1431 else
1432 return 1;
1433}
1434
103a8fea 1435/*
c98d5d94
LB		 1436 * run func(thread, core, package) in topology order
1437 * skip non-present cpus
103a8fea
LB		 1438 */
1439
c98d5d94
LB		 1440int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1441 struct pkg_data *, struct thread_data *, struct core_data *,
1442 struct pkg_data *), struct thread_data *thread_base,
1443 struct core_data *core_base, struct pkg_data *pkg_base,
1444 struct thread_data *thread_base2, struct core_data *core_base2,
1445 struct pkg_data *pkg_base2)
1446{
1447 int retval, pkg_no, core_no, thread_no;
1448
1449 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1450 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1451 for (thread_no = 0; thread_no <
1452 topo.num_threads_per_core; ++thread_no) {
1453 struct thread_data *t, *t2;
1454 struct core_data *c, *c2;
1455 struct pkg_data *p, *p2;
1456
1457 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1458
1459 if (cpu_is_not_present(t->cpu_id))
1460 continue;
1461
1462 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1463
1464 c = GET_CORE(core_base, core_no, pkg_no);
1465 c2 = GET_CORE(core_base2, core_no, pkg_no);
1466
1467 p = GET_PKG(pkg_base, pkg_no);
1468 p2 = GET_PKG(pkg_base2, pkg_no);
1469
1470 retval = func(t, c, p, t2, c2, p2);
1471 if (retval)
1472 return retval;
1473 }
1474 }
1475 }
1476 return 0;
1477}
1478
1479/*
1480 * run func(cpu) on every cpu in /proc/stat
1481 * return max_cpu number
1482 */
1483int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1484{
1485 FILE *fp;
c98d5d94 1486 int cpu_num;
103a8fea
LB		 1487 int retval;
1488
57a42a34 1489 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1490
1491 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1492 if (retval != 0)
1493 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1494
c98d5d94
LB		 1495 while (1) {
1496 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1497 if (retval != 1)
1498 break;
1499
c98d5d94
LB		 1500 retval = func(cpu_num);
1501 if (retval) {
1502 fclose(fp);
1503 return(retval);
1504 }
103a8fea
LB		 1505 }
1506 fclose(fp);
c98d5d94 1507 return 0;
103a8fea
LB		 1508}
1509
1510void re_initialize(void)
1511{
c98d5d94
LB		 1512 free_all_buffers();
1513 setup_all_buffers();
1514 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1515}
1516
c98d5d94 1517
103a8fea 1518/*
c98d5d94
LB		 1519 * count_cpus()
1520 * remember the last one seen, it will be the max
103a8fea 1521 */
c98d5d94 1522int count_cpus(int cpu)
103a8fea 1523{
c98d5d94
LB		 1524 if (topo.max_cpu_num < cpu)
1525 topo.max_cpu_num = cpu;
103a8fea 1526
c98d5d94
LB		 1527 topo.num_cpus += 1;
1528 return 0;
1529}
1530int mark_cpu_present(int cpu)
1531{
1532 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1533 return 0;
103a8fea
LB		 1534}
1535
1536void turbostat_loop()
1537{
c98d5d94 1538 int retval;
e52966c0 1539 int restarted = 0;
c98d5d94 1540
103a8fea 1541restart:
e52966c0
LB		 1542 restarted++;
1543
c98d5d94 1544 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1545 if (retval < -1) {
1546 exit(retval);
1547 } else if (retval == -1) {
e52966c0
LB		 1548 if (restarted > 1) {
1549 exit(retval);
1550 }
c98d5d94
LB		 1551 re_initialize();
1552 goto restart;
1553 }
e52966c0 1554 restarted = 0;
103a8fea
LB		 1555 gettimeofday(&tv_even, (struct timezone *)NULL);
1556
1557 while (1) {
c98d5d94 1558 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 1559 re_initialize();
1560 goto restart;
1561 }
1562 sleep(interval_sec);
c98d5d94 1563 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 1564 if (retval < -1) {
1565 exit(retval);
1566 } else if (retval == -1) {
15aaa346
LB		 1567 re_initialize();
1568 goto restart;
1569 }
103a8fea 1570 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 1571 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 1572 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1573 compute_average(EVEN_COUNTERS);
1574 format_all_counters(EVEN_COUNTERS);
1575 flush_stdout();
15aaa346 1576 sleep(interval_sec);
c98d5d94 1577 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1578 if (retval < -1) {
1579 exit(retval);
1580 } else if (retval == -1) {
103a8fea
LB		 1581 re_initialize();
1582 goto restart;
1583 }
103a8fea 1584 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 1585 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 1586 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1587 compute_average(ODD_COUNTERS);
1588 format_all_counters(ODD_COUNTERS);
1589 flush_stdout();
103a8fea
LB		 1590 }
1591}
1592
1593void check_dev_msr()
1594{
1595 struct stat sb;
1596
b2c95d90 1597 if (stat("/dev/cpu/0/msr", &sb))
a21d38c8
LB		 1598 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1599 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 1600}
1601
98481e79 1602void check_permissions()
103a8fea 1603{
98481e79
LB		 1604 struct __user_cap_header_struct cap_header_data;
1605 cap_user_header_t cap_header = &cap_header_data;
1606 struct __user_cap_data_struct cap_data_data;
1607 cap_user_data_t cap_data = &cap_data_data;
1608 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1609 int do_exit = 0;
1610
1611 /* check for CAP_SYS_RAWIO */
1612 cap_header->pid = getpid();
1613 cap_header->version = _LINUX_CAPABILITY_VERSION;
1614 if (capget(cap_header, cap_data) < 0)
1615 err(-6, "capget(2) failed");
1616
1617 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1618 do_exit++;
1619 warnx("capget(CAP_SYS_RAWIO) failed,"
1620 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1621 }
1622
1623 /* test file permissions */
1624 if (euidaccess("/dev/cpu/0/msr", R_OK)) {
1625 do_exit++;
1626 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1627 }
1628
1629 /* if all else fails, thell them to be root */
1630 if (do_exit)
1631 if (getuid() != 0)
d7899447 1632 warnx("... or simply run as root");
98481e79
LB		 1633
1634 if (do_exit)
1635 exit(-6);
103a8fea
LB		 1636}
1637
d7899447
LB		 1638/*
1639 * NHM adds support for additional MSRs:
1640 *
1641 * MSR_SMI_COUNT 0x00000034
1642 *
1643 * MSR_NHM_PLATFORM_INFO 0x000000ce
1644 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1645 *
1646 * MSR_PKG_C3_RESIDENCY 0x000003f8
1647 * MSR_PKG_C6_RESIDENCY 0x000003f9
1648 * MSR_CORE_C3_RESIDENCY 0x000003fc
1649 * MSR_CORE_C6_RESIDENCY 0x000003fd
1650 *
ee7e38e3
LB		 1651 * Side effect:
1652 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
d7899447 1653 */
ee7e38e3 1654int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 1655{
ee7e38e3
LB		 1656 unsigned long long msr;
1657 int *pkg_cstate_limits;
1658
103a8fea
LB		 1659 if (!genuine_intel)
1660 return 0;
1661
1662 if (family != 6)
1663 return 0;
1664
1665 switch (model) {
1666 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1667 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1668 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1669 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1670 case 0x2C: /* Westmere EP - Gulftown */
ee7e38e3
LB		 1671 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1672 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1673 pkg_cstate_limits = nhm_pkg_cstate_limits;
1674 break;
103a8fea
LB		 1675 case 0x2A: /* SNB */
1676 case 0x2D: /* SNB Xeon */
553575f1 1677 case 0x3A: /* IVB */
1300651b 1678 case 0x3E: /* IVB Xeon */
ee7e38e3
LB		 1679 pkg_cstate_limits = snb_pkg_cstate_limits;
1680 break;
70b43400 1681 case 0x3C: /* HSW */
e6f9bb3c 1682 case 0x3F: /* HSX */
70b43400 1683 case 0x45: /* HSW */
149c2319 1684 case 0x46: /* HSW */
4e8e863f 1685 case 0x3D: /* BDW */
48a0631c 1686 case 0x47: /* BDW */
4e8e863f
LB		 1687 case 0x4F: /* BDX */
1688 case 0x56: /* BDX-DE */
0b2bb692
LB		 1689 case 0x4E: /* SKL */
1690 case 0x5E: /* SKL */
ee7e38e3
LB		 1691 pkg_cstate_limits = hsw_pkg_cstate_limits;
1692 break;
1693 case 0x37: /* BYT */
1694 case 0x4D: /* AVN */
1695 pkg_cstate_limits = slv_pkg_cstate_limits;
1696 break;
1697 case 0x4C: /* AMT */
1698 pkg_cstate_limits = amt_pkg_cstate_limits;
1699 break;
1700 case 0x57: /* PHI */
1701 pkg_cstate_limits = phi_pkg_cstate_limits;
1702 break;
103a8fea
LB		 1703 default:
1704 return 0;
1705 }
ee7e38e3
LB		 1706 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1707
1708 pkg_cstate_limit = pkg_cstate_limits[msr & 0x7];
1709
1710 return 1;
103a8fea 1711}
d7899447
LB		 1712int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1713{
d7899447
LB		 1714 switch (model) {
1715 /* Nehalem compatible, but do not include turbo-ratio limit support */
1716 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1717 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1718 return 0;
1719 default:
1720 return 1;
1721 }
1722}
6574a5d5
LB		 1723int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1724{
1725 if (!genuine_intel)
1726 return 0;
1727
1728 if (family != 6)
1729 return 0;
1730
1731 switch (model) {
1732 case 0x3E: /* IVB Xeon */
fcd17211
LB		 1733 case 0x3F: /* HSW Xeon */
1734 return 1;
1735 default:
1736 return 0;
1737 }
1738}
1739int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1740{
1741 if (!genuine_intel)
1742 return 0;
1743
1744 if (family != 6)
1745 return 0;
1746
1747 switch (model) {
1748 case 0x3F: /* HSW Xeon */
6574a5d5
LB		 1749 return 1;
1750 default:
1751 return 0;
1752 }
1753}
1754
fcd17211
LB		 1755static void
1756dump_cstate_pstate_config_info(family, model)
1757{
1758 if (!do_nhm_platform_info)
1759 return;
1760
1761 dump_nhm_platform_info();
1762
1763 if (has_hsw_turbo_ratio_limit(family, model))
1764 dump_hsw_turbo_ratio_limits();
1765
1766 if (has_ivt_turbo_ratio_limit(family, model))
1767 dump_ivt_turbo_ratio_limits();
1768
1769 if (has_nhm_turbo_ratio_limit(family, model))
1770 dump_nhm_turbo_ratio_limits();
1771
1772 dump_nhm_cst_cfg();
1773}
1774
1775
889facbe
LB		 1776/*
1777 * print_epb()
1778 * Decode the ENERGY_PERF_BIAS MSR
1779 */
1780int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1781{
1782 unsigned long long msr;
1783 char *epb_string;
1784 int cpu;
1785
1786 if (!has_epb)
1787 return 0;
1788
1789 cpu = t->cpu_id;
1790
1791 /* EPB is per-package */
1792 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1793 return 0;
1794
1795 if (cpu_migrate(cpu)) {
1796 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1797 return -1;
1798 }
1799
1800 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
1801 return 0;
1802
1803 switch (msr & 0x7) {
1804 case ENERGY_PERF_BIAS_PERFORMANCE:
1805 epb_string = "performance";
1806 break;
1807 case ENERGY_PERF_BIAS_NORMAL:
1808 epb_string = "balanced";
1809 break;
1810 case ENERGY_PERF_BIAS_POWERSAVE:
1811 epb_string = "powersave";
1812 break;
1813 default:
1814 epb_string = "custom";
1815 break;
1816 }
1817 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
1818
1819 return 0;
1820}
1821
3a9a941d
LB		 1822/*
1823 * print_perf_limit()
1824 */
1825int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1826{
1827 unsigned long long msr;
1828 int cpu;
1829
1830 cpu = t->cpu_id;
1831
1832 /* per-package */
1833 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1834 return 0;
1835
1836 if (cpu_migrate(cpu)) {
1837 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1838 return -1;
1839 }
1840
1841 if (do_core_perf_limit_reasons) {
1842 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
1843 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1844 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 1845 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 1846 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 1847 (msr & 1 << 13) ? "Transitions, " : "",
1848 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
1849 (msr & 1 << 11) ? "PkgPwrL2, " : "",
1850 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1851 (msr & 1 << 9) ? "CorePwr, " : "",
1852 (msr & 1 << 8) ? "Amps, " : "",
1853 (msr & 1 << 6) ? "VR-Therm, " : "",
1854 (msr & 1 << 5) ? "Auto-HWP, " : "",
1855 (msr & 1 << 4) ? "Graphics, " : "",
1856 (msr & 1 << 2) ? "bit2, " : "",
1857 (msr & 1 << 1) ? "ThermStatus, " : "",
1858 (msr & 1 << 0) ? "PROCHOT, " : "");
3a9a941d 1859 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 1860 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 1861 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 1862 (msr & 1 << 29) ? "Transitions, " : "",
1863 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
1864 (msr & 1 << 27) ? "PkgPwrL2, " : "",
1865 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1866 (msr & 1 << 25) ? "CorePwr, " : "",
1867 (msr & 1 << 24) ? "Amps, " : "",
1868 (msr & 1 << 22) ? "VR-Therm, " : "",
1869 (msr & 1 << 21) ? "Auto-HWP, " : "",
1870 (msr & 1 << 20) ? "Graphics, " : "",
1871 (msr & 1 << 18) ? "bit18, " : "",
1872 (msr & 1 << 17) ? "ThermStatus, " : "",
1873 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 1874
1875 }
1876 if (do_gfx_perf_limit_reasons) {
1877 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
1878 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1879 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
1880 (msr & 1 << 0) ? "PROCHOT, " : "",
1881 (msr & 1 << 1) ? "ThermStatus, " : "",
1882 (msr & 1 << 4) ? "Graphics, " : "",
1883 (msr & 1 << 6) ? "VR-Therm, " : "",
1884 (msr & 1 << 8) ? "Amps, " : "",
1885 (msr & 1 << 9) ? "GFXPwr, " : "",
1886 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1887 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1888 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
1889 (msr & 1 << 16) ? "PROCHOT, " : "",
1890 (msr & 1 << 17) ? "ThermStatus, " : "",
1891 (msr & 1 << 20) ? "Graphics, " : "",
1892 (msr & 1 << 22) ? "VR-Therm, " : "",
1893 (msr & 1 << 24) ? "Amps, " : "",
1894 (msr & 1 << 25) ? "GFXPwr, " : "",
1895 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1896 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1897 }
1898 if (do_ring_perf_limit_reasons) {
1899 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
1900 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1901 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
1902 (msr & 1 << 0) ? "PROCHOT, " : "",
1903 (msr & 1 << 1) ? "ThermStatus, " : "",
1904 (msr & 1 << 6) ? "VR-Therm, " : "",
1905 (msr & 1 << 8) ? "Amps, " : "",
1906 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1907 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1908 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
1909 (msr & 1 << 16) ? "PROCHOT, " : "",
1910 (msr & 1 << 17) ? "ThermStatus, " : "",
1911 (msr & 1 << 22) ? "VR-Therm, " : "",
1912 (msr & 1 << 24) ? "Amps, " : "",
1913 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1914 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1915 }
1916 return 0;
1917}
1918
889facbe
LB		 1919#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
1920#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
1921
144b44b1
LB		 1922double get_tdp(model)
1923{
1924 unsigned long long msr;
1925
1926 if (do_rapl & RAPL_PKG_POWER_INFO)
1927 if (!get_msr(0, MSR_PKG_POWER_INFO, &msr))
1928 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
1929
1930 switch (model) {
1931 case 0x37:
1932 case 0x4D:
1933 return 30.0;
1934 default:
1935 return 135.0;
1936 }
1937}
1938
40ee8e3b
AS		 1939/*
1940 * rapl_dram_energy_units_probe()
1941 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
1942 */
1943static double
1944rapl_dram_energy_units_probe(int model, double rapl_energy_units)
1945{
1946 /* only called for genuine_intel, family 6 */
1947
1948 switch (model) {
1949 case 0x3F: /* HSX */
1950 case 0x4F: /* BDX */
1951 case 0x56: /* BDX-DE */
1952 return (rapl_dram_energy_units = 15.3 / 1000000);
1953 default:
1954 return (rapl_energy_units);
1955 }
1956}
1957
144b44b1 1958
889facbe
LB		 1959/*
1960 * rapl_probe()
1961 *
144b44b1 1962 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 1963 */
1964void rapl_probe(unsigned int family, unsigned int model)
1965{
1966 unsigned long long msr;
144b44b1 1967 unsigned int time_unit;
889facbe
LB		 1968 double tdp;
1969
1970 if (!genuine_intel)
1971 return;
1972
1973 if (family != 6)
1974 return;
1975
1976 switch (model) {
1977 case 0x2A:
1978 case 0x3A:
70b43400 1979 case 0x3C: /* HSW */
70b43400 1980 case 0x45: /* HSW */
149c2319 1981 case 0x46: /* HSW */
4e8e863f 1982 case 0x3D: /* BDW */
48a0631c 1983 case 0x47: /* BDW */
144b44b1 1984 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 1985 break;
0b2bb692
LB		 1986 case 0x4E: /* SKL */
1987 case 0x5E: /* SKL */
1988 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
1989 break;
e6f9bb3c 1990 case 0x3F: /* HSX */
4e8e863f
LB		 1991 case 0x4F: /* BDX */
1992 case 0x56: /* BDX-DE */
0b2bb692 1993 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
e6f9bb3c 1994 break;
889facbe
LB		 1995 case 0x2D:
1996 case 0x3E:
0b2bb692 1997 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
144b44b1
LB		 1998 break;
1999 case 0x37: /* BYT */
2000 case 0x4D: /* AVN */
2001 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 2002 break;
2003 default:
2004 return;
2005 }
2006
2007 /* units on package 0, verify later other packages match */
2008 if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr))
2009 return;
2010
2011 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 2012 if (model == 0x37)
2013 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2014 else
2015 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 2016
40ee8e3b
AS		 2017 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2018
144b44b1
LB		 2019 time_unit = msr >> 16 & 0xF;
2020 if (time_unit == 0)
2021 time_unit = 0xA;
889facbe 2022
144b44b1 2023 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 2024
144b44b1 2025 tdp = get_tdp(model);
889facbe 2026
144b44b1 2027 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
d8af6f5f 2028 if (debug)
144b44b1 2029 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 2030
2031 return;
2032}
2033
3a9a941d
LB		 2034void perf_limit_reasons_probe(family, model)
2035{
2036 if (!genuine_intel)
2037 return;
2038
2039 if (family != 6)
2040 return;
2041
2042 switch (model) {
2043 case 0x3C: /* HSW */
2044 case 0x45: /* HSW */
2045 case 0x46: /* HSW */
2046 do_gfx_perf_limit_reasons = 1;
2047 case 0x3F: /* HSX */
2048 do_core_perf_limit_reasons = 1;
2049 do_ring_perf_limit_reasons = 1;
2050 default:
2051 return;
2052 }
2053}
2054
889facbe
LB		 2055int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2056{
2057 unsigned long long msr;
2058 unsigned int dts;
2059 int cpu;
2060
2061 if (!(do_dts || do_ptm))
2062 return 0;
2063
2064 cpu = t->cpu_id;
2065
2066 /* DTS is per-core, no need to print for each thread */
2067 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2068 return 0;
2069
2070 if (cpu_migrate(cpu)) {
2071 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2072 return -1;
2073 }
2074
2075 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2076 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2077 return 0;
2078
2079 dts = (msr >> 16) & 0x7F;
2080 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2081 cpu, msr, tcc_activation_temp - dts);
2082
2083#ifdef THERM_DEBUG
2084 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2085 return 0;
2086
2087 dts = (msr >> 16) & 0x7F;
2088 dts2 = (msr >> 8) & 0x7F;
2089 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2090 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2091#endif
2092 }
2093
2094
2095 if (do_dts) {
2096 unsigned int resolution;
2097
2098 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2099 return 0;
2100
2101 dts = (msr >> 16) & 0x7F;
2102 resolution = (msr >> 27) & 0xF;
2103 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2104 cpu, msr, tcc_activation_temp - dts, resolution);
2105
2106#ifdef THERM_DEBUG
2107 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2108 return 0;
2109
2110 dts = (msr >> 16) & 0x7F;
2111 dts2 = (msr >> 8) & 0x7F;
2112 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2113 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2114#endif
2115 }
2116
2117 return 0;
2118}
2119
2120void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2121{
2122 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2123 cpu, label,
2124 ((msr >> 15) & 1) ? "EN" : "DIS",
2125 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2126 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2127 (((msr >> 16) & 1) ? "EN" : "DIS"));
2128
2129 return;
2130}
2131
2132int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2133{
2134 unsigned long long msr;
2135 int cpu;
889facbe
LB		 2136
2137 if (!do_rapl)
2138 return 0;
2139
2140 /* RAPL counters are per package, so print only for 1st thread/package */
2141 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2142 return 0;
2143
2144 cpu = t->cpu_id;
2145 if (cpu_migrate(cpu)) {
2146 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2147 return -1;
2148 }
2149
2150 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2151 return -1;
2152
d8af6f5f 2153 if (debug) {
889facbe
LB		 2154 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2155 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 2156 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 2157 }
144b44b1
LB		 2158 if (do_rapl & RAPL_PKG_POWER_INFO) {
2159
889facbe
LB		 2160 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2161 return -5;
2162
2163
2164 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2165 cpu, msr,
2166 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2167 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2168 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2169 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2170
144b44b1
LB		 2171 }
2172 if (do_rapl & RAPL_PKG) {
2173
889facbe
LB		 2174 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2175 return -9;
2176
2177 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2178 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2179
2180 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2181 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2182 cpu,
2183 ((msr >> 47) & 1) ? "EN" : "DIS",
2184 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2185 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2186 ((msr >> 48) & 1) ? "EN" : "DIS");
2187 }
2188
0b2bb692 2189 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 2190 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2191 return -6;
2192
889facbe
LB		 2193 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2194 cpu, msr,
2195 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2196 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2197 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2198 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 2199 }
2200 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 2201 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2202 return -9;
2203 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2204 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2205
2206 print_power_limit_msr(cpu, msr, "DRAM Limit");
2207 }
144b44b1 2208 if (do_rapl & RAPL_CORE_POLICY) {
d8af6f5f 2209 if (debug) {
889facbe
LB		 2210 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2211 return -7;
2212
2213 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 2214 }
2215 }
2216 if (do_rapl & RAPL_CORES) {
d8af6f5f 2217 if (debug) {
889facbe
LB		 2218
2219 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2220 return -9;
2221 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2222 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2223 print_power_limit_msr(cpu, msr, "Cores Limit");
2224 }
2225 }
2226 if (do_rapl & RAPL_GFX) {
d8af6f5f 2227 if (debug) {
889facbe
LB		 2228 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2229 return -8;
2230
2231 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2232
2233 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2234 return -9;
2235 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2236 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2237 print_power_limit_msr(cpu, msr, "GFX Limit");
2238 }
2239 }
2240 return 0;
2241}
2242
d7899447
LB		 2243/*
2244 * SNB adds support for additional MSRs:
2245 *
2246 * MSR_PKG_C7_RESIDENCY 0x000003fa
2247 * MSR_CORE_C7_RESIDENCY 0x000003fe
2248 * MSR_PKG_C2_RESIDENCY 0x0000060d
2249 */
103a8fea 2250
d7899447 2251int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2252{
2253 if (!genuine_intel)
2254 return 0;
2255
2256 switch (model) {
2257 case 0x2A:
2258 case 0x2D:
650a37f3 2259 case 0x3A: /* IVB */
1300651b 2260 case 0x3E: /* IVB Xeon */
70b43400
LB		 2261 case 0x3C: /* HSW */
2262 case 0x3F: /* HSW */
2263 case 0x45: /* HSW */
149c2319 2264 case 0x46: /* HSW */
4e8e863f 2265 case 0x3D: /* BDW */
48a0631c 2266 case 0x47: /* BDW */
4e8e863f
LB		 2267 case 0x4F: /* BDX */
2268 case 0x56: /* BDX-DE */
0b2bb692
LB		 2269 case 0x4E: /* SKL */
2270 case 0x5E: /* SKL */
103a8fea
LB		 2271 return 1;
2272 }
2273 return 0;
2274}
2275
d7899447
LB		 2276/*
2277 * HSW adds support for additional MSRs:
2278 *
2279 * MSR_PKG_C8_RESIDENCY 0x00000630
2280 * MSR_PKG_C9_RESIDENCY 0x00000631
2281 * MSR_PKG_C10_RESIDENCY 0x00000632
2282 */
2283int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2284{
2285 if (!genuine_intel)
2286 return 0;
2287
2288 switch (model) {
4e8e863f
LB		 2289 case 0x45: /* HSW */
2290 case 0x3D: /* BDW */
0b2bb692
LB		 2291 case 0x4E: /* SKL */
2292 case 0x5E: /* SKL */
2293 return 1;
2294 }
2295 return 0;
2296}
2297
2298/*
2299 * SKL adds support for additional MSRS:
2300 *
2301 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2302 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2303 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2304 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2305 */
2306int has_skl_msrs(unsigned int family, unsigned int model)
2307{
2308 if (!genuine_intel)
2309 return 0;
2310
2311 switch (model) {
2312 case 0x4E: /* SKL */
2313 case 0x5E: /* SKL */
ca58710f
KCA		 2314 return 1;
2315 }
2316 return 0;
2317}
2318
2319
0b2bb692 2320
144b44b1
LB		 2321int is_slm(unsigned int family, unsigned int model)
2322{
2323 if (!genuine_intel)
2324 return 0;
2325 switch (model) {
2326 case 0x37: /* BYT */
2327 case 0x4D: /* AVN */
2328 return 1;
2329 }
2330 return 0;
2331}
2332
2333#define SLM_BCLK_FREQS 5
2334double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2335
2336double slm_bclk(void)
2337{
2338 unsigned long long msr = 3;
2339 unsigned int i;
2340 double freq;
2341
2342 if (get_msr(0, MSR_FSB_FREQ, &msr))
2343 fprintf(stderr, "SLM BCLK: unknown\n");
2344
2345 i = msr & 0xf;
2346 if (i >= SLM_BCLK_FREQS) {
2347 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2348 msr = 3;
2349 }
2350 freq = slm_freq_table[i];
2351
2352 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2353
2354 return freq;
2355}
2356
103a8fea
LB		 2357double discover_bclk(unsigned int family, unsigned int model)
2358{
d7899447 2359 if (has_snb_msrs(family, model))
103a8fea 2360 return 100.00;
144b44b1
LB		 2361 else if (is_slm(family, model))
2362 return slm_bclk();
103a8fea
LB		 2363 else
2364 return 133.33;
2365}
2366
889facbe
LB		 2367/*
2368 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2369 * the Thermal Control Circuit (TCC) activates.
2370 * This is usually equal to tjMax.
2371 *
2372 * Older processors do not have this MSR, so there we guess,
2373 * but also allow cmdline over-ride with -T.
2374 *
2375 * Several MSR temperature values are in units of degrees-C
2376 * below this value, including the Digital Thermal Sensor (DTS),
2377 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2378 */
2379int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2380{
2381 unsigned long long msr;
2382 unsigned int target_c_local;
2383 int cpu;
2384
2385 /* tcc_activation_temp is used only for dts or ptm */
2386 if (!(do_dts || do_ptm))
2387 return 0;
2388
2389 /* this is a per-package concept */
2390 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2391 return 0;
2392
2393 cpu = t->cpu_id;
2394 if (cpu_migrate(cpu)) {
2395 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2396 return -1;
2397 }
2398
2399 if (tcc_activation_temp_override != 0) {
2400 tcc_activation_temp = tcc_activation_temp_override;
2401 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2402 cpu, tcc_activation_temp);
2403 return 0;
2404 }
2405
2406 /* Temperature Target MSR is Nehalem and newer only */
d7899447 2407 if (!do_nhm_platform_info)
889facbe
LB		 2408 goto guess;
2409
2410 if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr))
2411 goto guess;
2412
3482124a 2413 target_c_local = (msr >> 16) & 0xFF;
889facbe 2414
d8af6f5f 2415 if (debug)
889facbe
LB		 2416 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2417 cpu, msr, target_c_local);
2418
3482124a 2419 if (!target_c_local)
889facbe
LB		 2420 goto guess;
2421
2422 tcc_activation_temp = target_c_local;
2423
2424 return 0;
2425
2426guess:
2427 tcc_activation_temp = TJMAX_DEFAULT;
2428 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2429 cpu, tcc_activation_temp);
2430
2431 return 0;
2432}
fcd17211 2433void process_cpuid()
103a8fea
LB		 2434{
2435 unsigned int eax, ebx, ecx, edx, max_level;
2436 unsigned int fms, family, model, stepping;
2437
2438 eax = ebx = ecx = edx = 0;
2439
2b92865e 2440 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
103a8fea
LB		 2441
2442 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2443 genuine_intel = 1;
2444
d8af6f5f 2445 if (debug)
889facbe 2446 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 2447 (char *)&ebx, (char *)&edx, (char *)&ecx);
2448
2b92865e 2449 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
103a8fea
LB		 2450 family = (fms >> 8) & 0xf;
2451 model = (fms >> 4) & 0xf;
2452 stepping = fms & 0xf;
2453 if (family == 6 || family == 0xf)
2454 model += ((fms >> 16) & 0xf) << 4;
2455
d8af6f5f 2456 if (debug)
103a8fea
LB		 2457 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2458 max_level, family, model, stepping, family, model, stepping);
2459
b2c95d90
JT		 2460 if (!(edx & (1 << 5)))
2461 errx(1, "CPUID: no MSR");
103a8fea
LB		 2462
2463 /*
2464 * check max extended function levels of CPUID.
2465 * This is needed to check for invariant TSC.
2466 * This check is valid for both Intel and AMD.
2467 */
2468 ebx = ecx = edx = 0;
2b92865e 2469 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
103a8fea 2470
d7899447 2471 if (max_level >= 0x80000007) {
103a8fea 2472
d7899447
LB		 2473 /*
2474 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2475 * this check is valid for both Intel and AMD
2476 */
2477 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2478 has_invariant_tsc = edx & (1 << 8);
2479 }
103a8fea
LB		 2480
2481 /*
2482 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2483 * this check is valid for both Intel and AMD
2484 */
2485
2b92865e 2486 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
8209e054 2487 has_aperf = ecx & (1 << 0);
889facbe
LB		 2488 do_dts = eax & (1 << 0);
2489 do_ptm = eax & (1 << 6);
2490 has_epb = ecx & (1 << 3);
2491
d8af6f5f 2492 if (debug)
a729617c
LB		 2493 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
2494 has_aperf ? "" : "No ",
2495 do_dts ? "" : "No ",
2496 do_ptm ? "" : "No ",
2497 has_epb ? "" : "No ");
103a8fea 2498
ee7e38e3 2499 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
d7899447 2500 do_snb_cstates = has_snb_msrs(family, model);
ee7e38e3
LB		 2501 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2502 do_pc3 = (pkg_cstate_limit >= PCL__3);
2503 do_pc6 = (pkg_cstate_limit >= PCL__6);
2504 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
d7899447 2505 do_c8_c9_c10 = has_hsw_msrs(family, model);
0b2bb692 2506 do_skl_residency = has_skl_msrs(family, model);
144b44b1 2507 do_slm_cstates = is_slm(family, model);
103a8fea
LB		 2508 bclk = discover_bclk(family, model);
2509
889facbe 2510 rapl_probe(family, model);
3a9a941d 2511 perf_limit_reasons_probe(family, model);
889facbe 2512
fcd17211
LB		 2513 if (debug)
2514 dump_cstate_pstate_config_info();
2515
889facbe 2516 return;
103a8fea
LB		 2517}
2518
d8af6f5f 2519void help()
103a8fea 2520{
d8af6f5f
LB		 2521 fprintf(stderr,
2522 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2523 "\n"
2524 "Turbostat forks the specified COMMAND and prints statistics\n"
2525 "when COMMAND completes.\n"
2526 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2527 "to print statistics, until interrupted.\n"
2528 "--debug run in \"debug\" mode\n"
2529 "--interval sec Override default 5-second measurement interval\n"
2530 "--help print this help message\n"
2531 "--counter msr print 32-bit counter at address \"msr\"\n"
2532 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2533 "--msr msr print 32-bit value at address \"msr\"\n"
2534 "--MSR msr print 64-bit Value at address \"msr\"\n"
2535 "--version print version information\n"
2536 "\n"
2537 "For more help, run \"man turbostat\"\n");
103a8fea
LB		 2538}
2539
2540
2541/*
2542 * in /dev/cpu/ return success for names that are numbers
2543 * ie. filter out ".", "..", "microcode".
2544 */
2545int dir_filter(const struct dirent *dirp)
2546{
2547 if (isdigit(dirp->d_name[0]))
2548 return 1;
2549 else
2550 return 0;
2551}
2552
2553int open_dev_cpu_msr(int dummy1)
2554{
2555 return 0;
2556}
2557
c98d5d94
LB		 2558void topology_probe()
2559{
2560 int i;
2561 int max_core_id = 0;
2562 int max_package_id = 0;
2563 int max_siblings = 0;
2564 struct cpu_topology {
2565 int core_id;
2566 int physical_package_id;
2567 } *cpus;
2568
2569 /* Initialize num_cpus, max_cpu_num */
2570 topo.num_cpus = 0;
2571 topo.max_cpu_num = 0;
2572 for_all_proc_cpus(count_cpus);
2573 if (!summary_only && topo.num_cpus > 1)
2574 show_cpu = 1;
2575
d8af6f5f 2576 if (debug > 1)
c98d5d94
LB		 2577 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2578
2579 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 2580 if (cpus == NULL)
2581 err(1, "calloc cpus");
c98d5d94
LB		 2582
2583 /*
2584 * Allocate and initialize cpu_present_set
2585 */
2586 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2587 if (cpu_present_set == NULL)
2588 err(3, "CPU_ALLOC");
c98d5d94
LB		 2589 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2590 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2591 for_all_proc_cpus(mark_cpu_present);
2592
2593 /*
2594 * Allocate and initialize cpu_affinity_set
2595 */
2596 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2597 if (cpu_affinity_set == NULL)
2598 err(3, "CPU_ALLOC");
c98d5d94
LB		 2599 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2600 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2601
2602
2603 /*
2604 * For online cpus
2605 * find max_core_id, max_package_id
2606 */
2607 for (i = 0; i <= topo.max_cpu_num; ++i) {
2608 int siblings;
2609
2610 if (cpu_is_not_present(i)) {
d8af6f5f 2611 if (debug > 1)
c98d5d94
LB		 2612 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2613 continue;
2614 }
2615 cpus[i].core_id = get_core_id(i);
2616 if (cpus[i].core_id > max_core_id)
2617 max_core_id = cpus[i].core_id;
2618
2619 cpus[i].physical_package_id = get_physical_package_id(i);
2620 if (cpus[i].physical_package_id > max_package_id)
2621 max_package_id = cpus[i].physical_package_id;
2622
2623 siblings = get_num_ht_siblings(i);
2624 if (siblings > max_siblings)
2625 max_siblings = siblings;
d8af6f5f 2626 if (debug > 1)
c98d5d94
LB		 2627 fprintf(stderr, "cpu %d pkg %d core %d\n",
2628 i, cpus[i].physical_package_id, cpus[i].core_id);
2629 }
2630 topo.num_cores_per_pkg = max_core_id + 1;
d8af6f5f 2631 if (debug > 1)
c98d5d94
LB		 2632 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2633 max_core_id, topo.num_cores_per_pkg);
1cc21f7b 2634 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
c98d5d94
LB		 2635 show_core = 1;
2636
2637 topo.num_packages = max_package_id + 1;
d8af6f5f 2638 if (debug > 1)
c98d5d94
LB		 2639 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2640 max_package_id, topo.num_packages);
1cc21f7b 2641 if (debug && !summary_only && topo.num_packages > 1)
c98d5d94
LB		 2642 show_pkg = 1;
2643
2644 topo.num_threads_per_core = max_siblings;
d8af6f5f 2645 if (debug > 1)
c98d5d94
LB		 2646 fprintf(stderr, "max_siblings %d\n", max_siblings);
2647
2648 free(cpus);
2649}
2650
2651void
2652allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2653{
2654 int i;
2655
2656 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2657 topo.num_packages, sizeof(struct thread_data));
2658 if (*t == NULL)
2659 goto error;
2660
2661 for (i = 0; i < topo.num_threads_per_core *
2662 topo.num_cores_per_pkg * topo.num_packages; i++)
2663 (*t)[i].cpu_id = -1;
2664
2665 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2666 sizeof(struct core_data));
2667 if (*c == NULL)
2668 goto error;
2669
2670 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2671 (*c)[i].core_id = -1;
2672
2673 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2674 if (*p == NULL)
2675 goto error;
2676
2677 for (i = 0; i < topo.num_packages; i++)
2678 (*p)[i].package_id = i;
2679
2680 return;
2681error:
b2c95d90 2682 err(1, "calloc counters");
c98d5d94
LB		 2683}
2684/*
2685 * init_counter()
2686 *
2687 * set cpu_id, core_num, pkg_num
2688 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2689 *
2690 * increment topo.num_cores when 1st core in pkg seen
2691 */
2692void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2693 struct pkg_data *pkg_base, int thread_num, int core_num,
2694 int pkg_num, int cpu_id)
2695{
2696 struct thread_data *t;
2697 struct core_data *c;
2698 struct pkg_data *p;
2699
2700 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2701 c = GET_CORE(core_base, core_num, pkg_num);
2702 p = GET_PKG(pkg_base, pkg_num);
2703
2704 t->cpu_id = cpu_id;
2705 if (thread_num == 0) {
2706 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2707 if (cpu_is_first_core_in_package(cpu_id))
2708 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2709 }
2710
2711 c->core_id = core_num;
2712 p->package_id = pkg_num;
2713}
2714
2715
2716int initialize_counters(int cpu_id)
2717{
2718 int my_thread_id, my_core_id, my_package_id;
2719
2720 my_package_id = get_physical_package_id(cpu_id);
2721 my_core_id = get_core_id(cpu_id);
2722
2723 if (cpu_is_first_sibling_in_core(cpu_id)) {
2724 my_thread_id = 0;
2725 topo.num_cores++;
2726 } else {
2727 my_thread_id = 1;
2728 }
2729
2730 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2731 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2732 return 0;
2733}
2734
2735void allocate_output_buffer()
2736{
3b4d5c7f 2737 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 2738 outp = output_buffer;
b2c95d90
JT		 2739 if (outp == NULL)
2740 err(-1, "calloc output buffer");
c98d5d94
LB		 2741}
2742
2743void setup_all_buffers(void)
2744{
2745 topology_probe();
2746 allocate_counters(&thread_even, &core_even, &package_even);
2747 allocate_counters(&thread_odd, &core_odd, &package_odd);
2748 allocate_output_buffer();
2749 for_all_proc_cpus(initialize_counters);
2750}
3b4d5c7f 2751
103a8fea
LB		 2752void turbostat_init()
2753{
103a8fea 2754 check_dev_msr();
98481e79 2755 check_permissions();
fcd17211 2756 process_cpuid();
103a8fea 2757
c98d5d94 2758 setup_all_buffers();
103a8fea 2759
d8af6f5f 2760 if (debug)
889facbe
LB		 2761 for_all_cpus(print_epb, ODD_COUNTERS);
2762
d8af6f5f 2763 if (debug)
3a9a941d
LB		 2764 for_all_cpus(print_perf_limit, ODD_COUNTERS);
2765
d8af6f5f 2766 if (debug)
889facbe
LB		 2767 for_all_cpus(print_rapl, ODD_COUNTERS);
2768
2769 for_all_cpus(set_temperature_target, ODD_COUNTERS);
2770
d8af6f5f 2771 if (debug)
889facbe 2772 for_all_cpus(print_thermal, ODD_COUNTERS);
103a8fea
LB		 2773}
2774
2775int fork_it(char **argv)
2776{
103a8fea 2777 pid_t child_pid;
d91bb17c 2778 int status;
d15cf7c1 2779
d91bb17c
LB		 2780 status = for_all_cpus(get_counters, EVEN_COUNTERS);
2781 if (status)
2782 exit(status);
c98d5d94
LB		 2783 /* clear affinity side-effect of get_counters() */
2784 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 2785 gettimeofday(&tv_even, (struct timezone *)NULL);
2786
2787 child_pid = fork();
2788 if (!child_pid) {
2789 /* child */
2790 execvp(argv[0], argv);
2791 } else {
103a8fea
LB		 2792
2793 /* parent */
b2c95d90
JT		 2794 if (child_pid == -1)
2795 err(1, "fork");
103a8fea
LB		 2796
2797 signal(SIGINT, SIG_IGN);
2798 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 2799 if (waitpid(child_pid, &status, 0) == -1)
2800 err(status, "waitpid");
103a8fea 2801 }
c98d5d94
LB		 2802 /*
2803 * n.b. fork_it() does not check for errors from for_all_cpus()
2804 * because re-starting is problematic when forking
2805 */
2806 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 2807 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 2808 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 2809 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2810 compute_average(EVEN_COUNTERS);
2811 format_all_counters(EVEN_COUNTERS);
2812 flush_stderr();
103a8fea 2813
6eab04a8 2814 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
103a8fea 2815
d91bb17c 2816 return status;
103a8fea
LB		 2817}
2818
3b4d5c7f
AS		 2819int get_and_dump_counters(void)
2820{
2821 int status;
2822
2823 status = for_all_cpus(get_counters, ODD_COUNTERS);
2824 if (status)
2825 return status;
2826
2827 status = for_all_cpus(dump_counters, ODD_COUNTERS);
2828 if (status)
2829 return status;
2830
2831 flush_stdout();
2832
2833 return status;
2834}
2835
d8af6f5f 2836void print_version() {
a21d38c8 2837 fprintf(stderr, "turbostat version 4.3 24 Mar, 2015"
d8af6f5f
LB		 2838 " - Len Brown <lenb@kernel.org>\n");
2839}
2840
103a8fea
LB		 2841void cmdline(int argc, char **argv)
2842{
2843 int opt;
d8af6f5f
LB		 2844 int option_index = 0;
2845 static struct option long_options[] = {
2846 {"Counter", required_argument, 0, 'C'},
2847 {"counter", required_argument, 0, 'c'},
2848 {"Dump", no_argument, 0, 'D'},
2849 {"debug", no_argument, 0, 'd'},
2850 {"interval", required_argument, 0, 'i'},
2851 {"help", no_argument, 0, 'h'},
2852 {"Joules", no_argument, 0, 'J'},
2853 {"MSR", required_argument, 0, 'M'},
2854 {"msr", required_argument, 0, 'm'},
2855 {"Package", no_argument, 0, 'p'},
2856 {"processor", no_argument, 0, 'p'},
2857 {"Summary", no_argument, 0, 'S'},
2858 {"TCC", required_argument, 0, 'T'},
2859 {"version", no_argument, 0, 'v' },
2860 {0, 0, 0, 0 }
2861 };
103a8fea
LB		 2862
2863 progname = argv[0];
2864
d8af6f5f
LB		 2865 while ((opt = getopt_long_only(argc, argv, "C:c:Ddhi:JM:m:PpST:v",
2866 long_options, &option_index)) != -1) {
103a8fea 2867 switch (opt) {
d8af6f5f
LB		 2868 case 'C':
2869 sscanf(optarg, "%x", &extra_delta_offset64);
c98d5d94 2870 break;
d8af6f5f
LB		 2871 case 'c':
2872 sscanf(optarg, "%x", &extra_delta_offset32);
c98d5d94 2873 break;
d8af6f5f 2874 case 'D':
3b4d5c7f
AS		 2875 dump_only++;
2876 break;
d8af6f5f
LB		 2877 case 'd':
2878 debug++;
103a8fea 2879 break;
d8af6f5f
LB		 2880 case 'h':
2881 default:
2882 help();
2883 exit(1);
103a8fea
LB		 2884 case 'i':
2885 interval_sec = atoi(optarg);
2886 break;
d8af6f5f
LB		 2887 case 'J':
2888 rapl_joules++;
8e180f3c 2889 break;
d8af6f5f
LB		 2890 case 'M':
2891 sscanf(optarg, "%x", &extra_msr_offset64);
8e180f3c 2892 break;
2f32edf1
LB		 2893 case 'm':
2894 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 2895 break;
d8af6f5f
LB		 2896 case 'P':
2897 show_pkg_only++;
2898 break;
2899 case 'p':
2900 show_core_only++;
103a8fea 2901 break;
d8af6f5f
LB		 2902 case 'S':
2903 summary_only++;
889facbe
LB		 2904 break;
2905 case 'T':
2906 tcc_activation_temp_override = atoi(optarg);
2907 break;
d8af6f5f
LB		 2908 case 'v':
2909 print_version();
2910 exit(0);
5c56be9a 2911 break;
103a8fea
LB		 2912 }
2913 }
2914}
2915
2916int main(int argc, char **argv)
2917{
2918 cmdline(argc, argv);
2919
d8af6f5f
LB		 2920 if (debug)
2921 print_version();
103a8fea
LB		 2922
2923 turbostat_init();
2924
3b4d5c7f
AS		 2925 /* dump counters and exit */
2926 if (dump_only)
2927 return get_and_dump_counters();
2928
103a8fea
LB		 2929 /*
2930 * if any params left, it must be a command to fork
2931 */
2932 if (argc - optind)
2933 return fork_it(argv + optind);
2934 else
2935 turbostat_loop();
2936
2937 return 0;
2938}
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