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Linux 4.3-rc6
[mirror_ubuntu-zesty-kernel.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
d8af6f5f 36#include <getopt.h>
103a8fea
LB		 37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
88c3281f 40#include <sched.h>
2b92865e 41#include <cpuid.h>
98481e79
LB		 42#include <linux/capability.h>
43#include <errno.h>
103a8fea 44
103a8fea 45char *proc_stat = "/proc/stat";
d8af6f5f
LB		 46unsigned int interval_sec = 5;
47unsigned int debug;
48unsigned int rapl_joules;
49unsigned int summary_only;
50unsigned int dump_only;
103a8fea
LB		 51unsigned int skip_c0;
52unsigned int skip_c1;
53unsigned int do_nhm_cstates;
54unsigned int do_snb_cstates;
fb5d4327 55unsigned int do_knl_cstates;
ee7e38e3
LB		 56unsigned int do_pc2;
57unsigned int do_pc3;
58unsigned int do_pc6;
59unsigned int do_pc7;
ca58710f 60unsigned int do_c8_c9_c10;
0b2bb692 61unsigned int do_skl_residency;
144b44b1
LB		 62unsigned int do_slm_cstates;
63unsigned int use_c1_residency_msr;
103a8fea 64unsigned int has_aperf;
889facbe 65unsigned int has_epb;
fc04cc67 66unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 67unsigned int genuine_intel;
68unsigned int has_invariant_tsc;
d7899447 69unsigned int do_nhm_platform_info;
2f32edf1
LB		 70unsigned int extra_msr_offset32;
71unsigned int extra_msr_offset64;
8e180f3c
LB		 72unsigned int extra_delta_offset32;
73unsigned int extra_delta_offset64;
b2b34dfe 74unsigned int aperf_mperf_multiplier = 1;
1ed51011 75int do_smi;
103a8fea 76double bclk;
a2b7b749
LB		 77double base_hz;
78double tsc_tweak = 1.0;
103a8fea
LB		 79unsigned int show_pkg;
80unsigned int show_core;
81unsigned int show_cpu;
c98d5d94
LB		 82unsigned int show_pkg_only;
83unsigned int show_core_only;
84char *output_buffer, *outp;
889facbe
LB		 85unsigned int do_rapl;
86unsigned int do_dts;
87unsigned int do_ptm;
88unsigned int tcc_activation_temp;
89unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 90double rapl_power_units, rapl_time_units;
91double rapl_dram_energy_units, rapl_energy_units;
889facbe 92double rapl_joule_counter_range;
3a9a941d
LB		 93unsigned int do_core_perf_limit_reasons;
94unsigned int do_gfx_perf_limit_reasons;
95unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 96unsigned int crystal_hz;
97unsigned long long tsc_hz;
7ce7d5de 98int base_cpu;
889facbe 99
e6f9bb3c
LB		 100#define RAPL_PKG (1 << 0)
101 /* 0x610 MSR_PKG_POWER_LIMIT */
102 /* 0x611 MSR_PKG_ENERGY_STATUS */
103#define RAPL_PKG_PERF_STATUS (1 << 1)
104 /* 0x613 MSR_PKG_PERF_STATUS */
105#define RAPL_PKG_POWER_INFO (1 << 2)
106 /* 0x614 MSR_PKG_POWER_INFO */
107
108#define RAPL_DRAM (1 << 3)
109 /* 0x618 MSR_DRAM_POWER_LIMIT */
110 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 111#define RAPL_DRAM_PERF_STATUS (1 << 4)
112 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 113#define RAPL_DRAM_POWER_INFO (1 << 5)
114 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 115
0b2bb692 116#define RAPL_CORES (1 << 6)
e6f9bb3c
LB		 117 /* 0x638 MSR_PP0_POWER_LIMIT */
118 /* 0x639 MSR_PP0_ENERGY_STATUS */
0b2bb692 119#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 120 /* 0x63a MSR_PP0_POLICY */
121
0b2bb692 122#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 123 /* 0x640 MSR_PP1_POWER_LIMIT */
124 /* 0x641 MSR_PP1_ENERGY_STATUS */
125 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 126#define TJMAX_DEFAULT 100
127
128#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 129
130int aperf_mperf_unstable;
131int backwards_count;
132char *progname;
103a8fea 133
c98d5d94
LB		 134cpu_set_t *cpu_present_set, *cpu_affinity_set;
135size_t cpu_present_setsize, cpu_affinity_setsize;
136
137struct thread_data {
138 unsigned long long tsc;
139 unsigned long long aperf;
140 unsigned long long mperf;
144b44b1 141 unsigned long long c1;
2f32edf1 142 unsigned long long extra_msr64;
8e180f3c
LB		 143 unsigned long long extra_delta64;
144 unsigned long long extra_msr32;
145 unsigned long long extra_delta32;
1ed51011 146 unsigned int smi_count;
c98d5d94
LB		 147 unsigned int cpu_id;
148 unsigned int flags;
149#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
150#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
151} *thread_even, *thread_odd;
152
153struct core_data {
154 unsigned long long c3;
155 unsigned long long c6;
156 unsigned long long c7;
889facbe 157 unsigned int core_temp_c;
c98d5d94
LB		 158 unsigned int core_id;
159} *core_even, *core_odd;
160
161struct pkg_data {
162 unsigned long long pc2;
163 unsigned long long pc3;
164 unsigned long long pc6;
165 unsigned long long pc7;
ca58710f
KCA		 166 unsigned long long pc8;
167 unsigned long long pc9;
168 unsigned long long pc10;
0b2bb692
LB		 169 unsigned long long pkg_wtd_core_c0;
170 unsigned long long pkg_any_core_c0;
171 unsigned long long pkg_any_gfxe_c0;
172 unsigned long long pkg_both_core_gfxe_c0;
c98d5d94 173 unsigned int package_id;
889facbe
LB		 174 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
175 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
176 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
177 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
178 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
179 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
180 unsigned int pkg_temp_c;
181
c98d5d94
LB		 182} *package_even, *package_odd;
183
184#define ODD_COUNTERS thread_odd, core_odd, package_odd
185#define EVEN_COUNTERS thread_even, core_even, package_even
186
187#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
188 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
189 topo.num_threads_per_core + \
190 (core_no) * topo.num_threads_per_core + (thread_no))
191#define GET_CORE(core_base, core_no, pkg_no) \
192 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
193#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
194
195struct system_summary {
196 struct thread_data threads;
197 struct core_data cores;
198 struct pkg_data packages;
199} sum, average;
200
201
202struct topo_params {
203 int num_packages;
204 int num_cpus;
205 int num_cores;
206 int max_cpu_num;
207 int num_cores_per_pkg;
208 int num_threads_per_core;
209} topo;
210
211struct timeval tv_even, tv_odd, tv_delta;
212
213void setup_all_buffers(void);
214
215int cpu_is_not_present(int cpu)
d15cf7c1 216{
c98d5d94 217 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 218}
88c3281f 219/*
c98d5d94
LB		 220 * run func(thread, core, package) in topology order
221 * skip non-present cpus
88c3281f 222 */
c98d5d94
LB		 223
224int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
225 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 226{
c98d5d94 227 int retval, pkg_no, core_no, thread_no;
d15cf7c1 228
c98d5d94
LB		 229 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
230 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
231 for (thread_no = 0; thread_no <
232 topo.num_threads_per_core; ++thread_no) {
233 struct thread_data *t;
234 struct core_data *c;
235 struct pkg_data *p;
88c3281f 236
c98d5d94
LB		 237 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
238
239 if (cpu_is_not_present(t->cpu_id))
240 continue;
241
242 c = GET_CORE(core_base, core_no, pkg_no);
243 p = GET_PKG(pkg_base, pkg_no);
244
245 retval = func(t, c, p);
246 if (retval)
247 return retval;
248 }
249 }
250 }
251 return 0;
88c3281f
LB		 252}
253
254int cpu_migrate(int cpu)
255{
c98d5d94
LB		 256 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
257 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
258 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 259 return -1;
260 else
261 return 0;
262}
263
15aaa346 264int get_msr(int cpu, off_t offset, unsigned long long *msr)
103a8fea
LB		 265{
266 ssize_t retval;
103a8fea
LB		 267 char pathname[32];
268 int fd;
269
270 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
271 fd = open(pathname, O_RDONLY);
15aaa346 272 if (fd < 0)
98481e79 273 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 274
15aaa346 275 retval = pread(fd, msr, sizeof *msr, offset);
103a8fea 276 close(fd);
15aaa346 277
98481e79
LB		 278 if (retval != sizeof *msr)
279 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
15aaa346
LB		 280
281 return 0;
103a8fea
LB		 282}
283
fc04cc67
LB		 284/*
285 * Example Format w/ field column widths:
286 *
e7c95ff3
LB		 287 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
288 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 289 */
290
a829eb4d 291void print_header(void)
103a8fea
LB		 292{
293 if (show_pkg)
e7c95ff3 294 outp += sprintf(outp, " Package");
103a8fea 295 if (show_core)
e7c95ff3 296 outp += sprintf(outp, " Core");
103a8fea 297 if (show_cpu)
e7c95ff3 298 outp += sprintf(outp, " CPU");
fc04cc67 299 if (has_aperf)
e7c95ff3 300 outp += sprintf(outp, " Avg_MHz");
d7899447 301 if (has_aperf)
e7c95ff3 302 outp += sprintf(outp, " %%Busy");
103a8fea 303 if (has_aperf)
e7c95ff3
LB		 304 outp += sprintf(outp, " Bzy_MHz");
305 outp += sprintf(outp, " TSC_MHz");
1cc21f7b 306
8e180f3c 307 if (extra_delta_offset32)
e7c95ff3 308 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 309 if (extra_delta_offset64)
e7c95ff3 310 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 311 if (extra_msr_offset32)
e7c95ff3 312 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 313 if (extra_msr_offset64)
e7c95ff3 314 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
1cc21f7b
LB		 315
316 if (!debug)
317 goto done;
318
319 if (do_smi)
320 outp += sprintf(outp, " SMI");
321
103a8fea 322 if (do_nhm_cstates)
e7c95ff3 323 outp += sprintf(outp, " CPU%%c1");
fb5d4327 324 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
e7c95ff3 325 outp += sprintf(outp, " CPU%%c3");
103a8fea 326 if (do_nhm_cstates)
e7c95ff3 327 outp += sprintf(outp, " CPU%%c6");
103a8fea 328 if (do_snb_cstates)
e7c95ff3 329 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 330
331 if (do_dts)
e7c95ff3 332 outp += sprintf(outp, " CoreTmp");
889facbe 333 if (do_ptm)
e7c95ff3 334 outp += sprintf(outp, " PkgTmp");
889facbe 335
0b2bb692
LB		 336 if (do_skl_residency) {
337 outp += sprintf(outp, " Totl%%C0");
338 outp += sprintf(outp, " Any%%C0");
339 outp += sprintf(outp, " GFX%%C0");
340 outp += sprintf(outp, " CPUGFX%%");
341 }
342
ee7e38e3 343 if (do_pc2)
e7c95ff3 344 outp += sprintf(outp, " Pkg%%pc2");
ee7e38e3 345 if (do_pc3)
e7c95ff3 346 outp += sprintf(outp, " Pkg%%pc3");
ee7e38e3 347 if (do_pc6)
e7c95ff3 348 outp += sprintf(outp, " Pkg%%pc6");
ee7e38e3 349 if (do_pc7)
e7c95ff3 350 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 351 if (do_c8_c9_c10) {
e7c95ff3
LB		 352 outp += sprintf(outp, " Pkg%%pc8");
353 outp += sprintf(outp, " Pkg%%pc9");
354 outp += sprintf(outp, " Pk%%pc10");
ca58710f 355 }
103a8fea 356
5c56be9a
DB		 357 if (do_rapl && !rapl_joules) {
358 if (do_rapl & RAPL_PKG)
e7c95ff3 359 outp += sprintf(outp, " PkgWatt");
5c56be9a 360 if (do_rapl & RAPL_CORES)
e7c95ff3 361 outp += sprintf(outp, " CorWatt");
5c56be9a 362 if (do_rapl & RAPL_GFX)
e7c95ff3 363 outp += sprintf(outp, " GFXWatt");
5c56be9a 364 if (do_rapl & RAPL_DRAM)
e7c95ff3 365 outp += sprintf(outp, " RAMWatt");
5c56be9a 366 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 367 outp += sprintf(outp, " PKG_%%");
5c56be9a 368 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 369 outp += sprintf(outp, " RAM_%%");
d7899447 370 } else if (do_rapl && rapl_joules) {
5c56be9a 371 if (do_rapl & RAPL_PKG)
e7c95ff3 372 outp += sprintf(outp, " Pkg_J");
5c56be9a 373 if (do_rapl & RAPL_CORES)
e7c95ff3 374 outp += sprintf(outp, " Cor_J");
5c56be9a 375 if (do_rapl & RAPL_GFX)
e7c95ff3 376 outp += sprintf(outp, " GFX_J");
5c56be9a 377 if (do_rapl & RAPL_DRAM)
bd6906ed 378 outp += sprintf(outp, " RAM_J");
5c56be9a 379 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 380 outp += sprintf(outp, " PKG_%%");
5c56be9a 381 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 382 outp += sprintf(outp, " RAM_%%");
383 outp += sprintf(outp, " time");
889facbe 384
5c56be9a 385 }
1cc21f7b 386 done:
c98d5d94 387 outp += sprintf(outp, "\n");
103a8fea
LB		 388}
389
c98d5d94
LB		 390int dump_counters(struct thread_data *t, struct core_data *c,
391 struct pkg_data *p)
103a8fea 392{
3b4d5c7f 393 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 394
395 if (t) {
3b4d5c7f
AS		 396 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
397 t->cpu_id, t->flags);
398 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
399 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
400 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
401 outp += sprintf(outp, "c1: %016llX\n", t->c1);
402 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 403 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 404 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 405 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 406 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 407 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 408 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 409 extra_msr_offset64, t->extra_msr64);
1ed51011 410 if (do_smi)
3b4d5c7f 411 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 412 }
103a8fea 413
c98d5d94 414 if (c) {
3b4d5c7f
AS		 415 outp += sprintf(outp, "core: %d\n", c->core_id);
416 outp += sprintf(outp, "c3: %016llX\n", c->c3);
417 outp += sprintf(outp, "c6: %016llX\n", c->c6);
418 outp += sprintf(outp, "c7: %016llX\n", c->c7);
419 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 420 }
103a8fea 421
c98d5d94 422 if (p) {
3b4d5c7f 423 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 424
425 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
426 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
427 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
428 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
429
3b4d5c7f 430 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
ee7e38e3
LB		 431 if (do_pc3)
432 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
433 if (do_pc6)
434 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
435 if (do_pc7)
436 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 437 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
438 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
439 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
440 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
441 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
442 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
443 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
444 outp += sprintf(outp, "Throttle PKG: %0X\n",
445 p->rapl_pkg_perf_status);
446 outp += sprintf(outp, "Throttle RAM: %0X\n",
447 p->rapl_dram_perf_status);
448 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 449 }
3b4d5c7f
AS		 450
451 outp += sprintf(outp, "\n");
452
c98d5d94 453 return 0;
103a8fea
LB		 454}
455
e23da037
LB		 456/*
457 * column formatting convention & formats
e23da037 458 */
c98d5d94
LB		 459int format_counters(struct thread_data *t, struct core_data *c,
460 struct pkg_data *p)
103a8fea
LB		 461{
462 double interval_float;
fc04cc67 463 char *fmt8;
103a8fea 464
c98d5d94
LB		 465 /* if showing only 1st thread in core and this isn't one, bail out */
466 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
467 return 0;
468
469 /* if showing only 1st thread in pkg and this isn't one, bail out */
470 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
471 return 0;
472
103a8fea
LB		 473 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
474
c98d5d94
LB		 475 /* topo columns, print blanks on 1st (average) line */
476 if (t == &average.threads) {
103a8fea 477 if (show_pkg)
fc04cc67 478 outp += sprintf(outp, " -");
103a8fea 479 if (show_core)
fc04cc67 480 outp += sprintf(outp, " -");
103a8fea 481 if (show_cpu)
fc04cc67 482 outp += sprintf(outp, " -");
103a8fea 483 } else {
c98d5d94
LB		 484 if (show_pkg) {
485 if (p)
fc04cc67 486 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 487 else
fc04cc67 488 outp += sprintf(outp, " -");
c98d5d94 489 }
c98d5d94
LB		 490 if (show_core) {
491 if (c)
fc04cc67 492 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 493 else
fc04cc67 494 outp += sprintf(outp, " -");
c98d5d94 495 }
103a8fea 496 if (show_cpu)
fc04cc67 497 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 498 }
fc04cc67 499
d7899447 500 /* Avg_MHz */
fc04cc67
LB		 501 if (has_aperf)
502 outp += sprintf(outp, "%8.0f",
503 1.0 / units * t->aperf / interval_float);
504
d7899447
LB		 505 /* %Busy */
506 if (has_aperf) {
103a8fea 507 if (!skip_c0)
a2b7b749 508 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
103a8fea 509 else
fc04cc67 510 outp += sprintf(outp, "********");
103a8fea
LB		 511 }
512
d7899447 513 /* Bzy_MHz */
fc04cc67
LB		 514 if (has_aperf)
515 outp += sprintf(outp, "%8.0f",
a2b7b749 516 1.0 * t->tsc * tsc_tweak / units * t->aperf / t->mperf / interval_float);
103a8fea 517
d7899447 518 /* TSC_MHz */
fc04cc67 519 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 520
8e180f3c
LB		 521 /* delta */
522 if (extra_delta_offset32)
523 outp += sprintf(outp, " %11llu", t->extra_delta32);
524
525 /* DELTA */
526 if (extra_delta_offset64)
527 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 528 /* msr */
529 if (extra_msr_offset32)
8e180f3c 530 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 531
130ff304 532 /* MSR */
2f32edf1
LB		 533 if (extra_msr_offset64)
534 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 535
1cc21f7b
LB		 536 if (!debug)
537 goto done;
538
539 /* SMI */
540 if (do_smi)
541 outp += sprintf(outp, "%8d", t->smi_count);
542
103a8fea
LB		 543 if (do_nhm_cstates) {
544 if (!skip_c1)
fc04cc67 545 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 546 else
fc04cc67 547 outp += sprintf(outp, "********");
103a8fea 548 }
c98d5d94
LB		 549
550 /* print per-core data only for 1st thread in core */
551 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
552 goto done;
553
fb5d4327 554 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
fc04cc67 555 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 556 if (do_nhm_cstates)
fc04cc67 557 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 558 if (do_snb_cstates)
fc04cc67 559 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 560
889facbe 561 if (do_dts)
fc04cc67 562 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 563
c98d5d94
LB		 564 /* print per-package data only for 1st core in package */
565 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
566 goto done;
567
0b2bb692 568 /* PkgTmp */
889facbe 569 if (do_ptm)
fc04cc67 570 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 571
0b2bb692
LB		 572 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
573 if (do_skl_residency) {
574 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
575 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
576 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
577 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
578 }
579
ee7e38e3 580 if (do_pc2)
fc04cc67 581 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
ee7e38e3 582 if (do_pc3)
fc04cc67 583 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
ee7e38e3 584 if (do_pc6)
fc04cc67 585 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
ee7e38e3 586 if (do_pc7)
fc04cc67 587 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 588 if (do_c8_c9_c10) {
fc04cc67
LB		 589 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
590 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
591 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 592 }
889facbe
LB		 593
594 /*
595 * If measurement interval exceeds minimum RAPL Joule Counter range,
596 * indicate that results are suspect by printing "**" in fraction place.
597 */
fc04cc67
LB		 598 if (interval_float < rapl_joule_counter_range)
599 fmt8 = "%8.2f";
600 else
601 fmt8 = " %6.0f**";
889facbe 602
5c56be9a
DB		 603 if (do_rapl && !rapl_joules) {
604 if (do_rapl & RAPL_PKG)
fc04cc67 605 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 606 if (do_rapl & RAPL_CORES)
fc04cc67 607 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 608 if (do_rapl & RAPL_GFX)
fc04cc67 609 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 610 if (do_rapl & RAPL_DRAM)
40ee8e3b 611 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
5c56be9a 612 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 613 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 614 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 615 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 616 } else if (do_rapl && rapl_joules) {
5c56be9a 617 if (do_rapl & RAPL_PKG)
fc04cc67 618 outp += sprintf(outp, fmt8,
5c56be9a
DB		 619 p->energy_pkg * rapl_energy_units);
620 if (do_rapl & RAPL_CORES)
fc04cc67 621 outp += sprintf(outp, fmt8,
5c56be9a
DB		 622 p->energy_cores * rapl_energy_units);
623 if (do_rapl & RAPL_GFX)
fc04cc67 624 outp += sprintf(outp, fmt8,
5c56be9a
DB		 625 p->energy_gfx * rapl_energy_units);
626 if (do_rapl & RAPL_DRAM)
fc04cc67 627 outp += sprintf(outp, fmt8,
40ee8e3b 628 p->energy_dram * rapl_dram_energy_units);
5c56be9a 629 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 630 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 631 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 632 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 633
d7899447 634 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 635 }
c98d5d94 636done:
c98d5d94
LB		 637 outp += sprintf(outp, "\n");
638
639 return 0;
103a8fea
LB		 640}
641
c98d5d94
LB		 642void flush_stdout()
643{
644 fputs(output_buffer, stdout);
ddac0d68 645 fflush(stdout);
c98d5d94
LB		 646 outp = output_buffer;
647}
648void flush_stderr()
649{
650 fputs(output_buffer, stderr);
651 outp = output_buffer;
652}
653void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 654{
e23da037 655 static int printed;
103a8fea 656
e23da037
LB		 657 if (!printed || !summary_only)
658 print_header();
103a8fea 659
c98d5d94
LB		 660 if (topo.num_cpus > 1)
661 format_counters(&average.threads, &average.cores,
662 &average.packages);
103a8fea 663
e23da037
LB		 664 printed = 1;
665
666 if (summary_only)
667 return;
668
c98d5d94 669 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 670}
671
889facbe
LB		 672#define DELTA_WRAP32(new, old) \
673 if (new > old) { \
674 old = new - old; \
675 } else { \
676 old = 0x100000000 + new - old; \
677 }
678
c98d5d94
LB		 679void
680delta_package(struct pkg_data *new, struct pkg_data *old)
681{
0b2bb692
LB		 682
683 if (do_skl_residency) {
684 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
685 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
686 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
687 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
688 }
c98d5d94 689 old->pc2 = new->pc2 - old->pc2;
ee7e38e3
LB		 690 if (do_pc3)
691 old->pc3 = new->pc3 - old->pc3;
692 if (do_pc6)
693 old->pc6 = new->pc6 - old->pc6;
694 if (do_pc7)
695 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 696 old->pc8 = new->pc8 - old->pc8;
697 old->pc9 = new->pc9 - old->pc9;
698 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 699 old->pkg_temp_c = new->pkg_temp_c;
700
701 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
702 DELTA_WRAP32(new->energy_cores, old->energy_cores);
703 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
704 DELTA_WRAP32(new->energy_dram, old->energy_dram);
705 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
706 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 707}
103a8fea 708
c98d5d94
LB		 709void
710delta_core(struct core_data *new, struct core_data *old)
103a8fea 711{
c98d5d94
LB		 712 old->c3 = new->c3 - old->c3;
713 old->c6 = new->c6 - old->c6;
714 old->c7 = new->c7 - old->c7;
889facbe 715 old->core_temp_c = new->core_temp_c;
c98d5d94 716}
103a8fea 717
c3ae331d
LB		 718/*
719 * old = new - old
720 */
c98d5d94
LB		 721void
722delta_thread(struct thread_data *new, struct thread_data *old,
723 struct core_data *core_delta)
724{
725 old->tsc = new->tsc - old->tsc;
726
727 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 728 if (old->tsc < (1000 * 1000))
729 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
730 "You can disable all c-states by booting with \"idle=poll\"\n"
731 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 732
c98d5d94 733 old->c1 = new->c1 - old->c1;
103a8fea 734
a729617c
LB		 735 if (has_aperf) {
736 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
737 old->aperf = new->aperf - old->aperf;
738 old->mperf = new->mperf - old->mperf;
739 } else {
103a8fea 740
a729617c
LB		 741 if (!aperf_mperf_unstable) {
742 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
743 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
744 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 745
a729617c
LB		 746 aperf_mperf_unstable = 1;
747 }
748 /*
749 * mperf delta is likely a huge "positive" number
750 * can not use it for calculating c0 time
751 */
752 skip_c0 = 1;
753 skip_c1 = 1;
103a8fea 754 }
c98d5d94 755 }
103a8fea 756
103a8fea 757
144b44b1
LB		 758 if (use_c1_residency_msr) {
759 /*
760 * Some models have a dedicated C1 residency MSR,
761 * which should be more accurate than the derivation below.
762 */
763 } else {
764 /*
765 * As counter collection is not atomic,
766 * it is possible for mperf's non-halted cycles + idle states
767 * to exceed TSC's all cycles: show c1 = 0% in that case.
768 */
769 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
770 old->c1 = 0;
771 else {
772 /* normal case, derive c1 */
773 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 774 - core_delta->c6 - core_delta->c7;
144b44b1 775 }
c98d5d94 776 }
c3ae331d 777
c98d5d94 778 if (old->mperf == 0) {
d8af6f5f 779 if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 780 old->mperf = 1; /* divide by 0 protection */
103a8fea 781 }
c98d5d94 782
8e180f3c
LB		 783 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
784 old->extra_delta32 &= 0xFFFFFFFF;
785
786 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
787
c98d5d94 788 /*
8e180f3c 789 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 790 */
2f32edf1
LB		 791 old->extra_msr32 = new->extra_msr32;
792 old->extra_msr64 = new->extra_msr64;
1ed51011
LB		 793
794 if (do_smi)
795 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 796}
797
798int delta_cpu(struct thread_data *t, struct core_data *c,
799 struct pkg_data *p, struct thread_data *t2,
800 struct core_data *c2, struct pkg_data *p2)
801{
802 /* calculate core delta only for 1st thread in core */
803 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
804 delta_core(c, c2);
805
806 /* always calculate thread delta */
807 delta_thread(t, t2, c2); /* c2 is core delta */
808
809 /* calculate package delta only for 1st core in package */
810 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
811 delta_package(p, p2);
812
103a8fea
LB		 813 return 0;
814}
815
c98d5d94
LB		 816void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
817{
818 t->tsc = 0;
819 t->aperf = 0;
820 t->mperf = 0;
821 t->c1 = 0;
822
1ed51011 823 t->smi_count = 0;
8e180f3c
LB		 824 t->extra_delta32 = 0;
825 t->extra_delta64 = 0;
826
c98d5d94
LB		 827 /* tells format_counters to dump all fields from this set */
828 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
829
830 c->c3 = 0;
831 c->c6 = 0;
832 c->c7 = 0;
889facbe 833 c->core_temp_c = 0;
c98d5d94 834
0b2bb692
LB		 835 p->pkg_wtd_core_c0 = 0;
836 p->pkg_any_core_c0 = 0;
837 p->pkg_any_gfxe_c0 = 0;
838 p->pkg_both_core_gfxe_c0 = 0;
839
c98d5d94 840 p->pc2 = 0;
ee7e38e3
LB		 841 if (do_pc3)
842 p->pc3 = 0;
843 if (do_pc6)
844 p->pc6 = 0;
845 if (do_pc7)
846 p->pc7 = 0;
ca58710f
KCA		 847 p->pc8 = 0;
848 p->pc9 = 0;
849 p->pc10 = 0;
889facbe
LB		 850
851 p->energy_pkg = 0;
852 p->energy_dram = 0;
853 p->energy_cores = 0;
854 p->energy_gfx = 0;
855 p->rapl_pkg_perf_status = 0;
856 p->rapl_dram_perf_status = 0;
857 p->pkg_temp_c = 0;
c98d5d94
LB		 858}
859int sum_counters(struct thread_data *t, struct core_data *c,
860 struct pkg_data *p)
103a8fea 861{
c98d5d94
LB		 862 average.threads.tsc += t->tsc;
863 average.threads.aperf += t->aperf;
864 average.threads.mperf += t->mperf;
865 average.threads.c1 += t->c1;
103a8fea 866
8e180f3c
LB		 867 average.threads.extra_delta32 += t->extra_delta32;
868 average.threads.extra_delta64 += t->extra_delta64;
869
c98d5d94
LB		 870 /* sum per-core values only for 1st thread in core */
871 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
872 return 0;
103a8fea 873
c98d5d94
LB		 874 average.cores.c3 += c->c3;
875 average.cores.c6 += c->c6;
876 average.cores.c7 += c->c7;
877
889facbe
LB		 878 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
879
c98d5d94
LB		 880 /* sum per-pkg values only for 1st core in pkg */
881 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
882 return 0;
883
0b2bb692
LB		 884 if (do_skl_residency) {
885 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
886 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
887 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
888 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
889 }
890
c98d5d94 891 average.packages.pc2 += p->pc2;
ee7e38e3
LB		 892 if (do_pc3)
893 average.packages.pc3 += p->pc3;
894 if (do_pc6)
895 average.packages.pc6 += p->pc6;
896 if (do_pc7)
897 average.packages.pc7 += p->pc7;
ca58710f
KCA		 898 average.packages.pc8 += p->pc8;
899 average.packages.pc9 += p->pc9;
900 average.packages.pc10 += p->pc10;
c98d5d94 901
889facbe
LB		 902 average.packages.energy_pkg += p->energy_pkg;
903 average.packages.energy_dram += p->energy_dram;
904 average.packages.energy_cores += p->energy_cores;
905 average.packages.energy_gfx += p->energy_gfx;
906
907 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
908
909 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
910 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 911 return 0;
912}
913/*
914 * sum the counters for all cpus in the system
915 * compute the weighted average
916 */
917void compute_average(struct thread_data *t, struct core_data *c,
918 struct pkg_data *p)
919{
920 clear_counters(&average.threads, &average.cores, &average.packages);
921
922 for_all_cpus(sum_counters, t, c, p);
923
924 average.threads.tsc /= topo.num_cpus;
925 average.threads.aperf /= topo.num_cpus;
926 average.threads.mperf /= topo.num_cpus;
927 average.threads.c1 /= topo.num_cpus;
928
8e180f3c
LB		 929 average.threads.extra_delta32 /= topo.num_cpus;
930 average.threads.extra_delta32 &= 0xFFFFFFFF;
931
932 average.threads.extra_delta64 /= topo.num_cpus;
933
c98d5d94
LB		 934 average.cores.c3 /= topo.num_cores;
935 average.cores.c6 /= topo.num_cores;
936 average.cores.c7 /= topo.num_cores;
937
0b2bb692
LB		 938 if (do_skl_residency) {
939 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
940 average.packages.pkg_any_core_c0 /= topo.num_packages;
941 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
942 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
943 }
944
c98d5d94 945 average.packages.pc2 /= topo.num_packages;
ee7e38e3
LB		 946 if (do_pc3)
947 average.packages.pc3 /= topo.num_packages;
948 if (do_pc6)
949 average.packages.pc6 /= topo.num_packages;
950 if (do_pc7)
951 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 952
953 average.packages.pc8 /= topo.num_packages;
954 average.packages.pc9 /= topo.num_packages;
955 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 956}
957
c98d5d94 958static unsigned long long rdtsc(void)
103a8fea 959{
c98d5d94 960 unsigned int low, high;
15aaa346 961
c98d5d94 962 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 963
c98d5d94
LB		 964 return low | ((unsigned long long)high) << 32;
965}
15aaa346 966
15aaa346 967
c98d5d94
LB		 968/*
969 * get_counters(...)
970 * migrate to cpu
971 * acquire and record local counters for that cpu
972 */
973int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
974{
975 int cpu = t->cpu_id;
889facbe 976 unsigned long long msr;
88c3281f 977
e52966c0
LB		 978 if (cpu_migrate(cpu)) {
979 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
c98d5d94 980 return -1;
e52966c0 981 }
15aaa346 982
c98d5d94
LB		 983 t->tsc = rdtsc(); /* we are running on local CPU of interest */
984
985 if (has_aperf) {
9c63a650 986 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 987 return -3;
9c63a650 988 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 989 return -4;
b2b34dfe
HC		 990 t->aperf = t->aperf * aperf_mperf_multiplier;
991 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 992 }
993
1ed51011
LB		 994 if (do_smi) {
995 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
996 return -5;
997 t->smi_count = msr & 0xFFFFFFFF;
998 }
8e180f3c 999 if (extra_delta_offset32) {
889facbe 1000 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 1001 return -5;
889facbe 1002 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1003 }
1004
1005 if (extra_delta_offset64)
1006 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 1007 return -5;
1008
8e180f3c 1009 if (extra_msr_offset32) {
889facbe 1010 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 1011 return -5;
889facbe 1012 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1013 }
1014
2f32edf1
LB		 1015 if (extra_msr_offset64)
1016 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 1017 return -5;
1018
144b44b1
LB		 1019 if (use_c1_residency_msr) {
1020 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1021 return -6;
1022 }
1023
c98d5d94
LB		 1024 /* collect core counters only for 1st thread in core */
1025 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1026 return 0;
1027
fb5d4327 1028 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1029 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1030 return -6;
144b44b1
LB		 1031 }
1032
fb5d4327 1033 if (do_nhm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1034 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1035 return -7;
fb5d4327
DC		 1036 } else if (do_knl_cstates) {
1037 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1038 return -7;
c98d5d94
LB		 1039 }
1040
1041 if (do_snb_cstates)
1042 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1043 return -8;
1044
889facbe
LB		 1045 if (do_dts) {
1046 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1047 return -9;
1048 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1049 }
1050
1051
c98d5d94
LB		 1052 /* collect package counters only for 1st core in package */
1053 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1054 return 0;
1055
0b2bb692
LB		 1056 if (do_skl_residency) {
1057 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1058 return -10;
1059 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1060 return -11;
1061 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1062 return -12;
1063 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1064 return -13;
1065 }
ee7e38e3 1066 if (do_pc3)
c98d5d94
LB		 1067 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1068 return -9;
ee7e38e3 1069 if (do_pc6)
c98d5d94
LB		 1070 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1071 return -10;
ee7e38e3 1072 if (do_pc2)
c98d5d94
LB		 1073 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1074 return -11;
ee7e38e3 1075 if (do_pc7)
c98d5d94
LB		 1076 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1077 return -12;
ca58710f
KCA		 1078 if (do_c8_c9_c10) {
1079 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1080 return -13;
1081 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1082 return -13;
1083 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1084 return -13;
1085 }
889facbe
LB		 1086 if (do_rapl & RAPL_PKG) {
1087 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1088 return -13;
1089 p->energy_pkg = msr & 0xFFFFFFFF;
1090 }
1091 if (do_rapl & RAPL_CORES) {
1092 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1093 return -14;
1094 p->energy_cores = msr & 0xFFFFFFFF;
1095 }
1096 if (do_rapl & RAPL_DRAM) {
1097 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1098 return -15;
1099 p->energy_dram = msr & 0xFFFFFFFF;
1100 }
1101 if (do_rapl & RAPL_GFX) {
1102 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1103 return -16;
1104 p->energy_gfx = msr & 0xFFFFFFFF;
1105 }
1106 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1107 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1108 return -16;
1109 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1110 }
1111 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1112 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1113 return -16;
1114 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1115 }
1116 if (do_ptm) {
1117 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1118 return -17;
1119 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1120 }
15aaa346 1121 return 0;
103a8fea
LB		 1122}
1123
ee7e38e3
LB		 1124/*
1125 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1126 * If you change the values, note they are used both in comparisons
1127 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1128 */
1129
1130#define PCLUKN 0 /* Unknown */
1131#define PCLRSV 1 /* Reserved */
1132#define PCL__0 2 /* PC0 */
1133#define PCL__1 3 /* PC1 */
1134#define PCL__2 4 /* PC2 */
1135#define PCL__3 5 /* PC3 */
1136#define PCL__4 6 /* PC4 */
1137#define PCL__6 7 /* PC6 */
1138#define PCL_6N 8 /* PC6 No Retention */
1139#define PCL_6R 9 /* PC6 Retention */
1140#define PCL__7 10 /* PC7 */
1141#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1142#define PCL__8 12 /* PC8 */
1143#define PCL__9 13 /* PC9 */
1144#define PCLUNL 14 /* Unlimited */
ee7e38e3
LB		 1145
1146int pkg_cstate_limit = PCLUKN;
1147char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
0b2bb692 1148 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
ee7e38e3 1149
e9257f5f
LB		 1150int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1151int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1152int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1153int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1154int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1155int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 1156
a2b7b749
LB		 1157
1158static void
1159calculate_tsc_tweak()
1160{
1161 unsigned long long msr;
1162 unsigned int base_ratio;
1163
1164 get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
1165 base_ratio = (msr >> 8) & 0xFF;
1166 base_hz = base_ratio * bclk * 1000000;
1167 tsc_tweak = base_hz / tsc_hz;
1168}
1169
fcd17211
LB		 1170static void
1171dump_nhm_platform_info(void)
103a8fea
LB		 1172{
1173 unsigned long long msr;
1174 unsigned int ratio;
1175
7ce7d5de 1176 get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
103a8fea 1177
bfae2052 1178 fprintf(stderr, "cpu%d: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 1179
103a8fea 1180 ratio = (msr >> 40) & 0xFF;
8f61f359 1181 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
103a8fea
LB		 1182 ratio, bclk, ratio * bclk);
1183
1184 ratio = (msr >> 8) & 0xFF;
8f61f359 1185 fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
103a8fea
LB		 1186 ratio, bclk, ratio * bclk);
1187
7ce7d5de 1188 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
bfae2052
LB		 1189 fprintf(stderr, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1190 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 1191
fcd17211
LB		 1192 return;
1193}
1194
1195static void
1196dump_hsw_turbo_ratio_limits(void)
1197{
1198 unsigned long long msr;
1199 unsigned int ratio;
1200
7ce7d5de 1201 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 1202
bfae2052 1203 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 1204
1205 ratio = (msr >> 8) & 0xFF;
1206 if (ratio)
1207 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
1208 ratio, bclk, ratio * bclk);
1209
1210 ratio = (msr >> 0) & 0xFF;
1211 if (ratio)
1212 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
1213 ratio, bclk, ratio * bclk);
1214 return;
1215}
1216
1217static void
1218dump_ivt_turbo_ratio_limits(void)
1219{
1220 unsigned long long msr;
1221 unsigned int ratio;
6574a5d5 1222
7ce7d5de 1223 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 1224
bfae2052 1225 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1226
1227 ratio = (msr >> 56) & 0xFF;
1228 if (ratio)
1229 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1230 ratio, bclk, ratio * bclk);
1231
1232 ratio = (msr >> 48) & 0xFF;
1233 if (ratio)
1234 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1235 ratio, bclk, ratio * bclk);
1236
1237 ratio = (msr >> 40) & 0xFF;
1238 if (ratio)
1239 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1240 ratio, bclk, ratio * bclk);
1241
1242 ratio = (msr >> 32) & 0xFF;
1243 if (ratio)
1244 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1245 ratio, bclk, ratio * bclk);
1246
1247 ratio = (msr >> 24) & 0xFF;
1248 if (ratio)
1249 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1250 ratio, bclk, ratio * bclk);
1251
1252 ratio = (msr >> 16) & 0xFF;
1253 if (ratio)
1254 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1255 ratio, bclk, ratio * bclk);
1256
1257 ratio = (msr >> 8) & 0xFF;
1258 if (ratio)
1259 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1260 ratio, bclk, ratio * bclk);
1261
1262 ratio = (msr >> 0) & 0xFF;
1263 if (ratio)
1264 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1265 ratio, bclk, ratio * bclk);
fcd17211
LB		 1266 return;
1267}
6574a5d5 1268
fcd17211
LB		 1269static void
1270dump_nhm_turbo_ratio_limits(void)
1271{
1272 unsigned long long msr;
1273 unsigned int ratio;
103a8fea 1274
7ce7d5de 1275 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
103a8fea 1276
bfae2052 1277 fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1278
1279 ratio = (msr >> 56) & 0xFF;
1280 if (ratio)
1281 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1282 ratio, bclk, ratio * bclk);
1283
1284 ratio = (msr >> 48) & 0xFF;
1285 if (ratio)
1286 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1287 ratio, bclk, ratio * bclk);
1288
1289 ratio = (msr >> 40) & 0xFF;
1290 if (ratio)
1291 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1292 ratio, bclk, ratio * bclk);
1293
1294 ratio = (msr >> 32) & 0xFF;
1295 if (ratio)
1296 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1297 ratio, bclk, ratio * bclk);
1298
103a8fea
LB		 1299 ratio = (msr >> 24) & 0xFF;
1300 if (ratio)
1301 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1302 ratio, bclk, ratio * bclk);
1303
1304 ratio = (msr >> 16) & 0xFF;
1305 if (ratio)
1306 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1307 ratio, bclk, ratio * bclk);
1308
1309 ratio = (msr >> 8) & 0xFF;
1310 if (ratio)
1311 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1312 ratio, bclk, ratio * bclk);
1313
1314 ratio = (msr >> 0) & 0xFF;
1315 if (ratio)
1316 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1317 ratio, bclk, ratio * bclk);
fcd17211
LB		 1318 return;
1319}
3a9a941d 1320
fb5d4327
DC		 1321static void
1322dump_knl_turbo_ratio_limits(void)
1323{
1324 int cores;
1325 unsigned int ratio;
1326 unsigned long long msr;
1327 int delta_cores;
1328 int delta_ratio;
1329 int i;
1330
7ce7d5de 1331 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
fb5d4327 1332
bfae2052
LB		 1333 fprintf(stderr, "cpu%d: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
1334 base_cpu, msr);
fb5d4327
DC		 1335
1336 /**
1337 * Turbo encoding in KNL is as follows:
1338 * [7:0] -- Base value of number of active cores of bucket 1.
1339 * [15:8] -- Base value of freq ratio of bucket 1.
1340 * [20:16] -- +ve delta of number of active cores of bucket 2.
1341 * i.e. active cores of bucket 2 =
1342 * active cores of bucket 1 + delta
1343 * [23:21] -- Negative delta of freq ratio of bucket 2.
1344 * i.e. freq ratio of bucket 2 =
1345 * freq ratio of bucket 1 - delta
1346 * [28:24]-- +ve delta of number of active cores of bucket 3.
1347 * [31:29]-- -ve delta of freq ratio of bucket 3.
1348 * [36:32]-- +ve delta of number of active cores of bucket 4.
1349 * [39:37]-- -ve delta of freq ratio of bucket 4.
1350 * [44:40]-- +ve delta of number of active cores of bucket 5.
1351 * [47:45]-- -ve delta of freq ratio of bucket 5.
1352 * [52:48]-- +ve delta of number of active cores of bucket 6.
1353 * [55:53]-- -ve delta of freq ratio of bucket 6.
1354 * [60:56]-- +ve delta of number of active cores of bucket 7.
1355 * [63:61]-- -ve delta of freq ratio of bucket 7.
1356 */
1357 cores = msr & 0xFF;
1358 ratio = (msr >> 8) && 0xFF;
1359 if (ratio > 0)
1360 fprintf(stderr,
1361 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1362 ratio, bclk, ratio * bclk, cores);
1363
1364 for (i = 16; i < 64; i = i + 8) {
1365 delta_cores = (msr >> i) & 0x1F;
1366 delta_ratio = (msr >> (i + 5)) && 0x7;
1367 if (!delta_cores || !delta_ratio)
1368 return;
1369 cores = cores + delta_cores;
1370 ratio = ratio - delta_ratio;
1371
1372 /** -ve ratios will make successive ratio calculations
1373 * negative. Hence return instead of carrying on.
1374 */
1375 if (ratio > 0)
1376 fprintf(stderr,
1377 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
1378 ratio, bclk, ratio * bclk, cores);
1379 }
1380}
1381
fcd17211
LB		 1382static void
1383dump_nhm_cst_cfg(void)
1384{
1385 unsigned long long msr;
1386
7ce7d5de 1387 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
fcd17211
LB		 1388
1389#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1390#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1391
bfae2052 1392 fprintf(stderr, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
fcd17211
LB		 1393
1394 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
1395 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1396 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1397 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1398 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1399 (msr & (1 << 15)) ? "" : "UN",
1400 (unsigned int)msr & 7,
1401 pkg_cstate_limit_strings[pkg_cstate_limit]);
1402 return;
103a8fea
LB		 1403}
1404
6fb3143b
LB		 1405static void
1406dump_config_tdp(void)
1407{
1408 unsigned long long msr;
1409
1410 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
1411 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
1412 fprintf(stderr, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
1413
1414 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
1415 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
1416 if (msr) {
1417 fprintf(stderr, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1418 fprintf(stderr, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1419 fprintf(stderr, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1420 fprintf(stderr, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
1421 }
1422 fprintf(stderr, ")\n");
1423
1424 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
1425 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
1426 if (msr) {
1427 fprintf(stderr, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
1428 fprintf(stderr, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
1429 fprintf(stderr, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
1430 fprintf(stderr, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
1431 }
1432 fprintf(stderr, ")\n");
1433
1434 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
1435 fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
1436 if ((msr) & 0x3)
1437 fprintf(stderr, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1438 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1439 fprintf(stderr, ")\n");
1440
1441 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
1442 fprintf(stderr, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
1443 fprintf(stderr, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xEF);
1444 fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
1445 fprintf(stderr, ")\n");
1446}
1447
c98d5d94 1448void free_all_buffers(void)
103a8fea 1449{
c98d5d94
LB		 1450 CPU_FREE(cpu_present_set);
1451 cpu_present_set = NULL;
1452 cpu_present_set = 0;
103a8fea 1453
c98d5d94
LB		 1454 CPU_FREE(cpu_affinity_set);
1455 cpu_affinity_set = NULL;
1456 cpu_affinity_setsize = 0;
103a8fea 1457
c98d5d94
LB		 1458 free(thread_even);
1459 free(core_even);
1460 free(package_even);
103a8fea 1461
c98d5d94
LB		 1462 thread_even = NULL;
1463 core_even = NULL;
1464 package_even = NULL;
103a8fea 1465
c98d5d94
LB		 1466 free(thread_odd);
1467 free(core_odd);
1468 free(package_odd);
103a8fea 1469
c98d5d94
LB		 1470 thread_odd = NULL;
1471 core_odd = NULL;
1472 package_odd = NULL;
103a8fea 1473
c98d5d94
LB		 1474 free(output_buffer);
1475 output_buffer = NULL;
1476 outp = NULL;
103a8fea
LB		 1477}
1478
57a42a34
JT		 1479/*
1480 * Open a file, and exit on failure
1481 */
1482FILE *fopen_or_die(const char *path, const char *mode)
1483{
1484 FILE *filep = fopen(path, "r");
b2c95d90
JT		 1485 if (!filep)
1486 err(1, "%s: open failed", path);
57a42a34
JT		 1487 return filep;
1488}
1489
c98d5d94 1490/*
95aebc44 1491 * Parse a file containing a single int.
c98d5d94 1492 */
95aebc44 1493int parse_int_file(const char *fmt, ...)
103a8fea 1494{
95aebc44
JT		 1495 va_list args;
1496 char path[PATH_MAX];
c98d5d94 1497 FILE *filep;
95aebc44 1498 int value;
103a8fea 1499
95aebc44
JT		 1500 va_start(args, fmt);
1501 vsnprintf(path, sizeof(path), fmt, args);
1502 va_end(args);
57a42a34 1503 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1504 if (fscanf(filep, "%d", &value) != 1)
1505 err(1, "%s: failed to parse number from file", path);
c98d5d94 1506 fclose(filep);
95aebc44
JT		 1507 return value;
1508}
1509
1510/*
e275b388
DC		 1511 * get_cpu_position_in_core(cpu)
1512 * return the position of the CPU among its HT siblings in the core
1513 * return -1 if the sibling is not in list
95aebc44 1514 */
e275b388 1515int get_cpu_position_in_core(int cpu)
95aebc44 1516{
e275b388
DC		 1517 char path[64];
1518 FILE *filep;
1519 int this_cpu;
1520 char character;
1521 int i;
1522
1523 sprintf(path,
1524 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1525 cpu);
1526 filep = fopen(path, "r");
1527 if (filep == NULL) {
1528 perror(path);
1529 exit(1);
1530 }
1531
1532 for (i = 0; i < topo.num_threads_per_core; i++) {
1533 fscanf(filep, "%d", &this_cpu);
1534 if (this_cpu == cpu) {
1535 fclose(filep);
1536 return i;
1537 }
1538
1539 /* Account for no separator after last thread*/
1540 if (i != (topo.num_threads_per_core - 1))
1541 fscanf(filep, "%c", &character);
1542 }
1543
1544 fclose(filep);
1545 return -1;
103a8fea
LB		 1546}
1547
c98d5d94
LB		 1548/*
1549 * cpu_is_first_core_in_package(cpu)
1550 * return 1 if given CPU is 1st core in package
1551 */
1552int cpu_is_first_core_in_package(int cpu)
103a8fea 1553{
95aebc44 1554 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1555}
1556
1557int get_physical_package_id(int cpu)
1558{
95aebc44 1559 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1560}
1561
1562int get_core_id(int cpu)
1563{
95aebc44 1564 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1565}
1566
c98d5d94
LB		 1567int get_num_ht_siblings(int cpu)
1568{
1569 char path[80];
1570 FILE *filep;
e275b388
DC		 1571 int sib1;
1572 int matches = 0;
c98d5d94 1573 char character;
e275b388
DC		 1574 char str[100];
1575 char *ch;
c98d5d94
LB		 1576
1577 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1578 filep = fopen_or_die(path, "r");
e275b388 1579
c98d5d94
LB		 1580 /*
1581 * file format:
e275b388
DC		 1582 * A ',' separated or '-' separated set of numbers
1583 * (eg 1-2 or 1,3,4,5)
c98d5d94 1584 */
e275b388
DC		 1585 fscanf(filep, "%d%c\n", &sib1, &character);
1586 fseek(filep, 0, SEEK_SET);
1587 fgets(str, 100, filep);
1588 ch = strchr(str, character);
1589 while (ch != NULL) {
1590 matches++;
1591 ch = strchr(ch+1, character);
1592 }
c98d5d94
LB		 1593
1594 fclose(filep);
e275b388 1595 return matches+1;
c98d5d94
LB		 1596}
1597
103a8fea 1598/*
c98d5d94
LB		 1599 * run func(thread, core, package) in topology order
1600 * skip non-present cpus
103a8fea
LB		 1601 */
1602
c98d5d94
LB		 1603int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1604 struct pkg_data *, struct thread_data *, struct core_data *,
1605 struct pkg_data *), struct thread_data *thread_base,
1606 struct core_data *core_base, struct pkg_data *pkg_base,
1607 struct thread_data *thread_base2, struct core_data *core_base2,
1608 struct pkg_data *pkg_base2)
1609{
1610 int retval, pkg_no, core_no, thread_no;
1611
1612 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1613 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1614 for (thread_no = 0; thread_no <
1615 topo.num_threads_per_core; ++thread_no) {
1616 struct thread_data *t, *t2;
1617 struct core_data *c, *c2;
1618 struct pkg_data *p, *p2;
1619
1620 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1621
1622 if (cpu_is_not_present(t->cpu_id))
1623 continue;
1624
1625 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1626
1627 c = GET_CORE(core_base, core_no, pkg_no);
1628 c2 = GET_CORE(core_base2, core_no, pkg_no);
1629
1630 p = GET_PKG(pkg_base, pkg_no);
1631 p2 = GET_PKG(pkg_base2, pkg_no);
1632
1633 retval = func(t, c, p, t2, c2, p2);
1634 if (retval)
1635 return retval;
1636 }
1637 }
1638 }
1639 return 0;
1640}
1641
1642/*
1643 * run func(cpu) on every cpu in /proc/stat
1644 * return max_cpu number
1645 */
1646int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1647{
1648 FILE *fp;
c98d5d94 1649 int cpu_num;
103a8fea
LB		 1650 int retval;
1651
57a42a34 1652 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1653
1654 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1655 if (retval != 0)
1656 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1657
c98d5d94
LB		 1658 while (1) {
1659 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1660 if (retval != 1)
1661 break;
1662
c98d5d94
LB		 1663 retval = func(cpu_num);
1664 if (retval) {
1665 fclose(fp);
1666 return(retval);
1667 }
103a8fea
LB		 1668 }
1669 fclose(fp);
c98d5d94 1670 return 0;
103a8fea
LB		 1671}
1672
1673void re_initialize(void)
1674{
c98d5d94
LB		 1675 free_all_buffers();
1676 setup_all_buffers();
1677 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1678}
1679
c98d5d94 1680
103a8fea 1681/*
c98d5d94
LB		 1682 * count_cpus()
1683 * remember the last one seen, it will be the max
103a8fea 1684 */
c98d5d94 1685int count_cpus(int cpu)
103a8fea 1686{
c98d5d94
LB		 1687 if (topo.max_cpu_num < cpu)
1688 topo.max_cpu_num = cpu;
103a8fea 1689
c98d5d94
LB		 1690 topo.num_cpus += 1;
1691 return 0;
1692}
1693int mark_cpu_present(int cpu)
1694{
1695 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1696 return 0;
103a8fea
LB		 1697}
1698
1699void turbostat_loop()
1700{
c98d5d94 1701 int retval;
e52966c0 1702 int restarted = 0;
c98d5d94 1703
103a8fea 1704restart:
e52966c0
LB		 1705 restarted++;
1706
c98d5d94 1707 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1708 if (retval < -1) {
1709 exit(retval);
1710 } else if (retval == -1) {
e52966c0
LB		 1711 if (restarted > 1) {
1712 exit(retval);
1713 }
c98d5d94
LB		 1714 re_initialize();
1715 goto restart;
1716 }
e52966c0 1717 restarted = 0;
103a8fea
LB		 1718 gettimeofday(&tv_even, (struct timezone *)NULL);
1719
1720 while (1) {
c98d5d94 1721 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 1722 re_initialize();
1723 goto restart;
1724 }
1725 sleep(interval_sec);
c98d5d94 1726 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 1727 if (retval < -1) {
1728 exit(retval);
1729 } else if (retval == -1) {
15aaa346
LB		 1730 re_initialize();
1731 goto restart;
1732 }
103a8fea 1733 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 1734 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 1735 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1736 compute_average(EVEN_COUNTERS);
1737 format_all_counters(EVEN_COUNTERS);
1738 flush_stdout();
15aaa346 1739 sleep(interval_sec);
c98d5d94 1740 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1741 if (retval < -1) {
1742 exit(retval);
1743 } else if (retval == -1) {
103a8fea
LB		 1744 re_initialize();
1745 goto restart;
1746 }
103a8fea 1747 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 1748 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 1749 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1750 compute_average(ODD_COUNTERS);
1751 format_all_counters(ODD_COUNTERS);
1752 flush_stdout();
103a8fea
LB		 1753 }
1754}
1755
1756void check_dev_msr()
1757{
1758 struct stat sb;
7ce7d5de 1759 char pathname[32];
103a8fea 1760
7ce7d5de
PB		 1761 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1762 if (stat(pathname, &sb))
a21d38c8
LB		 1763 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
1764 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 1765}
1766
98481e79 1767void check_permissions()
103a8fea 1768{
98481e79
LB		 1769 struct __user_cap_header_struct cap_header_data;
1770 cap_user_header_t cap_header = &cap_header_data;
1771 struct __user_cap_data_struct cap_data_data;
1772 cap_user_data_t cap_data = &cap_data_data;
1773 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1774 int do_exit = 0;
7ce7d5de 1775 char pathname[32];
98481e79
LB		 1776
1777 /* check for CAP_SYS_RAWIO */
1778 cap_header->pid = getpid();
1779 cap_header->version = _LINUX_CAPABILITY_VERSION;
1780 if (capget(cap_header, cap_data) < 0)
1781 err(-6, "capget(2) failed");
1782
1783 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1784 do_exit++;
1785 warnx("capget(CAP_SYS_RAWIO) failed,"
1786 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1787 }
1788
1789 /* test file permissions */
7ce7d5de
PB		 1790 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
1791 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 1792 do_exit++;
1793 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1794 }
1795
1796 /* if all else fails, thell them to be root */
1797 if (do_exit)
1798 if (getuid() != 0)
d7899447 1799 warnx("... or simply run as root");
98481e79
LB		 1800
1801 if (do_exit)
1802 exit(-6);
103a8fea
LB		 1803}
1804
d7899447
LB		 1805/*
1806 * NHM adds support for additional MSRs:
1807 *
1808 * MSR_SMI_COUNT 0x00000034
1809 *
1810 * MSR_NHM_PLATFORM_INFO 0x000000ce
1811 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1812 *
1813 * MSR_PKG_C3_RESIDENCY 0x000003f8
1814 * MSR_PKG_C6_RESIDENCY 0x000003f9
1815 * MSR_CORE_C3_RESIDENCY 0x000003fc
1816 * MSR_CORE_C6_RESIDENCY 0x000003fd
1817 *
ee7e38e3
LB		 1818 * Side effect:
1819 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
d7899447 1820 */
ee7e38e3 1821int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 1822{
ee7e38e3
LB		 1823 unsigned long long msr;
1824 int *pkg_cstate_limits;
1825
103a8fea
LB		 1826 if (!genuine_intel)
1827 return 0;
1828
1829 if (family != 6)
1830 return 0;
1831
1832 switch (model) {
1833 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1834 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1835 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1836 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1837 case 0x2C: /* Westmere EP - Gulftown */
ee7e38e3
LB		 1838 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1839 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1840 pkg_cstate_limits = nhm_pkg_cstate_limits;
1841 break;
103a8fea
LB		 1842 case 0x2A: /* SNB */
1843 case 0x2D: /* SNB Xeon */
553575f1 1844 case 0x3A: /* IVB */
1300651b 1845 case 0x3E: /* IVB Xeon */
ee7e38e3
LB		 1846 pkg_cstate_limits = snb_pkg_cstate_limits;
1847 break;
70b43400 1848 case 0x3C: /* HSW */
e6f9bb3c 1849 case 0x3F: /* HSX */
70b43400 1850 case 0x45: /* HSW */
149c2319 1851 case 0x46: /* HSW */
4e8e863f 1852 case 0x3D: /* BDW */
48a0631c 1853 case 0x47: /* BDW */
4e8e863f
LB		 1854 case 0x4F: /* BDX */
1855 case 0x56: /* BDX-DE */
0b2bb692
LB		 1856 case 0x4E: /* SKL */
1857 case 0x5E: /* SKL */
ee7e38e3
LB		 1858 pkg_cstate_limits = hsw_pkg_cstate_limits;
1859 break;
1860 case 0x37: /* BYT */
1861 case 0x4D: /* AVN */
1862 pkg_cstate_limits = slv_pkg_cstate_limits;
1863 break;
1864 case 0x4C: /* AMT */
1865 pkg_cstate_limits = amt_pkg_cstate_limits;
1866 break;
1867 case 0x57: /* PHI */
1868 pkg_cstate_limits = phi_pkg_cstate_limits;
1869 break;
103a8fea
LB		 1870 default:
1871 return 0;
1872 }
7ce7d5de 1873 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
ee7e38e3 1874
e9257f5f 1875 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3
LB		 1876
1877 return 1;
103a8fea 1878}
d7899447
LB		 1879int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1880{
d7899447
LB		 1881 switch (model) {
1882 /* Nehalem compatible, but do not include turbo-ratio limit support */
1883 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1884 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1885 return 0;
1886 default:
1887 return 1;
1888 }
1889}
6574a5d5
LB		 1890int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1891{
1892 if (!genuine_intel)
1893 return 0;
1894
1895 if (family != 6)
1896 return 0;
1897
1898 switch (model) {
1899 case 0x3E: /* IVB Xeon */
fcd17211
LB		 1900 case 0x3F: /* HSW Xeon */
1901 return 1;
1902 default:
1903 return 0;
1904 }
1905}
1906int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
1907{
1908 if (!genuine_intel)
1909 return 0;
1910
1911 if (family != 6)
1912 return 0;
1913
1914 switch (model) {
1915 case 0x3F: /* HSW Xeon */
6574a5d5
LB		 1916 return 1;
1917 default:
1918 return 0;
1919 }
1920}
1921
fb5d4327
DC		 1922int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
1923{
1924 if (!genuine_intel)
1925 return 0;
1926
1927 if (family != 6)
1928 return 0;
1929
1930 switch (model) {
1931 case 0x57: /* Knights Landing */
1932 return 1;
1933 default:
1934 return 0;
1935 }
1936}
6fb3143b
LB		 1937int has_config_tdp(unsigned int family, unsigned int model)
1938{
1939 if (!genuine_intel)
1940 return 0;
1941
1942 if (family != 6)
1943 return 0;
1944
1945 switch (model) {
1946 case 0x3A: /* IVB */
6fb3143b
LB		 1947 case 0x3C: /* HSW */
1948 case 0x3F: /* HSX */
1949 case 0x45: /* HSW */
1950 case 0x46: /* HSW */
1951 case 0x3D: /* BDW */
1952 case 0x47: /* BDW */
1953 case 0x4F: /* BDX */
1954 case 0x56: /* BDX-DE */
1955 case 0x4E: /* SKL */
1956 case 0x5E: /* SKL */
1957
1958 case 0x57: /* Knights Landing */
1959 return 1;
1960 default:
1961 return 0;
1962 }
1963}
1964
fcd17211
LB		 1965static void
1966dump_cstate_pstate_config_info(family, model)
1967{
1968 if (!do_nhm_platform_info)
1969 return;
1970
1971 dump_nhm_platform_info();
1972
1973 if (has_hsw_turbo_ratio_limit(family, model))
1974 dump_hsw_turbo_ratio_limits();
1975
1976 if (has_ivt_turbo_ratio_limit(family, model))
1977 dump_ivt_turbo_ratio_limits();
1978
1979 if (has_nhm_turbo_ratio_limit(family, model))
1980 dump_nhm_turbo_ratio_limits();
1981
fb5d4327
DC		 1982 if (has_knl_turbo_ratio_limit(family, model))
1983 dump_knl_turbo_ratio_limits();
1984
6fb3143b
LB		 1985 if (has_config_tdp(family, model))
1986 dump_config_tdp();
1987
fcd17211
LB		 1988 dump_nhm_cst_cfg();
1989}
1990
1991
889facbe
LB		 1992/*
1993 * print_epb()
1994 * Decode the ENERGY_PERF_BIAS MSR
1995 */
1996int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1997{
1998 unsigned long long msr;
1999 char *epb_string;
2000 int cpu;
2001
2002 if (!has_epb)
2003 return 0;
2004
2005 cpu = t->cpu_id;
2006
2007 /* EPB is per-package */
2008 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2009 return 0;
2010
2011 if (cpu_migrate(cpu)) {
2012 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2013 return -1;
2014 }
2015
2016 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2017 return 0;
2018
e9be7dd6 2019 switch (msr & 0xF) {
889facbe
LB		 2020 case ENERGY_PERF_BIAS_PERFORMANCE:
2021 epb_string = "performance";
2022 break;
2023 case ENERGY_PERF_BIAS_NORMAL:
2024 epb_string = "balanced";
2025 break;
2026 case ENERGY_PERF_BIAS_POWERSAVE:
2027 epb_string = "powersave";
2028 break;
2029 default:
2030 epb_string = "custom";
2031 break;
2032 }
2033 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
2034
2035 return 0;
2036}
2037
3a9a941d
LB		 2038/*
2039 * print_perf_limit()
2040 */
2041int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2042{
2043 unsigned long long msr;
2044 int cpu;
2045
2046 cpu = t->cpu_id;
2047
2048 /* per-package */
2049 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2050 return 0;
2051
2052 if (cpu_migrate(cpu)) {
2053 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2054 return -1;
2055 }
2056
2057 if (do_core_perf_limit_reasons) {
2058 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
2059 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2060 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 2061 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 2062 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 2063 (msr & 1 << 13) ? "Transitions, " : "",
2064 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2065 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2066 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2067 (msr & 1 << 9) ? "CorePwr, " : "",
2068 (msr & 1 << 8) ? "Amps, " : "",
2069 (msr & 1 << 6) ? "VR-Therm, " : "",
2070 (msr & 1 << 5) ? "Auto-HWP, " : "",
2071 (msr & 1 << 4) ? "Graphics, " : "",
2072 (msr & 1 << 2) ? "bit2, " : "",
2073 (msr & 1 << 1) ? "ThermStatus, " : "",
2074 (msr & 1 << 0) ? "PROCHOT, " : "");
3a9a941d 2075 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 2076 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 2077 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 2078 (msr & 1 << 29) ? "Transitions, " : "",
2079 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2080 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2081 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2082 (msr & 1 << 25) ? "CorePwr, " : "",
2083 (msr & 1 << 24) ? "Amps, " : "",
2084 (msr & 1 << 22) ? "VR-Therm, " : "",
2085 (msr & 1 << 21) ? "Auto-HWP, " : "",
2086 (msr & 1 << 20) ? "Graphics, " : "",
2087 (msr & 1 << 18) ? "bit18, " : "",
2088 (msr & 1 << 17) ? "ThermStatus, " : "",
2089 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 2090
2091 }
2092 if (do_gfx_perf_limit_reasons) {
2093 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
2094 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2095 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
2096 (msr & 1 << 0) ? "PROCHOT, " : "",
2097 (msr & 1 << 1) ? "ThermStatus, " : "",
2098 (msr & 1 << 4) ? "Graphics, " : "",
2099 (msr & 1 << 6) ? "VR-Therm, " : "",
2100 (msr & 1 << 8) ? "Amps, " : "",
2101 (msr & 1 << 9) ? "GFXPwr, " : "",
2102 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2103 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2104 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
2105 (msr & 1 << 16) ? "PROCHOT, " : "",
2106 (msr & 1 << 17) ? "ThermStatus, " : "",
2107 (msr & 1 << 20) ? "Graphics, " : "",
2108 (msr & 1 << 22) ? "VR-Therm, " : "",
2109 (msr & 1 << 24) ? "Amps, " : "",
2110 (msr & 1 << 25) ? "GFXPwr, " : "",
2111 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2112 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2113 }
2114 if (do_ring_perf_limit_reasons) {
2115 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
2116 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2117 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
2118 (msr & 1 << 0) ? "PROCHOT, " : "",
2119 (msr & 1 << 1) ? "ThermStatus, " : "",
2120 (msr & 1 << 6) ? "VR-Therm, " : "",
2121 (msr & 1 << 8) ? "Amps, " : "",
2122 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2123 (msr & 1 << 11) ? "PkgPwrL2, " : "");
2124 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
2125 (msr & 1 << 16) ? "PROCHOT, " : "",
2126 (msr & 1 << 17) ? "ThermStatus, " : "",
2127 (msr & 1 << 22) ? "VR-Therm, " : "",
2128 (msr & 1 << 24) ? "Amps, " : "",
2129 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2130 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2131 }
2132 return 0;
2133}
2134
889facbe
LB		 2135#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2136#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2137
144b44b1
LB		 2138double get_tdp(model)
2139{
2140 unsigned long long msr;
2141
2142 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 2143 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 2144 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2145
2146 switch (model) {
2147 case 0x37:
2148 case 0x4D:
2149 return 30.0;
2150 default:
2151 return 135.0;
2152 }
2153}
2154
40ee8e3b
AS		 2155/*
2156 * rapl_dram_energy_units_probe()
2157 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2158 */
2159static double
2160rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2161{
2162 /* only called for genuine_intel, family 6 */
2163
2164 switch (model) {
2165 case 0x3F: /* HSX */
2166 case 0x4F: /* BDX */
2167 case 0x56: /* BDX-DE */
fb5d4327 2168 case 0x57: /* KNL */
40ee8e3b
AS		 2169 return (rapl_dram_energy_units = 15.3 / 1000000);
2170 default:
2171 return (rapl_energy_units);
2172 }
2173}
2174
144b44b1 2175
889facbe
LB		 2176/*
2177 * rapl_probe()
2178 *
144b44b1 2179 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 2180 */
2181void rapl_probe(unsigned int family, unsigned int model)
2182{
2183 unsigned long long msr;
144b44b1 2184 unsigned int time_unit;
889facbe
LB		 2185 double tdp;
2186
2187 if (!genuine_intel)
2188 return;
2189
2190 if (family != 6)
2191 return;
2192
2193 switch (model) {
2194 case 0x2A:
2195 case 0x3A:
70b43400 2196 case 0x3C: /* HSW */
70b43400 2197 case 0x45: /* HSW */
149c2319 2198 case 0x46: /* HSW */
4e8e863f 2199 case 0x3D: /* BDW */
48a0631c 2200 case 0x47: /* BDW */
144b44b1 2201 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 2202 break;
0b2bb692
LB		 2203 case 0x4E: /* SKL */
2204 case 0x5E: /* SKL */
2205 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2206 break;
e6f9bb3c 2207 case 0x3F: /* HSX */
4e8e863f
LB		 2208 case 0x4F: /* BDX */
2209 case 0x56: /* BDX-DE */
fb5d4327 2210 case 0x57: /* KNL */
0b2bb692 2211 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
e6f9bb3c 2212 break;
889facbe
LB		 2213 case 0x2D:
2214 case 0x3E:
0b2bb692 2215 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
144b44b1
LB		 2216 break;
2217 case 0x37: /* BYT */
2218 case 0x4D: /* AVN */
2219 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 2220 break;
2221 default:
2222 return;
2223 }
2224
2225 /* units on package 0, verify later other packages match */
7ce7d5de 2226 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 2227 return;
2228
2229 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 2230 if (model == 0x37)
2231 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2232 else
2233 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 2234
40ee8e3b
AS		 2235 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2236
144b44b1
LB		 2237 time_unit = msr >> 16 & 0xF;
2238 if (time_unit == 0)
2239 time_unit = 0xA;
889facbe 2240
144b44b1 2241 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 2242
144b44b1 2243 tdp = get_tdp(model);
889facbe 2244
144b44b1 2245 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
d8af6f5f 2246 if (debug)
144b44b1 2247 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 2248
2249 return;
2250}
2251
3a9a941d
LB		 2252void perf_limit_reasons_probe(family, model)
2253{
2254 if (!genuine_intel)
2255 return;
2256
2257 if (family != 6)
2258 return;
2259
2260 switch (model) {
2261 case 0x3C: /* HSW */
2262 case 0x45: /* HSW */
2263 case 0x46: /* HSW */
2264 do_gfx_perf_limit_reasons = 1;
2265 case 0x3F: /* HSX */
2266 do_core_perf_limit_reasons = 1;
2267 do_ring_perf_limit_reasons = 1;
2268 default:
2269 return;
2270 }
2271}
2272
889facbe
LB		 2273int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2274{
2275 unsigned long long msr;
2276 unsigned int dts;
2277 int cpu;
2278
2279 if (!(do_dts || do_ptm))
2280 return 0;
2281
2282 cpu = t->cpu_id;
2283
2284 /* DTS is per-core, no need to print for each thread */
2285 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2286 return 0;
2287
2288 if (cpu_migrate(cpu)) {
2289 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2290 return -1;
2291 }
2292
2293 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2294 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2295 return 0;
2296
2297 dts = (msr >> 16) & 0x7F;
2298 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
2299 cpu, msr, tcc_activation_temp - dts);
2300
2301#ifdef THERM_DEBUG
2302 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2303 return 0;
2304
2305 dts = (msr >> 16) & 0x7F;
2306 dts2 = (msr >> 8) & 0x7F;
2307 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2308 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2309#endif
2310 }
2311
2312
2313 if (do_dts) {
2314 unsigned int resolution;
2315
2316 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2317 return 0;
2318
2319 dts = (msr >> 16) & 0x7F;
2320 resolution = (msr >> 27) & 0xF;
2321 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
2322 cpu, msr, tcc_activation_temp - dts, resolution);
2323
2324#ifdef THERM_DEBUG
2325 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2326 return 0;
2327
2328 dts = (msr >> 16) & 0x7F;
2329 dts2 = (msr >> 8) & 0x7F;
2330 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
2331 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2332#endif
2333 }
2334
2335 return 0;
2336}
2337
2338void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2339{
2340 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
2341 cpu, label,
2342 ((msr >> 15) & 1) ? "EN" : "DIS",
2343 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2344 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2345 (((msr >> 16) & 1) ? "EN" : "DIS"));
2346
2347 return;
2348}
2349
2350int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2351{
2352 unsigned long long msr;
2353 int cpu;
889facbe
LB		 2354
2355 if (!do_rapl)
2356 return 0;
2357
2358 /* RAPL counters are per package, so print only for 1st thread/package */
2359 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2360 return 0;
2361
2362 cpu = t->cpu_id;
2363 if (cpu_migrate(cpu)) {
2364 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2365 return -1;
2366 }
2367
2368 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2369 return -1;
2370
d8af6f5f 2371 if (debug) {
889facbe
LB		 2372 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
2373 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 2374 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 2375 }
144b44b1
LB		 2376 if (do_rapl & RAPL_PKG_POWER_INFO) {
2377
889facbe
LB		 2378 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2379 return -5;
2380
2381
2382 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2383 cpu, msr,
2384 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2385 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2386 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2387 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2388
144b44b1
LB		 2389 }
2390 if (do_rapl & RAPL_PKG) {
2391
889facbe
LB		 2392 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2393 return -9;
2394
2395 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
2396 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2397
2398 print_power_limit_msr(cpu, msr, "PKG Limit #1");
2399 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
2400 cpu,
2401 ((msr >> 47) & 1) ? "EN" : "DIS",
2402 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2403 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2404 ((msr >> 48) & 1) ? "EN" : "DIS");
2405 }
2406
0b2bb692 2407 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 2408 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2409 return -6;
2410
889facbe
LB		 2411 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
2412 cpu, msr,
2413 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2414 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2415 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2416 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 2417 }
2418 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 2419 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2420 return -9;
2421 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
2422 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2423
2424 print_power_limit_msr(cpu, msr, "DRAM Limit");
2425 }
144b44b1 2426 if (do_rapl & RAPL_CORE_POLICY) {
d8af6f5f 2427 if (debug) {
889facbe
LB		 2428 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2429 return -7;
2430
2431 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 2432 }
2433 }
2434 if (do_rapl & RAPL_CORES) {
d8af6f5f 2435 if (debug) {
889facbe
LB		 2436
2437 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2438 return -9;
2439 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2440 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2441 print_power_limit_msr(cpu, msr, "Cores Limit");
2442 }
2443 }
2444 if (do_rapl & RAPL_GFX) {
d8af6f5f 2445 if (debug) {
889facbe
LB		 2446 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2447 return -8;
2448
2449 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2450
2451 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2452 return -9;
2453 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2454 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2455 print_power_limit_msr(cpu, msr, "GFX Limit");
2456 }
2457 }
2458 return 0;
2459}
2460
d7899447
LB		 2461/*
2462 * SNB adds support for additional MSRs:
2463 *
2464 * MSR_PKG_C7_RESIDENCY 0x000003fa
2465 * MSR_CORE_C7_RESIDENCY 0x000003fe
2466 * MSR_PKG_C2_RESIDENCY 0x0000060d
2467 */
103a8fea 2468
d7899447 2469int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2470{
2471 if (!genuine_intel)
2472 return 0;
2473
2474 switch (model) {
2475 case 0x2A:
2476 case 0x2D:
650a37f3 2477 case 0x3A: /* IVB */
1300651b 2478 case 0x3E: /* IVB Xeon */
70b43400
LB		 2479 case 0x3C: /* HSW */
2480 case 0x3F: /* HSW */
2481 case 0x45: /* HSW */
149c2319 2482 case 0x46: /* HSW */
4e8e863f 2483 case 0x3D: /* BDW */
48a0631c 2484 case 0x47: /* BDW */
4e8e863f
LB		 2485 case 0x4F: /* BDX */
2486 case 0x56: /* BDX-DE */
0b2bb692
LB		 2487 case 0x4E: /* SKL */
2488 case 0x5E: /* SKL */
103a8fea
LB		 2489 return 1;
2490 }
2491 return 0;
2492}
2493
d7899447
LB		 2494/*
2495 * HSW adds support for additional MSRs:
2496 *
2497 * MSR_PKG_C8_RESIDENCY 0x00000630
2498 * MSR_PKG_C9_RESIDENCY 0x00000631
2499 * MSR_PKG_C10_RESIDENCY 0x00000632
2500 */
2501int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2502{
2503 if (!genuine_intel)
2504 return 0;
2505
2506 switch (model) {
4e8e863f
LB		 2507 case 0x45: /* HSW */
2508 case 0x3D: /* BDW */
0b2bb692
LB		 2509 case 0x4E: /* SKL */
2510 case 0x5E: /* SKL */
2511 return 1;
2512 }
2513 return 0;
2514}
2515
2516/*
2517 * SKL adds support for additional MSRS:
2518 *
2519 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2520 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2521 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2522 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2523 */
2524int has_skl_msrs(unsigned int family, unsigned int model)
2525{
2526 if (!genuine_intel)
2527 return 0;
2528
2529 switch (model) {
2530 case 0x4E: /* SKL */
2531 case 0x5E: /* SKL */
ca58710f
KCA		 2532 return 1;
2533 }
2534 return 0;
2535}
2536
2537
0b2bb692 2538
144b44b1
LB		 2539int is_slm(unsigned int family, unsigned int model)
2540{
2541 if (!genuine_intel)
2542 return 0;
2543 switch (model) {
2544 case 0x37: /* BYT */
2545 case 0x4D: /* AVN */
2546 return 1;
2547 }
2548 return 0;
2549}
2550
fb5d4327
DC		 2551int is_knl(unsigned int family, unsigned int model)
2552{
2553 if (!genuine_intel)
2554 return 0;
2555 switch (model) {
2556 case 0x57: /* KNL */
2557 return 1;
2558 }
2559 return 0;
2560}
2561
b2b34dfe
HC		 2562unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
2563{
2564 if (is_knl(family, model))
2565 return 1024;
2566 return 1;
2567}
2568
144b44b1
LB		 2569#define SLM_BCLK_FREQS 5
2570double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2571
2572double slm_bclk(void)
2573{
2574 unsigned long long msr = 3;
2575 unsigned int i;
2576 double freq;
2577
7ce7d5de 2578 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
144b44b1
LB		 2579 fprintf(stderr, "SLM BCLK: unknown\n");
2580
2581 i = msr & 0xf;
2582 if (i >= SLM_BCLK_FREQS) {
2583 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2584 msr = 3;
2585 }
2586 freq = slm_freq_table[i];
2587
2588 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2589
2590 return freq;
2591}
2592
103a8fea
LB		 2593double discover_bclk(unsigned int family, unsigned int model)
2594{
d7899447 2595 if (has_snb_msrs(family, model))
103a8fea 2596 return 100.00;
144b44b1
LB		 2597 else if (is_slm(family, model))
2598 return slm_bclk();
103a8fea
LB		 2599 else
2600 return 133.33;
2601}
2602
889facbe
LB		 2603/*
2604 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2605 * the Thermal Control Circuit (TCC) activates.
2606 * This is usually equal to tjMax.
2607 *
2608 * Older processors do not have this MSR, so there we guess,
2609 * but also allow cmdline over-ride with -T.
2610 *
2611 * Several MSR temperature values are in units of degrees-C
2612 * below this value, including the Digital Thermal Sensor (DTS),
2613 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2614 */
2615int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2616{
2617 unsigned long long msr;
2618 unsigned int target_c_local;
2619 int cpu;
2620
2621 /* tcc_activation_temp is used only for dts or ptm */
2622 if (!(do_dts || do_ptm))
2623 return 0;
2624
2625 /* this is a per-package concept */
2626 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2627 return 0;
2628
2629 cpu = t->cpu_id;
2630 if (cpu_migrate(cpu)) {
2631 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2632 return -1;
2633 }
2634
2635 if (tcc_activation_temp_override != 0) {
2636 tcc_activation_temp = tcc_activation_temp_override;
2637 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2638 cpu, tcc_activation_temp);
2639 return 0;
2640 }
2641
2642 /* Temperature Target MSR is Nehalem and newer only */
d7899447 2643 if (!do_nhm_platform_info)
889facbe
LB		 2644 goto guess;
2645
7ce7d5de 2646 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 2647 goto guess;
2648
3482124a 2649 target_c_local = (msr >> 16) & 0xFF;
889facbe 2650
d8af6f5f 2651 if (debug)
889facbe
LB		 2652 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2653 cpu, msr, target_c_local);
2654
3482124a 2655 if (!target_c_local)
889facbe
LB		 2656 goto guess;
2657
2658 tcc_activation_temp = target_c_local;
2659
2660 return 0;
2661
2662guess:
2663 tcc_activation_temp = TJMAX_DEFAULT;
2664 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2665 cpu, tcc_activation_temp);
2666
2667 return 0;
2668}
fcd17211 2669void process_cpuid()
103a8fea
LB		 2670{
2671 unsigned int eax, ebx, ecx, edx, max_level;
2672 unsigned int fms, family, model, stepping;
2673
2674 eax = ebx = ecx = edx = 0;
2675
2b92865e 2676 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
103a8fea
LB		 2677
2678 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2679 genuine_intel = 1;
2680
d8af6f5f 2681 if (debug)
889facbe 2682 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 2683 (char *)&ebx, (char *)&edx, (char *)&ecx);
2684
2b92865e 2685 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
103a8fea
LB		 2686 family = (fms >> 8) & 0xf;
2687 model = (fms >> 4) & 0xf;
2688 stepping = fms & 0xf;
2689 if (family == 6 || family == 0xf)
2690 model += ((fms >> 16) & 0xf) << 4;
2691
d8af6f5f 2692 if (debug)
103a8fea
LB		 2693 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2694 max_level, family, model, stepping, family, model, stepping);
2695
b2c95d90
JT		 2696 if (!(edx & (1 << 5)))
2697 errx(1, "CPUID: no MSR");
103a8fea
LB		 2698
2699 /*
2700 * check max extended function levels of CPUID.
2701 * This is needed to check for invariant TSC.
2702 * This check is valid for both Intel and AMD.
2703 */
2704 ebx = ecx = edx = 0;
2b92865e 2705 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
103a8fea 2706
d7899447 2707 if (max_level >= 0x80000007) {
103a8fea 2708
d7899447
LB		 2709 /*
2710 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2711 * this check is valid for both Intel and AMD
2712 */
2713 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2714 has_invariant_tsc = edx & (1 << 8);
2715 }
103a8fea
LB		 2716
2717 /*
2718 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2719 * this check is valid for both Intel and AMD
2720 */
2721
2b92865e 2722 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
8209e054 2723 has_aperf = ecx & (1 << 0);
889facbe
LB		 2724 do_dts = eax & (1 << 0);
2725 do_ptm = eax & (1 << 6);
2726 has_epb = ecx & (1 << 3);
2727
d8af6f5f 2728 if (debug)
a729617c
LB		 2729 fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
2730 has_aperf ? "" : "No ",
2731 do_dts ? "" : "No ",
2732 do_ptm ? "" : "No ",
2733 has_epb ? "" : "No ");
103a8fea 2734
8a5bdf41
LB		 2735 if (max_level > 0x15) {
2736 unsigned int eax_crystal;
2737 unsigned int ebx_tsc;
2738
2739 /*
2740 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
2741 */
2742 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
2743 __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
2744
2745 if (ebx_tsc != 0) {
2746
2747 if (debug && (ebx != 0))
2748 fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
2749 eax_crystal, ebx_tsc, crystal_hz);
2750
2751 if (crystal_hz == 0)
2752 switch(model) {
2753 case 0x4E: /* SKL */
2754 case 0x5E: /* SKL */
2755 crystal_hz = 24000000; /* 24 MHz */
2756 break;
2757 default:
2758 crystal_hz = 0;
2759 }
2760
2761 if (crystal_hz) {
2762 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
2763 if (debug)
2764 fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
2765 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
2766 }
2767 }
2768 }
2769
b2b34dfe
HC		 2770 if (has_aperf)
2771 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
2772
ee7e38e3 2773 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
d7899447 2774 do_snb_cstates = has_snb_msrs(family, model);
ee7e38e3
LB		 2775 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
2776 do_pc3 = (pkg_cstate_limit >= PCL__3);
2777 do_pc6 = (pkg_cstate_limit >= PCL__6);
2778 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
d7899447 2779 do_c8_c9_c10 = has_hsw_msrs(family, model);
0b2bb692 2780 do_skl_residency = has_skl_msrs(family, model);
144b44b1 2781 do_slm_cstates = is_slm(family, model);
fb5d4327 2782 do_knl_cstates = is_knl(family, model);
103a8fea
LB		 2783 bclk = discover_bclk(family, model);
2784
889facbe 2785 rapl_probe(family, model);
3a9a941d 2786 perf_limit_reasons_probe(family, model);
889facbe 2787
fcd17211
LB		 2788 if (debug)
2789 dump_cstate_pstate_config_info();
2790
a2b7b749
LB		 2791 if (has_skl_msrs(family, model))
2792 calculate_tsc_tweak();
2793
889facbe 2794 return;
103a8fea
LB		 2795}
2796
d8af6f5f 2797void help()
103a8fea 2798{
d8af6f5f
LB		 2799 fprintf(stderr,
2800 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
2801 "\n"
2802 "Turbostat forks the specified COMMAND and prints statistics\n"
2803 "when COMMAND completes.\n"
2804 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
2805 "to print statistics, until interrupted.\n"
2806 "--debug run in \"debug\" mode\n"
2807 "--interval sec Override default 5-second measurement interval\n"
2808 "--help print this help message\n"
2809 "--counter msr print 32-bit counter at address \"msr\"\n"
2810 "--Counter msr print 64-bit Counter at address \"msr\"\n"
2811 "--msr msr print 32-bit value at address \"msr\"\n"
2812 "--MSR msr print 64-bit Value at address \"msr\"\n"
2813 "--version print version information\n"
2814 "\n"
2815 "For more help, run \"man turbostat\"\n");
103a8fea
LB		 2816}
2817
2818
2819/*
2820 * in /dev/cpu/ return success for names that are numbers
2821 * ie. filter out ".", "..", "microcode".
2822 */
2823int dir_filter(const struct dirent *dirp)
2824{
2825 if (isdigit(dirp->d_name[0]))
2826 return 1;
2827 else
2828 return 0;
2829}
2830
2831int open_dev_cpu_msr(int dummy1)
2832{
2833 return 0;
2834}
2835
c98d5d94
LB		 2836void topology_probe()
2837{
2838 int i;
2839 int max_core_id = 0;
2840 int max_package_id = 0;
2841 int max_siblings = 0;
2842 struct cpu_topology {
2843 int core_id;
2844 int physical_package_id;
2845 } *cpus;
2846
2847 /* Initialize num_cpus, max_cpu_num */
2848 topo.num_cpus = 0;
2849 topo.max_cpu_num = 0;
2850 for_all_proc_cpus(count_cpus);
2851 if (!summary_only && topo.num_cpus > 1)
2852 show_cpu = 1;
2853
d8af6f5f 2854 if (debug > 1)
c98d5d94
LB		 2855 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2856
2857 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 2858 if (cpus == NULL)
2859 err(1, "calloc cpus");
c98d5d94
LB		 2860
2861 /*
2862 * Allocate and initialize cpu_present_set
2863 */
2864 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2865 if (cpu_present_set == NULL)
2866 err(3, "CPU_ALLOC");
c98d5d94
LB		 2867 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2868 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2869 for_all_proc_cpus(mark_cpu_present);
2870
2871 /*
2872 * Allocate and initialize cpu_affinity_set
2873 */
2874 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2875 if (cpu_affinity_set == NULL)
2876 err(3, "CPU_ALLOC");
c98d5d94
LB		 2877 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2878 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2879
2880
2881 /*
2882 * For online cpus
2883 * find max_core_id, max_package_id
2884 */
2885 for (i = 0; i <= topo.max_cpu_num; ++i) {
2886 int siblings;
2887
2888 if (cpu_is_not_present(i)) {
d8af6f5f 2889 if (debug > 1)
c98d5d94
LB		 2890 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2891 continue;
2892 }
2893 cpus[i].core_id = get_core_id(i);
2894 if (cpus[i].core_id > max_core_id)
2895 max_core_id = cpus[i].core_id;
2896
2897 cpus[i].physical_package_id = get_physical_package_id(i);
2898 if (cpus[i].physical_package_id > max_package_id)
2899 max_package_id = cpus[i].physical_package_id;
2900
2901 siblings = get_num_ht_siblings(i);
2902 if (siblings > max_siblings)
2903 max_siblings = siblings;
d8af6f5f 2904 if (debug > 1)
c98d5d94
LB		 2905 fprintf(stderr, "cpu %d pkg %d core %d\n",
2906 i, cpus[i].physical_package_id, cpus[i].core_id);
2907 }
2908 topo.num_cores_per_pkg = max_core_id + 1;
d8af6f5f 2909 if (debug > 1)
c98d5d94
LB		 2910 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2911 max_core_id, topo.num_cores_per_pkg);
1cc21f7b 2912 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
c98d5d94
LB		 2913 show_core = 1;
2914
2915 topo.num_packages = max_package_id + 1;
d8af6f5f 2916 if (debug > 1)
c98d5d94
LB		 2917 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2918 max_package_id, topo.num_packages);
1cc21f7b 2919 if (debug && !summary_only && topo.num_packages > 1)
c98d5d94
LB		 2920 show_pkg = 1;
2921
2922 topo.num_threads_per_core = max_siblings;
d8af6f5f 2923 if (debug > 1)
c98d5d94
LB		 2924 fprintf(stderr, "max_siblings %d\n", max_siblings);
2925
2926 free(cpus);
2927}
2928
2929void
2930allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2931{
2932 int i;
2933
2934 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2935 topo.num_packages, sizeof(struct thread_data));
2936 if (*t == NULL)
2937 goto error;
2938
2939 for (i = 0; i < topo.num_threads_per_core *
2940 topo.num_cores_per_pkg * topo.num_packages; i++)
2941 (*t)[i].cpu_id = -1;
2942
2943 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2944 sizeof(struct core_data));
2945 if (*c == NULL)
2946 goto error;
2947
2948 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2949 (*c)[i].core_id = -1;
2950
2951 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2952 if (*p == NULL)
2953 goto error;
2954
2955 for (i = 0; i < topo.num_packages; i++)
2956 (*p)[i].package_id = i;
2957
2958 return;
2959error:
b2c95d90 2960 err(1, "calloc counters");
c98d5d94
LB		 2961}
2962/*
2963 * init_counter()
2964 *
2965 * set cpu_id, core_num, pkg_num
2966 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2967 *
2968 * increment topo.num_cores when 1st core in pkg seen
2969 */
2970void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2971 struct pkg_data *pkg_base, int thread_num, int core_num,
2972 int pkg_num, int cpu_id)
2973{
2974 struct thread_data *t;
2975 struct core_data *c;
2976 struct pkg_data *p;
2977
2978 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2979 c = GET_CORE(core_base, core_num, pkg_num);
2980 p = GET_PKG(pkg_base, pkg_num);
2981
2982 t->cpu_id = cpu_id;
2983 if (thread_num == 0) {
2984 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2985 if (cpu_is_first_core_in_package(cpu_id))
2986 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2987 }
2988
2989 c->core_id = core_num;
2990 p->package_id = pkg_num;
2991}
2992
2993
2994int initialize_counters(int cpu_id)
2995{
2996 int my_thread_id, my_core_id, my_package_id;
2997
2998 my_package_id = get_physical_package_id(cpu_id);
2999 my_core_id = get_core_id(cpu_id);
e275b388
DC		 3000 my_thread_id = get_cpu_position_in_core(cpu_id);
3001 if (!my_thread_id)
c98d5d94 3002 topo.num_cores++;
c98d5d94
LB		 3003
3004 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3005 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3006 return 0;
3007}
3008
3009void allocate_output_buffer()
3010{
3b4d5c7f 3011 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 3012 outp = output_buffer;
b2c95d90
JT		 3013 if (outp == NULL)
3014 err(-1, "calloc output buffer");
c98d5d94
LB		 3015}
3016
3017void setup_all_buffers(void)
3018{
3019 topology_probe();
3020 allocate_counters(&thread_even, &core_even, &package_even);
3021 allocate_counters(&thread_odd, &core_odd, &package_odd);
3022 allocate_output_buffer();
3023 for_all_proc_cpus(initialize_counters);
3024}
3b4d5c7f 3025
7ce7d5de
PB		 3026void set_base_cpu(void)
3027{
3028 base_cpu = sched_getcpu();
3029 if (base_cpu < 0)
3030 err(-ENODEV, "No valid cpus found");
3031
3032 if (debug > 1)
3033 fprintf(stderr, "base_cpu = %d\n", base_cpu);
3034}
3035
103a8fea
LB		 3036void turbostat_init()
3037{
7ce7d5de
PB		 3038 setup_all_buffers();
3039 set_base_cpu();
103a8fea 3040 check_dev_msr();
98481e79 3041 check_permissions();
fcd17211 3042 process_cpuid();
103a8fea 3043
103a8fea 3044
d8af6f5f 3045 if (debug)
889facbe
LB		 3046 for_all_cpus(print_epb, ODD_COUNTERS);
3047
d8af6f5f 3048 if (debug)
3a9a941d
LB		 3049 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3050
d8af6f5f 3051 if (debug)
889facbe
LB		 3052 for_all_cpus(print_rapl, ODD_COUNTERS);
3053
3054 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3055
d8af6f5f 3056 if (debug)
889facbe 3057 for_all_cpus(print_thermal, ODD_COUNTERS);
103a8fea
LB		 3058}
3059
3060int fork_it(char **argv)
3061{
103a8fea 3062 pid_t child_pid;
d91bb17c 3063 int status;
d15cf7c1 3064
d91bb17c
LB		 3065 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3066 if (status)
3067 exit(status);
c98d5d94
LB		 3068 /* clear affinity side-effect of get_counters() */
3069 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 3070 gettimeofday(&tv_even, (struct timezone *)NULL);
3071
3072 child_pid = fork();
3073 if (!child_pid) {
3074 /* child */
3075 execvp(argv[0], argv);
3076 } else {
103a8fea
LB		 3077
3078 /* parent */
b2c95d90
JT		 3079 if (child_pid == -1)
3080 err(1, "fork");
103a8fea
LB		 3081
3082 signal(SIGINT, SIG_IGN);
3083 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 3084 if (waitpid(child_pid, &status, 0) == -1)
3085 err(status, "waitpid");
103a8fea 3086 }
c98d5d94
LB		 3087 /*
3088 * n.b. fork_it() does not check for errors from for_all_cpus()
3089 * because re-starting is problematic when forking
3090 */
3091 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 3092 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3093 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 3094 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3095 compute_average(EVEN_COUNTERS);
3096 format_all_counters(EVEN_COUNTERS);
3097 flush_stderr();
103a8fea 3098
6eab04a8 3099 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
103a8fea 3100
d91bb17c 3101 return status;
103a8fea
LB		 3102}
3103
3b4d5c7f
AS		 3104int get_and_dump_counters(void)
3105{
3106 int status;
3107
3108 status = for_all_cpus(get_counters, ODD_COUNTERS);
3109 if (status)
3110 return status;
3111
3112 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3113 if (status)
3114 return status;
3115
3116 flush_stdout();
3117
3118 return status;
3119}
3120
d8af6f5f 3121void print_version() {
af71b980 3122 fprintf(stderr, "turbostat version 4.8 26-Sep, 2015"
d8af6f5f
LB		 3123 " - Len Brown <lenb@kernel.org>\n");
3124}
3125
103a8fea
LB		 3126void cmdline(int argc, char **argv)
3127{
3128 int opt;
d8af6f5f
LB		 3129 int option_index = 0;
3130 static struct option long_options[] = {
3131 {"Counter", required_argument, 0, 'C'},
3132 {"counter", required_argument, 0, 'c'},
3133 {"Dump", no_argument, 0, 'D'},
3134 {"debug", no_argument, 0, 'd'},
3135 {"interval", required_argument, 0, 'i'},
3136 {"help", no_argument, 0, 'h'},
3137 {"Joules", no_argument, 0, 'J'},
3138 {"MSR", required_argument, 0, 'M'},
3139 {"msr", required_argument, 0, 'm'},
3140 {"Package", no_argument, 0, 'p'},
3141 {"processor", no_argument, 0, 'p'},
3142 {"Summary", no_argument, 0, 'S'},
3143 {"TCC", required_argument, 0, 'T'},
3144 {"version", no_argument, 0, 'v' },
3145 {0, 0, 0, 0 }
3146 };
103a8fea
LB		 3147
3148 progname = argv[0];
3149
a01e72fb 3150 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:PpST:v",
d8af6f5f 3151 long_options, &option_index)) != -1) {
103a8fea 3152 switch (opt) {
d8af6f5f
LB		 3153 case 'C':
3154 sscanf(optarg, "%x", &extra_delta_offset64);
c98d5d94 3155 break;
d8af6f5f
LB		 3156 case 'c':
3157 sscanf(optarg, "%x", &extra_delta_offset32);
c98d5d94 3158 break;
d8af6f5f 3159 case 'D':
3b4d5c7f
AS		 3160 dump_only++;
3161 break;
d8af6f5f
LB		 3162 case 'd':
3163 debug++;
103a8fea 3164 break;
d8af6f5f
LB		 3165 case 'h':
3166 default:
3167 help();
3168 exit(1);
103a8fea
LB		 3169 case 'i':
3170 interval_sec = atoi(optarg);
3171 break;
d8af6f5f
LB		 3172 case 'J':
3173 rapl_joules++;
8e180f3c 3174 break;
d8af6f5f
LB		 3175 case 'M':
3176 sscanf(optarg, "%x", &extra_msr_offset64);
8e180f3c 3177 break;
2f32edf1
LB		 3178 case 'm':
3179 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 3180 break;
d8af6f5f
LB		 3181 case 'P':
3182 show_pkg_only++;
3183 break;
3184 case 'p':
3185 show_core_only++;
103a8fea 3186 break;
d8af6f5f
LB		 3187 case 'S':
3188 summary_only++;
889facbe
LB		 3189 break;
3190 case 'T':
3191 tcc_activation_temp_override = atoi(optarg);
3192 break;
d8af6f5f
LB		 3193 case 'v':
3194 print_version();
3195 exit(0);
5c56be9a 3196 break;
103a8fea
LB		 3197 }
3198 }
3199}
3200
3201int main(int argc, char **argv)
3202{
3203 cmdline(argc, argv);
3204
d8af6f5f
LB		 3205 if (debug)
3206 print_version();
103a8fea
LB		 3207
3208 turbostat_init();
3209
3b4d5c7f
AS		 3210 /* dump counters and exit */
3211 if (dump_only)
3212 return get_and_dump_counters();
3213
103a8fea
LB		 3214 /*
3215 * if any params left, it must be a command to fork
3216 */
3217 if (argc - optind)
3218 return fork_it(argv + optind);
3219 else
3220 turbostat_loop();
3221
3222 return 0;
3223}
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