]>
Commit | Line | Data |
---|---|---|
103a8fea LB |
1 | /* |
2 | * turbostat -- show CPU frequency and C-state residency | |
3 | * on modern Intel turbo-capable processors. | |
4 | * | |
144b44b1 | 5 | * Copyright (c) 2013 Intel Corporation. |
103a8fea LB |
6 | * Len Brown <len.brown@intel.com> |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms and conditions of the GNU General Public License, | |
10 | * version 2, as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along with | |
18 | * this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
20 | */ | |
21 | ||
88c3281f | 22 | #define _GNU_SOURCE |
b731f311 | 23 | #include MSRHEADER |
103a8fea LB |
24 | #include <stdio.h> |
25 | #include <unistd.h> | |
26 | #include <sys/types.h> | |
27 | #include <sys/wait.h> | |
28 | #include <sys/stat.h> | |
29 | #include <sys/resource.h> | |
30 | #include <fcntl.h> | |
31 | #include <signal.h> | |
32 | #include <sys/time.h> | |
33 | #include <stdlib.h> | |
34 | #include <dirent.h> | |
35 | #include <string.h> | |
36 | #include <ctype.h> | |
88c3281f | 37 | #include <sched.h> |
2b92865e | 38 | #include <cpuid.h> |
103a8fea | 39 | |
103a8fea LB |
40 | char *proc_stat = "/proc/stat"; |
41 | unsigned int interval_sec = 5; /* set with -i interval_sec */ | |
42 | unsigned int verbose; /* set with -v */ | |
889facbe LB |
43 | unsigned int rapl_verbose; /* set with -R */ |
44 | unsigned int thermal_verbose; /* set with -T */ | |
e23da037 | 45 | unsigned int summary_only; /* set with -s */ |
103a8fea LB |
46 | unsigned int skip_c0; |
47 | unsigned int skip_c1; | |
48 | unsigned int do_nhm_cstates; | |
49 | unsigned int do_snb_cstates; | |
ca58710f | 50 | unsigned int do_c8_c9_c10; |
144b44b1 LB |
51 | unsigned int do_slm_cstates; |
52 | unsigned int use_c1_residency_msr; | |
103a8fea | 53 | unsigned int has_aperf; |
889facbe | 54 | unsigned int has_epb; |
103a8fea LB |
55 | unsigned int units = 1000000000; /* Ghz etc */ |
56 | unsigned int genuine_intel; | |
57 | unsigned int has_invariant_tsc; | |
58 | unsigned int do_nehalem_platform_info; | |
59 | unsigned int do_nehalem_turbo_ratio_limit; | |
6574a5d5 | 60 | unsigned int do_ivt_turbo_ratio_limit; |
2f32edf1 LB |
61 | unsigned int extra_msr_offset32; |
62 | unsigned int extra_msr_offset64; | |
8e180f3c LB |
63 | unsigned int extra_delta_offset32; |
64 | unsigned int extra_delta_offset64; | |
1ed51011 | 65 | int do_smi; |
103a8fea LB |
66 | double bclk; |
67 | unsigned int show_pkg; | |
68 | unsigned int show_core; | |
69 | unsigned int show_cpu; | |
c98d5d94 LB |
70 | unsigned int show_pkg_only; |
71 | unsigned int show_core_only; | |
72 | char *output_buffer, *outp; | |
889facbe LB |
73 | unsigned int do_rapl; |
74 | unsigned int do_dts; | |
75 | unsigned int do_ptm; | |
76 | unsigned int tcc_activation_temp; | |
77 | unsigned int tcc_activation_temp_override; | |
78 | double rapl_power_units, rapl_energy_units, rapl_time_units; | |
79 | double rapl_joule_counter_range; | |
80 | ||
81 | #define RAPL_PKG (1 << 0) | |
82 | #define RAPL_CORES (1 << 1) | |
83 | #define RAPL_GFX (1 << 2) | |
84 | #define RAPL_DRAM (1 << 3) | |
85 | #define RAPL_PKG_PERF_STATUS (1 << 4) | |
86 | #define RAPL_DRAM_PERF_STATUS (1 << 5) | |
144b44b1 LB |
87 | #define RAPL_PKG_POWER_INFO (1 << 6) |
88 | #define RAPL_CORE_POLICY (1 << 7) | |
889facbe LB |
89 | #define TJMAX_DEFAULT 100 |
90 | ||
91 | #define MAX(a, b) ((a) > (b) ? (a) : (b)) | |
103a8fea LB |
92 | |
93 | int aperf_mperf_unstable; | |
94 | int backwards_count; | |
95 | char *progname; | |
103a8fea | 96 | |
c98d5d94 LB |
97 | cpu_set_t *cpu_present_set, *cpu_affinity_set; |
98 | size_t cpu_present_setsize, cpu_affinity_setsize; | |
99 | ||
100 | struct thread_data { | |
101 | unsigned long long tsc; | |
102 | unsigned long long aperf; | |
103 | unsigned long long mperf; | |
144b44b1 | 104 | unsigned long long c1; |
2f32edf1 | 105 | unsigned long long extra_msr64; |
8e180f3c LB |
106 | unsigned long long extra_delta64; |
107 | unsigned long long extra_msr32; | |
108 | unsigned long long extra_delta32; | |
1ed51011 | 109 | unsigned int smi_count; |
c98d5d94 LB |
110 | unsigned int cpu_id; |
111 | unsigned int flags; | |
112 | #define CPU_IS_FIRST_THREAD_IN_CORE 0x2 | |
113 | #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4 | |
114 | } *thread_even, *thread_odd; | |
115 | ||
116 | struct core_data { | |
117 | unsigned long long c3; | |
118 | unsigned long long c6; | |
119 | unsigned long long c7; | |
889facbe | 120 | unsigned int core_temp_c; |
c98d5d94 LB |
121 | unsigned int core_id; |
122 | } *core_even, *core_odd; | |
123 | ||
124 | struct pkg_data { | |
125 | unsigned long long pc2; | |
126 | unsigned long long pc3; | |
127 | unsigned long long pc6; | |
128 | unsigned long long pc7; | |
ca58710f KCA |
129 | unsigned long long pc8; |
130 | unsigned long long pc9; | |
131 | unsigned long long pc10; | |
c98d5d94 | 132 | unsigned int package_id; |
889facbe LB |
133 | unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */ |
134 | unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */ | |
135 | unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */ | |
136 | unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */ | |
137 | unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */ | |
138 | unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */ | |
139 | unsigned int pkg_temp_c; | |
140 | ||
c98d5d94 LB |
141 | } *package_even, *package_odd; |
142 | ||
143 | #define ODD_COUNTERS thread_odd, core_odd, package_odd | |
144 | #define EVEN_COUNTERS thread_even, core_even, package_even | |
145 | ||
146 | #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \ | |
147 | (thread_base + (pkg_no) * topo.num_cores_per_pkg * \ | |
148 | topo.num_threads_per_core + \ | |
149 | (core_no) * topo.num_threads_per_core + (thread_no)) | |
150 | #define GET_CORE(core_base, core_no, pkg_no) \ | |
151 | (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no)) | |
152 | #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no) | |
153 | ||
154 | struct system_summary { | |
155 | struct thread_data threads; | |
156 | struct core_data cores; | |
157 | struct pkg_data packages; | |
158 | } sum, average; | |
159 | ||
160 | ||
161 | struct topo_params { | |
162 | int num_packages; | |
163 | int num_cpus; | |
164 | int num_cores; | |
165 | int max_cpu_num; | |
166 | int num_cores_per_pkg; | |
167 | int num_threads_per_core; | |
168 | } topo; | |
169 | ||
170 | struct timeval tv_even, tv_odd, tv_delta; | |
171 | ||
172 | void setup_all_buffers(void); | |
173 | ||
174 | int cpu_is_not_present(int cpu) | |
d15cf7c1 | 175 | { |
c98d5d94 | 176 | return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set); |
d15cf7c1 | 177 | } |
88c3281f | 178 | /* |
c98d5d94 LB |
179 | * run func(thread, core, package) in topology order |
180 | * skip non-present cpus | |
88c3281f | 181 | */ |
c98d5d94 LB |
182 | |
183 | int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *), | |
184 | struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base) | |
88c3281f | 185 | { |
c98d5d94 | 186 | int retval, pkg_no, core_no, thread_no; |
d15cf7c1 | 187 | |
c98d5d94 LB |
188 | for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) { |
189 | for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) { | |
190 | for (thread_no = 0; thread_no < | |
191 | topo.num_threads_per_core; ++thread_no) { | |
192 | struct thread_data *t; | |
193 | struct core_data *c; | |
194 | struct pkg_data *p; | |
88c3281f | 195 | |
c98d5d94 LB |
196 | t = GET_THREAD(thread_base, thread_no, core_no, pkg_no); |
197 | ||
198 | if (cpu_is_not_present(t->cpu_id)) | |
199 | continue; | |
200 | ||
201 | c = GET_CORE(core_base, core_no, pkg_no); | |
202 | p = GET_PKG(pkg_base, pkg_no); | |
203 | ||
204 | retval = func(t, c, p); | |
205 | if (retval) | |
206 | return retval; | |
207 | } | |
208 | } | |
209 | } | |
210 | return 0; | |
88c3281f LB |
211 | } |
212 | ||
213 | int cpu_migrate(int cpu) | |
214 | { | |
c98d5d94 LB |
215 | CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set); |
216 | CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set); | |
217 | if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1) | |
88c3281f LB |
218 | return -1; |
219 | else | |
220 | return 0; | |
221 | } | |
222 | ||
15aaa346 | 223 | int get_msr(int cpu, off_t offset, unsigned long long *msr) |
103a8fea LB |
224 | { |
225 | ssize_t retval; | |
103a8fea LB |
226 | char pathname[32]; |
227 | int fd; | |
228 | ||
229 | sprintf(pathname, "/dev/cpu/%d/msr", cpu); | |
230 | fd = open(pathname, O_RDONLY); | |
15aaa346 LB |
231 | if (fd < 0) |
232 | return -1; | |
103a8fea | 233 | |
15aaa346 | 234 | retval = pread(fd, msr, sizeof *msr, offset); |
103a8fea | 235 | close(fd); |
15aaa346 | 236 | |
d91bb17c | 237 | if (retval != sizeof *msr) { |
2e9c6bc7 | 238 | fprintf(stderr, "%s offset 0x%llx read failed\n", pathname, (unsigned long long)offset); |
15aaa346 | 239 | return -1; |
d91bb17c | 240 | } |
15aaa346 LB |
241 | |
242 | return 0; | |
103a8fea LB |
243 | } |
244 | ||
a829eb4d | 245 | void print_header(void) |
103a8fea LB |
246 | { |
247 | if (show_pkg) | |
c98d5d94 | 248 | outp += sprintf(outp, "pk"); |
e23da037 | 249 | if (show_pkg) |
c98d5d94 | 250 | outp += sprintf(outp, " "); |
103a8fea | 251 | if (show_core) |
c98d5d94 | 252 | outp += sprintf(outp, "cor"); |
103a8fea | 253 | if (show_cpu) |
c98d5d94 | 254 | outp += sprintf(outp, " CPU"); |
e23da037 | 255 | if (show_pkg || show_core || show_cpu) |
c98d5d94 | 256 | outp += sprintf(outp, " "); |
103a8fea | 257 | if (do_nhm_cstates) |
c98d5d94 | 258 | outp += sprintf(outp, " %%c0"); |
103a8fea | 259 | if (has_aperf) |
c98d5d94 LB |
260 | outp += sprintf(outp, " GHz"); |
261 | outp += sprintf(outp, " TSC"); | |
1ed51011 LB |
262 | if (do_smi) |
263 | outp += sprintf(outp, " SMI"); | |
8e180f3c | 264 | if (extra_delta_offset32) |
f9240813 | 265 | outp += sprintf(outp, " count 0x%03X", extra_delta_offset32); |
8e180f3c | 266 | if (extra_delta_offset64) |
f9240813 | 267 | outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64); |
2f32edf1 | 268 | if (extra_msr_offset32) |
8e180f3c | 269 | outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32); |
2f32edf1 | 270 | if (extra_msr_offset64) |
8e180f3c | 271 | outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64); |
103a8fea | 272 | if (do_nhm_cstates) |
c98d5d94 | 273 | outp += sprintf(outp, " %%c1"); |
144b44b1 | 274 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 275 | outp += sprintf(outp, " %%c3"); |
103a8fea | 276 | if (do_nhm_cstates) |
c98d5d94 | 277 | outp += sprintf(outp, " %%c6"); |
103a8fea | 278 | if (do_snb_cstates) |
c98d5d94 | 279 | outp += sprintf(outp, " %%c7"); |
889facbe LB |
280 | |
281 | if (do_dts) | |
282 | outp += sprintf(outp, " CTMP"); | |
283 | if (do_ptm) | |
284 | outp += sprintf(outp, " PTMP"); | |
285 | ||
103a8fea | 286 | if (do_snb_cstates) |
c98d5d94 | 287 | outp += sprintf(outp, " %%pc2"); |
144b44b1 | 288 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 289 | outp += sprintf(outp, " %%pc3"); |
144b44b1 | 290 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 291 | outp += sprintf(outp, " %%pc6"); |
103a8fea | 292 | if (do_snb_cstates) |
c98d5d94 | 293 | outp += sprintf(outp, " %%pc7"); |
ca58710f KCA |
294 | if (do_c8_c9_c10) { |
295 | outp += sprintf(outp, " %%pc8"); | |
296 | outp += sprintf(outp, " %%pc9"); | |
297 | outp += sprintf(outp, " %%pc10"); | |
298 | } | |
103a8fea | 299 | |
889facbe LB |
300 | if (do_rapl & RAPL_PKG) |
301 | outp += sprintf(outp, " Pkg_W"); | |
302 | if (do_rapl & RAPL_CORES) | |
303 | outp += sprintf(outp, " Cor_W"); | |
304 | if (do_rapl & RAPL_GFX) | |
305 | outp += sprintf(outp, " GFX_W"); | |
306 | if (do_rapl & RAPL_DRAM) | |
307 | outp += sprintf(outp, " RAM_W"); | |
308 | if (do_rapl & RAPL_PKG_PERF_STATUS) | |
309 | outp += sprintf(outp, " PKG_%%"); | |
310 | if (do_rapl & RAPL_DRAM_PERF_STATUS) | |
311 | outp += sprintf(outp, " RAM_%%"); | |
312 | ||
c98d5d94 | 313 | outp += sprintf(outp, "\n"); |
103a8fea LB |
314 | } |
315 | ||
c98d5d94 LB |
316 | int dump_counters(struct thread_data *t, struct core_data *c, |
317 | struct pkg_data *p) | |
103a8fea | 318 | { |
c98d5d94 LB |
319 | fprintf(stderr, "t %p, c %p, p %p\n", t, c, p); |
320 | ||
321 | if (t) { | |
322 | fprintf(stderr, "CPU: %d flags 0x%x\n", t->cpu_id, t->flags); | |
323 | fprintf(stderr, "TSC: %016llX\n", t->tsc); | |
324 | fprintf(stderr, "aperf: %016llX\n", t->aperf); | |
325 | fprintf(stderr, "mperf: %016llX\n", t->mperf); | |
326 | fprintf(stderr, "c1: %016llX\n", t->c1); | |
8e180f3c LB |
327 | fprintf(stderr, "msr0x%x: %08llX\n", |
328 | extra_delta_offset32, t->extra_delta32); | |
329 | fprintf(stderr, "msr0x%x: %016llX\n", | |
330 | extra_delta_offset64, t->extra_delta64); | |
331 | fprintf(stderr, "msr0x%x: %08llX\n", | |
2f32edf1 | 332 | extra_msr_offset32, t->extra_msr32); |
c98d5d94 | 333 | fprintf(stderr, "msr0x%x: %016llX\n", |
2f32edf1 | 334 | extra_msr_offset64, t->extra_msr64); |
1ed51011 LB |
335 | if (do_smi) |
336 | fprintf(stderr, "SMI: %08X\n", t->smi_count); | |
c98d5d94 | 337 | } |
103a8fea | 338 | |
c98d5d94 LB |
339 | if (c) { |
340 | fprintf(stderr, "core: %d\n", c->core_id); | |
341 | fprintf(stderr, "c3: %016llX\n", c->c3); | |
342 | fprintf(stderr, "c6: %016llX\n", c->c6); | |
343 | fprintf(stderr, "c7: %016llX\n", c->c7); | |
889facbe | 344 | fprintf(stderr, "DTS: %dC\n", c->core_temp_c); |
c98d5d94 | 345 | } |
103a8fea | 346 | |
c98d5d94 LB |
347 | if (p) { |
348 | fprintf(stderr, "package: %d\n", p->package_id); | |
349 | fprintf(stderr, "pc2: %016llX\n", p->pc2); | |
350 | fprintf(stderr, "pc3: %016llX\n", p->pc3); | |
351 | fprintf(stderr, "pc6: %016llX\n", p->pc6); | |
352 | fprintf(stderr, "pc7: %016llX\n", p->pc7); | |
ca58710f KCA |
353 | fprintf(stderr, "pc8: %016llX\n", p->pc8); |
354 | fprintf(stderr, "pc9: %016llX\n", p->pc9); | |
355 | fprintf(stderr, "pc10: %016llX\n", p->pc10); | |
889facbe LB |
356 | fprintf(stderr, "Joules PKG: %0X\n", p->energy_pkg); |
357 | fprintf(stderr, "Joules COR: %0X\n", p->energy_cores); | |
358 | fprintf(stderr, "Joules GFX: %0X\n", p->energy_gfx); | |
359 | fprintf(stderr, "Joules RAM: %0X\n", p->energy_dram); | |
360 | fprintf(stderr, "Throttle PKG: %0X\n", p->rapl_pkg_perf_status); | |
361 | fprintf(stderr, "Throttle RAM: %0X\n", p->rapl_dram_perf_status); | |
362 | fprintf(stderr, "PTM: %dC\n", p->pkg_temp_c); | |
c98d5d94 LB |
363 | } |
364 | return 0; | |
103a8fea LB |
365 | } |
366 | ||
e23da037 LB |
367 | /* |
368 | * column formatting convention & formats | |
369 | * package: "pk" 2 columns %2d | |
370 | * core: "cor" 3 columns %3d | |
371 | * CPU: "CPU" 3 columns %3d | |
889facbe LB |
372 | * Pkg_W: %6.2 |
373 | * Cor_W: %6.2 | |
374 | * GFX_W: %5.2 | |
375 | * RAM_W: %5.2 | |
e23da037 LB |
376 | * GHz: "GHz" 3 columns %3.2 |
377 | * TSC: "TSC" 3 columns %3.2 | |
1ed51011 | 378 | * SMI: "SMI" 4 columns %4d |
e23da037 | 379 | * percentage " %pc3" %6.2 |
889facbe LB |
380 | * Perf Status percentage: %5.2 |
381 | * "CTMP" 4 columns %4d | |
e23da037 | 382 | */ |
c98d5d94 LB |
383 | int format_counters(struct thread_data *t, struct core_data *c, |
384 | struct pkg_data *p) | |
103a8fea LB |
385 | { |
386 | double interval_float; | |
889facbe | 387 | char *fmt5, *fmt6; |
103a8fea | 388 | |
c98d5d94 LB |
389 | /* if showing only 1st thread in core and this isn't one, bail out */ |
390 | if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
391 | return 0; | |
392 | ||
393 | /* if showing only 1st thread in pkg and this isn't one, bail out */ | |
394 | if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
395 | return 0; | |
396 | ||
103a8fea LB |
397 | interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0; |
398 | ||
c98d5d94 LB |
399 | /* topo columns, print blanks on 1st (average) line */ |
400 | if (t == &average.threads) { | |
103a8fea | 401 | if (show_pkg) |
c98d5d94 | 402 | outp += sprintf(outp, " "); |
e23da037 | 403 | if (show_pkg && show_core) |
c98d5d94 | 404 | outp += sprintf(outp, " "); |
103a8fea | 405 | if (show_core) |
c98d5d94 | 406 | outp += sprintf(outp, " "); |
103a8fea | 407 | if (show_cpu) |
c98d5d94 | 408 | outp += sprintf(outp, " " " "); |
103a8fea | 409 | } else { |
c98d5d94 LB |
410 | if (show_pkg) { |
411 | if (p) | |
412 | outp += sprintf(outp, "%2d", p->package_id); | |
413 | else | |
414 | outp += sprintf(outp, " "); | |
415 | } | |
e23da037 | 416 | if (show_pkg && show_core) |
c98d5d94 LB |
417 | outp += sprintf(outp, " "); |
418 | if (show_core) { | |
419 | if (c) | |
420 | outp += sprintf(outp, "%3d", c->core_id); | |
421 | else | |
422 | outp += sprintf(outp, " "); | |
423 | } | |
103a8fea | 424 | if (show_cpu) |
c98d5d94 | 425 | outp += sprintf(outp, " %3d", t->cpu_id); |
103a8fea | 426 | } |
103a8fea LB |
427 | /* %c0 */ |
428 | if (do_nhm_cstates) { | |
e23da037 | 429 | if (show_pkg || show_core || show_cpu) |
c98d5d94 | 430 | outp += sprintf(outp, " "); |
103a8fea | 431 | if (!skip_c0) |
c98d5d94 | 432 | outp += sprintf(outp, "%6.2f", 100.0 * t->mperf/t->tsc); |
103a8fea | 433 | else |
c98d5d94 | 434 | outp += sprintf(outp, " ****"); |
103a8fea LB |
435 | } |
436 | ||
437 | /* GHz */ | |
438 | if (has_aperf) { | |
439 | if (!aperf_mperf_unstable) { | |
c98d5d94 LB |
440 | outp += sprintf(outp, " %3.2f", |
441 | 1.0 * t->tsc / units * t->aperf / | |
442 | t->mperf / interval_float); | |
103a8fea | 443 | } else { |
c98d5d94 LB |
444 | if (t->aperf > t->tsc || t->mperf > t->tsc) { |
445 | outp += sprintf(outp, " ***"); | |
103a8fea | 446 | } else { |
c98d5d94 LB |
447 | outp += sprintf(outp, "%3.1f*", |
448 | 1.0 * t->tsc / | |
449 | units * t->aperf / | |
450 | t->mperf / interval_float); | |
103a8fea LB |
451 | } |
452 | } | |
453 | } | |
454 | ||
455 | /* TSC */ | |
c98d5d94 | 456 | outp += sprintf(outp, "%5.2f", 1.0 * t->tsc/units/interval_float); |
103a8fea | 457 | |
1ed51011 LB |
458 | /* SMI */ |
459 | if (do_smi) | |
460 | outp += sprintf(outp, "%4d", t->smi_count); | |
461 | ||
8e180f3c LB |
462 | /* delta */ |
463 | if (extra_delta_offset32) | |
464 | outp += sprintf(outp, " %11llu", t->extra_delta32); | |
465 | ||
466 | /* DELTA */ | |
467 | if (extra_delta_offset64) | |
468 | outp += sprintf(outp, " %11llu", t->extra_delta64); | |
2f32edf1 LB |
469 | /* msr */ |
470 | if (extra_msr_offset32) | |
8e180f3c | 471 | outp += sprintf(outp, " 0x%08llx", t->extra_msr32); |
2f32edf1 | 472 | |
130ff304 | 473 | /* MSR */ |
2f32edf1 LB |
474 | if (extra_msr_offset64) |
475 | outp += sprintf(outp, " 0x%016llx", t->extra_msr64); | |
130ff304 | 476 | |
103a8fea LB |
477 | if (do_nhm_cstates) { |
478 | if (!skip_c1) | |
c98d5d94 | 479 | outp += sprintf(outp, " %6.2f", 100.0 * t->c1/t->tsc); |
103a8fea | 480 | else |
c98d5d94 | 481 | outp += sprintf(outp, " ****"); |
103a8fea | 482 | } |
c98d5d94 LB |
483 | |
484 | /* print per-core data only for 1st thread in core */ | |
485 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
486 | goto done; | |
487 | ||
144b44b1 | 488 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 489 | outp += sprintf(outp, " %6.2f", 100.0 * c->c3/t->tsc); |
103a8fea | 490 | if (do_nhm_cstates) |
c98d5d94 | 491 | outp += sprintf(outp, " %6.2f", 100.0 * c->c6/t->tsc); |
103a8fea | 492 | if (do_snb_cstates) |
c98d5d94 LB |
493 | outp += sprintf(outp, " %6.2f", 100.0 * c->c7/t->tsc); |
494 | ||
889facbe LB |
495 | if (do_dts) |
496 | outp += sprintf(outp, " %4d", c->core_temp_c); | |
497 | ||
c98d5d94 LB |
498 | /* print per-package data only for 1st core in package */ |
499 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
500 | goto done; | |
501 | ||
889facbe LB |
502 | if (do_ptm) |
503 | outp += sprintf(outp, " %4d", p->pkg_temp_c); | |
504 | ||
103a8fea | 505 | if (do_snb_cstates) |
c98d5d94 | 506 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc2/t->tsc); |
144b44b1 | 507 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 508 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc3/t->tsc); |
144b44b1 | 509 | if (do_nhm_cstates && !do_slm_cstates) |
c98d5d94 | 510 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc6/t->tsc); |
103a8fea | 511 | if (do_snb_cstates) |
c98d5d94 | 512 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc7/t->tsc); |
ca58710f KCA |
513 | if (do_c8_c9_c10) { |
514 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc8/t->tsc); | |
515 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc9/t->tsc); | |
516 | outp += sprintf(outp, " %6.2f", 100.0 * p->pc10/t->tsc); | |
517 | } | |
889facbe LB |
518 | |
519 | /* | |
520 | * If measurement interval exceeds minimum RAPL Joule Counter range, | |
521 | * indicate that results are suspect by printing "**" in fraction place. | |
522 | */ | |
523 | if (interval_float < rapl_joule_counter_range) { | |
524 | fmt5 = " %5.2f"; | |
525 | fmt6 = " %6.2f"; | |
526 | } else { | |
527 | fmt5 = " %3.0f**"; | |
528 | fmt6 = " %4.0f**"; | |
529 | } | |
530 | ||
531 | if (do_rapl & RAPL_PKG) | |
532 | outp += sprintf(outp, fmt6, p->energy_pkg * rapl_energy_units / interval_float); | |
533 | if (do_rapl & RAPL_CORES) | |
534 | outp += sprintf(outp, fmt6, p->energy_cores * rapl_energy_units / interval_float); | |
535 | if (do_rapl & RAPL_GFX) | |
536 | outp += sprintf(outp, fmt5, p->energy_gfx * rapl_energy_units / interval_float); | |
537 | if (do_rapl & RAPL_DRAM) | |
538 | outp += sprintf(outp, fmt5, p->energy_dram * rapl_energy_units / interval_float); | |
539 | if (do_rapl & RAPL_PKG_PERF_STATUS ) | |
540 | outp += sprintf(outp, fmt5, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float); | |
541 | if (do_rapl & RAPL_DRAM_PERF_STATUS ) | |
542 | outp += sprintf(outp, fmt5, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float); | |
543 | ||
c98d5d94 | 544 | done: |
c98d5d94 LB |
545 | outp += sprintf(outp, "\n"); |
546 | ||
547 | return 0; | |
103a8fea LB |
548 | } |
549 | ||
c98d5d94 LB |
550 | void flush_stdout() |
551 | { | |
552 | fputs(output_buffer, stdout); | |
ddac0d68 | 553 | fflush(stdout); |
c98d5d94 LB |
554 | outp = output_buffer; |
555 | } | |
556 | void flush_stderr() | |
557 | { | |
558 | fputs(output_buffer, stderr); | |
559 | outp = output_buffer; | |
560 | } | |
561 | void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
103a8fea | 562 | { |
e23da037 | 563 | static int printed; |
103a8fea | 564 | |
e23da037 LB |
565 | if (!printed || !summary_only) |
566 | print_header(); | |
103a8fea | 567 | |
c98d5d94 LB |
568 | if (topo.num_cpus > 1) |
569 | format_counters(&average.threads, &average.cores, | |
570 | &average.packages); | |
103a8fea | 571 | |
e23da037 LB |
572 | printed = 1; |
573 | ||
574 | if (summary_only) | |
575 | return; | |
576 | ||
c98d5d94 | 577 | for_all_cpus(format_counters, t, c, p); |
103a8fea LB |
578 | } |
579 | ||
889facbe LB |
580 | #define DELTA_WRAP32(new, old) \ |
581 | if (new > old) { \ | |
582 | old = new - old; \ | |
583 | } else { \ | |
584 | old = 0x100000000 + new - old; \ | |
585 | } | |
586 | ||
c98d5d94 LB |
587 | void |
588 | delta_package(struct pkg_data *new, struct pkg_data *old) | |
589 | { | |
590 | old->pc2 = new->pc2 - old->pc2; | |
591 | old->pc3 = new->pc3 - old->pc3; | |
592 | old->pc6 = new->pc6 - old->pc6; | |
593 | old->pc7 = new->pc7 - old->pc7; | |
ca58710f KCA |
594 | old->pc8 = new->pc8 - old->pc8; |
595 | old->pc9 = new->pc9 - old->pc9; | |
596 | old->pc10 = new->pc10 - old->pc10; | |
889facbe LB |
597 | old->pkg_temp_c = new->pkg_temp_c; |
598 | ||
599 | DELTA_WRAP32(new->energy_pkg, old->energy_pkg); | |
600 | DELTA_WRAP32(new->energy_cores, old->energy_cores); | |
601 | DELTA_WRAP32(new->energy_gfx, old->energy_gfx); | |
602 | DELTA_WRAP32(new->energy_dram, old->energy_dram); | |
603 | DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status); | |
604 | DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status); | |
c98d5d94 | 605 | } |
103a8fea | 606 | |
c98d5d94 LB |
607 | void |
608 | delta_core(struct core_data *new, struct core_data *old) | |
103a8fea | 609 | { |
c98d5d94 LB |
610 | old->c3 = new->c3 - old->c3; |
611 | old->c6 = new->c6 - old->c6; | |
612 | old->c7 = new->c7 - old->c7; | |
889facbe | 613 | old->core_temp_c = new->core_temp_c; |
c98d5d94 | 614 | } |
103a8fea | 615 | |
c3ae331d LB |
616 | /* |
617 | * old = new - old | |
618 | */ | |
c98d5d94 LB |
619 | void |
620 | delta_thread(struct thread_data *new, struct thread_data *old, | |
621 | struct core_data *core_delta) | |
622 | { | |
623 | old->tsc = new->tsc - old->tsc; | |
624 | ||
625 | /* check for TSC < 1 Mcycles over interval */ | |
626 | if (old->tsc < (1000 * 1000)) { | |
627 | fprintf(stderr, "Insanely slow TSC rate, TSC stops in idle?\n"); | |
628 | fprintf(stderr, "You can disable all c-states by booting with \"idle=poll\"\n"); | |
629 | fprintf(stderr, "or just the deep ones with \"processor.max_cstate=1\"\n"); | |
630 | exit(-3); | |
631 | } | |
103a8fea | 632 | |
c98d5d94 | 633 | old->c1 = new->c1 - old->c1; |
103a8fea | 634 | |
c98d5d94 LB |
635 | if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) { |
636 | old->aperf = new->aperf - old->aperf; | |
637 | old->mperf = new->mperf - old->mperf; | |
638 | } else { | |
103a8fea | 639 | |
c98d5d94 LB |
640 | if (!aperf_mperf_unstable) { |
641 | fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname); | |
642 | fprintf(stderr, "* Frequency results do not cover entire interval *\n"); | |
643 | fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n"); | |
103a8fea | 644 | |
c98d5d94 | 645 | aperf_mperf_unstable = 1; |
103a8fea | 646 | } |
103a8fea | 647 | /* |
c98d5d94 LB |
648 | * mperf delta is likely a huge "positive" number |
649 | * can not use it for calculating c0 time | |
103a8fea | 650 | */ |
c98d5d94 LB |
651 | skip_c0 = 1; |
652 | skip_c1 = 1; | |
653 | } | |
103a8fea | 654 | |
103a8fea | 655 | |
144b44b1 LB |
656 | if (use_c1_residency_msr) { |
657 | /* | |
658 | * Some models have a dedicated C1 residency MSR, | |
659 | * which should be more accurate than the derivation below. | |
660 | */ | |
661 | } else { | |
662 | /* | |
663 | * As counter collection is not atomic, | |
664 | * it is possible for mperf's non-halted cycles + idle states | |
665 | * to exceed TSC's all cycles: show c1 = 0% in that case. | |
666 | */ | |
667 | if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc) | |
668 | old->c1 = 0; | |
669 | else { | |
670 | /* normal case, derive c1 */ | |
671 | old->c1 = old->tsc - old->mperf - core_delta->c3 | |
c98d5d94 | 672 | - core_delta->c6 - core_delta->c7; |
144b44b1 | 673 | } |
c98d5d94 | 674 | } |
c3ae331d | 675 | |
c98d5d94 | 676 | if (old->mperf == 0) { |
c3ae331d | 677 | if (verbose > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id); |
c98d5d94 | 678 | old->mperf = 1; /* divide by 0 protection */ |
103a8fea | 679 | } |
c98d5d94 | 680 | |
8e180f3c LB |
681 | old->extra_delta32 = new->extra_delta32 - old->extra_delta32; |
682 | old->extra_delta32 &= 0xFFFFFFFF; | |
683 | ||
684 | old->extra_delta64 = new->extra_delta64 - old->extra_delta64; | |
685 | ||
c98d5d94 | 686 | /* |
8e180f3c | 687 | * Extra MSR is just a snapshot, simply copy latest w/o subtracting |
c98d5d94 | 688 | */ |
2f32edf1 LB |
689 | old->extra_msr32 = new->extra_msr32; |
690 | old->extra_msr64 = new->extra_msr64; | |
1ed51011 LB |
691 | |
692 | if (do_smi) | |
693 | old->smi_count = new->smi_count - old->smi_count; | |
c98d5d94 LB |
694 | } |
695 | ||
696 | int delta_cpu(struct thread_data *t, struct core_data *c, | |
697 | struct pkg_data *p, struct thread_data *t2, | |
698 | struct core_data *c2, struct pkg_data *p2) | |
699 | { | |
700 | /* calculate core delta only for 1st thread in core */ | |
701 | if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE) | |
702 | delta_core(c, c2); | |
703 | ||
704 | /* always calculate thread delta */ | |
705 | delta_thread(t, t2, c2); /* c2 is core delta */ | |
706 | ||
707 | /* calculate package delta only for 1st core in package */ | |
708 | if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE) | |
709 | delta_package(p, p2); | |
710 | ||
103a8fea LB |
711 | return 0; |
712 | } | |
713 | ||
c98d5d94 LB |
714 | void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) |
715 | { | |
716 | t->tsc = 0; | |
717 | t->aperf = 0; | |
718 | t->mperf = 0; | |
719 | t->c1 = 0; | |
720 | ||
1ed51011 | 721 | t->smi_count = 0; |
8e180f3c LB |
722 | t->extra_delta32 = 0; |
723 | t->extra_delta64 = 0; | |
724 | ||
c98d5d94 LB |
725 | /* tells format_counters to dump all fields from this set */ |
726 | t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE; | |
727 | ||
728 | c->c3 = 0; | |
729 | c->c6 = 0; | |
730 | c->c7 = 0; | |
889facbe | 731 | c->core_temp_c = 0; |
c98d5d94 LB |
732 | |
733 | p->pc2 = 0; | |
734 | p->pc3 = 0; | |
735 | p->pc6 = 0; | |
736 | p->pc7 = 0; | |
ca58710f KCA |
737 | p->pc8 = 0; |
738 | p->pc9 = 0; | |
739 | p->pc10 = 0; | |
889facbe LB |
740 | |
741 | p->energy_pkg = 0; | |
742 | p->energy_dram = 0; | |
743 | p->energy_cores = 0; | |
744 | p->energy_gfx = 0; | |
745 | p->rapl_pkg_perf_status = 0; | |
746 | p->rapl_dram_perf_status = 0; | |
747 | p->pkg_temp_c = 0; | |
c98d5d94 LB |
748 | } |
749 | int sum_counters(struct thread_data *t, struct core_data *c, | |
750 | struct pkg_data *p) | |
103a8fea | 751 | { |
c98d5d94 LB |
752 | average.threads.tsc += t->tsc; |
753 | average.threads.aperf += t->aperf; | |
754 | average.threads.mperf += t->mperf; | |
755 | average.threads.c1 += t->c1; | |
103a8fea | 756 | |
8e180f3c LB |
757 | average.threads.extra_delta32 += t->extra_delta32; |
758 | average.threads.extra_delta64 += t->extra_delta64; | |
759 | ||
c98d5d94 LB |
760 | /* sum per-core values only for 1st thread in core */ |
761 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
762 | return 0; | |
103a8fea | 763 | |
c98d5d94 LB |
764 | average.cores.c3 += c->c3; |
765 | average.cores.c6 += c->c6; | |
766 | average.cores.c7 += c->c7; | |
767 | ||
889facbe LB |
768 | average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c); |
769 | ||
c98d5d94 LB |
770 | /* sum per-pkg values only for 1st core in pkg */ |
771 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
772 | return 0; | |
773 | ||
774 | average.packages.pc2 += p->pc2; | |
775 | average.packages.pc3 += p->pc3; | |
776 | average.packages.pc6 += p->pc6; | |
777 | average.packages.pc7 += p->pc7; | |
ca58710f KCA |
778 | average.packages.pc8 += p->pc8; |
779 | average.packages.pc9 += p->pc9; | |
780 | average.packages.pc10 += p->pc10; | |
c98d5d94 | 781 | |
889facbe LB |
782 | average.packages.energy_pkg += p->energy_pkg; |
783 | average.packages.energy_dram += p->energy_dram; | |
784 | average.packages.energy_cores += p->energy_cores; | |
785 | average.packages.energy_gfx += p->energy_gfx; | |
786 | ||
787 | average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c); | |
788 | ||
789 | average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status; | |
790 | average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status; | |
c98d5d94 LB |
791 | return 0; |
792 | } | |
793 | /* | |
794 | * sum the counters for all cpus in the system | |
795 | * compute the weighted average | |
796 | */ | |
797 | void compute_average(struct thread_data *t, struct core_data *c, | |
798 | struct pkg_data *p) | |
799 | { | |
800 | clear_counters(&average.threads, &average.cores, &average.packages); | |
801 | ||
802 | for_all_cpus(sum_counters, t, c, p); | |
803 | ||
804 | average.threads.tsc /= topo.num_cpus; | |
805 | average.threads.aperf /= topo.num_cpus; | |
806 | average.threads.mperf /= topo.num_cpus; | |
807 | average.threads.c1 /= topo.num_cpus; | |
808 | ||
8e180f3c LB |
809 | average.threads.extra_delta32 /= topo.num_cpus; |
810 | average.threads.extra_delta32 &= 0xFFFFFFFF; | |
811 | ||
812 | average.threads.extra_delta64 /= topo.num_cpus; | |
813 | ||
c98d5d94 LB |
814 | average.cores.c3 /= topo.num_cores; |
815 | average.cores.c6 /= topo.num_cores; | |
816 | average.cores.c7 /= topo.num_cores; | |
817 | ||
818 | average.packages.pc2 /= topo.num_packages; | |
819 | average.packages.pc3 /= topo.num_packages; | |
820 | average.packages.pc6 /= topo.num_packages; | |
821 | average.packages.pc7 /= topo.num_packages; | |
ca58710f KCA |
822 | |
823 | average.packages.pc8 /= topo.num_packages; | |
824 | average.packages.pc9 /= topo.num_packages; | |
825 | average.packages.pc10 /= topo.num_packages; | |
103a8fea LB |
826 | } |
827 | ||
c98d5d94 | 828 | static unsigned long long rdtsc(void) |
103a8fea | 829 | { |
c98d5d94 | 830 | unsigned int low, high; |
15aaa346 | 831 | |
c98d5d94 | 832 | asm volatile("rdtsc" : "=a" (low), "=d" (high)); |
15aaa346 | 833 | |
c98d5d94 LB |
834 | return low | ((unsigned long long)high) << 32; |
835 | } | |
15aaa346 | 836 | |
15aaa346 | 837 | |
c98d5d94 LB |
838 | /* |
839 | * get_counters(...) | |
840 | * migrate to cpu | |
841 | * acquire and record local counters for that cpu | |
842 | */ | |
843 | int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
844 | { | |
845 | int cpu = t->cpu_id; | |
889facbe | 846 | unsigned long long msr; |
88c3281f | 847 | |
e52966c0 LB |
848 | if (cpu_migrate(cpu)) { |
849 | fprintf(stderr, "Could not migrate to CPU %d\n", cpu); | |
c98d5d94 | 850 | return -1; |
e52966c0 | 851 | } |
15aaa346 | 852 | |
c98d5d94 LB |
853 | t->tsc = rdtsc(); /* we are running on local CPU of interest */ |
854 | ||
855 | if (has_aperf) { | |
9c63a650 | 856 | if (get_msr(cpu, MSR_IA32_APERF, &t->aperf)) |
c98d5d94 | 857 | return -3; |
9c63a650 | 858 | if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf)) |
c98d5d94 LB |
859 | return -4; |
860 | } | |
861 | ||
1ed51011 LB |
862 | if (do_smi) { |
863 | if (get_msr(cpu, MSR_SMI_COUNT, &msr)) | |
864 | return -5; | |
865 | t->smi_count = msr & 0xFFFFFFFF; | |
866 | } | |
8e180f3c | 867 | if (extra_delta_offset32) { |
889facbe | 868 | if (get_msr(cpu, extra_delta_offset32, &msr)) |
8e180f3c | 869 | return -5; |
889facbe | 870 | t->extra_delta32 = msr & 0xFFFFFFFF; |
8e180f3c LB |
871 | } |
872 | ||
873 | if (extra_delta_offset64) | |
874 | if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64)) | |
2f32edf1 LB |
875 | return -5; |
876 | ||
8e180f3c | 877 | if (extra_msr_offset32) { |
889facbe | 878 | if (get_msr(cpu, extra_msr_offset32, &msr)) |
8e180f3c | 879 | return -5; |
889facbe | 880 | t->extra_msr32 = msr & 0xFFFFFFFF; |
8e180f3c LB |
881 | } |
882 | ||
2f32edf1 LB |
883 | if (extra_msr_offset64) |
884 | if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64)) | |
c98d5d94 LB |
885 | return -5; |
886 | ||
144b44b1 LB |
887 | if (use_c1_residency_msr) { |
888 | if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1)) | |
889 | return -6; | |
890 | } | |
891 | ||
c98d5d94 LB |
892 | /* collect core counters only for 1st thread in core */ |
893 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
894 | return 0; | |
895 | ||
144b44b1 | 896 | if (do_nhm_cstates && !do_slm_cstates) { |
c98d5d94 LB |
897 | if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3)) |
898 | return -6; | |
144b44b1 LB |
899 | } |
900 | ||
901 | if (do_nhm_cstates) { | |
c98d5d94 LB |
902 | if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6)) |
903 | return -7; | |
904 | } | |
905 | ||
906 | if (do_snb_cstates) | |
907 | if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7)) | |
908 | return -8; | |
909 | ||
889facbe LB |
910 | if (do_dts) { |
911 | if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) | |
912 | return -9; | |
913 | c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); | |
914 | } | |
915 | ||
916 | ||
c98d5d94 LB |
917 | /* collect package counters only for 1st core in package */ |
918 | if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
919 | return 0; | |
920 | ||
144b44b1 | 921 | if (do_nhm_cstates && !do_slm_cstates) { |
c98d5d94 LB |
922 | if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3)) |
923 | return -9; | |
924 | if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6)) | |
925 | return -10; | |
926 | } | |
927 | if (do_snb_cstates) { | |
928 | if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2)) | |
929 | return -11; | |
930 | if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7)) | |
931 | return -12; | |
103a8fea | 932 | } |
ca58710f KCA |
933 | if (do_c8_c9_c10) { |
934 | if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8)) | |
935 | return -13; | |
936 | if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9)) | |
937 | return -13; | |
938 | if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10)) | |
939 | return -13; | |
940 | } | |
889facbe LB |
941 | if (do_rapl & RAPL_PKG) { |
942 | if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr)) | |
943 | return -13; | |
944 | p->energy_pkg = msr & 0xFFFFFFFF; | |
945 | } | |
946 | if (do_rapl & RAPL_CORES) { | |
947 | if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr)) | |
948 | return -14; | |
949 | p->energy_cores = msr & 0xFFFFFFFF; | |
950 | } | |
951 | if (do_rapl & RAPL_DRAM) { | |
952 | if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr)) | |
953 | return -15; | |
954 | p->energy_dram = msr & 0xFFFFFFFF; | |
955 | } | |
956 | if (do_rapl & RAPL_GFX) { | |
957 | if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr)) | |
958 | return -16; | |
959 | p->energy_gfx = msr & 0xFFFFFFFF; | |
960 | } | |
961 | if (do_rapl & RAPL_PKG_PERF_STATUS) { | |
962 | if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr)) | |
963 | return -16; | |
964 | p->rapl_pkg_perf_status = msr & 0xFFFFFFFF; | |
965 | } | |
966 | if (do_rapl & RAPL_DRAM_PERF_STATUS) { | |
967 | if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr)) | |
968 | return -16; | |
969 | p->rapl_dram_perf_status = msr & 0xFFFFFFFF; | |
970 | } | |
971 | if (do_ptm) { | |
972 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) | |
973 | return -17; | |
974 | p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F); | |
975 | } | |
15aaa346 | 976 | return 0; |
103a8fea LB |
977 | } |
978 | ||
c98d5d94 | 979 | void print_verbose_header(void) |
103a8fea LB |
980 | { |
981 | unsigned long long msr; | |
982 | unsigned int ratio; | |
983 | ||
984 | if (!do_nehalem_platform_info) | |
985 | return; | |
986 | ||
9c63a650 | 987 | get_msr(0, MSR_NHM_PLATFORM_INFO, &msr); |
103a8fea | 988 | |
67920418 | 989 | fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr); |
6574a5d5 | 990 | |
103a8fea LB |
991 | ratio = (msr >> 40) & 0xFF; |
992 | fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", | |
993 | ratio, bclk, ratio * bclk); | |
994 | ||
995 | ratio = (msr >> 8) & 0xFF; | |
996 | fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n", | |
997 | ratio, bclk, ratio * bclk); | |
998 | ||
67920418 | 999 | get_msr(0, MSR_IA32_POWER_CTL, &msr); |
144b44b1 | 1000 | fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n", |
67920418 LB |
1001 | msr, msr & 0x2 ? "EN" : "DIS"); |
1002 | ||
6574a5d5 LB |
1003 | if (!do_ivt_turbo_ratio_limit) |
1004 | goto print_nhm_turbo_ratio_limits; | |
1005 | ||
1006 | get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr); | |
1007 | ||
67920418 | 1008 | fprintf(stderr, "cpu0: MSR_IVT_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); |
6574a5d5 LB |
1009 | |
1010 | ratio = (msr >> 56) & 0xFF; | |
1011 | if (ratio) | |
1012 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n", | |
1013 | ratio, bclk, ratio * bclk); | |
1014 | ||
1015 | ratio = (msr >> 48) & 0xFF; | |
1016 | if (ratio) | |
1017 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n", | |
1018 | ratio, bclk, ratio * bclk); | |
1019 | ||
1020 | ratio = (msr >> 40) & 0xFF; | |
1021 | if (ratio) | |
1022 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n", | |
1023 | ratio, bclk, ratio * bclk); | |
1024 | ||
1025 | ratio = (msr >> 32) & 0xFF; | |
1026 | if (ratio) | |
1027 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n", | |
1028 | ratio, bclk, ratio * bclk); | |
1029 | ||
1030 | ratio = (msr >> 24) & 0xFF; | |
1031 | if (ratio) | |
1032 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n", | |
1033 | ratio, bclk, ratio * bclk); | |
1034 | ||
1035 | ratio = (msr >> 16) & 0xFF; | |
1036 | if (ratio) | |
1037 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n", | |
1038 | ratio, bclk, ratio * bclk); | |
1039 | ||
1040 | ratio = (msr >> 8) & 0xFF; | |
1041 | if (ratio) | |
1042 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n", | |
1043 | ratio, bclk, ratio * bclk); | |
1044 | ||
1045 | ratio = (msr >> 0) & 0xFF; | |
1046 | if (ratio) | |
1047 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n", | |
1048 | ratio, bclk, ratio * bclk); | |
1049 | ||
1050 | print_nhm_turbo_ratio_limits: | |
889facbe LB |
1051 | get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr); |
1052 | ||
1053 | #define SNB_C1_AUTO_UNDEMOTE (1UL << 27) | |
1054 | #define SNB_C3_AUTO_UNDEMOTE (1UL << 28) | |
1055 | ||
1056 | fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr); | |
1057 | ||
1058 | fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: ", | |
1059 | (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "", | |
1060 | (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "", | |
1061 | (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "", | |
1062 | (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "", | |
1063 | (msr & (1 << 15)) ? "" : "UN", | |
1064 | (unsigned int)msr & 7); | |
1065 | ||
1066 | ||
1067 | switch(msr & 0x7) { | |
1068 | case 0: | |
144b44b1 | 1069 | fprintf(stderr, do_slm_cstates ? "no pkg states" : "pc0"); |
889facbe LB |
1070 | break; |
1071 | case 1: | |
144b44b1 | 1072 | fprintf(stderr, do_slm_cstates ? "no pkg states" : do_snb_cstates ? "pc2" : "pc0"); |
889facbe LB |
1073 | break; |
1074 | case 2: | |
144b44b1 | 1075 | fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc6-noret" : "pc3"); |
889facbe LB |
1076 | break; |
1077 | case 3: | |
144b44b1 | 1078 | fprintf(stderr, do_slm_cstates ? "invalid" : "pc6"); |
889facbe LB |
1079 | break; |
1080 | case 4: | |
144b44b1 | 1081 | fprintf(stderr, do_slm_cstates ? "pc4" : "pc7"); |
889facbe LB |
1082 | break; |
1083 | case 5: | |
144b44b1 LB |
1084 | fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc7s" : "invalid"); |
1085 | break; | |
1086 | case 6: | |
1087 | fprintf(stderr, do_slm_cstates ? "pc6" : "invalid"); | |
889facbe LB |
1088 | break; |
1089 | case 7: | |
144b44b1 | 1090 | fprintf(stderr, do_slm_cstates ? "pc7" : "unlimited"); |
889facbe LB |
1091 | break; |
1092 | default: | |
1093 | fprintf(stderr, "invalid"); | |
1094 | } | |
1095 | fprintf(stderr, ")\n"); | |
103a8fea LB |
1096 | |
1097 | if (!do_nehalem_turbo_ratio_limit) | |
1098 | return; | |
1099 | ||
9c63a650 | 1100 | get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr); |
103a8fea | 1101 | |
67920418 | 1102 | fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n", msr); |
6574a5d5 LB |
1103 | |
1104 | ratio = (msr >> 56) & 0xFF; | |
1105 | if (ratio) | |
1106 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n", | |
1107 | ratio, bclk, ratio * bclk); | |
1108 | ||
1109 | ratio = (msr >> 48) & 0xFF; | |
1110 | if (ratio) | |
1111 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n", | |
1112 | ratio, bclk, ratio * bclk); | |
1113 | ||
1114 | ratio = (msr >> 40) & 0xFF; | |
1115 | if (ratio) | |
1116 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n", | |
1117 | ratio, bclk, ratio * bclk); | |
1118 | ||
1119 | ratio = (msr >> 32) & 0xFF; | |
1120 | if (ratio) | |
1121 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n", | |
1122 | ratio, bclk, ratio * bclk); | |
1123 | ||
103a8fea LB |
1124 | ratio = (msr >> 24) & 0xFF; |
1125 | if (ratio) | |
1126 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n", | |
1127 | ratio, bclk, ratio * bclk); | |
1128 | ||
1129 | ratio = (msr >> 16) & 0xFF; | |
1130 | if (ratio) | |
1131 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n", | |
1132 | ratio, bclk, ratio * bclk); | |
1133 | ||
1134 | ratio = (msr >> 8) & 0xFF; | |
1135 | if (ratio) | |
1136 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n", | |
1137 | ratio, bclk, ratio * bclk); | |
1138 | ||
1139 | ratio = (msr >> 0) & 0xFF; | |
1140 | if (ratio) | |
1141 | fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n", | |
1142 | ratio, bclk, ratio * bclk); | |
103a8fea LB |
1143 | } |
1144 | ||
c98d5d94 | 1145 | void free_all_buffers(void) |
103a8fea | 1146 | { |
c98d5d94 LB |
1147 | CPU_FREE(cpu_present_set); |
1148 | cpu_present_set = NULL; | |
1149 | cpu_present_set = 0; | |
103a8fea | 1150 | |
c98d5d94 LB |
1151 | CPU_FREE(cpu_affinity_set); |
1152 | cpu_affinity_set = NULL; | |
1153 | cpu_affinity_setsize = 0; | |
103a8fea | 1154 | |
c98d5d94 LB |
1155 | free(thread_even); |
1156 | free(core_even); | |
1157 | free(package_even); | |
103a8fea | 1158 | |
c98d5d94 LB |
1159 | thread_even = NULL; |
1160 | core_even = NULL; | |
1161 | package_even = NULL; | |
103a8fea | 1162 | |
c98d5d94 LB |
1163 | free(thread_odd); |
1164 | free(core_odd); | |
1165 | free(package_odd); | |
103a8fea | 1166 | |
c98d5d94 LB |
1167 | thread_odd = NULL; |
1168 | core_odd = NULL; | |
1169 | package_odd = NULL; | |
103a8fea | 1170 | |
c98d5d94 LB |
1171 | free(output_buffer); |
1172 | output_buffer = NULL; | |
1173 | outp = NULL; | |
103a8fea LB |
1174 | } |
1175 | ||
c98d5d94 LB |
1176 | /* |
1177 | * cpu_is_first_sibling_in_core(cpu) | |
1178 | * return 1 if given CPU is 1st HT sibling in the core | |
1179 | */ | |
1180 | int cpu_is_first_sibling_in_core(int cpu) | |
103a8fea | 1181 | { |
c98d5d94 LB |
1182 | char path[64]; |
1183 | FILE *filep; | |
1184 | int first_cpu; | |
103a8fea | 1185 | |
c98d5d94 LB |
1186 | sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu); |
1187 | filep = fopen(path, "r"); | |
1188 | if (filep == NULL) { | |
1189 | perror(path); | |
1190 | exit(1); | |
103a8fea | 1191 | } |
74823419 JT |
1192 | if (fscanf(filep, "%d", &first_cpu) != 1) { |
1193 | perror(path); | |
1194 | exit(1); | |
1195 | } | |
c98d5d94 LB |
1196 | fclose(filep); |
1197 | return (cpu == first_cpu); | |
103a8fea LB |
1198 | } |
1199 | ||
c98d5d94 LB |
1200 | /* |
1201 | * cpu_is_first_core_in_package(cpu) | |
1202 | * return 1 if given CPU is 1st core in package | |
1203 | */ | |
1204 | int cpu_is_first_core_in_package(int cpu) | |
103a8fea | 1205 | { |
c98d5d94 LB |
1206 | char path[64]; |
1207 | FILE *filep; | |
1208 | int first_cpu; | |
103a8fea | 1209 | |
c98d5d94 LB |
1210 | sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu); |
1211 | filep = fopen(path, "r"); | |
1212 | if (filep == NULL) { | |
1213 | perror(path); | |
103a8fea LB |
1214 | exit(1); |
1215 | } | |
74823419 JT |
1216 | if (fscanf(filep, "%d", &first_cpu) != 1) { |
1217 | perror(path); | |
1218 | exit(1); | |
1219 | } | |
c98d5d94 LB |
1220 | fclose(filep); |
1221 | return (cpu == first_cpu); | |
103a8fea LB |
1222 | } |
1223 | ||
1224 | int get_physical_package_id(int cpu) | |
1225 | { | |
c98d5d94 | 1226 | char path[80]; |
103a8fea LB |
1227 | FILE *filep; |
1228 | int pkg; | |
1229 | ||
1230 | sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu); | |
1231 | filep = fopen(path, "r"); | |
1232 | if (filep == NULL) { | |
1233 | perror(path); | |
1234 | exit(1); | |
1235 | } | |
74823419 JT |
1236 | if (fscanf(filep, "%d", &pkg) != 1) { |
1237 | perror(path); | |
1238 | exit(1); | |
1239 | } | |
103a8fea LB |
1240 | fclose(filep); |
1241 | return pkg; | |
1242 | } | |
1243 | ||
1244 | int get_core_id(int cpu) | |
1245 | { | |
c98d5d94 | 1246 | char path[80]; |
103a8fea LB |
1247 | FILE *filep; |
1248 | int core; | |
1249 | ||
1250 | sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/core_id", cpu); | |
1251 | filep = fopen(path, "r"); | |
1252 | if (filep == NULL) { | |
1253 | perror(path); | |
1254 | exit(1); | |
1255 | } | |
74823419 JT |
1256 | if (fscanf(filep, "%d", &core) != 1) { |
1257 | perror(path); | |
1258 | exit(1); | |
1259 | } | |
103a8fea LB |
1260 | fclose(filep); |
1261 | return core; | |
1262 | } | |
1263 | ||
c98d5d94 LB |
1264 | int get_num_ht_siblings(int cpu) |
1265 | { | |
1266 | char path[80]; | |
1267 | FILE *filep; | |
1268 | int sib1, sib2; | |
1269 | int matches; | |
1270 | char character; | |
1271 | ||
1272 | sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu); | |
1273 | filep = fopen(path, "r"); | |
1274 | if (filep == NULL) { | |
1275 | perror(path); | |
1276 | exit(1); | |
1277 | } | |
1278 | /* | |
1279 | * file format: | |
1280 | * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4) | |
1281 | * otherwinse 1 sibling (self). | |
1282 | */ | |
1283 | matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2); | |
1284 | ||
1285 | fclose(filep); | |
1286 | ||
1287 | if (matches == 3) | |
1288 | return 2; | |
1289 | else | |
1290 | return 1; | |
1291 | } | |
1292 | ||
103a8fea | 1293 | /* |
c98d5d94 LB |
1294 | * run func(thread, core, package) in topology order |
1295 | * skip non-present cpus | |
103a8fea LB |
1296 | */ |
1297 | ||
c98d5d94 LB |
1298 | int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *, |
1299 | struct pkg_data *, struct thread_data *, struct core_data *, | |
1300 | struct pkg_data *), struct thread_data *thread_base, | |
1301 | struct core_data *core_base, struct pkg_data *pkg_base, | |
1302 | struct thread_data *thread_base2, struct core_data *core_base2, | |
1303 | struct pkg_data *pkg_base2) | |
1304 | { | |
1305 | int retval, pkg_no, core_no, thread_no; | |
1306 | ||
1307 | for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) { | |
1308 | for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) { | |
1309 | for (thread_no = 0; thread_no < | |
1310 | topo.num_threads_per_core; ++thread_no) { | |
1311 | struct thread_data *t, *t2; | |
1312 | struct core_data *c, *c2; | |
1313 | struct pkg_data *p, *p2; | |
1314 | ||
1315 | t = GET_THREAD(thread_base, thread_no, core_no, pkg_no); | |
1316 | ||
1317 | if (cpu_is_not_present(t->cpu_id)) | |
1318 | continue; | |
1319 | ||
1320 | t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no); | |
1321 | ||
1322 | c = GET_CORE(core_base, core_no, pkg_no); | |
1323 | c2 = GET_CORE(core_base2, core_no, pkg_no); | |
1324 | ||
1325 | p = GET_PKG(pkg_base, pkg_no); | |
1326 | p2 = GET_PKG(pkg_base2, pkg_no); | |
1327 | ||
1328 | retval = func(t, c, p, t2, c2, p2); | |
1329 | if (retval) | |
1330 | return retval; | |
1331 | } | |
1332 | } | |
1333 | } | |
1334 | return 0; | |
1335 | } | |
1336 | ||
1337 | /* | |
1338 | * run func(cpu) on every cpu in /proc/stat | |
1339 | * return max_cpu number | |
1340 | */ | |
1341 | int for_all_proc_cpus(int (func)(int)) | |
103a8fea LB |
1342 | { |
1343 | FILE *fp; | |
c98d5d94 | 1344 | int cpu_num; |
103a8fea LB |
1345 | int retval; |
1346 | ||
1347 | fp = fopen(proc_stat, "r"); | |
1348 | if (fp == NULL) { | |
1349 | perror(proc_stat); | |
1350 | exit(1); | |
1351 | } | |
1352 | ||
1353 | retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n"); | |
1354 | if (retval != 0) { | |
1355 | perror("/proc/stat format"); | |
1356 | exit(1); | |
1357 | } | |
1358 | ||
c98d5d94 LB |
1359 | while (1) { |
1360 | retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num); | |
103a8fea LB |
1361 | if (retval != 1) |
1362 | break; | |
1363 | ||
c98d5d94 LB |
1364 | retval = func(cpu_num); |
1365 | if (retval) { | |
1366 | fclose(fp); | |
1367 | return(retval); | |
1368 | } | |
103a8fea LB |
1369 | } |
1370 | fclose(fp); | |
c98d5d94 | 1371 | return 0; |
103a8fea LB |
1372 | } |
1373 | ||
1374 | void re_initialize(void) | |
1375 | { | |
c98d5d94 LB |
1376 | free_all_buffers(); |
1377 | setup_all_buffers(); | |
1378 | printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus); | |
103a8fea LB |
1379 | } |
1380 | ||
c98d5d94 | 1381 | |
103a8fea | 1382 | /* |
c98d5d94 LB |
1383 | * count_cpus() |
1384 | * remember the last one seen, it will be the max | |
103a8fea | 1385 | */ |
c98d5d94 | 1386 | int count_cpus(int cpu) |
103a8fea | 1387 | { |
c98d5d94 LB |
1388 | if (topo.max_cpu_num < cpu) |
1389 | topo.max_cpu_num = cpu; | |
103a8fea | 1390 | |
c98d5d94 LB |
1391 | topo.num_cpus += 1; |
1392 | return 0; | |
1393 | } | |
1394 | int mark_cpu_present(int cpu) | |
1395 | { | |
1396 | CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set); | |
15aaa346 | 1397 | return 0; |
103a8fea LB |
1398 | } |
1399 | ||
1400 | void turbostat_loop() | |
1401 | { | |
c98d5d94 | 1402 | int retval; |
e52966c0 | 1403 | int restarted = 0; |
c98d5d94 | 1404 | |
103a8fea | 1405 | restart: |
e52966c0 LB |
1406 | restarted++; |
1407 | ||
c98d5d94 | 1408 | retval = for_all_cpus(get_counters, EVEN_COUNTERS); |
d91bb17c LB |
1409 | if (retval < -1) { |
1410 | exit(retval); | |
1411 | } else if (retval == -1) { | |
e52966c0 LB |
1412 | if (restarted > 1) { |
1413 | exit(retval); | |
1414 | } | |
c98d5d94 LB |
1415 | re_initialize(); |
1416 | goto restart; | |
1417 | } | |
e52966c0 | 1418 | restarted = 0; |
103a8fea LB |
1419 | gettimeofday(&tv_even, (struct timezone *)NULL); |
1420 | ||
1421 | while (1) { | |
c98d5d94 | 1422 | if (for_all_proc_cpus(cpu_is_not_present)) { |
103a8fea LB |
1423 | re_initialize(); |
1424 | goto restart; | |
1425 | } | |
1426 | sleep(interval_sec); | |
c98d5d94 | 1427 | retval = for_all_cpus(get_counters, ODD_COUNTERS); |
d91bb17c LB |
1428 | if (retval < -1) { |
1429 | exit(retval); | |
1430 | } else if (retval == -1) { | |
15aaa346 LB |
1431 | re_initialize(); |
1432 | goto restart; | |
1433 | } | |
103a8fea | 1434 | gettimeofday(&tv_odd, (struct timezone *)NULL); |
103a8fea | 1435 | timersub(&tv_odd, &tv_even, &tv_delta); |
c98d5d94 LB |
1436 | for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS); |
1437 | compute_average(EVEN_COUNTERS); | |
1438 | format_all_counters(EVEN_COUNTERS); | |
1439 | flush_stdout(); | |
15aaa346 | 1440 | sleep(interval_sec); |
c98d5d94 | 1441 | retval = for_all_cpus(get_counters, EVEN_COUNTERS); |
d91bb17c LB |
1442 | if (retval < -1) { |
1443 | exit(retval); | |
1444 | } else if (retval == -1) { | |
103a8fea LB |
1445 | re_initialize(); |
1446 | goto restart; | |
1447 | } | |
103a8fea | 1448 | gettimeofday(&tv_even, (struct timezone *)NULL); |
103a8fea | 1449 | timersub(&tv_even, &tv_odd, &tv_delta); |
c98d5d94 LB |
1450 | for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS); |
1451 | compute_average(ODD_COUNTERS); | |
1452 | format_all_counters(ODD_COUNTERS); | |
1453 | flush_stdout(); | |
103a8fea LB |
1454 | } |
1455 | } | |
1456 | ||
1457 | void check_dev_msr() | |
1458 | { | |
1459 | struct stat sb; | |
1460 | ||
1461 | if (stat("/dev/cpu/0/msr", &sb)) { | |
1462 | fprintf(stderr, "no /dev/cpu/0/msr\n"); | |
1463 | fprintf(stderr, "Try \"# modprobe msr\"\n"); | |
1464 | exit(-5); | |
1465 | } | |
1466 | } | |
1467 | ||
1468 | void check_super_user() | |
1469 | { | |
1470 | if (getuid() != 0) { | |
1471 | fprintf(stderr, "must be root\n"); | |
1472 | exit(-6); | |
1473 | } | |
1474 | } | |
1475 | ||
1476 | int has_nehalem_turbo_ratio_limit(unsigned int family, unsigned int model) | |
1477 | { | |
1478 | if (!genuine_intel) | |
1479 | return 0; | |
1480 | ||
1481 | if (family != 6) | |
1482 | return 0; | |
1483 | ||
1484 | switch (model) { | |
1485 | case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */ | |
1486 | case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */ | |
1487 | case 0x1F: /* Core i7 and i5 Processor - Nehalem */ | |
1488 | case 0x25: /* Westmere Client - Clarkdale, Arrandale */ | |
1489 | case 0x2C: /* Westmere EP - Gulftown */ | |
1490 | case 0x2A: /* SNB */ | |
1491 | case 0x2D: /* SNB Xeon */ | |
553575f1 | 1492 | case 0x3A: /* IVB */ |
1300651b | 1493 | case 0x3E: /* IVB Xeon */ |
70b43400 LB |
1494 | case 0x3C: /* HSW */ |
1495 | case 0x3F: /* HSW */ | |
1496 | case 0x45: /* HSW */ | |
149c2319 | 1497 | case 0x46: /* HSW */ |
144b44b1 LB |
1498 | case 0x37: /* BYT */ |
1499 | case 0x4D: /* AVN */ | |
103a8fea LB |
1500 | return 1; |
1501 | case 0x2E: /* Nehalem-EX Xeon - Beckton */ | |
1502 | case 0x2F: /* Westmere-EX Xeon - Eagleton */ | |
1503 | default: | |
1504 | return 0; | |
1505 | } | |
1506 | } | |
6574a5d5 LB |
1507 | int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model) |
1508 | { | |
1509 | if (!genuine_intel) | |
1510 | return 0; | |
1511 | ||
1512 | if (family != 6) | |
1513 | return 0; | |
1514 | ||
1515 | switch (model) { | |
1516 | case 0x3E: /* IVB Xeon */ | |
1517 | return 1; | |
1518 | default: | |
1519 | return 0; | |
1520 | } | |
1521 | } | |
1522 | ||
889facbe LB |
1523 | /* |
1524 | * print_epb() | |
1525 | * Decode the ENERGY_PERF_BIAS MSR | |
1526 | */ | |
1527 | int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
1528 | { | |
1529 | unsigned long long msr; | |
1530 | char *epb_string; | |
1531 | int cpu; | |
1532 | ||
1533 | if (!has_epb) | |
1534 | return 0; | |
1535 | ||
1536 | cpu = t->cpu_id; | |
1537 | ||
1538 | /* EPB is per-package */ | |
1539 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
1540 | return 0; | |
1541 | ||
1542 | if (cpu_migrate(cpu)) { | |
1543 | fprintf(stderr, "Could not migrate to CPU %d\n", cpu); | |
1544 | return -1; | |
1545 | } | |
1546 | ||
1547 | if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr)) | |
1548 | return 0; | |
1549 | ||
1550 | switch (msr & 0x7) { | |
1551 | case ENERGY_PERF_BIAS_PERFORMANCE: | |
1552 | epb_string = "performance"; | |
1553 | break; | |
1554 | case ENERGY_PERF_BIAS_NORMAL: | |
1555 | epb_string = "balanced"; | |
1556 | break; | |
1557 | case ENERGY_PERF_BIAS_POWERSAVE: | |
1558 | epb_string = "powersave"; | |
1559 | break; | |
1560 | default: | |
1561 | epb_string = "custom"; | |
1562 | break; | |
1563 | } | |
1564 | fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string); | |
1565 | ||
1566 | return 0; | |
1567 | } | |
1568 | ||
1569 | #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */ | |
1570 | #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */ | |
1571 | ||
144b44b1 LB |
1572 | double get_tdp(model) |
1573 | { | |
1574 | unsigned long long msr; | |
1575 | ||
1576 | if (do_rapl & RAPL_PKG_POWER_INFO) | |
1577 | if (!get_msr(0, MSR_PKG_POWER_INFO, &msr)) | |
1578 | return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units; | |
1579 | ||
1580 | switch (model) { | |
1581 | case 0x37: | |
1582 | case 0x4D: | |
1583 | return 30.0; | |
1584 | default: | |
1585 | return 135.0; | |
1586 | } | |
1587 | } | |
1588 | ||
1589 | ||
889facbe LB |
1590 | /* |
1591 | * rapl_probe() | |
1592 | * | |
144b44b1 | 1593 | * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units |
889facbe LB |
1594 | */ |
1595 | void rapl_probe(unsigned int family, unsigned int model) | |
1596 | { | |
1597 | unsigned long long msr; | |
144b44b1 | 1598 | unsigned int time_unit; |
889facbe LB |
1599 | double tdp; |
1600 | ||
1601 | if (!genuine_intel) | |
1602 | return; | |
1603 | ||
1604 | if (family != 6) | |
1605 | return; | |
1606 | ||
1607 | switch (model) { | |
1608 | case 0x2A: | |
1609 | case 0x3A: | |
70b43400 LB |
1610 | case 0x3C: /* HSW */ |
1611 | case 0x3F: /* HSW */ | |
1612 | case 0x45: /* HSW */ | |
149c2319 | 1613 | case 0x46: /* HSW */ |
144b44b1 | 1614 | do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO; |
889facbe LB |
1615 | break; |
1616 | case 0x2D: | |
1617 | case 0x3E: | |
144b44b1 LB |
1618 | do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO; |
1619 | break; | |
1620 | case 0x37: /* BYT */ | |
1621 | case 0x4D: /* AVN */ | |
1622 | do_rapl = RAPL_PKG | RAPL_CORES ; | |
889facbe LB |
1623 | break; |
1624 | default: | |
1625 | return; | |
1626 | } | |
1627 | ||
1628 | /* units on package 0, verify later other packages match */ | |
1629 | if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr)) | |
1630 | return; | |
1631 | ||
1632 | rapl_power_units = 1.0 / (1 << (msr & 0xF)); | |
144b44b1 LB |
1633 | if (model == 0x37) |
1634 | rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000; | |
1635 | else | |
1636 | rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F)); | |
889facbe | 1637 | |
144b44b1 LB |
1638 | time_unit = msr >> 16 & 0xF; |
1639 | if (time_unit == 0) | |
1640 | time_unit = 0xA; | |
889facbe | 1641 | |
144b44b1 | 1642 | rapl_time_units = 1.0 / (1 << (time_unit)); |
889facbe | 1643 | |
144b44b1 | 1644 | tdp = get_tdp(model); |
889facbe | 1645 | |
144b44b1 | 1646 | rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp; |
889facbe | 1647 | if (verbose) |
144b44b1 | 1648 | fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp); |
889facbe LB |
1649 | |
1650 | return; | |
1651 | } | |
1652 | ||
1653 | int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
1654 | { | |
1655 | unsigned long long msr; | |
1656 | unsigned int dts; | |
1657 | int cpu; | |
1658 | ||
1659 | if (!(do_dts || do_ptm)) | |
1660 | return 0; | |
1661 | ||
1662 | cpu = t->cpu_id; | |
1663 | ||
1664 | /* DTS is per-core, no need to print for each thread */ | |
1665 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE)) | |
1666 | return 0; | |
1667 | ||
1668 | if (cpu_migrate(cpu)) { | |
1669 | fprintf(stderr, "Could not migrate to CPU %d\n", cpu); | |
1670 | return -1; | |
1671 | } | |
1672 | ||
1673 | if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) { | |
1674 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr)) | |
1675 | return 0; | |
1676 | ||
1677 | dts = (msr >> 16) & 0x7F; | |
1678 | fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", | |
1679 | cpu, msr, tcc_activation_temp - dts); | |
1680 | ||
1681 | #ifdef THERM_DEBUG | |
1682 | if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr)) | |
1683 | return 0; | |
1684 | ||
1685 | dts = (msr >> 16) & 0x7F; | |
1686 | dts2 = (msr >> 8) & 0x7F; | |
1687 | fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", | |
1688 | cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); | |
1689 | #endif | |
1690 | } | |
1691 | ||
1692 | ||
1693 | if (do_dts) { | |
1694 | unsigned int resolution; | |
1695 | ||
1696 | if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr)) | |
1697 | return 0; | |
1698 | ||
1699 | dts = (msr >> 16) & 0x7F; | |
1700 | resolution = (msr >> 27) & 0xF; | |
1701 | fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n", | |
1702 | cpu, msr, tcc_activation_temp - dts, resolution); | |
1703 | ||
1704 | #ifdef THERM_DEBUG | |
1705 | if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr)) | |
1706 | return 0; | |
1707 | ||
1708 | dts = (msr >> 16) & 0x7F; | |
1709 | dts2 = (msr >> 8) & 0x7F; | |
1710 | fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", | |
1711 | cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2); | |
1712 | #endif | |
1713 | } | |
1714 | ||
1715 | return 0; | |
1716 | } | |
1717 | ||
1718 | void print_power_limit_msr(int cpu, unsigned long long msr, char *label) | |
1719 | { | |
1720 | fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n", | |
1721 | cpu, label, | |
1722 | ((msr >> 15) & 1) ? "EN" : "DIS", | |
1723 | ((msr >> 0) & 0x7FFF) * rapl_power_units, | |
1724 | (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units, | |
1725 | (((msr >> 16) & 1) ? "EN" : "DIS")); | |
1726 | ||
1727 | return; | |
1728 | } | |
1729 | ||
1730 | int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
1731 | { | |
1732 | unsigned long long msr; | |
1733 | int cpu; | |
889facbe LB |
1734 | |
1735 | if (!do_rapl) | |
1736 | return 0; | |
1737 | ||
1738 | /* RAPL counters are per package, so print only for 1st thread/package */ | |
1739 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
1740 | return 0; | |
1741 | ||
1742 | cpu = t->cpu_id; | |
1743 | if (cpu_migrate(cpu)) { | |
1744 | fprintf(stderr, "Could not migrate to CPU %d\n", cpu); | |
1745 | return -1; | |
1746 | } | |
1747 | ||
1748 | if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr)) | |
1749 | return -1; | |
1750 | ||
889facbe LB |
1751 | if (verbose) { |
1752 | fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx " | |
1753 | "(%f Watts, %f Joules, %f sec.)\n", cpu, msr, | |
144b44b1 | 1754 | rapl_power_units, rapl_energy_units, rapl_time_units); |
889facbe | 1755 | } |
144b44b1 LB |
1756 | if (do_rapl & RAPL_PKG_POWER_INFO) { |
1757 | ||
889facbe LB |
1758 | if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr)) |
1759 | return -5; | |
1760 | ||
1761 | ||
1762 | fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n", | |
1763 | cpu, msr, | |
1764 | ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1765 | ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1766 | ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1767 | ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); | |
1768 | ||
144b44b1 LB |
1769 | } |
1770 | if (do_rapl & RAPL_PKG) { | |
1771 | ||
889facbe LB |
1772 | if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr)) |
1773 | return -9; | |
1774 | ||
1775 | fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
1776 | cpu, msr, (msr >> 63) & 1 ? "": "UN"); | |
1777 | ||
1778 | print_power_limit_msr(cpu, msr, "PKG Limit #1"); | |
1779 | fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n", | |
1780 | cpu, | |
1781 | ((msr >> 47) & 1) ? "EN" : "DIS", | |
1782 | ((msr >> 32) & 0x7FFF) * rapl_power_units, | |
1783 | (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, | |
1784 | ((msr >> 48) & 1) ? "EN" : "DIS"); | |
1785 | } | |
1786 | ||
1787 | if (do_rapl & RAPL_DRAM) { | |
1788 | if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr)) | |
1789 | return -6; | |
1790 | ||
1791 | ||
1792 | fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n", | |
1793 | cpu, msr, | |
1794 | ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1795 | ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1796 | ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, | |
1797 | ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units); | |
1798 | ||
1799 | ||
1800 | if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr)) | |
1801 | return -9; | |
1802 | fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
1803 | cpu, msr, (msr >> 31) & 1 ? "": "UN"); | |
1804 | ||
1805 | print_power_limit_msr(cpu, msr, "DRAM Limit"); | |
1806 | } | |
144b44b1 | 1807 | if (do_rapl & RAPL_CORE_POLICY) { |
889facbe LB |
1808 | if (verbose) { |
1809 | if (get_msr(cpu, MSR_PP0_POLICY, &msr)) | |
1810 | return -7; | |
1811 | ||
1812 | fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF); | |
144b44b1 LB |
1813 | } |
1814 | } | |
1815 | if (do_rapl & RAPL_CORES) { | |
1816 | if (verbose) { | |
889facbe LB |
1817 | |
1818 | if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr)) | |
1819 | return -9; | |
1820 | fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
1821 | cpu, msr, (msr >> 31) & 1 ? "": "UN"); | |
1822 | print_power_limit_msr(cpu, msr, "Cores Limit"); | |
1823 | } | |
1824 | } | |
1825 | if (do_rapl & RAPL_GFX) { | |
1826 | if (verbose) { | |
1827 | if (get_msr(cpu, MSR_PP1_POLICY, &msr)) | |
1828 | return -8; | |
1829 | ||
1830 | fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF); | |
1831 | ||
1832 | if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr)) | |
1833 | return -9; | |
1834 | fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", | |
1835 | cpu, msr, (msr >> 31) & 1 ? "": "UN"); | |
1836 | print_power_limit_msr(cpu, msr, "GFX Limit"); | |
1837 | } | |
1838 | } | |
1839 | return 0; | |
1840 | } | |
1841 | ||
103a8fea LB |
1842 | |
1843 | int is_snb(unsigned int family, unsigned int model) | |
1844 | { | |
1845 | if (!genuine_intel) | |
1846 | return 0; | |
1847 | ||
1848 | switch (model) { | |
1849 | case 0x2A: | |
1850 | case 0x2D: | |
650a37f3 | 1851 | case 0x3A: /* IVB */ |
1300651b | 1852 | case 0x3E: /* IVB Xeon */ |
70b43400 LB |
1853 | case 0x3C: /* HSW */ |
1854 | case 0x3F: /* HSW */ | |
1855 | case 0x45: /* HSW */ | |
149c2319 | 1856 | case 0x46: /* HSW */ |
103a8fea LB |
1857 | return 1; |
1858 | } | |
1859 | return 0; | |
1860 | } | |
1861 | ||
ca58710f KCA |
1862 | int has_c8_c9_c10(unsigned int family, unsigned int model) |
1863 | { | |
1864 | if (!genuine_intel) | |
1865 | return 0; | |
1866 | ||
1867 | switch (model) { | |
1868 | case 0x45: | |
1869 | return 1; | |
1870 | } | |
1871 | return 0; | |
1872 | } | |
1873 | ||
1874 | ||
144b44b1 LB |
1875 | int is_slm(unsigned int family, unsigned int model) |
1876 | { | |
1877 | if (!genuine_intel) | |
1878 | return 0; | |
1879 | switch (model) { | |
1880 | case 0x37: /* BYT */ | |
1881 | case 0x4D: /* AVN */ | |
1882 | return 1; | |
1883 | } | |
1884 | return 0; | |
1885 | } | |
1886 | ||
1887 | #define SLM_BCLK_FREQS 5 | |
1888 | double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0}; | |
1889 | ||
1890 | double slm_bclk(void) | |
1891 | { | |
1892 | unsigned long long msr = 3; | |
1893 | unsigned int i; | |
1894 | double freq; | |
1895 | ||
1896 | if (get_msr(0, MSR_FSB_FREQ, &msr)) | |
1897 | fprintf(stderr, "SLM BCLK: unknown\n"); | |
1898 | ||
1899 | i = msr & 0xf; | |
1900 | if (i >= SLM_BCLK_FREQS) { | |
1901 | fprintf(stderr, "SLM BCLK[%d] invalid\n", i); | |
1902 | msr = 3; | |
1903 | } | |
1904 | freq = slm_freq_table[i]; | |
1905 | ||
1906 | fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq); | |
1907 | ||
1908 | return freq; | |
1909 | } | |
1910 | ||
103a8fea LB |
1911 | double discover_bclk(unsigned int family, unsigned int model) |
1912 | { | |
1913 | if (is_snb(family, model)) | |
1914 | return 100.00; | |
144b44b1 LB |
1915 | else if (is_slm(family, model)) |
1916 | return slm_bclk(); | |
103a8fea LB |
1917 | else |
1918 | return 133.33; | |
1919 | } | |
1920 | ||
889facbe LB |
1921 | /* |
1922 | * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where | |
1923 | * the Thermal Control Circuit (TCC) activates. | |
1924 | * This is usually equal to tjMax. | |
1925 | * | |
1926 | * Older processors do not have this MSR, so there we guess, | |
1927 | * but also allow cmdline over-ride with -T. | |
1928 | * | |
1929 | * Several MSR temperature values are in units of degrees-C | |
1930 | * below this value, including the Digital Thermal Sensor (DTS), | |
1931 | * Package Thermal Management Sensor (PTM), and thermal event thresholds. | |
1932 | */ | |
1933 | int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p) | |
1934 | { | |
1935 | unsigned long long msr; | |
1936 | unsigned int target_c_local; | |
1937 | int cpu; | |
1938 | ||
1939 | /* tcc_activation_temp is used only for dts or ptm */ | |
1940 | if (!(do_dts || do_ptm)) | |
1941 | return 0; | |
1942 | ||
1943 | /* this is a per-package concept */ | |
1944 | if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) | |
1945 | return 0; | |
1946 | ||
1947 | cpu = t->cpu_id; | |
1948 | if (cpu_migrate(cpu)) { | |
1949 | fprintf(stderr, "Could not migrate to CPU %d\n", cpu); | |
1950 | return -1; | |
1951 | } | |
1952 | ||
1953 | if (tcc_activation_temp_override != 0) { | |
1954 | tcc_activation_temp = tcc_activation_temp_override; | |
1955 | fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n", | |
1956 | cpu, tcc_activation_temp); | |
1957 | return 0; | |
1958 | } | |
1959 | ||
1960 | /* Temperature Target MSR is Nehalem and newer only */ | |
1961 | if (!do_nehalem_platform_info) | |
1962 | goto guess; | |
1963 | ||
1964 | if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr)) | |
1965 | goto guess; | |
1966 | ||
1967 | target_c_local = (msr >> 16) & 0x7F; | |
1968 | ||
1969 | if (verbose) | |
1970 | fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n", | |
1971 | cpu, msr, target_c_local); | |
1972 | ||
144b44b1 | 1973 | if (target_c_local < 85 || target_c_local > 127) |
889facbe LB |
1974 | goto guess; |
1975 | ||
1976 | tcc_activation_temp = target_c_local; | |
1977 | ||
1978 | return 0; | |
1979 | ||
1980 | guess: | |
1981 | tcc_activation_temp = TJMAX_DEFAULT; | |
1982 | fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n", | |
1983 | cpu, tcc_activation_temp); | |
1984 | ||
1985 | return 0; | |
1986 | } | |
103a8fea LB |
1987 | void check_cpuid() |
1988 | { | |
1989 | unsigned int eax, ebx, ecx, edx, max_level; | |
1990 | unsigned int fms, family, model, stepping; | |
1991 | ||
1992 | eax = ebx = ecx = edx = 0; | |
1993 | ||
2b92865e | 1994 | __get_cpuid(0, &max_level, &ebx, &ecx, &edx); |
103a8fea LB |
1995 | |
1996 | if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e) | |
1997 | genuine_intel = 1; | |
1998 | ||
1999 | if (verbose) | |
889facbe | 2000 | fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ", |
103a8fea LB |
2001 | (char *)&ebx, (char *)&edx, (char *)&ecx); |
2002 | ||
2b92865e | 2003 | __get_cpuid(1, &fms, &ebx, &ecx, &edx); |
103a8fea LB |
2004 | family = (fms >> 8) & 0xf; |
2005 | model = (fms >> 4) & 0xf; | |
2006 | stepping = fms & 0xf; | |
2007 | if (family == 6 || family == 0xf) | |
2008 | model += ((fms >> 16) & 0xf) << 4; | |
2009 | ||
2010 | if (verbose) | |
2011 | fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n", | |
2012 | max_level, family, model, stepping, family, model, stepping); | |
2013 | ||
2014 | if (!(edx & (1 << 5))) { | |
2015 | fprintf(stderr, "CPUID: no MSR\n"); | |
2016 | exit(1); | |
2017 | } | |
2018 | ||
2019 | /* | |
2020 | * check max extended function levels of CPUID. | |
2021 | * This is needed to check for invariant TSC. | |
2022 | * This check is valid for both Intel and AMD. | |
2023 | */ | |
2024 | ebx = ecx = edx = 0; | |
2b92865e | 2025 | __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx); |
103a8fea LB |
2026 | |
2027 | if (max_level < 0x80000007) { | |
2028 | fprintf(stderr, "CPUID: no invariant TSC (max_level 0x%x)\n", max_level); | |
2029 | exit(1); | |
2030 | } | |
2031 | ||
2032 | /* | |
2033 | * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8 | |
2034 | * this check is valid for both Intel and AMD | |
2035 | */ | |
2b92865e | 2036 | __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx); |
8209e054 | 2037 | has_invariant_tsc = edx & (1 << 8); |
103a8fea LB |
2038 | |
2039 | if (!has_invariant_tsc) { | |
2040 | fprintf(stderr, "No invariant TSC\n"); | |
2041 | exit(1); | |
2042 | } | |
2043 | ||
2044 | /* | |
2045 | * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0 | |
2046 | * this check is valid for both Intel and AMD | |
2047 | */ | |
2048 | ||
2b92865e | 2049 | __get_cpuid(0x6, &eax, &ebx, &ecx, &edx); |
8209e054 | 2050 | has_aperf = ecx & (1 << 0); |
889facbe LB |
2051 | do_dts = eax & (1 << 0); |
2052 | do_ptm = eax & (1 << 6); | |
2053 | has_epb = ecx & (1 << 3); | |
2054 | ||
2055 | if (verbose) | |
2056 | fprintf(stderr, "CPUID(6): %s%s%s%s\n", | |
2057 | has_aperf ? "APERF" : "No APERF!", | |
2058 | do_dts ? ", DTS" : "", | |
2059 | do_ptm ? ", PTM": "", | |
2060 | has_epb ? ", EPB": ""); | |
2061 | ||
2062 | if (!has_aperf) | |
2063 | exit(-1); | |
103a8fea LB |
2064 | |
2065 | do_nehalem_platform_info = genuine_intel && has_invariant_tsc; | |
2066 | do_nhm_cstates = genuine_intel; /* all Intel w/ non-stop TSC have NHM counters */ | |
1ed51011 | 2067 | do_smi = do_nhm_cstates; |
103a8fea | 2068 | do_snb_cstates = is_snb(family, model); |
ca58710f | 2069 | do_c8_c9_c10 = has_c8_c9_c10(family, model); |
144b44b1 | 2070 | do_slm_cstates = is_slm(family, model); |
103a8fea LB |
2071 | bclk = discover_bclk(family, model); |
2072 | ||
2073 | do_nehalem_turbo_ratio_limit = has_nehalem_turbo_ratio_limit(family, model); | |
6574a5d5 | 2074 | do_ivt_turbo_ratio_limit = has_ivt_turbo_ratio_limit(family, model); |
889facbe LB |
2075 | rapl_probe(family, model); |
2076 | ||
2077 | return; | |
103a8fea LB |
2078 | } |
2079 | ||
2080 | ||
2081 | void usage() | |
2082 | { | |
889facbe | 2083 | fprintf(stderr, "%s: [-v][-R][-T][-p|-P|-S][-c MSR# | -s]][-C MSR#][-m MSR#][-M MSR#][-i interval_sec | command ...]\n", |
103a8fea LB |
2084 | progname); |
2085 | exit(1); | |
2086 | } | |
2087 | ||
2088 | ||
2089 | /* | |
2090 | * in /dev/cpu/ return success for names that are numbers | |
2091 | * ie. filter out ".", "..", "microcode". | |
2092 | */ | |
2093 | int dir_filter(const struct dirent *dirp) | |
2094 | { | |
2095 | if (isdigit(dirp->d_name[0])) | |
2096 | return 1; | |
2097 | else | |
2098 | return 0; | |
2099 | } | |
2100 | ||
2101 | int open_dev_cpu_msr(int dummy1) | |
2102 | { | |
2103 | return 0; | |
2104 | } | |
2105 | ||
c98d5d94 LB |
2106 | void topology_probe() |
2107 | { | |
2108 | int i; | |
2109 | int max_core_id = 0; | |
2110 | int max_package_id = 0; | |
2111 | int max_siblings = 0; | |
2112 | struct cpu_topology { | |
2113 | int core_id; | |
2114 | int physical_package_id; | |
2115 | } *cpus; | |
2116 | ||
2117 | /* Initialize num_cpus, max_cpu_num */ | |
2118 | topo.num_cpus = 0; | |
2119 | topo.max_cpu_num = 0; | |
2120 | for_all_proc_cpus(count_cpus); | |
2121 | if (!summary_only && topo.num_cpus > 1) | |
2122 | show_cpu = 1; | |
2123 | ||
2124 | if (verbose > 1) | |
2125 | fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num); | |
2126 | ||
2127 | cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology)); | |
2128 | if (cpus == NULL) { | |
2129 | perror("calloc cpus"); | |
2130 | exit(1); | |
2131 | } | |
2132 | ||
2133 | /* | |
2134 | * Allocate and initialize cpu_present_set | |
2135 | */ | |
2136 | cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1)); | |
2137 | if (cpu_present_set == NULL) { | |
2138 | perror("CPU_ALLOC"); | |
2139 | exit(3); | |
2140 | } | |
2141 | cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1)); | |
2142 | CPU_ZERO_S(cpu_present_setsize, cpu_present_set); | |
2143 | for_all_proc_cpus(mark_cpu_present); | |
2144 | ||
2145 | /* | |
2146 | * Allocate and initialize cpu_affinity_set | |
2147 | */ | |
2148 | cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1)); | |
2149 | if (cpu_affinity_set == NULL) { | |
2150 | perror("CPU_ALLOC"); | |
2151 | exit(3); | |
2152 | } | |
2153 | cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1)); | |
2154 | CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set); | |
2155 | ||
2156 | ||
2157 | /* | |
2158 | * For online cpus | |
2159 | * find max_core_id, max_package_id | |
2160 | */ | |
2161 | for (i = 0; i <= topo.max_cpu_num; ++i) { | |
2162 | int siblings; | |
2163 | ||
2164 | if (cpu_is_not_present(i)) { | |
2165 | if (verbose > 1) | |
2166 | fprintf(stderr, "cpu%d NOT PRESENT\n", i); | |
2167 | continue; | |
2168 | } | |
2169 | cpus[i].core_id = get_core_id(i); | |
2170 | if (cpus[i].core_id > max_core_id) | |
2171 | max_core_id = cpus[i].core_id; | |
2172 | ||
2173 | cpus[i].physical_package_id = get_physical_package_id(i); | |
2174 | if (cpus[i].physical_package_id > max_package_id) | |
2175 | max_package_id = cpus[i].physical_package_id; | |
2176 | ||
2177 | siblings = get_num_ht_siblings(i); | |
2178 | if (siblings > max_siblings) | |
2179 | max_siblings = siblings; | |
2180 | if (verbose > 1) | |
2181 | fprintf(stderr, "cpu %d pkg %d core %d\n", | |
2182 | i, cpus[i].physical_package_id, cpus[i].core_id); | |
2183 | } | |
2184 | topo.num_cores_per_pkg = max_core_id + 1; | |
2185 | if (verbose > 1) | |
2186 | fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n", | |
2187 | max_core_id, topo.num_cores_per_pkg); | |
2188 | if (!summary_only && topo.num_cores_per_pkg > 1) | |
2189 | show_core = 1; | |
2190 | ||
2191 | topo.num_packages = max_package_id + 1; | |
2192 | if (verbose > 1) | |
2193 | fprintf(stderr, "max_package_id %d, sizing for %d packages\n", | |
2194 | max_package_id, topo.num_packages); | |
2195 | if (!summary_only && topo.num_packages > 1) | |
2196 | show_pkg = 1; | |
2197 | ||
2198 | topo.num_threads_per_core = max_siblings; | |
2199 | if (verbose > 1) | |
2200 | fprintf(stderr, "max_siblings %d\n", max_siblings); | |
2201 | ||
2202 | free(cpus); | |
2203 | } | |
2204 | ||
2205 | void | |
2206 | allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p) | |
2207 | { | |
2208 | int i; | |
2209 | ||
2210 | *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg * | |
2211 | topo.num_packages, sizeof(struct thread_data)); | |
2212 | if (*t == NULL) | |
2213 | goto error; | |
2214 | ||
2215 | for (i = 0; i < topo.num_threads_per_core * | |
2216 | topo.num_cores_per_pkg * topo.num_packages; i++) | |
2217 | (*t)[i].cpu_id = -1; | |
2218 | ||
2219 | *c = calloc(topo.num_cores_per_pkg * topo.num_packages, | |
2220 | sizeof(struct core_data)); | |
2221 | if (*c == NULL) | |
2222 | goto error; | |
2223 | ||
2224 | for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++) | |
2225 | (*c)[i].core_id = -1; | |
2226 | ||
2227 | *p = calloc(topo.num_packages, sizeof(struct pkg_data)); | |
2228 | if (*p == NULL) | |
2229 | goto error; | |
2230 | ||
2231 | for (i = 0; i < topo.num_packages; i++) | |
2232 | (*p)[i].package_id = i; | |
2233 | ||
2234 | return; | |
2235 | error: | |
2236 | perror("calloc counters"); | |
2237 | exit(1); | |
2238 | } | |
2239 | /* | |
2240 | * init_counter() | |
2241 | * | |
2242 | * set cpu_id, core_num, pkg_num | |
2243 | * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE | |
2244 | * | |
2245 | * increment topo.num_cores when 1st core in pkg seen | |
2246 | */ | |
2247 | void init_counter(struct thread_data *thread_base, struct core_data *core_base, | |
2248 | struct pkg_data *pkg_base, int thread_num, int core_num, | |
2249 | int pkg_num, int cpu_id) | |
2250 | { | |
2251 | struct thread_data *t; | |
2252 | struct core_data *c; | |
2253 | struct pkg_data *p; | |
2254 | ||
2255 | t = GET_THREAD(thread_base, thread_num, core_num, pkg_num); | |
2256 | c = GET_CORE(core_base, core_num, pkg_num); | |
2257 | p = GET_PKG(pkg_base, pkg_num); | |
2258 | ||
2259 | t->cpu_id = cpu_id; | |
2260 | if (thread_num == 0) { | |
2261 | t->flags |= CPU_IS_FIRST_THREAD_IN_CORE; | |
2262 | if (cpu_is_first_core_in_package(cpu_id)) | |
2263 | t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE; | |
2264 | } | |
2265 | ||
2266 | c->core_id = core_num; | |
2267 | p->package_id = pkg_num; | |
2268 | } | |
2269 | ||
2270 | ||
2271 | int initialize_counters(int cpu_id) | |
2272 | { | |
2273 | int my_thread_id, my_core_id, my_package_id; | |
2274 | ||
2275 | my_package_id = get_physical_package_id(cpu_id); | |
2276 | my_core_id = get_core_id(cpu_id); | |
2277 | ||
2278 | if (cpu_is_first_sibling_in_core(cpu_id)) { | |
2279 | my_thread_id = 0; | |
2280 | topo.num_cores++; | |
2281 | } else { | |
2282 | my_thread_id = 1; | |
2283 | } | |
2284 | ||
2285 | init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id); | |
2286 | init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id); | |
2287 | return 0; | |
2288 | } | |
2289 | ||
2290 | void allocate_output_buffer() | |
2291 | { | |
b844db31 | 2292 | output_buffer = calloc(1, (1 + topo.num_cpus) * 256); |
c98d5d94 LB |
2293 | outp = output_buffer; |
2294 | if (outp == NULL) { | |
2295 | perror("calloc"); | |
2296 | exit(-1); | |
2297 | } | |
2298 | } | |
2299 | ||
2300 | void setup_all_buffers(void) | |
2301 | { | |
2302 | topology_probe(); | |
2303 | allocate_counters(&thread_even, &core_even, &package_even); | |
2304 | allocate_counters(&thread_odd, &core_odd, &package_odd); | |
2305 | allocate_output_buffer(); | |
2306 | for_all_proc_cpus(initialize_counters); | |
2307 | } | |
103a8fea LB |
2308 | void turbostat_init() |
2309 | { | |
2310 | check_cpuid(); | |
2311 | ||
2312 | check_dev_msr(); | |
2313 | check_super_user(); | |
2314 | ||
c98d5d94 | 2315 | setup_all_buffers(); |
103a8fea LB |
2316 | |
2317 | if (verbose) | |
c98d5d94 | 2318 | print_verbose_header(); |
889facbe LB |
2319 | |
2320 | if (verbose) | |
2321 | for_all_cpus(print_epb, ODD_COUNTERS); | |
2322 | ||
2323 | if (verbose) | |
2324 | for_all_cpus(print_rapl, ODD_COUNTERS); | |
2325 | ||
2326 | for_all_cpus(set_temperature_target, ODD_COUNTERS); | |
2327 | ||
2328 | if (verbose) | |
2329 | for_all_cpus(print_thermal, ODD_COUNTERS); | |
103a8fea LB |
2330 | } |
2331 | ||
2332 | int fork_it(char **argv) | |
2333 | { | |
103a8fea | 2334 | pid_t child_pid; |
d91bb17c | 2335 | int status; |
d15cf7c1 | 2336 | |
d91bb17c LB |
2337 | status = for_all_cpus(get_counters, EVEN_COUNTERS); |
2338 | if (status) | |
2339 | exit(status); | |
c98d5d94 LB |
2340 | /* clear affinity side-effect of get_counters() */ |
2341 | sched_setaffinity(0, cpu_present_setsize, cpu_present_set); | |
103a8fea LB |
2342 | gettimeofday(&tv_even, (struct timezone *)NULL); |
2343 | ||
2344 | child_pid = fork(); | |
2345 | if (!child_pid) { | |
2346 | /* child */ | |
2347 | execvp(argv[0], argv); | |
2348 | } else { | |
103a8fea LB |
2349 | |
2350 | /* parent */ | |
2351 | if (child_pid == -1) { | |
2352 | perror("fork"); | |
2353 | exit(1); | |
2354 | } | |
2355 | ||
2356 | signal(SIGINT, SIG_IGN); | |
2357 | signal(SIGQUIT, SIG_IGN); | |
2358 | if (waitpid(child_pid, &status, 0) == -1) { | |
2359 | perror("wait"); | |
d91bb17c | 2360 | exit(status); |
103a8fea LB |
2361 | } |
2362 | } | |
c98d5d94 LB |
2363 | /* |
2364 | * n.b. fork_it() does not check for errors from for_all_cpus() | |
2365 | * because re-starting is problematic when forking | |
2366 | */ | |
2367 | for_all_cpus(get_counters, ODD_COUNTERS); | |
103a8fea | 2368 | gettimeofday(&tv_odd, (struct timezone *)NULL); |
103a8fea | 2369 | timersub(&tv_odd, &tv_even, &tv_delta); |
c98d5d94 LB |
2370 | for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS); |
2371 | compute_average(EVEN_COUNTERS); | |
2372 | format_all_counters(EVEN_COUNTERS); | |
2373 | flush_stderr(); | |
103a8fea | 2374 | |
6eab04a8 | 2375 | fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0); |
103a8fea | 2376 | |
d91bb17c | 2377 | return status; |
103a8fea LB |
2378 | } |
2379 | ||
2380 | void cmdline(int argc, char **argv) | |
2381 | { | |
2382 | int opt; | |
2383 | ||
2384 | progname = argv[0]; | |
2385 | ||
889facbe | 2386 | while ((opt = getopt(argc, argv, "+pPSvi:sc:sC:m:M:RT:")) != -1) { |
103a8fea | 2387 | switch (opt) { |
f9240813 | 2388 | case 'p': |
c98d5d94 LB |
2389 | show_core_only++; |
2390 | break; | |
f9240813 | 2391 | case 'P': |
c98d5d94 LB |
2392 | show_pkg_only++; |
2393 | break; | |
f9240813 | 2394 | case 'S': |
e23da037 LB |
2395 | summary_only++; |
2396 | break; | |
103a8fea LB |
2397 | case 'v': |
2398 | verbose++; | |
2399 | break; | |
2400 | case 'i': | |
2401 | interval_sec = atoi(optarg); | |
2402 | break; | |
f9240813 | 2403 | case 'c': |
8e180f3c LB |
2404 | sscanf(optarg, "%x", &extra_delta_offset32); |
2405 | break; | |
f9240813 | 2406 | case 'C': |
8e180f3c LB |
2407 | sscanf(optarg, "%x", &extra_delta_offset64); |
2408 | break; | |
2f32edf1 LB |
2409 | case 'm': |
2410 | sscanf(optarg, "%x", &extra_msr_offset32); | |
2f32edf1 | 2411 | break; |
103a8fea | 2412 | case 'M': |
2f32edf1 | 2413 | sscanf(optarg, "%x", &extra_msr_offset64); |
103a8fea | 2414 | break; |
889facbe LB |
2415 | case 'R': |
2416 | rapl_verbose++; | |
2417 | break; | |
2418 | case 'T': | |
2419 | tcc_activation_temp_override = atoi(optarg); | |
2420 | break; | |
103a8fea LB |
2421 | default: |
2422 | usage(); | |
2423 | } | |
2424 | } | |
2425 | } | |
2426 | ||
2427 | int main(int argc, char **argv) | |
2428 | { | |
2429 | cmdline(argc, argv); | |
2430 | ||
889facbe | 2431 | if (verbose) |
144b44b1 | 2432 | fprintf(stderr, "turbostat v3.5 April 26, 2013" |
103a8fea | 2433 | " - Len Brown <lenb@kernel.org>\n"); |
103a8fea LB |
2434 | |
2435 | turbostat_init(); | |
2436 | ||
2437 | /* | |
2438 | * if any params left, it must be a command to fork | |
2439 | */ | |
2440 | if (argc - optind) | |
2441 | return fork_it(argv + optind); | |
2442 | else | |
2443 | turbostat_loop(); | |
2444 | ||
2445 | return 0; | |
2446 | } |