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tools/power turbostat: relax dependency on invariant TSC
[mirror_ubuntu-artful-kernel.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
36#include <dirent.h>
37#include <string.h>
38#include <ctype.h>
88c3281f 39#include <sched.h>
2b92865e 40#include <cpuid.h>
98481e79
LB		 41#include <linux/capability.h>
42#include <errno.h>
103a8fea 43
103a8fea
LB		 44char *proc_stat = "/proc/stat";
45unsigned int interval_sec = 5; /* set with -i interval_sec */
46unsigned int verbose; /* set with -v */
889facbe 47unsigned int rapl_verbose; /* set with -R */
5c56be9a 48unsigned int rapl_joules; /* set with -J */
889facbe 49unsigned int thermal_verbose; /* set with -T */
f591c38b 50unsigned int summary_only; /* set with -S */
3b4d5c7f 51unsigned int dump_only; /* set with -s */
103a8fea
LB		 52unsigned int skip_c0;
53unsigned int skip_c1;
54unsigned int do_nhm_cstates;
55unsigned int do_snb_cstates;
ca58710f 56unsigned int do_c8_c9_c10;
144b44b1
LB		 57unsigned int do_slm_cstates;
58unsigned int use_c1_residency_msr;
103a8fea 59unsigned int has_aperf;
889facbe 60unsigned int has_epb;
fc04cc67 61unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 62unsigned int genuine_intel;
63unsigned int has_invariant_tsc;
d7899447
LB		 64unsigned int do_nhm_platform_info;
65unsigned int do_nhm_turbo_ratio_limit;
6574a5d5 66unsigned int do_ivt_turbo_ratio_limit;
2f32edf1
LB		 67unsigned int extra_msr_offset32;
68unsigned int extra_msr_offset64;
8e180f3c
LB		 69unsigned int extra_delta_offset32;
70unsigned int extra_delta_offset64;
1ed51011 71int do_smi;
103a8fea
LB		 72double bclk;
73unsigned int show_pkg;
74unsigned int show_core;
75unsigned int show_cpu;
c98d5d94
LB		 76unsigned int show_pkg_only;
77unsigned int show_core_only;
78char *output_buffer, *outp;
889facbe
LB		 79unsigned int do_rapl;
80unsigned int do_dts;
81unsigned int do_ptm;
82unsigned int tcc_activation_temp;
83unsigned int tcc_activation_temp_override;
84double rapl_power_units, rapl_energy_units, rapl_time_units;
85double rapl_joule_counter_range;
3a9a941d
LB		 86unsigned int do_core_perf_limit_reasons;
87unsigned int do_gfx_perf_limit_reasons;
88unsigned int do_ring_perf_limit_reasons;
889facbe 89
e6f9bb3c
LB		 90#define RAPL_PKG (1 << 0)
91 /* 0x610 MSR_PKG_POWER_LIMIT */
92 /* 0x611 MSR_PKG_ENERGY_STATUS */
93#define RAPL_PKG_PERF_STATUS (1 << 1)
94 /* 0x613 MSR_PKG_PERF_STATUS */
95#define RAPL_PKG_POWER_INFO (1 << 2)
96 /* 0x614 MSR_PKG_POWER_INFO */
97
98#define RAPL_DRAM (1 << 3)
99 /* 0x618 MSR_DRAM_POWER_LIMIT */
100 /* 0x619 MSR_DRAM_ENERGY_STATUS */
101 /* 0x61c MSR_DRAM_POWER_INFO */
102#define RAPL_DRAM_PERF_STATUS (1 << 4)
103 /* 0x61b MSR_DRAM_PERF_STATUS */
104
105#define RAPL_CORES (1 << 5)
106 /* 0x638 MSR_PP0_POWER_LIMIT */
107 /* 0x639 MSR_PP0_ENERGY_STATUS */
108#define RAPL_CORE_POLICY (1 << 6)
109 /* 0x63a MSR_PP0_POLICY */
110
111
112#define RAPL_GFX (1 << 7)
113 /* 0x640 MSR_PP1_POWER_LIMIT */
114 /* 0x641 MSR_PP1_ENERGY_STATUS */
115 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 116#define TJMAX_DEFAULT 100
117
118#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 119
120int aperf_mperf_unstable;
121int backwards_count;
122char *progname;
103a8fea 123
c98d5d94
LB		 124cpu_set_t *cpu_present_set, *cpu_affinity_set;
125size_t cpu_present_setsize, cpu_affinity_setsize;
126
127struct thread_data {
128 unsigned long long tsc;
129 unsigned long long aperf;
130 unsigned long long mperf;
144b44b1 131 unsigned long long c1;
2f32edf1 132 unsigned long long extra_msr64;
8e180f3c
LB		 133 unsigned long long extra_delta64;
134 unsigned long long extra_msr32;
135 unsigned long long extra_delta32;
1ed51011 136 unsigned int smi_count;
c98d5d94
LB		 137 unsigned int cpu_id;
138 unsigned int flags;
139#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
140#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
141} *thread_even, *thread_odd;
142
143struct core_data {
144 unsigned long long c3;
145 unsigned long long c6;
146 unsigned long long c7;
889facbe 147 unsigned int core_temp_c;
c98d5d94
LB		 148 unsigned int core_id;
149} *core_even, *core_odd;
150
151struct pkg_data {
152 unsigned long long pc2;
153 unsigned long long pc3;
154 unsigned long long pc6;
155 unsigned long long pc7;
ca58710f
KCA		 156 unsigned long long pc8;
157 unsigned long long pc9;
158 unsigned long long pc10;
c98d5d94 159 unsigned int package_id;
889facbe
LB		 160 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
161 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
162 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
163 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
164 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
165 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
166 unsigned int pkg_temp_c;
167
c98d5d94
LB		 168} *package_even, *package_odd;
169
170#define ODD_COUNTERS thread_odd, core_odd, package_odd
171#define EVEN_COUNTERS thread_even, core_even, package_even
172
173#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
174 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
175 topo.num_threads_per_core + \
176 (core_no) * topo.num_threads_per_core + (thread_no))
177#define GET_CORE(core_base, core_no, pkg_no) \
178 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
179#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
180
181struct system_summary {
182 struct thread_data threads;
183 struct core_data cores;
184 struct pkg_data packages;
185} sum, average;
186
187
188struct topo_params {
189 int num_packages;
190 int num_cpus;
191 int num_cores;
192 int max_cpu_num;
193 int num_cores_per_pkg;
194 int num_threads_per_core;
195} topo;
196
197struct timeval tv_even, tv_odd, tv_delta;
198
199void setup_all_buffers(void);
200
201int cpu_is_not_present(int cpu)
d15cf7c1 202{
c98d5d94 203 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 204}
88c3281f 205/*
c98d5d94
LB		 206 * run func(thread, core, package) in topology order
207 * skip non-present cpus
88c3281f 208 */
c98d5d94
LB		 209
210int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
211 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 212{
c98d5d94 213 int retval, pkg_no, core_no, thread_no;
d15cf7c1 214
c98d5d94
LB		 215 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
216 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
217 for (thread_no = 0; thread_no <
218 topo.num_threads_per_core; ++thread_no) {
219 struct thread_data *t;
220 struct core_data *c;
221 struct pkg_data *p;
88c3281f 222
c98d5d94
LB		 223 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
224
225 if (cpu_is_not_present(t->cpu_id))
226 continue;
227
228 c = GET_CORE(core_base, core_no, pkg_no);
229 p = GET_PKG(pkg_base, pkg_no);
230
231 retval = func(t, c, p);
232 if (retval)
233 return retval;
234 }
235 }
236 }
237 return 0;
88c3281f
LB		 238}
239
240int cpu_migrate(int cpu)
241{
c98d5d94
LB		 242 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
243 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
244 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 245 return -1;
246 else
247 return 0;
248}
249
15aaa346 250int get_msr(int cpu, off_t offset, unsigned long long *msr)
103a8fea
LB		 251{
252 ssize_t retval;
103a8fea
LB		 253 char pathname[32];
254 int fd;
255
256 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
257 fd = open(pathname, O_RDONLY);
15aaa346 258 if (fd < 0)
98481e79 259 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 260
15aaa346 261 retval = pread(fd, msr, sizeof *msr, offset);
103a8fea 262 close(fd);
15aaa346 263
98481e79
LB		 264 if (retval != sizeof *msr)
265 err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
15aaa346
LB		 266
267 return 0;
103a8fea
LB		 268}
269
fc04cc67
LB		 270/*
271 * Example Format w/ field column widths:
272 *
e7c95ff3
LB		 273 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
274 * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 275 */
276
a829eb4d 277void print_header(void)
103a8fea
LB		 278{
279 if (show_pkg)
e7c95ff3 280 outp += sprintf(outp, " Package");
103a8fea 281 if (show_core)
e7c95ff3 282 outp += sprintf(outp, " Core");
103a8fea 283 if (show_cpu)
e7c95ff3 284 outp += sprintf(outp, " CPU");
fc04cc67 285 if (has_aperf)
e7c95ff3 286 outp += sprintf(outp, " Avg_MHz");
d7899447 287 if (has_aperf)
e7c95ff3 288 outp += sprintf(outp, " %%Busy");
103a8fea 289 if (has_aperf)
e7c95ff3
LB		 290 outp += sprintf(outp, " Bzy_MHz");
291 outp += sprintf(outp, " TSC_MHz");
1ed51011 292 if (do_smi)
e7c95ff3 293 outp += sprintf(outp, " SMI");
8e180f3c 294 if (extra_delta_offset32)
e7c95ff3 295 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 296 if (extra_delta_offset64)
e7c95ff3 297 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 298 if (extra_msr_offset32)
e7c95ff3 299 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 300 if (extra_msr_offset64)
e7c95ff3 301 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
103a8fea 302 if (do_nhm_cstates)
e7c95ff3 303 outp += sprintf(outp, " CPU%%c1");
144b44b1 304 if (do_nhm_cstates && !do_slm_cstates)
e7c95ff3 305 outp += sprintf(outp, " CPU%%c3");
103a8fea 306 if (do_nhm_cstates)
e7c95ff3 307 outp += sprintf(outp, " CPU%%c6");
103a8fea 308 if (do_snb_cstates)
e7c95ff3 309 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 310
311 if (do_dts)
e7c95ff3 312 outp += sprintf(outp, " CoreTmp");
889facbe 313 if (do_ptm)
e7c95ff3 314 outp += sprintf(outp, " PkgTmp");
889facbe 315
103a8fea 316 if (do_snb_cstates)
e7c95ff3 317 outp += sprintf(outp, " Pkg%%pc2");
144b44b1 318 if (do_nhm_cstates && !do_slm_cstates)
e7c95ff3 319 outp += sprintf(outp, " Pkg%%pc3");
144b44b1 320 if (do_nhm_cstates && !do_slm_cstates)
e7c95ff3 321 outp += sprintf(outp, " Pkg%%pc6");
103a8fea 322 if (do_snb_cstates)
e7c95ff3 323 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 324 if (do_c8_c9_c10) {
e7c95ff3
LB		 325 outp += sprintf(outp, " Pkg%%pc8");
326 outp += sprintf(outp, " Pkg%%pc9");
327 outp += sprintf(outp, " Pk%%pc10");
ca58710f 328 }
103a8fea 329
5c56be9a
DB		 330 if (do_rapl && !rapl_joules) {
331 if (do_rapl & RAPL_PKG)
e7c95ff3 332 outp += sprintf(outp, " PkgWatt");
5c56be9a 333 if (do_rapl & RAPL_CORES)
e7c95ff3 334 outp += sprintf(outp, " CorWatt");
5c56be9a 335 if (do_rapl & RAPL_GFX)
e7c95ff3 336 outp += sprintf(outp, " GFXWatt");
5c56be9a 337 if (do_rapl & RAPL_DRAM)
e7c95ff3 338 outp += sprintf(outp, " RAMWatt");
5c56be9a 339 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 340 outp += sprintf(outp, " PKG_%%");
5c56be9a 341 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 342 outp += sprintf(outp, " RAM_%%");
d7899447 343 } else if (do_rapl && rapl_joules) {
5c56be9a 344 if (do_rapl & RAPL_PKG)
e7c95ff3 345 outp += sprintf(outp, " Pkg_J");
5c56be9a 346 if (do_rapl & RAPL_CORES)
e7c95ff3 347 outp += sprintf(outp, " Cor_J");
5c56be9a 348 if (do_rapl & RAPL_GFX)
e7c95ff3 349 outp += sprintf(outp, " GFX_J");
5c56be9a 350 if (do_rapl & RAPL_DRAM)
e7c95ff3 351 outp += sprintf(outp, " RAM_W");
5c56be9a 352 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 353 outp += sprintf(outp, " PKG_%%");
5c56be9a 354 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 355 outp += sprintf(outp, " RAM_%%");
356 outp += sprintf(outp, " time");
889facbe 357
5c56be9a 358 }
c98d5d94 359 outp += sprintf(outp, "\n");
103a8fea
LB		 360}
361
c98d5d94
LB		 362int dump_counters(struct thread_data *t, struct core_data *c,
363 struct pkg_data *p)
103a8fea 364{
3b4d5c7f 365 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 366
367 if (t) {
3b4d5c7f
AS		 368 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
369 t->cpu_id, t->flags);
370 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
371 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
372 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
373 outp += sprintf(outp, "c1: %016llX\n", t->c1);
374 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 375 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 376 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 377 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 378 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 379 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 380 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 381 extra_msr_offset64, t->extra_msr64);
1ed51011 382 if (do_smi)
3b4d5c7f 383 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 384 }
103a8fea 385
c98d5d94 386 if (c) {
3b4d5c7f
AS		 387 outp += sprintf(outp, "core: %d\n", c->core_id);
388 outp += sprintf(outp, "c3: %016llX\n", c->c3);
389 outp += sprintf(outp, "c6: %016llX\n", c->c6);
390 outp += sprintf(outp, "c7: %016llX\n", c->c7);
391 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 392 }
103a8fea 393
c98d5d94 394 if (p) {
3b4d5c7f
AS		 395 outp += sprintf(outp, "package: %d\n", p->package_id);
396 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
397 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
398 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
399 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
400 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
401 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
402 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
403 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
404 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
405 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
406 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
407 outp += sprintf(outp, "Throttle PKG: %0X\n",
408 p->rapl_pkg_perf_status);
409 outp += sprintf(outp, "Throttle RAM: %0X\n",
410 p->rapl_dram_perf_status);
411 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 412 }
3b4d5c7f
AS		 413
414 outp += sprintf(outp, "\n");
415
c98d5d94 416 return 0;
103a8fea
LB		 417}
418
e23da037
LB		 419/*
420 * column formatting convention & formats
e23da037 421 */
c98d5d94
LB		 422int format_counters(struct thread_data *t, struct core_data *c,
423 struct pkg_data *p)
103a8fea
LB		 424{
425 double interval_float;
fc04cc67 426 char *fmt8;
103a8fea 427
c98d5d94
LB		 428 /* if showing only 1st thread in core and this isn't one, bail out */
429 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
430 return 0;
431
432 /* if showing only 1st thread in pkg and this isn't one, bail out */
433 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
434 return 0;
435
103a8fea
LB		 436 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
437
c98d5d94
LB		 438 /* topo columns, print blanks on 1st (average) line */
439 if (t == &average.threads) {
103a8fea 440 if (show_pkg)
fc04cc67 441 outp += sprintf(outp, " -");
103a8fea 442 if (show_core)
fc04cc67 443 outp += sprintf(outp, " -");
103a8fea 444 if (show_cpu)
fc04cc67 445 outp += sprintf(outp, " -");
103a8fea 446 } else {
c98d5d94
LB		 447 if (show_pkg) {
448 if (p)
fc04cc67 449 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 450 else
fc04cc67 451 outp += sprintf(outp, " -");
c98d5d94 452 }
c98d5d94
LB		 453 if (show_core) {
454 if (c)
fc04cc67 455 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 456 else
fc04cc67 457 outp += sprintf(outp, " -");
c98d5d94 458 }
103a8fea 459 if (show_cpu)
fc04cc67 460 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 461 }
fc04cc67 462
d7899447 463 /* Avg_MHz */
fc04cc67
LB		 464 if (has_aperf)
465 outp += sprintf(outp, "%8.0f",
466 1.0 / units * t->aperf / interval_float);
467
d7899447
LB		 468 /* %Busy */
469 if (has_aperf) {
103a8fea 470 if (!skip_c0)
fc04cc67 471 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc);
103a8fea 472 else
fc04cc67 473 outp += sprintf(outp, "********");
103a8fea
LB		 474 }
475
d7899447 476 /* Bzy_MHz */
fc04cc67
LB		 477 if (has_aperf)
478 outp += sprintf(outp, "%8.0f",
479 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
103a8fea 480
d7899447 481 /* TSC_MHz */
fc04cc67 482 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 483
1ed51011
LB		 484 /* SMI */
485 if (do_smi)
fc04cc67 486 outp += sprintf(outp, "%8d", t->smi_count);
1ed51011 487
8e180f3c
LB		 488 /* delta */
489 if (extra_delta_offset32)
490 outp += sprintf(outp, " %11llu", t->extra_delta32);
491
492 /* DELTA */
493 if (extra_delta_offset64)
494 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 495 /* msr */
496 if (extra_msr_offset32)
8e180f3c 497 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 498
130ff304 499 /* MSR */
2f32edf1
LB		 500 if (extra_msr_offset64)
501 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 502
103a8fea
LB		 503 if (do_nhm_cstates) {
504 if (!skip_c1)
fc04cc67 505 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 506 else
fc04cc67 507 outp += sprintf(outp, "********");
103a8fea 508 }
c98d5d94
LB		 509
510 /* print per-core data only for 1st thread in core */
511 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
512 goto done;
513
144b44b1 514 if (do_nhm_cstates && !do_slm_cstates)
fc04cc67 515 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 516 if (do_nhm_cstates)
fc04cc67 517 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 518 if (do_snb_cstates)
fc04cc67 519 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 520
889facbe 521 if (do_dts)
fc04cc67 522 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 523
c98d5d94
LB		 524 /* print per-package data only for 1st core in package */
525 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
526 goto done;
527
889facbe 528 if (do_ptm)
fc04cc67 529 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 530
103a8fea 531 if (do_snb_cstates)
fc04cc67 532 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
144b44b1 533 if (do_nhm_cstates && !do_slm_cstates)
fc04cc67 534 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
144b44b1 535 if (do_nhm_cstates && !do_slm_cstates)
fc04cc67 536 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
103a8fea 537 if (do_snb_cstates)
fc04cc67 538 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 539 if (do_c8_c9_c10) {
fc04cc67
LB		 540 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
541 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
542 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 543 }
889facbe
LB		 544
545 /*
546 * If measurement interval exceeds minimum RAPL Joule Counter range,
547 * indicate that results are suspect by printing "**" in fraction place.
548 */
fc04cc67
LB		 549 if (interval_float < rapl_joule_counter_range)
550 fmt8 = "%8.2f";
551 else
552 fmt8 = " %6.0f**";
889facbe 553
5c56be9a
DB		 554 if (do_rapl && !rapl_joules) {
555 if (do_rapl & RAPL_PKG)
fc04cc67 556 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 557 if (do_rapl & RAPL_CORES)
fc04cc67 558 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 559 if (do_rapl & RAPL_GFX)
fc04cc67 560 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 561 if (do_rapl & RAPL_DRAM)
fc04cc67 562 outp += sprintf(outp, fmt8, p->energy_dram * rapl_energy_units / interval_float);
5c56be9a 563 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 564 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 565 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 566 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 567 } else if (do_rapl && rapl_joules) {
5c56be9a 568 if (do_rapl & RAPL_PKG)
fc04cc67 569 outp += sprintf(outp, fmt8,
5c56be9a
DB		 570 p->energy_pkg * rapl_energy_units);
571 if (do_rapl & RAPL_CORES)
fc04cc67 572 outp += sprintf(outp, fmt8,
5c56be9a
DB		 573 p->energy_cores * rapl_energy_units);
574 if (do_rapl & RAPL_GFX)
fc04cc67 575 outp += sprintf(outp, fmt8,
5c56be9a
DB		 576 p->energy_gfx * rapl_energy_units);
577 if (do_rapl & RAPL_DRAM)
fc04cc67 578 outp += sprintf(outp, fmt8,
5c56be9a
DB		 579 p->energy_dram * rapl_energy_units);
580 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 581 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 582 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 583 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 584
d7899447 585 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 586 }
c98d5d94 587done:
c98d5d94
LB		 588 outp += sprintf(outp, "\n");
589
590 return 0;
103a8fea
LB		 591}
592
c98d5d94
LB		 593void flush_stdout()
594{
595 fputs(output_buffer, stdout);
ddac0d68 596 fflush(stdout);
c98d5d94
LB		 597 outp = output_buffer;
598}
599void flush_stderr()
600{
601 fputs(output_buffer, stderr);
602 outp = output_buffer;
603}
604void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 605{
e23da037 606 static int printed;
103a8fea 607
e23da037
LB		 608 if (!printed || !summary_only)
609 print_header();
103a8fea 610
c98d5d94
LB		 611 if (topo.num_cpus > 1)
612 format_counters(&average.threads, &average.cores,
613 &average.packages);
103a8fea 614
e23da037
LB		 615 printed = 1;
616
617 if (summary_only)
618 return;
619
c98d5d94 620 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 621}
622
889facbe
LB		 623#define DELTA_WRAP32(new, old) \
624 if (new > old) { \
625 old = new - old; \
626 } else { \
627 old = 0x100000000 + new - old; \
628 }
629
c98d5d94
LB		 630void
631delta_package(struct pkg_data *new, struct pkg_data *old)
632{
633 old->pc2 = new->pc2 - old->pc2;
634 old->pc3 = new->pc3 - old->pc3;
635 old->pc6 = new->pc6 - old->pc6;
636 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 637 old->pc8 = new->pc8 - old->pc8;
638 old->pc9 = new->pc9 - old->pc9;
639 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 640 old->pkg_temp_c = new->pkg_temp_c;
641
642 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
643 DELTA_WRAP32(new->energy_cores, old->energy_cores);
644 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
645 DELTA_WRAP32(new->energy_dram, old->energy_dram);
646 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
647 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 648}
103a8fea 649
c98d5d94
LB		 650void
651delta_core(struct core_data *new, struct core_data *old)
103a8fea 652{
c98d5d94
LB		 653 old->c3 = new->c3 - old->c3;
654 old->c6 = new->c6 - old->c6;
655 old->c7 = new->c7 - old->c7;
889facbe 656 old->core_temp_c = new->core_temp_c;
c98d5d94 657}
103a8fea 658
c3ae331d
LB		 659/*
660 * old = new - old
661 */
c98d5d94
LB		 662void
663delta_thread(struct thread_data *new, struct thread_data *old,
664 struct core_data *core_delta)
665{
666 old->tsc = new->tsc - old->tsc;
667
668 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 669 if (old->tsc < (1000 * 1000))
670 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
671 "You can disable all c-states by booting with \"idle=poll\"\n"
672 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 673
c98d5d94 674 old->c1 = new->c1 - old->c1;
103a8fea 675
c98d5d94
LB		 676 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
677 old->aperf = new->aperf - old->aperf;
678 old->mperf = new->mperf - old->mperf;
679 } else {
103a8fea 680
c98d5d94
LB		 681 if (!aperf_mperf_unstable) {
682 fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
683 fprintf(stderr, "* Frequency results do not cover entire interval *\n");
684 fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 685
c98d5d94 686 aperf_mperf_unstable = 1;
103a8fea 687 }
103a8fea 688 /*
c98d5d94
LB		 689 * mperf delta is likely a huge "positive" number
690 * can not use it for calculating c0 time
103a8fea 691 */
c98d5d94
LB		 692 skip_c0 = 1;
693 skip_c1 = 1;
694 }
103a8fea 695
103a8fea 696
144b44b1
LB		 697 if (use_c1_residency_msr) {
698 /*
699 * Some models have a dedicated C1 residency MSR,
700 * which should be more accurate than the derivation below.
701 */
702 } else {
703 /*
704 * As counter collection is not atomic,
705 * it is possible for mperf's non-halted cycles + idle states
706 * to exceed TSC's all cycles: show c1 = 0% in that case.
707 */
708 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
709 old->c1 = 0;
710 else {
711 /* normal case, derive c1 */
712 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 713 - core_delta->c6 - core_delta->c7;
144b44b1 714 }
c98d5d94 715 }
c3ae331d 716
c98d5d94 717 if (old->mperf == 0) {
c3ae331d 718 if (verbose > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 719 old->mperf = 1; /* divide by 0 protection */
103a8fea 720 }
c98d5d94 721
8e180f3c
LB		 722 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
723 old->extra_delta32 &= 0xFFFFFFFF;
724
725 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
726
c98d5d94 727 /*
8e180f3c 728 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 729 */
2f32edf1
LB		 730 old->extra_msr32 = new->extra_msr32;
731 old->extra_msr64 = new->extra_msr64;
1ed51011
LB		 732
733 if (do_smi)
734 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 735}
736
737int delta_cpu(struct thread_data *t, struct core_data *c,
738 struct pkg_data *p, struct thread_data *t2,
739 struct core_data *c2, struct pkg_data *p2)
740{
741 /* calculate core delta only for 1st thread in core */
742 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
743 delta_core(c, c2);
744
745 /* always calculate thread delta */
746 delta_thread(t, t2, c2); /* c2 is core delta */
747
748 /* calculate package delta only for 1st core in package */
749 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
750 delta_package(p, p2);
751
103a8fea
LB		 752 return 0;
753}
754
c98d5d94
LB		 755void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
756{
757 t->tsc = 0;
758 t->aperf = 0;
759 t->mperf = 0;
760 t->c1 = 0;
761
1ed51011 762 t->smi_count = 0;
8e180f3c
LB		 763 t->extra_delta32 = 0;
764 t->extra_delta64 = 0;
765
c98d5d94
LB		 766 /* tells format_counters to dump all fields from this set */
767 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
768
769 c->c3 = 0;
770 c->c6 = 0;
771 c->c7 = 0;
889facbe 772 c->core_temp_c = 0;
c98d5d94
LB		 773
774 p->pc2 = 0;
775 p->pc3 = 0;
776 p->pc6 = 0;
777 p->pc7 = 0;
ca58710f
KCA		 778 p->pc8 = 0;
779 p->pc9 = 0;
780 p->pc10 = 0;
889facbe
LB		 781
782 p->energy_pkg = 0;
783 p->energy_dram = 0;
784 p->energy_cores = 0;
785 p->energy_gfx = 0;
786 p->rapl_pkg_perf_status = 0;
787 p->rapl_dram_perf_status = 0;
788 p->pkg_temp_c = 0;
c98d5d94
LB		 789}
790int sum_counters(struct thread_data *t, struct core_data *c,
791 struct pkg_data *p)
103a8fea 792{
c98d5d94
LB		 793 average.threads.tsc += t->tsc;
794 average.threads.aperf += t->aperf;
795 average.threads.mperf += t->mperf;
796 average.threads.c1 += t->c1;
103a8fea 797
8e180f3c
LB		 798 average.threads.extra_delta32 += t->extra_delta32;
799 average.threads.extra_delta64 += t->extra_delta64;
800
c98d5d94
LB		 801 /* sum per-core values only for 1st thread in core */
802 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
803 return 0;
103a8fea 804
c98d5d94
LB		 805 average.cores.c3 += c->c3;
806 average.cores.c6 += c->c6;
807 average.cores.c7 += c->c7;
808
889facbe
LB		 809 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
810
c98d5d94
LB		 811 /* sum per-pkg values only for 1st core in pkg */
812 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
813 return 0;
814
815 average.packages.pc2 += p->pc2;
816 average.packages.pc3 += p->pc3;
817 average.packages.pc6 += p->pc6;
818 average.packages.pc7 += p->pc7;
ca58710f
KCA		 819 average.packages.pc8 += p->pc8;
820 average.packages.pc9 += p->pc9;
821 average.packages.pc10 += p->pc10;
c98d5d94 822
889facbe
LB		 823 average.packages.energy_pkg += p->energy_pkg;
824 average.packages.energy_dram += p->energy_dram;
825 average.packages.energy_cores += p->energy_cores;
826 average.packages.energy_gfx += p->energy_gfx;
827
828 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
829
830 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
831 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 832 return 0;
833}
834/*
835 * sum the counters for all cpus in the system
836 * compute the weighted average
837 */
838void compute_average(struct thread_data *t, struct core_data *c,
839 struct pkg_data *p)
840{
841 clear_counters(&average.threads, &average.cores, &average.packages);
842
843 for_all_cpus(sum_counters, t, c, p);
844
845 average.threads.tsc /= topo.num_cpus;
846 average.threads.aperf /= topo.num_cpus;
847 average.threads.mperf /= topo.num_cpus;
848 average.threads.c1 /= topo.num_cpus;
849
8e180f3c
LB		 850 average.threads.extra_delta32 /= topo.num_cpus;
851 average.threads.extra_delta32 &= 0xFFFFFFFF;
852
853 average.threads.extra_delta64 /= topo.num_cpus;
854
c98d5d94
LB		 855 average.cores.c3 /= topo.num_cores;
856 average.cores.c6 /= topo.num_cores;
857 average.cores.c7 /= topo.num_cores;
858
859 average.packages.pc2 /= topo.num_packages;
860 average.packages.pc3 /= topo.num_packages;
861 average.packages.pc6 /= topo.num_packages;
862 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 863
864 average.packages.pc8 /= topo.num_packages;
865 average.packages.pc9 /= topo.num_packages;
866 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 867}
868
c98d5d94 869static unsigned long long rdtsc(void)
103a8fea 870{
c98d5d94 871 unsigned int low, high;
15aaa346 872
c98d5d94 873 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 874
c98d5d94
LB		 875 return low | ((unsigned long long)high) << 32;
876}
15aaa346 877
15aaa346 878
c98d5d94
LB		 879/*
880 * get_counters(...)
881 * migrate to cpu
882 * acquire and record local counters for that cpu
883 */
884int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
885{
886 int cpu = t->cpu_id;
889facbe 887 unsigned long long msr;
88c3281f 888
e52966c0
LB		 889 if (cpu_migrate(cpu)) {
890 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
c98d5d94 891 return -1;
e52966c0 892 }
15aaa346 893
c98d5d94
LB		 894 t->tsc = rdtsc(); /* we are running on local CPU of interest */
895
896 if (has_aperf) {
9c63a650 897 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 898 return -3;
9c63a650 899 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94
LB		 900 return -4;
901 }
902
1ed51011
LB		 903 if (do_smi) {
904 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
905 return -5;
906 t->smi_count = msr & 0xFFFFFFFF;
907 }
8e180f3c 908 if (extra_delta_offset32) {
889facbe 909 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 910 return -5;
889facbe 911 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 912 }
913
914 if (extra_delta_offset64)
915 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 916 return -5;
917
8e180f3c 918 if (extra_msr_offset32) {
889facbe 919 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 920 return -5;
889facbe 921 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 922 }
923
2f32edf1
LB		 924 if (extra_msr_offset64)
925 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 926 return -5;
927
144b44b1
LB		 928 if (use_c1_residency_msr) {
929 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
930 return -6;
931 }
932
c98d5d94
LB		 933 /* collect core counters only for 1st thread in core */
934 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
935 return 0;
936
144b44b1 937 if (do_nhm_cstates && !do_slm_cstates) {
c98d5d94
LB		 938 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
939 return -6;
144b44b1
LB		 940 }
941
942 if (do_nhm_cstates) {
c98d5d94
LB		 943 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
944 return -7;
945 }
946
947 if (do_snb_cstates)
948 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
949 return -8;
950
889facbe
LB		 951 if (do_dts) {
952 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
953 return -9;
954 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
955 }
956
957
c98d5d94
LB		 958 /* collect package counters only for 1st core in package */
959 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
960 return 0;
961
144b44b1 962 if (do_nhm_cstates && !do_slm_cstates) {
c98d5d94
LB		 963 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
964 return -9;
965 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
966 return -10;
967 }
968 if (do_snb_cstates) {
969 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
970 return -11;
971 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
972 return -12;
103a8fea 973 }
ca58710f
KCA		 974 if (do_c8_c9_c10) {
975 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
976 return -13;
977 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
978 return -13;
979 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
980 return -13;
981 }
889facbe
LB		 982 if (do_rapl & RAPL_PKG) {
983 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
984 return -13;
985 p->energy_pkg = msr & 0xFFFFFFFF;
986 }
987 if (do_rapl & RAPL_CORES) {
988 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
989 return -14;
990 p->energy_cores = msr & 0xFFFFFFFF;
991 }
992 if (do_rapl & RAPL_DRAM) {
993 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
994 return -15;
995 p->energy_dram = msr & 0xFFFFFFFF;
996 }
997 if (do_rapl & RAPL_GFX) {
998 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
999 return -16;
1000 p->energy_gfx = msr & 0xFFFFFFFF;
1001 }
1002 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1003 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1004 return -16;
1005 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1006 }
1007 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1008 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1009 return -16;
1010 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1011 }
1012 if (do_ptm) {
1013 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1014 return -17;
1015 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1016 }
15aaa346 1017 return 0;
103a8fea
LB		 1018}
1019
c98d5d94 1020void print_verbose_header(void)
103a8fea
LB		 1021{
1022 unsigned long long msr;
1023 unsigned int ratio;
1024
d7899447 1025 if (!do_nhm_platform_info)
103a8fea
LB		 1026 return;
1027
9c63a650 1028 get_msr(0, MSR_NHM_PLATFORM_INFO, &msr);
103a8fea 1029
67920418 1030 fprintf(stderr, "cpu0: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", msr);
6574a5d5 1031
103a8fea
LB		 1032 ratio = (msr >> 40) & 0xFF;
1033 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
1034 ratio, bclk, ratio * bclk);
1035
1036 ratio = (msr >> 8) & 0xFF;
1037 fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n",
1038 ratio, bclk, ratio * bclk);
1039
67920418 1040 get_msr(0, MSR_IA32_POWER_CTL, &msr);
144b44b1 1041 fprintf(stderr, "cpu0: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
67920418
LB		 1042 msr, msr & 0x2 ? "EN" : "DIS");
1043
6574a5d5
LB		 1044 if (!do_ivt_turbo_ratio_limit)
1045 goto print_nhm_turbo_ratio_limits;
1046
1047 get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr);
1048
67920418 1049 fprintf(stderr, "cpu0: MSR_IVT_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
6574a5d5
LB		 1050
1051 ratio = (msr >> 56) & 0xFF;
1052 if (ratio)
1053 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
1054 ratio, bclk, ratio * bclk);
1055
1056 ratio = (msr >> 48) & 0xFF;
1057 if (ratio)
1058 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
1059 ratio, bclk, ratio * bclk);
1060
1061 ratio = (msr >> 40) & 0xFF;
1062 if (ratio)
1063 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
1064 ratio, bclk, ratio * bclk);
1065
1066 ratio = (msr >> 32) & 0xFF;
1067 if (ratio)
1068 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
1069 ratio, bclk, ratio * bclk);
1070
1071 ratio = (msr >> 24) & 0xFF;
1072 if (ratio)
1073 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
1074 ratio, bclk, ratio * bclk);
1075
1076 ratio = (msr >> 16) & 0xFF;
1077 if (ratio)
1078 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
1079 ratio, bclk, ratio * bclk);
1080
1081 ratio = (msr >> 8) & 0xFF;
1082 if (ratio)
1083 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
1084 ratio, bclk, ratio * bclk);
1085
1086 ratio = (msr >> 0) & 0xFF;
1087 if (ratio)
1088 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
1089 ratio, bclk, ratio * bclk);
1090
1091print_nhm_turbo_ratio_limits:
889facbe
LB		 1092 get_msr(0, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
1093
1094#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1095#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1096
1097 fprintf(stderr, "cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", msr);
1098
1099 fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: ",
1100 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1101 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1102 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1103 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1104 (msr & (1 << 15)) ? "" : "UN",
1105 (unsigned int)msr & 7);
1106
1107
1108 switch(msr & 0x7) {
1109 case 0:
144b44b1 1110 fprintf(stderr, do_slm_cstates ? "no pkg states" : "pc0");
889facbe
LB		 1111 break;
1112 case 1:
144b44b1 1113 fprintf(stderr, do_slm_cstates ? "no pkg states" : do_snb_cstates ? "pc2" : "pc0");
889facbe
LB		 1114 break;
1115 case 2:
144b44b1 1116 fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc6-noret" : "pc3");
889facbe
LB		 1117 break;
1118 case 3:
144b44b1 1119 fprintf(stderr, do_slm_cstates ? "invalid" : "pc6");
889facbe
LB		 1120 break;
1121 case 4:
144b44b1 1122 fprintf(stderr, do_slm_cstates ? "pc4" : "pc7");
889facbe
LB		 1123 break;
1124 case 5:
144b44b1
LB		 1125 fprintf(stderr, do_slm_cstates ? "invalid" : do_snb_cstates ? "pc7s" : "invalid");
1126 break;
1127 case 6:
1128 fprintf(stderr, do_slm_cstates ? "pc6" : "invalid");
889facbe
LB		 1129 break;
1130 case 7:
144b44b1 1131 fprintf(stderr, do_slm_cstates ? "pc7" : "unlimited");
889facbe
LB		 1132 break;
1133 default:
1134 fprintf(stderr, "invalid");
1135 }
1136 fprintf(stderr, ")\n");
103a8fea 1137
d7899447 1138 if (!do_nhm_turbo_ratio_limit)
103a8fea
LB		 1139 return;
1140
9c63a650 1141 get_msr(0, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
103a8fea 1142
67920418 1143 fprintf(stderr, "cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n", msr);
6574a5d5
LB		 1144
1145 ratio = (msr >> 56) & 0xFF;
1146 if (ratio)
1147 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
1148 ratio, bclk, ratio * bclk);
1149
1150 ratio = (msr >> 48) & 0xFF;
1151 if (ratio)
1152 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
1153 ratio, bclk, ratio * bclk);
1154
1155 ratio = (msr >> 40) & 0xFF;
1156 if (ratio)
1157 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
1158 ratio, bclk, ratio * bclk);
1159
1160 ratio = (msr >> 32) & 0xFF;
1161 if (ratio)
1162 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
1163 ratio, bclk, ratio * bclk);
1164
103a8fea
LB		 1165 ratio = (msr >> 24) & 0xFF;
1166 if (ratio)
1167 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
1168 ratio, bclk, ratio * bclk);
1169
1170 ratio = (msr >> 16) & 0xFF;
1171 if (ratio)
1172 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
1173 ratio, bclk, ratio * bclk);
1174
1175 ratio = (msr >> 8) & 0xFF;
1176 if (ratio)
1177 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
1178 ratio, bclk, ratio * bclk);
1179
1180 ratio = (msr >> 0) & 0xFF;
1181 if (ratio)
1182 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
1183 ratio, bclk, ratio * bclk);
3a9a941d 1184
103a8fea
LB		 1185}
1186
c98d5d94 1187void free_all_buffers(void)
103a8fea 1188{
c98d5d94
LB		 1189 CPU_FREE(cpu_present_set);
1190 cpu_present_set = NULL;
1191 cpu_present_set = 0;
103a8fea 1192
c98d5d94
LB		 1193 CPU_FREE(cpu_affinity_set);
1194 cpu_affinity_set = NULL;
1195 cpu_affinity_setsize = 0;
103a8fea 1196
c98d5d94
LB		 1197 free(thread_even);
1198 free(core_even);
1199 free(package_even);
103a8fea 1200
c98d5d94
LB		 1201 thread_even = NULL;
1202 core_even = NULL;
1203 package_even = NULL;
103a8fea 1204
c98d5d94
LB		 1205 free(thread_odd);
1206 free(core_odd);
1207 free(package_odd);
103a8fea 1208
c98d5d94
LB		 1209 thread_odd = NULL;
1210 core_odd = NULL;
1211 package_odd = NULL;
103a8fea 1212
c98d5d94
LB		 1213 free(output_buffer);
1214 output_buffer = NULL;
1215 outp = NULL;
103a8fea
LB		 1216}
1217
57a42a34
JT		 1218/*
1219 * Open a file, and exit on failure
1220 */
1221FILE *fopen_or_die(const char *path, const char *mode)
1222{
1223 FILE *filep = fopen(path, "r");
b2c95d90
JT		 1224 if (!filep)
1225 err(1, "%s: open failed", path);
57a42a34
JT		 1226 return filep;
1227}
1228
c98d5d94 1229/*
95aebc44 1230 * Parse a file containing a single int.
c98d5d94 1231 */
95aebc44 1232int parse_int_file(const char *fmt, ...)
103a8fea 1233{
95aebc44
JT		 1234 va_list args;
1235 char path[PATH_MAX];
c98d5d94 1236 FILE *filep;
95aebc44 1237 int value;
103a8fea 1238
95aebc44
JT		 1239 va_start(args, fmt);
1240 vsnprintf(path, sizeof(path), fmt, args);
1241 va_end(args);
57a42a34 1242 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1243 if (fscanf(filep, "%d", &value) != 1)
1244 err(1, "%s: failed to parse number from file", path);
c98d5d94 1245 fclose(filep);
95aebc44
JT		 1246 return value;
1247}
1248
1249/*
1250 * cpu_is_first_sibling_in_core(cpu)
1251 * return 1 if given CPU is 1st HT sibling in the core
1252 */
1253int cpu_is_first_sibling_in_core(int cpu)
1254{
1255 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
103a8fea
LB		 1256}
1257
c98d5d94
LB		 1258/*
1259 * cpu_is_first_core_in_package(cpu)
1260 * return 1 if given CPU is 1st core in package
1261 */
1262int cpu_is_first_core_in_package(int cpu)
103a8fea 1263{
95aebc44 1264 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1265}
1266
1267int get_physical_package_id(int cpu)
1268{
95aebc44 1269 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1270}
1271
1272int get_core_id(int cpu)
1273{
95aebc44 1274 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1275}
1276
c98d5d94
LB		 1277int get_num_ht_siblings(int cpu)
1278{
1279 char path[80];
1280 FILE *filep;
1281 int sib1, sib2;
1282 int matches;
1283 char character;
1284
1285 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1286 filep = fopen_or_die(path, "r");
c98d5d94
LB		 1287 /*
1288 * file format:
1289 * if a pair of number with a character between: 2 siblings (eg. 1-2, or 1,4)
1290 * otherwinse 1 sibling (self).
1291 */
1292 matches = fscanf(filep, "%d%c%d\n", &sib1, &character, &sib2);
1293
1294 fclose(filep);
1295
1296 if (matches == 3)
1297 return 2;
1298 else
1299 return 1;
1300}
1301
103a8fea 1302/*
c98d5d94
LB		 1303 * run func(thread, core, package) in topology order
1304 * skip non-present cpus
103a8fea
LB		 1305 */
1306
c98d5d94
LB		 1307int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1308 struct pkg_data *, struct thread_data *, struct core_data *,
1309 struct pkg_data *), struct thread_data *thread_base,
1310 struct core_data *core_base, struct pkg_data *pkg_base,
1311 struct thread_data *thread_base2, struct core_data *core_base2,
1312 struct pkg_data *pkg_base2)
1313{
1314 int retval, pkg_no, core_no, thread_no;
1315
1316 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1317 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1318 for (thread_no = 0; thread_no <
1319 topo.num_threads_per_core; ++thread_no) {
1320 struct thread_data *t, *t2;
1321 struct core_data *c, *c2;
1322 struct pkg_data *p, *p2;
1323
1324 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1325
1326 if (cpu_is_not_present(t->cpu_id))
1327 continue;
1328
1329 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1330
1331 c = GET_CORE(core_base, core_no, pkg_no);
1332 c2 = GET_CORE(core_base2, core_no, pkg_no);
1333
1334 p = GET_PKG(pkg_base, pkg_no);
1335 p2 = GET_PKG(pkg_base2, pkg_no);
1336
1337 retval = func(t, c, p, t2, c2, p2);
1338 if (retval)
1339 return retval;
1340 }
1341 }
1342 }
1343 return 0;
1344}
1345
1346/*
1347 * run func(cpu) on every cpu in /proc/stat
1348 * return max_cpu number
1349 */
1350int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1351{
1352 FILE *fp;
c98d5d94 1353 int cpu_num;
103a8fea
LB		 1354 int retval;
1355
57a42a34 1356 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1357
1358 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1359 if (retval != 0)
1360 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1361
c98d5d94
LB		 1362 while (1) {
1363 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1364 if (retval != 1)
1365 break;
1366
c98d5d94
LB		 1367 retval = func(cpu_num);
1368 if (retval) {
1369 fclose(fp);
1370 return(retval);
1371 }
103a8fea
LB		 1372 }
1373 fclose(fp);
c98d5d94 1374 return 0;
103a8fea
LB		 1375}
1376
1377void re_initialize(void)
1378{
c98d5d94
LB		 1379 free_all_buffers();
1380 setup_all_buffers();
1381 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1382}
1383
c98d5d94 1384
103a8fea 1385/*
c98d5d94
LB		 1386 * count_cpus()
1387 * remember the last one seen, it will be the max
103a8fea 1388 */
c98d5d94 1389int count_cpus(int cpu)
103a8fea 1390{
c98d5d94
LB		 1391 if (topo.max_cpu_num < cpu)
1392 topo.max_cpu_num = cpu;
103a8fea 1393
c98d5d94
LB		 1394 topo.num_cpus += 1;
1395 return 0;
1396}
1397int mark_cpu_present(int cpu)
1398{
1399 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1400 return 0;
103a8fea
LB		 1401}
1402
1403void turbostat_loop()
1404{
c98d5d94 1405 int retval;
e52966c0 1406 int restarted = 0;
c98d5d94 1407
103a8fea 1408restart:
e52966c0
LB		 1409 restarted++;
1410
c98d5d94 1411 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1412 if (retval < -1) {
1413 exit(retval);
1414 } else if (retval == -1) {
e52966c0
LB		 1415 if (restarted > 1) {
1416 exit(retval);
1417 }
c98d5d94
LB		 1418 re_initialize();
1419 goto restart;
1420 }
e52966c0 1421 restarted = 0;
103a8fea
LB		 1422 gettimeofday(&tv_even, (struct timezone *)NULL);
1423
1424 while (1) {
c98d5d94 1425 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 1426 re_initialize();
1427 goto restart;
1428 }
1429 sleep(interval_sec);
c98d5d94 1430 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 1431 if (retval < -1) {
1432 exit(retval);
1433 } else if (retval == -1) {
15aaa346
LB		 1434 re_initialize();
1435 goto restart;
1436 }
103a8fea 1437 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 1438 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 1439 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
1440 compute_average(EVEN_COUNTERS);
1441 format_all_counters(EVEN_COUNTERS);
1442 flush_stdout();
15aaa346 1443 sleep(interval_sec);
c98d5d94 1444 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 1445 if (retval < -1) {
1446 exit(retval);
1447 } else if (retval == -1) {
103a8fea
LB		 1448 re_initialize();
1449 goto restart;
1450 }
103a8fea 1451 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 1452 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 1453 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
1454 compute_average(ODD_COUNTERS);
1455 format_all_counters(ODD_COUNTERS);
1456 flush_stdout();
103a8fea
LB		 1457 }
1458}
1459
1460void check_dev_msr()
1461{
1462 struct stat sb;
1463
b2c95d90 1464 if (stat("/dev/cpu/0/msr", &sb))
d7899447 1465 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 1466}
1467
98481e79 1468void check_permissions()
103a8fea 1469{
98481e79
LB		 1470 struct __user_cap_header_struct cap_header_data;
1471 cap_user_header_t cap_header = &cap_header_data;
1472 struct __user_cap_data_struct cap_data_data;
1473 cap_user_data_t cap_data = &cap_data_data;
1474 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
1475 int do_exit = 0;
1476
1477 /* check for CAP_SYS_RAWIO */
1478 cap_header->pid = getpid();
1479 cap_header->version = _LINUX_CAPABILITY_VERSION;
1480 if (capget(cap_header, cap_data) < 0)
1481 err(-6, "capget(2) failed");
1482
1483 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
1484 do_exit++;
1485 warnx("capget(CAP_SYS_RAWIO) failed,"
1486 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
1487 }
1488
1489 /* test file permissions */
1490 if (euidaccess("/dev/cpu/0/msr", R_OK)) {
1491 do_exit++;
1492 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
1493 }
1494
1495 /* if all else fails, thell them to be root */
1496 if (do_exit)
1497 if (getuid() != 0)
d7899447 1498 warnx("... or simply run as root");
98481e79
LB		 1499
1500 if (do_exit)
1501 exit(-6);
103a8fea
LB		 1502}
1503
d7899447
LB		 1504/*
1505 * NHM adds support for additional MSRs:
1506 *
1507 * MSR_SMI_COUNT 0x00000034
1508 *
1509 * MSR_NHM_PLATFORM_INFO 0x000000ce
1510 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
1511 *
1512 * MSR_PKG_C3_RESIDENCY 0x000003f8
1513 * MSR_PKG_C6_RESIDENCY 0x000003f9
1514 * MSR_CORE_C3_RESIDENCY 0x000003fc
1515 * MSR_CORE_C6_RESIDENCY 0x000003fd
1516 *
1517 */
1518int has_nhm_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 1519{
1520 if (!genuine_intel)
1521 return 0;
1522
1523 if (family != 6)
1524 return 0;
1525
1526 switch (model) {
1527 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
1528 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
1529 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
1530 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
1531 case 0x2C: /* Westmere EP - Gulftown */
1532 case 0x2A: /* SNB */
1533 case 0x2D: /* SNB Xeon */
553575f1 1534 case 0x3A: /* IVB */
1300651b 1535 case 0x3E: /* IVB Xeon */
70b43400 1536 case 0x3C: /* HSW */
e6f9bb3c 1537 case 0x3F: /* HSX */
70b43400 1538 case 0x45: /* HSW */
149c2319 1539 case 0x46: /* HSW */
144b44b1
LB		 1540 case 0x37: /* BYT */
1541 case 0x4D: /* AVN */
4e8e863f
LB		 1542 case 0x3D: /* BDW */
1543 case 0x4F: /* BDX */
1544 case 0x56: /* BDX-DE */
103a8fea
LB		 1545 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1546 case 0x2F: /* Westmere-EX Xeon - Eagleton */
d7899447 1547 return 1;
103a8fea
LB		 1548 default:
1549 return 0;
1550 }
1551}
d7899447
LB		 1552int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
1553{
1554 if (!has_nhm_msrs(family, model))
1555 return 0;
1556
1557 switch (model) {
1558 /* Nehalem compatible, but do not include turbo-ratio limit support */
1559 case 0x2E: /* Nehalem-EX Xeon - Beckton */
1560 case 0x2F: /* Westmere-EX Xeon - Eagleton */
1561 return 0;
1562 default:
1563 return 1;
1564 }
1565}
6574a5d5
LB		 1566int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1567{
1568 if (!genuine_intel)
1569 return 0;
1570
1571 if (family != 6)
1572 return 0;
1573
1574 switch (model) {
1575 case 0x3E: /* IVB Xeon */
1576 return 1;
1577 default:
1578 return 0;
1579 }
1580}
1581
889facbe
LB		 1582/*
1583 * print_epb()
1584 * Decode the ENERGY_PERF_BIAS MSR
1585 */
1586int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1587{
1588 unsigned long long msr;
1589 char *epb_string;
1590 int cpu;
1591
1592 if (!has_epb)
1593 return 0;
1594
1595 cpu = t->cpu_id;
1596
1597 /* EPB is per-package */
1598 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1599 return 0;
1600
1601 if (cpu_migrate(cpu)) {
1602 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1603 return -1;
1604 }
1605
1606 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
1607 return 0;
1608
1609 switch (msr & 0x7) {
1610 case ENERGY_PERF_BIAS_PERFORMANCE:
1611 epb_string = "performance";
1612 break;
1613 case ENERGY_PERF_BIAS_NORMAL:
1614 epb_string = "balanced";
1615 break;
1616 case ENERGY_PERF_BIAS_POWERSAVE:
1617 epb_string = "powersave";
1618 break;
1619 default:
1620 epb_string = "custom";
1621 break;
1622 }
1623 fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
1624
1625 return 0;
1626}
1627
3a9a941d
LB		 1628/*
1629 * print_perf_limit()
1630 */
1631int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1632{
1633 unsigned long long msr;
1634 int cpu;
1635
1636 cpu = t->cpu_id;
1637
1638 /* per-package */
1639 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1640 return 0;
1641
1642 if (cpu_migrate(cpu)) {
1643 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1644 return -1;
1645 }
1646
1647 if (do_core_perf_limit_reasons) {
1648 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
1649 fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1650 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
1651 (msr & 1 << 0) ? "PROCHOT, " : "",
1652 (msr & 1 << 1) ? "ThermStatus, " : "",
1653 (msr & 1 << 2) ? "bit2, " : "",
1654 (msr & 1 << 4) ? "Graphics, " : "",
1655 (msr & 1 << 5) ? "Auto-HWP, " : "",
1656 (msr & 1 << 6) ? "VR-Therm, " : "",
1657 (msr & 1 << 8) ? "Amps, " : "",
1658 (msr & 1 << 9) ? "CorePwr, " : "",
1659 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1660 (msr & 1 << 11) ? "PkgPwrL2, " : "",
1661 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
1662 (msr & 1 << 13) ? "Transitions, " : "",
1663 (msr & 1 << 14) ? "bit14, " : "",
1664 (msr & 1 << 15) ? "bit15, " : "");
1665 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
1666 (msr & 1 << 16) ? "PROCHOT, " : "",
1667 (msr & 1 << 17) ? "ThermStatus, " : "",
1668 (msr & 1 << 18) ? "bit18, " : "",
1669 (msr & 1 << 20) ? "Graphics, " : "",
1670 (msr & 1 << 21) ? "Auto-HWP, " : "",
1671 (msr & 1 << 22) ? "VR-Therm, " : "",
1672 (msr & 1 << 24) ? "Amps, " : "",
1673 (msr & 1 << 25) ? "CorePwr, " : "",
1674 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1675 (msr & 1 << 27) ? "PkgPwrL2, " : "",
1676 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
1677 (msr & 1 << 29) ? "Transitions, " : "",
1678 (msr & 1 << 30) ? "bit30, " : "",
1679 (msr & 1 << 31) ? "bit31, " : "");
1680
1681 }
1682 if (do_gfx_perf_limit_reasons) {
1683 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
1684 fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1685 fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
1686 (msr & 1 << 0) ? "PROCHOT, " : "",
1687 (msr & 1 << 1) ? "ThermStatus, " : "",
1688 (msr & 1 << 4) ? "Graphics, " : "",
1689 (msr & 1 << 6) ? "VR-Therm, " : "",
1690 (msr & 1 << 8) ? "Amps, " : "",
1691 (msr & 1 << 9) ? "GFXPwr, " : "",
1692 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1693 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1694 fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
1695 (msr & 1 << 16) ? "PROCHOT, " : "",
1696 (msr & 1 << 17) ? "ThermStatus, " : "",
1697 (msr & 1 << 20) ? "Graphics, " : "",
1698 (msr & 1 << 22) ? "VR-Therm, " : "",
1699 (msr & 1 << 24) ? "Amps, " : "",
1700 (msr & 1 << 25) ? "GFXPwr, " : "",
1701 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1702 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1703 }
1704 if (do_ring_perf_limit_reasons) {
1705 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
1706 fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
1707 fprintf(stderr, " (Active: %s%s%s%s%s%s)",
1708 (msr & 1 << 0) ? "PROCHOT, " : "",
1709 (msr & 1 << 1) ? "ThermStatus, " : "",
1710 (msr & 1 << 6) ? "VR-Therm, " : "",
1711 (msr & 1 << 8) ? "Amps, " : "",
1712 (msr & 1 << 10) ? "PkgPwrL1, " : "",
1713 (msr & 1 << 11) ? "PkgPwrL2, " : "");
1714 fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
1715 (msr & 1 << 16) ? "PROCHOT, " : "",
1716 (msr & 1 << 17) ? "ThermStatus, " : "",
1717 (msr & 1 << 22) ? "VR-Therm, " : "",
1718 (msr & 1 << 24) ? "Amps, " : "",
1719 (msr & 1 << 26) ? "PkgPwrL1, " : "",
1720 (msr & 1 << 27) ? "PkgPwrL2, " : "");
1721 }
1722 return 0;
1723}
1724
889facbe
LB		 1725#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
1726#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
1727
144b44b1
LB		 1728double get_tdp(model)
1729{
1730 unsigned long long msr;
1731
1732 if (do_rapl & RAPL_PKG_POWER_INFO)
1733 if (!get_msr(0, MSR_PKG_POWER_INFO, &msr))
1734 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
1735
1736 switch (model) {
1737 case 0x37:
1738 case 0x4D:
1739 return 30.0;
1740 default:
1741 return 135.0;
1742 }
1743}
1744
1745
889facbe
LB		 1746/*
1747 * rapl_probe()
1748 *
144b44b1 1749 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 1750 */
1751void rapl_probe(unsigned int family, unsigned int model)
1752{
1753 unsigned long long msr;
144b44b1 1754 unsigned int time_unit;
889facbe
LB		 1755 double tdp;
1756
1757 if (!genuine_intel)
1758 return;
1759
1760 if (family != 6)
1761 return;
1762
1763 switch (model) {
1764 case 0x2A:
1765 case 0x3A:
70b43400 1766 case 0x3C: /* HSW */
70b43400 1767 case 0x45: /* HSW */
149c2319 1768 case 0x46: /* HSW */
4e8e863f 1769 case 0x3D: /* BDW */
144b44b1 1770 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 1771 break;
e6f9bb3c 1772 case 0x3F: /* HSX */
4e8e863f
LB		 1773 case 0x4F: /* BDX */
1774 case 0x56: /* BDX-DE */
e6f9bb3c
LB		 1775 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
1776 break;
889facbe
LB		 1777 case 0x2D:
1778 case 0x3E:
144b44b1
LB		 1779 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
1780 break;
1781 case 0x37: /* BYT */
1782 case 0x4D: /* AVN */
1783 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 1784 break;
1785 default:
1786 return;
1787 }
1788
1789 /* units on package 0, verify later other packages match */
1790 if (get_msr(0, MSR_RAPL_POWER_UNIT, &msr))
1791 return;
1792
1793 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 1794 if (model == 0x37)
1795 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
1796 else
1797 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 1798
144b44b1
LB		 1799 time_unit = msr >> 16 & 0xF;
1800 if (time_unit == 0)
1801 time_unit = 0xA;
889facbe 1802
144b44b1 1803 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 1804
144b44b1 1805 tdp = get_tdp(model);
889facbe 1806
144b44b1 1807 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
889facbe 1808 if (verbose)
144b44b1 1809 fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 1810
1811 return;
1812}
1813
3a9a941d
LB		 1814void perf_limit_reasons_probe(family, model)
1815{
1816 if (!genuine_intel)
1817 return;
1818
1819 if (family != 6)
1820 return;
1821
1822 switch (model) {
1823 case 0x3C: /* HSW */
1824 case 0x45: /* HSW */
1825 case 0x46: /* HSW */
1826 do_gfx_perf_limit_reasons = 1;
1827 case 0x3F: /* HSX */
1828 do_core_perf_limit_reasons = 1;
1829 do_ring_perf_limit_reasons = 1;
1830 default:
1831 return;
1832 }
1833}
1834
889facbe
LB		 1835int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1836{
1837 unsigned long long msr;
1838 unsigned int dts;
1839 int cpu;
1840
1841 if (!(do_dts || do_ptm))
1842 return 0;
1843
1844 cpu = t->cpu_id;
1845
1846 /* DTS is per-core, no need to print for each thread */
1847 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1848 return 0;
1849
1850 if (cpu_migrate(cpu)) {
1851 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1852 return -1;
1853 }
1854
1855 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
1856 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1857 return 0;
1858
1859 dts = (msr >> 16) & 0x7F;
1860 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
1861 cpu, msr, tcc_activation_temp - dts);
1862
1863#ifdef THERM_DEBUG
1864 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
1865 return 0;
1866
1867 dts = (msr >> 16) & 0x7F;
1868 dts2 = (msr >> 8) & 0x7F;
1869 fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
1870 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
1871#endif
1872 }
1873
1874
1875 if (do_dts) {
1876 unsigned int resolution;
1877
1878 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1879 return 0;
1880
1881 dts = (msr >> 16) & 0x7F;
1882 resolution = (msr >> 27) & 0xF;
1883 fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
1884 cpu, msr, tcc_activation_temp - dts, resolution);
1885
1886#ifdef THERM_DEBUG
1887 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
1888 return 0;
1889
1890 dts = (msr >> 16) & 0x7F;
1891 dts2 = (msr >> 8) & 0x7F;
1892 fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
1893 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
1894#endif
1895 }
1896
1897 return 0;
1898}
1899
1900void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
1901{
1902 fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
1903 cpu, label,
1904 ((msr >> 15) & 1) ? "EN" : "DIS",
1905 ((msr >> 0) & 0x7FFF) * rapl_power_units,
1906 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
1907 (((msr >> 16) & 1) ? "EN" : "DIS"));
1908
1909 return;
1910}
1911
1912int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1913{
1914 unsigned long long msr;
1915 int cpu;
889facbe
LB		 1916
1917 if (!do_rapl)
1918 return 0;
1919
1920 /* RAPL counters are per package, so print only for 1st thread/package */
1921 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1922 return 0;
1923
1924 cpu = t->cpu_id;
1925 if (cpu_migrate(cpu)) {
1926 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
1927 return -1;
1928 }
1929
1930 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
1931 return -1;
1932
889facbe
LB		 1933 if (verbose) {
1934 fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
1935 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 1936 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 1937 }
144b44b1
LB		 1938 if (do_rapl & RAPL_PKG_POWER_INFO) {
1939
889facbe
LB		 1940 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
1941 return -5;
1942
1943
1944 fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
1945 cpu, msr,
1946 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1947 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1948 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1949 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
1950
144b44b1
LB		 1951 }
1952 if (do_rapl & RAPL_PKG) {
1953
889facbe
LB		 1954 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
1955 return -9;
1956
1957 fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
1958 cpu, msr, (msr >> 63) & 1 ? "": "UN");
1959
1960 print_power_limit_msr(cpu, msr, "PKG Limit #1");
1961 fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
1962 cpu,
1963 ((msr >> 47) & 1) ? "EN" : "DIS",
1964 ((msr >> 32) & 0x7FFF) * rapl_power_units,
1965 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
1966 ((msr >> 48) & 1) ? "EN" : "DIS");
1967 }
1968
1969 if (do_rapl & RAPL_DRAM) {
1970 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
1971 return -6;
1972
1973
1974 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
1975 cpu, msr,
1976 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1977 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1978 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
1979 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
1980
1981
1982 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
1983 return -9;
1984 fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
1985 cpu, msr, (msr >> 31) & 1 ? "": "UN");
1986
1987 print_power_limit_msr(cpu, msr, "DRAM Limit");
1988 }
144b44b1 1989 if (do_rapl & RAPL_CORE_POLICY) {
889facbe
LB		 1990 if (verbose) {
1991 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
1992 return -7;
1993
1994 fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 1995 }
1996 }
1997 if (do_rapl & RAPL_CORES) {
1998 if (verbose) {
889facbe
LB		 1999
2000 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2001 return -9;
2002 fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
2003 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2004 print_power_limit_msr(cpu, msr, "Cores Limit");
2005 }
2006 }
2007 if (do_rapl & RAPL_GFX) {
2008 if (verbose) {
2009 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2010 return -8;
2011
2012 fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
2013
2014 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2015 return -9;
2016 fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
2017 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2018 print_power_limit_msr(cpu, msr, "GFX Limit");
2019 }
2020 }
2021 return 0;
2022}
2023
d7899447
LB		 2024/*
2025 * SNB adds support for additional MSRs:
2026 *
2027 * MSR_PKG_C7_RESIDENCY 0x000003fa
2028 * MSR_CORE_C7_RESIDENCY 0x000003fe
2029 * MSR_PKG_C2_RESIDENCY 0x0000060d
2030 */
103a8fea 2031
d7899447 2032int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2033{
2034 if (!genuine_intel)
2035 return 0;
2036
2037 switch (model) {
2038 case 0x2A:
2039 case 0x2D:
650a37f3 2040 case 0x3A: /* IVB */
1300651b 2041 case 0x3E: /* IVB Xeon */
70b43400
LB		 2042 case 0x3C: /* HSW */
2043 case 0x3F: /* HSW */
2044 case 0x45: /* HSW */
149c2319 2045 case 0x46: /* HSW */
4e8e863f
LB		 2046 case 0x3D: /* BDW */
2047 case 0x4F: /* BDX */
2048 case 0x56: /* BDX-DE */
103a8fea
LB		 2049 return 1;
2050 }
2051 return 0;
2052}
2053
d7899447
LB		 2054/*
2055 * HSW adds support for additional MSRs:
2056 *
2057 * MSR_PKG_C8_RESIDENCY 0x00000630
2058 * MSR_PKG_C9_RESIDENCY 0x00000631
2059 * MSR_PKG_C10_RESIDENCY 0x00000632
2060 */
2061int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2062{
2063 if (!genuine_intel)
2064 return 0;
2065
2066 switch (model) {
4e8e863f
LB		 2067 case 0x45: /* HSW */
2068 case 0x3D: /* BDW */
ca58710f
KCA		 2069 return 1;
2070 }
2071 return 0;
2072}
2073
2074
144b44b1
LB		 2075int is_slm(unsigned int family, unsigned int model)
2076{
2077 if (!genuine_intel)
2078 return 0;
2079 switch (model) {
2080 case 0x37: /* BYT */
2081 case 0x4D: /* AVN */
2082 return 1;
2083 }
2084 return 0;
2085}
2086
2087#define SLM_BCLK_FREQS 5
2088double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
2089
2090double slm_bclk(void)
2091{
2092 unsigned long long msr = 3;
2093 unsigned int i;
2094 double freq;
2095
2096 if (get_msr(0, MSR_FSB_FREQ, &msr))
2097 fprintf(stderr, "SLM BCLK: unknown\n");
2098
2099 i = msr & 0xf;
2100 if (i >= SLM_BCLK_FREQS) {
2101 fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
2102 msr = 3;
2103 }
2104 freq = slm_freq_table[i];
2105
2106 fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
2107
2108 return freq;
2109}
2110
103a8fea
LB		 2111double discover_bclk(unsigned int family, unsigned int model)
2112{
d7899447 2113 if (has_snb_msrs(family, model))
103a8fea 2114 return 100.00;
144b44b1
LB		 2115 else if (is_slm(family, model))
2116 return slm_bclk();
103a8fea
LB		 2117 else
2118 return 133.33;
2119}
2120
889facbe
LB		 2121/*
2122 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
2123 * the Thermal Control Circuit (TCC) activates.
2124 * This is usually equal to tjMax.
2125 *
2126 * Older processors do not have this MSR, so there we guess,
2127 * but also allow cmdline over-ride with -T.
2128 *
2129 * Several MSR temperature values are in units of degrees-C
2130 * below this value, including the Digital Thermal Sensor (DTS),
2131 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
2132 */
2133int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2134{
2135 unsigned long long msr;
2136 unsigned int target_c_local;
2137 int cpu;
2138
2139 /* tcc_activation_temp is used only for dts or ptm */
2140 if (!(do_dts || do_ptm))
2141 return 0;
2142
2143 /* this is a per-package concept */
2144 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2145 return 0;
2146
2147 cpu = t->cpu_id;
2148 if (cpu_migrate(cpu)) {
2149 fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
2150 return -1;
2151 }
2152
2153 if (tcc_activation_temp_override != 0) {
2154 tcc_activation_temp = tcc_activation_temp_override;
2155 fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
2156 cpu, tcc_activation_temp);
2157 return 0;
2158 }
2159
2160 /* Temperature Target MSR is Nehalem and newer only */
d7899447 2161 if (!do_nhm_platform_info)
889facbe
LB		 2162 goto guess;
2163
2164 if (get_msr(0, MSR_IA32_TEMPERATURE_TARGET, &msr))
2165 goto guess;
2166
3482124a 2167 target_c_local = (msr >> 16) & 0xFF;
889facbe
LB		 2168
2169 if (verbose)
2170 fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
2171 cpu, msr, target_c_local);
2172
3482124a 2173 if (!target_c_local)
889facbe
LB		 2174 goto guess;
2175
2176 tcc_activation_temp = target_c_local;
2177
2178 return 0;
2179
2180guess:
2181 tcc_activation_temp = TJMAX_DEFAULT;
2182 fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
2183 cpu, tcc_activation_temp);
2184
2185 return 0;
2186}
103a8fea
LB		 2187void check_cpuid()
2188{
2189 unsigned int eax, ebx, ecx, edx, max_level;
2190 unsigned int fms, family, model, stepping;
2191
2192 eax = ebx = ecx = edx = 0;
2193
2b92865e 2194 __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
103a8fea
LB		 2195
2196 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
2197 genuine_intel = 1;
2198
2199 if (verbose)
889facbe 2200 fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 2201 (char *)&ebx, (char *)&edx, (char *)&ecx);
2202
2b92865e 2203 __get_cpuid(1, &fms, &ebx, &ecx, &edx);
103a8fea
LB		 2204 family = (fms >> 8) & 0xf;
2205 model = (fms >> 4) & 0xf;
2206 stepping = fms & 0xf;
2207 if (family == 6 || family == 0xf)
2208 model += ((fms >> 16) & 0xf) << 4;
2209
2210 if (verbose)
2211 fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
2212 max_level, family, model, stepping, family, model, stepping);
2213
b2c95d90
JT		 2214 if (!(edx & (1 << 5)))
2215 errx(1, "CPUID: no MSR");
103a8fea
LB		 2216
2217 /*
2218 * check max extended function levels of CPUID.
2219 * This is needed to check for invariant TSC.
2220 * This check is valid for both Intel and AMD.
2221 */
2222 ebx = ecx = edx = 0;
2b92865e 2223 __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
103a8fea 2224
d7899447 2225 if (max_level >= 0x80000007) {
103a8fea 2226
d7899447
LB		 2227 /*
2228 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
2229 * this check is valid for both Intel and AMD
2230 */
2231 __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
2232 has_invariant_tsc = edx & (1 << 8);
2233 }
103a8fea
LB		 2234
2235 /*
2236 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
2237 * this check is valid for both Intel and AMD
2238 */
2239
2b92865e 2240 __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
8209e054 2241 has_aperf = ecx & (1 << 0);
889facbe
LB		 2242 do_dts = eax & (1 << 0);
2243 do_ptm = eax & (1 << 6);
2244 has_epb = ecx & (1 << 3);
2245
2246 if (verbose)
2247 fprintf(stderr, "CPUID(6): %s%s%s%s\n",
2248 has_aperf ? "APERF" : "No APERF!",
2249 do_dts ? ", DTS" : "",
2250 do_ptm ? ", PTM": "",
2251 has_epb ? ", EPB": "");
2252
2253 if (!has_aperf)
b2c95d90 2254 errx(-1, "No APERF");
103a8fea 2255
d7899447
LB		 2256 do_nhm_platform_info = do_nhm_cstates = do_smi = has_nhm_msrs(family, model);
2257 do_snb_cstates = has_snb_msrs(family, model);
2258 do_c8_c9_c10 = has_hsw_msrs(family, model);
144b44b1 2259 do_slm_cstates = is_slm(family, model);
103a8fea
LB		 2260 bclk = discover_bclk(family, model);
2261
d7899447 2262 do_nhm_turbo_ratio_limit = has_nhm_turbo_ratio_limit(family, model);
6574a5d5 2263 do_ivt_turbo_ratio_limit = has_ivt_turbo_ratio_limit(family, model);
889facbe 2264 rapl_probe(family, model);
3a9a941d 2265 perf_limit_reasons_probe(family, model);
889facbe
LB		 2266
2267 return;
103a8fea
LB		 2268}
2269
2270
2271void usage()
2272{
f591c38b 2273 errx(1, "%s: [-v][-R][-T][-p|-P|-S][-c MSR#][-C MSR#][-m MSR#][-M MSR#][-i interval_sec | command ...]\n",
b2c95d90 2274 progname);
103a8fea
LB		 2275}
2276
2277
2278/*
2279 * in /dev/cpu/ return success for names that are numbers
2280 * ie. filter out ".", "..", "microcode".
2281 */
2282int dir_filter(const struct dirent *dirp)
2283{
2284 if (isdigit(dirp->d_name[0]))
2285 return 1;
2286 else
2287 return 0;
2288}
2289
2290int open_dev_cpu_msr(int dummy1)
2291{
2292 return 0;
2293}
2294
c98d5d94
LB		 2295void topology_probe()
2296{
2297 int i;
2298 int max_core_id = 0;
2299 int max_package_id = 0;
2300 int max_siblings = 0;
2301 struct cpu_topology {
2302 int core_id;
2303 int physical_package_id;
2304 } *cpus;
2305
2306 /* Initialize num_cpus, max_cpu_num */
2307 topo.num_cpus = 0;
2308 topo.max_cpu_num = 0;
2309 for_all_proc_cpus(count_cpus);
2310 if (!summary_only && topo.num_cpus > 1)
2311 show_cpu = 1;
2312
2313 if (verbose > 1)
2314 fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
2315
2316 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 2317 if (cpus == NULL)
2318 err(1, "calloc cpus");
c98d5d94
LB		 2319
2320 /*
2321 * Allocate and initialize cpu_present_set
2322 */
2323 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2324 if (cpu_present_set == NULL)
2325 err(3, "CPU_ALLOC");
c98d5d94
LB		 2326 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2327 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
2328 for_all_proc_cpus(mark_cpu_present);
2329
2330 /*
2331 * Allocate and initialize cpu_affinity_set
2332 */
2333 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 2334 if (cpu_affinity_set == NULL)
2335 err(3, "CPU_ALLOC");
c98d5d94
LB		 2336 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2337 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
2338
2339
2340 /*
2341 * For online cpus
2342 * find max_core_id, max_package_id
2343 */
2344 for (i = 0; i <= topo.max_cpu_num; ++i) {
2345 int siblings;
2346
2347 if (cpu_is_not_present(i)) {
2348 if (verbose > 1)
2349 fprintf(stderr, "cpu%d NOT PRESENT\n", i);
2350 continue;
2351 }
2352 cpus[i].core_id = get_core_id(i);
2353 if (cpus[i].core_id > max_core_id)
2354 max_core_id = cpus[i].core_id;
2355
2356 cpus[i].physical_package_id = get_physical_package_id(i);
2357 if (cpus[i].physical_package_id > max_package_id)
2358 max_package_id = cpus[i].physical_package_id;
2359
2360 siblings = get_num_ht_siblings(i);
2361 if (siblings > max_siblings)
2362 max_siblings = siblings;
2363 if (verbose > 1)
2364 fprintf(stderr, "cpu %d pkg %d core %d\n",
2365 i, cpus[i].physical_package_id, cpus[i].core_id);
2366 }
2367 topo.num_cores_per_pkg = max_core_id + 1;
2368 if (verbose > 1)
2369 fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
2370 max_core_id, topo.num_cores_per_pkg);
2371 if (!summary_only && topo.num_cores_per_pkg > 1)
2372 show_core = 1;
2373
2374 topo.num_packages = max_package_id + 1;
2375 if (verbose > 1)
2376 fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
2377 max_package_id, topo.num_packages);
2378 if (!summary_only && topo.num_packages > 1)
2379 show_pkg = 1;
2380
2381 topo.num_threads_per_core = max_siblings;
2382 if (verbose > 1)
2383 fprintf(stderr, "max_siblings %d\n", max_siblings);
2384
2385 free(cpus);
2386}
2387
2388void
2389allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
2390{
2391 int i;
2392
2393 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
2394 topo.num_packages, sizeof(struct thread_data));
2395 if (*t == NULL)
2396 goto error;
2397
2398 for (i = 0; i < topo.num_threads_per_core *
2399 topo.num_cores_per_pkg * topo.num_packages; i++)
2400 (*t)[i].cpu_id = -1;
2401
2402 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
2403 sizeof(struct core_data));
2404 if (*c == NULL)
2405 goto error;
2406
2407 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
2408 (*c)[i].core_id = -1;
2409
2410 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
2411 if (*p == NULL)
2412 goto error;
2413
2414 for (i = 0; i < topo.num_packages; i++)
2415 (*p)[i].package_id = i;
2416
2417 return;
2418error:
b2c95d90 2419 err(1, "calloc counters");
c98d5d94
LB		 2420}
2421/*
2422 * init_counter()
2423 *
2424 * set cpu_id, core_num, pkg_num
2425 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
2426 *
2427 * increment topo.num_cores when 1st core in pkg seen
2428 */
2429void init_counter(struct thread_data *thread_base, struct core_data *core_base,
2430 struct pkg_data *pkg_base, int thread_num, int core_num,
2431 int pkg_num, int cpu_id)
2432{
2433 struct thread_data *t;
2434 struct core_data *c;
2435 struct pkg_data *p;
2436
2437 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
2438 c = GET_CORE(core_base, core_num, pkg_num);
2439 p = GET_PKG(pkg_base, pkg_num);
2440
2441 t->cpu_id = cpu_id;
2442 if (thread_num == 0) {
2443 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
2444 if (cpu_is_first_core_in_package(cpu_id))
2445 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
2446 }
2447
2448 c->core_id = core_num;
2449 p->package_id = pkg_num;
2450}
2451
2452
2453int initialize_counters(int cpu_id)
2454{
2455 int my_thread_id, my_core_id, my_package_id;
2456
2457 my_package_id = get_physical_package_id(cpu_id);
2458 my_core_id = get_core_id(cpu_id);
2459
2460 if (cpu_is_first_sibling_in_core(cpu_id)) {
2461 my_thread_id = 0;
2462 topo.num_cores++;
2463 } else {
2464 my_thread_id = 1;
2465 }
2466
2467 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2468 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
2469 return 0;
2470}
2471
2472void allocate_output_buffer()
2473{
3b4d5c7f 2474 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 2475 outp = output_buffer;
b2c95d90
JT		 2476 if (outp == NULL)
2477 err(-1, "calloc output buffer");
c98d5d94
LB		 2478}
2479
2480void setup_all_buffers(void)
2481{
2482 topology_probe();
2483 allocate_counters(&thread_even, &core_even, &package_even);
2484 allocate_counters(&thread_odd, &core_odd, &package_odd);
2485 allocate_output_buffer();
2486 for_all_proc_cpus(initialize_counters);
2487}
3b4d5c7f 2488
103a8fea
LB		 2489void turbostat_init()
2490{
103a8fea 2491 check_dev_msr();
98481e79
LB		 2492 check_permissions();
2493 check_cpuid();
103a8fea 2494
c98d5d94 2495 setup_all_buffers();
103a8fea
LB		 2496
2497 if (verbose)
c98d5d94 2498 print_verbose_header();
889facbe
LB		 2499
2500 if (verbose)
2501 for_all_cpus(print_epb, ODD_COUNTERS);
2502
3a9a941d
LB		 2503 if (verbose)
2504 for_all_cpus(print_perf_limit, ODD_COUNTERS);
2505
889facbe
LB		 2506 if (verbose)
2507 for_all_cpus(print_rapl, ODD_COUNTERS);
2508
2509 for_all_cpus(set_temperature_target, ODD_COUNTERS);
2510
2511 if (verbose)
2512 for_all_cpus(print_thermal, ODD_COUNTERS);
103a8fea
LB		 2513}
2514
2515int fork_it(char **argv)
2516{
103a8fea 2517 pid_t child_pid;
d91bb17c 2518 int status;
d15cf7c1 2519
d91bb17c
LB		 2520 status = for_all_cpus(get_counters, EVEN_COUNTERS);
2521 if (status)
2522 exit(status);
c98d5d94
LB		 2523 /* clear affinity side-effect of get_counters() */
2524 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 2525 gettimeofday(&tv_even, (struct timezone *)NULL);
2526
2527 child_pid = fork();
2528 if (!child_pid) {
2529 /* child */
2530 execvp(argv[0], argv);
2531 } else {
103a8fea
LB		 2532
2533 /* parent */
b2c95d90
JT		 2534 if (child_pid == -1)
2535 err(1, "fork");
103a8fea
LB		 2536
2537 signal(SIGINT, SIG_IGN);
2538 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 2539 if (waitpid(child_pid, &status, 0) == -1)
2540 err(status, "waitpid");
103a8fea 2541 }
c98d5d94
LB		 2542 /*
2543 * n.b. fork_it() does not check for errors from for_all_cpus()
2544 * because re-starting is problematic when forking
2545 */
2546 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 2547 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 2548 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 2549 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2550 compute_average(EVEN_COUNTERS);
2551 format_all_counters(EVEN_COUNTERS);
2552 flush_stderr();
103a8fea 2553
6eab04a8 2554 fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
103a8fea 2555
d91bb17c 2556 return status;
103a8fea
LB		 2557}
2558
3b4d5c7f
AS		 2559int get_and_dump_counters(void)
2560{
2561 int status;
2562
2563 status = for_all_cpus(get_counters, ODD_COUNTERS);
2564 if (status)
2565 return status;
2566
2567 status = for_all_cpus(dump_counters, ODD_COUNTERS);
2568 if (status)
2569 return status;
2570
2571 flush_stdout();
2572
2573 return status;
2574}
2575
103a8fea
LB		 2576void cmdline(int argc, char **argv)
2577{
2578 int opt;
2579
2580 progname = argv[0];
2581
3b4d5c7f 2582 while ((opt = getopt(argc, argv, "+pPsSvi:c:C:m:M:RJT:")) != -1) {
103a8fea 2583 switch (opt) {
f9240813 2584 case 'p':
c98d5d94
LB		 2585 show_core_only++;
2586 break;
f9240813 2587 case 'P':
c98d5d94
LB		 2588 show_pkg_only++;
2589 break;
3b4d5c7f
AS		 2590 case 's':
2591 dump_only++;
2592 break;
f9240813 2593 case 'S':
e23da037
LB		 2594 summary_only++;
2595 break;
103a8fea
LB		 2596 case 'v':
2597 verbose++;
2598 break;
2599 case 'i':
2600 interval_sec = atoi(optarg);
2601 break;
f9240813 2602 case 'c':
8e180f3c
LB		 2603 sscanf(optarg, "%x", &extra_delta_offset32);
2604 break;
f9240813 2605 case 'C':
8e180f3c
LB		 2606 sscanf(optarg, "%x", &extra_delta_offset64);
2607 break;
2f32edf1
LB		 2608 case 'm':
2609 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 2610 break;
103a8fea 2611 case 'M':
2f32edf1 2612 sscanf(optarg, "%x", &extra_msr_offset64);
103a8fea 2613 break;
889facbe
LB		 2614 case 'R':
2615 rapl_verbose++;
2616 break;
2617 case 'T':
2618 tcc_activation_temp_override = atoi(optarg);
2619 break;
5c56be9a
DB		 2620 case 'J':
2621 rapl_joules++;
2622 break;
2623
103a8fea
LB		 2624 default:
2625 usage();
2626 }
2627 }
2628}
2629
2630int main(int argc, char **argv)
2631{
2632 cmdline(argc, argv);
2633
889facbe 2634 if (verbose)
98481e79 2635 fprintf(stderr, "turbostat v3.8 14-Aug 2014"
103a8fea 2636 " - Len Brown <lenb@kernel.org>\n");
103a8fea
LB		 2637
2638 turbostat_init();
2639
3b4d5c7f
AS		 2640 /* dump counters and exit */
2641 if (dump_only)
2642 return get_and_dump_counters();
2643
103a8fea
LB		 2644 /*
2645 * if any params left, it must be a command to fork
2646 */
2647 if (argc - optind)
2648 return fork_it(argv + optind);
2649 else
2650 turbostat_loop();
2651
2652 return 0;
2653}
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