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tools/power turbostat: initial BXT support
[mirror_ubuntu-zesty-kernel.git] / tools / power / x86 / turbostat / turbostat.c
CommitLineData
103a8fea
LB		 1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
144b44b1 5 * Copyright (c) 2013 Intel Corporation.
103a8fea
LB		 6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
88c3281f 22#define _GNU_SOURCE
b731f311 23#include MSRHEADER
95aebc44 24#include <stdarg.h>
103a8fea 25#include <stdio.h>
b2c95d90 26#include <err.h>
103a8fea
LB		 27#include <unistd.h>
28#include <sys/types.h>
29#include <sys/wait.h>
30#include <sys/stat.h>
31#include <sys/resource.h>
32#include <fcntl.h>
33#include <signal.h>
34#include <sys/time.h>
35#include <stdlib.h>
d8af6f5f 36#include <getopt.h>
103a8fea
LB		 37#include <dirent.h>
38#include <string.h>
39#include <ctype.h>
88c3281f 40#include <sched.h>
2a0609c0 41#include <time.h>
2b92865e 42#include <cpuid.h>
98481e79
LB		 43#include <linux/capability.h>
44#include <errno.h>
103a8fea 45
103a8fea 46char *proc_stat = "/proc/stat";
b7d8c148 47FILE *outf;
36229897 48int *fd_percpu;
2a0609c0 49struct timespec interval_ts = {5, 0};
d8af6f5f
LB		 50unsigned int debug;
51unsigned int rapl_joules;
52unsigned int summary_only;
53unsigned int dump_only;
103a8fea
LB		 54unsigned int skip_c0;
55unsigned int skip_c1;
56unsigned int do_nhm_cstates;
57unsigned int do_snb_cstates;
fb5d4327 58unsigned int do_knl_cstates;
ee7e38e3
LB		 59unsigned int do_pc2;
60unsigned int do_pc3;
61unsigned int do_pc6;
62unsigned int do_pc7;
ca58710f 63unsigned int do_c8_c9_c10;
0b2bb692 64unsigned int do_skl_residency;
144b44b1
LB		 65unsigned int do_slm_cstates;
66unsigned int use_c1_residency_msr;
103a8fea 67unsigned int has_aperf;
889facbe 68unsigned int has_epb;
5a63426e
LB		 69unsigned int do_irtl_snb;
70unsigned int do_irtl_hsw;
fc04cc67 71unsigned int units = 1000000; /* MHz etc */
103a8fea
LB		 72unsigned int genuine_intel;
73unsigned int has_invariant_tsc;
d7899447 74unsigned int do_nhm_platform_info;
2f32edf1
LB		 75unsigned int extra_msr_offset32;
76unsigned int extra_msr_offset64;
8e180f3c
LB		 77unsigned int extra_delta_offset32;
78unsigned int extra_delta_offset64;
b2b34dfe 79unsigned int aperf_mperf_multiplier = 1;
562a2d37 80int do_irq = 1;
1ed51011 81int do_smi;
103a8fea 82double bclk;
a2b7b749 83double base_hz;
21ed5574 84unsigned int has_base_hz;
a2b7b749 85double tsc_tweak = 1.0;
103a8fea
LB		 86unsigned int show_pkg;
87unsigned int show_core;
88unsigned int show_cpu;
c98d5d94
LB		 89unsigned int show_pkg_only;
90unsigned int show_core_only;
91char *output_buffer, *outp;
889facbe
LB		 92unsigned int do_rapl;
93unsigned int do_dts;
94unsigned int do_ptm;
fdf676e5
LB		 95unsigned int do_gfx_rc6_ms;
96unsigned long long gfx_cur_rc6_ms;
27d47356
LB		 97unsigned int do_gfx_mhz;
98unsigned int gfx_cur_mhz;
889facbe
LB		 99unsigned int tcc_activation_temp;
100unsigned int tcc_activation_temp_override;
40ee8e3b
AS		 101double rapl_power_units, rapl_time_units;
102double rapl_dram_energy_units, rapl_energy_units;
889facbe 103double rapl_joule_counter_range;
3a9a941d
LB		 104unsigned int do_core_perf_limit_reasons;
105unsigned int do_gfx_perf_limit_reasons;
106unsigned int do_ring_perf_limit_reasons;
8a5bdf41
LB		 107unsigned int crystal_hz;
108unsigned long long tsc_hz;
7ce7d5de 109int base_cpu;
21ed5574 110double discover_bclk(unsigned int family, unsigned int model);
7f5c258e
LB		 111unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
112 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
113unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
114unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
115unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
116unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
889facbe 117
e6f9bb3c
LB		 118#define RAPL_PKG (1 << 0)
119 /* 0x610 MSR_PKG_POWER_LIMIT */
120 /* 0x611 MSR_PKG_ENERGY_STATUS */
121#define RAPL_PKG_PERF_STATUS (1 << 1)
122 /* 0x613 MSR_PKG_PERF_STATUS */
123#define RAPL_PKG_POWER_INFO (1 << 2)
124 /* 0x614 MSR_PKG_POWER_INFO */
125
126#define RAPL_DRAM (1 << 3)
127 /* 0x618 MSR_DRAM_POWER_LIMIT */
128 /* 0x619 MSR_DRAM_ENERGY_STATUS */
e6f9bb3c
LB		 129#define RAPL_DRAM_PERF_STATUS (1 << 4)
130 /* 0x61b MSR_DRAM_PERF_STATUS */
0b2bb692
LB		 131#define RAPL_DRAM_POWER_INFO (1 << 5)
132 /* 0x61c MSR_DRAM_POWER_INFO */
e6f9bb3c 133
0b2bb692 134#define RAPL_CORES (1 << 6)
e6f9bb3c
LB		 135 /* 0x638 MSR_PP0_POWER_LIMIT */
136 /* 0x639 MSR_PP0_ENERGY_STATUS */
0b2bb692 137#define RAPL_CORE_POLICY (1 << 7)
e6f9bb3c
LB		 138 /* 0x63a MSR_PP0_POLICY */
139
0b2bb692 140#define RAPL_GFX (1 << 8)
e6f9bb3c
LB		 141 /* 0x640 MSR_PP1_POWER_LIMIT */
142 /* 0x641 MSR_PP1_ENERGY_STATUS */
143 /* 0x642 MSR_PP1_POLICY */
889facbe
LB		 144#define TJMAX_DEFAULT 100
145
146#define MAX(a, b) ((a) > (b) ? (a) : (b))
103a8fea
LB		 147
148int aperf_mperf_unstable;
149int backwards_count;
150char *progname;
103a8fea 151
c98d5d94
LB		 152cpu_set_t *cpu_present_set, *cpu_affinity_set;
153size_t cpu_present_setsize, cpu_affinity_setsize;
154
155struct thread_data {
156 unsigned long long tsc;
157 unsigned long long aperf;
158 unsigned long long mperf;
144b44b1 159 unsigned long long c1;
2f32edf1 160 unsigned long long extra_msr64;
8e180f3c
LB		 161 unsigned long long extra_delta64;
162 unsigned long long extra_msr32;
163 unsigned long long extra_delta32;
562a2d37 164 unsigned int irq_count;
1ed51011 165 unsigned int smi_count;
c98d5d94
LB		 166 unsigned int cpu_id;
167 unsigned int flags;
168#define CPU_IS_FIRST_THREAD_IN_CORE 0x2
169#define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
170} *thread_even, *thread_odd;
171
172struct core_data {
173 unsigned long long c3;
174 unsigned long long c6;
175 unsigned long long c7;
889facbe 176 unsigned int core_temp_c;
c98d5d94
LB		 177 unsigned int core_id;
178} *core_even, *core_odd;
179
180struct pkg_data {
181 unsigned long long pc2;
182 unsigned long long pc3;
183 unsigned long long pc6;
184 unsigned long long pc7;
ca58710f
KCA		 185 unsigned long long pc8;
186 unsigned long long pc9;
187 unsigned long long pc10;
0b2bb692
LB		 188 unsigned long long pkg_wtd_core_c0;
189 unsigned long long pkg_any_core_c0;
190 unsigned long long pkg_any_gfxe_c0;
191 unsigned long long pkg_both_core_gfxe_c0;
fdf676e5 192 unsigned long long gfx_rc6_ms;
27d47356 193 unsigned int gfx_mhz;
c98d5d94 194 unsigned int package_id;
889facbe
LB		 195 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
196 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
197 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
198 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
199 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
200 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
201 unsigned int pkg_temp_c;
202
c98d5d94
LB		 203} *package_even, *package_odd;
204
205#define ODD_COUNTERS thread_odd, core_odd, package_odd
206#define EVEN_COUNTERS thread_even, core_even, package_even
207
208#define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
209 (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
210 topo.num_threads_per_core + \
211 (core_no) * topo.num_threads_per_core + (thread_no))
212#define GET_CORE(core_base, core_no, pkg_no) \
213 (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
214#define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
215
216struct system_summary {
217 struct thread_data threads;
218 struct core_data cores;
219 struct pkg_data packages;
220} sum, average;
221
222
223struct topo_params {
224 int num_packages;
225 int num_cpus;
226 int num_cores;
227 int max_cpu_num;
228 int num_cores_per_pkg;
229 int num_threads_per_core;
230} topo;
231
232struct timeval tv_even, tv_odd, tv_delta;
233
562a2d37
LB		 234int *irq_column_2_cpu; /* /proc/interrupts column numbers */
235int *irqs_per_cpu; /* indexed by cpu_num */
236
c98d5d94
LB		 237void setup_all_buffers(void);
238
239int cpu_is_not_present(int cpu)
d15cf7c1 240{
c98d5d94 241 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
d15cf7c1 242}
88c3281f 243/*
c98d5d94
LB		 244 * run func(thread, core, package) in topology order
245 * skip non-present cpus
88c3281f 246 */
c98d5d94
LB		 247
248int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
249 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
88c3281f 250{
c98d5d94 251 int retval, pkg_no, core_no, thread_no;
d15cf7c1 252
c98d5d94
LB		 253 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
254 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
255 for (thread_no = 0; thread_no <
256 topo.num_threads_per_core; ++thread_no) {
257 struct thread_data *t;
258 struct core_data *c;
259 struct pkg_data *p;
88c3281f 260
c98d5d94
LB		 261 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
262
263 if (cpu_is_not_present(t->cpu_id))
264 continue;
265
266 c = GET_CORE(core_base, core_no, pkg_no);
267 p = GET_PKG(pkg_base, pkg_no);
268
269 retval = func(t, c, p);
270 if (retval)
271 return retval;
272 }
273 }
274 }
275 return 0;
88c3281f
LB		 276}
277
278int cpu_migrate(int cpu)
279{
c98d5d94
LB		 280 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
281 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
282 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
88c3281f
LB		 283 return -1;
284 else
285 return 0;
286}
36229897 287int get_msr_fd(int cpu)
103a8fea 288{
103a8fea
LB		 289 char pathname[32];
290 int fd;
291
36229897
LB		 292 fd = fd_percpu[cpu];
293
294 if (fd)
295 return fd;
296
103a8fea
LB		 297 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
298 fd = open(pathname, O_RDONLY);
15aaa346 299 if (fd < 0)
98481e79 300 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
103a8fea 301
36229897
LB		 302 fd_percpu[cpu] = fd;
303
304 return fd;
305}
306
307int get_msr(int cpu, off_t offset, unsigned long long *msr)
308{
309 ssize_t retval;
310
311 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
15aaa346 312
98481e79 313 if (retval != sizeof *msr)
36229897 314 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
15aaa346
LB		 315
316 return 0;
103a8fea
LB		 317}
318
fc04cc67
LB		 319/*
320 * Example Format w/ field column widths:
321 *
27d47356 322 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
562a2d37 323 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
fc04cc67
LB		 324 */
325
a829eb4d 326void print_header(void)
103a8fea
LB		 327{
328 if (show_pkg)
e7c95ff3 329 outp += sprintf(outp, " Package");
103a8fea 330 if (show_core)
e7c95ff3 331 outp += sprintf(outp, " Core");
103a8fea 332 if (show_cpu)
e7c95ff3 333 outp += sprintf(outp, " CPU");
fc04cc67 334 if (has_aperf)
e7c95ff3 335 outp += sprintf(outp, " Avg_MHz");
d7899447 336 if (has_aperf)
75d2e44e 337 outp += sprintf(outp, " Busy%%");
103a8fea 338 if (has_aperf)
e7c95ff3
LB		 339 outp += sprintf(outp, " Bzy_MHz");
340 outp += sprintf(outp, " TSC_MHz");
1cc21f7b 341
8e180f3c 342 if (extra_delta_offset32)
e7c95ff3 343 outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
8e180f3c 344 if (extra_delta_offset64)
e7c95ff3 345 outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
2f32edf1 346 if (extra_msr_offset32)
e7c95ff3 347 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
2f32edf1 348 if (extra_msr_offset64)
e7c95ff3 349 outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
1cc21f7b
LB		 350
351 if (!debug)
352 goto done;
353
562a2d37
LB		 354 if (do_irq)
355 outp += sprintf(outp, " IRQ");
1cc21f7b
LB		 356 if (do_smi)
357 outp += sprintf(outp, " SMI");
358
103a8fea 359 if (do_nhm_cstates)
e7c95ff3 360 outp += sprintf(outp, " CPU%%c1");
fb5d4327 361 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
e7c95ff3 362 outp += sprintf(outp, " CPU%%c3");
103a8fea 363 if (do_nhm_cstates)
e7c95ff3 364 outp += sprintf(outp, " CPU%%c6");
103a8fea 365 if (do_snb_cstates)
e7c95ff3 366 outp += sprintf(outp, " CPU%%c7");
889facbe
LB		 367
368 if (do_dts)
e7c95ff3 369 outp += sprintf(outp, " CoreTmp");
889facbe 370 if (do_ptm)
e7c95ff3 371 outp += sprintf(outp, " PkgTmp");
889facbe 372
fdf676e5
LB		 373 if (do_gfx_rc6_ms)
374 outp += sprintf(outp, " GFX%%rc6");
375
27d47356
LB		 376 if (do_gfx_mhz)
377 outp += sprintf(outp, " GFXMHz");
378
0b2bb692
LB		 379 if (do_skl_residency) {
380 outp += sprintf(outp, " Totl%%C0");
381 outp += sprintf(outp, " Any%%C0");
382 outp += sprintf(outp, " GFX%%C0");
383 outp += sprintf(outp, " CPUGFX%%");
384 }
385
ee7e38e3 386 if (do_pc2)
e7c95ff3 387 outp += sprintf(outp, " Pkg%%pc2");
ee7e38e3 388 if (do_pc3)
e7c95ff3 389 outp += sprintf(outp, " Pkg%%pc3");
ee7e38e3 390 if (do_pc6)
e7c95ff3 391 outp += sprintf(outp, " Pkg%%pc6");
ee7e38e3 392 if (do_pc7)
e7c95ff3 393 outp += sprintf(outp, " Pkg%%pc7");
ca58710f 394 if (do_c8_c9_c10) {
e7c95ff3
LB		 395 outp += sprintf(outp, " Pkg%%pc8");
396 outp += sprintf(outp, " Pkg%%pc9");
397 outp += sprintf(outp, " Pk%%pc10");
ca58710f 398 }
103a8fea 399
5c56be9a
DB		 400 if (do_rapl && !rapl_joules) {
401 if (do_rapl & RAPL_PKG)
e7c95ff3 402 outp += sprintf(outp, " PkgWatt");
5c56be9a 403 if (do_rapl & RAPL_CORES)
e7c95ff3 404 outp += sprintf(outp, " CorWatt");
5c56be9a 405 if (do_rapl & RAPL_GFX)
e7c95ff3 406 outp += sprintf(outp, " GFXWatt");
5c56be9a 407 if (do_rapl & RAPL_DRAM)
e7c95ff3 408 outp += sprintf(outp, " RAMWatt");
5c56be9a 409 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 410 outp += sprintf(outp, " PKG_%%");
5c56be9a 411 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3 412 outp += sprintf(outp, " RAM_%%");
d7899447 413 } else if (do_rapl && rapl_joules) {
5c56be9a 414 if (do_rapl & RAPL_PKG)
e7c95ff3 415 outp += sprintf(outp, " Pkg_J");
5c56be9a 416 if (do_rapl & RAPL_CORES)
e7c95ff3 417 outp += sprintf(outp, " Cor_J");
5c56be9a 418 if (do_rapl & RAPL_GFX)
e7c95ff3 419 outp += sprintf(outp, " GFX_J");
5c56be9a 420 if (do_rapl & RAPL_DRAM)
bd6906ed 421 outp += sprintf(outp, " RAM_J");
5c56be9a 422 if (do_rapl & RAPL_PKG_PERF_STATUS)
e7c95ff3 423 outp += sprintf(outp, " PKG_%%");
5c56be9a 424 if (do_rapl & RAPL_DRAM_PERF_STATUS)
e7c95ff3
LB		 425 outp += sprintf(outp, " RAM_%%");
426 outp += sprintf(outp, " time");
889facbe 427
5c56be9a 428 }
1cc21f7b 429 done:
c98d5d94 430 outp += sprintf(outp, "\n");
103a8fea
LB		 431}
432
c98d5d94
LB		 433int dump_counters(struct thread_data *t, struct core_data *c,
434 struct pkg_data *p)
103a8fea 435{
3b4d5c7f 436 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
c98d5d94
LB		 437
438 if (t) {
3b4d5c7f
AS		 439 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
440 t->cpu_id, t->flags);
441 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
442 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
443 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
444 outp += sprintf(outp, "c1: %016llX\n", t->c1);
445 outp += sprintf(outp, "msr0x%x: %08llX\n",
8e180f3c 446 extra_delta_offset32, t->extra_delta32);
3b4d5c7f 447 outp += sprintf(outp, "msr0x%x: %016llX\n",
8e180f3c 448 extra_delta_offset64, t->extra_delta64);
3b4d5c7f 449 outp += sprintf(outp, "msr0x%x: %08llX\n",
2f32edf1 450 extra_msr_offset32, t->extra_msr32);
3b4d5c7f 451 outp += sprintf(outp, "msr0x%x: %016llX\n",
2f32edf1 452 extra_msr_offset64, t->extra_msr64);
562a2d37
LB		 453 if (do_irq)
454 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
1ed51011 455 if (do_smi)
3b4d5c7f 456 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
c98d5d94 457 }
103a8fea 458
c98d5d94 459 if (c) {
3b4d5c7f
AS		 460 outp += sprintf(outp, "core: %d\n", c->core_id);
461 outp += sprintf(outp, "c3: %016llX\n", c->c3);
462 outp += sprintf(outp, "c6: %016llX\n", c->c6);
463 outp += sprintf(outp, "c7: %016llX\n", c->c7);
464 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
c98d5d94 465 }
103a8fea 466
c98d5d94 467 if (p) {
3b4d5c7f 468 outp += sprintf(outp, "package: %d\n", p->package_id);
0b2bb692
LB		 469
470 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
471 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
472 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
473 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
474
3b4d5c7f 475 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
ee7e38e3
LB		 476 if (do_pc3)
477 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
478 if (do_pc6)
479 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
480 if (do_pc7)
481 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
3b4d5c7f
AS		 482 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
483 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
484 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
485 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
486 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
487 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
488 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
489 outp += sprintf(outp, "Throttle PKG: %0X\n",
490 p->rapl_pkg_perf_status);
491 outp += sprintf(outp, "Throttle RAM: %0X\n",
492 p->rapl_dram_perf_status);
493 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
c98d5d94 494 }
3b4d5c7f
AS		 495
496 outp += sprintf(outp, "\n");
497
c98d5d94 498 return 0;
103a8fea
LB		 499}
500
e23da037
LB		 501/*
502 * column formatting convention & formats
e23da037 503 */
c98d5d94
LB		 504int format_counters(struct thread_data *t, struct core_data *c,
505 struct pkg_data *p)
103a8fea
LB		 506{
507 double interval_float;
fc04cc67 508 char *fmt8;
103a8fea 509
c98d5d94
LB		 510 /* if showing only 1st thread in core and this isn't one, bail out */
511 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
512 return 0;
513
514 /* if showing only 1st thread in pkg and this isn't one, bail out */
515 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
516 return 0;
517
103a8fea
LB		 518 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
519
c98d5d94
LB		 520 /* topo columns, print blanks on 1st (average) line */
521 if (t == &average.threads) {
103a8fea 522 if (show_pkg)
fc04cc67 523 outp += sprintf(outp, " -");
103a8fea 524 if (show_core)
fc04cc67 525 outp += sprintf(outp, " -");
103a8fea 526 if (show_cpu)
fc04cc67 527 outp += sprintf(outp, " -");
103a8fea 528 } else {
c98d5d94
LB		 529 if (show_pkg) {
530 if (p)
fc04cc67 531 outp += sprintf(outp, "%8d", p->package_id);
c98d5d94 532 else
fc04cc67 533 outp += sprintf(outp, " -");
c98d5d94 534 }
c98d5d94
LB		 535 if (show_core) {
536 if (c)
fc04cc67 537 outp += sprintf(outp, "%8d", c->core_id);
c98d5d94 538 else
fc04cc67 539 outp += sprintf(outp, " -");
c98d5d94 540 }
103a8fea 541 if (show_cpu)
fc04cc67 542 outp += sprintf(outp, "%8d", t->cpu_id);
103a8fea 543 }
fc04cc67 544
d7899447 545 /* Avg_MHz */
fc04cc67
LB		 546 if (has_aperf)
547 outp += sprintf(outp, "%8.0f",
548 1.0 / units * t->aperf / interval_float);
549
75d2e44e 550 /* Busy% */
d7899447 551 if (has_aperf) {
103a8fea 552 if (!skip_c0)
a2b7b749 553 outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
103a8fea 554 else
fc04cc67 555 outp += sprintf(outp, "********");
103a8fea
LB		 556 }
557
d7899447 558 /* Bzy_MHz */
21ed5574
LB		 559 if (has_aperf) {
560 if (has_base_hz)
561 outp += sprintf(outp, "%8.0f", base_hz / units * t->aperf / t->mperf);
562 else
563 outp += sprintf(outp, "%8.0f",
564 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
565 }
103a8fea 566
d7899447 567 /* TSC_MHz */
fc04cc67 568 outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
103a8fea 569
8e180f3c
LB		 570 /* delta */
571 if (extra_delta_offset32)
572 outp += sprintf(outp, " %11llu", t->extra_delta32);
573
574 /* DELTA */
575 if (extra_delta_offset64)
576 outp += sprintf(outp, " %11llu", t->extra_delta64);
2f32edf1
LB		 577 /* msr */
578 if (extra_msr_offset32)
8e180f3c 579 outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
2f32edf1 580
130ff304 581 /* MSR */
2f32edf1
LB		 582 if (extra_msr_offset64)
583 outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
130ff304 584
1cc21f7b
LB		 585 if (!debug)
586 goto done;
587
562a2d37
LB		 588 /* IRQ */
589 if (do_irq)
590 outp += sprintf(outp, "%8d", t->irq_count);
591
1cc21f7b
LB		 592 /* SMI */
593 if (do_smi)
594 outp += sprintf(outp, "%8d", t->smi_count);
595
103a8fea
LB		 596 if (do_nhm_cstates) {
597 if (!skip_c1)
fc04cc67 598 outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
103a8fea 599 else
fc04cc67 600 outp += sprintf(outp, "********");
103a8fea 601 }
c98d5d94
LB		 602
603 /* print per-core data only for 1st thread in core */
604 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
605 goto done;
606
fb5d4327 607 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
fc04cc67 608 outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
103a8fea 609 if (do_nhm_cstates)
fc04cc67 610 outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
103a8fea 611 if (do_snb_cstates)
fc04cc67 612 outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
c98d5d94 613
889facbe 614 if (do_dts)
fc04cc67 615 outp += sprintf(outp, "%8d", c->core_temp_c);
889facbe 616
c98d5d94
LB		 617 /* print per-package data only for 1st core in package */
618 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
619 goto done;
620
0b2bb692 621 /* PkgTmp */
889facbe 622 if (do_ptm)
fc04cc67 623 outp += sprintf(outp, "%8d", p->pkg_temp_c);
889facbe 624
fdf676e5
LB		 625 /* GFXrc6 */
626 if (do_gfx_rc6_ms)
627 outp += sprintf(outp, "%8.2f", 100.0 * p->gfx_rc6_ms / 1000.0 / interval_float);
628
27d47356
LB		 629 /* GFXMHz */
630 if (do_gfx_mhz)
631 outp += sprintf(outp, "%8d", p->gfx_mhz);
632
0b2bb692
LB		 633 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
634 if (do_skl_residency) {
635 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
636 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
637 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
638 outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
639 }
640
ee7e38e3 641 if (do_pc2)
fc04cc67 642 outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
ee7e38e3 643 if (do_pc3)
fc04cc67 644 outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
ee7e38e3 645 if (do_pc6)
fc04cc67 646 outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
ee7e38e3 647 if (do_pc7)
fc04cc67 648 outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
ca58710f 649 if (do_c8_c9_c10) {
fc04cc67
LB		 650 outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
651 outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
652 outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
ca58710f 653 }
889facbe
LB		 654
655 /*
656 * If measurement interval exceeds minimum RAPL Joule Counter range,
657 * indicate that results are suspect by printing "**" in fraction place.
658 */
fc04cc67
LB		 659 if (interval_float < rapl_joule_counter_range)
660 fmt8 = "%8.2f";
661 else
662 fmt8 = " %6.0f**";
889facbe 663
5c56be9a
DB		 664 if (do_rapl && !rapl_joules) {
665 if (do_rapl & RAPL_PKG)
fc04cc67 666 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
5c56be9a 667 if (do_rapl & RAPL_CORES)
fc04cc67 668 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
5c56be9a 669 if (do_rapl & RAPL_GFX)
fc04cc67 670 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
5c56be9a 671 if (do_rapl & RAPL_DRAM)
40ee8e3b 672 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
5c56be9a 673 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 674 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 675 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 676 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
d7899447 677 } else if (do_rapl && rapl_joules) {
5c56be9a 678 if (do_rapl & RAPL_PKG)
fc04cc67 679 outp += sprintf(outp, fmt8,
5c56be9a
DB		 680 p->energy_pkg * rapl_energy_units);
681 if (do_rapl & RAPL_CORES)
fc04cc67 682 outp += sprintf(outp, fmt8,
5c56be9a
DB		 683 p->energy_cores * rapl_energy_units);
684 if (do_rapl & RAPL_GFX)
fc04cc67 685 outp += sprintf(outp, fmt8,
5c56be9a
DB		 686 p->energy_gfx * rapl_energy_units);
687 if (do_rapl & RAPL_DRAM)
fc04cc67 688 outp += sprintf(outp, fmt8,
40ee8e3b 689 p->energy_dram * rapl_dram_energy_units);
5c56be9a 690 if (do_rapl & RAPL_PKG_PERF_STATUS)
fc04cc67 691 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
5c56be9a 692 if (do_rapl & RAPL_DRAM_PERF_STATUS)
fc04cc67 693 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
889facbe 694
d7899447 695 outp += sprintf(outp, fmt8, interval_float);
5c56be9a 696 }
c98d5d94 697done:
c98d5d94
LB		 698 outp += sprintf(outp, "\n");
699
700 return 0;
103a8fea
LB		 701}
702
b7d8c148 703void flush_output_stdout(void)
c98d5d94 704{
b7d8c148
LB		 705 FILE *filep;
706
707 if (outf == stderr)
708 filep = stdout;
709 else
710 filep = outf;
711
712 fputs(output_buffer, filep);
713 fflush(filep);
714
c98d5d94
LB		 715 outp = output_buffer;
716}
b7d8c148 717void flush_output_stderr(void)
c98d5d94 718{
b7d8c148
LB		 719 fputs(output_buffer, outf);
720 fflush(outf);
c98d5d94
LB		 721 outp = output_buffer;
722}
723void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
103a8fea 724{
e23da037 725 static int printed;
103a8fea 726
e23da037
LB		 727 if (!printed || !summary_only)
728 print_header();
103a8fea 729
c98d5d94
LB		 730 if (topo.num_cpus > 1)
731 format_counters(&average.threads, &average.cores,
732 &average.packages);
103a8fea 733
e23da037
LB		 734 printed = 1;
735
736 if (summary_only)
737 return;
738
c98d5d94 739 for_all_cpus(format_counters, t, c, p);
103a8fea
LB		 740}
741
889facbe
LB		 742#define DELTA_WRAP32(new, old) \
743 if (new > old) { \
744 old = new - old; \
745 } else { \
746 old = 0x100000000 + new - old; \
747 }
748
c98d5d94
LB		 749void
750delta_package(struct pkg_data *new, struct pkg_data *old)
751{
0b2bb692
LB		 752
753 if (do_skl_residency) {
754 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
755 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
756 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
757 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
758 }
c98d5d94 759 old->pc2 = new->pc2 - old->pc2;
ee7e38e3
LB		 760 if (do_pc3)
761 old->pc3 = new->pc3 - old->pc3;
762 if (do_pc6)
763 old->pc6 = new->pc6 - old->pc6;
764 if (do_pc7)
765 old->pc7 = new->pc7 - old->pc7;
ca58710f
KCA		 766 old->pc8 = new->pc8 - old->pc8;
767 old->pc9 = new->pc9 - old->pc9;
768 old->pc10 = new->pc10 - old->pc10;
889facbe
LB		 769 old->pkg_temp_c = new->pkg_temp_c;
770
fdf676e5 771 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
27d47356
LB		 772 old->gfx_mhz = new->gfx_mhz;
773
889facbe
LB		 774 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
775 DELTA_WRAP32(new->energy_cores, old->energy_cores);
776 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
777 DELTA_WRAP32(new->energy_dram, old->energy_dram);
778 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
779 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
c98d5d94 780}
103a8fea 781
c98d5d94
LB		 782void
783delta_core(struct core_data *new, struct core_data *old)
103a8fea 784{
c98d5d94
LB		 785 old->c3 = new->c3 - old->c3;
786 old->c6 = new->c6 - old->c6;
787 old->c7 = new->c7 - old->c7;
889facbe 788 old->core_temp_c = new->core_temp_c;
c98d5d94 789}
103a8fea 790
c3ae331d
LB		 791/*
792 * old = new - old
793 */
c98d5d94
LB		 794void
795delta_thread(struct thread_data *new, struct thread_data *old,
796 struct core_data *core_delta)
797{
798 old->tsc = new->tsc - old->tsc;
799
800 /* check for TSC < 1 Mcycles over interval */
b2c95d90
JT		 801 if (old->tsc < (1000 * 1000))
802 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
803 "You can disable all c-states by booting with \"idle=poll\"\n"
804 "or just the deep ones with \"processor.max_cstate=1\"");
103a8fea 805
c98d5d94 806 old->c1 = new->c1 - old->c1;
103a8fea 807
a729617c
LB		 808 if (has_aperf) {
809 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
810 old->aperf = new->aperf - old->aperf;
811 old->mperf = new->mperf - old->mperf;
812 } else {
103a8fea 813
a729617c 814 if (!aperf_mperf_unstable) {
b7d8c148
LB		 815 fprintf(outf, "%s: APERF or MPERF went backwards *\n", progname);
816 fprintf(outf, "* Frequency results do not cover entire interval *\n");
817 fprintf(outf, "* fix this by running Linux-2.6.30 or later *\n");
103a8fea 818
a729617c
LB		 819 aperf_mperf_unstable = 1;
820 }
821 /*
822 * mperf delta is likely a huge "positive" number
823 * can not use it for calculating c0 time
824 */
825 skip_c0 = 1;
826 skip_c1 = 1;
103a8fea 827 }
c98d5d94 828 }
103a8fea 829
103a8fea 830
144b44b1
LB		 831 if (use_c1_residency_msr) {
832 /*
833 * Some models have a dedicated C1 residency MSR,
834 * which should be more accurate than the derivation below.
835 */
836 } else {
837 /*
838 * As counter collection is not atomic,
839 * it is possible for mperf's non-halted cycles + idle states
840 * to exceed TSC's all cycles: show c1 = 0% in that case.
841 */
842 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
843 old->c1 = 0;
844 else {
845 /* normal case, derive c1 */
846 old->c1 = old->tsc - old->mperf - core_delta->c3
c98d5d94 847 - core_delta->c6 - core_delta->c7;
144b44b1 848 }
c98d5d94 849 }
c3ae331d 850
c98d5d94 851 if (old->mperf == 0) {
b7d8c148
LB		 852 if (debug > 1)
853 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
c98d5d94 854 old->mperf = 1; /* divide by 0 protection */
103a8fea 855 }
c98d5d94 856
8e180f3c
LB		 857 old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
858 old->extra_delta32 &= 0xFFFFFFFF;
859
860 old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
861
c98d5d94 862 /*
8e180f3c 863 * Extra MSR is just a snapshot, simply copy latest w/o subtracting
c98d5d94 864 */
2f32edf1
LB		 865 old->extra_msr32 = new->extra_msr32;
866 old->extra_msr64 = new->extra_msr64;
1ed51011 867
562a2d37
LB		 868 if (do_irq)
869 old->irq_count = new->irq_count - old->irq_count;
870
1ed51011
LB		 871 if (do_smi)
872 old->smi_count = new->smi_count - old->smi_count;
c98d5d94
LB		 873}
874
875int delta_cpu(struct thread_data *t, struct core_data *c,
876 struct pkg_data *p, struct thread_data *t2,
877 struct core_data *c2, struct pkg_data *p2)
878{
879 /* calculate core delta only for 1st thread in core */
880 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
881 delta_core(c, c2);
882
883 /* always calculate thread delta */
884 delta_thread(t, t2, c2); /* c2 is core delta */
885
886 /* calculate package delta only for 1st core in package */
887 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
888 delta_package(p, p2);
889
103a8fea
LB		 890 return 0;
891}
892
c98d5d94
LB		 893void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
894{
895 t->tsc = 0;
896 t->aperf = 0;
897 t->mperf = 0;
898 t->c1 = 0;
899
8e180f3c
LB		 900 t->extra_delta32 = 0;
901 t->extra_delta64 = 0;
902
562a2d37
LB		 903 t->irq_count = 0;
904 t->smi_count = 0;
905
c98d5d94
LB		 906 /* tells format_counters to dump all fields from this set */
907 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
908
909 c->c3 = 0;
910 c->c6 = 0;
911 c->c7 = 0;
889facbe 912 c->core_temp_c = 0;
c98d5d94 913
0b2bb692
LB		 914 p->pkg_wtd_core_c0 = 0;
915 p->pkg_any_core_c0 = 0;
916 p->pkg_any_gfxe_c0 = 0;
917 p->pkg_both_core_gfxe_c0 = 0;
918
c98d5d94 919 p->pc2 = 0;
ee7e38e3
LB		 920 if (do_pc3)
921 p->pc3 = 0;
922 if (do_pc6)
923 p->pc6 = 0;
924 if (do_pc7)
925 p->pc7 = 0;
ca58710f
KCA		 926 p->pc8 = 0;
927 p->pc9 = 0;
928 p->pc10 = 0;
889facbe
LB		 929
930 p->energy_pkg = 0;
931 p->energy_dram = 0;
932 p->energy_cores = 0;
933 p->energy_gfx = 0;
934 p->rapl_pkg_perf_status = 0;
935 p->rapl_dram_perf_status = 0;
936 p->pkg_temp_c = 0;
27d47356 937
fdf676e5 938 p->gfx_rc6_ms = 0;
27d47356 939 p->gfx_mhz = 0;
c98d5d94
LB		 940}
941int sum_counters(struct thread_data *t, struct core_data *c,
942 struct pkg_data *p)
103a8fea 943{
c98d5d94
LB		 944 average.threads.tsc += t->tsc;
945 average.threads.aperf += t->aperf;
946 average.threads.mperf += t->mperf;
947 average.threads.c1 += t->c1;
103a8fea 948
8e180f3c
LB		 949 average.threads.extra_delta32 += t->extra_delta32;
950 average.threads.extra_delta64 += t->extra_delta64;
951
562a2d37
LB		 952 average.threads.irq_count += t->irq_count;
953 average.threads.smi_count += t->smi_count;
954
c98d5d94
LB		 955 /* sum per-core values only for 1st thread in core */
956 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
957 return 0;
103a8fea 958
c98d5d94
LB		 959 average.cores.c3 += c->c3;
960 average.cores.c6 += c->c6;
961 average.cores.c7 += c->c7;
962
889facbe
LB		 963 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
964
c98d5d94
LB		 965 /* sum per-pkg values only for 1st core in pkg */
966 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
967 return 0;
968
0b2bb692
LB		 969 if (do_skl_residency) {
970 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
971 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
972 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
973 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
974 }
975
c98d5d94 976 average.packages.pc2 += p->pc2;
ee7e38e3
LB		 977 if (do_pc3)
978 average.packages.pc3 += p->pc3;
979 if (do_pc6)
980 average.packages.pc6 += p->pc6;
981 if (do_pc7)
982 average.packages.pc7 += p->pc7;
ca58710f
KCA		 983 average.packages.pc8 += p->pc8;
984 average.packages.pc9 += p->pc9;
985 average.packages.pc10 += p->pc10;
c98d5d94 986
889facbe
LB		 987 average.packages.energy_pkg += p->energy_pkg;
988 average.packages.energy_dram += p->energy_dram;
989 average.packages.energy_cores += p->energy_cores;
990 average.packages.energy_gfx += p->energy_gfx;
991
fdf676e5 992 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
27d47356
LB		 993 average.packages.gfx_mhz = p->gfx_mhz;
994
889facbe
LB		 995 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
996
997 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
998 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
c98d5d94
LB		 999 return 0;
1000}
1001/*
1002 * sum the counters for all cpus in the system
1003 * compute the weighted average
1004 */
1005void compute_average(struct thread_data *t, struct core_data *c,
1006 struct pkg_data *p)
1007{
1008 clear_counters(&average.threads, &average.cores, &average.packages);
1009
1010 for_all_cpus(sum_counters, t, c, p);
1011
1012 average.threads.tsc /= topo.num_cpus;
1013 average.threads.aperf /= topo.num_cpus;
1014 average.threads.mperf /= topo.num_cpus;
1015 average.threads.c1 /= topo.num_cpus;
1016
8e180f3c
LB		 1017 average.threads.extra_delta32 /= topo.num_cpus;
1018 average.threads.extra_delta32 &= 0xFFFFFFFF;
1019
1020 average.threads.extra_delta64 /= topo.num_cpus;
1021
c98d5d94
LB		 1022 average.cores.c3 /= topo.num_cores;
1023 average.cores.c6 /= topo.num_cores;
1024 average.cores.c7 /= topo.num_cores;
1025
0b2bb692
LB		 1026 if (do_skl_residency) {
1027 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1028 average.packages.pkg_any_core_c0 /= topo.num_packages;
1029 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1030 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1031 }
1032
c98d5d94 1033 average.packages.pc2 /= topo.num_packages;
ee7e38e3
LB		 1034 if (do_pc3)
1035 average.packages.pc3 /= topo.num_packages;
1036 if (do_pc6)
1037 average.packages.pc6 /= topo.num_packages;
1038 if (do_pc7)
1039 average.packages.pc7 /= topo.num_packages;
ca58710f
KCA		 1040
1041 average.packages.pc8 /= topo.num_packages;
1042 average.packages.pc9 /= topo.num_packages;
1043 average.packages.pc10 /= topo.num_packages;
103a8fea
LB		 1044}
1045
c98d5d94 1046static unsigned long long rdtsc(void)
103a8fea 1047{
c98d5d94 1048 unsigned int low, high;
15aaa346 1049
c98d5d94 1050 asm volatile("rdtsc" : "=a" (low), "=d" (high));
15aaa346 1051
c98d5d94
LB		 1052 return low | ((unsigned long long)high) << 32;
1053}
15aaa346 1054
c98d5d94
LB		 1055/*
1056 * get_counters(...)
1057 * migrate to cpu
1058 * acquire and record local counters for that cpu
1059 */
1060int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1061{
1062 int cpu = t->cpu_id;
889facbe 1063 unsigned long long msr;
0102b067 1064 int aperf_mperf_retry_count = 0;
88c3281f 1065
e52966c0 1066 if (cpu_migrate(cpu)) {
b7d8c148 1067 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
c98d5d94 1068 return -1;
e52966c0 1069 }
15aaa346 1070
0102b067 1071retry:
c98d5d94
LB		 1072 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1073
1074 if (has_aperf) {
0102b067
LB		 1075 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1076
1077 /*
1078 * The TSC, APERF and MPERF must be read together for
1079 * APERF/MPERF and MPERF/TSC to give accurate results.
1080 *
1081 * Unfortunately, APERF and MPERF are read by
1082 * individual system call, so delays may occur
1083 * between them. If the time to read them
1084 * varies by a large amount, we re-read them.
1085 */
1086
1087 /*
1088 * This initial dummy APERF read has been seen to
1089 * reduce jitter in the subsequent reads.
1090 */
1091
1092 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1093 return -3;
1094
1095 t->tsc = rdtsc(); /* re-read close to APERF */
1096
1097 tsc_before = t->tsc;
1098
9c63a650 1099 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
c98d5d94 1100 return -3;
0102b067
LB		 1101
1102 tsc_between = rdtsc();
1103
9c63a650 1104 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
c98d5d94 1105 return -4;
0102b067
LB		 1106
1107 tsc_after = rdtsc();
1108
1109 aperf_time = tsc_between - tsc_before;
1110 mperf_time = tsc_after - tsc_between;
1111
1112 /*
1113 * If the system call latency to read APERF and MPERF
1114 * differ by more than 2x, then try again.
1115 */
1116 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1117 aperf_mperf_retry_count++;
1118 if (aperf_mperf_retry_count < 5)
1119 goto retry;
1120 else
1121 warnx("cpu%d jitter %lld %lld",
1122 cpu, aperf_time, mperf_time);
1123 }
1124 aperf_mperf_retry_count = 0;
1125
b2b34dfe
HC		 1126 t->aperf = t->aperf * aperf_mperf_multiplier;
1127 t->mperf = t->mperf * aperf_mperf_multiplier;
c98d5d94
LB		 1128 }
1129
562a2d37
LB		 1130 if (do_irq)
1131 t->irq_count = irqs_per_cpu[cpu];
1ed51011
LB		 1132 if (do_smi) {
1133 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1134 return -5;
1135 t->smi_count = msr & 0xFFFFFFFF;
1136 }
8e180f3c 1137 if (extra_delta_offset32) {
889facbe 1138 if (get_msr(cpu, extra_delta_offset32, &msr))
8e180f3c 1139 return -5;
889facbe 1140 t->extra_delta32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1141 }
1142
1143 if (extra_delta_offset64)
1144 if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
2f32edf1
LB		 1145 return -5;
1146
8e180f3c 1147 if (extra_msr_offset32) {
889facbe 1148 if (get_msr(cpu, extra_msr_offset32, &msr))
8e180f3c 1149 return -5;
889facbe 1150 t->extra_msr32 = msr & 0xFFFFFFFF;
8e180f3c
LB		 1151 }
1152
2f32edf1
LB		 1153 if (extra_msr_offset64)
1154 if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
c98d5d94
LB		 1155 return -5;
1156
144b44b1
LB		 1157 if (use_c1_residency_msr) {
1158 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1159 return -6;
1160 }
1161
c98d5d94
LB		 1162 /* collect core counters only for 1st thread in core */
1163 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1164 return 0;
1165
fb5d4327 1166 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1167 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1168 return -6;
144b44b1
LB		 1169 }
1170
fb5d4327 1171 if (do_nhm_cstates && !do_knl_cstates) {
c98d5d94
LB		 1172 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1173 return -7;
fb5d4327
DC		 1174 } else if (do_knl_cstates) {
1175 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1176 return -7;
c98d5d94
LB		 1177 }
1178
1179 if (do_snb_cstates)
1180 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1181 return -8;
1182
889facbe
LB		 1183 if (do_dts) {
1184 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1185 return -9;
1186 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1187 }
1188
1189
c98d5d94
LB		 1190 /* collect package counters only for 1st core in package */
1191 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1192 return 0;
1193
0b2bb692
LB		 1194 if (do_skl_residency) {
1195 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1196 return -10;
1197 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1198 return -11;
1199 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1200 return -12;
1201 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1202 return -13;
1203 }
ee7e38e3 1204 if (do_pc3)
c98d5d94
LB		 1205 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1206 return -9;
ee7e38e3 1207 if (do_pc6)
c98d5d94
LB		 1208 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1209 return -10;
ee7e38e3 1210 if (do_pc2)
c98d5d94
LB		 1211 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1212 return -11;
ee7e38e3 1213 if (do_pc7)
c98d5d94
LB		 1214 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1215 return -12;
ca58710f
KCA		 1216 if (do_c8_c9_c10) {
1217 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1218 return -13;
1219 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1220 return -13;
1221 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1222 return -13;
1223 }
889facbe
LB		 1224 if (do_rapl & RAPL_PKG) {
1225 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1226 return -13;
1227 p->energy_pkg = msr & 0xFFFFFFFF;
1228 }
1229 if (do_rapl & RAPL_CORES) {
1230 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1231 return -14;
1232 p->energy_cores = msr & 0xFFFFFFFF;
1233 }
1234 if (do_rapl & RAPL_DRAM) {
1235 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1236 return -15;
1237 p->energy_dram = msr & 0xFFFFFFFF;
1238 }
1239 if (do_rapl & RAPL_GFX) {
1240 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1241 return -16;
1242 p->energy_gfx = msr & 0xFFFFFFFF;
1243 }
1244 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1245 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1246 return -16;
1247 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1248 }
1249 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1250 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1251 return -16;
1252 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1253 }
1254 if (do_ptm) {
1255 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1256 return -17;
1257 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1258 }
fdf676e5
LB		 1259
1260 if (do_gfx_rc6_ms)
1261 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1262
27d47356
LB		 1263 if (do_gfx_mhz)
1264 p->gfx_mhz = gfx_cur_mhz;
1265
15aaa346 1266 return 0;
103a8fea
LB		 1267}
1268
ee7e38e3
LB		 1269/*
1270 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1271 * If you change the values, note they are used both in comparisons
1272 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1273 */
1274
1275#define PCLUKN 0 /* Unknown */
1276#define PCLRSV 1 /* Reserved */
1277#define PCL__0 2 /* PC0 */
1278#define PCL__1 3 /* PC1 */
1279#define PCL__2 4 /* PC2 */
1280#define PCL__3 5 /* PC3 */
1281#define PCL__4 6 /* PC4 */
1282#define PCL__6 7 /* PC6 */
1283#define PCL_6N 8 /* PC6 No Retention */
1284#define PCL_6R 9 /* PC6 Retention */
1285#define PCL__7 10 /* PC7 */
1286#define PCL_7S 11 /* PC7 Shrink */
0b2bb692
LB		 1287#define PCL__8 12 /* PC8 */
1288#define PCL__9 13 /* PC9 */
1289#define PCLUNL 14 /* Unlimited */
ee7e38e3
LB		 1290
1291int pkg_cstate_limit = PCLUKN;
1292char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
0b2bb692 1293 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
ee7e38e3 1294
e9257f5f
LB		 1295int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1296int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1297int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1298int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1299int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1300int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
e4085d54 1301int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
ee7e38e3 1302
a2b7b749
LB		 1303
1304static void
1305calculate_tsc_tweak()
1306{
a2b7b749
LB		 1307 tsc_tweak = base_hz / tsc_hz;
1308}
1309
fcd17211
LB		 1310static void
1311dump_nhm_platform_info(void)
103a8fea
LB		 1312{
1313 unsigned long long msr;
1314 unsigned int ratio;
1315
ec0adc53 1316 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
103a8fea 1317
b7d8c148 1318 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
6574a5d5 1319
103a8fea 1320 ratio = (msr >> 40) & 0xFF;
b7d8c148 1321 fprintf(outf, "%d * %.0f = %.0f MHz max efficiency frequency\n",
103a8fea
LB		 1322 ratio, bclk, ratio * bclk);
1323
1324 ratio = (msr >> 8) & 0xFF;
b7d8c148 1325 fprintf(outf, "%d * %.0f = %.0f MHz base frequency\n",
103a8fea
LB		 1326 ratio, bclk, ratio * bclk);
1327
7ce7d5de 1328 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
b7d8c148 1329 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
bfae2052 1330 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
67920418 1331
fcd17211
LB		 1332 return;
1333}
1334
1335static void
1336dump_hsw_turbo_ratio_limits(void)
1337{
1338 unsigned long long msr;
1339 unsigned int ratio;
1340
7ce7d5de 1341 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
fcd17211 1342
b7d8c148 1343 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
fcd17211
LB		 1344
1345 ratio = (msr >> 8) & 0xFF;
1346 if (ratio)
b7d8c148 1347 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
fcd17211
LB		 1348 ratio, bclk, ratio * bclk);
1349
1350 ratio = (msr >> 0) & 0xFF;
1351 if (ratio)
b7d8c148 1352 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
fcd17211
LB		 1353 ratio, bclk, ratio * bclk);
1354 return;
1355}
1356
1357static void
1358dump_ivt_turbo_ratio_limits(void)
1359{
1360 unsigned long long msr;
1361 unsigned int ratio;
6574a5d5 1362
7ce7d5de 1363 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
6574a5d5 1364
b7d8c148 1365 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1366
1367 ratio = (msr >> 56) & 0xFF;
1368 if (ratio)
b7d8c148 1369 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
6574a5d5
LB		 1370 ratio, bclk, ratio * bclk);
1371
1372 ratio = (msr >> 48) & 0xFF;
1373 if (ratio)
b7d8c148 1374 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
6574a5d5
LB		 1375 ratio, bclk, ratio * bclk);
1376
1377 ratio = (msr >> 40) & 0xFF;
1378 if (ratio)
b7d8c148 1379 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
6574a5d5
LB		 1380 ratio, bclk, ratio * bclk);
1381
1382 ratio = (msr >> 32) & 0xFF;
1383 if (ratio)
b7d8c148 1384 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
6574a5d5
LB		 1385 ratio, bclk, ratio * bclk);
1386
1387 ratio = (msr >> 24) & 0xFF;
1388 if (ratio)
b7d8c148 1389 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
6574a5d5
LB		 1390 ratio, bclk, ratio * bclk);
1391
1392 ratio = (msr >> 16) & 0xFF;
1393 if (ratio)
b7d8c148 1394 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
6574a5d5
LB		 1395 ratio, bclk, ratio * bclk);
1396
1397 ratio = (msr >> 8) & 0xFF;
1398 if (ratio)
b7d8c148 1399 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
6574a5d5
LB		 1400 ratio, bclk, ratio * bclk);
1401
1402 ratio = (msr >> 0) & 0xFF;
1403 if (ratio)
b7d8c148 1404 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
6574a5d5 1405 ratio, bclk, ratio * bclk);
fcd17211
LB		 1406 return;
1407}
6574a5d5 1408
fcd17211
LB		 1409static void
1410dump_nhm_turbo_ratio_limits(void)
1411{
1412 unsigned long long msr;
1413 unsigned int ratio;
103a8fea 1414
7ce7d5de 1415 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
103a8fea 1416
b7d8c148 1417 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
6574a5d5
LB		 1418
1419 ratio = (msr >> 56) & 0xFF;
1420 if (ratio)
b7d8c148 1421 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
6574a5d5
LB		 1422 ratio, bclk, ratio * bclk);
1423
1424 ratio = (msr >> 48) & 0xFF;
1425 if (ratio)
b7d8c148 1426 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
6574a5d5
LB		 1427 ratio, bclk, ratio * bclk);
1428
1429 ratio = (msr >> 40) & 0xFF;
1430 if (ratio)
b7d8c148 1431 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
6574a5d5
LB		 1432 ratio, bclk, ratio * bclk);
1433
1434 ratio = (msr >> 32) & 0xFF;
1435 if (ratio)
b7d8c148 1436 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
6574a5d5
LB		 1437 ratio, bclk, ratio * bclk);
1438
103a8fea
LB		 1439 ratio = (msr >> 24) & 0xFF;
1440 if (ratio)
b7d8c148 1441 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
103a8fea
LB		 1442 ratio, bclk, ratio * bclk);
1443
1444 ratio = (msr >> 16) & 0xFF;
1445 if (ratio)
b7d8c148 1446 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
103a8fea
LB		 1447 ratio, bclk, ratio * bclk);
1448
1449 ratio = (msr >> 8) & 0xFF;
1450 if (ratio)
b7d8c148 1451 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
103a8fea
LB		 1452 ratio, bclk, ratio * bclk);
1453
1454 ratio = (msr >> 0) & 0xFF;
1455 if (ratio)
b7d8c148 1456 fprintf(outf, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
103a8fea 1457 ratio, bclk, ratio * bclk);
fcd17211
LB		 1458 return;
1459}
3a9a941d 1460
fb5d4327
DC		 1461static void
1462dump_knl_turbo_ratio_limits(void)
1463{
cbf97aba
HC		 1464 const unsigned int buckets_no = 7;
1465
fb5d4327 1466 unsigned long long msr;
cbf97aba
HC		 1467 int delta_cores, delta_ratio;
1468 int i, b_nr;
1469 unsigned int cores[buckets_no];
1470 unsigned int ratio[buckets_no];
fb5d4327 1471
7ce7d5de 1472 get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
fb5d4327 1473
b7d8c148 1474 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
bfae2052 1475 base_cpu, msr);
fb5d4327
DC		 1476
1477 /**
1478 * Turbo encoding in KNL is as follows:
cbf97aba
HC		 1479 * [0] -- Reserved
1480 * [7:1] -- Base value of number of active cores of bucket 1.
fb5d4327
DC		 1481 * [15:8] -- Base value of freq ratio of bucket 1.
1482 * [20:16] -- +ve delta of number of active cores of bucket 2.
1483 * i.e. active cores of bucket 2 =
1484 * active cores of bucket 1 + delta
1485 * [23:21] -- Negative delta of freq ratio of bucket 2.
1486 * i.e. freq ratio of bucket 2 =
1487 * freq ratio of bucket 1 - delta
1488 * [28:24]-- +ve delta of number of active cores of bucket 3.
1489 * [31:29]-- -ve delta of freq ratio of bucket 3.
1490 * [36:32]-- +ve delta of number of active cores of bucket 4.
1491 * [39:37]-- -ve delta of freq ratio of bucket 4.
1492 * [44:40]-- +ve delta of number of active cores of bucket 5.
1493 * [47:45]-- -ve delta of freq ratio of bucket 5.
1494 * [52:48]-- +ve delta of number of active cores of bucket 6.
1495 * [55:53]-- -ve delta of freq ratio of bucket 6.
1496 * [60:56]-- +ve delta of number of active cores of bucket 7.
1497 * [63:61]-- -ve delta of freq ratio of bucket 7.
1498 */
cbf97aba
HC		 1499
1500 b_nr = 0;
1501 cores[b_nr] = (msr & 0xFF) >> 1;
1502 ratio[b_nr] = (msr >> 8) & 0xFF;
1503
1504 for (i = 16; i < 64; i += 8) {
fb5d4327 1505 delta_cores = (msr >> i) & 0x1F;
cbf97aba
HC		 1506 delta_ratio = (msr >> (i + 5)) & 0x7;
1507
1508 cores[b_nr + 1] = cores[b_nr] + delta_cores;
1509 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
1510 b_nr++;
1511 }
1512
1513 for (i = buckets_no - 1; i >= 0; i--)
1514 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
b7d8c148 1515 fprintf(outf,
fb5d4327 1516 "%d * %.0f = %.0f MHz max turbo %d active cores\n",
cbf97aba 1517 ratio[i], bclk, ratio[i] * bclk, cores[i]);
fb5d4327
DC		 1518}
1519
fcd17211
LB		 1520static void
1521dump_nhm_cst_cfg(void)
1522{
1523 unsigned long long msr;
1524
7ce7d5de 1525 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
fcd17211
LB		 1526
1527#define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
1528#define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
1529
b7d8c148 1530 fprintf(outf, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
fcd17211 1531
b7d8c148 1532 fprintf(outf, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
fcd17211
LB		 1533 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
1534 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
1535 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
1536 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
1537 (msr & (1 << 15)) ? "" : "UN",
6c34f160 1538 (unsigned int)msr & 0xF,
fcd17211
LB		 1539 pkg_cstate_limit_strings[pkg_cstate_limit]);
1540 return;
103a8fea
LB		 1541}
1542
6fb3143b
LB		 1543static void
1544dump_config_tdp(void)
1545{
1546 unsigned long long msr;
1547
1548 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
b7d8c148 1549 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
685b535b 1550 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
6fb3143b
LB		 1551
1552 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
b7d8c148 1553 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
6fb3143b 1554 if (msr) {
685b535b
CY		 1555 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1556 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1557 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1558 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 1559 }
b7d8c148 1560 fprintf(outf, ")\n");
6fb3143b
LB		 1561
1562 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
b7d8c148 1563 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
6fb3143b 1564 if (msr) {
685b535b
CY		 1565 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
1566 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
1567 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
1568 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
6fb3143b 1569 }
b7d8c148 1570 fprintf(outf, ")\n");
6fb3143b
LB		 1571
1572 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
b7d8c148 1573 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
6fb3143b 1574 if ((msr) & 0x3)
b7d8c148
LB		 1575 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
1576 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1577 fprintf(outf, ")\n");
36229897 1578
6fb3143b 1579 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
b7d8c148 1580 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
685b535b 1581 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
b7d8c148
LB		 1582 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
1583 fprintf(outf, ")\n");
6fb3143b 1584}
5a63426e
LB		 1585
1586unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
1587
1588void print_irtl(void)
1589{
1590 unsigned long long msr;
1591
1592 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
1593 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
1594 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1595 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1596
1597 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
1598 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
1599 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1600 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1601
1602 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
1603 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
1604 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1605 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1606
1607 if (!do_irtl_hsw)
1608 return;
1609
1610 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
1611 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
1612 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1613 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1614
1615 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
1616 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
1617 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1618 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1619
1620 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
1621 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
1622 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
1623 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
1624
1625}
36229897
LB		 1626void free_fd_percpu(void)
1627{
1628 int i;
1629
1630 for (i = 0; i < topo.max_cpu_num; ++i) {
1631 if (fd_percpu[i] != 0)
1632 close(fd_percpu[i]);
1633 }
1634
1635 free(fd_percpu);
1636}
6fb3143b 1637
c98d5d94 1638void free_all_buffers(void)
103a8fea 1639{
c98d5d94
LB		 1640 CPU_FREE(cpu_present_set);
1641 cpu_present_set = NULL;
36229897 1642 cpu_present_setsize = 0;
103a8fea 1643
c98d5d94
LB		 1644 CPU_FREE(cpu_affinity_set);
1645 cpu_affinity_set = NULL;
1646 cpu_affinity_setsize = 0;
103a8fea 1647
c98d5d94
LB		 1648 free(thread_even);
1649 free(core_even);
1650 free(package_even);
103a8fea 1651
c98d5d94
LB		 1652 thread_even = NULL;
1653 core_even = NULL;
1654 package_even = NULL;
103a8fea 1655
c98d5d94
LB		 1656 free(thread_odd);
1657 free(core_odd);
1658 free(package_odd);
103a8fea 1659
c98d5d94
LB		 1660 thread_odd = NULL;
1661 core_odd = NULL;
1662 package_odd = NULL;
103a8fea 1663
c98d5d94
LB		 1664 free(output_buffer);
1665 output_buffer = NULL;
1666 outp = NULL;
36229897
LB		 1667
1668 free_fd_percpu();
562a2d37
LB		 1669
1670 free(irq_column_2_cpu);
1671 free(irqs_per_cpu);
103a8fea
LB		 1672}
1673
57a42a34
JT		 1674/*
1675 * Open a file, and exit on failure
1676 */
1677FILE *fopen_or_die(const char *path, const char *mode)
1678{
b7d8c148 1679 FILE *filep = fopen(path, mode);
b2c95d90
JT		 1680 if (!filep)
1681 err(1, "%s: open failed", path);
57a42a34
JT		 1682 return filep;
1683}
1684
c98d5d94 1685/*
95aebc44 1686 * Parse a file containing a single int.
c98d5d94 1687 */
95aebc44 1688int parse_int_file(const char *fmt, ...)
103a8fea 1689{
95aebc44
JT		 1690 va_list args;
1691 char path[PATH_MAX];
c98d5d94 1692 FILE *filep;
95aebc44 1693 int value;
103a8fea 1694
95aebc44
JT		 1695 va_start(args, fmt);
1696 vsnprintf(path, sizeof(path), fmt, args);
1697 va_end(args);
57a42a34 1698 filep = fopen_or_die(path, "r");
b2c95d90
JT		 1699 if (fscanf(filep, "%d", &value) != 1)
1700 err(1, "%s: failed to parse number from file", path);
c98d5d94 1701 fclose(filep);
95aebc44
JT		 1702 return value;
1703}
1704
1705/*
e275b388
DC		 1706 * get_cpu_position_in_core(cpu)
1707 * return the position of the CPU among its HT siblings in the core
1708 * return -1 if the sibling is not in list
95aebc44 1709 */
e275b388 1710int get_cpu_position_in_core(int cpu)
95aebc44 1711{
e275b388
DC		 1712 char path[64];
1713 FILE *filep;
1714 int this_cpu;
1715 char character;
1716 int i;
1717
1718 sprintf(path,
1719 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
1720 cpu);
1721 filep = fopen(path, "r");
1722 if (filep == NULL) {
1723 perror(path);
1724 exit(1);
1725 }
1726
1727 for (i = 0; i < topo.num_threads_per_core; i++) {
1728 fscanf(filep, "%d", &this_cpu);
1729 if (this_cpu == cpu) {
1730 fclose(filep);
1731 return i;
1732 }
1733
1734 /* Account for no separator after last thread*/
1735 if (i != (topo.num_threads_per_core - 1))
1736 fscanf(filep, "%c", &character);
1737 }
1738
1739 fclose(filep);
1740 return -1;
103a8fea
LB		 1741}
1742
c98d5d94
LB		 1743/*
1744 * cpu_is_first_core_in_package(cpu)
1745 * return 1 if given CPU is 1st core in package
1746 */
1747int cpu_is_first_core_in_package(int cpu)
103a8fea 1748{
95aebc44 1749 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
103a8fea
LB		 1750}
1751
1752int get_physical_package_id(int cpu)
1753{
95aebc44 1754 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
103a8fea
LB		 1755}
1756
1757int get_core_id(int cpu)
1758{
95aebc44 1759 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
103a8fea
LB		 1760}
1761
c98d5d94
LB		 1762int get_num_ht_siblings(int cpu)
1763{
1764 char path[80];
1765 FILE *filep;
e275b388
DC		 1766 int sib1;
1767 int matches = 0;
c98d5d94 1768 char character;
e275b388
DC		 1769 char str[100];
1770 char *ch;
c98d5d94
LB		 1771
1772 sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
57a42a34 1773 filep = fopen_or_die(path, "r");
e275b388 1774
c98d5d94
LB		 1775 /*
1776 * file format:
e275b388
DC		 1777 * A ',' separated or '-' separated set of numbers
1778 * (eg 1-2 or 1,3,4,5)
c98d5d94 1779 */
e275b388
DC		 1780 fscanf(filep, "%d%c\n", &sib1, &character);
1781 fseek(filep, 0, SEEK_SET);
1782 fgets(str, 100, filep);
1783 ch = strchr(str, character);
1784 while (ch != NULL) {
1785 matches++;
1786 ch = strchr(ch+1, character);
1787 }
c98d5d94
LB		 1788
1789 fclose(filep);
e275b388 1790 return matches+1;
c98d5d94
LB		 1791}
1792
103a8fea 1793/*
c98d5d94
LB		 1794 * run func(thread, core, package) in topology order
1795 * skip non-present cpus
103a8fea
LB		 1796 */
1797
c98d5d94
LB		 1798int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
1799 struct pkg_data *, struct thread_data *, struct core_data *,
1800 struct pkg_data *), struct thread_data *thread_base,
1801 struct core_data *core_base, struct pkg_data *pkg_base,
1802 struct thread_data *thread_base2, struct core_data *core_base2,
1803 struct pkg_data *pkg_base2)
1804{
1805 int retval, pkg_no, core_no, thread_no;
1806
1807 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
1808 for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
1809 for (thread_no = 0; thread_no <
1810 topo.num_threads_per_core; ++thread_no) {
1811 struct thread_data *t, *t2;
1812 struct core_data *c, *c2;
1813 struct pkg_data *p, *p2;
1814
1815 t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
1816
1817 if (cpu_is_not_present(t->cpu_id))
1818 continue;
1819
1820 t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
1821
1822 c = GET_CORE(core_base, core_no, pkg_no);
1823 c2 = GET_CORE(core_base2, core_no, pkg_no);
1824
1825 p = GET_PKG(pkg_base, pkg_no);
1826 p2 = GET_PKG(pkg_base2, pkg_no);
1827
1828 retval = func(t, c, p, t2, c2, p2);
1829 if (retval)
1830 return retval;
1831 }
1832 }
1833 }
1834 return 0;
1835}
1836
1837/*
1838 * run func(cpu) on every cpu in /proc/stat
1839 * return max_cpu number
1840 */
1841int for_all_proc_cpus(int (func)(int))
103a8fea
LB		 1842{
1843 FILE *fp;
c98d5d94 1844 int cpu_num;
103a8fea
LB		 1845 int retval;
1846
57a42a34 1847 fp = fopen_or_die(proc_stat, "r");
103a8fea
LB		 1848
1849 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
b2c95d90
JT		 1850 if (retval != 0)
1851 err(1, "%s: failed to parse format", proc_stat);
103a8fea 1852
c98d5d94
LB		 1853 while (1) {
1854 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
103a8fea
LB		 1855 if (retval != 1)
1856 break;
1857
c98d5d94
LB		 1858 retval = func(cpu_num);
1859 if (retval) {
1860 fclose(fp);
1861 return(retval);
1862 }
103a8fea
LB		 1863 }
1864 fclose(fp);
c98d5d94 1865 return 0;
103a8fea
LB		 1866}
1867
1868void re_initialize(void)
1869{
c98d5d94
LB		 1870 free_all_buffers();
1871 setup_all_buffers();
1872 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
103a8fea
LB		 1873}
1874
c98d5d94 1875
103a8fea 1876/*
c98d5d94
LB		 1877 * count_cpus()
1878 * remember the last one seen, it will be the max
103a8fea 1879 */
c98d5d94 1880int count_cpus(int cpu)
103a8fea 1881{
c98d5d94
LB		 1882 if (topo.max_cpu_num < cpu)
1883 topo.max_cpu_num = cpu;
103a8fea 1884
c98d5d94
LB		 1885 topo.num_cpus += 1;
1886 return 0;
1887}
1888int mark_cpu_present(int cpu)
1889{
1890 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
15aaa346 1891 return 0;
103a8fea
LB		 1892}
1893
562a2d37
LB		 1894/*
1895 * snapshot_proc_interrupts()
1896 *
1897 * read and record summary of /proc/interrupts
1898 *
1899 * return 1 if config change requires a restart, else return 0
1900 */
1901int snapshot_proc_interrupts(void)
1902{
1903 static FILE *fp;
1904 int column, retval;
1905
1906 if (fp == NULL)
1907 fp = fopen_or_die("/proc/interrupts", "r");
1908 else
1909 rewind(fp);
1910
1911 /* read 1st line of /proc/interrupts to get cpu* name for each column */
1912 for (column = 0; column < topo.num_cpus; ++column) {
1913 int cpu_number;
1914
1915 retval = fscanf(fp, " CPU%d", &cpu_number);
1916 if (retval != 1)
1917 break;
1918
1919 if (cpu_number > topo.max_cpu_num) {
1920 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
1921 return 1;
1922 }
1923
1924 irq_column_2_cpu[column] = cpu_number;
1925 irqs_per_cpu[cpu_number] = 0;
1926 }
1927
1928 /* read /proc/interrupt count lines and sum up irqs per cpu */
1929 while (1) {
1930 int column;
1931 char buf[64];
1932
1933 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
1934 if (retval != 1)
1935 break;
1936
1937 /* read the count per cpu */
1938 for (column = 0; column < topo.num_cpus; ++column) {
1939
1940 int cpu_number, irq_count;
1941
1942 retval = fscanf(fp, " %d", &irq_count);
1943 if (retval != 1)
1944 break;
1945
1946 cpu_number = irq_column_2_cpu[column];
1947 irqs_per_cpu[cpu_number] += irq_count;
1948
1949 }
1950
1951 while (getc(fp) != '\n')
1952 ; /* flush interrupt description */
1953
1954 }
1955 return 0;
1956}
fdf676e5
LB		 1957/*
1958 * snapshot_gfx_rc6_ms()
1959 *
1960 * record snapshot of
1961 * /sys/class/drm/card0/power/rc6_residency_ms
1962 *
1963 * return 1 if config change requires a restart, else return 0
1964 */
1965int snapshot_gfx_rc6_ms(void)
1966{
1967 FILE *fp;
1968 int retval;
1969
1970 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
1971
1972 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
1973 if (retval != 1)
1974 err(1, "GFX rc6");
1975
1976 fclose(fp);
1977
1978 return 0;
1979}
27d47356
LB		 1980/*
1981 * snapshot_gfx_mhz()
1982 *
1983 * record snapshot of
1984 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
1985 *
1986 * return 1 if config change requires a restart, else return 0
1987 */
1988int snapshot_gfx_mhz(void)
1989{
1990 static FILE *fp;
1991 int retval;
1992
1993 if (fp == NULL)
1994 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
1995 else
1996 rewind(fp);
1997
1998 retval = fscanf(fp, "%d", &gfx_cur_mhz);
1999 if (retval != 1)
2000 err(1, "GFX MHz");
2001
2002 return 0;
2003}
562a2d37
LB		 2004
2005/*
2006 * snapshot /proc and /sys files
2007 *
2008 * return 1 if configuration restart needed, else return 0
2009 */
2010int snapshot_proc_sysfs_files(void)
2011{
2012 if (snapshot_proc_interrupts())
2013 return 1;
2014
fdf676e5
LB		 2015 if (do_gfx_rc6_ms)
2016 snapshot_gfx_rc6_ms();
2017
27d47356
LB		 2018 if (do_gfx_mhz)
2019 snapshot_gfx_mhz();
2020
562a2d37
LB		 2021 return 0;
2022}
2023
103a8fea
LB		 2024void turbostat_loop()
2025{
c98d5d94 2026 int retval;
e52966c0 2027 int restarted = 0;
c98d5d94 2028
103a8fea 2029restart:
e52966c0
LB		 2030 restarted++;
2031
562a2d37 2032 snapshot_proc_sysfs_files();
c98d5d94 2033 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 2034 if (retval < -1) {
2035 exit(retval);
2036 } else if (retval == -1) {
e52966c0
LB		 2037 if (restarted > 1) {
2038 exit(retval);
2039 }
c98d5d94
LB		 2040 re_initialize();
2041 goto restart;
2042 }
e52966c0 2043 restarted = 0;
103a8fea
LB		 2044 gettimeofday(&tv_even, (struct timezone *)NULL);
2045
2046 while (1) {
c98d5d94 2047 if (for_all_proc_cpus(cpu_is_not_present)) {
103a8fea
LB		 2048 re_initialize();
2049 goto restart;
2050 }
2a0609c0 2051 nanosleep(&interval_ts, NULL);
562a2d37
LB		 2052 if (snapshot_proc_sysfs_files())
2053 goto restart;
c98d5d94 2054 retval = for_all_cpus(get_counters, ODD_COUNTERS);
d91bb17c
LB		 2055 if (retval < -1) {
2056 exit(retval);
2057 } else if (retval == -1) {
15aaa346
LB		 2058 re_initialize();
2059 goto restart;
2060 }
103a8fea 2061 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 2062 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 2063 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
2064 compute_average(EVEN_COUNTERS);
2065 format_all_counters(EVEN_COUNTERS);
b7d8c148 2066 flush_output_stdout();
2a0609c0 2067 nanosleep(&interval_ts, NULL);
562a2d37
LB		 2068 if (snapshot_proc_sysfs_files())
2069 goto restart;
c98d5d94 2070 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
d91bb17c
LB		 2071 if (retval < -1) {
2072 exit(retval);
2073 } else if (retval == -1) {
103a8fea
LB		 2074 re_initialize();
2075 goto restart;
2076 }
103a8fea 2077 gettimeofday(&tv_even, (struct timezone *)NULL);
103a8fea 2078 timersub(&tv_even, &tv_odd, &tv_delta);
c98d5d94
LB		 2079 for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
2080 compute_average(ODD_COUNTERS);
2081 format_all_counters(ODD_COUNTERS);
b7d8c148 2082 flush_output_stdout();
103a8fea
LB		 2083 }
2084}
2085
2086void check_dev_msr()
2087{
2088 struct stat sb;
7ce7d5de 2089 char pathname[32];
103a8fea 2090
7ce7d5de
PB		 2091 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2092 if (stat(pathname, &sb))
a21d38c8
LB		 2093 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
2094 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
103a8fea
LB		 2095}
2096
98481e79 2097void check_permissions()
103a8fea 2098{
98481e79
LB		 2099 struct __user_cap_header_struct cap_header_data;
2100 cap_user_header_t cap_header = &cap_header_data;
2101 struct __user_cap_data_struct cap_data_data;
2102 cap_user_data_t cap_data = &cap_data_data;
2103 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
2104 int do_exit = 0;
7ce7d5de 2105 char pathname[32];
98481e79
LB		 2106
2107 /* check for CAP_SYS_RAWIO */
2108 cap_header->pid = getpid();
2109 cap_header->version = _LINUX_CAPABILITY_VERSION;
2110 if (capget(cap_header, cap_data) < 0)
2111 err(-6, "capget(2) failed");
2112
2113 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
2114 do_exit++;
2115 warnx("capget(CAP_SYS_RAWIO) failed,"
2116 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
2117 }
2118
2119 /* test file permissions */
7ce7d5de
PB		 2120 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2121 if (euidaccess(pathname, R_OK)) {
98481e79
LB		 2122 do_exit++;
2123 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
2124 }
2125
2126 /* if all else fails, thell them to be root */
2127 if (do_exit)
2128 if (getuid() != 0)
d7899447 2129 warnx("... or simply run as root");
98481e79
LB		 2130
2131 if (do_exit)
2132 exit(-6);
103a8fea
LB		 2133}
2134
d7899447
LB		 2135/*
2136 * NHM adds support for additional MSRs:
2137 *
2138 * MSR_SMI_COUNT 0x00000034
2139 *
ec0adc53 2140 * MSR_PLATFORM_INFO 0x000000ce
d7899447
LB		 2141 * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
2142 *
2143 * MSR_PKG_C3_RESIDENCY 0x000003f8
2144 * MSR_PKG_C6_RESIDENCY 0x000003f9
2145 * MSR_CORE_C3_RESIDENCY 0x000003fc
2146 * MSR_CORE_C6_RESIDENCY 0x000003fd
2147 *
ee7e38e3
LB		 2148 * Side effect:
2149 * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
d7899447 2150 */
ee7e38e3 2151int probe_nhm_msrs(unsigned int family, unsigned int model)
103a8fea 2152{
ee7e38e3 2153 unsigned long long msr;
21ed5574 2154 unsigned int base_ratio;
ee7e38e3
LB		 2155 int *pkg_cstate_limits;
2156
103a8fea
LB		 2157 if (!genuine_intel)
2158 return 0;
2159
2160 if (family != 6)
2161 return 0;
2162
21ed5574
LB		 2163 bclk = discover_bclk(family, model);
2164
103a8fea
LB		 2165 switch (model) {
2166 case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
2167 case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
2168 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
2169 case 0x25: /* Westmere Client - Clarkdale, Arrandale */
2170 case 0x2C: /* Westmere EP - Gulftown */
ee7e38e3
LB		 2171 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2172 case 0x2F: /* Westmere-EX Xeon - Eagleton */
2173 pkg_cstate_limits = nhm_pkg_cstate_limits;
2174 break;
103a8fea
LB		 2175 case 0x2A: /* SNB */
2176 case 0x2D: /* SNB Xeon */
553575f1 2177 case 0x3A: /* IVB */
1300651b 2178 case 0x3E: /* IVB Xeon */
ee7e38e3
LB		 2179 pkg_cstate_limits = snb_pkg_cstate_limits;
2180 break;
70b43400 2181 case 0x3C: /* HSW */
e6f9bb3c 2182 case 0x3F: /* HSX */
70b43400 2183 case 0x45: /* HSW */
149c2319 2184 case 0x46: /* HSW */
4e8e863f 2185 case 0x3D: /* BDW */
48a0631c 2186 case 0x47: /* BDW */
4e8e863f
LB		 2187 case 0x4F: /* BDX */
2188 case 0x56: /* BDX-DE */
0b2bb692
LB		 2189 case 0x4E: /* SKL */
2190 case 0x5E: /* SKL */
ee7e38e3
LB		 2191 pkg_cstate_limits = hsw_pkg_cstate_limits;
2192 break;
2193 case 0x37: /* BYT */
2194 case 0x4D: /* AVN */
2195 pkg_cstate_limits = slv_pkg_cstate_limits;
2196 break;
2197 case 0x4C: /* AMT */
2198 pkg_cstate_limits = amt_pkg_cstate_limits;
2199 break;
2200 case 0x57: /* PHI */
2201 pkg_cstate_limits = phi_pkg_cstate_limits;
2202 break;
e4085d54
LB		 2203 case 0x5C: /* BXT */
2204 pkg_cstate_limits = bxt_pkg_cstate_limits;
2205 break;
103a8fea
LB		 2206 default:
2207 return 0;
2208 }
7ce7d5de 2209 get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
e9257f5f 2210 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
ee7e38e3 2211
ec0adc53 2212 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
21ed5574
LB		 2213 base_ratio = (msr >> 8) & 0xFF;
2214
2215 base_hz = base_ratio * bclk * 1000000;
2216 has_base_hz = 1;
ee7e38e3 2217 return 1;
103a8fea 2218}
d7899447
LB		 2219int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
2220{
d7899447
LB		 2221 switch (model) {
2222 /* Nehalem compatible, but do not include turbo-ratio limit support */
2223 case 0x2E: /* Nehalem-EX Xeon - Beckton */
2224 case 0x2F: /* Westmere-EX Xeon - Eagleton */
cbf97aba 2225 case 0x57: /* PHI - Knights Landing (different MSR definition) */
d7899447
LB		 2226 return 0;
2227 default:
2228 return 1;
2229 }
2230}
6574a5d5
LB		 2231int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
2232{
2233 if (!genuine_intel)
2234 return 0;
2235
2236 if (family != 6)
2237 return 0;
2238
2239 switch (model) {
2240 case 0x3E: /* IVB Xeon */
fcd17211
LB		 2241 case 0x3F: /* HSW Xeon */
2242 return 1;
2243 default:
2244 return 0;
2245 }
2246}
2247int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
2248{
2249 if (!genuine_intel)
2250 return 0;
2251
2252 if (family != 6)
2253 return 0;
2254
2255 switch (model) {
2256 case 0x3F: /* HSW Xeon */
6574a5d5
LB		 2257 return 1;
2258 default:
2259 return 0;
2260 }
2261}
2262
fb5d4327
DC		 2263int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
2264{
2265 if (!genuine_intel)
2266 return 0;
2267
2268 if (family != 6)
2269 return 0;
2270
2271 switch (model) {
2272 case 0x57: /* Knights Landing */
2273 return 1;
2274 default:
2275 return 0;
2276 }
2277}
6fb3143b
LB		 2278int has_config_tdp(unsigned int family, unsigned int model)
2279{
2280 if (!genuine_intel)
2281 return 0;
2282
2283 if (family != 6)
2284 return 0;
2285
2286 switch (model) {
2287 case 0x3A: /* IVB */
6fb3143b
LB		 2288 case 0x3C: /* HSW */
2289 case 0x3F: /* HSX */
2290 case 0x45: /* HSW */
2291 case 0x46: /* HSW */
2292 case 0x3D: /* BDW */
2293 case 0x47: /* BDW */
2294 case 0x4F: /* BDX */
2295 case 0x56: /* BDX-DE */
2296 case 0x4E: /* SKL */
2297 case 0x5E: /* SKL */
2298
2299 case 0x57: /* Knights Landing */
2300 return 1;
2301 default:
2302 return 0;
2303 }
2304}
2305
fcd17211 2306static void
58cc30a4 2307dump_cstate_pstate_config_info(int family, int model)
fcd17211
LB		 2308{
2309 if (!do_nhm_platform_info)
2310 return;
2311
2312 dump_nhm_platform_info();
2313
2314 if (has_hsw_turbo_ratio_limit(family, model))
2315 dump_hsw_turbo_ratio_limits();
2316
2317 if (has_ivt_turbo_ratio_limit(family, model))
2318 dump_ivt_turbo_ratio_limits();
2319
2320 if (has_nhm_turbo_ratio_limit(family, model))
2321 dump_nhm_turbo_ratio_limits();
2322
fb5d4327
DC		 2323 if (has_knl_turbo_ratio_limit(family, model))
2324 dump_knl_turbo_ratio_limits();
2325
6fb3143b
LB		 2326 if (has_config_tdp(family, model))
2327 dump_config_tdp();
2328
fcd17211
LB		 2329 dump_nhm_cst_cfg();
2330}
2331
2332
889facbe
LB		 2333/*
2334 * print_epb()
2335 * Decode the ENERGY_PERF_BIAS MSR
2336 */
2337int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2338{
2339 unsigned long long msr;
2340 char *epb_string;
2341 int cpu;
2342
2343 if (!has_epb)
2344 return 0;
2345
2346 cpu = t->cpu_id;
2347
2348 /* EPB is per-package */
2349 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2350 return 0;
2351
2352 if (cpu_migrate(cpu)) {
b7d8c148 2353 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 2354 return -1;
2355 }
2356
2357 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
2358 return 0;
2359
e9be7dd6 2360 switch (msr & 0xF) {
889facbe
LB		 2361 case ENERGY_PERF_BIAS_PERFORMANCE:
2362 epb_string = "performance";
2363 break;
2364 case ENERGY_PERF_BIAS_NORMAL:
2365 epb_string = "balanced";
2366 break;
2367 case ENERGY_PERF_BIAS_POWERSAVE:
2368 epb_string = "powersave";
2369 break;
2370 default:
2371 epb_string = "custom";
2372 break;
2373 }
b7d8c148 2374 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
889facbe
LB		 2375
2376 return 0;
2377}
7f5c258e
LB		 2378/*
2379 * print_hwp()
2380 * Decode the MSR_HWP_CAPABILITIES
2381 */
2382int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2383{
2384 unsigned long long msr;
2385 int cpu;
2386
2387 if (!has_hwp)
2388 return 0;
2389
2390 cpu = t->cpu_id;
2391
2392 /* MSR_HWP_CAPABILITIES is per-package */
2393 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2394 return 0;
2395
2396 if (cpu_migrate(cpu)) {
b7d8c148 2397 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
7f5c258e
LB		 2398 return -1;
2399 }
2400
2401 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
2402 return 0;
2403
b7d8c148 2404 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
7f5c258e
LB		 2405 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
2406
2407 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
2408 if ((msr & (1 << 0)) == 0)
2409 return 0;
2410
2411 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
2412 return 0;
2413
b7d8c148 2414 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
7f5c258e
LB		 2415 "(high 0x%x guar 0x%x eff 0x%x low 0x%x)\n",
2416 cpu, msr,
2417 (unsigned int)HWP_HIGHEST_PERF(msr),
2418 (unsigned int)HWP_GUARANTEED_PERF(msr),
2419 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
2420 (unsigned int)HWP_LOWEST_PERF(msr));
2421
2422 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
2423 return 0;
2424
b7d8c148 2425 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
7f5c258e
LB		 2426 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x pkg 0x%x)\n",
2427 cpu, msr,
2428 (unsigned int)(((msr) >> 0) & 0xff),
2429 (unsigned int)(((msr) >> 8) & 0xff),
2430 (unsigned int)(((msr) >> 16) & 0xff),
2431 (unsigned int)(((msr) >> 24) & 0xff),
2432 (unsigned int)(((msr) >> 32) & 0xff3),
2433 (unsigned int)(((msr) >> 42) & 0x1));
2434
2435 if (has_hwp_pkg) {
2436 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
2437 return 0;
2438
b7d8c148 2439 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
7f5c258e
LB		 2440 "(min 0x%x max 0x%x des 0x%x epp 0x%x window 0x%x)\n",
2441 cpu, msr,
2442 (unsigned int)(((msr) >> 0) & 0xff),
2443 (unsigned int)(((msr) >> 8) & 0xff),
2444 (unsigned int)(((msr) >> 16) & 0xff),
2445 (unsigned int)(((msr) >> 24) & 0xff),
2446 (unsigned int)(((msr) >> 32) & 0xff3));
2447 }
2448 if (has_hwp_notify) {
2449 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
2450 return 0;
2451
b7d8c148 2452 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
7f5c258e
LB		 2453 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
2454 cpu, msr,
2455 ((msr) & 0x1) ? "EN" : "Dis",
2456 ((msr) & 0x2) ? "EN" : "Dis");
2457 }
2458 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
2459 return 0;
2460
b7d8c148 2461 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
7f5c258e
LB		 2462 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
2463 cpu, msr,
2464 ((msr) & 0x1) ? "" : "No-",
2465 ((msr) & 0x2) ? "" : "No-");
2466
2467 return 0;
2468}
889facbe 2469
3a9a941d
LB		 2470/*
2471 * print_perf_limit()
2472 */
2473int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2474{
2475 unsigned long long msr;
2476 int cpu;
2477
2478 cpu = t->cpu_id;
2479
2480 /* per-package */
2481 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2482 return 0;
2483
2484 if (cpu_migrate(cpu)) {
b7d8c148 2485 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3a9a941d
LB		 2486 return -1;
2487 }
2488
2489 if (do_core_perf_limit_reasons) {
2490 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 2491 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2492 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
e33cbe85 2493 (msr & 1 << 15) ? "bit15, " : "",
3a9a941d 2494 (msr & 1 << 14) ? "bit14, " : "",
e33cbe85
LB		 2495 (msr & 1 << 13) ? "Transitions, " : "",
2496 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
2497 (msr & 1 << 11) ? "PkgPwrL2, " : "",
2498 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2499 (msr & 1 << 9) ? "CorePwr, " : "",
2500 (msr & 1 << 8) ? "Amps, " : "",
2501 (msr & 1 << 6) ? "VR-Therm, " : "",
2502 (msr & 1 << 5) ? "Auto-HWP, " : "",
2503 (msr & 1 << 4) ? "Graphics, " : "",
2504 (msr & 1 << 2) ? "bit2, " : "",
2505 (msr & 1 << 1) ? "ThermStatus, " : "",
2506 (msr & 1 << 0) ? "PROCHOT, " : "");
b7d8c148 2507 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
e33cbe85 2508 (msr & 1 << 31) ? "bit31, " : "",
3a9a941d 2509 (msr & 1 << 30) ? "bit30, " : "",
e33cbe85
LB		 2510 (msr & 1 << 29) ? "Transitions, " : "",
2511 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
2512 (msr & 1 << 27) ? "PkgPwrL2, " : "",
2513 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2514 (msr & 1 << 25) ? "CorePwr, " : "",
2515 (msr & 1 << 24) ? "Amps, " : "",
2516 (msr & 1 << 22) ? "VR-Therm, " : "",
2517 (msr & 1 << 21) ? "Auto-HWP, " : "",
2518 (msr & 1 << 20) ? "Graphics, " : "",
2519 (msr & 1 << 18) ? "bit18, " : "",
2520 (msr & 1 << 17) ? "ThermStatus, " : "",
2521 (msr & 1 << 16) ? "PROCHOT, " : "");
3a9a941d
LB		 2522
2523 }
2524 if (do_gfx_perf_limit_reasons) {
2525 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 2526 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2527 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3a9a941d
LB		 2528 (msr & 1 << 0) ? "PROCHOT, " : "",
2529 (msr & 1 << 1) ? "ThermStatus, " : "",
2530 (msr & 1 << 4) ? "Graphics, " : "",
2531 (msr & 1 << 6) ? "VR-Therm, " : "",
2532 (msr & 1 << 8) ? "Amps, " : "",
2533 (msr & 1 << 9) ? "GFXPwr, " : "",
2534 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2535 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 2536 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3a9a941d
LB		 2537 (msr & 1 << 16) ? "PROCHOT, " : "",
2538 (msr & 1 << 17) ? "ThermStatus, " : "",
2539 (msr & 1 << 20) ? "Graphics, " : "",
2540 (msr & 1 << 22) ? "VR-Therm, " : "",
2541 (msr & 1 << 24) ? "Amps, " : "",
2542 (msr & 1 << 25) ? "GFXPwr, " : "",
2543 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2544 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2545 }
2546 if (do_ring_perf_limit_reasons) {
2547 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
b7d8c148
LB		 2548 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
2549 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3a9a941d
LB		 2550 (msr & 1 << 0) ? "PROCHOT, " : "",
2551 (msr & 1 << 1) ? "ThermStatus, " : "",
2552 (msr & 1 << 6) ? "VR-Therm, " : "",
2553 (msr & 1 << 8) ? "Amps, " : "",
2554 (msr & 1 << 10) ? "PkgPwrL1, " : "",
2555 (msr & 1 << 11) ? "PkgPwrL2, " : "");
b7d8c148 2556 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3a9a941d
LB		 2557 (msr & 1 << 16) ? "PROCHOT, " : "",
2558 (msr & 1 << 17) ? "ThermStatus, " : "",
2559 (msr & 1 << 22) ? "VR-Therm, " : "",
2560 (msr & 1 << 24) ? "Amps, " : "",
2561 (msr & 1 << 26) ? "PkgPwrL1, " : "",
2562 (msr & 1 << 27) ? "PkgPwrL2, " : "");
2563 }
2564 return 0;
2565}
2566
889facbe
LB		 2567#define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
2568#define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
2569
58cc30a4 2570double get_tdp(int model)
144b44b1
LB		 2571{
2572 unsigned long long msr;
2573
2574 if (do_rapl & RAPL_PKG_POWER_INFO)
7ce7d5de 2575 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
144b44b1
LB		 2576 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
2577
2578 switch (model) {
2579 case 0x37:
2580 case 0x4D:
2581 return 30.0;
2582 default:
2583 return 135.0;
2584 }
2585}
2586
40ee8e3b
AS		 2587/*
2588 * rapl_dram_energy_units_probe()
2589 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
2590 */
2591static double
2592rapl_dram_energy_units_probe(int model, double rapl_energy_units)
2593{
2594 /* only called for genuine_intel, family 6 */
2595
2596 switch (model) {
2597 case 0x3F: /* HSX */
2598 case 0x4F: /* BDX */
2599 case 0x56: /* BDX-DE */
fb5d4327 2600 case 0x57: /* KNL */
40ee8e3b
AS		 2601 return (rapl_dram_energy_units = 15.3 / 1000000);
2602 default:
2603 return (rapl_energy_units);
2604 }
2605}
2606
144b44b1 2607
889facbe
LB		 2608/*
2609 * rapl_probe()
2610 *
144b44b1 2611 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
889facbe
LB		 2612 */
2613void rapl_probe(unsigned int family, unsigned int model)
2614{
2615 unsigned long long msr;
144b44b1 2616 unsigned int time_unit;
889facbe
LB		 2617 double tdp;
2618
2619 if (!genuine_intel)
2620 return;
2621
2622 if (family != 6)
2623 return;
2624
2625 switch (model) {
2626 case 0x2A:
2627 case 0x3A:
70b43400 2628 case 0x3C: /* HSW */
70b43400 2629 case 0x45: /* HSW */
149c2319 2630 case 0x46: /* HSW */
4e8e863f 2631 case 0x3D: /* BDW */
48a0631c 2632 case 0x47: /* BDW */
144b44b1 2633 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
889facbe 2634 break;
e4085d54
LB		 2635 case 0x5C: /* BXT */
2636 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2637 break;
0b2bb692
LB		 2638 case 0x4E: /* SKL */
2639 case 0x5E: /* SKL */
2640 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2641 break;
e6f9bb3c 2642 case 0x3F: /* HSX */
4e8e863f
LB		 2643 case 0x4F: /* BDX */
2644 case 0x56: /* BDX-DE */
fb5d4327 2645 case 0x57: /* KNL */
0b2bb692 2646 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
e6f9bb3c 2647 break;
889facbe
LB		 2648 case 0x2D:
2649 case 0x3E:
0b2bb692 2650 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
144b44b1
LB		 2651 break;
2652 case 0x37: /* BYT */
2653 case 0x4D: /* AVN */
2654 do_rapl = RAPL_PKG | RAPL_CORES ;
889facbe
LB		 2655 break;
2656 default:
2657 return;
2658 }
2659
2660 /* units on package 0, verify later other packages match */
7ce7d5de 2661 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
889facbe
LB		 2662 return;
2663
2664 rapl_power_units = 1.0 / (1 << (msr & 0xF));
144b44b1
LB		 2665 if (model == 0x37)
2666 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
2667 else
2668 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
889facbe 2669
40ee8e3b
AS		 2670 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
2671
144b44b1
LB		 2672 time_unit = msr >> 16 & 0xF;
2673 if (time_unit == 0)
2674 time_unit = 0xA;
889facbe 2675
144b44b1 2676 rapl_time_units = 1.0 / (1 << (time_unit));
889facbe 2677
144b44b1 2678 tdp = get_tdp(model);
889facbe 2679
144b44b1 2680 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
d8af6f5f 2681 if (debug)
b7d8c148 2682 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
889facbe
LB		 2683
2684 return;
2685}
2686
58cc30a4 2687void perf_limit_reasons_probe(int family, int model)
3a9a941d
LB		 2688{
2689 if (!genuine_intel)
2690 return;
2691
2692 if (family != 6)
2693 return;
2694
2695 switch (model) {
2696 case 0x3C: /* HSW */
2697 case 0x45: /* HSW */
2698 case 0x46: /* HSW */
2699 do_gfx_perf_limit_reasons = 1;
2700 case 0x3F: /* HSX */
2701 do_core_perf_limit_reasons = 1;
2702 do_ring_perf_limit_reasons = 1;
2703 default:
2704 return;
2705 }
2706}
2707
889facbe
LB		 2708int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2709{
2710 unsigned long long msr;
2711 unsigned int dts;
2712 int cpu;
2713
2714 if (!(do_dts || do_ptm))
2715 return 0;
2716
2717 cpu = t->cpu_id;
2718
2719 /* DTS is per-core, no need to print for each thread */
2720 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
2721 return 0;
2722
2723 if (cpu_migrate(cpu)) {
b7d8c148 2724 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 2725 return -1;
2726 }
2727
2728 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
2729 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
2730 return 0;
2731
2732 dts = (msr >> 16) & 0x7F;
b7d8c148 2733 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
889facbe
LB		 2734 cpu, msr, tcc_activation_temp - dts);
2735
2736#ifdef THERM_DEBUG
2737 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
2738 return 0;
2739
2740 dts = (msr >> 16) & 0x7F;
2741 dts2 = (msr >> 8) & 0x7F;
b7d8c148 2742 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe
LB		 2743 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2744#endif
2745 }
2746
2747
2748 if (do_dts) {
2749 unsigned int resolution;
2750
2751 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
2752 return 0;
2753
2754 dts = (msr >> 16) & 0x7F;
2755 resolution = (msr >> 27) & 0xF;
b7d8c148 2756 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
889facbe
LB		 2757 cpu, msr, tcc_activation_temp - dts, resolution);
2758
2759#ifdef THERM_DEBUG
2760 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
2761 return 0;
2762
2763 dts = (msr >> 16) & 0x7F;
2764 dts2 = (msr >> 8) & 0x7F;
b7d8c148 2765 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
889facbe
LB		 2766 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
2767#endif
2768 }
2769
2770 return 0;
2771}
36229897 2772
889facbe
LB		 2773void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
2774{
b7d8c148 2775 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
889facbe
LB		 2776 cpu, label,
2777 ((msr >> 15) & 1) ? "EN" : "DIS",
2778 ((msr >> 0) & 0x7FFF) * rapl_power_units,
2779 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
2780 (((msr >> 16) & 1) ? "EN" : "DIS"));
2781
2782 return;
2783}
2784
2785int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
2786{
2787 unsigned long long msr;
2788 int cpu;
889facbe
LB		 2789
2790 if (!do_rapl)
2791 return 0;
2792
2793 /* RAPL counters are per package, so print only for 1st thread/package */
2794 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
2795 return 0;
2796
2797 cpu = t->cpu_id;
2798 if (cpu_migrate(cpu)) {
b7d8c148 2799 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 2800 return -1;
2801 }
2802
2803 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
2804 return -1;
2805
d8af6f5f 2806 if (debug) {
b7d8c148 2807 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
889facbe 2808 "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
144b44b1 2809 rapl_power_units, rapl_energy_units, rapl_time_units);
889facbe 2810 }
144b44b1
LB		 2811 if (do_rapl & RAPL_PKG_POWER_INFO) {
2812
889facbe
LB		 2813 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
2814 return -5;
2815
2816
b7d8c148 2817 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 2818 cpu, msr,
2819 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2820 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2821 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2822 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
2823
144b44b1
LB		 2824 }
2825 if (do_rapl & RAPL_PKG) {
2826
889facbe
LB		 2827 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
2828 return -9;
2829
b7d8c148 2830 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
889facbe
LB		 2831 cpu, msr, (msr >> 63) & 1 ? "": "UN");
2832
2833 print_power_limit_msr(cpu, msr, "PKG Limit #1");
b7d8c148 2834 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
889facbe
LB		 2835 cpu,
2836 ((msr >> 47) & 1) ? "EN" : "DIS",
2837 ((msr >> 32) & 0x7FFF) * rapl_power_units,
2838 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
2839 ((msr >> 48) & 1) ? "EN" : "DIS");
2840 }
2841
0b2bb692 2842 if (do_rapl & RAPL_DRAM_POWER_INFO) {
889facbe
LB		 2843 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
2844 return -6;
2845
b7d8c148 2846 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
889facbe
LB		 2847 cpu, msr,
2848 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2849 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2850 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
2851 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
0b2bb692
LB		 2852 }
2853 if (do_rapl & RAPL_DRAM) {
889facbe
LB		 2854 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
2855 return -9;
b7d8c148 2856 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
889facbe
LB		 2857 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2858
2859 print_power_limit_msr(cpu, msr, "DRAM Limit");
2860 }
144b44b1 2861 if (do_rapl & RAPL_CORE_POLICY) {
d8af6f5f 2862 if (debug) {
889facbe
LB		 2863 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
2864 return -7;
2865
b7d8c148 2866 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
144b44b1
LB		 2867 }
2868 }
2869 if (do_rapl & RAPL_CORES) {
d8af6f5f 2870 if (debug) {
889facbe
LB		 2871
2872 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
2873 return -9;
b7d8c148 2874 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
889facbe
LB		 2875 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2876 print_power_limit_msr(cpu, msr, "Cores Limit");
2877 }
2878 }
2879 if (do_rapl & RAPL_GFX) {
d8af6f5f 2880 if (debug) {
889facbe
LB		 2881 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
2882 return -8;
2883
b7d8c148 2884 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
889facbe
LB		 2885
2886 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
2887 return -9;
b7d8c148 2888 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
889facbe
LB		 2889 cpu, msr, (msr >> 31) & 1 ? "": "UN");
2890 print_power_limit_msr(cpu, msr, "GFX Limit");
2891 }
2892 }
2893 return 0;
2894}
2895
d7899447
LB		 2896/*
2897 * SNB adds support for additional MSRs:
2898 *
2899 * MSR_PKG_C7_RESIDENCY 0x000003fa
2900 * MSR_CORE_C7_RESIDENCY 0x000003fe
2901 * MSR_PKG_C2_RESIDENCY 0x0000060d
2902 */
103a8fea 2903
d7899447 2904int has_snb_msrs(unsigned int family, unsigned int model)
103a8fea
LB		 2905{
2906 if (!genuine_intel)
2907 return 0;
2908
2909 switch (model) {
2910 case 0x2A:
2911 case 0x2D:
650a37f3 2912 case 0x3A: /* IVB */
1300651b 2913 case 0x3E: /* IVB Xeon */
70b43400
LB		 2914 case 0x3C: /* HSW */
2915 case 0x3F: /* HSW */
2916 case 0x45: /* HSW */
149c2319 2917 case 0x46: /* HSW */
4e8e863f 2918 case 0x3D: /* BDW */
48a0631c 2919 case 0x47: /* BDW */
4e8e863f
LB		 2920 case 0x4F: /* BDX */
2921 case 0x56: /* BDX-DE */
0b2bb692
LB		 2922 case 0x4E: /* SKL */
2923 case 0x5E: /* SKL */
e4085d54 2924 case 0x5C: /* BXT */
103a8fea
LB		 2925 return 1;
2926 }
2927 return 0;
2928}
2929
d7899447
LB		 2930/*
2931 * HSW adds support for additional MSRs:
2932 *
5a63426e
LB		 2933 * MSR_PKG_C8_RESIDENCY 0x00000630
2934 * MSR_PKG_C9_RESIDENCY 0x00000631
2935 * MSR_PKG_C10_RESIDENCY 0x00000632
2936 *
2937 * MSR_PKGC8_IRTL 0x00000633
2938 * MSR_PKGC9_IRTL 0x00000634
2939 * MSR_PKGC10_IRTL 0x00000635
2940 *
d7899447
LB		 2941 */
2942int has_hsw_msrs(unsigned int family, unsigned int model)
ca58710f
KCA		 2943{
2944 if (!genuine_intel)
2945 return 0;
2946
2947 switch (model) {
4e8e863f
LB		 2948 case 0x45: /* HSW */
2949 case 0x3D: /* BDW */
0b2bb692
LB		 2950 case 0x4E: /* SKL */
2951 case 0x5E: /* SKL */
e4085d54 2952 case 0x5C: /* BXT */
0b2bb692
LB		 2953 return 1;
2954 }
2955 return 0;
2956}
2957
2958/*
2959 * SKL adds support for additional MSRS:
2960 *
2961 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
2962 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
2963 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
2964 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
2965 */
2966int has_skl_msrs(unsigned int family, unsigned int model)
2967{
2968 if (!genuine_intel)
2969 return 0;
2970
2971 switch (model) {
2972 case 0x4E: /* SKL */
2973 case 0x5E: /* SKL */
ca58710f
KCA		 2974 return 1;
2975 }
2976 return 0;
2977}
2978
2979
0b2bb692 2980
144b44b1
LB		 2981int is_slm(unsigned int family, unsigned int model)
2982{
2983 if (!genuine_intel)
2984 return 0;
2985 switch (model) {
2986 case 0x37: /* BYT */
2987 case 0x4D: /* AVN */
2988 return 1;
2989 }
2990 return 0;
2991}
2992
fb5d4327
DC		 2993int is_knl(unsigned int family, unsigned int model)
2994{
2995 if (!genuine_intel)
2996 return 0;
2997 switch (model) {
2998 case 0x57: /* KNL */
2999 return 1;
3000 }
3001 return 0;
3002}
3003
b2b34dfe
HC		 3004unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
3005{
3006 if (is_knl(family, model))
3007 return 1024;
3008 return 1;
3009}
3010
144b44b1
LB		 3011#define SLM_BCLK_FREQS 5
3012double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
3013
3014double slm_bclk(void)
3015{
3016 unsigned long long msr = 3;
3017 unsigned int i;
3018 double freq;
3019
7ce7d5de 3020 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
b7d8c148 3021 fprintf(outf, "SLM BCLK: unknown\n");
144b44b1
LB		 3022
3023 i = msr & 0xf;
3024 if (i >= SLM_BCLK_FREQS) {
b7d8c148 3025 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
144b44b1
LB		 3026 msr = 3;
3027 }
3028 freq = slm_freq_table[i];
3029
b7d8c148 3030 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
144b44b1
LB		 3031
3032 return freq;
3033}
3034
103a8fea
LB		 3035double discover_bclk(unsigned int family, unsigned int model)
3036{
121b48bb 3037 if (has_snb_msrs(family, model) || is_knl(family, model))
103a8fea 3038 return 100.00;
144b44b1
LB		 3039 else if (is_slm(family, model))
3040 return slm_bclk();
103a8fea
LB		 3041 else
3042 return 133.33;
3043}
3044
889facbe
LB		 3045/*
3046 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
3047 * the Thermal Control Circuit (TCC) activates.
3048 * This is usually equal to tjMax.
3049 *
3050 * Older processors do not have this MSR, so there we guess,
3051 * but also allow cmdline over-ride with -T.
3052 *
3053 * Several MSR temperature values are in units of degrees-C
3054 * below this value, including the Digital Thermal Sensor (DTS),
3055 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
3056 */
3057int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3058{
3059 unsigned long long msr;
3060 unsigned int target_c_local;
3061 int cpu;
3062
3063 /* tcc_activation_temp is used only for dts or ptm */
3064 if (!(do_dts || do_ptm))
3065 return 0;
3066
3067 /* this is a per-package concept */
3068 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3069 return 0;
3070
3071 cpu = t->cpu_id;
3072 if (cpu_migrate(cpu)) {
b7d8c148 3073 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
889facbe
LB		 3074 return -1;
3075 }
3076
3077 if (tcc_activation_temp_override != 0) {
3078 tcc_activation_temp = tcc_activation_temp_override;
b7d8c148 3079 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
889facbe
LB		 3080 cpu, tcc_activation_temp);
3081 return 0;
3082 }
3083
3084 /* Temperature Target MSR is Nehalem and newer only */
d7899447 3085 if (!do_nhm_platform_info)
889facbe
LB		 3086 goto guess;
3087
7ce7d5de 3088 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
889facbe
LB		 3089 goto guess;
3090
3482124a 3091 target_c_local = (msr >> 16) & 0xFF;
889facbe 3092
d8af6f5f 3093 if (debug)
b7d8c148 3094 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
889facbe
LB		 3095 cpu, msr, target_c_local);
3096
3482124a 3097 if (!target_c_local)
889facbe
LB		 3098 goto guess;
3099
3100 tcc_activation_temp = target_c_local;
3101
3102 return 0;
3103
3104guess:
3105 tcc_activation_temp = TJMAX_DEFAULT;
b7d8c148 3106 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
889facbe
LB		 3107 cpu, tcc_activation_temp);
3108
3109 return 0;
3110}
69807a63 3111
aa8d8cc7
LB		 3112void decode_feature_control_msr(void)
3113{
3114 unsigned long long msr;
3115
3116 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
3117 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
3118 base_cpu, msr,
3119 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
3120 msr & (1 << 18) ? "SGX" : "");
3121}
3122
69807a63
LB		 3123void decode_misc_enable_msr(void)
3124{
3125 unsigned long long msr;
3126
3127 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
b7d8c148 3128 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%s %s %s)\n",
69807a63
LB		 3129 base_cpu, msr,
3130 msr & (1 << 3) ? "TCC" : "",
3131 msr & (1 << 16) ? "EIST" : "",
3132 msr & (1 << 18) ? "MONITOR" : "");
3133}
3134
f0057310
LB		 3135/*
3136 * Decode MSR_MISC_PWR_MGMT
3137 *
3138 * Decode the bits according to the Nehalem documentation
3139 * bit[0] seems to continue to have same meaning going forward
3140 * bit[1] less so...
3141 */
3142void decode_misc_pwr_mgmt_msr(void)
3143{
3144 unsigned long long msr;
3145
3146 if (!do_nhm_platform_info)
3147 return;
3148
3149 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
b7d8c148 3150 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB)\n",
f0057310
LB		 3151 base_cpu, msr,
3152 msr & (1 << 0) ? "DIS" : "EN",
3153 msr & (1 << 1) ? "EN" : "DIS");
3154}
7f5c258e 3155
fcd17211 3156void process_cpuid()
103a8fea 3157{
61a87ba7 3158 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
103a8fea
LB		 3159 unsigned int fms, family, model, stepping;
3160
3161 eax = ebx = ecx = edx = 0;
3162
5aea2f7f 3163 __cpuid(0, max_level, ebx, ecx, edx);
103a8fea
LB		 3164
3165 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
3166 genuine_intel = 1;
3167
d8af6f5f 3168 if (debug)
b7d8c148 3169 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
103a8fea
LB		 3170 (char *)&ebx, (char *)&edx, (char *)&ecx);
3171
5aea2f7f 3172 __cpuid(1, fms, ebx, ecx, edx);
103a8fea
LB		 3173 family = (fms >> 8) & 0xf;
3174 model = (fms >> 4) & 0xf;
3175 stepping = fms & 0xf;
3176 if (family == 6 || family == 0xf)
3177 model += ((fms >> 16) & 0xf) << 4;
3178
69807a63 3179 if (debug) {
b7d8c148 3180 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
103a8fea 3181 max_level, family, model, stepping, family, model, stepping);
aa8d8cc7 3182 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
69807a63
LB		 3183 ecx & (1 << 0) ? "SSE3" : "-",
3184 ecx & (1 << 3) ? "MONITOR" : "-",
aa8d8cc7 3185 ecx & (1 << 6) ? "SMX" : "-",
69807a63
LB		 3186 ecx & (1 << 7) ? "EIST" : "-",
3187 ecx & (1 << 8) ? "TM2" : "-",
3188 edx & (1 << 4) ? "TSC" : "-",
3189 edx & (1 << 5) ? "MSR" : "-",
3190 edx & (1 << 22) ? "ACPI-TM" : "-",
3191 edx & (1 << 29) ? "TM" : "-");
3192 }
103a8fea 3193
b2c95d90
JT		 3194 if (!(edx & (1 << 5)))
3195 errx(1, "CPUID: no MSR");
103a8fea
LB		 3196
3197 /*
3198 * check max extended function levels of CPUID.
3199 * This is needed to check for invariant TSC.
3200 * This check is valid for both Intel and AMD.
3201 */
3202 ebx = ecx = edx = 0;
5aea2f7f 3203 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
103a8fea 3204
61a87ba7 3205 if (max_extended_level >= 0x80000007) {
103a8fea 3206
d7899447
LB		 3207 /*
3208 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
3209 * this check is valid for both Intel and AMD
3210 */
5aea2f7f 3211 __cpuid(0x80000007, eax, ebx, ecx, edx);
d7899447
LB		 3212 has_invariant_tsc = edx & (1 << 8);
3213 }
103a8fea
LB		 3214
3215 /*
3216 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3217 * this check is valid for both Intel and AMD
3218 */
3219
5aea2f7f 3220 __cpuid(0x6, eax, ebx, ecx, edx);
8209e054 3221 has_aperf = ecx & (1 << 0);
889facbe
LB		 3222 do_dts = eax & (1 << 0);
3223 do_ptm = eax & (1 << 6);
7f5c258e
LB		 3224 has_hwp = eax & (1 << 7);
3225 has_hwp_notify = eax & (1 << 8);
3226 has_hwp_activity_window = eax & (1 << 9);
3227 has_hwp_epp = eax & (1 << 10);
3228 has_hwp_pkg = eax & (1 << 11);
889facbe
LB		 3229 has_epb = ecx & (1 << 3);
3230
d8af6f5f 3231 if (debug)
b7d8c148 3232 fprintf(outf, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sHWP, "
7f5c258e
LB		 3233 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
3234 has_aperf ? "" : "No-",
3235 do_dts ? "" : "No-",
3236 do_ptm ? "" : "No-",
3237 has_hwp ? "" : "No-",
3238 has_hwp_notify ? "" : "No-",
3239 has_hwp_activity_window ? "" : "No-",
3240 has_hwp_epp ? "" : "No-",
3241 has_hwp_pkg ? "" : "No-",
3242 has_epb ? "" : "No-");
103a8fea 3243
69807a63
LB		 3244 if (debug)
3245 decode_misc_enable_msr();
3246
8ae72255 3247 if (max_level >= 0x7 && debug) {
aa8d8cc7
LB		 3248 int has_sgx;
3249
3250 ecx = 0;
3251
3252 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
3253
3254 has_sgx = ebx & (1 << 2);
3255 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
3256
3257 if (has_sgx)
3258 decode_feature_control_msr();
3259 }
3260
61a87ba7 3261 if (max_level >= 0x15) {
8a5bdf41
LB		 3262 unsigned int eax_crystal;
3263 unsigned int ebx_tsc;
3264
3265 /*
3266 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
3267 */
3268 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
5aea2f7f 3269 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
8a5bdf41
LB		 3270
3271 if (ebx_tsc != 0) {
3272
3273 if (debug && (ebx != 0))
b7d8c148 3274 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
8a5bdf41
LB		 3275 eax_crystal, ebx_tsc, crystal_hz);
3276
3277 if (crystal_hz == 0)
3278 switch(model) {
3279 case 0x4E: /* SKL */
3280 case 0x5E: /* SKL */
3281 crystal_hz = 24000000; /* 24 MHz */
3282 break;
3283 default:
3284 crystal_hz = 0;
3285 }
3286
3287 if (crystal_hz) {
3288 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
3289 if (debug)
b7d8c148 3290 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
8a5bdf41
LB		 3291 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
3292 }
3293 }
3294 }
61a87ba7
LB		 3295 if (max_level >= 0x16) {
3296 unsigned int base_mhz, max_mhz, bus_mhz, edx;
3297
3298 /*
3299 * CPUID 16H Base MHz, Max MHz, Bus MHz
3300 */
3301 base_mhz = max_mhz = bus_mhz = edx = 0;
3302
5aea2f7f 3303 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
61a87ba7 3304 if (debug)
b7d8c148 3305 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
61a87ba7
LB		 3306 base_mhz, max_mhz, bus_mhz);
3307 }
8a5bdf41 3308
b2b34dfe
HC		 3309 if (has_aperf)
3310 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3311
ee7e38e3 3312 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
d7899447 3313 do_snb_cstates = has_snb_msrs(family, model);
5a63426e 3314 do_irtl_snb = has_snb_msrs(family, model);
ee7e38e3
LB		 3315 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3316 do_pc3 = (pkg_cstate_limit >= PCL__3);
3317 do_pc6 = (pkg_cstate_limit >= PCL__6);
3318 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
d7899447 3319 do_c8_c9_c10 = has_hsw_msrs(family, model);
5a63426e 3320 do_irtl_hsw = has_hsw_msrs(family, model);
0b2bb692 3321 do_skl_residency = has_skl_msrs(family, model);
144b44b1 3322 do_slm_cstates = is_slm(family, model);
fb5d4327 3323 do_knl_cstates = is_knl(family, model);
103a8fea 3324
f0057310
LB		 3325 if (debug)
3326 decode_misc_pwr_mgmt_msr();
3327
889facbe 3328 rapl_probe(family, model);
3a9a941d 3329 perf_limit_reasons_probe(family, model);
889facbe 3330
fcd17211 3331 if (debug)
58cc30a4 3332 dump_cstate_pstate_config_info(family, model);
fcd17211 3333
a2b7b749
LB		 3334 if (has_skl_msrs(family, model))
3335 calculate_tsc_tweak();
3336
fdf676e5
LB		 3337 do_gfx_rc6_ms = !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK);
3338
27d47356
LB		 3339 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK);
3340
889facbe 3341 return;
103a8fea
LB		 3342}
3343
d8af6f5f 3344void help()
103a8fea 3345{
b7d8c148 3346 fprintf(outf,
d8af6f5f
LB		 3347 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
3348 "\n"
3349 "Turbostat forks the specified COMMAND and prints statistics\n"
3350 "when COMMAND completes.\n"
3351 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
3352 "to print statistics, until interrupted.\n"
3353 "--debug run in \"debug\" mode\n"
3354 "--interval sec Override default 5-second measurement interval\n"
3355 "--help print this help message\n"
3356 "--counter msr print 32-bit counter at address \"msr\"\n"
3357 "--Counter msr print 64-bit Counter at address \"msr\"\n"
b7d8c148 3358 "--out file create or truncate \"file\" for all output\n"
d8af6f5f
LB		 3359 "--msr msr print 32-bit value at address \"msr\"\n"
3360 "--MSR msr print 64-bit Value at address \"msr\"\n"
3361 "--version print version information\n"
3362 "\n"
3363 "For more help, run \"man turbostat\"\n");
103a8fea
LB		 3364}
3365
3366
3367/*
3368 * in /dev/cpu/ return success for names that are numbers
3369 * ie. filter out ".", "..", "microcode".
3370 */
3371int dir_filter(const struct dirent *dirp)
3372{
3373 if (isdigit(dirp->d_name[0]))
3374 return 1;
3375 else
3376 return 0;
3377}
3378
3379int open_dev_cpu_msr(int dummy1)
3380{
3381 return 0;
3382}
3383
c98d5d94
LB		 3384void topology_probe()
3385{
3386 int i;
3387 int max_core_id = 0;
3388 int max_package_id = 0;
3389 int max_siblings = 0;
3390 struct cpu_topology {
3391 int core_id;
3392 int physical_package_id;
3393 } *cpus;
3394
3395 /* Initialize num_cpus, max_cpu_num */
3396 topo.num_cpus = 0;
3397 topo.max_cpu_num = 0;
3398 for_all_proc_cpus(count_cpus);
3399 if (!summary_only && topo.num_cpus > 1)
3400 show_cpu = 1;
3401
d8af6f5f 3402 if (debug > 1)
b7d8c148 3403 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
c98d5d94
LB		 3404
3405 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
b2c95d90
JT		 3406 if (cpus == NULL)
3407 err(1, "calloc cpus");
c98d5d94
LB		 3408
3409 /*
3410 * Allocate and initialize cpu_present_set
3411 */
3412 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 3413 if (cpu_present_set == NULL)
3414 err(3, "CPU_ALLOC");
c98d5d94
LB		 3415 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3416 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
3417 for_all_proc_cpus(mark_cpu_present);
3418
3419 /*
3420 * Allocate and initialize cpu_affinity_set
3421 */
3422 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
b2c95d90
JT		 3423 if (cpu_affinity_set == NULL)
3424 err(3, "CPU_ALLOC");
c98d5d94
LB		 3425 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
3426 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
3427
3428
3429 /*
3430 * For online cpus
3431 * find max_core_id, max_package_id
3432 */
3433 for (i = 0; i <= topo.max_cpu_num; ++i) {
3434 int siblings;
3435
3436 if (cpu_is_not_present(i)) {
d8af6f5f 3437 if (debug > 1)
b7d8c148 3438 fprintf(outf, "cpu%d NOT PRESENT\n", i);
c98d5d94
LB		 3439 continue;
3440 }
3441 cpus[i].core_id = get_core_id(i);
3442 if (cpus[i].core_id > max_core_id)
3443 max_core_id = cpus[i].core_id;
3444
3445 cpus[i].physical_package_id = get_physical_package_id(i);
3446 if (cpus[i].physical_package_id > max_package_id)
3447 max_package_id = cpus[i].physical_package_id;
3448
3449 siblings = get_num_ht_siblings(i);
3450 if (siblings > max_siblings)
3451 max_siblings = siblings;
d8af6f5f 3452 if (debug > 1)
b7d8c148 3453 fprintf(outf, "cpu %d pkg %d core %d\n",
c98d5d94
LB		 3454 i, cpus[i].physical_package_id, cpus[i].core_id);
3455 }
3456 topo.num_cores_per_pkg = max_core_id + 1;
d8af6f5f 3457 if (debug > 1)
b7d8c148 3458 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
c98d5d94 3459 max_core_id, topo.num_cores_per_pkg);
1cc21f7b 3460 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
c98d5d94
LB		 3461 show_core = 1;
3462
3463 topo.num_packages = max_package_id + 1;
d8af6f5f 3464 if (debug > 1)
b7d8c148 3465 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
c98d5d94 3466 max_package_id, topo.num_packages);
1cc21f7b 3467 if (debug && !summary_only && topo.num_packages > 1)
c98d5d94
LB		 3468 show_pkg = 1;
3469
3470 topo.num_threads_per_core = max_siblings;
d8af6f5f 3471 if (debug > 1)
b7d8c148 3472 fprintf(outf, "max_siblings %d\n", max_siblings);
c98d5d94
LB		 3473
3474 free(cpus);
3475}
3476
3477void
3478allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
3479{
3480 int i;
3481
3482 *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
3483 topo.num_packages, sizeof(struct thread_data));
3484 if (*t == NULL)
3485 goto error;
3486
3487 for (i = 0; i < topo.num_threads_per_core *
3488 topo.num_cores_per_pkg * topo.num_packages; i++)
3489 (*t)[i].cpu_id = -1;
3490
3491 *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
3492 sizeof(struct core_data));
3493 if (*c == NULL)
3494 goto error;
3495
3496 for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
3497 (*c)[i].core_id = -1;
3498
3499 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
3500 if (*p == NULL)
3501 goto error;
3502
3503 for (i = 0; i < topo.num_packages; i++)
3504 (*p)[i].package_id = i;
3505
3506 return;
3507error:
b2c95d90 3508 err(1, "calloc counters");
c98d5d94
LB		 3509}
3510/*
3511 * init_counter()
3512 *
3513 * set cpu_id, core_num, pkg_num
3514 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
3515 *
3516 * increment topo.num_cores when 1st core in pkg seen
3517 */
3518void init_counter(struct thread_data *thread_base, struct core_data *core_base,
3519 struct pkg_data *pkg_base, int thread_num, int core_num,
3520 int pkg_num, int cpu_id)
3521{
3522 struct thread_data *t;
3523 struct core_data *c;
3524 struct pkg_data *p;
3525
3526 t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
3527 c = GET_CORE(core_base, core_num, pkg_num);
3528 p = GET_PKG(pkg_base, pkg_num);
3529
3530 t->cpu_id = cpu_id;
3531 if (thread_num == 0) {
3532 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
3533 if (cpu_is_first_core_in_package(cpu_id))
3534 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
3535 }
3536
3537 c->core_id = core_num;
3538 p->package_id = pkg_num;
3539}
3540
3541
3542int initialize_counters(int cpu_id)
3543{
3544 int my_thread_id, my_core_id, my_package_id;
3545
3546 my_package_id = get_physical_package_id(cpu_id);
3547 my_core_id = get_core_id(cpu_id);
e275b388
DC		 3548 my_thread_id = get_cpu_position_in_core(cpu_id);
3549 if (!my_thread_id)
c98d5d94 3550 topo.num_cores++;
c98d5d94
LB		 3551
3552 init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3553 init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
3554 return 0;
3555}
3556
3557void allocate_output_buffer()
3558{
3b4d5c7f 3559 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
c98d5d94 3560 outp = output_buffer;
b2c95d90
JT		 3561 if (outp == NULL)
3562 err(-1, "calloc output buffer");
c98d5d94 3563}
36229897
LB		 3564void allocate_fd_percpu(void)
3565{
3566 fd_percpu = calloc(topo.max_cpu_num, sizeof(int));
3567 if (fd_percpu == NULL)
3568 err(-1, "calloc fd_percpu");
3569}
562a2d37
LB		 3570void allocate_irq_buffers(void)
3571{
3572 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
3573 if (irq_column_2_cpu == NULL)
3574 err(-1, "calloc %d", topo.num_cpus);
3575
3576 irqs_per_cpu = calloc(topo.max_cpu_num, sizeof(int));
3577 if (irqs_per_cpu == NULL)
3578 err(-1, "calloc %d", topo.max_cpu_num);
3579}
c98d5d94
LB		 3580void setup_all_buffers(void)
3581{
3582 topology_probe();
562a2d37 3583 allocate_irq_buffers();
36229897 3584 allocate_fd_percpu();
c98d5d94
LB		 3585 allocate_counters(&thread_even, &core_even, &package_even);
3586 allocate_counters(&thread_odd, &core_odd, &package_odd);
3587 allocate_output_buffer();
3588 for_all_proc_cpus(initialize_counters);
3589}
3b4d5c7f 3590
7ce7d5de
PB		 3591void set_base_cpu(void)
3592{
3593 base_cpu = sched_getcpu();
3594 if (base_cpu < 0)
3595 err(-ENODEV, "No valid cpus found");
3596
3597 if (debug > 1)
b7d8c148 3598 fprintf(outf, "base_cpu = %d\n", base_cpu);
7ce7d5de
PB		 3599}
3600
103a8fea
LB		 3601void turbostat_init()
3602{
7ce7d5de
PB		 3603 setup_all_buffers();
3604 set_base_cpu();
103a8fea 3605 check_dev_msr();
98481e79 3606 check_permissions();
fcd17211 3607 process_cpuid();
103a8fea 3608
103a8fea 3609
7f5c258e
LB		 3610 if (debug)
3611 for_all_cpus(print_hwp, ODD_COUNTERS);
3612
d8af6f5f 3613 if (debug)
889facbe
LB		 3614 for_all_cpus(print_epb, ODD_COUNTERS);
3615
d8af6f5f 3616 if (debug)
3a9a941d
LB		 3617 for_all_cpus(print_perf_limit, ODD_COUNTERS);
3618
d8af6f5f 3619 if (debug)
889facbe
LB		 3620 for_all_cpus(print_rapl, ODD_COUNTERS);
3621
3622 for_all_cpus(set_temperature_target, ODD_COUNTERS);
3623
d8af6f5f 3624 if (debug)
889facbe 3625 for_all_cpus(print_thermal, ODD_COUNTERS);
5a63426e
LB		 3626
3627 if (debug && do_irtl_snb)
3628 print_irtl();
103a8fea
LB		 3629}
3630
3631int fork_it(char **argv)
3632{
103a8fea 3633 pid_t child_pid;
d91bb17c 3634 int status;
d15cf7c1 3635
d91bb17c
LB		 3636 status = for_all_cpus(get_counters, EVEN_COUNTERS);
3637 if (status)
3638 exit(status);
c98d5d94
LB		 3639 /* clear affinity side-effect of get_counters() */
3640 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
103a8fea
LB		 3641 gettimeofday(&tv_even, (struct timezone *)NULL);
3642
3643 child_pid = fork();
3644 if (!child_pid) {
3645 /* child */
3646 execvp(argv[0], argv);
3647 } else {
103a8fea
LB		 3648
3649 /* parent */
b2c95d90
JT		 3650 if (child_pid == -1)
3651 err(1, "fork");
103a8fea
LB		 3652
3653 signal(SIGINT, SIG_IGN);
3654 signal(SIGQUIT, SIG_IGN);
b2c95d90
JT		 3655 if (waitpid(child_pid, &status, 0) == -1)
3656 err(status, "waitpid");
103a8fea 3657 }
c98d5d94
LB		 3658 /*
3659 * n.b. fork_it() does not check for errors from for_all_cpus()
3660 * because re-starting is problematic when forking
3661 */
3662 for_all_cpus(get_counters, ODD_COUNTERS);
103a8fea 3663 gettimeofday(&tv_odd, (struct timezone *)NULL);
103a8fea 3664 timersub(&tv_odd, &tv_even, &tv_delta);
c98d5d94
LB		 3665 for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
3666 compute_average(EVEN_COUNTERS);
3667 format_all_counters(EVEN_COUNTERS);
103a8fea 3668
b7d8c148
LB		 3669 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
3670
3671 flush_output_stderr();
103a8fea 3672
d91bb17c 3673 return status;
103a8fea
LB		 3674}
3675
3b4d5c7f
AS		 3676int get_and_dump_counters(void)
3677{
3678 int status;
3679
3680 status = for_all_cpus(get_counters, ODD_COUNTERS);
3681 if (status)
3682 return status;
3683
3684 status = for_all_cpus(dump_counters, ODD_COUNTERS);
3685 if (status)
3686 return status;
3687
b7d8c148 3688 flush_output_stdout();
3b4d5c7f
AS		 3689
3690 return status;
3691}
3692
d8af6f5f 3693void print_version() {
0102b067 3694 fprintf(outf, "turbostat version 4.11 27 Feb 2016"
d8af6f5f
LB		 3695 " - Len Brown <lenb@kernel.org>\n");
3696}
3697
103a8fea
LB		 3698void cmdline(int argc, char **argv)
3699{
3700 int opt;
d8af6f5f
LB		 3701 int option_index = 0;
3702 static struct option long_options[] = {
3703 {"Counter", required_argument, 0, 'C'},
3704 {"counter", required_argument, 0, 'c'},
3705 {"Dump", no_argument, 0, 'D'},
3706 {"debug", no_argument, 0, 'd'},
3707 {"interval", required_argument, 0, 'i'},
3708 {"help", no_argument, 0, 'h'},
3709 {"Joules", no_argument, 0, 'J'},
3710 {"MSR", required_argument, 0, 'M'},
3711 {"msr", required_argument, 0, 'm'},
b7d8c148 3712 {"out", required_argument, 0, 'o'},
d8af6f5f
LB		 3713 {"Package", no_argument, 0, 'p'},
3714 {"processor", no_argument, 0, 'p'},
3715 {"Summary", no_argument, 0, 'S'},
3716 {"TCC", required_argument, 0, 'T'},
3717 {"version", no_argument, 0, 'v' },
3718 {0, 0, 0, 0 }
3719 };
103a8fea
LB		 3720
3721 progname = argv[0];
3722
b7d8c148 3723 while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:o:PpST:v",
d8af6f5f 3724 long_options, &option_index)) != -1) {
103a8fea 3725 switch (opt) {
d8af6f5f
LB		 3726 case 'C':
3727 sscanf(optarg, "%x", &extra_delta_offset64);
c98d5d94 3728 break;
d8af6f5f
LB		 3729 case 'c':
3730 sscanf(optarg, "%x", &extra_delta_offset32);
c98d5d94 3731 break;
d8af6f5f 3732 case 'D':
3b4d5c7f
AS		 3733 dump_only++;
3734 break;
d8af6f5f
LB		 3735 case 'd':
3736 debug++;
103a8fea 3737 break;
d8af6f5f
LB		 3738 case 'h':
3739 default:
3740 help();
3741 exit(1);
103a8fea 3742 case 'i':
2a0609c0
LB		 3743 {
3744 double interval = strtod(optarg, NULL);
3745
3746 if (interval < 0.001) {
b7d8c148 3747 fprintf(outf, "interval %f seconds is too small\n",
2a0609c0
LB		 3748 interval);
3749 exit(2);
3750 }
3751
3752 interval_ts.tv_sec = interval;
3753 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
3754 }
103a8fea 3755 break;
d8af6f5f
LB		 3756 case 'J':
3757 rapl_joules++;
8e180f3c 3758 break;
d8af6f5f
LB		 3759 case 'M':
3760 sscanf(optarg, "%x", &extra_msr_offset64);
8e180f3c 3761 break;
2f32edf1
LB		 3762 case 'm':
3763 sscanf(optarg, "%x", &extra_msr_offset32);
2f32edf1 3764 break;
b7d8c148
LB		 3765 case 'o':
3766 outf = fopen_or_die(optarg, "w");
3767 break;
d8af6f5f
LB		 3768 case 'P':
3769 show_pkg_only++;
3770 break;
3771 case 'p':
3772 show_core_only++;
103a8fea 3773 break;
d8af6f5f
LB		 3774 case 'S':
3775 summary_only++;
889facbe
LB		 3776 break;
3777 case 'T':
3778 tcc_activation_temp_override = atoi(optarg);
3779 break;
d8af6f5f
LB		 3780 case 'v':
3781 print_version();
3782 exit(0);
5c56be9a 3783 break;
103a8fea
LB		 3784 }
3785 }
3786}
3787
3788int main(int argc, char **argv)
3789{
b7d8c148
LB		 3790 outf = stderr;
3791
103a8fea
LB		 3792 cmdline(argc, argv);
3793
d8af6f5f
LB		 3794 if (debug)
3795 print_version();
103a8fea
LB		 3796
3797 turbostat_init();
3798
3b4d5c7f
AS		 3799 /* dump counters and exit */
3800 if (dump_only)
3801 return get_and_dump_counters();
3802
103a8fea
LB		 3803 /*
3804 * if any params left, it must be a command to fork
3805 */
3806 if (argc - optind)
3807 return fork_it(argv + optind);
3808 else
3809 turbostat_loop();
3810
3811 return 0;
3812}
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