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Commit | Line | Data |
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94a420b1 SH |
1 | # Trace events for debugging and performance instrumentation |
2 | # | |
3 | # This file is processed by the tracetool script during the build. | |
4 | # | |
5 | # To add a new trace event: | |
6 | # | |
7 | # 1. Choose a name for the trace event. Declare its arguments and format | |
8 | # string. | |
9 | # | |
10 | # 2. Call the trace event from code using trace_##name, e.g. multiwrite_cb() -> | |
11 | # trace_multiwrite_cb(). The source file must #include "trace.h". | |
12 | # | |
13 | # Format of a trace event: | |
14 | # | |
1e2cf2bc | 15 | # [disable] <name>(<type1> <arg1>[, <type2> <arg2>] ...) "<format-string>" |
94a420b1 | 16 | # |
a74cd8cc | 17 | # Example: g_malloc(size_t size) "size %zu" |
94a420b1 | 18 | # |
1e2cf2bc | 19 | # The "disable" keyword will build without the trace event. |
1e2cf2bc | 20 | # |
94a420b1 SH |
21 | # The <name> must be a valid as a C function name. |
22 | # | |
23 | # Types should be standard C types. Use void * for pointers because the trace | |
24 | # system may not have the necessary headers included. | |
25 | # | |
26 | # The <format-string> should be a sprintf()-compatible format string. | |
cd245a19 | 27 | |
d354c7ec | 28 | # thread-pool.c |
b811203c SH |
29 | thread_pool_submit(void *pool, void *req, void *opaque) "pool %p req %p opaque %p" |
30 | thread_pool_complete(void *pool, void *req, void *opaque, int ret) "pool %p req %p opaque %p ret %d" | |
d354c7ec PB |
31 | thread_pool_cancel(void *req, void *opaque) "req %p opaque %p" |
32 | ||
bd3c9aa5 | 33 | # ioport.c |
6f94b7d9 PB |
34 | cpu_in(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u" |
35 | cpu_out(unsigned int addr, char size, unsigned int val) "addr %#x(%c) value %u" | |
62dd89de PS |
36 | |
37 | # balloon.c | |
38 | # Since requests are raised via monitor, not many tracepoints are needed. | |
47f08d7a | 39 | balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
6411dd13 | 40 | virtio_balloon_handle_output(const char *name, uint64_t gpa) "section name: %s gpa: %"PRIx64 |
a6d4953b SW |
41 | virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages: %d actual: %d" |
42 | virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d oldactual: %d" | |
6adfdc5a | 43 | virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon target: %"PRIx64" num_pages: %d" |
d8023f31 | 44 | |
94b0b5ff | 45 | # vl.c |
47f08d7a | 46 | vm_state_notify(int running, int reason) "running %d reason %d" |
4524051c | 47 | load_file(const char *name, const char *path) "name %s location %s" |
7e866003 | 48 | runstate_set(int new_state) "new state %d" |
4fed9421 | 49 | system_wakeup_request(int reason) "reason=%d" |
bc78cff9 YZ |
50 | qemu_system_shutdown_request(void) "" |
51 | qemu_system_powerdown_request(void) "" | |
298800ca | 52 | |
cbcc6336 | 53 | # spice-qemu-char.c |
47f08d7a LV |
54 | spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
55 | spice_vmc_read(int bytes, int len) "spice read %d of requested %d" | |
56 | spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" | |
57 | spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" | |
5a49d3e9 | 58 | spice_vmc_event(int event) "spice vmc event %d" |
4ef66fa7 | 59 | |
3ba00637 | 60 | # hw/sd/milkymist-memcard.c |
47f08d7a LV |
61 | milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
62 | milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" | |
07424544 | 63 | |
3ba00637 | 64 | # hw/isa/pc87312.c |
1ae41f44 HP |
65 | pc87312_io_read(uint32_t addr, uint32_t val) "read addr=%x val=%x" |
66 | pc87312_io_write(uint32_t addr, uint32_t val) "write addr=%x val=%x" | |
67 | pc87312_info_floppy(uint32_t base) "base 0x%x" | |
68 | pc87312_info_ide(uint32_t base) "base 0x%x" | |
69 | pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u" | |
70 | pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u" | |
71 | ||
40893768 | 72 | # xen-hvm.c |
47f08d7a | 73 | xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
20581d20 | 74 | xen_client_set_memory(uint64_t start_addr, unsigned long size, bool log_dirty) "%#"PRIx64" size %#lx, log_dirty %i" |
3996e85c PD |
75 | xen_ioreq_server_create(uint32_t id) "id: %u" |
76 | xen_ioreq_server_destroy(uint32_t id) "id: %u" | |
77 | xen_ioreq_server_state(uint32_t id, bool enable) "id: %u: enable: %i" | |
78 | xen_map_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64 | |
79 | xen_unmap_mmio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64 | |
80 | xen_map_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64 | |
81 | xen_unmap_portio_range(uint32_t id, uint64_t start_addr, uint64_t end_addr) "id: %u start: %#"PRIx64" end: %#"PRIx64 | |
82 | xen_map_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x" | |
83 | xen_unmap_pcidev(uint32_t id, uint8_t bus, uint8_t dev, uint8_t func) "id: %u bdf: %02x.%02x.%02x" | |
eeb6b13a DS |
84 | handle_ioreq(void *req, uint32_t type, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p type=%d dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d" |
85 | handle_ioreq_read(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p read type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d" | |
86 | handle_ioreq_write(void *req, uint32_t type, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p write type=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d" | |
87 | cpu_ioreq_pio(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p pio dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d" | |
88 | cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio read reg data=%#"PRIx64" port=%#"PRIx64" size=%d" | |
89 | cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t size) "I/O=%p pio write reg data=%#"PRIx64" port=%#"PRIx64" size=%d" | |
90 | cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr, uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=%p copy dir=%d df=%d ptr=%d port=%#"PRIx64" data=%#"PRIx64" count=%d size=%d" | |
432d268c JN |
91 | |
92 | # xen-mapcache.c | |
689d7e2f SH |
93 | xen_map_cache(uint64_t phys_addr) "want %#"PRIx64 |
94 | xen_remap_bucket(uint64_t index) "index %#"PRIx64 | |
47f08d7a | 95 | xen_map_cache_return(void* ptr) "%p" |
050a0ddf | 96 | |
40893768 | 97 | # hw/i386/xen/xen_platform.c |
47f08d7a | 98 | xen_platform_log(char *s) "xen platform: %s" |
00dccaf1 KW |
99 | |
100 | # qemu-coroutine.c | |
47f08d7a LV |
101 | qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
102 | qemu_coroutine_yield(void *from, void *to) "from %p to %p" | |
103 | qemu_coroutine_terminate(void *co) "self %p" | |
b96e9247 KW |
104 | |
105 | # qemu-coroutine-lock.c | |
02ffb504 | 106 | qemu_co_queue_run_restart(void *co) "co %p" |
bfe24e1a | 107 | qemu_co_queue_next(void *nxt) "next %p" |
47f08d7a LV |
108 | qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
109 | qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" | |
110 | qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" | |
111 | qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" | |
30c2f238 | 112 | |
89bd820a SH |
113 | # monitor.c |
114 | handle_qmp_command(void *mon, const char *cmd_name) "mon %p cmd_name \"%s\"" | |
115 | monitor_protocol_emitter(void *mon) "mon %p" | |
93f8f982 | 116 | monitor_protocol_event_handler(uint32_t event, void *qdict) "event=%d data=%p" |
afeecec2 | 117 | monitor_protocol_event_emit(uint32_t event, void *data) "event=%d data=%p" |
93f8f982 | 118 | monitor_protocol_event_queue(uint32_t event, void *qdict, uint64_t rate) "event=%d data=%p rate=%" PRId64 |
afeecec2 | 119 | monitor_protocol_event_throttle(uint32_t event, uint64_t rate) "event=%d rate=%" PRId64 |
342407fd | 120 | |
c572f23a | 121 | # hw/9pfs/virtio-9p.c |
7999f7e1 | 122 | v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" |
c572f23a HPB |
123 | v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
124 | v9fs_version_return(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" | |
c76eaf13 | 125 | v9fs_attach(uint16_t tag, uint8_t id, int32_t fid, int32_t afid, char* uname, char* aname) "tag %u id %u fid %d afid %d uname %s aname %s" |
6411dd13 | 126 | v9fs_attach_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d type %d version %d path %"PRId64 |
c572f23a HPB |
127 | v9fs_stat(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" |
128 | v9fs_stat_return(uint16_t tag, uint8_t id, int32_t mode, int32_t atime, int32_t mtime, int64_t length) "tag %d id %d stat={mode %d atime %d mtime %d length %"PRId64"}" | |
6411dd13 | 129 | v9fs_getattr(uint16_t tag, uint8_t id, int32_t fid, uint64_t request_mask) "tag %d id %d fid %d request_mask %"PRIu64 |
c572f23a HPB |
130 | v9fs_getattr_return(uint16_t tag, uint8_t id, uint64_t result_mask, uint32_t mode, uint32_t uid, uint32_t gid) "tag %d id %d getattr={result_mask %"PRId64" mode %u uid %u gid %u}" |
131 | v9fs_walk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, uint16_t nwnames) "tag %d id %d fid %d newfid %d nwnames %d" | |
132 | v9fs_walk_return(uint16_t tag, uint8_t id, uint16_t nwnames, void* qids) "tag %d id %d nwnames %d qids %p" | |
133 | v9fs_open(uint16_t tag, uint8_t id, int32_t fid, int32_t mode) "tag %d id %d fid %d mode %d" | |
134 | v9fs_open_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
135 | v9fs_lcreate(uint16_t tag, uint8_t id, int32_t dfid, int32_t flags, int32_t mode, uint32_t gid) "tag %d id %d dfid %d flags %d mode %d gid %u" | |
136 | v9fs_lcreate_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int32_t iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
137 | v9fs_fsync(uint16_t tag, uint8_t id, int32_t fid, int datasync) "tag %d id %d fid %d datasync %d" | |
138 | v9fs_clunk(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
2f008a8c | 139 | v9fs_read(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t max_count) "tag %d id %d fid %d off %"PRIu64" max_count %u" |
c572f23a | 140 | v9fs_read_return(uint16_t tag, uint8_t id, int32_t count, ssize_t err) "tag %d id %d count %d err %zd" |
2f008a8c AK |
141 | v9fs_readdir(uint16_t tag, uint8_t id, int32_t fid, uint64_t offset, uint32_t max_count) "tag %d id %d fid %d offset %"PRIu64" max_count %u" |
142 | v9fs_readdir_return(uint16_t tag, uint8_t id, uint32_t count, ssize_t retval) "tag %d id %d count %u retval %zd" | |
143 | v9fs_write(uint16_t tag, uint8_t id, int32_t fid, uint64_t off, uint32_t count, int cnt) "tag %d id %d fid %d off %"PRIu64" count %u cnt %d" | |
c572f23a HPB |
144 | v9fs_write_return(uint16_t tag, uint8_t id, int32_t total, ssize_t err) "tag %d id %d total %d err %zd" |
145 | v9fs_create(uint16_t tag, uint8_t id, int32_t fid, char* name, int32_t perm, int8_t mode) "tag %d id %d fid %d name %s perm %d mode %d" | |
146 | v9fs_create_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int iounit) "tag %d id %d qid={type %d version %d path %"PRId64"} iounit %d" | |
147 | v9fs_symlink(uint16_t tag, uint8_t id, int32_t fid, char* name, char* symname, uint32_t gid) "tag %d id %d fid %d name %s symname %s gid %u" | |
148 | v9fs_symlink_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
149 | v9fs_flush(uint16_t tag, uint8_t id, int16_t flush_tag) "tag %d id %d flush_tag %d" | |
150 | v9fs_link(uint16_t tag, uint8_t id, int32_t dfid, int32_t oldfid, char* name) "tag %d id %d dfid %d oldfid %d name %s" | |
151 | v9fs_remove(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
c76eaf13 | 152 | v9fs_wstat(uint16_t tag, uint8_t id, int32_t fid, int32_t mode, int32_t atime, int32_t mtime) "tag %u id %u fid %d stat={mode %d atime %d mtime %d}" |
c572f23a HPB |
153 | v9fs_mknod(uint16_t tag, uint8_t id, int32_t fid, int mode, int major, int minor) "tag %d id %d fid %d mode %d major %d minor %d" |
154 | v9fs_mknod_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path) "tag %d id %d qid={type %d version %d path %"PRId64"}" | |
6411dd13 | 155 | v9fs_lock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length) "tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64 |
c572f23a | 156 | v9fs_lock_return(uint16_t tag, uint8_t id, int8_t status) "tag %d id %d status %d" |
6411dd13 | 157 | v9fs_getlock(uint16_t tag, uint8_t id, int32_t fid, uint8_t type, uint64_t start, uint64_t length)"tag %d id %d fid %d type %d start %"PRIu64" length %"PRIu64 |
c572f23a | 158 | v9fs_getlock_return(uint16_t tag, uint8_t id, uint8_t type, uint64_t start, uint64_t length, uint32_t proc_id) "tag %d id %d type %d start %"PRIu64" length %"PRIu64" proc_id %u" |
c76eaf13 SW |
159 | v9fs_mkdir(uint16_t tag, uint8_t id, int32_t fid, char* name, int mode, uint32_t gid) "tag %u id %u fid %d name %s mode %d gid %u" |
160 | v9fs_mkdir_return(uint16_t tag, uint8_t id, int8_t type, int32_t version, int64_t path, int err) "tag %u id %u qid={type %d version %d path %"PRId64"} err %d" | |
c572f23a | 161 | v9fs_xattrwalk(uint16_t tag, uint8_t id, int32_t fid, int32_t newfid, char* name) "tag %d id %d fid %d newfid %d name %s" |
6411dd13 | 162 | v9fs_xattrwalk_return(uint16_t tag, uint8_t id, int64_t size) "tag %d id %d size %"PRId64 |
c572f23a HPB |
163 | v9fs_xattrcreate(uint16_t tag, uint8_t id, int32_t fid, char* name, int64_t size, int flags) "tag %d id %d fid %d name %s size %"PRId64" flags %d" |
164 | v9fs_readlink(uint16_t tag, uint8_t id, int32_t fid) "tag %d id %d fid %d" | |
165 | v9fs_readlink_return(uint16_t tag, uint8_t id, char* target) "tag %d id %d name %s" | |
ec0ceb17 BS |
166 | |
167 | # target-sparc/mmu_helper.c | |
168 | mmu_helper_dfault(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DFAULT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
169 | mmu_helper_dprot(uint64_t address, uint64_t context, int mmu_idx, uint32_t tl) "DPROT at %"PRIx64" context %"PRIx64" mmu_idx=%d tl=%d" | |
6411dd13 GK |
170 | mmu_helper_dmiss(uint64_t address, uint64_t context) "DMISS at %"PRIx64" context %"PRIx64 |
171 | mmu_helper_tfault(uint64_t address, uint64_t context) "TFAULT at %"PRIx64" context %"PRIx64 | |
172 | mmu_helper_tmiss(uint64_t address, uint64_t context) "TMISS at %"PRIx64" context %"PRIx64 | |
173 | mmu_helper_get_phys_addr_code(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64 | |
174 | mmu_helper_get_phys_addr_data(uint32_t tl, int mmu_idx, uint64_t prim_context, uint64_t sec_context, uint64_t address) "tl=%d mmu_idx=%d primary context=%"PRIx64" secondary context=%"PRIx64" address=%"PRIx64 | |
175 | mmu_helper_mmu_fault(uint64_t address, uint64_t paddr, int mmu_idx, uint32_t tl, uint64_t prim_context, uint64_t sec_context) "Translate at %"PRIx64" -> %"PRIx64", mmu_idx=%d tl=%d primary context=%"PRIx64" secondary context=%"PRIx64 | |
11e66bca | 176 | |
3ba00637 | 177 | # target-sparc/int64_helper.c |
11e66bca BS |
178 | int_helper_set_softint(uint32_t softint) "new %08x" |
179 | int_helper_clear_softint(uint32_t softint) "new %08x" | |
180 | int_helper_write_softint(uint32_t softint) "new %08x" | |
3ba00637 MA |
181 | |
182 | # target-sparc/int32_helper.c | |
11e66bca BS |
183 | int_helper_icache_freeze(void) "Instruction cache: freeze" |
184 | int_helper_dcache_freeze(void) "Data cache: freeze" | |
870be6ad BS |
185 | |
186 | # target-sparc/win_helper.c | |
187 | win_helper_gregset_error(uint32_t pstate) "ERROR in get_gregset: active pstate bits=%x" | |
188 | win_helper_switch_pstate(uint32_t pstate_regs, uint32_t new_pstate_regs) "change_pstate: switching regs old=%x new=%x" | |
189 | win_helper_no_switch_pstate(uint32_t new_pstate_regs) "change_pstate: regs new=%x (unchanged)" | |
190 | win_helper_wrpil(uint32_t psrpil, uint32_t new_pil) "old=%x new=%x" | |
191 | win_helper_done(uint32_t tl) "tl=%d" | |
192 | win_helper_retry(uint32_t tl) "tl=%d" | |
c57c4658 KW |
193 | |
194 | # dma-helpers.c | |
cbe0ed62 | 195 | dma_blk_io(void *dbs, void *bs, int64_t offset, bool to_dev) "dbs=%p bs=%p offset=%" PRId64 " to_dev=%d" |
c57c4658 KW |
196 | dma_aio_cancel(void *dbs) "dbs=%p" |
197 | dma_complete(void *dbs, int ret, void *cb) "dbs=%p ret=%d cb=%p" | |
4be74634 | 198 | dma_blk_cb(void *dbs, int ret) "dbs=%p ret=%d" |
c57c4658 | 199 | dma_map_wait(void *dbs) "dbs=%p" |
cdbc19dd | 200 | |
3ba00637 | 201 | # ui/console.c |
437fe106 | 202 | console_gfx_new(void) "" |
5d28b0e9 SW |
203 | console_putchar_csi(int esc_param0, int esc_param1, int ch, int nb_esc_params) "escape sequence CSI%d;%d%c, %d parameters" |
204 | console_putchar_unhandled(int ch) "unhandled escape character '%c'" | |
437fe106 GH |
205 | console_txt_new(int w, int h) "%dx%d" |
206 | console_select(int nr) "%d" | |
0f7b2864 | 207 | console_refresh(int interval) "interval %d ms" |
da229ef3 | 208 | displaysurface_create(void *display_surface, int w, int h) "surface=%p, %dx%d" |
30f1e661 | 209 | displaysurface_create_from(void *display_surface, int w, int h, uint32_t format) "surface=%p, %dx%d, format 0x%x" |
ca58b45f | 210 | displaysurface_create_pixman(void *display_surface) "surface=%p" |
da229ef3 | 211 | displaysurface_free(void *display_surface) "surface=%p" |
7c20b4a3 GH |
212 | displaychangelistener_register(void *dcl, const char *name) "%p [ %s ]" |
213 | displaychangelistener_unregister(void *dcl, const char *name) "%p [ %s ]" | |
72750018 | 214 | ppm_save(const char *filename, void *display_surface) "%s surface=%p" |
3ba00637 | 215 | |
ef0dd982 | 216 | # ui/gtk.c |
74444bc1 GH |
217 | gd_switch(const char *tab, int width, int height) "tab=%s, width=%d, height=%d" |
218 | gd_update(const char *tab, int x, int y, int w, int h) "tab=%s, x=%d, y=%d, w=%d, h=%d" | |
219 | gd_key_event(const char *tab, int gdk_keycode, int qemu_keycode, const char *action) "tab=%s, translated GDK keycode %d to QEMU keycode %d (%s)" | |
d531deef GH |
220 | gd_grab(const char *tab, const char *device, const char *reason) "tab=%s, dev=%s, reason=%s" |
221 | gd_ungrab(const char *tab, const char *device) "tab=%s, dev=%s" | |
ef0dd982 | 222 | |
40066175 GH |
223 | # ui/vnc.c |
224 | vnc_key_guest_leds(bool caps, bool num, bool scroll) "caps %d, num %d, scroll %d" | |
225 | vnc_key_map_init(const char *layout) "%s" | |
226 | vnc_key_event_ext(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x, keycode 0x%x [%s]" | |
227 | vnc_key_event_map(bool down, int sym, int keycode, const char *name) "down %d, sym 0x%x -> keycode 0x%x [%s]" | |
228 | vnc_key_sync_numlock(bool on) "%d" | |
229 | vnc_key_sync_capslock(bool on) "%d" | |
230 | ||
c43ce551 | 231 | # ui/input.c |
2386a907 | 232 | input_event_key_number(int conidx, int number, const char *qcode, bool down) "con %d, key number 0x%x [%s], down %d" |
c43ce551 GH |
233 | input_event_key_qcode(int conidx, const char *qcode, bool down) "con %d, key qcode %s, down %d" |
234 | input_event_btn(int conidx, const char *btn, bool down) "con %d, button %s, down %d" | |
235 | input_event_rel(int conidx, const char *axis, int value) "con %d, axis %s, value %d" | |
236 | input_event_abs(int conidx, const char *axis, int value) "con %d, axis %s, value 0x%x" | |
237 | input_event_sync(void) "" | |
a8dfb1c3 | 238 | input_mouse_mode(int absolute) "absolute %d" |
c43ce551 | 239 | |
3ba00637 MA |
240 | # ui/spice-display.c |
241 | qemu_spice_add_memslot(int qid, uint32_t slot_id, unsigned long virt_start, unsigned long virt_end, int async) "%d %u: host virt 0x%lx - 0x%lx async=%d" | |
242 | qemu_spice_del_memslot(int qid, uint32_t gid, uint32_t slot_id) "%d gid=%u sid=%u" | |
243 | qemu_spice_create_primary_surface(int qid, uint32_t sid, void *surface, int async) "%d sid=%u surface=%p async=%d" | |
244 | qemu_spice_destroy_primary_surface(int qid, uint32_t sid, int async) "%d sid=%u async=%d" | |
245 | qemu_spice_wakeup(uint32_t qid) "%d" | |
246 | qemu_spice_create_update(uint32_t left, uint32_t right, uint32_t top, uint32_t bottom) "lr %d -> %d, tb -> %d -> %d" | |
247 | ||
3ba00637 | 248 | # hw/ppc/spapr_pci.c |
9a321e92 | 249 | spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=%x)" |
0ee2c058 | 250 | spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=%"PRIx64 |
9a321e92 | 251 | spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr %x func %u, requested %u, first irq %u" |
0ee2c058 AK |
252 | spapr_pci_rtas_ibm_query_interrupt_source_number(unsigned ioa, unsigned intr) "queries for #%u, IRQ%u" |
253 | spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@%"PRIx64"<=%"PRIx64" IRQ %u" | |
a2950fb6 | 254 | spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" |
9a321e92 | 255 | spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at %x asked %u, have only %u" |
500efa23 | 256 | |
7828d750 | 257 | # hw/pci/pci.c |
0f288f85 LE |
258 | pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64 |
259 | pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,%#"PRIx64"+%#"PRIx64 | |
7828d750 | 260 | |
2a6593cb AK |
261 | # hw/ppc/spapr.c |
262 | spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes" | |
263 | spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" | |
264 | ||
3794d548 AK |
265 | # hw/ppc/spapr_hcall.c |
266 | spapr_cas_pvr_try(uint32_t pvr) "%x" | |
267 | spapr_cas_pvr(uint32_t cur_pvr, bool cpu_match, uint32_t new_pvr, uint64_t pcr) "current=%x, cpu_match=%u, new=%x, compat flags=%"PRIx64 | |
268 | ||
7e472264 AK |
269 | # hw/ppc/spapr_iommu.c |
270 | spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 | |
a0fcac9c | 271 | spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 |
da95324e AK |
272 | spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 |
273 | spapr_iommu_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64 | |
d9d96a3c AK |
274 | spapr_iommu_pci_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 |
275 | spapr_iommu_pci_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 | |
276 | spapr_iommu_pci_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 | |
277 | spapr_iommu_pci_stuff(uint64_t liobn, uint64_t ioba, uint64_t tce_value, uint64_t npages, uint64_t ret) "liobn=%"PRIx64" ioba=0x%"PRIx64" tcevalue=0x%"PRIx64" npages=%"PRId64" ret=%"PRId64 | |
7e472264 | 278 | spapr_iommu_xlate(uint64_t liobn, uint64_t ioba, uint64_t tce, unsigned perm, unsigned pgsize) "liobn=%"PRIx64" 0x%"PRIx64" -> 0x%"PRIx64" perm=%u mask=%x" |
fec5d3a1 | 279 | spapr_iommu_new_table(uint64_t liobn, void *table, int fd) "liobn=%"PRIx64" table=%p fd=%d" |
a26fdf39 AK |
280 | spapr_iommu_pre_save(uint64_t liobn, uint32_t nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32 |
281 | spapr_iommu_post_load(uint64_t liobn, uint32_t pre_nb, uint32_t post_nb, uint64_t offs, uint32_t ps) "liobn=%"PRIx64" %"PRIx32" => %"PRIx32" bus_offset=%"PRIx64" ps=%"PRIu32 | |
7e472264 | 282 | |
98a8b524 AK |
283 | # hw/ppc/ppc.c |
284 | ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)" | |
285 | ||
659f7f65 PB |
286 | # hw/ppc/prep.c |
287 | prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32 | |
288 | prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32 | |
289 | ||
0f5f6691 JH |
290 | # target-s390x/mmu_helper.c |
291 | get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d" | |
292 | set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d" | |
293 | ||
7b18aad5 CH |
294 | # target-s390x/ioinst.c |
295 | ioinst(const char *insn) "IOINST: %s" | |
296 | ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)" | |
297 | ioinst_chp_id(const char *insn, int cssid, int chpid) "IOINST: %s (%x.%02x)" | |
298 | ioinst_chsc_cmd(uint16_t cmd, uint16_t len) "IOINST: chsc command %04x, len %04x" | |
df1fe5bb CH |
299 | |
300 | # hw/s390x/css.c | |
301 | css_enable_facility(const char *facility) "CSS: enable %s" | |
302 | css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=%x, erc=%x, rsid=%x %s" | |
303 | css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type %02x)" | |
304 | css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image %02x %s" | |
305 | css_assign_subch(const char *do_assign, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno %04x)" | |
306 | css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm %08x, isc %x) %s" | |
7e749462 | 307 | css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc %x)" |
a5cf2bb4 CH |
308 | |
309 | # hw/s390x/virtio-ccw.c | |
310 | virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command %x" | |
311 | virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno %04x (%s)" | |
06409bd9 | 312 | virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": %x->%x" |
c09e5bb1 | 313 | |
9c775729 | 314 | # kvm-all.c |
4fe6e9ec AK |
315 | kvm_ioctl(int type, void *arg) "type 0x%x, arg %p" |
316 | kvm_vm_ioctl(int type, void *arg) "type 0x%x, arg %p" | |
317 | kvm_vcpu_ioctl(int cpu_index, int type, void *arg) "cpu_index %d, type 0x%x, arg %p" | |
b76ac80a | 318 | kvm_run_exit(int cpu_index, uint32_t reason) "cpu_index %d, reason %d" |
0a6a7cca | 319 | kvm_device_ioctl(int fd, int type, void *arg) "dev fd %d, type 0x%x, arg %p" |
ada4135f CH |
320 | kvm_failed_reg_get(uint64_t id, const char *msg) "Warning: Unable to retrieve ONEREG %" PRIu64 " from KVM: %s" |
321 | kvm_failed_reg_set(uint64_t id, const char *msg) "Warning: Unable to set ONEREG %" PRIu64 " to KVM: %s" | |
b76ac80a | 322 | |
40893768 MA |
323 | # target-ppc/kvm.c |
324 | kvm_failed_spr_set(int str, const char *msg) "Warning: Unable to set SPR %d to KVM: %s" | |
325 | kvm_failed_spr_get(int str, const char *msg) "Warning: Unable to retrieve SPR %d from KVM: %s" | |
326 | ||
6db8b538 AB |
327 | # TCG related tracing (mostly disabled by default) |
328 | # cpu-exec.c | |
329 | disable exec_tb(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR | |
330 | disable exec_tb_nocache(void *tb, uintptr_t pc) "tb:%p pc=0x%"PRIxPTR | |
819af24b | 331 | disable exec_tb_exit(void *last_tb, unsigned int flags) "tb:%p flags=%x" |
6db8b538 AB |
332 | |
333 | # translate-all.c | |
334 | translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p" | |
335 | ||
55d5d048 | 336 | # memory.c |
5a68be94 HB |
337 | memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u" |
338 | memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr %#"PRIx64" value %#"PRIx64" size %u" | |
339 | memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u" | |
340 | memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset %#"PRIx64" value %#"PRIx64" size %u" | |
f2d08942 HB |
341 | memory_region_tb_read(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u" |
342 | memory_region_tb_write(int cpu_index, uint64_t addr, uint64_t value, unsigned size) "cpu %d addr %#"PRIx64" value %#"PRIx64" size %u" | |
55d5d048 | 343 | |
fa131d94 PB |
344 | # qom/object.c |
345 | object_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" | |
346 | object_class_dynamic_cast_assert(const char *type, const char *target, const char *file, int line, const char *func) "%s->%s (%s:%d:%s)" | |
8fbab3b6 | 347 | |
40893768 | 348 | # hw/i386/xen/xen_pvdevice.c |
8fbab3b6 PD |
349 | xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address %"PRIx64")" |
350 | xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address %"PRIx64")" | |
3bf4dfdd AK |
351 | |
352 | # hw/pci/pci_host.c | |
353 | pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" | |
354 | pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" | |
4cb88c3c | 355 | |
870cb6f1 | 356 | # hw/vfio/pci.c |
df92ee44 | 357 | vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c" |
870cb6f1 AW |
358 | vfio_intx_eoi(const char *name) " (%s) EOI" |
359 | vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled" | |
360 | vfio_intx_disable_kvm(const char *name) " (%s) KVM INTx accel disabled" | |
361 | vfio_intx_update(const char *name, int new_irq, int target_irq) " (%s) IRQ moved %d -> %d" | |
362 | vfio_intx_enable(const char *name) " (%s)" | |
363 | vfio_intx_disable(const char *name) " (%s)" | |
df92ee44 EA |
364 | vfio_msi_interrupt(const char *name, int index, uint64_t addr, int data) " (%s) vector %d 0x%"PRIx64"/0x%x" |
365 | vfio_msix_vector_do_use(const char *name, int index) " (%s) vector %d used" | |
366 | vfio_msix_vector_release(const char *name, int index) " (%s) vector %d released" | |
0de70dc7 | 367 | vfio_msix_enable(const char *name) " (%s)" |
95239e16 AW |
368 | vfio_msix_pba_disable(const char *name) " (%s)" |
369 | vfio_msix_pba_enable(const char *name) " (%s)" | |
0de70dc7 | 370 | vfio_msix_disable(const char *name) " (%s)" |
db0da029 | 371 | vfio_msix_fixup(const char *name, int bar, uint64_t start, uint64_t end) " (%s) MSI-X region %d mmap fixup [0x%"PRIx64" - 0x%"PRIx64"]" |
0de70dc7 AW |
372 | vfio_msi_enable(const char *name, int nr_vectors) " (%s) Enabled %d MSI vectors" |
373 | vfio_msi_disable(const char *name) " (%s)" | |
df92ee44 EA |
374 | vfio_pci_load_rom(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s ROM:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" |
375 | vfio_rom_read(const char *name, uint64_t addr, int size, uint64_t data) " (%s, 0x%"PRIx64", 0x%x) = 0x%"PRIx64 | |
376 | vfio_pci_size_rom(const char *name, int size) "%s ROM size 0x%x" | |
377 | vfio_vga_write(uint64_t addr, uint64_t data, int size) " (0x%"PRIx64", 0x%"PRIx64", %d)" | |
378 | vfio_vga_read(uint64_t addr, int size, uint64_t data) " (0x%"PRIx64", %d) = 0x%"PRIx64 | |
df92ee44 EA |
379 | vfio_pci_read_config(const char *name, int addr, int len, int val) " (%s, @0x%x, len=0x%x) %x" |
380 | vfio_pci_write_config(const char *name, int addr, int val, int len) " (%s, @0x%x, 0x%x, len=0x%x)" | |
0de70dc7 AW |
381 | vfio_msi_setup(const char *name, int pos) "%s PCI MSI CAP @0x%x" |
382 | vfio_msix_early_setup(const char *name, int pos, int table_bar, int offset, int entries) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, entries %d" | |
df92ee44 EA |
383 | vfio_check_pcie_flr(const char *name) "%s Supports FLR via PCIe cap" |
384 | vfio_check_pm_reset(const char *name) "%s Supports PM reset" | |
385 | vfio_check_af_flr(const char *name) "%s Supports FLR via AF cap" | |
386 | vfio_pci_hot_reset(const char *name, const char *type) " (%s) %s" | |
387 | vfio_pci_hot_reset_has_dep_devices(const char *name) "%s: hot reset dependent devices:" | |
385f57cf | 388 | vfio_pci_hot_reset_dep_devices(int domain, int bus, int slot, int function, int group_id) "\t%04x:%02x:%02x.%x group %d" |
df92ee44 | 389 | vfio_pci_hot_reset_result(const char *name, const char *result) "%s hot reset: %s" |
d13dd2d7 EA |
390 | vfio_populate_device_config(const char *name, unsigned long size, unsigned long offset, unsigned long flags) "Device %s config:\n size: 0x%lx, offset: 0x%lx, flags: 0x%lx" |
391 | vfio_populate_device_get_irq_info_failure(void) "VFIO_DEVICE_GET_IRQ_INFO failure: %m" | |
df92ee44 EA |
392 | vfio_initfn(const char *name, int group_id) " (%s) group %d" |
393 | vfio_pci_reset(const char *name) " (%s)" | |
394 | vfio_pci_reset_flr(const char *name) "%s FLR/VFIO_DEVICE_RESET" | |
395 | vfio_pci_reset_pm(const char *name) "%s PCI PM Reset" | |
89dcccc5 AW |
396 | vfio_pci_emulated_vendor_id(const char *name, uint16_t val) "%s %04x" |
397 | vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s %04x" | |
398 | vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s %04x" | |
399 | vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s %04x" | |
385f57cf | 400 | |
056dfcb6 AW |
401 | # hw/vfio/pci-quirks. |
402 | vfio_quirk_rom_blacklisted(const char *name, uint16_t vid, uint16_t did) "%s %04x:%04x" | |
0e54f24a AW |
403 | vfio_quirk_generic_window_address_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 |
404 | vfio_quirk_generic_window_data_read(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 | |
405 | vfio_quirk_generic_window_data_write(const char *name, const char * region_name, uint64_t data) "%s %s 0x%"PRIx64 | |
0d38fb1c AW |
406 | vfio_quirk_generic_mirror_read(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 |
407 | vfio_quirk_generic_mirror_write(const char *name, const char * region_name, uint64_t addr, uint64_t data) "%s %s 0x%"PRIx64": 0x%"PRIx64 | |
b946d286 AW |
408 | vfio_quirk_ati_3c3_read(const char *name, uint64_t data) "%s 0x%"PRIx64 |
409 | vfio_quirk_ati_3c3_probe(const char *name) "%s" | |
0e54f24a | 410 | vfio_quirk_ati_bar4_probe(const char *name) "%s" |
0d38fb1c | 411 | vfio_quirk_ati_bar2_probe(const char *name) "%s" |
6029a424 AW |
412 | vfio_quirk_nvidia_3d0_state(const char *name, const char *state) "%s %s" |
413 | vfio_quirk_nvidia_3d0_read(const char *name, uint8_t offset, unsigned size, uint64_t val) " (%s, @0x%x, len=0x%x) %"PRIx64 | |
414 | vfio_quirk_nvidia_3d0_write(const char *name, uint8_t offset, uint64_t data, unsigned size) "(%s, @0x%x, 0x%"PRIx64", len=0x%x)" | |
415 | vfio_quirk_nvidia_3d0_probe(const char *name) "%s" | |
0e54f24a AW |
416 | vfio_quirk_nvidia_bar5_state(const char *name, const char *state) "%s %s" |
417 | vfio_quirk_nvidia_bar5_probe(const char *name) "%s" | |
0d38fb1c AW |
418 | vfio_quirk_nvidia_bar0_msi_ack(const char *name) "%s" |
419 | vfio_quirk_nvidia_bar0_probe(const char *name) "%s" | |
954258a5 AW |
420 | vfio_quirk_rtl8168_fake_latch(const char *name, uint64_t val) "%s 0x%"PRIx64 |
421 | vfio_quirk_rtl8168_msix_write(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table write[0x%x]: 0x%"PRIx64 | |
422 | vfio_quirk_rtl8168_msix_read(const char *name, uint16_t offset, uint64_t val) "%s MSI-X table read[0x%x]: 0x%"PRIx64 | |
423 | vfio_quirk_rtl8168_probe(const char *name) "%s" | |
056dfcb6 | 424 | |
c9c50009 AW |
425 | vfio_quirk_ati_bonaire_reset_skipped(const char *name) "%s" |
426 | vfio_quirk_ati_bonaire_reset_no_smc(const char *name) "%s" | |
427 | vfio_quirk_ati_bonaire_reset_timeout(const char *name) "%s" | |
428 | vfio_quirk_ati_bonaire_reset_done(const char *name) "%s" | |
429 | vfio_quirk_ati_bonaire_reset(const char *name) "%s" | |
c4c45e94 AW |
430 | vfio_pci_igd_bar4_write(const char *name, uint32_t index, uint32_t data, uint32_t base) "%s [%03x] %08x -> %08x" |
431 | vfio_pci_igd_bdsm_enabled(const char *name, int size) "%s %dMB" | |
432 | vfio_pci_igd_opregion_enabled(const char *name) "%s" | |
433 | vfio_pci_igd_host_bridge_enabled(const char *name) "%s" | |
434 | vfio_pci_igd_lpc_bridge_enabled(const char *name) "%s" | |
c9c50009 | 435 | |
e61a424f | 436 | # hw/vfio/common.c |
a664477d | 437 | vfio_region_write(const char *name, int index, uint64_t addr, uint64_t data, unsigned size) " (%s:region%d+0x%"PRIx64", 0x%"PRIx64 ", %d)" |
df92ee44 | 438 | vfio_region_read(char *name, int index, uint64_t addr, unsigned size, uint64_t data) " (%s:region%d+0x%"PRIx64", %d) = 0x%"PRIx64 |
385f57cf EA |
439 | vfio_iommu_map_notify(uint64_t iova_start, uint64_t iova_end) "iommu map @ %"PRIx64" - %"PRIx64 |
440 | vfio_listener_region_add_skip(uint64_t start, uint64_t end) "SKIPPING region_add %"PRIx64" - %"PRIx64 | |
441 | vfio_listener_region_add_iommu(uint64_t start, uint64_t end) "region_add [iommu] %"PRIx64" - %"PRIx64 | |
442 | vfio_listener_region_add_ram(uint64_t iova_start, uint64_t iova_end, void *vaddr) "region_add [ram] %"PRIx64" - %"PRIx64" [%p]" | |
443 | vfio_listener_region_del_skip(uint64_t start, uint64_t end) "SKIPPING region_del %"PRIx64" - %"PRIx64 | |
444 | vfio_listener_region_del(uint64_t start, uint64_t end) "region_del %"PRIx64" - %"PRIx64 | |
445 | vfio_disconnect_container(int fd) "close container->fd=%d" | |
446 | vfio_put_group(int fd) "close group->fd=%d" | |
df92ee44 | 447 | vfio_get_device(const char * name, unsigned int flags, unsigned int num_regions, unsigned int num_irqs) "Device %s flags: %u, regions: %u, irqs: %u" |
d13dd2d7 | 448 | vfio_put_base_device(int fd) "close vdev->fd=%d" |
db0da029 AW |
449 | vfio_region_setup(const char *dev, int index, const char *name, unsigned long flags, unsigned long offset, unsigned long size) "Device %s, region %d \"%s\", flags: %lx, offset: %lx, size: %lx" |
450 | vfio_region_mmap_fault(const char *name, int index, unsigned long offset, unsigned long size, int fault) "Region %s mmaps[%d], [%lx - %lx], fault: %d" | |
451 | vfio_region_mmap(const char *name, unsigned long offset, unsigned long end) "Region %s [%lx - %lx]" | |
452 | vfio_region_exit(const char *name, int index) "Device %s, region %d" | |
453 | vfio_region_finalize(const char *name, int index) "Device %s, region %d" | |
454 | vfio_region_mmaps_set_enabled(const char *name, bool enabled) "Region %s mmaps enabled: %d" | |
b53b0f69 AW |
455 | vfio_region_sparse_mmap_header(const char *name, int index, int nr_areas) "Device %s region %d: %d sparse mmap entries" |
456 | vfio_region_sparse_mmap_entry(int i, unsigned long start, unsigned long end) "sparse entry %d [0x%lx - 0x%lx]" | |
e61a424f | 457 | vfio_get_dev_region(const char *name, int index, uint32_t type, uint32_t subtype) "%s index %d, %08x/%0x8" |
385f57cf | 458 | |
0ea2730b | 459 | # hw/vfio/platform.c |
0ea2730b EA |
460 | vfio_platform_base_device_init(char *name, int groupid) "%s belongs to group #%d" |
461 | vfio_platform_realize(char *name, char *compat) "vfio device %s, compat = %s" | |
38559979 | 462 | vfio_platform_eoi(int pin, int fd) "EOI IRQ pin %d (fd=%d)" |
38559979 EA |
463 | vfio_platform_intp_mmap_enable(int pin) "IRQ #%d still active, stay in slow path" |
464 | vfio_platform_intp_interrupt(int pin, int fd) "Inject IRQ #%d (fd = %d)" | |
465 | vfio_platform_intp_inject_pending_lockheld(int pin, int fd) "Inject pending IRQ #%d (fd = %d)" | |
466 | vfio_platform_populate_interrupts(int pin, int count, int flags) "- IRQ index %d: count %d, flags=0x%x" | |
467 | vfio_intp_interrupt_set_pending(int index) "irq %d is set PENDING" | |
a5b39cd3 EA |
468 | vfio_platform_start_level_irqfd_injection(int index, int fd, int resamplefd) "IRQ index=%d, fd = %d, resamplefd = %d" |
469 | vfio_platform_start_edge_irqfd_injection(int index, int fd) "IRQ index=%d, fd = %d" | |
470 | ||
0ea2730b | 471 | |
385f57cf | 472 | #hw/acpi/memory_hotplug.c |
dfe292ff | 473 | mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32 |
c06b2ffb | 474 | mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32 |
dfe292ff IM |
475 | mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32 |
476 | mhp_acpi_read_addr_hi(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr hi: 0x%"PRIx32 | |
477 | mhp_acpi_read_size_lo(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size lo: 0x%"PRIx32 | |
478 | mhp_acpi_read_size_hi(uint32_t slot, uint32_t size) "slot[0x%"PRIx32"] size hi: 0x%"PRIx32 | |
479 | mhp_acpi_read_pxm(uint32_t slot, uint32_t pxm) "slot[0x%"PRIx32"] proximity: 0x%"PRIx32 | |
480 | mhp_acpi_read_flags(uint32_t slot, uint32_t flags) "slot[0x%"PRIx32"] flags: 0x%"PRIx32 | |
481 | mhp_acpi_write_slot(uint32_t slot) "set active slot: 0x%"PRIx32 | |
482 | mhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "slot[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 | |
483 | mhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "slot[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 | |
484 | mhp_acpi_clear_insert_evt(uint32_t slot) "slot[0x%"PRIx32"] clear insert event" | |
c06b2ffb ZG |
485 | mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event" |
486 | mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted" | |
bc09e061 | 487 | mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed" |
dfe292ff | 488 | |
40893768 | 489 | # hw/i386/pc.c |
2e1ac493 IM |
490 | mhp_pc_dimm_assigned_slot(int slot) "0x%d" |
491 | mhp_pc_dimm_assigned_address(uint64_t addr) "0x%"PRIx64 | |
492 | ||
4cb88c3c DD |
493 | # target-s390x/kvm.c |
494 | kvm_enable_cmma(int rc) "CMMA: enabling with result code %d" | |
495 | kvm_clear_cmma(int rc) "CMMA: clearing with result code %d" | |
c9e659c9 | 496 | kvm_failed_cpu_state_set(int cpu_index, uint8_t state, const char *msg) "Warning: Unable to set cpu %d state %" PRIu8 " to KVM: %s" |
56dba22b | 497 | kvm_sigp_finished(uint8_t order, int cpu_index, int dst_index, int cc) "SIGP: Finished order %u on cpu %d -> cpu %d with cc=%d" |
7dbb4c49 | 498 | |
eb24f7c6 DH |
499 | # target-s390x/cpu.c |
500 | cpu_set_state(int cpu_index, uint8_t state) "setting cpu %d state to %" PRIu8 | |
501 | cpu_halt(int cpu_index) "halting cpu %d" | |
502 | cpu_unhalt(int cpu_index) "unhalting cpu %d" | |
f5d8c8cd SZ |
503 | |
504 | # hw/arm/virt-acpi-build.c | |
505 | virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." | |
fbb7ef56 | 506 | |
c6ce9f17 PB |
507 | # hw/alpha/pci.c |
508 | alpha_pci_iack_write(void) "" | |
509 | ||
fbb7ef56 KZ |
510 | # audio/alsaaudio.c |
511 | alsa_revents(int revents) "revents = %d" | |
512 | alsa_pollout(int i, int fd) "i = %d fd = %d" | |
513 | alsa_set_handler(int events, int index, int fd, int err) "events=%#x index=%d fd=%d err=%d" | |
514 | alsa_wrote_zero(int len) "Failed to write %d frames (wrote zero)" | |
515 | alsa_read_zero(long len) "Failed to read %ld frames (read zero)" | |
516 | alsa_xrun_out(void) "Recovering from playback xrun" | |
517 | alsa_xrun_in(void) "Recovering from capture xrun" | |
518 | alsa_resume_out(void) "Resuming suspended output stream" | |
519 | alsa_resume_in(void) "Resuming suspended input stream" | |
520 | alsa_no_frames(int state) "No frames available and ALSA state is %d" | |
d95d7d80 KZ |
521 | |
522 | # audio/ossaudio.c | |
523 | oss_version(int version) "OSS version = %#x" | |
524 | oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d" | |
a090187d | 525 | |
69b32a6c MAL |
526 | # net/vhost-user.c |
527 | vhost_user_event(const char *chr, int event) "chr: %s got event: %d" | |
c8ee0a44 PB |
528 | |
529 | # linux-user/signal.c | |
6411dd13 GK |
530 | user_setup_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64 |
531 | user_setup_rt_frame(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64 | |
532 | user_do_rt_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64 | |
533 | user_do_sigreturn(void *env, uint64_t frame_addr) "env=%p frame_addr=%"PRIx64 | |
c8ee0a44 PB |
534 | user_force_sig(void *env, int target_sig, int host_sig) "env=%p signal %d (host %d)" |
535 | user_handle_signal(void *env, int target_sig) "env=%p signal %d" | |
536 | user_host_signal(void *env, int host_sig, int target_sig) "env=%p signal %d (target %d(" | |
537 | user_queue_signal(void *env, int target_sig) "env=%p signal %d" | |
6411dd13 | 538 | user_s390x_restore_sigregs(void *env, uint64_t sc_psw_addr, uint64_t env_psw_addr) "env=%p frame psw.addr %"PRIx64 " current psw.addr %"PRIx64 |
b02db2d9 | 539 | |
dcdaadb6 LV |
540 | ### Guest events, keep at bottom |
541 | ||
542 | # @vaddr: Access' virtual address. | |
543 | # @info : Access' information (see below). | |
544 | # | |
545 | # Start virtual memory access (before any potential access violation). | |
546 | # | |
547 | # Does not include memory accesses performed by devices. | |
548 | # | |
549 | # Access information can be parsed as: | |
550 | # | |
551 | # struct mem_info { | |
552 | # uint8_t size_shift : 2; /* interpreted as "1 << size_shift" bytes */ | |
553 | # bool sign_extend: 1; /* sign-extended */ | |
554 | # uint8_t endianness : 1; /* 0: little, 1: big */ | |
555 | # bool store : 1; /* wheter it's a store operation */ | |
556 | # }; | |
557 | # | |
558 | # Targets: TCG(all) | |
559 | disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d", "vaddr=0x%016"PRIx64" info=%d" |