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a6a796ca
HSDT
1/*
2* Huawei SSD device driver
3* Copyright (c) 2016, Huawei Technologies Co., Ltd.
4*
5* This program is free software; you can redistribute it and/or modify it
6* under the terms and conditions of the GNU General Public License,
7* version 2, as published by the Free Software Foundation.
8*
9* This program is distributed in the hope it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*/
14
15#ifndef LINUX_VERSION_CODE
16#include <linux/version.h>
17#endif
18#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
19#include <linux/config.h>
20#endif
21#include <linux/types.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/bio.h>
25#include <linux/timer.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/spinlock.h>
30#include <linux/blkdev.h>
31#include <linux/sched.h>
32#include <linux/fcntl.h>
33#include <linux/interrupt.h>
34#include <linux/compiler.h>
35#include <linux/bitops.h>
36#include <linux/delay.h>
37#include <linux/time.h>
38#include <linux/stat.h>
39#include <linux/fs.h>
40#include <linux/dma-mapping.h>
41#include <linux/completion.h>
42#include <linux/workqueue.h>
43#include <linux/mm.h>
44#include <linux/ioctl.h>
45#include <linux/hdreg.h> /* HDIO_GETGEO */
46#include <linux/list.h>
47#include <linux/reboot.h>
48#include <linux/kthread.h>
49#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
50#include <linux/seq_file.h>
51#endif
52#include <asm/uaccess.h>
53#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
54#include <linux/scatterlist.h>
55#include <linux/vmalloc.h>
56#else
57#include <asm/scatterlist.h>
58#endif
59#include <asm/io.h>
60#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
61#include <linux/devfs_fs_kernel.h>
62#endif
df07f392
KM
63#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,3,0))
64#define bio_endio(bio, errors) bio_endio(bio)
65#endif
a6a796ca
HSDT
66
67/* driver */
68#define MODULE_NAME "hio"
69#define DRIVER_VERSION "2.1.0.23"
70#define DRIVER_VERSION_LEN 16
71
72#define SSD_FW_MIN 0x1
73
74#define SSD_DEV_NAME MODULE_NAME
75#define SSD_DEV_NAME_LEN 16
76#define SSD_CDEV_NAME "c"SSD_DEV_NAME
77#define SSD_SDEV_NAME "s"SSD_DEV_NAME
78
79
80#define SSD_CMAJOR 0
81#define SSD_MAJOR 0
82#define SSD_MAJOR_SL 0
83#define SSD_MINORS 16
84
85#define SSD_MAX_DEV 702
86#define SSD_ALPHABET_NUM 26
87
88#define hio_info(f, arg...) printk(KERN_INFO MODULE_NAME"info: " f , ## arg)
89#define hio_note(f, arg...) printk(KERN_NOTICE MODULE_NAME"note: " f , ## arg)
90#define hio_warn(f, arg...) printk(KERN_WARNING MODULE_NAME"warn: " f , ## arg)
91#define hio_err(f, arg...) printk(KERN_ERR MODULE_NAME"err: " f , ## arg)
92
93/* slave port */
94#define SSD_SLAVE_PORT_DEVID 0x000a
95
96/* int mode */
97
98/* 2.6.9 msi affinity bug, should turn msi & msi-x off */
99//#define SSD_MSI
100#define SSD_ESCAPE_IRQ
101
102//#define SSD_MSIX
103#ifndef MODULE
104#define SSD_MSIX
105#endif
106#define SSD_MSIX_VEC 8
107#ifdef SSD_MSIX
108#undef SSD_MSI
109//#undef SSD_ESCAPE_IRQ
110#define SSD_MSIX_AFFINITY_FORCE
111#endif
112
113#define SSD_TRIM
114
115/* Over temperature protect */
116#define SSD_OT_PROTECT
117
118#ifdef SSD_QUEUE_PBIO
119#define BIO_SSD_PBIO 20
120#endif
121
122/* debug */
123//#define SSD_DEBUG_ERR
124
125/* cmd timer */
126#define SSD_CMD_TIMEOUT (60*HZ)
127
128/* i2c & smbus */
129#define SSD_SPI_TIMEOUT (5*HZ)
130#define SSD_I2C_TIMEOUT (5*HZ)
131
132#define SSD_I2C_MAX_DATA (127)
133#define SSD_SMBUS_BLOCK_MAX (32)
134#define SSD_SMBUS_DATA_MAX (SSD_SMBUS_BLOCK_MAX + 2)
135
136/* wait for init */
137#define SSD_INIT_WAIT (1000) //1s
138#define SSD_CONTROLLER_WAIT (20*1000/SSD_INIT_WAIT) //20s
139#define SSD_INIT_MAX_WAIT (500*1000/SSD_INIT_WAIT) //500s
140#define SSD_INIT_MAX_WAIT_V3_2 (1400*1000/SSD_INIT_WAIT) //1400s
141#define SSD_RAM_INIT_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
142#define SSD_CH_INFO_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
143
144/* blkdev busy wait */
145#define SSD_DEV_BUSY_WAIT 1000 //ms
146#define SSD_DEV_BUSY_MAX_WAIT (8*1000/SSD_DEV_BUSY_WAIT) //8s
147
148/* smbus retry */
149#define SSD_SMBUS_RETRY_INTERVAL (5) //ms
150#define SSD_SMBUS_RETRY_MAX (1000/SSD_SMBUS_RETRY_INTERVAL)
151
152#define SSD_BM_RETRY_MAX 7
153
154/* bm routine interval */
155#define SSD_BM_CAP_LEARNING_DELAY (10*60*1000)
156
157/* routine interval */
158#define SSD_ROUTINE_INTERVAL (10*1000) //10s
159#define SSD_HWMON_ROUTINE_TICK (60*1000/SSD_ROUTINE_INTERVAL)
160#define SSD_CAPMON_ROUTINE_TICK ((3600*1000/SSD_ROUTINE_INTERVAL)*24*30)
161#define SSD_CAPMON2_ROUTINE_TICK (10*60*1000/SSD_ROUTINE_INTERVAL) //fault recover
162
163/* dma align */
164#define SSD_DMA_ALIGN (16)
165
166/* some hw defalut */
167#define SSD_LOG_MAX_SZ 4096
168
169#define SSD_NAND_OOB_SZ 1024
170#define SSD_NAND_ID_SZ 8
171#define SSD_NAND_ID_BUFF_SZ 1024
172#define SSD_NAND_MAX_CE 2
173
174#define SSD_BBT_RESERVED 8
175
176#define SSD_ECC_MAX_FLIP (64+1)
177
178#define SSD_RAM_ALIGN 16
179
180
181#define SSD_RELOAD_FLAG 0x3333CCCC
182#define SSD_RELOAD_FW 0xAA5555AA
183#define SSD_RESET_NOINIT 0xAA5555AA
184#define SSD_RESET 0x55AAAA55
185#define SSD_RESET_FULL 0x5A
186//#define SSD_RESET_WAIT 1000 //1s
187//#define SSD_RESET_MAX_WAIT (200*1000/SSD_RESET_WAIT) //200s
188
189
190/* reverion 1 */
191#define SSD_PROTOCOL_V1 0x0
192
193#define SSD_ROM_SIZE (16*1024*1024)
194#define SSD_ROM_BLK_SIZE (256*1024)
195#define SSD_ROM_PAGE_SIZE (256)
196#define SSD_ROM_NR_BRIDGE_FW 2
197#define SSD_ROM_NR_CTRL_FW 2
198#define SSD_ROM_BRIDGE_FW_BASE 0
199#define SSD_ROM_BRIDGE_FW_SIZE (2*1024*1024)
200#define SSD_ROM_CTRL_FW_BASE (SSD_ROM_NR_BRIDGE_FW*SSD_ROM_BRIDGE_FW_SIZE)
201#define SSD_ROM_CTRL_FW_SIZE (5*1024*1024)
202#define SSD_ROM_LABEL_BASE (SSD_ROM_CTRL_FW_BASE+SSD_ROM_CTRL_FW_SIZE*SSD_ROM_NR_CTRL_FW)
203#define SSD_ROM_VP_BASE (SSD_ROM_LABEL_BASE+SSD_ROM_BLK_SIZE)
204
205/* reverion 3 */
206#define SSD_PROTOCOL_V3 0x3000000
207#define SSD_PROTOCOL_V3_1_1 0x3010001
208#define SSD_PROTOCOL_V3_1_3 0x3010003
209#define SSD_PROTOCOL_V3_2 0x3020000
210#define SSD_PROTOCOL_V3_2_1 0x3020001 /* <4KB improved */
211#define SSD_PROTOCOL_V3_2_2 0x3020002 /* ot protect */
212#define SSD_PROTOCOL_V3_2_4 0x3020004
213
214
215#define SSD_PV3_ROM_NR_BM_FW 1
216#define SSD_PV3_ROM_BM_FW_SZ (64*1024*8)
217
218#define SSD_ROM_LOG_SZ (64*1024*4)
219
220#define SSD_ROM_NR_SMART_MAX 2
221#define SSD_PV3_ROM_NR_SMART SSD_ROM_NR_SMART_MAX
222#define SSD_PV3_ROM_SMART_SZ (64*1024)
223
224/* reverion 3.2 */
225#define SSD_PV3_2_ROM_LOG_SZ (64*1024*80) /* 5MB */
226#define SSD_PV3_2_ROM_SEC_SZ (256*1024) /* 256KB */
227
228
229/* register */
230#define SSD_REQ_FIFO_REG 0x0000
231#define SSD_RESP_FIFO_REG 0x0008 //0x0010
232#define SSD_RESP_PTR_REG 0x0010 //0x0018
233#define SSD_INTR_INTERVAL_REG 0x0018
234#define SSD_READY_REG 0x001C
235#define SSD_BRIDGE_TEST_REG 0x0020
236#define SSD_STRIPE_SIZE_REG 0x0028
237#define SSD_CTRL_VER_REG 0x0030 //controller
238#define SSD_BRIDGE_VER_REG 0x0034 //bridge
239#define SSD_PCB_VER_REG 0x0038
240#define SSD_BURN_FLAG_REG 0x0040
241#define SSD_BRIDGE_INFO_REG 0x0044
242
243#define SSD_WL_VAL_REG 0x0048 //32-bit
244
245#define SSD_BB_INFO_REG 0x004C
246
247#define SSD_ECC_TEST_REG 0x0050 //test only
248#define SSD_ERASE_TEST_REG 0x0058 //test only
249#define SSD_WRITE_TEST_REG 0x0060 //test only
250
251#define SSD_RESET_REG 0x0068
252#define SSD_RELOAD_FW_REG 0x0070
253
254#define SSD_RESERVED_BLKS_REG 0x0074
255#define SSD_VALID_PAGES_REG 0x0078
256#define SSD_CH_INFO_REG 0x007C
257
258#define SSD_CTRL_TEST_REG_SZ 0x8
259#define SSD_CTRL_TEST_REG0 0x0080
260#define SSD_CTRL_TEST_REG1 0x0088
261#define SSD_CTRL_TEST_REG2 0x0090
262#define SSD_CTRL_TEST_REG3 0x0098
263#define SSD_CTRL_TEST_REG4 0x00A0
264#define SSD_CTRL_TEST_REG5 0x00A8
265#define SSD_CTRL_TEST_REG6 0x00B0
266#define SSD_CTRL_TEST_REG7 0x00B8
267
268#define SSD_FLASH_INFO_REG0 0x00C0
269#define SSD_FLASH_INFO_REG1 0x00C8
270#define SSD_FLASH_INFO_REG2 0x00D0
271#define SSD_FLASH_INFO_REG3 0x00D8
272#define SSD_FLASH_INFO_REG4 0x00E0
273#define SSD_FLASH_INFO_REG5 0x00E8
274#define SSD_FLASH_INFO_REG6 0x00F0
275#define SSD_FLASH_INFO_REG7 0x00F8
276
277#define SSD_RESP_INFO_REG 0x01B8
278#define SSD_NAND_BUFF_BASE 0x01BC //for nand write
279
280#define SSD_CHIP_INFO_REG_SZ 0x10
281#define SSD_CHIP_INFO_REG0 0x0100 //128 bit
282#define SSD_CHIP_INFO_REG1 0x0110
283#define SSD_CHIP_INFO_REG2 0x0120
284#define SSD_CHIP_INFO_REG3 0x0130
285#define SSD_CHIP_INFO_REG4 0x0140
286#define SSD_CHIP_INFO_REG5 0x0150
287#define SSD_CHIP_INFO_REG6 0x0160
288#define SSD_CHIP_INFO_REG7 0x0170
289
290#define SSD_RAM_INFO_REG 0x01C4
291
292#define SSD_BBT_BASE_REG 0x01C8
293#define SSD_ECT_BASE_REG 0x01CC
294
295#define SSD_CLEAR_INTR_REG 0x01F0
296
297#define SSD_INIT_STATE_REG_SZ 0x8
298#define SSD_INIT_STATE_REG0 0x0200
299#define SSD_INIT_STATE_REG1 0x0208
300#define SSD_INIT_STATE_REG2 0x0210
301#define SSD_INIT_STATE_REG3 0x0218
302#define SSD_INIT_STATE_REG4 0x0220
303#define SSD_INIT_STATE_REG5 0x0228
304#define SSD_INIT_STATE_REG6 0x0230
305#define SSD_INIT_STATE_REG7 0x0238
306
307#define SSD_ROM_INFO_REG 0x0600
308#define SSD_ROM_BRIDGE_FW_INFO_REG 0x0604
309#define SSD_ROM_CTRL_FW_INFO_REG 0x0608
310#define SSD_ROM_VP_INFO_REG 0x060C
311
312#define SSD_LOG_INFO_REG 0x0610
313#define SSD_LED_REG 0x0614
314#define SSD_MSG_BASE_REG 0x06F8
315
316/*spi reg */
317#define SSD_SPI_REG_CMD 0x0180
318#define SSD_SPI_REG_CMD_HI 0x0184
319#define SSD_SPI_REG_WDATA 0x0188
320#define SSD_SPI_REG_ID 0x0190
321#define SSD_SPI_REG_STATUS 0x0198
322#define SSD_SPI_REG_RDATA 0x01A0
323#define SSD_SPI_REG_READY 0x01A8
324
325/* i2c register */
326#define SSD_I2C_CTRL_REG 0x06F0
327#define SSD_I2C_RDATA_REG 0x06F4
328
329/* temperature reg */
330#define SSD_BRIGE_TEMP_REG 0x0618
331
332#define SSD_CTRL_TEMP_REG0 0x0700
333#define SSD_CTRL_TEMP_REG1 0x0708
334#define SSD_CTRL_TEMP_REG2 0x0710
335#define SSD_CTRL_TEMP_REG3 0x0718
336#define SSD_CTRL_TEMP_REG4 0x0720
337#define SSD_CTRL_TEMP_REG5 0x0728
338#define SSD_CTRL_TEMP_REG6 0x0730
339#define SSD_CTRL_TEMP_REG7 0x0738
340
341/* reversion 3 reg */
342#define SSD_PROTOCOL_VER_REG 0x01B4
343
344#define SSD_FLUSH_TIMEOUT_REG 0x02A4
345#define SSD_BM_FAULT_REG 0x0660
346
347#define SSD_PV3_RAM_STATUS_REG_SZ 0x4
348#define SSD_PV3_RAM_STATUS_REG0 0x0260
349#define SSD_PV3_RAM_STATUS_REG1 0x0264
350#define SSD_PV3_RAM_STATUS_REG2 0x0268
351#define SSD_PV3_RAM_STATUS_REG3 0x026C
352#define SSD_PV3_RAM_STATUS_REG4 0x0270
353#define SSD_PV3_RAM_STATUS_REG5 0x0274
354#define SSD_PV3_RAM_STATUS_REG6 0x0278
355#define SSD_PV3_RAM_STATUS_REG7 0x027C
356
357#define SSD_PV3_CHIP_INFO_REG_SZ 0x40
358#define SSD_PV3_CHIP_INFO_REG0 0x0300
359#define SSD_PV3_CHIP_INFO_REG1 0x0340
360#define SSD_PV3_CHIP_INFO_REG2 0x0380
361#define SSD_PV3_CHIP_INFO_REG3 0x03B0
362#define SSD_PV3_CHIP_INFO_REG4 0x0400
363#define SSD_PV3_CHIP_INFO_REG5 0x0440
364#define SSD_PV3_CHIP_INFO_REG6 0x0480
365#define SSD_PV3_CHIP_INFO_REG7 0x04B0
366
367#define SSD_PV3_INIT_STATE_REG_SZ 0x20
368#define SSD_PV3_INIT_STATE_REG0 0x0500
369#define SSD_PV3_INIT_STATE_REG1 0x0520
370#define SSD_PV3_INIT_STATE_REG2 0x0540
371#define SSD_PV3_INIT_STATE_REG3 0x0560
372#define SSD_PV3_INIT_STATE_REG4 0x0580
373#define SSD_PV3_INIT_STATE_REG5 0x05A0
374#define SSD_PV3_INIT_STATE_REG6 0x05C0
375#define SSD_PV3_INIT_STATE_REG7 0x05E0
376
377/* reversion 3.1.1 reg */
378#define SSD_FULL_RESET_REG 0x01B0
379
380#define SSD_CTRL_REG_ZONE_SZ 0x800
381
382#define SSD_BB_THRESHOLD_L1_REG 0x2C0
383#define SSD_BB_THRESHOLD_L2_REG 0x2C4
384
385#define SSD_BB_ACC_REG_SZ 0x4
386#define SSD_BB_ACC_REG0 0x21C0
387#define SSD_BB_ACC_REG1 0x29C0
388#define SSD_BB_ACC_REG2 0x31C0
389
390#define SSD_EC_THRESHOLD_L1_REG 0x2C8
391#define SSD_EC_THRESHOLD_L2_REG 0x2CC
392
393#define SSD_EC_ACC_REG_SZ 0x4
394#define SSD_EC_ACC_REG0 0x21E0
395#define SSD_EC_ACC_REG1 0x29E0
396#define SSD_EC_ACC_REG2 0x31E0
397
398/* reversion 3.1.2 & 3.1.3 reg */
399#define SSD_HW_STATUS_REG 0x02AC
400
401#define SSD_PLP_INFO_REG 0x0664
402
403/*reversion 3.2 reg*/
404#define SSD_POWER_ON_REG 0x01EC
405#define SSD_PCIE_LINKSTATUS_REG 0x01F8
406#define SSD_PL_CAP_LEARN_REG 0x01FC
407
408#define SSD_FPGA_1V0_REG0 0x2070
409#define SSD_FPGA_1V8_REG0 0x2078
410#define SSD_FPGA_1V0_REG1 0x2870
411#define SSD_FPGA_1V8_REG1 0x2878
412
413/*reversion 3.2 reg*/
414#define SSD_READ_OT_REG0 0x2260
415#define SSD_WRITE_OT_REG0 0x2264
416#define SSD_READ_OT_REG1 0x2A60
417#define SSD_WRITE_OT_REG1 0x2A64
418
419
420/* function */
421#define SSD_FUNC_READ 0x01
422#define SSD_FUNC_WRITE 0x02
423#define SSD_FUNC_NAND_READ_WOOB 0x03
424#define SSD_FUNC_NAND_READ 0x04
425#define SSD_FUNC_NAND_WRITE 0x05
426#define SSD_FUNC_NAND_ERASE 0x06
427#define SSD_FUNC_NAND_READ_ID 0x07
428#define SSD_FUNC_READ_LOG 0x08
429#define SSD_FUNC_TRIM 0x09
430#define SSD_FUNC_RAM_READ 0x10
431#define SSD_FUNC_RAM_WRITE 0x11
432#define SSD_FUNC_FLUSH 0x12 //cache / bbt
433
434/* spi function */
435#define SSD_SPI_CMD_PROGRAM 0x02
436#define SSD_SPI_CMD_READ 0x03
437#define SSD_SPI_CMD_W_DISABLE 0x04
438#define SSD_SPI_CMD_READ_STATUS 0x05
439#define SSD_SPI_CMD_W_ENABLE 0x06
440#define SSD_SPI_CMD_ERASE 0xd8
441#define SSD_SPI_CMD_CLSR 0x30
442#define SSD_SPI_CMD_READ_ID 0x9f
443
444/* i2c */
445#define SSD_I2C_CTRL_READ 0x00
446#define SSD_I2C_CTRL_WRITE 0x01
447
448/* i2c internal register */
449#define SSD_I2C_CFG_REG 0x00
450#define SSD_I2C_DATA_REG 0x01
451#define SSD_I2C_CMD_REG 0x02
452#define SSD_I2C_STATUS_REG 0x03
453#define SSD_I2C_SADDR_REG 0x04
454#define SSD_I2C_LEN_REG 0x05
455#define SSD_I2C_RLEN_REG 0x06
456#define SSD_I2C_WLEN_REG 0x07
457#define SSD_I2C_RESET_REG 0x08 //write for reset
458#define SSD_I2C_PRER_REG 0x09
459
460
461/* hw mon */
462/* FPGA volt = ADC_value / 4096 * 3v */
463#define SSD_FPGA_1V0_ADC_MIN 1228 // 0.9v
464#define SSD_FPGA_1V0_ADC_MAX 1502 // 1.1v
465#define SSD_FPGA_1V8_ADC_MIN 2211 // 1.62v
466#define SSD_FPGA_1V8_ADC_MAX 2703 // 1.98
467
468/* ADC value */
469#define SSD_FPGA_VOLT_MAX(val) (((val) & 0xffff) >> 4)
470#define SSD_FPGA_VOLT_MIN(val) (((val >> 16) & 0xffff) >> 4)
471#define SSD_FPGA_VOLT_CUR(val) (((val >> 32) & 0xffff) >> 4)
472#define SSD_FPGA_VOLT(val) ((val * 3000) >> 12)
473
474#define SSD_VOLT_LOG_DATA(idx, ctrl, volt) (((uint32_t)idx << 24) | ((uint32_t)ctrl << 16) | ((uint32_t)volt))
475
476enum ssd_fpga_volt
477{
478 SSD_FPGA_1V0 = 0,
479 SSD_FPGA_1V8,
480 SSD_FPGA_VOLT_NR
481};
482
483enum ssd_clock
484{
485 SSD_CLOCK_166M_LOST = 0,
486 SSD_CLOCK_166M_SKEW,
487 SSD_CLOCK_156M_LOST,
488 SSD_CLOCK_156M_SKEW,
489 SSD_CLOCK_NR
490};
491
492/* sensor */
493#define SSD_SENSOR_LM75_SADDRESS (0x49 << 1)
494#define SSD_SENSOR_LM80_SADDRESS (0x28 << 1)
495
496#define SSD_SENSOR_CONVERT_TEMP(val) ((int)(val >> 8))
497
498#define SSD_INLET_OT_TEMP (55) //55 DegC
499#define SSD_INLET_OT_HYST (50) //50 DegC
500#define SSD_FLASH_OT_TEMP (70) //70 DegC
501#define SSD_FLASH_OT_HYST (65) //65 DegC
502
503enum ssd_sensor
504{
505 SSD_SENSOR_LM80 = 0,
506 SSD_SENSOR_LM75,
507 SSD_SENSOR_NR
508};
509
510
511/* lm75 */
512enum ssd_lm75_reg
513{
514 SSD_LM75_REG_TEMP = 0,
515 SSD_LM75_REG_CONF,
516 SSD_LM75_REG_THYST,
517 SSD_LM75_REG_TOS
518};
519
520/* lm96080 */
521#define SSD_LM80_REG_IN_MAX(nr) (0x2a + (nr) * 2)
522#define SSD_LM80_REG_IN_MIN(nr) (0x2b + (nr) * 2)
523#define SSD_LM80_REG_IN(nr) (0x20 + (nr))
524
525#define SSD_LM80_REG_FAN1 0x28
526#define SSD_LM80_REG_FAN2 0x29
527#define SSD_LM80_REG_FAN_MIN(nr) (0x3b + (nr))
528
529#define SSD_LM80_REG_TEMP 0x27
530#define SSD_LM80_REG_TEMP_HOT_MAX 0x38
531#define SSD_LM80_REG_TEMP_HOT_HYST 0x39
532#define SSD_LM80_REG_TEMP_OS_MAX 0x3a
533#define SSD_LM80_REG_TEMP_OS_HYST 0x3b
534
535#define SSD_LM80_REG_CONFIG 0x00
536#define SSD_LM80_REG_ALARM1 0x01
537#define SSD_LM80_REG_ALARM2 0x02
538#define SSD_LM80_REG_MASK1 0x03
539#define SSD_LM80_REG_MASK2 0x04
540#define SSD_LM80_REG_FANDIV 0x05
541#define SSD_LM80_REG_RES 0x06
542
543#define SSD_LM80_CONVERT_VOLT(val) ((val * 10) >> 8)
544
545#define SSD_LM80_3V3_VOLT(val) ((val)*33/19)
546
547#define SSD_LM80_CONV_INTERVAL (1000)
548
549enum ssd_lm80_in
550{
551 SSD_LM80_IN_CAP = 0,
552 SSD_LM80_IN_1V2,
553 SSD_LM80_IN_1V2a,
554 SSD_LM80_IN_1V5,
555 SSD_LM80_IN_1V8,
556 SSD_LM80_IN_FPGA_3V3,
557 SSD_LM80_IN_3V3,
558 SSD_LM80_IN_NR
559};
560
561struct ssd_lm80_limit
562{
563 uint8_t low;
564 uint8_t high;
565};
566
567/* +/- 5% except cap in*/
568static struct ssd_lm80_limit ssd_lm80_limit[SSD_LM80_IN_NR] = {
569 {171, 217}, /* CAP in: 1710 ~ 2170 */
570 {114, 126},
571 {114, 126},
572 {142, 158},
573 {171, 189},
574 {180, 200},
575 {180, 200},
576};
577
578/* temperature sensors */
579enum ssd_temp_sensor
580{
581 SSD_TEMP_INLET = 0,
582 SSD_TEMP_FLASH,
583 SSD_TEMP_CTRL,
584 SSD_TEMP_NR
585};
586
587
588#ifdef SSD_OT_PROTECT
589#define SSD_OT_DELAY (60) //ms
590
591#define SSD_OT_TEMP (90) //90 DegC
592
593#define SSD_OT_TEMP_HYST (85) //85 DegC
594#endif
595
596/* fpga temperature */
597//#define CONVERT_TEMP(val) ((float)(val)*503.975f/4096.0f-273.15f)
598#define CONVERT_TEMP(val) ((val)*504/4096-273)
599
600#define MAX_TEMP(val) CONVERT_TEMP(((val & 0xffff) >> 4))
601#define MIN_TEMP(val) CONVERT_TEMP((((val>>16) & 0xffff) >> 4))
602#define CUR_TEMP(val) CONVERT_TEMP((((val>>32) & 0xffff) >> 4))
603
604
605/* CAP monitor */
606#define SSD_PL_CAP_U1 SSD_LM80_REG_IN(SSD_LM80_IN_CAP)
607#define SSD_PL_CAP_U2 SSD_LM80_REG_IN(SSD_LM80_IN_1V8)
608#define SSD_PL_CAP_LEARN(u1, u2, t) ((t*(u1+u2))/(2*162*(u1-u2)))
609#define SSD_PL_CAP_LEARN_WAIT (20) //20ms
610#define SSD_PL_CAP_LEARN_MAX_WAIT (1000/SSD_PL_CAP_LEARN_WAIT) //1s
611
612#define SSD_PL_CAP_CHARGE_WAIT (1000)
613#define SSD_PL_CAP_CHARGE_MAX_WAIT ((120*1000)/SSD_PL_CAP_CHARGE_WAIT) //120s
614
615#define SSD_PL_CAP_VOLT(val) (val*7)
616
617#define SSD_PL_CAP_VOLT_FULL (13700)
618#define SSD_PL_CAP_VOLT_READY (12880)
619
620#define SSD_PL_CAP_THRESHOLD (8900)
621#define SSD_PL_CAP_CP_THRESHOLD (5800)
622#define SSD_PL_CAP_THRESHOLD_HYST (100)
623
624enum ssd_pl_cap_status
625{
626 SSD_PL_CAP = 0,
627 SSD_PL_CAP_NR
628};
629
630enum ssd_pl_cap_type
631{
632 SSD_PL_CAP_DEFAULT = 0, /* 4 cap */
633 SSD_PL_CAP_CP /* 3 cap */
634};
635
636
637/* hwmon offset */
638#define SSD_HWMON_OFFS_TEMP (0)
639#define SSD_HWMON_OFFS_SENSOR (SSD_HWMON_OFFS_TEMP + SSD_TEMP_NR)
640#define SSD_HWMON_OFFS_PL_CAP (SSD_HWMON_OFFS_SENSOR + SSD_SENSOR_NR)
641#define SSD_HWMON_OFFS_LM80 (SSD_HWMON_OFFS_PL_CAP + SSD_PL_CAP_NR)
642#define SSD_HWMON_OFFS_CLOCK (SSD_HWMON_OFFS_LM80 + SSD_LM80_IN_NR)
643#define SSD_HWMON_OFFS_FPGA (SSD_HWMON_OFFS_CLOCK + SSD_CLOCK_NR)
644
645#define SSD_HWMON_TEMP(idx) (SSD_HWMON_OFFS_TEMP + idx)
646#define SSD_HWMON_SENSOR(idx) (SSD_HWMON_OFFS_SENSOR + idx)
647#define SSD_HWMON_PL_CAP(idx) (SSD_HWMON_OFFS_PL_CAP + idx)
648#define SSD_HWMON_LM80(idx) (SSD_HWMON_OFFS_LM80 + idx)
649#define SSD_HWMON_CLOCK(idx) (SSD_HWMON_OFFS_CLOCK + idx)
650#define SSD_HWMON_FPGA(ctrl, idx) (SSD_HWMON_OFFS_FPGA + (ctrl * SSD_FPGA_VOLT_NR) + idx)
651
652
653
654/* fifo */
655typedef struct sfifo
656{
657 uint32_t in;
658 uint32_t out;
659 uint32_t size;
660 uint32_t esize;
661 uint32_t mask;
662 spinlock_t lock;
663 void *data;
664} sfifo_t;
665
666static int sfifo_alloc(struct sfifo *fifo, uint32_t size, uint32_t esize)
667{
668 uint32_t __size = 1;
669
670 if (!fifo || size > INT_MAX || esize == 0) {
671 return -EINVAL;
672 }
673
674 while (__size < size) __size <<= 1;
675
676 if (__size < 2) {
677 return -EINVAL;
678 }
679
680 fifo->data = vmalloc(esize * __size);
681 if (!fifo->data) {
682 return -ENOMEM;
683 }
684
685 fifo->in = 0;
686 fifo->out = 0;
687 fifo->mask = __size - 1;
688 fifo->size = __size;
689 fifo->esize = esize;
690 spin_lock_init(&fifo->lock);
691
692 return 0;
693}
694
695static void sfifo_free(struct sfifo *fifo)
696{
697 if (!fifo) {
698 return;
699 }
700
701 vfree(fifo->data);
702 fifo->data = NULL;
703 fifo->in = 0;
704 fifo->out = 0;
705 fifo->mask = 0;
706 fifo->size = 0;
707 fifo->esize = 0;
708}
709
710static int __sfifo_put(struct sfifo *fifo, void *val)
711{
712 if (((fifo->in + 1) & fifo->mask) == fifo->out) {
713 return -1;
714 }
715
716 memcpy((fifo->data + (fifo->in * fifo->esize)), val, fifo->esize);
717 fifo->in = (fifo->in + 1) & fifo->mask;
718
719 return 0;
720}
721
722static int sfifo_put(struct sfifo *fifo, void *val)
723{
724 int ret = 0;
725
726 if (!fifo || !val) {
727 return -EINVAL;
728 }
729
730 if (!in_interrupt()) {
731 spin_lock_irq(&fifo->lock);
732 ret = __sfifo_put(fifo, val);
733 spin_unlock_irq(&fifo->lock);
734 } else {
735 spin_lock(&fifo->lock);
736 ret = __sfifo_put(fifo, val);
737 spin_unlock(&fifo->lock);
738 }
739
740 return ret;
741}
742
743static int __sfifo_get(struct sfifo *fifo, void *val)
744{
745 if (fifo->out == fifo->in) {
746 return -1;
747 }
748
749 memcpy(val, (fifo->data + (fifo->out * fifo->esize)), fifo->esize);
750 fifo->out = (fifo->out + 1) & fifo->mask;
751
752 return 0;
753}
754
755static int sfifo_get(struct sfifo *fifo, void *val)
756{
757 int ret = 0;
758
759 if (!fifo || !val) {
760 return -EINVAL;
761 }
762
763 if (!in_interrupt()) {
764 spin_lock_irq(&fifo->lock);
765 ret = __sfifo_get(fifo, val);
766 spin_unlock_irq(&fifo->lock);
767 } else {
768 spin_lock(&fifo->lock);
769 ret = __sfifo_get(fifo, val);
770 spin_unlock(&fifo->lock);
771 }
772
773 return ret;
774}
775
776/* bio list */
777#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
778struct ssd_blist {
779 struct bio *prev;
780 struct bio *next;
781};
782
783static inline void ssd_blist_init(struct ssd_blist *ssd_bl)
784{
785 ssd_bl->prev = NULL;
786 ssd_bl->next = NULL;
787}
788
789static inline struct bio *ssd_blist_get(struct ssd_blist *ssd_bl)
790{
791 struct bio *bio = ssd_bl->prev;
792
793 ssd_bl->prev = NULL;
794 ssd_bl->next = NULL;
795
796 return bio;
797}
798
799static inline void ssd_blist_add(struct ssd_blist *ssd_bl, struct bio *bio)
800{
801 bio->bi_next = NULL;
802
803 if (ssd_bl->next) {
804 ssd_bl->next->bi_next = bio;
805 } else {
806 ssd_bl->prev = bio;
807 }
808
809 ssd_bl->next = bio;
810}
811
812#else
813#define ssd_blist bio_list
814#define ssd_blist_init bio_list_init
815#define ssd_blist_get bio_list_get
816#define ssd_blist_add bio_list_add
817#endif
818
819#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
820#define bio_start(bio) (bio->bi_sector)
821#else
822#define bio_start(bio) (bio->bi_iter.bi_sector)
823#endif
824
825/* mutex */
826#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
827#define mutex_lock down
828#define mutex_unlock up
829#define mutex semaphore
830#define mutex_init init_MUTEX
831#endif
832
833/* i2c */
834typedef union ssd_i2c_ctrl {
835 uint32_t val;
836 struct {
837 uint8_t wdata;
838 uint8_t addr;
839 uint16_t rw:1;
840 uint16_t pad:15;
841 } bits;
842}__attribute__((packed)) ssd_i2c_ctrl_t;
843
844typedef union ssd_i2c_data {
845 uint32_t val;
846 struct {
847 uint32_t rdata:8;
848 uint32_t valid:1;
849 uint32_t pad:23;
850 } bits;
851}__attribute__((packed)) ssd_i2c_data_t;
852
853/* write mode */
854enum ssd_write_mode
855{
856 SSD_WMODE_BUFFER = 0,
857 SSD_WMODE_BUFFER_EX,
858 SSD_WMODE_FUA,
859 /* dummy */
860 SSD_WMODE_AUTO,
861 SSD_WMODE_DEFAULT
862};
863
864/* reset type */
865enum ssd_reset_type
866{
867 SSD_RST_NOINIT = 0,
868 SSD_RST_NORMAL,
869 SSD_RST_FULL
870};
871
872/* ssd msg */
873typedef struct ssd_sg_entry
874{
875 uint64_t block:48;
876 uint64_t length:16;
877 uint64_t buf;
878}__attribute__((packed))ssd_sg_entry_t;
879
880typedef struct ssd_rw_msg
881{
882 uint8_t tag;
883 uint8_t flag;
884 uint8_t nsegs;
885 uint8_t fun;
886 uint32_t reserved; //for 64-bit align
887 struct ssd_sg_entry sge[1]; //base
888}__attribute__((packed))ssd_rw_msg_t;
889
890typedef struct ssd_resp_msg
891{
892 uint8_t tag;
893 uint8_t status:2;
894 uint8_t bitflip:6;
895 uint8_t log;
896 uint8_t fun;
897 uint32_t reserved;
898}__attribute__((packed))ssd_resp_msg_t;
899
900typedef struct ssd_flush_msg
901{
902 uint8_t tag;
903 uint8_t flag:2; //flash cache 0 or bbt 1
904 uint8_t flash:6;
905 uint8_t ctrl_idx;
906 uint8_t fun;
907 uint32_t reserved; //align
908}__attribute__((packed))ssd_flush_msg_t;
909
910typedef struct ssd_nand_op_msg
911{
912 uint8_t tag;
913 uint8_t flag;
914 uint8_t ctrl_idx;
915 uint8_t fun;
916 uint32_t reserved; //align
917 uint16_t page_count;
918 uint8_t chip_ce;
919 uint8_t chip_no;
920 uint32_t page_no;
921 uint64_t buf;
922}__attribute__((packed))ssd_nand_op_msg_t;
923
924typedef struct ssd_ram_op_msg
925{
926 uint8_t tag;
927 uint8_t flag;
928 uint8_t ctrl_idx;
929 uint8_t fun;
930 uint32_t reserved; //align
931 uint32_t start;
932 uint32_t length;
933 uint64_t buf;
934}__attribute__((packed))ssd_ram_op_msg_t;
935
936
937/* log msg */
938typedef struct ssd_log_msg
939{
940 uint8_t tag;
941 uint8_t flag;
942 uint8_t ctrl_idx;
943 uint8_t fun;
944 uint32_t reserved; //align
945 uint64_t buf;
946}__attribute__((packed))ssd_log_msg_t;
947
948typedef struct ssd_log_op_msg
949{
950 uint8_t tag;
951 uint8_t flag;
952 uint8_t ctrl_idx;
953 uint8_t fun;
954 uint32_t reserved; //align
955 uint64_t reserved1; //align
956 uint64_t buf;
957}__attribute__((packed))ssd_log_op_msg_t;
958
959typedef struct ssd_log_resp_msg
960{
961 uint8_t tag;
962 uint16_t status :2;
963 uint16_t reserved1 :2; //align with the normal resp msg
964 uint16_t nr_log :12;
965 uint8_t fun;
966 uint32_t reserved;
967}__attribute__((packed))ssd_log_resp_msg_t;
968
969
970/* resp msg */
971typedef union ssd_response_msq
972{
973 ssd_resp_msg_t resp_msg;
974 ssd_log_resp_msg_t log_resp_msg;
975 uint64_t u64_msg;
976 uint32_t u32_msg[2];
977} ssd_response_msq_t;
978
979
980/* custom struct */
981typedef struct ssd_protocol_info
982{
983 uint32_t ver;
984 uint32_t init_state_reg;
985 uint32_t init_state_reg_sz;
986 uint32_t chip_info_reg;
987 uint32_t chip_info_reg_sz;
988} ssd_protocol_info_t;
989
990typedef struct ssd_hw_info
991{
992 uint32_t bridge_ver;
993 uint32_t ctrl_ver;
994
995 uint32_t cmd_fifo_sz;
996 uint32_t cmd_fifo_sz_mask;
997 uint32_t cmd_max_sg;
998 uint32_t sg_max_sec;
999 uint32_t resp_ptr_sz;
1000 uint32_t resp_msg_sz;
1001
1002 uint16_t nr_ctrl;
1003
1004 uint16_t nr_data_ch;
1005 uint16_t nr_ch;
1006 uint16_t max_ch;
1007 uint16_t nr_chip;
1008
1009 uint8_t pcb_ver;
1010 uint8_t upper_pcb_ver;
1011
1012 uint8_t nand_vendor_id;
1013 uint8_t nand_dev_id;
1014
1015 uint8_t max_ce;
1016 uint8_t id_size;
1017 uint16_t oob_size;
1018
1019 uint16_t bbf_pages;
1020 uint16_t bbf_seek; //
1021
1022 uint16_t page_count; //per block
1023 uint32_t page_size;
1024 uint32_t block_count; //per flash
1025
1026 uint64_t ram_size;
1027 uint32_t ram_align;
1028 uint32_t ram_max_len;
1029
1030 uint64_t bbt_base;
1031 uint32_t bbt_size;
1032 uint64_t md_base; //metadata
1033 uint32_t md_size;
1034 uint32_t md_entry_sz;
1035
1036 uint32_t log_sz;
1037
1038 uint64_t nand_wbuff_base;
1039
1040 uint32_t md_reserved_blks;
1041 uint32_t reserved_blks;
1042 uint32_t valid_pages;
1043 uint32_t max_valid_pages;
1044 uint64_t size;
1045} ssd_hw_info_t;
1046
1047typedef struct ssd_hw_info_extend
1048{
1049 uint8_t board_type;
1050 uint8_t cap_type;
1051 uint8_t plp_type;
1052 uint8_t work_mode;
1053 uint8_t form_factor;
1054
1055 uint8_t pad[59];
1056}ssd_hw_info_extend_t;
1057
1058typedef struct ssd_rom_info
1059{
1060 uint32_t size;
1061 uint32_t block_size;
1062 uint16_t page_size;
1063 uint8_t nr_bridge_fw;
1064 uint8_t nr_ctrl_fw;
1065 uint8_t nr_bm_fw;
1066 uint8_t nr_smart;
1067 uint32_t bridge_fw_base;
1068 uint32_t bridge_fw_sz;
1069 uint32_t ctrl_fw_base;
1070 uint32_t ctrl_fw_sz;
1071 uint32_t bm_fw_base;
1072 uint32_t bm_fw_sz;
1073 uint32_t log_base;
1074 uint32_t log_sz;
1075 uint32_t smart_base;
1076 uint32_t smart_sz;
1077 uint32_t vp_base;
1078 uint32_t label_base;
1079} ssd_rom_info_t;
1080
1081/* debug info */
1082enum ssd_debug_type
1083{
1084 SSD_DEBUG_NONE = 0,
1085 SSD_DEBUG_READ_ERR,
1086 SSD_DEBUG_WRITE_ERR,
1087 SSD_DEBUG_RW_ERR,
1088 SSD_DEBUG_READ_TO,
1089 SSD_DEBUG_WRITE_TO,
1090 SSD_DEBUG_RW_TO,
1091 SSD_DEBUG_LOG,
1092 SSD_DEBUG_OFFLINE,
1093 SSD_DEBUG_NR
1094};
1095
1096typedef struct ssd_debug_info
1097{
1098 int type;
1099 union {
1100 struct {
1101 uint64_t off;
1102 uint32_t len;
1103 } loc;
1104 struct {
1105 int event;
1106 uint32_t extra;
1107 } log;
1108 } data;
1109}ssd_debug_info_t;
1110
1111/* label */
1112#define SSD_LABEL_FIELD_SZ 32
1113#define SSD_SN_SZ 16
1114
1115typedef struct ssd_label
1116{
1117 char date[SSD_LABEL_FIELD_SZ];
1118 char sn[SSD_LABEL_FIELD_SZ];
1119 char part[SSD_LABEL_FIELD_SZ];
1120 char desc[SSD_LABEL_FIELD_SZ];
1121 char other[SSD_LABEL_FIELD_SZ];
1122 char maf[SSD_LABEL_FIELD_SZ];
1123} ssd_label_t;
1124
1125#define SSD_LABEL_DESC_SZ 256
1126
1127typedef struct ssd_labelv3
1128{
1129 char boardtype[SSD_LABEL_FIELD_SZ];
1130 char barcode[SSD_LABEL_FIELD_SZ];
1131 char item[SSD_LABEL_FIELD_SZ];
1132 char description[SSD_LABEL_DESC_SZ];
1133 char manufactured[SSD_LABEL_FIELD_SZ];
1134 char vendorname[SSD_LABEL_FIELD_SZ];
1135 char issuenumber[SSD_LABEL_FIELD_SZ];
1136 char cleicode[SSD_LABEL_FIELD_SZ];
1137 char bom[SSD_LABEL_FIELD_SZ];
1138} ssd_labelv3_t;
1139
1140/* battery */
1141typedef struct ssd_battery_info
1142{
1143 uint32_t fw_ver;
1144} ssd_battery_info_t;
1145
1146/* ssd power stat */
1147typedef struct ssd_power_stat
1148{
1149 uint64_t nr_poweron;
1150 uint64_t nr_powerloss;
1151 uint64_t init_failed;
1152} ssd_power_stat_t;
1153
1154/* io stat */
1155typedef struct ssd_io_stat
1156{
1157 uint64_t run_time;
1158 uint64_t nr_to;
1159 uint64_t nr_ioerr;
1160 uint64_t nr_rwerr;
1161 uint64_t nr_read;
1162 uint64_t nr_write;
1163 uint64_t rsectors;
1164 uint64_t wsectors;
1165} ssd_io_stat_t;
1166
1167/* ecc */
1168typedef struct ssd_ecc_info
1169{
1170 uint64_t bitflip[SSD_ECC_MAX_FLIP];
1171} ssd_ecc_info_t;
1172
1173/* log */
1174enum ssd_log_level
1175{
1176 SSD_LOG_LEVEL_INFO = 0,
1177 SSD_LOG_LEVEL_NOTICE,
1178 SSD_LOG_LEVEL_WARNING,
1179 SSD_LOG_LEVEL_ERR,
1180 SSD_LOG_NR_LEVEL
1181};
1182
1183typedef struct ssd_log_info
1184{
1185 uint64_t nr_log;
1186 uint64_t stat[SSD_LOG_NR_LEVEL];
1187} ssd_log_info_t;
1188
1189/* S.M.A.R.T. */
1190#define SSD_SMART_MAGIC (0x5452414D53445353ull)
1191
1192typedef struct ssd_smart
1193{
1194 struct ssd_power_stat pstat;
1195 struct ssd_io_stat io_stat;
1196 struct ssd_ecc_info ecc_info;
1197 struct ssd_log_info log_info;
1198 uint64_t version;
1199 uint64_t magic;
1200} ssd_smart_t;
1201
1202/* internal log */
1203typedef struct ssd_internal_log
1204{
1205 uint32_t nr_log;
1206 void *log;
1207} ssd_internal_log_t;
1208
1209/* ssd cmd */
1210typedef struct ssd_cmd
1211{
1212 struct bio *bio;
1213 struct scatterlist *sgl;
1214 struct list_head list;
1215 void *dev;
1216 int nsegs;
1217 int flag; /*pbio(1) or bio(0)*/
1218
1219 int tag;
1220 void *msg;
1221 dma_addr_t msg_dma;
1222
1223 unsigned long start_time;
1224
1225 int errors;
1226 unsigned int nr_log;
1227
1228 struct timer_list cmd_timer;
1229 struct completion *waiting;
1230} ssd_cmd_t;
1231
1232typedef void (*send_cmd_func)(struct ssd_cmd *);
1233typedef int (*ssd_event_call)(struct gendisk *, int, int); /* gendisk, event id, event level */
1234
1235/* dcmd sz */
1236#define SSD_DCMD_MAX_SZ 32
1237
1238typedef struct ssd_dcmd
1239{
1240 struct list_head list;
1241 void *dev;
1242 uint8_t msg[SSD_DCMD_MAX_SZ];
1243} ssd_dcmd_t;
1244
1245
1246enum ssd_state {
1247 SSD_INIT_WORKQ,
1248 SSD_INIT_BD,
1249 SSD_ONLINE,
1250 /* full reset */
1251 SSD_RESETING,
1252 /* hw log */
1253 SSD_LOG_HW,
1254 /* log err */
1255 SSD_LOG_ERR
1256};
1257
1258#define SSD_QUEUE_NAME_LEN 16
1259typedef struct ssd_queue {
1260 char name[SSD_QUEUE_NAME_LEN];
1261 void *dev;
1262
1263 int idx;
1264
1265 uint32_t resp_idx;
1266 uint32_t resp_idx_mask;
1267 uint32_t resp_msg_sz;
1268
1269 void *resp_msg;
1270 void *resp_ptr;
1271
1272 struct ssd_cmd *cmd;
1273
1274 struct ssd_io_stat io_stat;
1275 struct ssd_ecc_info ecc_info;
1276} ssd_queue_t;
1277
1278typedef struct ssd_device {
1279 char name[SSD_DEV_NAME_LEN];
1280
1281 int idx;
1282 int major;
1283 int readonly;
1284
1285 int int_mode;
1286#ifdef SSD_ESCAPE_IRQ
1287 int irq_cpu;
1288#endif
1289
1290 int reload_fw;
1291
1292 int ot_delay; //in ms
1293
1294 atomic_t refcnt;
1295 atomic_t tocnt;
1296 atomic_t in_flight[2]; //r&w
1297
1298 uint64_t uptime;
1299
1300 struct list_head list;
1301 struct pci_dev *pdev;
1302
1303 unsigned long mmio_base;
1304 unsigned long mmio_len;
1305 void __iomem *ctrlp;
1306
1307 struct mutex spi_mutex;
1308 struct mutex i2c_mutex;
1309
1310 struct ssd_protocol_info protocol_info;
1311 struct ssd_hw_info hw_info;
1312 struct ssd_rom_info rom_info;
1313 struct ssd_label label;
1314
1315 struct ssd_smart smart;
1316
1317 atomic_t in_sendq;
1318 spinlock_t sendq_lock;
1319 struct ssd_blist sendq;
1320 struct task_struct *send_thread;
1321 wait_queue_head_t send_waitq;
1322
1323 atomic_t in_doneq;
1324 spinlock_t doneq_lock;
1325 struct ssd_blist doneq;
1326 struct task_struct *done_thread;
1327 wait_queue_head_t done_waitq;
1328
1329 struct ssd_dcmd *dcmd;
1330 spinlock_t dcmd_lock;
1331 struct list_head dcmd_list; /* direct cmd list */
1332 wait_queue_head_t dcmd_wq;
1333
1334 unsigned long *tag_map;
1335 wait_queue_head_t tag_wq;
1336
1337 spinlock_t cmd_lock;
1338 struct ssd_cmd *cmd;
1339 send_cmd_func scmd;
1340
1341 ssd_event_call event_call;
1342 void *msg_base;
1343 dma_addr_t msg_base_dma;
1344
1345 uint32_t resp_idx;
1346 void *resp_msg_base;
1347 void *resp_ptr_base;
1348 dma_addr_t resp_msg_base_dma;
1349 dma_addr_t resp_ptr_base_dma;
1350
1351 int nr_queue;
1352 struct msix_entry entry[SSD_MSIX_VEC];
1353 struct ssd_queue queue[SSD_MSIX_VEC];
1354
1355 struct request_queue *rq; /* The device request queue */
1356 struct gendisk *gd; /* The gendisk structure */
1357
1358 struct mutex internal_log_mutex;
1359 struct ssd_internal_log internal_log;
1360 struct workqueue_struct *workq;
1361 struct work_struct log_work; /* get log */
1362 void *log_buf;
1363
1364 unsigned long state; /* device state, for example, block device inited */
1365
1366 struct module *owner;
1367
1368 /* extend */
1369
1370 int slave;
1371 int cmajor;
1372 int save_md;
1373 int ot_protect;
1374
1375 struct kref kref;
1376
1377 struct mutex gd_mutex;
1378 struct ssd_log_info log_info; /* volatile */
1379
1380 atomic_t queue_depth;
1381 struct mutex barrier_mutex;
1382 struct mutex fw_mutex;
1383
1384 struct ssd_hw_info_extend hw_info_ext;
1385 struct ssd_labelv3 labelv3;
1386
1387 int wmode;
1388 int user_wmode;
1389 struct mutex bm_mutex;
1390 struct work_struct bm_work; /* check bm */
1391 struct timer_list bm_timer;
1392 struct sfifo log_fifo;
1393
1394 struct timer_list routine_timer;
1395 unsigned long routine_tick;
1396 unsigned long hwmon;
1397
1398 struct work_struct hwmon_work; /* check hw */
1399 struct work_struct capmon_work; /* check battery */
1400 struct work_struct tempmon_work; /* check temp */
1401
1402 /* debug info */
1403 struct ssd_debug_info db_info;
1404} ssd_device_t;
1405
1406
1407/* Ioctl struct */
1408typedef struct ssd_acc_info {
1409 uint32_t threshold_l1;
1410 uint32_t threshold_l2;
1411 uint32_t val;
1412} ssd_acc_info_t;
1413
1414typedef struct ssd_reg_op_info
1415{
1416 uint32_t offset;
1417 uint32_t value;
1418} ssd_reg_op_info_t;
1419
1420typedef struct ssd_spi_op_info
1421{
1422 void __user *buf;
1423 uint32_t off;
1424 uint32_t len;
1425} ssd_spi_op_info_t;
1426
1427typedef struct ssd_i2c_op_info
1428{
1429 uint8_t saddr;
1430 uint8_t wsize;
1431 uint8_t rsize;
1432 void __user *wbuf;
1433 void __user *rbuf;
1434} ssd_i2c_op_info_t;
1435
1436typedef struct ssd_smbus_op_info
1437{
1438 uint8_t saddr;
1439 uint8_t cmd;
1440 uint8_t size;
1441 void __user *buf;
1442} ssd_smbus_op_info_t;
1443
1444typedef struct ssd_ram_op_info {
1445 uint8_t ctrl_idx;
1446 uint32_t length;
1447 uint64_t start;
1448 uint8_t __user *buf;
1449} ssd_ram_op_info_t;
1450
1451typedef struct ssd_flash_op_info {
1452 uint32_t page;
1453 uint16_t flash;
1454 uint8_t chip;
1455 uint8_t ctrl_idx;
1456 uint8_t __user *buf;
1457} ssd_flash_op_info_t;
1458
1459typedef struct ssd_sw_log_info {
1460 uint16_t event;
1461 uint16_t pad;
1462 uint32_t data;
1463} ssd_sw_log_info_t;
1464
1465typedef struct ssd_version_info
1466{
1467 uint32_t bridge_ver; /* bridge fw version */
1468 uint32_t ctrl_ver; /* controller fw version */
1469 uint32_t bm_ver; /* battery manager fw version */
1470 uint8_t pcb_ver; /* main pcb version */
1471 uint8_t upper_pcb_ver;
1472 uint8_t pad0;
1473 uint8_t pad1;
1474} ssd_version_info_t;
1475
1476typedef struct pci_addr
1477{
1478 uint16_t domain;
1479 uint8_t bus;
1480 uint8_t slot;
1481 uint8_t func;
1482} pci_addr_t;
1483
1484typedef struct ssd_drv_param_info {
1485 int mode;
1486 int status_mask;
1487 int int_mode;
1488 int threaded_irq;
1489 int log_level;
1490 int wmode;
1491 int ot_protect;
1492 int finject;
1493 int pad[8];
1494} ssd_drv_param_info_t;
1495
1496
1497/* form factor */
1498enum ssd_form_factor
1499{
1500 SSD_FORM_FACTOR_HHHL = 0,
1501 SSD_FORM_FACTOR_FHHL
1502};
1503
1504
1505/* ssd power loss protect */
1506enum ssd_plp_type
1507{
1508 SSD_PLP_SCAP = 0,
1509 SSD_PLP_CAP,
1510 SSD_PLP_NONE
1511};
1512
1513/* ssd bm */
1514#define SSD_BM_SLAVE_ADDRESS 0x16
1515#define SSD_BM_CAP 5
1516
1517/* SBS cmd */
1518#define SSD_BM_SAFETYSTATUS 0x51
1519#define SSD_BM_OPERATIONSTATUS 0x54
1520
1521/* ManufacturerAccess */
1522#define SSD_BM_MANUFACTURERACCESS 0x00
1523#define SSD_BM_ENTER_CAP_LEARNING 0x0023 /* cap learning */
1524
1525/* Data flash access */
1526#define SSD_BM_DATA_FLASH_SUBCLASS_ID 0x77
1527#define SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1 0x78
1528#define SSD_BM_SYSTEM_DATA_SUBCLASS_ID 56
1529#define SSD_BM_CONFIGURATION_REGISTERS_ID 64
1530
1531/* min cap voltage */
1532#define SSD_BM_CAP_VOLT_MIN 500
1533
1534/*
1535enum ssd_bm_cap
1536{
1537 SSD_BM_CAP_VINA = 1,
1538 SSD_BM_CAP_JH = 3
1539};*/
1540
1541enum ssd_bmstatus
1542{
1543 SSD_BMSTATUS_OK = 0,
1544 SSD_BMSTATUS_CHARGING, /* not fully charged */
1545 SSD_BMSTATUS_WARNING
1546};
1547
1548enum sbs_unit {
1549 SBS_UNIT_VALUE = 0,
1550 SBS_UNIT_TEMPERATURE,
1551 SBS_UNIT_VOLTAGE,
1552 SBS_UNIT_CURRENT,
1553 SBS_UNIT_ESR,
1554 SBS_UNIT_PERCENT,
1555 SBS_UNIT_CAPACITANCE
1556};
1557
1558enum sbs_size {
1559 SBS_SIZE_BYTE = 1,
1560 SBS_SIZE_WORD,
1561 SBS_SIZE_BLK,
1562};
1563
1564struct sbs_cmd {
1565 uint8_t cmd;
1566 uint8_t size;
1567 uint8_t unit;
1568 uint8_t off;
1569 uint16_t mask;
1570 char *desc;
1571};
1572
1573struct ssd_bm {
1574 uint16_t temp;
1575 uint16_t volt;
1576 uint16_t curr;
1577 uint16_t esr;
1578 uint16_t rsoc;
1579 uint16_t health;
1580 uint16_t cap;
1581 uint16_t chg_curr;
1582 uint16_t chg_volt;
1583 uint16_t cap_volt[SSD_BM_CAP];
1584 uint16_t sf_alert;
1585 uint16_t sf_status;
1586 uint16_t op_status;
1587 uint16_t sys_volt;
1588};
1589
1590struct ssd_bm_manufacturer_data
1591{
1592 uint16_t pack_lot_code;
1593 uint16_t pcb_lot_code;
1594 uint16_t firmware_ver;
1595 uint16_t hardware_ver;
1596};
1597
1598struct ssd_bm_configuration_registers
1599{
1600 struct {
1601 uint16_t cc:3;
1602 uint16_t rsvd:5;
1603 uint16_t stack:1;
1604 uint16_t rsvd1:2;
1605 uint16_t temp:2;
1606 uint16_t rsvd2:1;
1607 uint16_t lt_en:1;
1608 uint16_t rsvd3:1;
1609 } operation_cfg;
1610 uint16_t pad;
1611 uint16_t fet_action;
1612 uint16_t pad1;
1613 uint16_t fault;
1614};
1615
1616#define SBS_VALUE_MASK 0xffff
1617
1618#define bm_var_offset(var) ((size_t) &((struct ssd_bm *)0)->var)
1619#define bm_var(start, offset) ((void *) start + (offset))
1620
1621static struct sbs_cmd ssd_bm_sbs[] = {
1622 {0x08, SBS_SIZE_WORD, SBS_UNIT_TEMPERATURE, bm_var_offset(temp), SBS_VALUE_MASK, "Temperature"},
1623 {0x09, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(volt), SBS_VALUE_MASK, "Voltage"},
1624 {0x0a, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(curr), SBS_VALUE_MASK, "Current"},
1625 {0x0b, SBS_SIZE_WORD, SBS_UNIT_ESR, bm_var_offset(esr), SBS_VALUE_MASK, "ESR"},
1626 {0x0d, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(rsoc), SBS_VALUE_MASK, "RelativeStateOfCharge"},
1627 {0x0e, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(health), SBS_VALUE_MASK, "Health"},
1628 {0x10, SBS_SIZE_WORD, SBS_UNIT_CAPACITANCE, bm_var_offset(cap), SBS_VALUE_MASK, "Capacitance"},
1629 {0x14, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(chg_curr), SBS_VALUE_MASK, "ChargingCurrent"},
1630 {0x15, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(chg_volt), SBS_VALUE_MASK, "ChargingVoltage"},
1631 {0x3b, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[4]), SBS_VALUE_MASK, "CapacitorVoltage5"},
1632 {0x3c, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[3]), SBS_VALUE_MASK, "CapacitorVoltage4"},
1633 {0x3d, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[2]), SBS_VALUE_MASK, "CapacitorVoltage3"},
1634 {0x3e, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[1]), SBS_VALUE_MASK, "CapacitorVoltage2"},
1635 {0x3f, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[0]), SBS_VALUE_MASK, "CapacitorVoltage1"},
1636 {0x50, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_alert), 0x870F, "SafetyAlert"},
1637 {0x51, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_status), 0xE7BF, "SafetyStatus"},
1638 {0x54, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(op_status), 0x79F4, "OperationStatus"},
1639 {0x5a, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(sys_volt), SBS_VALUE_MASK, "SystemVoltage"},
1640 {0, 0, 0, 0, 0, NULL},
1641};
1642
1643/* ssd ioctl */
1644#define SSD_CMD_GET_PROTOCOL_INFO _IOR('H', 100, struct ssd_protocol_info)
1645#define SSD_CMD_GET_HW_INFO _IOR('H', 101, struct ssd_hw_info)
1646#define SSD_CMD_GET_ROM_INFO _IOR('H', 102, struct ssd_rom_info)
1647#define SSD_CMD_GET_SMART _IOR('H', 103, struct ssd_smart)
1648#define SSD_CMD_GET_IDX _IOR('H', 105, int)
1649#define SSD_CMD_GET_AMOUNT _IOR('H', 106, int)
1650#define SSD_CMD_GET_TO_INFO _IOR('H', 107, int)
1651#define SSD_CMD_GET_DRV_VER _IOR('H', 108, char[DRIVER_VERSION_LEN])
1652
1653#define SSD_CMD_GET_BBACC_INFO _IOR('H', 109, struct ssd_acc_info)
1654#define SSD_CMD_GET_ECACC_INFO _IOR('H', 110, struct ssd_acc_info)
1655
1656#define SSD_CMD_GET_HW_INFO_EXT _IOR('H', 111, struct ssd_hw_info_extend)
1657
1658#define SSD_CMD_REG_READ _IOWR('H', 120, struct ssd_reg_op_info)
1659#define SSD_CMD_REG_WRITE _IOWR('H', 121, struct ssd_reg_op_info)
1660
1661#define SSD_CMD_SPI_READ _IOWR('H', 125, struct ssd_spi_op_info)
1662#define SSD_CMD_SPI_WRITE _IOWR('H', 126, struct ssd_spi_op_info)
1663#define SSD_CMD_SPI_ERASE _IOWR('H', 127, struct ssd_spi_op_info)
1664
1665#define SSD_CMD_I2C_READ _IOWR('H', 128, struct ssd_i2c_op_info)
1666#define SSD_CMD_I2C_WRITE _IOWR('H', 129, struct ssd_i2c_op_info)
1667#define SSD_CMD_I2C_WRITE_READ _IOWR('H', 130, struct ssd_i2c_op_info)
1668
1669#define SSD_CMD_SMBUS_SEND_BYTE _IOWR('H', 131, struct ssd_smbus_op_info)
1670#define SSD_CMD_SMBUS_RECEIVE_BYTE _IOWR('H', 132, struct ssd_smbus_op_info)
1671#define SSD_CMD_SMBUS_WRITE_BYTE _IOWR('H', 133, struct ssd_smbus_op_info)
1672#define SSD_CMD_SMBUS_READ_BYTE _IOWR('H', 135, struct ssd_smbus_op_info)
1673#define SSD_CMD_SMBUS_WRITE_WORD _IOWR('H', 136, struct ssd_smbus_op_info)
1674#define SSD_CMD_SMBUS_READ_WORD _IOWR('H', 137, struct ssd_smbus_op_info)
1675#define SSD_CMD_SMBUS_WRITE_BLOCK _IOWR('H', 138, struct ssd_smbus_op_info)
1676#define SSD_CMD_SMBUS_READ_BLOCK _IOWR('H', 139, struct ssd_smbus_op_info)
1677
1678#define SSD_CMD_BM_GET_VER _IOR('H', 140, uint16_t)
1679#define SSD_CMD_BM_GET_NR_CAP _IOR('H', 141, int)
1680#define SSD_CMD_BM_CAP_LEARNING _IOW('H', 142, int)
1681#define SSD_CMD_CAP_LEARN _IOR('H', 143, uint32_t)
1682#define SSD_CMD_GET_CAP_STATUS _IOR('H', 144, int)
1683
1684#define SSD_CMD_RAM_READ _IOWR('H', 150, struct ssd_ram_op_info)
1685#define SSD_CMD_RAM_WRITE _IOWR('H', 151, struct ssd_ram_op_info)
1686
1687#define SSD_CMD_NAND_READ_ID _IOR('H', 160, struct ssd_flash_op_info)
1688#define SSD_CMD_NAND_READ _IOWR('H', 161, struct ssd_flash_op_info) //with oob
1689#define SSD_CMD_NAND_WRITE _IOWR('H', 162, struct ssd_flash_op_info)
1690#define SSD_CMD_NAND_ERASE _IOWR('H', 163, struct ssd_flash_op_info)
1691#define SSD_CMD_NAND_READ_EXT _IOWR('H', 164, struct ssd_flash_op_info) //ingore EIO
1692
1693#define SSD_CMD_UPDATE_BBT _IOW('H', 180, struct ssd_flash_op_info)
1694
1695#define SSD_CMD_CLEAR_ALARM _IOW('H', 190, int)
1696#define SSD_CMD_SET_ALARM _IOW('H', 191, int)
1697
1698#define SSD_CMD_RESET _IOW('H', 200, int)
1699#define SSD_CMD_RELOAD_FW _IOW('H', 201, int)
1700#define SSD_CMD_UNLOAD_DEV _IOW('H', 202, int)
1701#define SSD_CMD_LOAD_DEV _IOW('H', 203, int)
1702#define SSD_CMD_UPDATE_VP _IOWR('H', 205, uint32_t)
1703#define SSD_CMD_FULL_RESET _IOW('H', 206, int)
1704
1705#define SSD_CMD_GET_NR_LOG _IOR('H', 220, uint32_t)
1706#define SSD_CMD_GET_LOG _IOR('H', 221, void *)
1707#define SSD_CMD_LOG_LEVEL _IOW('H', 222, int)
1708
1709#define SSD_CMD_OT_PROTECT _IOW('H', 223, int)
1710#define SSD_CMD_GET_OT_STATUS _IOR('H', 224, int)
1711
1712#define SSD_CMD_CLEAR_LOG _IOW('H', 230, int)
1713#define SSD_CMD_CLEAR_SMART _IOW('H', 231, int)
1714
1715#define SSD_CMD_SW_LOG _IOW('H', 232, struct ssd_sw_log_info)
1716
1717#define SSD_CMD_GET_LABEL _IOR('H', 235, struct ssd_label)
1718#define SSD_CMD_GET_VERSION _IOR('H', 236, struct ssd_version_info)
1719#define SSD_CMD_GET_TEMPERATURE _IOR('H', 237, int)
1720#define SSD_CMD_GET_BMSTATUS _IOR('H', 238, int)
1721#define SSD_CMD_GET_LABEL2 _IOR('H', 239, void *)
1722
1723
1724#define SSD_CMD_FLUSH _IOW('H', 240, int)
1725#define SSD_CMD_SAVE_MD _IOW('H', 241, int)
1726
1727#define SSD_CMD_SET_WMODE _IOW('H', 242, int)
1728#define SSD_CMD_GET_WMODE _IOR('H', 243, int)
1729#define SSD_CMD_GET_USER_WMODE _IOR('H', 244, int)
1730
1731#define SSD_CMD_DEBUG _IOW('H', 250, struct ssd_debug_info)
1732#define SSD_CMD_DRV_PARAM_INFO _IOR('H', 251, struct ssd_drv_param_info)
1733
1734
1735/* log */
1736#define SSD_LOG_MAX_SZ 4096
1737#define SSD_LOG_LEVEL SSD_LOG_LEVEL_NOTICE
1738
1739enum ssd_log_data
1740{
1741 SSD_LOG_DATA_NONE = 0,
1742 SSD_LOG_DATA_LOC,
1743 SSD_LOG_DATA_HEX
1744};
1745
1746typedef struct ssd_log_entry
1747{
1748 union {
1749 struct {
1750 uint32_t page:10;
1751 uint32_t block:14;
1752 uint32_t flash:8;
1753 } loc;
1754 struct {
1755 uint32_t page:12;
1756 uint32_t block:12;
1757 uint32_t flash:8;
1758 } loc1;
1759 uint32_t val;
1760 } data;
1761 uint16_t event:10;
1762 uint16_t mod:6;
1763 uint16_t idx;
1764}__attribute__((packed))ssd_log_entry_t;
1765
1766typedef struct ssd_log
1767{
1768 uint64_t time:56;
1769 uint64_t ctrl_idx:8;
1770 ssd_log_entry_t le;
1771} __attribute__((packed)) ssd_log_t;
1772
1773typedef struct ssd_log_desc
1774{
1775 uint16_t event;
1776 uint8_t level;
1777 uint8_t data;
1778 uint8_t sblock;
1779 uint8_t spage;
1780 char *desc;
1781} __attribute__((packed)) ssd_log_desc_t;
1782
1783#define SSD_LOG_SW_IDX 0xF
1784#define SSD_UNKNOWN_EVENT ((uint16_t)-1)
1785static struct ssd_log_desc ssd_log_desc[] = {
1786 /* event, level, show flash, show block, show page, desc */
1787 {0x0, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Create BBT failure"}, //g3
1788 {0x1, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Read BBT failure"}, //g3
1789 {0x2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Mark bad block"},
1790 {0x3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flush BBT failure"},
1791 {0x4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1792 {0x7, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "No available blocks"},
1793 {0x8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Bad EC header"},
1794 {0x9, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 0, "Bad VID header"}, //g3
1795 {0xa, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Wear leveling"},
1796 {0xb, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "WL read back failure"},
1797 {0x11, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Data recovery failure"}, // err
1798 {0x20, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan mapping table failure"}, // err g3
1799 {0x21, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1800 {0x22, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1801 {0x23, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1802 {0x24, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Merge: read mapping page failure"},
1803 {0x25, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: read back failure"},
1804 {0x26, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1805 {0x27, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Data corrupted for abnormal power down"}, //g3
1806 {0x28, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: mapping page corrupted"},
1807 {0x29, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: no mapping page"},
1808 {0x2a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: mapping pages incomplete"},
1809 {0x2b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read back failure after programming failure"}, // err
1810 {0xf1, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read failure without recovery"}, // err
1811 {0xf2, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available blocks"}, // maybe err g3
1812 {0xf3, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: RAID incomplete"}, // err g3
1813 {0xf4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1814 {0xf5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read failure in moving data"},
1815 {0xf6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1816 {0xf7, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Init: RAID not complete"},
1817 {0xf8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: data moving interrupted"},
1818 {0xfe, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Data inspection failure"},
1819 {0xff, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "IO: ECC failed"},
1820
1821 /* new */
1822 {0x2e, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available reserved blocks" }, // err
1823 {0x30, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PMT membership not found"},
1824 {0x31, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PMT corrupted"},
1825 {0x32, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT membership not found"},
1826 {0x33, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT not found"},
1827 {0x34, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT corrupted"},
1828 {0x35, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT page read failure"},
1829 {0x36, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT page read failure"},
1830 {0x37, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT backup page read failure"},
1831 {0x38, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT read failure"},
1832 {0x39, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT scan failure"}, // err
1833 {0x3a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page read failure"},
1834 {0x3b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: first page scan failure"}, // err
1835 {0x3c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan unclosed block failure"}, // err
1836 {0x3d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: write pointer mismatch"},
1837 {0x3e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: PBMT read failure"},
1838 {0x3f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: PMT recovery: PBMT scan failure"},
1839 {0x40, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: data page read failure"}, //err
1840 {0x41, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT write pointer mismatch"},
1841 {0x42, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT latest version corrupted"},
1842 {0x43, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: too many unclosed blocks"},
1843 {0x44, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PDW block found"},
1844 {0x45, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Init: more than one PDW block found"}, //err
1845 {0x46, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page is blank or read failure"},
1846 {0x47, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PDW block not found"},
1847
1848 {0x50, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: hit error data"}, // err
1849 {0x51, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: read back failure"}, // err
1850 {0x52, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Cache: unknown command"}, //?
1851 {0x53, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "GC/WL read back failure"}, // err
1852
1853 {0x60, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Erase failure"},
1854
1855 {0x70, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "LPA not matched"},
1856 {0x71, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "PBN not matched"},
1857 {0x72, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read retry failure"},
1858 {0x73, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Need raid recovery"},
1859 {0x74, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "Need read retry"},
1860 {0x75, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read invalid data page"},
1861 {0x76, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN matched"},
1862 {0x77, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN not matched"},
1863 {0x78, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in flash, PBN not matched"},
1864 {0x79, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in cache, LPA not matched"},
1865 {0x7a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in flash, LPA not matched"},
1866 {0x7b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in cache, LPA not matched"},
1867 {0x7c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in flash, LPA not matched"},
1868 {0x7d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data page status error"},
1869 {0x7e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1870 {0x7f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Access flash timeout"},
1871
1872 {0x80, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "EC overflow"},
1873 {0x81, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_NONE, 0, 0, "Scrubbing completed"},
1874 {0x82, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Unstable block(too much bit flip)"},
1875 {0x83, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: ram error"}, //?
1876 {0x84, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: one PBMT read failure"},
1877
1878 {0x88, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: mark bad block"},
1879 {0x89, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: invalid page count error"}, // maybe err
1880 {0x8a, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: Bad Block close to limit"},
1881 {0x8b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: Bad Block over limit"},
1882 {0x8c, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: P/E cycles close to limit"},
1883 {0x8d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: P/E cycles over limit"},
1884
1885 {0x90, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Over temperature"}, //xx
1886 {0x91, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is OK"}, //xx
1887 {0x92, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Battery fault"},
1888 {0x93, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "SEU fault"}, //err
1889 {0x94, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "DDR error"}, //err
1890 {0x95, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Controller serdes error"}, //err
1891 {0x96, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 1 error"}, //err
1892 {0x97, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 2 error"}, //err
1893 {0x98, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "SEU fault (corrected)"}, //err
1894 {0x99, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Battery is OK"},
1895 {0x9a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature close to limit"}, //xx
1896
1897 {0x9b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (low)"},
1898 {0x9c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (high)"},
1899 {0x9d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "I2C fault" },
1900 {0x9e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "DDR single bit error" },
1901 {0x9f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Board voltage fault" },
1902
1903 {0xa0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "LPA not matched"},
1904 {0xa1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Re-read data in cache"},
1905 {0xa2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1906 {0xa3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Read blank page"},
1907 {0xa4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: new data in cache"},
1908 {0xa5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: PBN not matched"},
1909 {0xa6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data with error flag"},
1910 {0xa7, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: recoverd data with error flag"},
1911 {0xa8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Blank page in cache, PBN matched"},
1912 {0xa9, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Blank page in cache, PBN matched"},
1913 {0xaa, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flash init failure"},
1914 {0xab, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Mapping table recovery failure"},
1915 {0xac, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: ECC failed"},
1916 {0xb0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 95"},
1917 {0xb1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 100"},
1918
1919 {0x300, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "CMD timeout"},
1920 {0x301, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Power on"},
1921 {0x302, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Power off"},
1922 {0x303, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear log"},
1923 {0x304, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity"},
1924 {0x305, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data"},
1925 {0x306, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "BM safety status"},
1926 {0x307, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "I/O error"},
1927 {0x308, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CMD error"},
1928 {0x309, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set wmode"},
1929 {0x30a, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "DDR init failed" },
1930 {0x30b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "PCIe link status" },
1931 {0x30c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Controller reset sync error" },
1932 {0x30d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Clock fault" },
1933 {0x30e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "FPGA voltage fault status" },
1934 {0x30f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity finished"},
1935 {0x310, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data finished"},
1936 {0x311, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Reset"},
1937 {0x312, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "CAP: voltage fault"},
1938 {0x313, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: learn fault"},
1939 {0x314, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CAP status"},
1940 {0x315, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Board voltage fault status"},
1941 {0x316, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet over temperature"},
1942 {0x317, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet temperature is OK"},
1943 {0x318, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash over temperature"},
1944 {0x319, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash temperature is OK"},
1945 {0x31a, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: short circuit"},
1946 {0x31b, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "Sensor fault"},
1947 {0x31c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data"},
1948 {0x31d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data finished"},
1949
1950 {SSD_UNKNOWN_EVENT, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "unknown event"},
1951};
1952/* */
1953#define SSD_LOG_OVER_TEMP 0x90
1954#define SSD_LOG_NORMAL_TEMP 0x91
1955#define SSD_LOG_WARN_TEMP 0x9a
1956#define SSD_LOG_SEU_FAULT 0x93
1957#define SSD_LOG_SEU_FAULT1 0x98
1958#define SSD_LOG_BATTERY_FAULT 0x92
1959#define SSD_LOG_BATTERY_OK 0x99
1960#define SSD_LOG_BOARD_VOLT_FAULT 0x9f
1961
1962/* software log */
1963#define SSD_LOG_TIMEOUT 0x300
1964#define SSD_LOG_POWER_ON 0x301
1965#define SSD_LOG_POWER_OFF 0x302
1966#define SSD_LOG_CLEAR_LOG 0x303
1967#define SSD_LOG_SET_CAPACITY 0x304
1968#define SSD_LOG_CLEAR_DATA 0x305
1969#define SSD_LOG_BM_SFSTATUS 0x306
1970#define SSD_LOG_EIO 0x307
1971#define SSD_LOG_ECMD 0x308
1972#define SSD_LOG_SET_WMODE 0x309
1973#define SSD_LOG_DDR_INIT_ERR 0x30a
1974#define SSD_LOG_PCIE_LINK_STATUS 0x30b
1975#define SSD_LOG_CTRL_RST_SYNC 0x30c
1976#define SSD_LOG_CLK_FAULT 0x30d
1977#define SSD_LOG_VOLT_FAULT 0x30e
1978#define SSD_LOG_SET_CAPACITY_END 0x30F
1979#define SSD_LOG_CLEAR_DATA_END 0x310
1980#define SSD_LOG_RESET 0x311
1981#define SSD_LOG_CAP_VOLT_FAULT 0x312
1982#define SSD_LOG_CAP_LEARN_FAULT 0x313
1983#define SSD_LOG_CAP_STATUS 0x314
1984#define SSD_LOG_VOLT_STATUS 0x315
1985#define SSD_LOG_INLET_OVER_TEMP 0x316
1986#define SSD_LOG_INLET_NORMAL_TEMP 0x317
1987#define SSD_LOG_FLASH_OVER_TEMP 0x318
1988#define SSD_LOG_FLASH_NORMAL_TEMP 0x319
1989#define SSD_LOG_CAP_SHORT_CIRCUIT 0x31a
1990#define SSD_LOG_SENSOR_FAULT 0x31b
1991#define SSD_LOG_ERASE_ALL 0x31c
1992#define SSD_LOG_ERASE_ALL_END 0x31d
1993
1994
1995/* sw log fifo depth */
1996#define SSD_LOG_FIFO_SZ 1024
1997
1998
1999/* done queue */
2000static DEFINE_PER_CPU(struct list_head, ssd_doneq);
2001static DEFINE_PER_CPU(struct tasklet_struct, ssd_tasklet);
2002
2003
2004/* unloading driver */
2005static volatile int ssd_exiting = 0;
2006
2007#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
2008static struct class_simple *ssd_class;
2009#else
2010static struct class *ssd_class;
2011#endif
2012
2013static int ssd_cmajor = SSD_CMAJOR;
2014
2015/* ssd block device major, minors */
2016static int ssd_major = SSD_MAJOR;
2017static int ssd_major_sl = SSD_MAJOR_SL;
2018static int ssd_minors = SSD_MINORS;
2019
2020/* ssd device list */
2021static struct list_head ssd_list;
2022static unsigned long ssd_index_bits[SSD_MAX_DEV / BITS_PER_LONG + 1];
2023static unsigned long ssd_index_bits_sl[SSD_MAX_DEV / BITS_PER_LONG + 1];
2024static atomic_t ssd_nr;
2025
2026/* module param */
2027enum ssd_drv_mode
2028{
2029 SSD_DRV_MODE_STANDARD = 0, /* full */
2030 SSD_DRV_MODE_DEBUG = 2, /* debug */
2031 SSD_DRV_MODE_BASE /* base only */
2032};
2033
2034enum ssd_int_mode
2035{
2036 SSD_INT_LEGACY = 0,
2037 SSD_INT_MSI,
2038 SSD_INT_MSIX
2039};
2040
2041#if (defined SSD_MSIX)
2042#define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2043#elif (defined SSD_MSI)
2044#define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2045#else
2046/* auto select the defaut int mode according to the kernel version*/
2047/* suse 11 sp1 irqbalance bug: use msi instead*/
2048#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6) || (defined RHEL_MAJOR && RHEL_MAJOR == 5 && RHEL_MINOR >= 5))
2049#define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2050#else
2051#define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2052#endif
2053#endif
2054
2055static int mode = SSD_DRV_MODE_STANDARD;
2056static int status_mask = 0xFF;
2057static int int_mode = SSD_INT_MODE_DEFAULT;
2058static int threaded_irq = 0;
2059static int log_level = SSD_LOG_LEVEL_WARNING;
2060static int ot_protect = 1;
2061static int wmode = SSD_WMODE_DEFAULT;
2062static int finject = 0;
2063
2064module_param(mode, int, 0);
2065module_param(status_mask, int, 0);
2066module_param(int_mode, int, 0);
2067module_param(threaded_irq, int, 0);
2068module_param(log_level, int, 0);
2069module_param(ot_protect, int, 0);
2070module_param(wmode, int, 0);
2071module_param(finject, int, 0);
2072
2073
2074MODULE_PARM_DESC(mode, "driver mode, 0 - standard, 1 - debug, 2 - debug without IO, 3 - basic debug mode");
2075MODULE_PARM_DESC(status_mask, "command status mask, 0 - without command error, 0xff - with command error");
2076MODULE_PARM_DESC(int_mode, "preferred interrupt mode, 0 - legacy, 1 - msi, 2 - msix");
2077MODULE_PARM_DESC(threaded_irq, "threaded irq, 0 - normal irq, 1 - threaded irq");
2078MODULE_PARM_DESC(log_level, "log level to display, 0 - info and above, 1 - notice and above, 2 - warning and above, 3 - error only");
2079MODULE_PARM_DESC(ot_protect, "over temperature protect, 0 - disable, 1 - enable");
2080MODULE_PARM_DESC(wmode, "write mode, 0 - write buffer (with risk for the 6xx firmware), 1 - write buffer ex, 2 - write through, 3 - auto, 4 - default");
2081MODULE_PARM_DESC(finject, "enable fault simulation, 0 - off, 1 - on, for debug purpose only");
2082
2083
2084#ifndef MODULE
2085static int __init ssd_drv_mode(char *str)
2086{
2087 mode = (int)simple_strtoul(str, NULL, 0);
2088
2089 return 1;
2090}
2091
2092static int __init ssd_status_mask(char *str)
2093{
2094 status_mask = (int)simple_strtoul(str, NULL, 16);
2095
2096 return 1;
2097}
2098
2099static int __init ssd_int_mode(char *str)
2100{
2101 int_mode = (int)simple_strtoul(str, NULL, 0);
2102
2103 return 1;
2104}
2105
2106static int __init ssd_threaded_irq(char *str)
2107{
2108 threaded_irq = (int)simple_strtoul(str, NULL, 0);
2109
2110 return 1;
2111}
2112
2113static int __init ssd_log_level(char *str)
2114{
2115 log_level = (int)simple_strtoul(str, NULL, 0);
2116
2117 return 1;
2118}
2119
2120static int __init ssd_ot_protect(char *str)
2121{
2122 ot_protect = (int)simple_strtoul(str, NULL, 0);
2123
2124 return 1;
2125}
2126
2127static int __init ssd_wmode(char *str)
2128{
2129 wmode = (int)simple_strtoul(str, NULL, 0);
2130
2131 return 1;
2132}
2133
2134static int __init ssd_finject(char *str)
2135{
2136 finject = (int)simple_strtoul(str, NULL, 0);
2137
2138 return 1;
2139}
2140
2141__setup(MODULE_NAME"_mode=", ssd_drv_mode);
2142__setup(MODULE_NAME"_status_mask=", ssd_status_mask);
2143__setup(MODULE_NAME"_int_mode=", ssd_int_mode);
2144__setup(MODULE_NAME"_threaded_irq=", ssd_threaded_irq);
2145__setup(MODULE_NAME"_log_level=", ssd_log_level);
2146__setup(MODULE_NAME"_ot_protect=", ssd_ot_protect);
2147__setup(MODULE_NAME"_wmode=", ssd_wmode);
2148__setup(MODULE_NAME"_finject=", ssd_finject);
2149#endif
2150
2151
2152#ifdef CONFIG_PROC_FS
2153#include <linux/proc_fs.h>
2154#include <asm/uaccess.h>
2155
2156#define SSD_PROC_DIR MODULE_NAME
2157#define SSD_PROC_INFO "info"
2158
2159static struct proc_dir_entry *ssd_proc_dir = NULL;
2160static struct proc_dir_entry *ssd_proc_info = NULL;
2161
2162#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2163static int ssd_proc_read(char *page, char **start,
2164 off_t off, int count, int *eof, void *data)
2165{
2166 struct ssd_device *dev = NULL;
2167 struct ssd_device *n = NULL;
2168 uint64_t size;
2169 int idx;
2170 int len = 0;
2171 //char type; //xx
2172
2173 if (ssd_exiting) {
2174 return 0;
2175 }
2176
2177 len += snprintf((page + len), (count - len), "Driver Version:\t%s\n", DRIVER_VERSION);
2178
2179 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2180 idx = dev->idx + 1;
2181 size = dev->hw_info.size ;
2182 do_div(size, 1000000000);
2183
2184 len += snprintf((page + len), (count - len), "\n");
2185
2186 len += snprintf((page + len), (count - len), "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2187
2188 len += snprintf((page + len), (count - len), "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2189 if (dev->hw_info.ctrl_ver != 0) {
2190 len += snprintf((page + len), (count - len), "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2191 }
2192
2193 len += snprintf((page + len), (count - len), "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2194
2195 if (dev->hw_info.upper_pcb_ver >= 'A') {
2196 len += snprintf((page + len), (count - len), "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2197 }
2198
2199 len += snprintf((page + len), (count - len), "HIO %d Device:\t%s\n", idx, dev->name);
2200 }
2201
2202 return len;
2203}
2204
2205#else
2206
2207static int ssd_proc_show(struct seq_file *m, void *v)
2208{
2209 struct ssd_device *dev = NULL;
2210 struct ssd_device *n = NULL;
2211 uint64_t size;
2212 int idx;
2213
2214 if (ssd_exiting) {
2215 return 0;
2216 }
2217
2218 seq_printf(m, "Driver Version:\t%s\n", DRIVER_VERSION);
2219
2220 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2221 idx = dev->idx + 1;
2222 size = dev->hw_info.size ;
2223 do_div(size, 1000000000);
2224
2225 seq_printf(m, "\n");
2226
2227 seq_printf(m, "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2228
2229 seq_printf(m, "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2230 if (dev->hw_info.ctrl_ver != 0) {
2231 seq_printf(m, "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2232 }
2233
2234 seq_printf(m, "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2235
2236 if (dev->hw_info.upper_pcb_ver >= 'A') {
2237 seq_printf(m, "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2238 }
2239
2240 seq_printf(m, "HIO %d Device:\t%s\n", idx, dev->name);
2241 }
2242
2243 return 0;
2244}
2245
2246static int ssd_proc_open(struct inode *inode, struct file *file)
2247{
2248#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
2249 return single_open(file, ssd_proc_show, PDE(inode)->data);
2250#else
2251 return single_open(file, ssd_proc_show, PDE_DATA(inode));
2252#endif
2253}
2254
2255static const struct file_operations ssd_proc_fops = {
2256 .open = ssd_proc_open,
2257 .read = seq_read,
2258 .llseek = seq_lseek,
2259 .release = single_release,
2260};
2261#endif
2262
2263
2264static void ssd_cleanup_proc(void)
2265{
2266 if (ssd_proc_info) {
2267 remove_proc_entry(SSD_PROC_INFO, ssd_proc_dir);
2268 ssd_proc_info = NULL;
2269 }
2270 if (ssd_proc_dir) {
2271 remove_proc_entry(SSD_PROC_DIR, NULL);
2272 ssd_proc_dir = NULL;
2273 }
2274}
2275static int ssd_init_proc(void)
2276{
2277 ssd_proc_dir = proc_mkdir(SSD_PROC_DIR, NULL);
2278 if (!ssd_proc_dir)
2279 goto out_proc_mkdir;
2280
2281#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2282 ssd_proc_info = create_proc_entry(SSD_PROC_INFO, S_IFREG | S_IRUGO | S_IWUSR, ssd_proc_dir);
2283 if (!ssd_proc_info)
2284 goto out_create_proc_entry;
2285
2286 ssd_proc_info->read_proc = ssd_proc_read;
2287
2288/* kernel bug */
2289#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
2290 ssd_proc_info->owner = THIS_MODULE;
2291#endif
2292#else
2293 ssd_proc_info = proc_create(SSD_PROC_INFO, 0600, ssd_proc_dir, &ssd_proc_fops);
2294 if (!ssd_proc_info)
2295 goto out_create_proc_entry;
2296#endif
2297
2298 return 0;
2299
2300out_create_proc_entry:
2301 remove_proc_entry(SSD_PROC_DIR, NULL);
2302out_proc_mkdir:
2303 return -ENOMEM;
2304}
2305
2306#else
2307static void ssd_cleanup_proc(void)
2308{
2309 return;
2310}
2311static int ssd_init_proc(void)
2312{
2313 return 0;
2314}
2315#endif /* CONFIG_PROC_FS */
2316
2317/* sysfs */
2318static void ssd_unregister_sysfs(struct ssd_device *dev)
2319{
2320 return;
2321}
2322
2323static int ssd_register_sysfs(struct ssd_device *dev)
2324{
2325 return 0;
2326}
2327
2328static void ssd_cleanup_sysfs(void)
2329{
2330 return;
2331}
2332
2333static int ssd_init_sysfs(void)
2334{
2335 return 0;
2336}
2337
2338static inline void ssd_put_index(int slave, int index)
2339{
2340 unsigned long *index_bits = ssd_index_bits;
2341
2342 if (slave) {
2343 index_bits = ssd_index_bits_sl;
2344 }
2345
2346 if (test_and_clear_bit(index, index_bits)) {
2347 atomic_dec(&ssd_nr);
2348 }
2349}
2350
2351static inline int ssd_get_index(int slave)
2352{
2353 unsigned long *index_bits = ssd_index_bits;
2354 int index;
2355
2356 if (slave) {
2357 index_bits = ssd_index_bits_sl;
2358 }
2359
2360find_index:
2361 if ((index = find_first_zero_bit(index_bits, SSD_MAX_DEV)) >= SSD_MAX_DEV) {
2362 return -1;
2363 }
2364
2365 if (test_and_set_bit(index, index_bits)) {
2366 goto find_index;
2367 }
2368
2369 atomic_inc(&ssd_nr);
2370
2371 return index;
2372}
2373
2374static void ssd_cleanup_index(void)
2375{
2376 return;
2377}
2378
2379static int ssd_init_index(void)
2380{
2381 INIT_LIST_HEAD(&ssd_list);
2382 atomic_set(&ssd_nr, 0);
2383 memset(ssd_index_bits, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2384 memset(ssd_index_bits_sl, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2385
2386 return 0;
2387}
2388
2389static void ssd_set_dev_name(char *name, size_t size, int idx)
2390{
2391 if(idx < SSD_ALPHABET_NUM) {
2392 snprintf(name, size, "%c", 'a'+idx);
2393 } else {
2394 idx -= SSD_ALPHABET_NUM;
2395 snprintf(name, size, "%c%c", 'a'+(idx/SSD_ALPHABET_NUM), 'a'+(idx%SSD_ALPHABET_NUM));
2396 }
2397}
2398
2399/* pci register r&w */
2400static inline void ssd_reg_write(void *addr, uint64_t val)
2401{
2402 iowrite32((uint32_t)val, addr);
2403 iowrite32((uint32_t)(val >> 32), addr + 4);
2404 wmb();
2405}
2406
2407static inline uint64_t ssd_reg_read(void *addr)
2408{
2409 uint64_t val;
2410 uint32_t val_lo, val_hi;
2411
2412 val_lo = ioread32(addr);
2413 val_hi = ioread32(addr + 4);
2414
2415 rmb();
2416 val = val_lo | ((uint64_t)val_hi << 32);
2417
2418 return val;
2419}
2420
2421
2422#define ssd_reg32_write(addr, val) writel(val, addr)
2423#define ssd_reg32_read(addr) readl(addr)
2424
2425/* alarm led */
2426static void ssd_clear_alarm(struct ssd_device *dev)
2427{
2428 uint32_t val;
2429
2430 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2431 return;
2432 }
2433
2434 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2435
2436 /* firmware control */
2437 val &= ~0x2;
2438
2439 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2440}
2441
2442static void ssd_set_alarm(struct ssd_device *dev)
2443{
2444 uint32_t val;
2445
2446 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2447 return;
2448 }
2449
2450 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2451
2452 /* light up */
2453 val &= ~0x1;
2454 /* software control */
2455 val |= 0x2;
2456
2457 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2458}
2459
2460#define u32_swap(x) \
2461 ((uint32_t)( \
2462 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
2463 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
2464 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
2465 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
2466
2467#define u16_swap(x) \
2468 ((uint16_t)( \
2469 (((uint16_t)(x) & (uint16_t)0x00ff) << 8) | \
2470 (((uint16_t)(x) & (uint16_t)0xff00) >> 8) ))
2471
2472
2473#if 0
2474/* No lock, for init only*/
2475static int ssd_spi_read_id(struct ssd_device *dev, uint32_t *id)
2476{
2477 uint32_t val;
2478 unsigned long st;
2479 int ret = 0;
2480
2481 if (!dev || !id) {
2482 return -EINVAL;
2483 }
2484
2485 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_ID);
2486
2487 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2488 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2489 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2490 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2491
2492 st = jiffies;
2493 for (;;) {
2494 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2495 if (val == 0x1000000) {
2496 break;
2497 }
2498
2499 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2500 ret = -ETIMEDOUT;
2501 goto out;
2502 }
2503 cond_resched();
2504 }
2505
2506 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_ID);
2507 *id = val;
2508
2509out:
2510 return ret;
2511}
2512#endif
2513
2514/* spi access */
2515static int ssd_init_spi(struct ssd_device *dev)
2516{
2517 uint32_t val;
2518 unsigned long st;
2519 int ret = 0;
2520
2521 mutex_lock(&dev->spi_mutex);
2522 st = jiffies;
2523 for(;;) {
2524 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2525
2526 do {
2527 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2528
2529 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2530 ret = -ETIMEDOUT;
2531 goto out;
2532 }
2533 cond_resched();
2534 } while (val != 0x1000000);
2535
2536 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2537 if (!(val & 0x1)) {
2538 break;
2539 }
2540
2541 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2542 ret = -ETIMEDOUT;
2543 goto out;
2544 }
2545 cond_resched();
2546 }
2547
2548out:
2549 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2550 if (val & 0x1) {
2551 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2552 }
2553 }
2554 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2555 mutex_unlock(&dev->spi_mutex);
2556
2557 ret = 0;
2558
2559 return ret;
2560}
2561
2562static int ssd_spi_page_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2563{
2564 uint32_t val;
2565 uint32_t rlen = 0;
2566 unsigned long st;
2567 int ret = 0;
2568
2569 if (!dev || !buf) {
2570 return -EINVAL;
2571 }
2572
2573 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2574 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size) {
2575 return -EINVAL;
2576 }
2577
2578 mutex_lock(&dev->spi_mutex);
2579 while (rlen < size) {
2580 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, ((off + rlen) >> 24));
2581 wmb();
2582 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, (((off + rlen) << 8) | SSD_SPI_CMD_READ));
2583
2584 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2585 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2586 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2587 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2588
2589 st = jiffies;
2590 for (;;) {
2591 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2592 if (val == 0x1000000) {
2593 break;
2594 }
2595
2596 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2597 ret = -ETIMEDOUT;
2598 goto out;
2599 }
2600 cond_resched();
2601 }
2602
2603 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
2604 *(uint32_t *)(buf + rlen)= u32_swap(val);
2605
2606 rlen += sizeof(uint32_t);
2607 }
2608
2609out:
2610 mutex_unlock(&dev->spi_mutex);
2611 return ret;
2612}
2613
2614static int ssd_spi_page_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2615{
2616 uint32_t val;
2617 uint32_t wlen;
2618 unsigned long st;
2619 int i;
2620 int ret = 0;
2621
2622 if (!dev || !buf) {
2623 return -EINVAL;
2624 }
2625
2626 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2627 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size ||
2628 (off / dev->rom_info.page_size) != ((off + size - 1) / dev->rom_info.page_size)) {
2629 return -EINVAL;
2630 }
2631
2632 mutex_lock(&dev->spi_mutex);
2633
2634 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2635
2636 wlen = size / sizeof(uint32_t);
2637 for (i=0; i<(int)wlen; i++) {
2638 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_WDATA, u32_swap(*((uint32_t *)buf + i)));
2639 }
2640
2641 wmb();
2642 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2643 wmb();
2644 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_PROGRAM));
2645
2646 udelay(1);
2647
2648 st = jiffies;
2649 for (;;) {
2650 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2651 do {
2652 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2653
2654 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2655 ret = -ETIMEDOUT;
2656 goto out;
2657 }
2658 cond_resched();
2659 } while (val != 0x1000000);
2660
2661 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2662 if (!(val & 0x1)) {
2663 break;
2664 }
2665
2666 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2667 ret = -ETIMEDOUT;
2668 goto out;
2669 }
2670 cond_resched();
2671 }
2672
2673 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2674 if ((val >> 6) & 0x1) {
2675 ret = -EIO;
2676 goto out;
2677 }
2678 }
2679
2680out:
2681 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2682 if (val & 0x1) {
2683 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2684 }
2685 }
2686 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2687
2688 mutex_unlock(&dev->spi_mutex);
2689
2690 return ret;
2691}
2692
2693static int ssd_spi_block_erase(struct ssd_device *dev, uint32_t off)
2694{
2695 uint32_t val;
2696 unsigned long st;
2697 int ret = 0;
2698
2699 if (!dev) {
2700 return -EINVAL;
2701 }
2702
2703 if ((off % dev->rom_info.block_size) != 0 || off >= dev->rom_info.size) {
2704 return -EINVAL;
2705 }
2706
2707 mutex_lock(&dev->spi_mutex);
2708
2709 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2710 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2711
2712 wmb();
2713 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2714 wmb();
2715 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_ERASE));
2716
2717 st = jiffies;
2718 for (;;) {
2719 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2720
2721 do {
2722 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2723
2724 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2725 ret = -ETIMEDOUT;
2726 goto out;
2727 }
2728 cond_resched();
2729 } while (val != 0x1000000);
2730
2731 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2732 if (!(val & 0x1)) {
2733 break;
2734 }
2735
2736 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2737 ret = -ETIMEDOUT;
2738 goto out;
2739 }
2740 cond_resched();
2741 }
2742
2743 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2744 if ((val >> 5) & 0x1) {
2745 ret = -EIO;
2746 goto out;
2747 }
2748 }
2749
2750out:
2751 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2752 if (val & 0x1) {
2753 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2754 }
2755 }
2756 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2757
2758 mutex_unlock(&dev->spi_mutex);
2759
2760 return ret;
2761}
2762
2763static int ssd_spi_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2764{
2765 uint32_t len = 0;
2766 uint32_t roff;
2767 uint32_t rsize;
2768 int ret = 0;
2769
2770 if (!dev || !buf) {
2771 return -EINVAL;
2772 }
2773
2774 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2775 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2776 return -EINVAL;
2777 }
2778
2779 while (len < size) {
2780 roff = (off + len) % dev->rom_info.page_size;
2781 rsize = dev->rom_info.page_size - roff;
2782 if ((size - len) < rsize) {
2783 rsize = (size - len);
2784 }
2785 roff = off + len;
2786
2787 ret = ssd_spi_page_read(dev, (buf + len), roff, rsize);
2788 if (ret) {
2789 goto out;
2790 }
2791
2792 len += rsize;
2793
2794 cond_resched();
2795 }
2796
2797out:
2798 return ret;
2799}
2800
2801static int ssd_spi_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2802{
2803 uint32_t len = 0;
2804 uint32_t woff;
2805 uint32_t wsize;
2806 int ret = 0;
2807
2808 if (!dev || !buf) {
2809 return -EINVAL;
2810 }
2811
2812 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2813 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2814 return -EINVAL;
2815 }
2816
2817 while (len < size) {
2818 woff = (off + len) % dev->rom_info.page_size;
2819 wsize = dev->rom_info.page_size - woff;
2820 if ((size - len) < wsize) {
2821 wsize = (size - len);
2822 }
2823 woff = off + len;
2824
2825 ret = ssd_spi_page_write(dev, (buf + len), woff, wsize);
2826 if (ret) {
2827 goto out;
2828 }
2829
2830 len += wsize;
2831
2832 cond_resched();
2833 }
2834
2835out:
2836 return ret;
2837}
2838
2839static int ssd_spi_erase(struct ssd_device *dev, uint32_t off, uint32_t size)
2840{
2841 uint32_t len = 0;
2842 uint32_t eoff;
2843 int ret = 0;
2844
2845 if (!dev) {
2846 return -EINVAL;
2847 }
2848
2849 if (size == 0 || ((uint64_t)off + (uint64_t)size) > dev->rom_info.size ||
2850 (off % dev->rom_info.block_size) != 0 || (size % dev->rom_info.block_size) != 0) {
2851 return -EINVAL;
2852 }
2853
2854 while (len < size) {
2855 eoff = (off + len);
2856
2857 ret = ssd_spi_block_erase(dev, eoff);
2858 if (ret) {
2859 goto out;
2860 }
2861
2862 len += dev->rom_info.block_size;
2863
2864 cond_resched();
2865 }
2866
2867out:
2868 return ret;
2869}
2870
2871/* i2c access */
2872static uint32_t __ssd_i2c_reg32_read(void *addr)
2873{
2874 return ssd_reg32_read(addr);
2875}
2876
2877static void __ssd_i2c_reg32_write(void *addr, uint32_t val)
2878{
2879 ssd_reg32_write(addr, val);
2880 ssd_reg32_read(addr);
2881}
2882
2883static int __ssd_i2c_clear(struct ssd_device *dev, uint8_t saddr)
2884{
2885 ssd_i2c_ctrl_t ctrl;
2886 ssd_i2c_data_t data;
2887 uint8_t status = 0;
2888 int nr_data = 0;
2889 unsigned long st;
2890 int ret = 0;
2891
2892check_status:
2893 ctrl.bits.wdata = 0;
2894 ctrl.bits.addr = SSD_I2C_STATUS_REG;
2895 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2896 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2897
2898 st = jiffies;
2899 for (;;) {
2900 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2901 if (data.bits.valid == 0) {
2902 break;
2903 }
2904
2905 /* retry */
2906 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2907 ret = -ETIMEDOUT;
2908 goto out;
2909 }
2910 cond_resched();
2911 }
2912 status = data.bits.rdata;
2913
2914 if (!(status & 0x4)) {
2915 /* clear read fifo data */
2916 ctrl.bits.wdata = 0;
2917 ctrl.bits.addr = SSD_I2C_DATA_REG;
2918 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2919 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2920
2921 st = jiffies;
2922 for (;;) {
2923 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2924 if (data.bits.valid == 0) {
2925 break;
2926 }
2927
2928 /* retry */
2929 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2930 ret = -ETIMEDOUT;
2931 goto out;
2932 }
2933 cond_resched();
2934 }
2935
2936 nr_data++;
2937 if (nr_data <= SSD_I2C_MAX_DATA) {
2938 goto check_status;
2939 } else {
2940 goto out_reset;
2941 }
2942 }
2943
2944 if (status & 0x3) {
2945 /* clear int */
2946 ctrl.bits.wdata = 0x04;
2947 ctrl.bits.addr = SSD_I2C_CMD_REG;
2948 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2949 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2950 }
2951
2952 if (!(status & 0x8)) {
2953out_reset:
2954 /* reset i2c controller */
2955 ctrl.bits.wdata = 0x0;
2956 ctrl.bits.addr = SSD_I2C_RESET_REG;
2957 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2958 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2959 }
2960
2961out:
2962 return ret;
2963}
2964
2965static int ssd_i2c_write(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
2966{
2967 ssd_i2c_ctrl_t ctrl;
2968 ssd_i2c_data_t data;
2969 uint8_t off = 0;
2970 uint8_t status = 0;
2971 unsigned long st;
2972 int ret = 0;
2973
2974 mutex_lock(&dev->i2c_mutex);
2975
2976 ctrl.val = 0;
2977
2978 /* slave addr */
2979 ctrl.bits.wdata = saddr;
2980 ctrl.bits.addr = SSD_I2C_SADDR_REG;
2981 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2982 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2983
2984 /* data */
2985 while (off < size) {
2986 ctrl.bits.wdata = buf[off];
2987 ctrl.bits.addr = SSD_I2C_DATA_REG;
2988 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2989 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2990
2991 off++;
2992 }
2993
2994 /* write */
2995 ctrl.bits.wdata = 0x01;
2996 ctrl.bits.addr = SSD_I2C_CMD_REG;
2997 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2998 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2999
3000 /* wait */
3001 st = jiffies;
3002 for (;;) {
3003 ctrl.bits.wdata = 0;
3004 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3005 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3006 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3007
3008 for (;;) {
3009 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3010 if (data.bits.valid == 0) {
3011 break;
3012 }
3013
3014 /* retry */
3015 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3016 ret = -ETIMEDOUT;
3017 goto out_clear;
3018 }
3019 cond_resched();
3020 }
3021
3022 status = data.bits.rdata;
3023 if (status & 0x1) {
3024 break;
3025 }
3026
3027 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3028 ret = -ETIMEDOUT;
3029 goto out_clear;
3030 }
3031 cond_resched();
3032 }
3033
3034 if (!(status & 0x1)) {
3035 ret = -1;
3036 goto out_clear;
3037 }
3038
3039 /* busy ? */
3040 if (status & 0x20) {
3041 ret = -2;
3042 goto out_clear;
3043 }
3044
3045 /* ack ? */
3046 if (status & 0x10) {
3047 ret = -3;
3048 goto out_clear;
3049 }
3050
3051 /* clear */
3052out_clear:
3053 if (__ssd_i2c_clear(dev, saddr)) {
3054 if (!ret) ret = -4;
3055 }
3056
3057 mutex_unlock(&dev->i2c_mutex);
3058
3059 return ret;
3060}
3061
3062static int ssd_i2c_read(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
3063{
3064 ssd_i2c_ctrl_t ctrl;
3065 ssd_i2c_data_t data;
3066 uint8_t off = 0;
3067 uint8_t status = 0;
3068 unsigned long st;
3069 int ret = 0;
3070
3071 mutex_lock(&dev->i2c_mutex);
3072
3073 ctrl.val = 0;
3074
3075 /* slave addr */
3076 ctrl.bits.wdata = saddr;
3077 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3078 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3079 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3080
3081 /* read len */
3082 ctrl.bits.wdata = size;
3083 ctrl.bits.addr = SSD_I2C_LEN_REG;
3084 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3085 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3086
3087 /* read */
3088 ctrl.bits.wdata = 0x02;
3089 ctrl.bits.addr = SSD_I2C_CMD_REG;
3090 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3091 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3092
3093 /* wait */
3094 st = jiffies;
3095 for (;;) {
3096 ctrl.bits.wdata = 0;
3097 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3098 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3099 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3100
3101 for (;;) {
3102 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3103 if (data.bits.valid == 0) {
3104 break;
3105 }
3106
3107 /* retry */
3108 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3109 ret = -ETIMEDOUT;
3110 goto out_clear;
3111 }
3112 cond_resched();
3113 }
3114
3115 status = data.bits.rdata;
3116 if (status & 0x2) {
3117 break;
3118 }
3119
3120 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3121 ret = -ETIMEDOUT;
3122 goto out_clear;
3123 }
3124 cond_resched();
3125 }
3126
3127 if (!(status & 0x2)) {
3128 ret = -1;
3129 goto out_clear;
3130 }
3131
3132 /* busy ? */
3133 if (status & 0x20) {
3134 ret = -2;
3135 goto out_clear;
3136 }
3137
3138 /* ack ? */
3139 if (status & 0x10) {
3140 ret = -3;
3141 goto out_clear;
3142 }
3143
3144 /* data */
3145 while (off < size) {
3146 ctrl.bits.wdata = 0;
3147 ctrl.bits.addr = SSD_I2C_DATA_REG;
3148 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3149 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3150
3151 st = jiffies;
3152 for (;;) {
3153 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3154 if (data.bits.valid == 0) {
3155 break;
3156 }
3157
3158 /* retry */
3159 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3160 ret = -ETIMEDOUT;
3161 goto out_clear;
3162 }
3163 cond_resched();
3164 }
3165
3166 buf[off] = data.bits.rdata;
3167
3168 off++;
3169 }
3170
3171 /* clear */
3172out_clear:
3173 if (__ssd_i2c_clear(dev, saddr)) {
3174 if (!ret) ret = -4;
3175 }
3176
3177 mutex_unlock(&dev->i2c_mutex);
3178
3179 return ret;
3180}
3181
3182static int ssd_i2c_write_read(struct ssd_device *dev, uint8_t saddr, uint8_t wsize, uint8_t *wbuf, uint8_t rsize, uint8_t *rbuf)
3183{
3184 ssd_i2c_ctrl_t ctrl;
3185 ssd_i2c_data_t data;
3186 uint8_t off = 0;
3187 uint8_t status = 0;
3188 unsigned long st;
3189 int ret = 0;
3190
3191 mutex_lock(&dev->i2c_mutex);
3192
3193 ctrl.val = 0;
3194
3195 /* slave addr */
3196 ctrl.bits.wdata = saddr;
3197 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3198 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3199 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3200
3201 /* data */
3202 off = 0;
3203 while (off < wsize) {
3204 ctrl.bits.wdata = wbuf[off];
3205 ctrl.bits.addr = SSD_I2C_DATA_REG;
3206 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3207 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3208
3209 off++;
3210 }
3211
3212 /* read len */
3213 ctrl.bits.wdata = rsize;
3214 ctrl.bits.addr = SSD_I2C_LEN_REG;
3215 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3216 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3217
3218 /* write -> read */
3219 ctrl.bits.wdata = 0x03;
3220 ctrl.bits.addr = SSD_I2C_CMD_REG;
3221 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3222 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3223
3224 /* wait */
3225 st = jiffies;
3226 for (;;) {
3227 ctrl.bits.wdata = 0;
3228 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3229 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3230 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3231
3232 for (;;) {
3233 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3234 if (data.bits.valid == 0) {
3235 break;
3236 }
3237
3238 /* retry */
3239 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3240 ret = -ETIMEDOUT;
3241 goto out_clear;
3242 }
3243 cond_resched();
3244 }
3245
3246 status = data.bits.rdata;
3247 if (status & 0x2) {
3248 break;
3249 }
3250
3251 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3252 ret = -ETIMEDOUT;
3253 goto out_clear;
3254 }
3255 cond_resched();
3256 }
3257
3258 if (!(status & 0x2)) {
3259 ret = -1;
3260 goto out_clear;
3261 }
3262
3263 /* busy ? */
3264 if (status & 0x20) {
3265 ret = -2;
3266 goto out_clear;
3267 }
3268
3269 /* ack ? */
3270 if (status & 0x10) {
3271 ret = -3;
3272 goto out_clear;
3273 }
3274
3275 /* data */
3276 off = 0;
3277 while (off < rsize) {
3278 ctrl.bits.wdata = 0;
3279 ctrl.bits.addr = SSD_I2C_DATA_REG;
3280 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3281 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3282
3283 st = jiffies;
3284 for (;;) {
3285 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3286 if (data.bits.valid == 0) {
3287 break;
3288 }
3289
3290 /* retry */
3291 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3292 ret = -ETIMEDOUT;
3293 goto out_clear;
3294 }
3295 cond_resched();
3296 }
3297
3298 rbuf[off] = data.bits.rdata;
3299
3300 off++;
3301 }
3302
3303 /* clear */
3304out_clear:
3305 if (__ssd_i2c_clear(dev, saddr)) {
3306 if (!ret) ret = -4;
3307 }
3308 mutex_unlock(&dev->i2c_mutex);
3309
3310 return ret;
3311}
3312
3313static int ssd_smbus_send_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3314{
3315 int i = 0;
3316 int ret = 0;
3317
3318 for (;;) {
3319 ret = ssd_i2c_write(dev, saddr, 1, buf);
3320 if (!ret || -ETIMEDOUT == ret) {
3321 break;
3322 }
3323
3324 i++;
3325 if (i >= SSD_SMBUS_RETRY_MAX) {
3326 break;
3327 }
3328 msleep(SSD_SMBUS_RETRY_INTERVAL);
3329 }
3330
3331 return ret;
3332}
3333
3334static int ssd_smbus_receive_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3335{
3336 int i = 0;
3337 int ret = 0;
3338
3339 for (;;) {
3340 ret = ssd_i2c_read(dev, saddr, 1, buf);
3341 if (!ret || -ETIMEDOUT == ret) {
3342 break;
3343 }
3344
3345 i++;
3346 if (i >= SSD_SMBUS_RETRY_MAX) {
3347 break;
3348 }
3349 msleep(SSD_SMBUS_RETRY_INTERVAL);
3350 }
3351
3352 return ret;
3353}
3354
3355static int ssd_smbus_write_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3356{
3357 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3358 int i = 0;
3359 int ret = 0;
3360
3361 smb_data[0] = cmd;
3362 memcpy((smb_data + 1), buf, 1);
3363
3364 for (;;) {
3365 ret = ssd_i2c_write(dev, saddr, 2, smb_data);
3366 if (!ret || -ETIMEDOUT == ret) {
3367 break;
3368 }
3369
3370 i++;
3371 if (i >= SSD_SMBUS_RETRY_MAX) {
3372 break;
3373 }
3374 msleep(SSD_SMBUS_RETRY_INTERVAL);
3375 }
3376
3377 return ret;
3378}
3379
3380static int ssd_smbus_read_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3381{
3382 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3383 int i = 0;
3384 int ret = 0;
3385
3386 smb_data[0] = cmd;
3387
3388 for (;;) {
3389 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 1, buf);
3390 if (!ret || -ETIMEDOUT == ret) {
3391 break;
3392 }
3393
3394 i++;
3395 if (i >= SSD_SMBUS_RETRY_MAX) {
3396 break;
3397 }
3398 msleep(SSD_SMBUS_RETRY_INTERVAL);
3399 }
3400
3401 return ret;
3402}
3403
3404static int ssd_smbus_write_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3405{
3406 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3407 int i = 0;
3408 int ret = 0;
3409
3410 smb_data[0] = cmd;
3411 memcpy((smb_data + 1), buf, 2);
3412
3413 for (;;) {
3414 ret = ssd_i2c_write(dev, saddr, 3, smb_data);
3415 if (!ret || -ETIMEDOUT == ret) {
3416 break;
3417 }
3418
3419 i++;
3420 if (i >= SSD_SMBUS_RETRY_MAX) {
3421 break;
3422 }
3423 msleep(SSD_SMBUS_RETRY_INTERVAL);
3424 }
3425
3426 return ret;
3427}
3428
3429static int ssd_smbus_read_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3430{
3431 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3432 int i = 0;
3433 int ret = 0;
3434
3435 smb_data[0] = cmd;
3436
3437 for (;;) {
3438 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 2, buf);
3439 if (!ret || -ETIMEDOUT == ret) {
3440 break;
3441 }
3442
3443 i++;
3444 if (i >= SSD_SMBUS_RETRY_MAX) {
3445 break;
3446 }
3447 msleep(SSD_SMBUS_RETRY_INTERVAL);
3448 }
3449
3450 return ret;
3451}
3452
3453static int ssd_smbus_write_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3454{
3455 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3456 int i = 0;
3457 int ret = 0;
3458
3459 smb_data[0] = cmd;
3460 smb_data[1] = size;
3461 memcpy((smb_data + 2), buf, size);
3462
3463 for (;;) {
3464 ret = ssd_i2c_write(dev, saddr, (2 + size), smb_data);
3465 if (!ret || -ETIMEDOUT == ret) {
3466 break;
3467 }
3468
3469 i++;
3470 if (i >= SSD_SMBUS_RETRY_MAX) {
3471 break;
3472 }
3473 msleep(SSD_SMBUS_RETRY_INTERVAL);
3474 }
3475
3476 return ret;
3477}
3478
3479static int ssd_smbus_read_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3480{
3481 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3482 uint8_t rsize;
3483 int i = 0;
3484 int ret = 0;
3485
3486 smb_data[0] = cmd;
3487
3488 for (;;) {
3489 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, (SSD_SMBUS_BLOCK_MAX + 1), (smb_data + 1));
3490 if (!ret || -ETIMEDOUT == ret) {
3491 break;
3492 }
3493
3494 i++;
3495 if (i >= SSD_SMBUS_RETRY_MAX) {
3496 break;
3497 }
3498 msleep(SSD_SMBUS_RETRY_INTERVAL);
3499 }
3500 if (ret) {
3501 return ret;
3502 }
3503
3504 rsize = smb_data[1];
3505
3506 if (rsize > size ) {
3507 rsize = size;
3508 }
3509
3510 memcpy(buf, (smb_data + 2), rsize);
3511
3512 return 0;
3513}
3514
3515
3516static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data);
3517
3518/* sensor */
3519static int ssd_init_lm75(struct ssd_device *dev, uint8_t saddr)
3520{
3521 uint8_t conf = 0;
3522 int ret = 0;
3523
3524 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3525 if (ret) {
3526 goto out;
3527 }
3528
3529 conf &= (uint8_t)(~1u);
3530
3531 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3532 if (ret) {
3533 goto out;
3534 }
3535
3536out:
3537 return ret;
3538}
3539
3540static int ssd_lm75_read(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3541{
3542 uint16_t val = 0;
3543 int ret;
3544
3545 ret = ssd_smbus_read_word(dev, saddr, SSD_LM75_REG_TEMP, (uint8_t *)&val);
3546 if (ret) {
3547 return ret;
3548 }
3549
3550 *data = u16_swap(val);
3551
3552 return 0;
3553}
3554
3555static int ssd_init_lm80(struct ssd_device *dev, uint8_t saddr)
3556{
3557 uint8_t val;
3558 uint8_t low, high;
3559 int i;
3560 int ret = 0;
3561
3562 /* init */
3563 val = 0x80;
3564 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3565 if (ret) {
3566 goto out;
3567 }
3568
3569 /* 11-bit temp */
3570 val = 0x08;
3571 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_RES, &val);
3572 if (ret) {
3573 goto out;
3574 }
3575
3576 /* set volt limit */
3577 for (i=0; i<SSD_LM80_IN_NR; i++) {
3578 high = ssd_lm80_limit[i].high;
3579 low = ssd_lm80_limit[i].low;
3580
3581 if (SSD_LM80_IN_CAP == i) {
3582 low = 0;
3583 }
3584
3585 if (dev->hw_info.nr_ctrl <= 1 && SSD_LM80_IN_1V2 == i) {
3586 high = 0xFF;
3587 low = 0;
3588 }
3589
3590 /* high limit */
3591 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MAX(i), &high);
3592 if (ret) {
3593 goto out;
3594 }
3595
3596 /* low limit*/
3597 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MIN(i), &low);
3598 if (ret) {
3599 goto out;
3600 }
3601 }
3602
3603 /* set interrupt mask: allow volt in interrupt except cap in*/
3604 val = 0x81;
3605 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3606 if (ret) {
3607 goto out;
3608 }
3609
3610 /* set interrupt mask: disable others */
3611 val = 0xFF;
3612 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK2, &val);
3613 if (ret) {
3614 goto out;
3615 }
3616
3617 /* start */
3618 val = 0x03;
3619 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3620 if (ret) {
3621 goto out;
3622 }
3623
3624out:
3625 return ret;
3626}
3627
3628static int ssd_lm80_enable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3629{
3630 uint8_t val = 0;
3631 int ret = 0;
3632
3633 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3634 return -EINVAL;
3635 }
3636
3637 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3638 if (ret) {
3639 goto out;
3640 }
3641
3642 val &= ~(1UL << (uint32_t)idx);
3643
3644 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3645 if (ret) {
3646 goto out;
3647 }
3648
3649out:
3650 return ret;
3651}
3652
3653static int ssd_lm80_disable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3654{
3655 uint8_t val = 0;
3656 int ret = 0;
3657
3658 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3659 return -EINVAL;
3660 }
3661
3662 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3663 if (ret) {
3664 goto out;
3665 }
3666
3667 val |= (1UL << (uint32_t)idx);
3668
3669 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3670 if (ret) {
3671 goto out;
3672 }
3673
3674out:
3675 return ret;
3676}
3677
3678static int ssd_lm80_read_temp(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3679{
3680 uint16_t val = 0;
3681 int ret;
3682
3683 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_TEMP, (uint8_t *)&val);
3684 if (ret) {
3685 return ret;
3686 }
3687
3688 *data = u16_swap(val);
3689
3690 return 0;
3691}
3692
3693static int ssd_lm80_check_event(struct ssd_device *dev, uint8_t saddr)
3694{
3695 uint32_t volt;
3696 uint16_t val = 0, status;
3697 uint8_t alarm1 = 0, alarm2 = 0;
3698 int i;
3699 int ret = 0;
3700
3701 /* read interrupt status to clear interrupt */
3702 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM1, &alarm1);
3703 if (ret) {
3704 goto out;
3705 }
3706
3707 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM2, &alarm2);
3708 if (ret) {
3709 goto out;
3710 }
3711
3712 status = (uint16_t)alarm1 | ((uint16_t)alarm2 << 8);
3713
3714 /* parse inetrrupt status */
3715 for (i=0; i<SSD_LM80_IN_NR; i++) {
3716 if (!((status >> (uint32_t)i) & 0x1)) {
3717 if (test_and_clear_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3718 /* enable INx irq */
3719 ret = ssd_lm80_enable_in(dev, saddr, i);
3720 if (ret) {
3721 goto out;
3722 }
3723 }
3724
3725 continue;
3726 }
3727
3728 /* disable INx irq */
3729 ret = ssd_lm80_disable_in(dev, saddr, i);
3730 if (ret) {
3731 goto out;
3732 }
3733
3734 if (test_and_set_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3735 continue;
3736 }
3737
3738 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_IN(i), (uint8_t *)&val);
3739 if (ret) {
3740 goto out;
3741 }
3742
3743 volt = SSD_LM80_CONVERT_VOLT(u16_swap(val));
3744
3745 switch (i) {
3746 case SSD_LM80_IN_CAP: {
3747 if (0 == volt) {
3748 ssd_gen_swlog(dev, SSD_LOG_CAP_SHORT_CIRCUIT, 0);
3749 } else {
3750 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(volt));
3751 }
3752 break;
3753 }
3754
3755 case SSD_LM80_IN_1V2:
3756 case SSD_LM80_IN_1V2a:
3757 case SSD_LM80_IN_1V5:
3758 case SSD_LM80_IN_1V8: {
3759 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, volt));
3760 break;
3761 }
3762 case SSD_LM80_IN_FPGA_3V3:
3763 case SSD_LM80_IN_3V3: {
3764 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, SSD_LM80_3V3_VOLT(volt)));
3765 break;
3766 }
3767 default:
3768 break;
3769 }
3770 }
3771
3772out:
3773 if (ret) {
3774 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3775 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, (uint32_t)saddr);
3776 }
3777 } else {
3778 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3779 }
3780 return ret;
3781}
3782
3783static int ssd_init_sensor(struct ssd_device *dev)
3784{
3785 int ret = 0;
3786
3787 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3788 goto out;
3789 }
3790
3791 ret = ssd_init_lm75(dev, SSD_SENSOR_LM75_SADDRESS);
3792 if (ret) {
3793 hio_warn("%s: init lm75 failed\n", dev->name);
3794 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3795 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3796 }
3797 goto out;
3798 }
3799
3800 if (dev->hw_info.pcb_ver >= 'B' || dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_HHHL) {
3801 ret = ssd_init_lm80(dev, SSD_SENSOR_LM80_SADDRESS);
3802 if (ret) {
3803 hio_warn("%s: init lm80 failed\n", dev->name);
3804 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3805 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3806 }
3807 goto out;
3808 }
3809 }
3810
3811out:
3812 /* skip error if not in standard mode */
3813 if (mode != SSD_DRV_MODE_STANDARD) {
3814 ret = 0;
3815 }
3816 return ret;
3817}
3818
3819/* board volt */
3820static int ssd_mon_boardvolt(struct ssd_device *dev)
3821{
3822 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3823 return 0;
3824 }
3825
3826 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3827 return 0;
3828 }
3829
3830 return ssd_lm80_check_event(dev, SSD_SENSOR_LM80_SADDRESS);
3831}
3832
3833/* temperature */
3834static int ssd_mon_temp(struct ssd_device *dev)
3835{
3836 int cur;
3837 uint16_t val = 0;
3838 int ret = 0;
3839
3840 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3841 return 0;
3842 }
3843
3844 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3845 return 0;
3846 }
3847
3848 /* inlet */
3849 ret = ssd_lm80_read_temp(dev, SSD_SENSOR_LM80_SADDRESS, &val);
3850 if (ret) {
3851 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3852 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3853 }
3854 goto out;
3855 }
3856 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3857
3858 cur = SSD_SENSOR_CONVERT_TEMP(val);
3859 if (cur >= SSD_INLET_OT_TEMP) {
3860 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3861 ssd_gen_swlog(dev, SSD_LOG_INLET_OVER_TEMP, (uint32_t)cur);
3862 }
3863 } else if(cur < SSD_INLET_OT_HYST) {
3864 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3865 ssd_gen_swlog(dev, SSD_LOG_INLET_NORMAL_TEMP, (uint32_t)cur);
3866 }
3867 }
3868
3869 /* flash */
3870 ret = ssd_lm75_read(dev, SSD_SENSOR_LM75_SADDRESS, &val);
3871 if (ret) {
3872 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3873 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3874 }
3875 goto out;
3876 }
3877 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon);
3878
3879 cur = SSD_SENSOR_CONVERT_TEMP(val);
3880 if (cur >= SSD_FLASH_OT_TEMP) {
3881 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3882 ssd_gen_swlog(dev, SSD_LOG_FLASH_OVER_TEMP, (uint32_t)cur);
3883 }
3884 } else if(cur < SSD_FLASH_OT_HYST) {
3885 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3886 ssd_gen_swlog(dev, SSD_LOG_FLASH_NORMAL_TEMP, (uint32_t)cur);
3887 }
3888 }
3889
3890out:
3891 return ret;
3892}
3893
3894/* cmd tag */
3895static inline void ssd_put_tag(struct ssd_device *dev, int tag)
3896{
3897 test_and_clear_bit(tag, dev->tag_map);
3898 wake_up(&dev->tag_wq);
3899}
3900
3901static inline int ssd_get_tag(struct ssd_device *dev, int wait)
3902{
3903 int tag;
3904
3905find_tag:
3906 while ((tag = find_first_zero_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz)) >= atomic_read(&dev->queue_depth)) {
3907 DEFINE_WAIT(__wait);
3908
3909 if (!wait) {
3910 return -1;
3911 }
3912
3913 prepare_to_wait_exclusive(&dev->tag_wq, &__wait, TASK_UNINTERRUPTIBLE);
3914 schedule();
3915
3916 finish_wait(&dev->tag_wq, &__wait);
3917 }
3918
3919 if (test_and_set_bit(tag, dev->tag_map)) {
3920 goto find_tag;
3921 }
3922
3923 return tag;
3924}
3925
3926static void ssd_barrier_put_tag(struct ssd_device *dev, int tag)
3927{
3928 test_and_clear_bit(tag, dev->tag_map);
3929}
3930
3931static int ssd_barrier_get_tag(struct ssd_device *dev)
3932{
3933 int tag = 0;
3934
3935 if (test_and_set_bit(tag, dev->tag_map)) {
3936 return -1;
3937 }
3938
3939 return tag;
3940}
3941
3942static void ssd_barrier_end(struct ssd_device *dev)
3943{
3944 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3945 wake_up_all(&dev->tag_wq);
3946
3947 mutex_unlock(&dev->barrier_mutex);
3948}
3949
3950static int ssd_barrier_start(struct ssd_device *dev)
3951{
3952 int i;
3953
3954 mutex_lock(&dev->barrier_mutex);
3955
3956 atomic_set(&dev->queue_depth, 0);
3957
3958 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3959 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3960 return 0;
3961 }
3962
3963 __set_current_state(TASK_INTERRUPTIBLE);
3964 schedule_timeout(1);
3965 }
3966
3967 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3968 wake_up_all(&dev->tag_wq);
3969
3970 mutex_unlock(&dev->barrier_mutex);
3971
3972 return -EBUSY;
3973}
3974
3975static int ssd_busy(struct ssd_device *dev)
3976{
3977 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3978 return 0;
3979 }
3980
3981 return 1;
3982}
3983
3984static int ssd_wait_io(struct ssd_device *dev)
3985{
3986 int i;
3987
3988 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3989 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3990 return 0;
3991 }
3992
3993 __set_current_state(TASK_INTERRUPTIBLE);
3994 schedule_timeout(1);
3995 }
3996
3997 return -EBUSY;
3998}
3999
4000#if 0
4001static int ssd_in_barrier(struct ssd_device *dev)
4002{
4003 return (0 == atomic_read(&dev->queue_depth));
4004}
4005#endif
4006
4007static void ssd_cleanup_tag(struct ssd_device *dev)
4008{
4009 kfree(dev->tag_map);
4010}
4011
4012static int ssd_init_tag(struct ssd_device *dev)
4013{
4014 int nr_ulongs = ALIGN(dev->hw_info.cmd_fifo_sz, BITS_PER_LONG) / BITS_PER_LONG;
4015
4016 mutex_init(&dev->barrier_mutex);
4017
4018 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4019
4020 dev->tag_map = kmalloc(nr_ulongs * sizeof(unsigned long), GFP_ATOMIC);
4021 if (!dev->tag_map) {
4022 return -ENOMEM;
4023 }
4024
4025 memset(dev->tag_map, 0, nr_ulongs * sizeof(unsigned long));
4026
4027 init_waitqueue_head(&dev->tag_wq);
4028
4029 return 0;
4030}
4031
4032/* io stat */
4033static void ssd_end_io_acct(struct ssd_cmd *cmd)
4034{
4035 struct ssd_device *dev = cmd->dev;
4036 struct bio *bio = cmd->bio;
4037 unsigned long dur = jiffies - cmd->start_time;
4038 int rw = bio_data_dir(bio);
4039
4040#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4041 int cpu = part_stat_lock();
4042 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4043 part_round_stats(cpu, part);
4044 part_stat_add(cpu, part, ticks[rw], dur);
4045 part_dec_in_flight(part, rw);
4046 part_stat_unlock();
4047#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4048 int cpu = part_stat_lock();
4049 struct hd_struct *part = &dev->gd->part0;
4050 part_round_stats(cpu, part);
4051 part_stat_add(cpu, part, ticks[rw], dur);
4052 part_stat_unlock();
4053 part->in_flight[rw] = atomic_dec_return(&dev->in_flight[rw]);
4054#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4055 preempt_disable();
4056 disk_round_stats(dev->gd);
4057 preempt_enable();
4058 disk_stat_add(dev->gd, ticks[rw], dur);
4059 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4060#else
4061 preempt_disable();
4062 disk_round_stats(dev->gd);
4063 preempt_enable();
4064 if (rw == WRITE) {
4065 disk_stat_add(dev->gd, write_ticks, dur);
4066 } else {
4067 disk_stat_add(dev->gd, read_ticks, dur);
4068 }
4069 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4070#endif
4071}
4072
4073static void ssd_start_io_acct(struct ssd_cmd *cmd)
4074{
4075 struct ssd_device *dev = cmd->dev;
4076 struct bio *bio = cmd->bio;
4077 int rw = bio_data_dir(bio);
4078
4079#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4080 int cpu = part_stat_lock();
4081 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4082 part_round_stats(cpu, part);
4083 part_stat_inc(cpu, part, ios[rw]);
4084 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4085 part_inc_in_flight(part, rw);
4086 part_stat_unlock();
4087#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4088 int cpu = part_stat_lock();
4089 struct hd_struct *part = &dev->gd->part0;
4090 part_round_stats(cpu, part);
4091 part_stat_inc(cpu, part, ios[rw]);
4092 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4093 part_stat_unlock();
4094 part->in_flight[rw] = atomic_inc_return(&dev->in_flight[rw]);
4095#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4096 preempt_disable();
4097 disk_round_stats(dev->gd);
4098 preempt_enable();
4099 disk_stat_inc(dev->gd, ios[rw]);
4100 disk_stat_add(dev->gd, sectors[rw], bio_sectors(bio));
4101 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4102#else
4103 preempt_disable();
4104 disk_round_stats(dev->gd);
4105 preempt_enable();
4106 if (rw == WRITE) {
4107 disk_stat_inc(dev->gd, writes);
4108 disk_stat_add(dev->gd, write_sectors, bio_sectors(bio));
4109 } else {
4110 disk_stat_inc(dev->gd, reads);
4111 disk_stat_add(dev->gd, read_sectors, bio_sectors(bio));
4112 }
4113 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4114#endif
4115
4116 cmd->start_time = jiffies;
4117}
4118
4119/* io */
4120static void ssd_queue_bio(struct ssd_device *dev, struct bio *bio)
4121{
4122 spin_lock(&dev->sendq_lock);
4123 ssd_blist_add(&dev->sendq, bio);
4124 spin_unlock(&dev->sendq_lock);
4125
4126 atomic_inc(&dev->in_sendq);
4127 wake_up(&dev->send_waitq);
4128}
4129
4130static inline void ssd_end_request(struct ssd_cmd *cmd)
4131{
4132 struct ssd_device *dev = cmd->dev;
4133 struct bio *bio = cmd->bio;
4134 int errors = cmd->errors;
4135 int tag = cmd->tag;
4136
4137 if (bio) {
4138#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
195d6988
AW
4139#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
4140 if (!(bio_op(bio) & REQ_OP_DISCARD)) {
4141#else
a6a796ca 4142 if (!(bio->bi_rw & REQ_DISCARD)) {
195d6988 4143#endif
a6a796ca
HSDT
4144 ssd_end_io_acct(cmd);
4145 if (!cmd->flag) {
4146 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4147 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4148 }
4149 }
4150#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4151 if (!bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4152 ssd_end_io_acct(cmd);
4153 if (!cmd->flag) {
4154 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4155 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4156 }
4157 }
4158#else
4159 ssd_end_io_acct(cmd);
4160
4161 if (!cmd->flag) {
4162 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4163 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4164 }
4165#endif
4166
4167 cmd->bio = NULL;
4168 ssd_put_tag(dev, tag);
4169
4170 if (SSD_INT_MSIX == dev->int_mode || tag < 16 || errors) {
4171#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4172 bio_endio(bio, errors);
4173#else
4174 bio_endio(bio, bio->bi_size, errors);
4175#endif
4176 } else /* if (bio->bi_idx >= bio->bi_vcnt)*/ {
4177 spin_lock(&dev->doneq_lock);
4178 ssd_blist_add(&dev->doneq, bio);
4179 spin_unlock(&dev->doneq_lock);
4180
4181 atomic_inc(&dev->in_doneq);
4182 wake_up(&dev->done_waitq);
4183 }
4184 } else {
4185 if (cmd->waiting) {
4186 complete(cmd->waiting);
4187 }
4188 }
4189}
4190
4191static void ssd_end_timeout_request(struct ssd_cmd *cmd)
4192{
4193 struct ssd_device *dev = cmd->dev;
4194 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4195 int i;
4196
4197 for (i=0; i<dev->nr_queue; i++) {
4198 disable_irq(dev->entry[i].vector);
4199 }
4200
4201 atomic_inc(&dev->tocnt);
4202 //if (cmd->bio) {
4203 hio_err("%s: cmd timeout: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4204 cmd->errors = -ETIMEDOUT;
4205 ssd_end_request(cmd);
4206 //}
4207
4208 for (i=0; i<dev->nr_queue; i++) {
4209 enable_irq(dev->entry[i].vector);
4210 }
4211
4212 /* alarm led */
4213 ssd_set_alarm(dev);
4214}
4215
4216/* cmd timer */
4217static void ssd_cmd_add_timer(struct ssd_cmd *cmd, int timeout, void (*complt)(struct ssd_cmd *))
4218{
4219 init_timer(&cmd->cmd_timer);
4220
4221 cmd->cmd_timer.data = (unsigned long)cmd;
4222 cmd->cmd_timer.expires = jiffies + timeout;
4223 cmd->cmd_timer.function = (void (*)(unsigned long)) complt;
4224
4225 add_timer(&cmd->cmd_timer);
4226}
4227
4228static int ssd_cmd_del_timer(struct ssd_cmd *cmd)
4229{
4230 return del_timer(&cmd->cmd_timer);
4231}
4232
4233static void ssd_add_timer(struct timer_list *timer, int timeout, void (*complt)(void *), void *data)
4234{
4235 init_timer(timer);
4236
4237 timer->data = (unsigned long)data;
4238 timer->expires = jiffies + timeout;
4239 timer->function = (void (*)(unsigned long)) complt;
4240
4241 add_timer(timer);
4242}
4243
4244static int ssd_del_timer(struct timer_list *timer)
4245{
4246 return del_timer(timer);
4247}
4248
4249static void ssd_cmd_timeout(struct ssd_cmd *cmd)
4250{
4251 struct ssd_device *dev = cmd->dev;
4252 uint32_t msg = *(uint32_t *)cmd->msg;
4253
4254 ssd_end_timeout_request(cmd);
4255
4256 ssd_gen_swlog(dev, SSD_LOG_TIMEOUT, msg);
4257}
4258
4259
4260static void __ssd_done(unsigned long data)
4261{
4262 struct ssd_cmd *cmd;
4263 LIST_HEAD(localq);
4264
4265 local_irq_disable();
4266#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4267 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4268#else
4269 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4270#endif
4271 local_irq_enable();
4272
4273 while (!list_empty(&localq)) {
4274 cmd = list_entry(localq.next, struct ssd_cmd, list);
4275 list_del_init(&cmd->list);
4276
4277 ssd_end_request(cmd);
4278 }
4279}
4280
4281static void __ssd_done_db(unsigned long data)
4282{
4283 struct ssd_cmd *cmd;
4284 struct ssd_device *dev;
4285 struct bio *bio;
4286 LIST_HEAD(localq);
4287
4288 local_irq_disable();
4289#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4290 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4291#else
4292 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4293#endif
4294 local_irq_enable();
4295
4296 while (!list_empty(&localq)) {
4297 cmd = list_entry(localq.next, struct ssd_cmd, list);
4298 list_del_init(&cmd->list);
4299
4300 dev = (struct ssd_device *)cmd->dev;
4301 bio = cmd->bio;
4302
4303 if (bio) {
4304 sector_t off = dev->db_info.data.loc.off;
4305 uint32_t len = dev->db_info.data.loc.len;
4306
4307 switch (dev->db_info.type) {
4308 case SSD_DEBUG_READ_ERR:
4309 if (bio_data_dir(bio) == READ &&
4310 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4311 cmd->errors = -EIO;
4312 }
4313 break;
4314 case SSD_DEBUG_WRITE_ERR:
4315 if (bio_data_dir(bio) == WRITE &&
4316 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4317 cmd->errors = -EROFS;
4318 }
4319 break;
4320 case SSD_DEBUG_RW_ERR:
4321 if (!((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4322 if (bio_data_dir(bio) == READ) {
4323 cmd->errors = -EIO;
4324 } else {
4325 cmd->errors = -EROFS;
4326 }
4327 }
4328 break;
4329 default:
4330 break;
4331 }
4332 }
4333
4334 ssd_end_request(cmd);
4335 }
4336}
4337
4338static inline void ssd_done_bh(struct ssd_cmd *cmd)
4339{
4340 unsigned long flags = 0;
4341
4342 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4343 struct ssd_device *dev = cmd->dev;
4344 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4345 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4346
4347 /* alarm led */
4348 ssd_set_alarm(dev);
4349 return;
4350 }
4351
4352 local_irq_save(flags);
4353#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4354 list_add_tail(&cmd->list, &__get_cpu_var(ssd_doneq));
4355 tasklet_hi_schedule(&__get_cpu_var(ssd_tasklet));
4356#else
4357 list_add_tail(&cmd->list, this_cpu_ptr(&ssd_doneq));
4358 tasklet_hi_schedule(this_cpu_ptr(&ssd_tasklet));
4359#endif
4360 local_irq_restore(flags);
4361
4362 return;
4363}
4364
4365static inline void ssd_done(struct ssd_cmd *cmd)
4366{
4367 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4368 struct ssd_device *dev = cmd->dev;
4369 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4370 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4371
4372 /* alarm led */
4373 ssd_set_alarm(dev);
4374 return;
4375 }
4376
4377 ssd_end_request(cmd);
4378
4379 return;
4380}
4381
4382static inline void ssd_dispatch_cmd(struct ssd_cmd *cmd)
4383{
4384 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4385
4386 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4387
4388 spin_lock(&dev->cmd_lock);
4389 ssd_reg_write(dev->ctrlp + SSD_REQ_FIFO_REG, cmd->msg_dma);
4390 spin_unlock(&dev->cmd_lock);
4391}
4392
4393static inline void ssd_send_cmd(struct ssd_cmd *cmd)
4394{
4395 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4396
4397 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4398
4399 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4400}
4401
4402static inline void ssd_send_cmd_db(struct ssd_cmd *cmd)
4403{
4404 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4405 struct bio *bio = cmd->bio;
4406
4407 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4408
4409 if (bio) {
4410 switch (dev->db_info.type) {
4411 case SSD_DEBUG_READ_TO:
4412 if (bio_data_dir(bio) == READ) {
4413 return;
4414 }
4415 break;
4416 case SSD_DEBUG_WRITE_TO:
4417 if (bio_data_dir(bio) == WRITE) {
4418 return;
4419 }
4420 break;
4421 case SSD_DEBUG_RW_TO:
4422 return;
4423 break;
4424 default:
4425 break;
4426 }
4427 }
4428
4429 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4430}
4431
4432
4433/* fixed for BIOVEC_PHYS_MERGEABLE */
4434#ifdef SSD_BIOVEC_PHYS_MERGEABLE_FIXED
4435#include <linux/bio.h>
4436#include <linux/io.h>
4437#include <xen/page.h>
4438
4439static bool xen_biovec_phys_mergeable_fixed(const struct bio_vec *vec1,
4440 const struct bio_vec *vec2)
4441{
4442 unsigned long mfn1 = pfn_to_mfn(page_to_pfn(vec1->bv_page));
4443 unsigned long mfn2 = pfn_to_mfn(page_to_pfn(vec2->bv_page));
4444
4445 return __BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&
4446 ((mfn1 == mfn2) || ((mfn1+1) == mfn2));
4447}
4448
4449#ifdef BIOVEC_PHYS_MERGEABLE
4450#undef BIOVEC_PHYS_MERGEABLE
4451#endif
4452#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
4453 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
4454 (!xen_domain() || xen_biovec_phys_mergeable_fixed(vec1, vec2)))
4455
4456#endif
4457
4458static inline int ssd_bio_map_sg(struct ssd_device *dev, struct bio *bio, struct scatterlist *sgl)
4459{
4460#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
4461 struct bio_vec *bvec, *bvprv = NULL;
4462 struct scatterlist *sg = NULL;
4463 int i = 0, nsegs = 0;
4464
4465#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23))
4466 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4467#endif
4468
4469 /*
4470 * for each segment in bio
4471 */
4472 bio_for_each_segment(bvec, bio, i) {
4473 if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
4474 sg->length += bvec->bv_len;
4475 } else {
4476 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4477 break;
4478 }
4479
4480 sg = sg ? (sg + 1) : sgl;
4481#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4482 sg_set_page(sg, bvec->bv_page, bvec->bv_len, bvec->bv_offset);
4483#else
4484 sg->page = bvec->bv_page;
4485 sg->length = bvec->bv_len;
4486 sg->offset = bvec->bv_offset;
4487#endif
4488 nsegs++;
4489 }
4490 bvprv = bvec;
4491 }
4492
4493#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4494 if (sg) {
4495 sg_mark_end(sg);
4496 }
4497#endif
4498
4499 bio->bi_idx = i;
4500
4501 return nsegs;
4502#else
4503 struct bio_vec bvec, bvprv;
4504 struct bvec_iter iter;
4505 struct scatterlist *sg = NULL;
4506 int nsegs = 0;
4507 int first = 1;
4508
4509 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4510
4511 /*
4512 * for each segment in bio
4513 */
4514 bio_for_each_segment(bvec, bio, iter) {
4515 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
4516 sg->length += bvec.bv_len;
4517 } else {
4518 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4519 break;
4520 }
4521
4522 sg = sg ? (sg + 1) : sgl;
4523
4524 sg_set_page(sg, bvec.bv_page, bvec.bv_len, bvec.bv_offset);
4525
4526 nsegs++;
4527 first = 0;
4528 }
4529 bvprv = bvec;
4530 }
4531
4532 if (sg) {
4533 sg_mark_end(sg);
4534 }
4535
4536 return nsegs;
4537#endif
4538}
4539
4540
4541static int __ssd_submit_pbio(struct ssd_device *dev, struct bio *bio, int wait)
4542{
4543 struct ssd_cmd *cmd;
4544 struct ssd_rw_msg *msg;
4545 struct ssd_sg_entry *sge;
4546 sector_t block = bio_start(bio);
4547 int tag;
4548 int i;
4549
4550 tag = ssd_get_tag(dev, wait);
4551 if (tag < 0) {
4552 return -EBUSY;
4553 }
4554
4555 cmd = &dev->cmd[tag];
4556 cmd->bio = bio;
4557 cmd->flag = 1;
4558
4559 msg = (struct ssd_rw_msg *)cmd->msg;
4560
4561#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
195d6988
AW
4562#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
4563 if (bio_op(bio) & REQ_OP_DISCARD) {
4564#else
a6a796ca 4565 if (bio->bi_rw & REQ_DISCARD) {
195d6988 4566#endif
a6a796ca
HSDT
4567 unsigned int length = bio_sectors(bio);
4568
4569 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4570 msg->tag = tag;
4571 msg->fun = SSD_FUNC_TRIM;
4572
4573 sge = msg->sge;
4574 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4575 sge->block = block;
4576 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4577 sge->buf = 0;
4578
4579 block += sge->length;
4580 length -= sge->length;
4581 sge++;
4582
4583 if (length <= 0) {
4584 break;
4585 }
4586 }
4587 msg->nsegs = cmd->nsegs = (i + 1);
4588
4589 dev->scmd(cmd);
4590 return 0;
4591 }
4592#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4593 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4594 unsigned int length = bio_sectors(bio);
4595
4596 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4597 msg->tag = tag;
4598 msg->fun = SSD_FUNC_TRIM;
4599
4600 sge = msg->sge;
4601 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4602 sge->block = block;
4603 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4604 sge->buf = 0;
4605
4606 block += sge->length;
4607 length -= sge->length;
4608 sge++;
4609
4610 if (length <= 0) {
4611 break;
4612 }
4613 }
4614 msg->nsegs = cmd->nsegs = (i + 1);
4615
4616 dev->scmd(cmd);
4617 return 0;
4618 }
4619#endif
4620
4621 //msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4622 msg->nsegs = cmd->nsegs = bio->bi_vcnt;
4623
4624 //xx
4625 if (bio_data_dir(bio) == READ) {
4626 msg->fun = SSD_FUNC_READ;
4627 msg->flag = 0;
4628 } else {
4629 msg->fun = SSD_FUNC_WRITE;
4630 msg->flag = dev->wmode;
4631 }
4632
4633 sge = msg->sge;
4634 for (i=0; i<bio->bi_vcnt; i++) {
4635 sge->block = block;
4636 sge->length = bio->bi_io_vec[i].bv_len >> 9;
4637 sge->buf = (uint64_t)((void *)bio->bi_io_vec[i].bv_page + bio->bi_io_vec[i].bv_offset);
4638
4639 block += sge->length;
4640 sge++;
4641 }
4642
4643 msg->tag = tag;
4644
4645#ifdef SSD_OT_PROTECT
4646 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4647 msleep_interruptible(dev->ot_delay);
4648 }
4649#endif
4650
4651 ssd_start_io_acct(cmd);
4652 dev->scmd(cmd);
4653
4654 return 0;
4655}
4656
4657static inline int ssd_submit_bio(struct ssd_device *dev, struct bio *bio, int wait)
4658{
4659 struct ssd_cmd *cmd;
4660 struct ssd_rw_msg *msg;
4661 struct ssd_sg_entry *sge;
4662 struct scatterlist *sgl;
4663 sector_t block = bio_start(bio);
4664 int tag;
4665 int i;
4666
4667 tag = ssd_get_tag(dev, wait);
4668 if (tag < 0) {
4669 return -EBUSY;
4670 }
4671
4672 cmd = &dev->cmd[tag];
4673 cmd->bio = bio;
4674 cmd->flag = 0;
4675
4676 msg = (struct ssd_rw_msg *)cmd->msg;
4677
4678 sgl = cmd->sgl;
4679
4680#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
195d6988
AW
4681#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
4682 if (bio_op(bio) & REQ_OP_DISCARD) {
4683#else
a6a796ca 4684 if (bio->bi_rw & REQ_DISCARD) {
195d6988 4685#endif
a6a796ca
HSDT
4686 unsigned int length = bio_sectors(bio);
4687
4688 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4689 msg->tag = tag;
4690 msg->fun = SSD_FUNC_TRIM;
4691
4692 sge = msg->sge;
4693 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4694 sge->block = block;
4695 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4696 sge->buf = 0;
4697
4698 block += sge->length;
4699 length -= sge->length;
4700 sge++;
4701
4702 if (length <= 0) {
4703 break;
4704 }
4705 }
4706 msg->nsegs = cmd->nsegs = (i + 1);
4707
4708 dev->scmd(cmd);
4709 return 0;
4710 }
4711#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4712 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4713 unsigned int length = bio_sectors(bio);
4714
4715 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4716 msg->tag = tag;
4717 msg->fun = SSD_FUNC_TRIM;
4718
4719 sge = msg->sge;
4720 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4721 sge->block = block;
4722 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4723 sge->buf = 0;
4724
4725 block += sge->length;
4726 length -= sge->length;
4727 sge++;
4728
4729 if (length <= 0) {
4730 break;
4731 }
4732 }
4733 msg->nsegs = cmd->nsegs = (i + 1);
4734
4735 dev->scmd(cmd);
4736 return 0;
4737 }
4738#endif
4739
4740 msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4741
4742 //xx
4743 if (bio_data_dir(bio) == READ) {
4744 msg->fun = SSD_FUNC_READ;
4745 msg->flag = 0;
4746 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_FROMDEVICE);
4747 } else {
4748 msg->fun = SSD_FUNC_WRITE;
4749 msg->flag = dev->wmode;
4750 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_TODEVICE);
4751 }
4752
4753 sge = msg->sge;
4754 for (i=0; i<cmd->nsegs; i++) {
4755 sge->block = block;
4756 sge->length = sg_dma_len(sgl) >> 9;
4757 sge->buf = sg_dma_address(sgl);
4758
4759 block += sge->length;
4760 sgl++;
4761 sge++;
4762 }
4763
4764 msg->tag = tag;
4765
4766#ifdef SSD_OT_PROTECT
4767 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4768 msleep_interruptible(dev->ot_delay);
4769 }
4770#endif
4771
4772 ssd_start_io_acct(cmd);
4773 dev->scmd(cmd);
4774
4775 return 0;
4776}
4777
4778/* threads */
4779static int ssd_done_thread(void *data)
4780{
4781 struct ssd_device *dev;
4782 struct bio *bio;
4783 struct bio *next;
a6a796ca
HSDT
4784
4785 if (!data) {
4786 return -EINVAL;
4787 }
4788 dev = data;
4789
4790 //set_user_nice(current, -5);
4791
4792 while (!kthread_should_stop()) {
4793 wait_event_interruptible(dev->done_waitq, (atomic_read(&dev->in_doneq) || kthread_should_stop()));
4794
4795 while (atomic_read(&dev->in_doneq)) {
4796 if (threaded_irq) {
4797 spin_lock(&dev->doneq_lock);
4798 bio = ssd_blist_get(&dev->doneq);
4799 spin_unlock(&dev->doneq_lock);
4800 } else {
4801 spin_lock_irq(&dev->doneq_lock);
4802 bio = ssd_blist_get(&dev->doneq);
4803 spin_unlock_irq(&dev->doneq_lock);
4804 }
4805
4806 while (bio) {
4807 next = bio->bi_next;
4808 bio->bi_next = NULL;
4809#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4810 bio_endio(bio, 0);
4811#else
4812 bio_endio(bio, bio->bi_size, 0);
4813#endif
4814 atomic_dec(&dev->in_doneq);
4815 bio = next;
4816 }
4817
4818 cond_resched();
4819
4820#ifdef SSD_ESCAPE_IRQ
4821 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4822#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
f3ffa147
KM
4823 cpumask_var_t new_mask;
4824 alloc_cpumask_var(&new_mask, GFP_ATOMIC);
4825 cpumask_setall(new_mask);
4826 cpumask_clear_cpu(dev->irq_cpu, new_mask);
4827 set_cpus_allowed_ptr(current, new_mask);
4828 free_cpumask_var(new_mask);
a6a796ca 4829#else
f3ffa147 4830 cpumask_t new_mask;
a6a796ca
HSDT
4831 cpus_setall(new_mask);
4832 cpu_clear(dev->irq_cpu, new_mask);
4833 set_cpus_allowed(current, new_mask);
4834#endif
4835 }
4836#endif
4837 }
4838 }
4839 return 0;
4840}
4841
4842static int ssd_send_thread(void *data)
4843{
4844 struct ssd_device *dev;
4845 struct bio *bio;
4846 struct bio *next;
a6a796ca
HSDT
4847
4848 if (!data) {
4849 return -EINVAL;
4850 }
4851 dev = data;
4852
4853 //set_user_nice(current, -5);
4854
4855 while (!kthread_should_stop()) {
4856 wait_event_interruptible(dev->send_waitq, (atomic_read(&dev->in_sendq) || kthread_should_stop()));
4857
4858 while (atomic_read(&dev->in_sendq)) {
4859 spin_lock(&dev->sendq_lock);
4860 bio = ssd_blist_get(&dev->sendq);
4861 spin_unlock(&dev->sendq_lock);
4862
4863 while (bio) {
4864 next = bio->bi_next;
4865 bio->bi_next = NULL;
4866#ifdef SSD_QUEUE_PBIO
4867 if (test_and_clear_bit(BIO_SSD_PBIO, &bio->bi_flags)) {
4868 __ssd_submit_pbio(dev, bio, 1);
4869 } else {
4870 ssd_submit_bio(dev, bio, 1);
4871 }
4872#else
4873 ssd_submit_bio(dev, bio, 1);
4874#endif
4875 atomic_dec(&dev->in_sendq);
4876 bio = next;
4877 }
4878
4879 cond_resched();
4880
4881#ifdef SSD_ESCAPE_IRQ
4882 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4883#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
f3ffa147
KM
4884 cpumask_var_t new_mask;
4885 alloc_cpumask_var(&new_mask, GFP_ATOMIC);
4886 cpumask_setall(new_mask);
4887 cpumask_clear_cpu(dev->irq_cpu, new_mask);
4888 set_cpus_allowed_ptr(current, new_mask);
4889 free_cpumask_var(new_mask);
a6a796ca 4890#else
f3ffa147 4891 cpumask_t new_mask;
a6a796ca
HSDT
4892 cpus_setall(new_mask);
4893 cpu_clear(dev->irq_cpu, new_mask);
4894 set_cpus_allowed(current, new_mask);
4895#endif
4896 }
4897#endif
4898 }
4899 }
4900
4901 return 0;
4902}
4903
4904static void ssd_cleanup_thread(struct ssd_device *dev)
4905{
4906 kthread_stop(dev->send_thread);
4907 kthread_stop(dev->done_thread);
4908}
4909
4910static int ssd_init_thread(struct ssd_device *dev)
4911{
4912 int ret;
4913
4914 atomic_set(&dev->in_doneq, 0);
4915 atomic_set(&dev->in_sendq, 0);
4916
4917 spin_lock_init(&dev->doneq_lock);
4918 spin_lock_init(&dev->sendq_lock);
4919
4920 ssd_blist_init(&dev->doneq);
4921 ssd_blist_init(&dev->sendq);
4922
4923 init_waitqueue_head(&dev->done_waitq);
4924 init_waitqueue_head(&dev->send_waitq);
4925
4926 dev->done_thread = kthread_run(ssd_done_thread, dev, "%s/d", dev->name);
4927 if (IS_ERR(dev->done_thread)) {
4928 ret = PTR_ERR(dev->done_thread);
4929 goto out_done_thread;
4930 }
4931
4932 dev->send_thread = kthread_run(ssd_send_thread, dev, "%s/s", dev->name);
4933 if (IS_ERR(dev->send_thread)) {
4934 ret = PTR_ERR(dev->send_thread);
4935 goto out_send_thread;
4936 }
4937
4938 return 0;
4939
4940out_send_thread:
4941 kthread_stop(dev->done_thread);
4942out_done_thread:
4943 return ret;
4944}
4945
4946/* dcmd pool */
4947static void ssd_put_dcmd(struct ssd_dcmd *dcmd)
4948{
4949 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
4950
4951 spin_lock(&dev->dcmd_lock);
4952 list_add_tail(&dcmd->list, &dev->dcmd_list);
4953 spin_unlock(&dev->dcmd_lock);
4954}
4955
4956static struct ssd_dcmd *ssd_get_dcmd(struct ssd_device *dev)
4957{
4958 struct ssd_dcmd *dcmd = NULL;
4959
4960 spin_lock(&dev->dcmd_lock);
4961 if (!list_empty(&dev->dcmd_list)) {
4962 dcmd = list_entry(dev->dcmd_list.next,
4963 struct ssd_dcmd, list);
4964 list_del_init(&dcmd->list);
4965 }
4966 spin_unlock(&dev->dcmd_lock);
4967
4968 return dcmd;
4969}
4970
4971static void ssd_cleanup_dcmd(struct ssd_device *dev)
4972{
4973 kfree(dev->dcmd);
4974}
4975
4976static int ssd_init_dcmd(struct ssd_device *dev)
4977{
4978 struct ssd_dcmd *dcmd;
4979 int dcmd_sz = sizeof(struct ssd_dcmd)*dev->hw_info.cmd_fifo_sz;
4980 int i;
4981
4982 spin_lock_init(&dev->dcmd_lock);
4983 INIT_LIST_HEAD(&dev->dcmd_list);
4984 init_waitqueue_head(&dev->dcmd_wq);
4985
4986 dev->dcmd = kmalloc(dcmd_sz, GFP_KERNEL);
4987 if (!dev->dcmd) {
4988 hio_warn("%s: can not alloc dcmd\n", dev->name);
4989 goto out_alloc_dcmd;
4990 }
4991 memset(dev->dcmd, 0, dcmd_sz);
4992
4993 for (i=0, dcmd=dev->dcmd; i<(int)dev->hw_info.cmd_fifo_sz; i++, dcmd++) {
4994 dcmd->dev = dev;
4995 INIT_LIST_HEAD(&dcmd->list);
4996 list_add_tail(&dcmd->list, &dev->dcmd_list);
4997 }
4998
4999 return 0;
5000
5001out_alloc_dcmd:
5002 return -ENOMEM;
5003}
5004
5005static void ssd_put_dmsg(void *msg)
5006{
5007 struct ssd_dcmd *dcmd = container_of(msg, struct ssd_dcmd, msg);
5008 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
5009
5010 memset(dcmd->msg, 0, SSD_DCMD_MAX_SZ);
5011 ssd_put_dcmd(dcmd);
5012 wake_up(&dev->dcmd_wq);
5013}
5014
5015static void *ssd_get_dmsg(struct ssd_device *dev)
5016{
5017 struct ssd_dcmd *dcmd = ssd_get_dcmd(dev);
5018
5019 while (!dcmd) {
5020 DEFINE_WAIT(wait);
5021 prepare_to_wait_exclusive(&dev->dcmd_wq, &wait, TASK_UNINTERRUPTIBLE);
5022 schedule();
5023
5024 dcmd = ssd_get_dcmd(dev);
5025
5026 finish_wait(&dev->dcmd_wq, &wait);
5027 }
5028 return dcmd->msg;
5029}
5030
5031/* do direct cmd */
5032static int ssd_do_request(struct ssd_device *dev, int rw, void *msg, int *done)
5033{
5034 DECLARE_COMPLETION(wait);
5035 struct ssd_cmd *cmd;
5036 int tag;
5037 int ret = 0;
5038
5039 tag = ssd_get_tag(dev, 1);
5040 if (tag < 0) {
5041 return -EBUSY;
5042 }
5043
5044 cmd = &dev->cmd[tag];
5045 cmd->nsegs = 1;
5046 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5047 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5048
5049 cmd->waiting = &wait;
5050
5051 dev->scmd(cmd);
5052
5053 wait_for_completion(cmd->waiting);
5054 cmd->waiting = NULL;
5055
5056 if (cmd->errors == -ETIMEDOUT) {
5057 ret = cmd->errors;
5058 } else if (cmd->errors) {
5059 ret = -EIO;
5060 }
5061
5062 if (done != NULL) {
5063 *done = cmd->nr_log;
5064 }
5065 ssd_put_tag(dev, cmd->tag);
5066
5067 return ret;
5068}
5069
5070static int ssd_do_barrier_request(struct ssd_device *dev, int rw, void *msg, int *done)
5071{
5072 DECLARE_COMPLETION(wait);
5073 struct ssd_cmd *cmd;
5074 int tag;
5075 int ret = 0;
5076
5077 tag = ssd_barrier_get_tag(dev);
5078 if (tag < 0) {
5079 return -EBUSY;
5080 }
5081
5082 cmd = &dev->cmd[tag];
5083 cmd->nsegs = 1;
5084 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5085 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5086
5087 cmd->waiting = &wait;
5088
5089 dev->scmd(cmd);
5090
5091 wait_for_completion(cmd->waiting);
5092 cmd->waiting = NULL;
5093
5094 if (cmd->errors == -ETIMEDOUT) {
5095 ret = cmd->errors;
5096 } else if (cmd->errors) {
5097 ret = -EIO;
5098 }
5099
5100 if (done != NULL) {
5101 *done = cmd->nr_log;
5102 }
5103 ssd_barrier_put_tag(dev, cmd->tag);
5104
5105 return ret;
5106}
5107
5108#ifdef SSD_OT_PROTECT
5109static void ssd_check_temperature(struct ssd_device *dev, int temp)
5110{
5111 uint64_t val;
5112 uint32_t off;
5113 int cur;
5114 int i;
5115
5116 if (mode != SSD_DRV_MODE_STANDARD) {
5117 return;
5118 }
5119
5120 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5121 }
5122
5123 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5124 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
5125
5126 val = ssd_reg_read(dev->ctrlp + off);
5127 if (val == 0xffffffffffffffffull) {
5128 continue;
5129 }
5130
5131 cur = (int)CUR_TEMP(val);
5132 if (cur >= temp) {
5133 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5134 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5135 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5136 dev->ot_delay = SSD_OT_DELAY;
5137 }
5138 }
5139 return;
5140 }
5141 }
5142
5143 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5144 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5145 hio_warn("%s: Temperature is OK.\n", dev->name);
5146 dev->ot_delay = 0;
5147 }
5148 }
5149}
5150#endif
5151
5152static int ssd_get_ot_status(struct ssd_device *dev, int *status)
5153{
5154 uint32_t off;
5155 uint32_t val;
5156 int i;
5157
5158 if (!dev || !status) {
5159 return -EINVAL;
5160 }
5161
5162 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5163 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5164 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5165 val = ssd_reg32_read(dev->ctrlp + off);
5166 if ((val >> 22) & 0x1) {
5167 *status = 1;
5168 goto out;
5169 }
5170
5171
5172 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5173 val = ssd_reg32_read(dev->ctrlp + off);
5174 if ((val >> 22) & 0x1) {
5175 *status = 1;
5176 goto out;
5177 }
5178 }
5179 } else {
5180 *status = !!dev->ot_delay;
5181 }
5182
5183out:
5184 return 0;
5185}
5186
5187static void ssd_set_ot_protect(struct ssd_device *dev, int protect)
5188{
5189 uint32_t off;
5190 uint32_t val;
5191 int i;
5192
5193 mutex_lock(&dev->fw_mutex);
5194
5195 dev->ot_protect = !!protect;
5196
5197 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5198 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5199 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5200 val = ssd_reg32_read(dev->ctrlp + off);
5201 if (dev->ot_protect) {
5202 val |= (1U << 21);
5203 } else {
5204 val &= ~(1U << 21);
5205 }
5206 ssd_reg32_write(dev->ctrlp + off, val);
5207
5208
5209 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5210 val = ssd_reg32_read(dev->ctrlp + off);
5211 if (dev->ot_protect) {
5212 val |= (1U << 21);
5213 } else {
5214 val &= ~(1U << 21);
5215 }
5216 ssd_reg32_write(dev->ctrlp + off, val);
5217 }
5218 }
5219
5220 mutex_unlock(&dev->fw_mutex);
5221}
5222
5223static int ssd_init_ot_protect(struct ssd_device *dev)
5224{
5225 ssd_set_ot_protect(dev, ot_protect);
5226
5227#ifdef SSD_OT_PROTECT
5228 ssd_check_temperature(dev, SSD_OT_TEMP);
5229#endif
5230
5231 return 0;
5232}
5233
5234/* log */
5235static int ssd_read_log(struct ssd_device *dev, int ctrl_idx, void *buf, int *nr_log)
5236{
5237 struct ssd_log_op_msg *msg;
5238 struct ssd_log_msg *lmsg;
5239 dma_addr_t buf_dma;
5240 size_t length = dev->hw_info.log_sz;
5241 int ret = 0;
5242
5243 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
5244 return -EINVAL;
5245 }
5246
5247 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
5248#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
5249 ret = dma_mapping_error(buf_dma);
5250#else
5251 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
5252#endif
5253 if (ret) {
5254 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
5255 goto out_dma_mapping;
5256 }
5257
5258 msg = (struct ssd_log_op_msg *)ssd_get_dmsg(dev);
5259
5260 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5261 lmsg = (struct ssd_log_msg *)msg;
5262 lmsg->fun = SSD_FUNC_READ_LOG;
5263 lmsg->ctrl_idx = ctrl_idx;
5264 lmsg->buf = buf_dma;
5265 } else {
5266 msg->fun = SSD_FUNC_READ_LOG;
5267 msg->ctrl_idx = ctrl_idx;
5268 msg->buf = buf_dma;
5269 }
5270
5271 ret = ssd_do_request(dev, READ, msg, nr_log);
5272 ssd_put_dmsg(msg);
5273
5274 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
5275
5276out_dma_mapping:
5277 return ret;
5278}
5279
5280#define SSD_LOG_PRINT_BUF_SZ 256
5281static int ssd_parse_log(struct ssd_device *dev, struct ssd_log *log, int print)
5282{
5283 struct ssd_log_desc *log_desc = ssd_log_desc;
5284 struct ssd_log_entry *le;
5285 char *sn = NULL;
5286 char print_buf[SSD_LOG_PRINT_BUF_SZ];
5287 int print_len;
5288
5289 le = &log->le;
5290
5291 /* find desc */
5292 while (log_desc->event != SSD_UNKNOWN_EVENT) {
5293 if (log_desc->event == le->event) {
5294 break;
5295 }
5296 log_desc++;
5297 }
5298
5299 if (!print) {
5300 goto out;
5301 }
5302
5303 if (log_desc->level < log_level) {
5304 goto out;
5305 }
5306
5307 /* parse */
5308 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5309 sn = dev->label.sn;
5310 } else {
5311 sn = dev->labelv3.barcode;
5312 }
5313
5314 print_len = snprintf(print_buf, SSD_LOG_PRINT_BUF_SZ, "%s (%s): <%#x>", dev->name, sn, le->event);
5315
5316 if (log->ctrl_idx != SSD_LOG_SW_IDX) {
5317 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " controller %d", log->ctrl_idx);
5318 }
5319
5320 switch (log_desc->data) {
5321 case SSD_LOG_DATA_NONE:
5322 break;
5323 case SSD_LOG_DATA_LOC:
5324 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5325 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc.flash);
5326 if (log_desc->sblock) {
5327 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc.block);
5328 }
5329 if (log_desc->spage) {
5330 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc.page);
5331 }
5332 } else {
5333 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc1.flash);
5334 if (log_desc->sblock) {
5335 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc1.block);
5336 }
5337 if (log_desc->spage) {
5338 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc1.page);
5339 }
5340 }
5341 break;
5342 case SSD_LOG_DATA_HEX:
5343 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " info %#x", le->data.val);
5344 break;
5345 default:
5346 break;
5347 }
5348 /*print_len += */snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), ": %s", log_desc->desc);
5349
5350 switch (log_desc->level) {
5351 case SSD_LOG_LEVEL_INFO:
5352 hio_info("%s\n", print_buf);
5353 break;
5354 case SSD_LOG_LEVEL_NOTICE:
5355 hio_note("%s\n", print_buf);
5356 break;
5357 case SSD_LOG_LEVEL_WARNING:
5358 hio_warn("%s\n", print_buf);
5359 break;
5360 case SSD_LOG_LEVEL_ERR:
5361 hio_err("%s\n", print_buf);
5362 //printk(KERN_ERR MODULE_NAME": some exception occurred, please check the data or refer to FAQ.");
5363 break;
5364 default:
5365 hio_warn("%s\n", print_buf);
5366 break;
5367 }
5368
5369out:
5370 return log_desc->level;
5371}
5372
5373static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status);
5374static int ssd_switch_wmode(struct ssd_device *dev, int wmode);
5375
5376
5377static int ssd_handle_event(struct ssd_device *dev, uint16_t event, int level)
5378{
5379 int ret = 0;
5380
5381 switch (event) {
5382 case SSD_LOG_OVER_TEMP: {
5383#ifdef SSD_OT_PROTECT
5384 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5385 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5386 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5387 dev->ot_delay = SSD_OT_DELAY;
5388 }
5389 }
5390#endif
5391 break;
5392 }
5393
5394 case SSD_LOG_NORMAL_TEMP: {
5395#ifdef SSD_OT_PROTECT
5396 /* need to check all controller's temperature */
5397 ssd_check_temperature(dev, SSD_OT_TEMP_HYST);
5398#endif
5399 break;
5400 }
5401
5402 case SSD_LOG_BATTERY_FAULT: {
5403 uint16_t sfstatus;
5404
5405 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5406 if (!ssd_bm_get_sfstatus(dev, &sfstatus)) {
5407 ssd_gen_swlog(dev, SSD_LOG_BM_SFSTATUS, sfstatus);
5408 }
5409 }
5410
5411 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5412 ssd_switch_wmode(dev, dev->user_wmode);
5413 }
5414 break;
5415 }
5416
5417 case SSD_LOG_BATTERY_OK: {
5418 if (test_and_clear_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5419 ssd_switch_wmode(dev, dev->user_wmode);
5420 }
5421 break;
5422 }
5423
5424 case SSD_LOG_BOARD_VOLT_FAULT: {
5425 ssd_mon_boardvolt(dev);
5426 break;
5427 }
5428
5429 case SSD_LOG_CLEAR_LOG: {
5430 /* update smart */
5431 memset(&dev->smart.log_info, 0, sizeof(struct ssd_log_info));
5432 break;
5433 }
5434
5435 case SSD_LOG_CAP_VOLT_FAULT:
5436 case SSD_LOG_CAP_LEARN_FAULT:
5437 case SSD_LOG_CAP_SHORT_CIRCUIT: {
5438 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5439 ssd_switch_wmode(dev, dev->user_wmode);
5440 }
5441 break;
5442 }
5443
5444 default:
5445 break;
5446 }
5447
5448 /* ssd event call */
5449 if (dev->event_call) {
5450 dev->event_call(dev->gd, event, level);
5451
5452 /* FIXME */
5453 if (SSD_LOG_CAP_VOLT_FAULT == event || SSD_LOG_CAP_LEARN_FAULT == event || SSD_LOG_CAP_SHORT_CIRCUIT == event) {
5454 dev->event_call(dev->gd, SSD_LOG_BATTERY_FAULT, level);
5455 }
5456 }
5457
5458 return ret;
5459}
5460
5461static int ssd_save_log(struct ssd_device *dev, struct ssd_log *log)
5462{
5463 uint32_t off, size;
5464 void *internal_log;
5465 int ret = 0;
5466
5467 mutex_lock(&dev->internal_log_mutex);
5468
5469 size = sizeof(struct ssd_log);
5470 off = dev->internal_log.nr_log * size;
5471
5472 if (off == dev->rom_info.log_sz) {
5473 if (dev->internal_log.nr_log == dev->smart.log_info.nr_log) {
5474 hio_warn("%s: internal log is full\n", dev->name);
5475 }
5476 goto out;
5477 }
5478
5479 internal_log = dev->internal_log.log + off;
5480 memcpy(internal_log, log, size);
5481
5482 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
5483 off += dev->rom_info.log_base;
5484
5485 ret = ssd_spi_write(dev, log, off, size);
5486 if (ret) {
5487 goto out;
5488 }
5489 }
5490
5491 dev->internal_log.nr_log++;
5492
5493out:
5494 mutex_unlock(&dev->internal_log_mutex);
5495 return ret;
5496}
5497
5498static int ssd_save_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5499{
5500 struct ssd_log log;
5501 struct timeval tv;
5502 int level;
5503 int ret = 0;
5504
5505 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5506 return 0;
5507
5508 memset(&log, 0, sizeof(struct ssd_log));
5509
5510 do_gettimeofday(&tv);
5511 log.ctrl_idx = SSD_LOG_SW_IDX;
5512 log.time = tv.tv_sec;
5513 log.le.event = event;
5514 log.le.data.val = data;
5515
5516 level = ssd_parse_log(dev, &log, 0);
5517 if (level >= SSD_LOG_LEVEL) {
5518 ret = ssd_save_log(dev, &log);
5519 }
5520
5521 /* set alarm */
5522 if (SSD_LOG_LEVEL_ERR == level) {
5523 ssd_set_alarm(dev);
5524 }
5525
5526 /* update smart */
5527 dev->smart.log_info.nr_log++;
5528 dev->smart.log_info.stat[level]++;
5529
5530 /* handle event */
5531 ssd_handle_event(dev, event, level);
5532
5533 return ret;
5534}
5535
5536static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5537{
5538 struct ssd_log_entry le;
5539 int ret;
5540
5541 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5542 return 0;
5543
5544 /* slave port ? */
5545 if (dev->slave) {
5546 return 0;
5547 }
5548
5549 memset(&le, 0, sizeof(struct ssd_log_entry));
5550 le.event = event;
5551 le.data.val = data;
5552
5553 ret = sfifo_put(&dev->log_fifo, &le);
5554 if (ret) {
5555 return ret;
5556 }
5557
5558 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
5559 queue_work(dev->workq, &dev->log_work);
5560 }
5561
5562 return 0;
5563}
5564
5565static int ssd_do_swlog(struct ssd_device *dev)
5566{
5567 struct ssd_log_entry le;
5568 int ret = 0;
5569
5570 memset(&le, 0, sizeof(struct ssd_log_entry));
5571 while (!sfifo_get(&dev->log_fifo, &le)) {
5572 ret = ssd_save_swlog(dev, le.event, le.data.val);
5573 if (ret) {
5574 break;
5575 }
5576 }
5577
5578 return ret;
5579}
5580
5581static int __ssd_clear_log(struct ssd_device *dev)
5582{
5583 uint32_t off, length;
5584 int ret;
5585
5586 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5587 return 0;
5588 }
5589
5590 if (dev->internal_log.nr_log == 0) {
5591 return 0;
5592 }
5593
5594 mutex_lock(&dev->internal_log_mutex);
5595
5596 off = dev->rom_info.log_base;
5597 length = dev->rom_info.log_sz;
5598
5599 ret = ssd_spi_erase(dev, off, length);
5600 if (ret) {
5601 hio_warn("%s: log erase: failed\n", dev->name);
5602 goto out;
5603 }
5604
5605 dev->internal_log.nr_log = 0;
5606
5607out:
5608 mutex_unlock(&dev->internal_log_mutex);
5609 return ret;
5610}
5611
5612static int ssd_clear_log(struct ssd_device *dev)
5613{
5614 int ret;
5615
5616 ret = __ssd_clear_log(dev);
5617 if(!ret) {
5618 ssd_gen_swlog(dev, SSD_LOG_CLEAR_LOG, 0);
5619 }
5620
5621 return ret;
5622}
5623
5624static int ssd_do_log(struct ssd_device *dev, int ctrl_idx, void *buf)
5625{
5626 struct ssd_log_entry *le;
5627 struct ssd_log log;
5628 struct timeval tv;
5629 int nr_log = 0;
5630 int level;
5631 int ret = 0;
5632
5633 ret = ssd_read_log(dev, ctrl_idx, buf, &nr_log);
5634 if (ret) {
5635 return ret;
5636 }
5637
5638 do_gettimeofday(&tv);
5639
5640 log.time = tv.tv_sec;
5641 log.ctrl_idx = ctrl_idx;
5642
5643 le = (ssd_log_entry_t *)buf;
5644 while (nr_log > 0) {
5645 memcpy(&log.le, le, sizeof(struct ssd_log_entry));
5646
5647 level = ssd_parse_log(dev, &log, 1);
5648 if (level >= SSD_LOG_LEVEL) {
5649 ssd_save_log(dev, &log);
5650 }
5651
5652 /* set alarm */
5653 if (SSD_LOG_LEVEL_ERR == level) {
5654 ssd_set_alarm(dev);
5655 }
5656
5657 dev->smart.log_info.nr_log++;
5658 if (SSD_LOG_SEU_FAULT != le->event && SSD_LOG_SEU_FAULT1 != le->event) {
5659 dev->smart.log_info.stat[level]++;
5660 } else {
5661 /* SEU fault */
5662
5663 /* log to the volatile log info */
5664 dev->log_info.nr_log++;
5665 dev->log_info.stat[level]++;
5666
5667 /* do something */
5668 dev->reload_fw = 1;
5669 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
5670
5671 /*dev->readonly = 1;
5672 set_disk_ro(dev->gd, 1);
5673 hio_warn("%s: switched to read-only mode.\n", dev->name);*/
5674 }
5675
5676 /* handle event */
5677 ssd_handle_event(dev, le->event, level);
5678
5679 le++;
5680 nr_log--;
5681 }
5682
5683 return 0;
5684}
5685
5686#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5687static void ssd_log_worker(void *data)
5688{
5689 struct ssd_device *dev = (struct ssd_device *)data;
5690#else
5691static void ssd_log_worker(struct work_struct *work)
5692{
5693 struct ssd_device *dev = container_of(work, struct ssd_device, log_work);
5694#endif
5695 int i;
5696 int ret;
5697
5698 if (!test_bit(SSD_LOG_ERR, &dev->state) && test_bit(SSD_ONLINE, &dev->state)) {
5699 /* alloc log buf */
5700 if (!dev->log_buf) {
5701 dev->log_buf = kmalloc(dev->hw_info.log_sz, GFP_KERNEL);
5702 if (!dev->log_buf) {
5703 hio_warn("%s: ssd_log_worker: no mem\n", dev->name);
5704 return;
5705 }
5706 }
5707
5708 /* get log */
5709 if (test_and_clear_bit(SSD_LOG_HW, &dev->state)) {
5710 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5711 ret = ssd_do_log(dev, i, dev->log_buf);
5712 if (ret) {
5713 (void)test_and_set_bit(SSD_LOG_ERR, &dev->state);
5714 hio_warn("%s: do log fail\n", dev->name);
5715 }
5716 }
5717 }
5718 }
5719
5720 ret = ssd_do_swlog(dev);
5721 if (ret) {
5722 hio_warn("%s: do swlog fail\n", dev->name);
5723 }
5724}
5725
5726static void ssd_cleanup_log(struct ssd_device *dev)
5727{
5728 if (dev->log_buf) {
5729 kfree(dev->log_buf);
5730 dev->log_buf = NULL;
5731 }
5732
5733 sfifo_free(&dev->log_fifo);
5734
5735 if (dev->internal_log.log) {
5736 vfree(dev->internal_log.log);
5737 dev->internal_log.log = NULL;
5738 }
5739}
5740
5741static int ssd_init_log(struct ssd_device *dev)
5742{
5743 struct ssd_log *log;
5744 uint32_t off, size;
5745 uint32_t len = 0;
5746 int ret = 0;
5747
5748 mutex_init(&dev->internal_log_mutex);
5749
5750#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5751 INIT_WORK(&dev->log_work, ssd_log_worker, dev);
5752#else
5753 INIT_WORK(&dev->log_work, ssd_log_worker);
5754#endif
5755
5756 off = dev->rom_info.log_base;
5757 size = dev->rom_info.log_sz;
5758
5759 dev->internal_log.log = vmalloc(size);
5760 if (!dev->internal_log.log) {
5761 ret = -ENOMEM;
5762 goto out_alloc_log;
5763 }
5764
5765 ret = sfifo_alloc(&dev->log_fifo, SSD_LOG_FIFO_SZ, sizeof(struct ssd_log_entry));
5766 if (ret < 0) {
5767 goto out_alloc_log_fifo;
5768 }
5769
5770 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5771 return 0;
5772 }
5773
5774 log = (struct ssd_log *)dev->internal_log.log;
5775 while (len < size) {
5776 ret = ssd_spi_read(dev, log, off, sizeof(struct ssd_log));
5777 if (ret) {
5778 goto out_read_log;
5779 }
5780
5781 if (log->ctrl_idx == 0xff) {
5782 break;
5783 }
5784
5785 dev->internal_log.nr_log++;
5786 log++;
5787 len += sizeof(struct ssd_log);
5788 off += sizeof(struct ssd_log);
5789 }
5790
5791 return 0;
5792
5793out_read_log:
5794 sfifo_free(&dev->log_fifo);
5795out_alloc_log_fifo:
5796 vfree(dev->internal_log.log);
5797 dev->internal_log.log = NULL;
5798 dev->internal_log.nr_log = 0;
5799out_alloc_log:
5800 /* skip error if not in standard mode */
5801 if (mode != SSD_DRV_MODE_STANDARD) {
5802 ret = 0;
5803 }
5804 return ret;
5805}
5806
5807/* work queue */
5808static void ssd_stop_workq(struct ssd_device *dev)
5809{
5810 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
5811 flush_workqueue(dev->workq);
5812}
5813
5814static void ssd_start_workq(struct ssd_device *dev)
5815{
5816 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
5817
5818 /* log ? */
5819 queue_work(dev->workq, &dev->log_work);
5820}
5821
5822static void ssd_cleanup_workq(struct ssd_device *dev)
5823{
5824 flush_workqueue(dev->workq);
5825 destroy_workqueue(dev->workq);
5826 dev->workq = NULL;
5827}
5828
5829static int ssd_init_workq(struct ssd_device *dev)
5830{
5831 int ret = 0;
5832
5833 dev->workq = create_singlethread_workqueue(dev->name);
5834 if (!dev->workq) {
5835 ret = -ESRCH;
5836 goto out;
5837 }
5838
5839out:
5840 return ret;
5841}
5842
5843/* rom */
5844static int ssd_init_rom_info(struct ssd_device *dev)
5845{
5846 uint32_t val;
5847
5848 mutex_init(&dev->spi_mutex);
5849 mutex_init(&dev->i2c_mutex);
5850
5851 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5852 /* fix bug: read data to clear status */
5853 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
5854
5855 dev->rom_info.size = SSD_ROM_SIZE;
5856 dev->rom_info.block_size = SSD_ROM_BLK_SIZE;
5857 dev->rom_info.page_size = SSD_ROM_PAGE_SIZE;
5858
5859 dev->rom_info.bridge_fw_base = SSD_ROM_BRIDGE_FW_BASE;
5860 dev->rom_info.bridge_fw_sz = SSD_ROM_BRIDGE_FW_SIZE;
5861 dev->rom_info.nr_bridge_fw = SSD_ROM_NR_BRIDGE_FW;
5862
5863 dev->rom_info.ctrl_fw_base = SSD_ROM_CTRL_FW_BASE;
5864 dev->rom_info.ctrl_fw_sz = SSD_ROM_CTRL_FW_SIZE;
5865 dev->rom_info.nr_ctrl_fw = SSD_ROM_NR_CTRL_FW;
5866
5867 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5868
5869 dev->rom_info.vp_base = SSD_ROM_VP_BASE;
5870 dev->rom_info.label_base = SSD_ROM_LABEL_BASE;
5871 } else if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5872 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5873 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5874 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5875 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5876
5877 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5878 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5879 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5880 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5881
5882 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5883 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5884 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5885 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5886
5887 dev->rom_info.bm_fw_base = dev->rom_info.ctrl_fw_base + (dev->rom_info.nr_ctrl_fw * dev->rom_info.ctrl_fw_sz);
5888 dev->rom_info.bm_fw_sz = SSD_PV3_ROM_BM_FW_SZ;
5889 dev->rom_info.nr_bm_fw = SSD_PV3_ROM_NR_BM_FW;
5890
5891 dev->rom_info.log_base = dev->rom_info.bm_fw_base + (dev->rom_info.nr_bm_fw * dev->rom_info.bm_fw_sz);
5892 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5893
5894 dev->rom_info.smart_base = dev->rom_info.log_base + dev->rom_info.log_sz;
5895 dev->rom_info.smart_sz = SSD_PV3_ROM_SMART_SZ;
5896 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5897
5898 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5899 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5900 dev->rom_info.label_base = dev->rom_info.vp_base + dev->rom_info.block_size;
5901 if (dev->rom_info.label_base >= dev->rom_info.size) {
5902 dev->rom_info.label_base = dev->rom_info.vp_base - dev->rom_info.block_size;
5903 }
5904 } else {
5905 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5906 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5907 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5908 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5909
5910 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5911 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5912 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5913 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5914
5915 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5916 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5917 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5918 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5919
5920 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5921 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5922 dev->rom_info.label_base = dev->rom_info.vp_base - SSD_PV3_2_ROM_SEC_SZ;
5923
5924 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5925 dev->rom_info.smart_sz = SSD_PV3_2_ROM_SEC_SZ;
5926 dev->rom_info.smart_base = dev->rom_info.label_base - (dev->rom_info.smart_sz * dev->rom_info.nr_smart);
5927 if (dev->rom_info.smart_sz > dev->rom_info.block_size) {
5928 dev->rom_info.smart_sz = dev->rom_info.block_size;
5929 }
5930
5931 dev->rom_info.log_sz = SSD_PV3_2_ROM_LOG_SZ;
5932 dev->rom_info.log_base = dev->rom_info.smart_base - dev->rom_info.log_sz;
5933 }
5934
5935 return ssd_init_spi(dev);
5936}
5937
5938/* smart */
5939static int ssd_update_smart(struct ssd_device *dev, struct ssd_smart *smart)
5940{
5941 struct timeval tv;
5942 uint64_t run_time;
5943#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5944 struct hd_struct *part;
5945 int cpu;
5946#endif
5947 int i, j;
5948 int ret = 0;
5949
5950 if (!test_bit(SSD_INIT_BD, &dev->state)) {
5951 return 0;
5952 }
5953
5954 do_gettimeofday(&tv);
5955 if ((uint64_t)tv.tv_sec < dev->uptime) {
5956 run_time = 0;
5957 } else {
5958 run_time = tv.tv_sec - dev->uptime;
5959 }
5960
5961 /* avoid frequently update */
5962 if (run_time >= 60) {
5963 ret = 1;
5964 }
5965
5966 /* io stat */
5967 smart->io_stat.run_time += run_time;
5968
5969#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5970 cpu = part_stat_lock();
5971 part = &dev->gd->part0;
5972 part_round_stats(cpu, part);
5973 part_stat_unlock();
5974
5975 smart->io_stat.nr_read += part_stat_read(part, ios[READ]);
5976 smart->io_stat.nr_write += part_stat_read(part, ios[WRITE]);
5977 smart->io_stat.rsectors += part_stat_read(part, sectors[READ]);
5978 smart->io_stat.wsectors += part_stat_read(part, sectors[WRITE]);
5979#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
5980 preempt_disable();
5981 disk_round_stats(dev->gd);
5982 preempt_enable();
5983
5984 smart->io_stat.nr_read += disk_stat_read(dev->gd, ios[READ]);
5985 smart->io_stat.nr_write += disk_stat_read(dev->gd, ios[WRITE]);
5986 smart->io_stat.rsectors += disk_stat_read(dev->gd, sectors[READ]);
5987 smart->io_stat.wsectors += disk_stat_read(dev->gd, sectors[WRITE]);
5988#else
5989 preempt_disable();
5990 disk_round_stats(dev->gd);
5991 preempt_enable();
5992
5993 smart->io_stat.nr_read += disk_stat_read(dev->gd, reads);
5994 smart->io_stat.nr_write += disk_stat_read(dev->gd, writes);
5995 smart->io_stat.rsectors += disk_stat_read(dev->gd, read_sectors);
5996 smart->io_stat.wsectors += disk_stat_read(dev->gd, write_sectors);
5997#endif
5998
5999 smart->io_stat.nr_to += atomic_read(&dev->tocnt);
6000
6001 for (i=0; i<dev->nr_queue; i++) {
6002 smart->io_stat.nr_rwerr += dev->queue[i].io_stat.nr_rwerr;
6003 smart->io_stat.nr_ioerr += dev->queue[i].io_stat.nr_ioerr;
6004 }
6005
6006 for (i=0; i<dev->nr_queue; i++) {
6007 for (j=0; j<SSD_ECC_MAX_FLIP; j++) {
6008 smart->ecc_info.bitflip[j] += dev->queue[i].ecc_info.bitflip[j];
6009 }
6010 }
6011
6012 //dev->uptime = tv.tv_sec;
6013
6014 return ret;
6015}
6016
6017static int ssd_clear_smart(struct ssd_device *dev)
6018{
6019 struct timeval tv;
6020 uint64_t sversion;
6021 uint32_t off, length;
6022 int i;
6023 int ret;
6024
6025 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6026 return 0;
6027 }
6028
6029 /* clear smart */
6030 off = dev->rom_info.smart_base;
6031 length = dev->rom_info.smart_sz * dev->rom_info.nr_smart;
6032
6033 ret = ssd_spi_erase(dev, off, length);
6034 if (ret) {
6035 hio_warn("%s: info erase: failed\n", dev->name);
6036 goto out;
6037 }
6038
6039 sversion = dev->smart.version;
6040
6041 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6042 dev->smart.version = sversion + 1;
6043 dev->smart.magic = SSD_SMART_MAGIC;
6044
6045 /* clear all tmp acc */
6046 for (i=0; i<dev->nr_queue; i++) {
6047 memset(&(dev->queue[i].io_stat), 0, sizeof(struct ssd_io_stat));
6048 memset(&(dev->queue[i].ecc_info), 0, sizeof(struct ssd_ecc_info));
6049 }
6050
6051 atomic_set(&dev->tocnt, 0);
6052
6053 /* clear tmp log info */
6054 memset(&dev->log_info, 0, sizeof(struct ssd_log_info));
6055
6056 do_gettimeofday(&tv);
6057 dev->uptime = tv.tv_sec;
6058
6059 /* clear alarm ? */
6060 //ssd_clear_alarm(dev);
6061out:
6062 return ret;
6063}
6064
6065static int ssd_save_smart(struct ssd_device *dev)
6066{
6067 uint32_t off, size;
6068 int i;
6069 int ret = 0;
6070
6071 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
6072 return 0;
6073
6074 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6075 return 0;
6076 }
6077
6078 if (!ssd_update_smart(dev, &dev->smart)) {
6079 return 0;
6080 }
6081
6082 dev->smart.version++;
6083
6084 for (i=0; i<dev->rom_info.nr_smart; i++) {
6085 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6086 size = dev->rom_info.smart_sz;
6087
6088 ret = ssd_spi_erase(dev, off, size);
6089 if (ret) {
6090 hio_warn("%s: info erase failed\n", dev->name);
6091 goto out;
6092 }
6093
6094 size = sizeof(struct ssd_smart);
6095
6096 ret = ssd_spi_write(dev, &dev->smart, off, size);
6097 if (ret) {
6098 hio_warn("%s: info write failed\n", dev->name);
6099 goto out;
6100 }
6101
6102 //xx
6103 }
6104
6105out:
6106 return ret;
6107}
6108
6109static int ssd_init_smart(struct ssd_device *dev)
6110{
6111 struct ssd_smart *smart;
6112 struct timeval tv;
6113 uint32_t off, size;
6114 int i;
6115 int ret = 0;
6116
6117 do_gettimeofday(&tv);
6118 dev->uptime = tv.tv_sec;
6119
6120 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6121 return 0;
6122 }
6123
6124 smart = kmalloc(sizeof(struct ssd_smart) * SSD_ROM_NR_SMART_MAX, GFP_KERNEL);
6125 if (!smart) {
6126 ret = -ENOMEM;
6127 goto out_nomem;
6128 }
6129
6130 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6131
6132 /* read smart */
6133 for (i=0; i<dev->rom_info.nr_smart; i++) {
6134 memset(&smart[i], 0, sizeof(struct ssd_smart));
6135
6136 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6137 size = sizeof(struct ssd_smart);
6138
6139 ret = ssd_spi_read(dev, &smart[i], off, size);
6140 if (ret) {
6141 hio_warn("%s: info read failed\n", dev->name);
6142 goto out;
6143 }
6144
6145 if (smart[i].magic != SSD_SMART_MAGIC) {
6146 smart[i].magic = 0;
6147 smart[i].version = 0;
6148 continue;
6149 }
6150
6151 if (smart[i].version > dev->smart.version) {
6152 memcpy(&dev->smart, &smart[i], sizeof(struct ssd_smart));
6153 }
6154 }
6155
6156 if (dev->smart.magic != SSD_SMART_MAGIC) {
6157 /* first time power up */
6158 dev->smart.magic = SSD_SMART_MAGIC;
6159 dev->smart.version = 1;
6160 }
6161
6162 /* check log info */
6163 {
6164 struct ssd_log_info log_info;
6165 struct ssd_log *log = (struct ssd_log *)dev->internal_log.log;
6166
6167 memset(&log_info, 0, sizeof(struct ssd_log_info));
6168
6169 while (log_info.nr_log < dev->internal_log.nr_log) {
6170 /* skip the volatile log info */
6171 if (SSD_LOG_SEU_FAULT != log->le.event && SSD_LOG_SEU_FAULT1 != log->le.event) {
6172 log_info.stat[ssd_parse_log(dev, log, 0)]++;
6173 }
6174
6175 log_info.nr_log++;
6176 log++;
6177 }
6178
6179 /* check */
6180 for (i=(SSD_LOG_NR_LEVEL-1); i>=0; i--) {
6181 if (log_info.stat[i] > dev->smart.log_info.stat[i]) {
6182 /* unclean */
6183 memcpy(&dev->smart.log_info, &log_info, sizeof(struct ssd_log_info));
6184 dev->smart.version++;
6185 break;
6186 }
6187 }
6188 }
6189
6190 for (i=0; i<dev->rom_info.nr_smart; i++) {
6191 if (smart[i].magic == SSD_SMART_MAGIC && smart[i].version == dev->smart.version) {
6192 continue;
6193 }
6194
6195 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6196 size = dev->rom_info.smart_sz;
6197
6198 ret = ssd_spi_erase(dev, off, size);
6199 if (ret) {
6200 hio_warn("%s: info erase failed\n", dev->name);
6201 goto out;
6202 }
6203
6204 size = sizeof(struct ssd_smart);
6205 ret = ssd_spi_write(dev, &dev->smart, off, size);
6206 if (ret) {
6207 hio_warn("%s: info write failed\n", dev->name);
6208 goto out;
6209 }
6210
6211 //xx
6212 }
6213
6214 /* sync smart with alarm led */
6215 if (dev->smart.io_stat.nr_to || dev->smart.io_stat.nr_rwerr || dev->smart.log_info.stat[SSD_LOG_LEVEL_ERR]) {
6216 hio_warn("%s: some fault found in the history info\n", dev->name);
6217 ssd_set_alarm(dev);
6218 }
6219
6220out:
6221 kfree(smart);
6222out_nomem:
6223 /* skip error if not in standard mode */
6224 if (mode != SSD_DRV_MODE_STANDARD) {
6225 ret = 0;
6226 }
6227 return ret;
6228}
6229
6230/* bm */
6231static int __ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6232{
6233 struct ssd_bm_manufacturer_data bm_md = {0};
6234 uint16_t sc_id = SSD_BM_SYSTEM_DATA_SUBCLASS_ID;
6235 uint8_t cmd;
6236 int ret = 0;
6237
6238 if (!dev || !ver) {
6239 return -EINVAL;
6240 }
6241
6242 mutex_lock(&dev->bm_mutex);
6243
6244 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6245 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6246 if (ret) {
6247 goto out;
6248 }
6249
6250 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6251 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_manufacturer_data), (uint8_t *)&bm_md);
6252 if (ret) {
6253 goto out;
6254 }
6255
6256 if (bm_md.firmware_ver & 0xF000) {
6257 ret = -EIO;
6258 goto out;
6259 }
6260
6261 *ver = bm_md.firmware_ver;
6262
6263out:
6264 mutex_unlock(&dev->bm_mutex);
6265 return ret;
6266}
6267
6268static int ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6269{
6270 uint16_t tmp = 0;
6271 int i = SSD_BM_RETRY_MAX;
6272 int ret = 0;
6273
6274 while (i-- > 0) {
6275 ret = __ssd_bm_get_version(dev, &tmp);
6276 if (!ret) {
6277 break;
6278 }
6279 }
6280 if (ret) {
6281 return ret;
6282 }
6283
6284 *ver = tmp;
6285
6286 return 0;
6287}
6288
6289static int __ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6290{
6291 struct ssd_bm_configuration_registers bm_cr;
6292 uint16_t sc_id = SSD_BM_CONFIGURATION_REGISTERS_ID;
6293 uint8_t cmd;
6294 int ret;
6295
6296 mutex_lock(&dev->bm_mutex);
6297
6298 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6299 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6300 if (ret) {
6301 goto out;
6302 }
6303
6304 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6305 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_configuration_registers), (uint8_t *)&bm_cr);
6306 if (ret) {
6307 goto out;
6308 }
6309
6310 if (bm_cr.operation_cfg.cc == 0 || bm_cr.operation_cfg.cc > 4) {
6311 ret = -EIO;
6312 goto out;
6313 }
6314
6315 *nr_cap = bm_cr.operation_cfg.cc + 1;
6316
6317out:
6318 mutex_unlock(&dev->bm_mutex);
6319 return ret;
6320}
6321
6322static int ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6323{
6324 int tmp = 0;
6325 int i = SSD_BM_RETRY_MAX;
6326 int ret = 0;
6327
6328 while (i-- > 0) {
6329 ret = __ssd_bm_nr_cap(dev, &tmp);
6330 if (!ret) {
6331 break;
6332 }
6333 }
6334 if (ret) {
6335 return ret;
6336 }
6337
6338 *nr_cap = tmp;
6339
6340 return 0;
6341}
6342
6343static int ssd_bm_enter_cap_learning(struct ssd_device *dev)
6344{
6345 uint16_t buf = SSD_BM_ENTER_CAP_LEARNING;
6346 uint8_t cmd = SSD_BM_MANUFACTURERACCESS;
6347 int ret;
6348
6349 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&buf);
6350 if (ret) {
6351 goto out;
6352 }
6353
6354out:
6355 return ret;
6356}
6357
6358static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status)
6359{
6360 uint16_t val = 0;
6361 uint8_t cmd = SSD_BM_SAFETYSTATUS;
6362 int ret;
6363
6364 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6365 if (ret) {
6366 goto out;
6367 }
6368
6369 *status = val;
6370out:
6371 return ret;
6372}
6373
6374static int ssd_bm_get_opstatus(struct ssd_device *dev, uint16_t *status)
6375{
6376 uint16_t val = 0;
6377 uint8_t cmd = SSD_BM_OPERATIONSTATUS;
6378 int ret;
6379
6380 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6381 if (ret) {
6382 goto out;
6383 }
6384
6385 *status = val;
6386out:
6387 return ret;
6388}
6389
6390static int ssd_get_bmstruct(struct ssd_device *dev, struct ssd_bm *bm_status_out)
6391{
6392 struct sbs_cmd *bm_sbs = ssd_bm_sbs;
6393 struct ssd_bm bm_status;
6394 uint8_t buf[2] = {0, };
6395 uint16_t val = 0;
6396 uint16_t cval;
6397 int ret = 0;
6398
6399 memset(&bm_status, 0, sizeof(struct ssd_bm));
6400
6401 while (bm_sbs->desc != NULL) {
6402 switch (bm_sbs->size) {
6403 case SBS_SIZE_BYTE:
6404 ret = ssd_smbus_read_byte(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, buf);
6405 if (ret) {
6406 //printf("Error: smbus read byte %#x\n", bm_sbs->cmd);
6407 goto out;
6408 }
6409 val = buf[0];
6410 break;
6411 case SBS_SIZE_WORD:
6412 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, (uint8_t *)&val);
6413 if (ret) {
6414 //printf("Error: smbus read word %#x\n", bm_sbs->cmd);
6415 goto out;
6416 }
6417 //val = *(uint16_t *)buf;
6418 break;
6419 default:
6420 ret = -1;
6421 goto out;
6422 break;
6423 }
6424
6425 switch (bm_sbs->unit) {
6426 case SBS_UNIT_VALUE:
6427 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val & bm_sbs->mask;
6428 break;
6429 case SBS_UNIT_TEMPERATURE:
6430 cval = (uint16_t)(val - 2731) / 10;
6431 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = cval;
6432 break;
6433 case SBS_UNIT_VOLTAGE:
6434 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6435 break;
6436 case SBS_UNIT_CURRENT:
6437 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6438 break;
6439 case SBS_UNIT_ESR:
6440 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6441 break;
6442 case SBS_UNIT_PERCENT:
6443 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6444 break;
6445 case SBS_UNIT_CAPACITANCE:
6446 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6447 break;
6448 default:
6449 ret = -1;
6450 goto out;
6451 break;
6452 }
6453
6454 bm_sbs++;
6455 }
6456
6457 memcpy(bm_status_out, &bm_status, sizeof(struct ssd_bm));
6458
6459out:
6460 return ret;
6461}
6462
6463static int __ssd_bm_status(struct ssd_device *dev, int *status)
6464{
6465 struct ssd_bm bm_status = {0};
6466 int nr_cap = 0;
6467 int i;
6468 int ret = 0;
6469
6470 ret = ssd_get_bmstruct(dev, &bm_status);
6471 if (ret) {
6472 goto out;
6473 }
6474
6475 /* capacitor voltage */
6476 ret = ssd_bm_nr_cap(dev, &nr_cap);
6477 if (ret) {
6478 goto out;
6479 }
6480
6481 for (i=0; i<nr_cap; i++) {
6482 if (bm_status.cap_volt[i] < SSD_BM_CAP_VOLT_MIN) {
6483 *status = SSD_BMSTATUS_WARNING;
6484 goto out;
6485 }
6486 }
6487
6488 /* Safety Status */
6489 if (bm_status.sf_status) {
6490 *status = SSD_BMSTATUS_WARNING;
6491 goto out;
6492 }
6493
6494 /* charge status */
6495 if (!((bm_status.op_status >> 12) & 0x1)) {
6496 *status = SSD_BMSTATUS_CHARGING;
6497 }else{
6498 *status = SSD_BMSTATUS_OK;
6499 }
6500
6501out:
6502 return ret;
6503}
6504
6505static void ssd_set_flush_timeout(struct ssd_device *dev, int mode);
6506
6507#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
6508static void ssd_bm_worker(void *data)
6509{
6510 struct ssd_device *dev = (struct ssd_device *)data;
6511#else
6512static void ssd_bm_worker(struct work_struct *work)
6513{
6514 struct ssd_device *dev = container_of(work, struct ssd_device, bm_work);
6515#endif
6516
6517 uint16_t opstatus;
6518 int ret = 0;
6519
6520 if (mode != SSD_DRV_MODE_STANDARD) {
6521 return;
6522 }
6523
6524 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
6525 return;
6526 }
6527
6528 if (dev->hw_info_ext.plp_type != SSD_PLP_SCAP) {
6529 return;
6530 }
6531
6532 ret = ssd_bm_get_opstatus(dev, &opstatus);
6533 if (ret) {
6534 hio_warn("%s: get bm operationstatus failed\n", dev->name);
6535 return;
6536 }
6537
6538 /* need cap learning ? */
6539 if (!(opstatus & 0xF0)) {
6540 ret = ssd_bm_enter_cap_learning(dev);
6541 if (ret) {
6542 hio_warn("%s: enter capacitance learning failed\n", dev->name);
6543 return;
6544 }
6545 }
6546}
6547
6548static void ssd_bm_routine_start(void *data)
6549{
6550 struct ssd_device *dev;
6551
6552 if (!data) {
6553 return;
6554 }
6555 dev = data;
6556
6557 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
6558 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6559 queue_work(dev->workq, &dev->bm_work);
6560 } else {
6561 queue_work(dev->workq, &dev->capmon_work);
6562 }
6563 }
6564}
6565
6566/* CAP */
6567static int ssd_do_cap_learn(struct ssd_device *dev, uint32_t *cap)
6568{
6569 uint32_t u1, u2, t;
6570 uint16_t val = 0;
6571 int wait = 0;
6572 int ret = 0;
6573
6574 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6575 *cap = 0;
6576 return 0;
6577 }
6578
6579 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6580 *cap = 0;
6581 return 0;
6582 }
6583
6584 /* make sure the lm80 voltage value is updated */
6585 msleep(SSD_LM80_CONV_INTERVAL);
6586
6587 /* check if full charged */
6588 wait = 0;
6589 for (;;) {
6590 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6591 if (ret) {
6592 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6593 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6594 }
6595 goto out;
6596 }
6597 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6598 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_FULL) {
6599 break;
6600 }
6601
6602 wait++;
6603 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6604 ret = -ETIMEDOUT;
6605 goto out;
6606 }
6607 msleep(SSD_PL_CAP_CHARGE_WAIT);
6608 }
6609
6610 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U2, (uint8_t *)&val);
6611 if (ret) {
6612 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6613 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6614 }
6615 goto out;
6616 }
6617 u2 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6618
6619 if (u1 == u2) {
6620 ret = -EINVAL;
6621 goto out;
6622 }
6623
6624 /* enter cap learn */
6625 ssd_reg32_write(dev->ctrlp + SSD_PL_CAP_LEARN_REG, 0x1);
6626
6627 wait = 0;
6628 for (;;) {
6629 msleep(SSD_PL_CAP_LEARN_WAIT);
6630
6631 t = ssd_reg32_read(dev->ctrlp + SSD_PL_CAP_LEARN_REG);
6632 if (!((t >> 1) & 0x1)) {
6633 break;
6634 }
6635
6636 wait++;
6637 if (wait > SSD_PL_CAP_LEARN_MAX_WAIT) {
6638 ret = -ETIMEDOUT;
6639 goto out;
6640 }
6641 }
6642
6643 if ((t >> 4) & 0x1) {
6644 ret = -ETIMEDOUT;
6645 goto out;
6646 }
6647
6648 t = (t >> 8);
6649 if (0 == t) {
6650 ret = -EINVAL;
6651 goto out;
6652 }
6653
6654 *cap = SSD_PL_CAP_LEARN(u1, u2, t);
6655
6656out:
6657 return ret;
6658}
6659
6660static int ssd_cap_learn(struct ssd_device *dev, uint32_t *cap)
6661{
6662 int ret = 0;
6663
6664 if (!dev || !cap) {
6665 return -EINVAL;
6666 }
6667
6668 mutex_lock(&dev->bm_mutex);
6669
6670 ssd_stop_workq(dev);
6671
6672 ret = ssd_do_cap_learn(dev, cap);
6673 if (ret) {
6674 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
6675 goto out;
6676 }
6677
6678 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, *cap);
6679
6680out:
6681 ssd_start_workq(dev);
6682 mutex_unlock(&dev->bm_mutex);
6683
6684 return ret;
6685}
6686
6687static int ssd_check_pl_cap(struct ssd_device *dev)
6688{
6689 uint32_t u1;
6690 uint16_t val = 0;
6691 uint8_t low = 0;
6692 int wait = 0;
6693 int ret = 0;
6694
6695 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6696 return 0;
6697 }
6698
6699 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6700 return 0;
6701 }
6702
6703 /* cap ready ? */
6704 wait = 0;
6705 for (;;) {
6706 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6707 if (ret) {
6708 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6709 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6710 }
6711 goto out;
6712 }
6713 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6714 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_READY) {
6715 break;
6716 }
6717
6718 wait++;
6719 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6720 ret = -ETIMEDOUT;
6721 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(u1));
6722 goto out;
6723 }
6724 msleep(SSD_PL_CAP_CHARGE_WAIT);
6725 }
6726
6727 low = ssd_lm80_limit[SSD_LM80_IN_CAP].low;
6728 ret = ssd_smbus_write_byte(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_REG_IN_MIN(SSD_LM80_IN_CAP), &low);
6729 if (ret) {
6730 goto out;
6731 }
6732
6733 /* enable cap INx */
6734 ret = ssd_lm80_enable_in(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_IN_CAP);
6735 if (ret) {
6736 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6737 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6738 }
6739 goto out;
6740 }
6741
6742out:
6743 /* skip error if not in standard mode */
6744 if (mode != SSD_DRV_MODE_STANDARD) {
6745 ret = 0;
6746 }
6747 return ret;
6748}
6749
6750static int ssd_check_pl_cap_fast(struct ssd_device *dev)
6751{
6752 uint32_t u1;
6753 uint16_t val = 0;
6754 int ret = 0;
6755
6756 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6757 return 0;
6758 }
6759
6760 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6761 return 0;
6762 }
6763
6764 /* cap ready ? */
6765 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6766 if (ret) {
6767 goto out;
6768 }
6769 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6770 if (SSD_PL_CAP_VOLT(u1) < SSD_PL_CAP_VOLT_READY) {
6771 ret = 1;
6772 }
6773
6774out:
6775 return ret;
6776}
6777
6778static int ssd_init_pl_cap(struct ssd_device *dev)
6779{
6780 int ret = 0;
6781
6782 /* set here: user write mode */
6783 dev->user_wmode = wmode;
6784
6785 mutex_init(&dev->bm_mutex);
6786
6787 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6788 uint32_t val;
6789 val = ssd_reg32_read(dev->ctrlp + SSD_BM_FAULT_REG);
6790 if ((val >> 1) & 0x1) {
6791 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6792 }
6793 } else {
6794 ret = ssd_check_pl_cap(dev);
6795 if (ret) {
6796 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6797 }
6798 }
6799
6800 return 0;
6801}
6802
6803/* label */
6804static void __end_str(char *str, int len)
6805{
6806 int i;
6807
6808 for(i=0; i<len; i++) {
6809 if (*(str+i) == '\0')
6810 return;
6811 }
6812 *str = '\0';
6813}
6814
6815static int ssd_init_label(struct ssd_device *dev)
6816{
6817 uint32_t off;
6818 uint32_t size;
6819 int ret;
6820
6821 /* label location */
6822 off = dev->rom_info.label_base;
6823
6824 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6825 size = sizeof(struct ssd_label);
6826
6827 /* read label */
6828 ret = ssd_spi_read(dev, &dev->label, off, size);
6829 if (ret) {
6830 memset(&dev->label, 0, size);
6831 goto out;
6832 }
6833
6834 __end_str(dev->label.date, SSD_LABEL_FIELD_SZ);
6835 __end_str(dev->label.sn, SSD_LABEL_FIELD_SZ);
6836 __end_str(dev->label.part, SSD_LABEL_FIELD_SZ);
6837 __end_str(dev->label.desc, SSD_LABEL_FIELD_SZ);
6838 __end_str(dev->label.other, SSD_LABEL_FIELD_SZ);
6839 __end_str(dev->label.maf, SSD_LABEL_FIELD_SZ);
6840 } else {
6841 size = sizeof(struct ssd_labelv3);
6842
6843 /* read label */
6844 ret = ssd_spi_read(dev, &dev->labelv3, off, size);
6845 if (ret) {
6846 memset(&dev->labelv3, 0, size);
6847 goto out;
6848 }
6849
6850 __end_str(dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6851 __end_str(dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6852 __end_str(dev->labelv3.item, SSD_LABEL_FIELD_SZ);
6853 __end_str(dev->labelv3.description, SSD_LABEL_DESC_SZ);
6854 __end_str(dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6855 __end_str(dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6856 __end_str(dev->labelv3.issuenumber, SSD_LABEL_FIELD_SZ);
6857 __end_str(dev->labelv3.cleicode, SSD_LABEL_FIELD_SZ);
6858 __end_str(dev->labelv3.bom, SSD_LABEL_FIELD_SZ);
6859 }
6860
6861out:
6862 /* skip error if not in standard mode */
6863 if (mode != SSD_DRV_MODE_STANDARD) {
6864 ret = 0;
6865 }
6866 return ret;
6867}
6868
6869int ssd_get_label(struct block_device *bdev, struct ssd_label *label)
6870{
6871 struct ssd_device *dev;
6872
6873 if (!bdev || !label || !(bdev->bd_disk)) {
6874 return -EINVAL;
6875 }
6876
6877 dev = bdev->bd_disk->private_data;
6878
6879 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
6880 memset(label, 0, sizeof(struct ssd_label));
6881 memcpy(label->date, dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6882 memcpy(label->sn, dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6883 memcpy(label->desc, dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6884 memcpy(label->maf, dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6885 } else {
6886 memcpy(label, &dev->label, sizeof(struct ssd_label));
6887 }
6888
6889 return 0;
6890}
6891
6892static int __ssd_get_version(struct ssd_device *dev, struct ssd_version_info *ver)
6893{
6894 uint16_t bm_ver = 0;
6895 int ret = 0;
6896
6897 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6898 ret = ssd_bm_get_version(dev, &bm_ver);
6899 if(ret){
6900 goto out;
6901 }
6902 }
6903
6904 ver->bridge_ver = dev->hw_info.bridge_ver;
6905 ver->ctrl_ver = dev->hw_info.ctrl_ver;
6906 ver->bm_ver = bm_ver;
6907 ver->pcb_ver = dev->hw_info.pcb_ver;
6908 ver->upper_pcb_ver = dev->hw_info.upper_pcb_ver;
6909
6910out:
6911 return ret;
6912
6913}
6914
6915int ssd_get_version(struct block_device *bdev, struct ssd_version_info *ver)
6916{
6917 struct ssd_device *dev;
6918 int ret;
6919
6920 if (!bdev || !ver || !(bdev->bd_disk)) {
6921 return -EINVAL;
6922 }
6923
6924 dev = bdev->bd_disk->private_data;
6925
6926 mutex_lock(&dev->fw_mutex);
6927 ret = __ssd_get_version(dev, ver);
6928 mutex_unlock(&dev->fw_mutex);
6929
6930 return ret;
6931}
6932
6933static int __ssd_get_temperature(struct ssd_device *dev, int *temp)
6934{
6935 uint64_t val;
6936 uint32_t off;
6937 int max = -300;
6938 int cur;
6939 int i;
6940
6941 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6942 *temp = 0;
6943 return 0;
6944 }
6945
6946 if (finject) {
6947 if (dev->db_info.type == SSD_DEBUG_LOG &&
6948 (dev->db_info.data.log.event == SSD_LOG_OVER_TEMP ||
6949 dev->db_info.data.log.event == SSD_LOG_NORMAL_TEMP ||
6950 dev->db_info.data.log.event == SSD_LOG_WARN_TEMP)) {
6951 *temp = (int)dev->db_info.data.log.extra;
6952 return 0;
6953 }
6954 }
6955
6956 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
6957 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
6958
6959 val = ssd_reg_read(dev->ctrlp + off);
6960 if (val == 0xffffffffffffffffull) {
6961 continue;
6962 }
6963
6964 cur = (int)CUR_TEMP(val);
6965 if (cur >= max) {
6966 max = cur;
6967 }
6968 }
6969
6970 *temp = max;
6971
6972 return 0;
6973}
6974
6975int ssd_get_temperature(struct block_device *bdev, int *temp)
6976{
6977 struct ssd_device *dev;
6978 int ret;
6979
6980 if (!bdev || !temp || !(bdev->bd_disk)) {
6981 return -EINVAL;
6982 }
6983
6984 dev = bdev->bd_disk->private_data;
6985
6986
6987 mutex_lock(&dev->fw_mutex);
6988 ret = __ssd_get_temperature(dev, temp);
6989 mutex_unlock(&dev->fw_mutex);
6990
6991 return ret;
6992}
6993
6994int ssd_set_otprotect(struct block_device *bdev, int otprotect)
6995 {
6996 struct ssd_device *dev;
6997
6998 if (!bdev || !(bdev->bd_disk)) {
6999 return -EINVAL;
7000 }
7001
7002 dev = bdev->bd_disk->private_data;
7003 ssd_set_ot_protect(dev, !!otprotect);
7004
7005 return 0;
7006 }
7007
7008int ssd_bm_status(struct block_device *bdev, int *status)
7009{
7010 struct ssd_device *dev;
7011 int ret = 0;
7012
7013 if (!bdev || !status || !(bdev->bd_disk)) {
7014 return -EINVAL;
7015 }
7016
7017 dev = bdev->bd_disk->private_data;
7018
7019 mutex_lock(&dev->fw_mutex);
7020 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7021 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7022 *status = SSD_BMSTATUS_WARNING;
7023 } else {
7024 *status = SSD_BMSTATUS_OK;
7025 }
7026 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7027 ret = __ssd_bm_status(dev, status);
7028 } else {
7029 *status = SSD_BMSTATUS_OK;
7030 }
7031 mutex_unlock(&dev->fw_mutex);
7032
7033 return ret;
7034}
7035
7036int ssd_get_pciaddr(struct block_device *bdev, struct pci_addr *paddr)
7037{
7038 struct ssd_device *dev;
7039
7040 if (!bdev || !paddr || !bdev->bd_disk) {
7041 return -EINVAL;
7042 }
7043
7044 dev = bdev->bd_disk->private_data;
7045
7046 paddr->domain = pci_domain_nr(dev->pdev->bus);
7047 paddr->bus = dev->pdev->bus->number;
7048 paddr->slot = PCI_SLOT(dev->pdev->devfn);
7049 paddr->func= PCI_FUNC(dev->pdev->devfn);
7050
7051 return 0;
7052}
7053
7054/* acc */
7055static int ssd_bb_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7056{
7057 uint32_t val;
7058 int ctrl, chip;
7059
7060 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7061 return -EOPNOTSUPP;
7062 }
7063
7064 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L1_REG);
7065 if (0xffffffffull == acc->threshold_l1) {
7066 return -EIO;
7067 }
7068 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L2_REG);
7069 if (0xffffffffull == acc->threshold_l2) {
7070 return -EIO;
7071 }
7072 acc->val = 0;
7073
7074 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7075 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7076 val = ssd_reg32_read(dev->ctrlp + SSD_BB_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_BB_ACC_REG_SZ * chip));
7077 if (0xffffffffull == acc->val) {
7078 return -EIO;
7079 }
7080 if (val > acc->val) {
7081 acc->val = val;
7082 }
7083 }
7084 }
7085
7086 return 0;
7087}
7088
7089static int ssd_ec_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7090{
7091 uint32_t val;
7092 int ctrl, chip;
7093
7094 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7095 return -EOPNOTSUPP;
7096 }
7097
7098 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L1_REG);
7099 if (0xffffffffull == acc->threshold_l1) {
7100 return -EIO;
7101 }
7102 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L2_REG);
7103 if (0xffffffffull == acc->threshold_l2) {
7104 return -EIO;
7105 }
7106 acc->val = 0;
7107
7108 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7109 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7110 val = ssd_reg32_read(dev->ctrlp + SSD_EC_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_EC_ACC_REG_SZ * chip));
7111 if (0xffffffffull == acc->val) {
7112 return -EIO;
7113 }
7114
7115 if (val > acc->val) {
7116 acc->val = val;
7117 }
7118 }
7119 }
7120
7121 return 0;
7122}
7123
7124
7125/* ram r&w */
7126static int ssd_ram_read_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7127{
7128 struct ssd_ram_op_msg *msg;
7129 dma_addr_t buf_dma;
7130 size_t len = length;
7131 loff_t ofs_w = ofs;
7132 int ret = 0;
7133
7134 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7135 || !length || length > dev->hw_info.ram_max_len
7136 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7137 return -EINVAL;
7138 }
7139
7140 len /= dev->hw_info.ram_align;
7141 do_div(ofs_w, dev->hw_info.ram_align);
7142
7143 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7144#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7145 ret = dma_mapping_error(buf_dma);
7146#else
7147 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7148#endif
7149 if (ret) {
7150 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7151 goto out_dma_mapping;
7152 }
7153
7154 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7155
7156 msg->fun = SSD_FUNC_RAM_READ;
7157 msg->ctrl_idx = ctrl_idx;
7158 msg->start = (uint32_t)ofs_w;
7159 msg->length = len;
7160 msg->buf = buf_dma;
7161
7162 ret = ssd_do_request(dev, READ, msg, NULL);
7163 ssd_put_dmsg(msg);
7164
7165 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7166
7167out_dma_mapping:
7168 return ret;
7169}
7170
7171static int ssd_ram_write_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7172{
7173 struct ssd_ram_op_msg *msg;
7174 dma_addr_t buf_dma;
7175 size_t len = length;
7176 loff_t ofs_w = ofs;
7177 int ret = 0;
7178
7179 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7180 || !length || length > dev->hw_info.ram_max_len
7181 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7182 return -EINVAL;
7183 }
7184
7185 len /= dev->hw_info.ram_align;
7186 do_div(ofs_w, dev->hw_info.ram_align);
7187
7188 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7189#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7190 ret = dma_mapping_error(buf_dma);
7191#else
7192 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7193#endif
7194 if (ret) {
7195 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7196 goto out_dma_mapping;
7197 }
7198
7199 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7200
7201 msg->fun = SSD_FUNC_RAM_WRITE;
7202 msg->ctrl_idx = ctrl_idx;
7203 msg->start = (uint32_t)ofs_w;
7204 msg->length = len;
7205 msg->buf = buf_dma;
7206
7207 ret = ssd_do_request(dev, WRITE, msg, NULL);
7208 ssd_put_dmsg(msg);
7209
7210 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7211
7212out_dma_mapping:
7213 return ret;
7214
7215}
7216
7217static int ssd_ram_read(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7218{
7219 int left = length;
7220 size_t len;
7221 loff_t off = ofs;
7222 int ret = 0;
7223
7224 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7225 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7226 return -EINVAL;
7227 }
7228
7229 while (left > 0) {
7230 len = dev->hw_info.ram_max_len;
7231 if (left < (int)dev->hw_info.ram_max_len) {
7232 len = left;
7233 }
7234
7235 ret = ssd_ram_read_4k(dev, buf, len, off, ctrl_idx);
7236 if (ret) {
7237 break;
7238 }
7239
7240 left -= len;
7241 off += len;
7242 buf += len;
7243 }
7244
7245 return ret;
7246}
7247
7248static int ssd_ram_write(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7249{
7250 int left = length;
7251 size_t len;
7252 loff_t off = ofs;
7253 int ret = 0;
7254
7255 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7256 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7257 return -EINVAL;
7258 }
7259
7260 while (left > 0) {
7261 len = dev->hw_info.ram_max_len;
7262 if (left < (int)dev->hw_info.ram_max_len) {
7263 len = left;
7264 }
7265
7266 ret = ssd_ram_write_4k(dev, buf, len, off, ctrl_idx);
7267 if (ret) {
7268 break;
7269 }
7270
7271 left -= len;
7272 off += len;
7273 buf += len;
7274 }
7275
7276 return ret;
7277}
7278
7279
7280/* flash op */
7281static int ssd_check_flash(struct ssd_device *dev, int flash, int page, int ctrl_idx)
7282{
7283 int cur_ch = flash % dev->hw_info.max_ch;
7284 int cur_chip = flash /dev->hw_info.max_ch;
7285
7286 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
7287 return -EINVAL;
7288 }
7289
7290 if (cur_ch >= dev->hw_info.nr_ch || cur_chip >= dev->hw_info.nr_chip) {
7291 return -EINVAL;
7292 }
7293
7294 if (page >= (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7295 return -EINVAL;
7296 }
7297 return 0;
7298}
7299
7300static int ssd_nand_read_id(struct ssd_device *dev, void *id, int flash, int chip, int ctrl_idx)
7301{
7302 struct ssd_nand_op_msg *msg;
7303 dma_addr_t buf_dma;
7304 int ret = 0;
7305
7306 if (unlikely(!id))
7307 return -EINVAL;
7308
7309 buf_dma = pci_map_single(dev->pdev, id, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7310#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7311 ret = dma_mapping_error(buf_dma);
7312#else
7313 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7314#endif
7315 if (ret) {
7316 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7317 goto out_dma_mapping;
7318 }
7319
7320 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7321 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7322 chip = 0;
7323 }
7324
7325 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7326
7327 msg->fun = SSD_FUNC_NAND_READ_ID;
7328 msg->chip_no = flash;
7329 msg->chip_ce = chip;
7330 msg->ctrl_idx = ctrl_idx;
7331 msg->buf = buf_dma;
7332
7333 ret = ssd_do_request(dev, READ, msg, NULL);
7334 ssd_put_dmsg(msg);
7335
7336 pci_unmap_single(dev->pdev, buf_dma, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7337
7338out_dma_mapping:
7339 return ret;
7340}
7341
7342#if 0
7343static int ssd_nand_read(struct ssd_device *dev, void *buf,
7344 int flash, int chip, int page, int page_count, int ctrl_idx)
7345{
7346 struct ssd_nand_op_msg *msg;
7347 dma_addr_t buf_dma;
7348 int length;
7349 int ret = 0;
7350
7351 if (!buf) {
7352 return -EINVAL;
7353 }
7354
7355 if ((page + page_count) > dev->hw_info.block_count*dev->hw_info.page_count) {
7356 return -EINVAL;
7357 }
7358
7359 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7360 if (ret) {
7361 return ret;
7362 }
7363
7364 length = page_count * dev->hw_info.page_size;
7365
7366 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7367#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7368 ret = dma_mapping_error(buf_dma);
7369#else
7370 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7371#endif
7372 if (ret) {
7373 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7374 goto out_dma_mapping;
7375 }
7376
7377 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7378 flash = (flash << 1) | chip;
7379 chip = 0;
7380 }
7381
7382 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7383
7384 msg->fun = SSD_FUNC_NAND_READ;
7385 msg->ctrl_idx = ctrl_idx;
7386 msg->chip_no = flash;
7387 msg->chip_ce = chip;
7388 msg->page_no = page;
7389 msg->page_count = page_count;
7390 msg->buf = buf_dma;
7391
7392 ret = ssd_do_request(dev, READ, msg, NULL);
7393 ssd_put_dmsg(msg);
7394
7395 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7396
7397out_dma_mapping:
7398 return ret;
7399}
7400#endif
7401
7402static int ssd_nand_read_w_oob(struct ssd_device *dev, void *buf,
7403 int flash, int chip, int page, int count, int ctrl_idx)
7404{
7405 struct ssd_nand_op_msg *msg;
7406 dma_addr_t buf_dma;
7407 int length;
7408 int ret = 0;
7409
7410 if (!buf) {
7411 return -EINVAL;
7412 }
7413
7414 if ((page + count) > (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7415 return -EINVAL;
7416 }
7417
7418 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7419 if (ret) {
7420 return ret;
7421 }
7422
7423 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7424
7425 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7426#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7427 ret = dma_mapping_error(buf_dma);
7428#else
7429 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7430#endif
7431 if (ret) {
7432 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7433 goto out_dma_mapping;
7434 }
7435
7436 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7437 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7438 chip = 0;
7439 }
7440
7441 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7442
7443 msg->fun = SSD_FUNC_NAND_READ_WOOB;
7444 msg->ctrl_idx = ctrl_idx;
7445 msg->chip_no = flash;
7446 msg->chip_ce = chip;
7447 msg->page_no = page;
7448 msg->page_count = count;
7449 msg->buf = buf_dma;
7450
7451 ret = ssd_do_request(dev, READ, msg, NULL);
7452 ssd_put_dmsg(msg);
7453
7454 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7455
7456out_dma_mapping:
7457 return ret;
7458}
7459
7460/* write 1 page */
7461static int ssd_nand_write(struct ssd_device *dev, void *buf,
7462 int flash, int chip, int page, int count, int ctrl_idx)
7463{
7464 struct ssd_nand_op_msg *msg;
7465 dma_addr_t buf_dma;
7466 int length;
7467 int ret = 0;
7468
7469 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7470 return -EINVAL;
7471 }
7472
7473 if (!buf) {
7474 return -EINVAL;
7475 }
7476
7477 if (count != 1) {
7478 return -EINVAL;
7479 }
7480
7481 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7482 if (ret) {
7483 return ret;
7484 }
7485
7486 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7487
7488 /* write data to ram */
7489 /*ret = ssd_ram_write(dev, buf, length, dev->hw_info.nand_wbuff_base, ctrl_idx);
7490 if (ret) {
7491 return ret;
7492 }*/
7493
7494 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7495#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7496 ret = dma_mapping_error(buf_dma);
7497#else
7498 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7499#endif
7500 if (ret) {
7501 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7502 goto out_dma_mapping;
7503 }
7504
7505 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7506 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7507 chip = 0;
7508 }
7509
7510 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7511
7512 msg->fun = SSD_FUNC_NAND_WRITE;
7513 msg->ctrl_idx = ctrl_idx;
7514 msg->chip_no = flash;
7515 msg->chip_ce = chip;
7516
7517 msg->page_no = page;
7518 msg->page_count = count;
7519 msg->buf = buf_dma;
7520
7521 ret = ssd_do_request(dev, WRITE, msg, NULL);
7522 ssd_put_dmsg(msg);
7523
7524 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7525
7526out_dma_mapping:
7527 return ret;
7528}
7529
7530static int ssd_nand_erase(struct ssd_device *dev, int flash, int chip, int page, int ctrl_idx)
7531{
7532 struct ssd_nand_op_msg *msg;
7533 int ret = 0;
7534
7535 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7536 if (ret) {
7537 return ret;
7538 }
7539
7540 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7541 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7542 chip = 0;
7543 }
7544
7545 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7546
7547 msg->fun = SSD_FUNC_NAND_ERASE;
7548 msg->ctrl_idx = ctrl_idx;
7549 msg->chip_no = flash;
7550 msg->chip_ce = chip;
7551 msg->page_no = page;
7552
7553 ret = ssd_do_request(dev, WRITE, msg, NULL);
7554 ssd_put_dmsg(msg);
7555
7556 return ret;
7557}
7558
7559static int ssd_update_bbt(struct ssd_device *dev, int flash, int ctrl_idx)
7560{
7561 struct ssd_nand_op_msg *msg;
7562 struct ssd_flush_msg *fmsg;
7563 int ret = 0;
7564
7565 ret = ssd_check_flash(dev, flash, 0, ctrl_idx);
7566 if (ret) {
7567 return ret;
7568 }
7569
7570 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7571
7572 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7573 fmsg = (struct ssd_flush_msg *)msg;
7574
7575 fmsg->fun = SSD_FUNC_FLUSH;
7576 fmsg->flag = 0x1;
7577 fmsg->flash = flash;
7578 fmsg->ctrl_idx = ctrl_idx;
7579 } else {
7580 msg->fun = SSD_FUNC_FLUSH;
7581 msg->flag = 0x1;
7582 msg->chip_no = flash;
7583 msg->ctrl_idx = ctrl_idx;
7584 }
7585
7586 ret = ssd_do_request(dev, WRITE, msg, NULL);
7587 ssd_put_dmsg(msg);
7588
7589 return ret;
7590}
7591
7592/* flash controller init state */
7593static int __ssd_check_init_state(struct ssd_device *dev)
7594{
7595 uint32_t *init_state = NULL;
7596 int reg_base, reg_sz;
7597 int max_wait = SSD_INIT_MAX_WAIT;
7598 int init_wait = 0;
7599 int i, j, k;
7600 int ch_start = 0;
7601
7602/*
7603 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7604 ssd_reg32_write(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8, test_data);
7605 read_data = ssd_reg32_read(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8);
7606 if (read_data == ~test_data) {
7607 //dev->hw_info.nr_ctrl++;
7608 dev->hw_info.nr_ctrl_map |= 1<<i;
7609 }
7610 }
7611*/
7612
7613/*
7614 read_data = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
7615 j=0;
7616 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7617 if (((read_data>>i) & 0x1) == 0) {
7618 j++;
7619 }
7620 }
7621
7622 if (dev->hw_info.nr_ctrl != j) {
7623 printk(KERN_WARNING "%s: nr_ctrl mismatch: %d %d\n", dev->name, dev->hw_info.nr_ctrl, j);
7624 return -1;
7625 }
7626*/
7627
7628/*
7629 init_state = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
7630 for (j=1; j<dev->hw_info.nr_ctrl;j++) {
7631 if (init_state != ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0 + j*8)) {
7632 printk(KERN_WARNING "SSD_FLASH_INFO_REG[%d], not match\n", j);
7633 return -1;
7634 }
7635 }
7636*/
7637
7638/* init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0);
7639 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7640 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + j*16)) {
7641 printk(KERN_WARNING "SSD_CHIP_INFO_REG Lo [%d], not match\n", j);
7642 return -1;
7643 }
7644 }
7645
7646 init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8);
7647 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7648 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8 + j*16)) {
7649 printk(KERN_WARNING "SSD_CHIP_INFO_REG Hi [%d], not match\n", j);
7650 return -1;
7651 }
7652 }
7653*/
7654
7655 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7656 max_wait = SSD_INIT_MAX_WAIT_V3_2;
7657 }
7658
7659 reg_base = dev->protocol_info.init_state_reg;
7660 reg_sz = dev->protocol_info.init_state_reg_sz;
7661
7662 init_state = (uint32_t *)kmalloc(reg_sz, GFP_KERNEL);
7663 if (!init_state) {
7664 return -ENOMEM;
7665 }
7666
7667 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7668check_init:
7669 for (j=0, k=0; j<reg_sz; j+=sizeof(uint32_t), k++) {
7670 init_state[k] = ssd_reg32_read(dev->ctrlp + reg_base + j);
7671 }
7672
7673 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7674 /* just check the last bit, no need to check all channel */
7675 ch_start = dev->hw_info.max_ch - 1;
7676 } else {
7677 ch_start = 0;
7678 }
7679
7680 for (j=0; j<dev->hw_info.nr_chip; j++) {
7681 for (k=ch_start; k<dev->hw_info.max_ch; k++) {
7682 if (test_bit((j*dev->hw_info.max_ch + k), (void *)init_state)) {
7683 continue;
7684 }
7685
7686 init_wait++;
7687 if (init_wait <= max_wait) {
7688 msleep(SSD_INIT_WAIT);
7689 goto check_init;
7690 } else {
7691 if (k < dev->hw_info.nr_ch) {
7692 hio_warn("%s: controller %d chip %d ch %d init failed\n",
7693 dev->name, i, j, k);
7694 } else {
7695 hio_warn("%s: controller %d chip %d init failed\n",
7696 dev->name, i, j);
7697 }
7698
7699 kfree(init_state);
7700 return -1;
7701 }
7702 }
7703 }
7704 reg_base += reg_sz;
7705 }
7706 //printk(KERN_WARNING "%s: init wait %d\n", dev->name, init_wait);
7707
7708 kfree(init_state);
7709 return 0;
7710}
7711
7712static int ssd_check_init_state(struct ssd_device *dev)
7713{
7714 if (mode != SSD_DRV_MODE_STANDARD) {
7715 return 0;
7716 }
7717
7718 return __ssd_check_init_state(dev);
7719}
7720
7721static void ssd_reset_resp_ptr(struct ssd_device *dev);
7722
7723/* reset flash controller etc */
7724static int __ssd_reset(struct ssd_device *dev, int type)
7725{
7726 if (type < SSD_RST_NOINIT || type > SSD_RST_FULL) {
7727 return -EINVAL;
7728 }
7729
7730 mutex_lock(&dev->fw_mutex);
7731
7732 if (type == SSD_RST_NOINIT) { //no init
7733 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET_NOINIT);
7734 } else if (type == SSD_RST_NORMAL) { //reset & init
7735 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET);
7736 } else { // full reset
7737 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7738 mutex_unlock(&dev->fw_mutex);
7739 return -EINVAL;
7740 }
7741
7742 ssd_reg32_write(dev->ctrlp + SSD_FULL_RESET_REG, SSD_RESET_FULL);
7743
7744 /* ?? */
7745 ssd_reset_resp_ptr(dev);
7746 }
7747
7748#ifdef SSD_OT_PROTECT
7749 dev->ot_delay = 0;
7750#endif
7751
7752 msleep(1000);
7753
7754 /* xx */
7755 ssd_set_flush_timeout(dev, dev->wmode);
7756
7757 mutex_unlock(&dev->fw_mutex);
7758 ssd_gen_swlog(dev, SSD_LOG_RESET, (uint32_t)type);
7759
7760 return __ssd_check_init_state(dev);
7761}
7762
7763static int ssd_save_md(struct ssd_device *dev)
7764{
7765 struct ssd_nand_op_msg *msg;
7766 int ret = 0;
7767
7768 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7769 return 0;
7770
7771 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7772 return 0;
7773 }
7774
7775 if (!dev->save_md) {
7776 return 0;
7777 }
7778
7779 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7780
7781 msg->fun = SSD_FUNC_FLUSH;
7782 msg->flag = 0x2;
7783 msg->ctrl_idx = 0;
7784 msg->chip_no = 0;
7785
7786 ret = ssd_do_request(dev, WRITE, msg, NULL);
7787 ssd_put_dmsg(msg);
7788
7789 return ret;
7790}
7791
7792static int ssd_barrier_save_md(struct ssd_device *dev)
7793{
7794 struct ssd_nand_op_msg *msg;
7795 int ret = 0;
7796
7797 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7798 return 0;
7799
7800 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7801 return 0;
7802 }
7803
7804 if (!dev->save_md) {
7805 return 0;
7806 }
7807
7808 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7809
7810 msg->fun = SSD_FUNC_FLUSH;
7811 msg->flag = 0x2;
7812 msg->ctrl_idx = 0;
7813 msg->chip_no = 0;
7814
7815 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7816 ssd_put_dmsg(msg);
7817
7818 return ret;
7819}
7820
7821static int ssd_flush(struct ssd_device *dev)
7822{
7823 struct ssd_nand_op_msg *msg;
7824 struct ssd_flush_msg *fmsg;
7825 int ret = 0;
7826
7827 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7828 return 0;
7829
7830 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7831
7832 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7833 fmsg = (struct ssd_flush_msg *)msg;
7834
7835 fmsg->fun = SSD_FUNC_FLUSH;
7836 fmsg->flag = 0;
7837 fmsg->ctrl_idx = 0;
7838 fmsg->flash = 0;
7839 } else {
7840 msg->fun = SSD_FUNC_FLUSH;
7841 msg->flag = 0;
7842 msg->ctrl_idx = 0;
7843 msg->chip_no = 0;
7844 }
7845
7846 ret = ssd_do_request(dev, WRITE, msg, NULL);
7847 ssd_put_dmsg(msg);
7848
7849 return ret;
7850}
7851
7852static int ssd_barrier_flush(struct ssd_device *dev)
7853{
7854 struct ssd_nand_op_msg *msg;
7855 struct ssd_flush_msg *fmsg;
7856 int ret = 0;
7857
7858 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7859 return 0;
7860
7861 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7862
7863 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7864 fmsg = (struct ssd_flush_msg *)msg;
7865
7866 fmsg->fun = SSD_FUNC_FLUSH;
7867 fmsg->flag = 0;
7868 fmsg->ctrl_idx = 0;
7869 fmsg->flash = 0;
7870 } else {
7871 msg->fun = SSD_FUNC_FLUSH;
7872 msg->flag = 0;
7873 msg->ctrl_idx = 0;
7874 msg->chip_no = 0;
7875 }
7876
7877 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7878 ssd_put_dmsg(msg);
7879
7880 return ret;
7881}
7882
7883#define SSD_WMODE_BUFFER_TIMEOUT 0x00c82710
7884#define SSD_WMODE_BUFFER_EX_TIMEOUT 0x000500c8
7885#define SSD_WMODE_FUA_TIMEOUT 0x000503E8
7886static void ssd_set_flush_timeout(struct ssd_device *dev, int m)
7887{
7888 uint32_t to;
7889 uint32_t val = 0;
7890
7891 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7892 return;
7893 }
7894
7895 switch(m) {
7896 case SSD_WMODE_BUFFER:
7897 to = SSD_WMODE_BUFFER_TIMEOUT;
7898 break;
7899 case SSD_WMODE_BUFFER_EX:
7900 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_1) {
7901 to = SSD_WMODE_BUFFER_EX_TIMEOUT;
7902 } else {
7903 to = SSD_WMODE_BUFFER_TIMEOUT;
7904 }
7905 break;
7906 case SSD_WMODE_FUA:
7907 to = SSD_WMODE_FUA_TIMEOUT;
7908 break;
7909 default:
7910 return;
7911 }
7912
7913 val = (((uint32_t)((uint32_t)m & 0x3) << 28) | to);
7914
7915 ssd_reg32_write(dev->ctrlp + SSD_FLUSH_TIMEOUT_REG, val);
7916}
7917
7918static int ssd_do_switch_wmode(struct ssd_device *dev, int m)
7919{
7920 int ret = 0;
7921
7922 ret = ssd_barrier_start(dev);
7923 if (ret) {
7924 goto out;
7925 }
7926
7927 ret = ssd_barrier_flush(dev);
7928 if (ret) {
7929 goto out_barrier_end;
7930 }
7931
7932 /* set contoller flush timeout */
7933 ssd_set_flush_timeout(dev, m);
7934
7935 dev->wmode = m;
7936 mb();
7937
7938out_barrier_end:
7939 ssd_barrier_end(dev);
7940out:
7941 return ret;
7942}
7943
7944static int ssd_switch_wmode(struct ssd_device *dev, int m)
7945{
7946 int default_wmode;
7947 int next_wmode;
7948 int ret = 0;
7949
7950 if (!test_bit(SSD_ONLINE, &dev->state)) {
7951 return -ENODEV;
7952 }
7953
7954 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7955 default_wmode = SSD_WMODE_BUFFER;
7956 } else {
7957 default_wmode = SSD_WMODE_BUFFER_EX;
7958 }
7959
7960 if (SSD_WMODE_AUTO == m) {
7961 /* battery fault ? */
7962 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7963 next_wmode = SSD_WMODE_FUA;
7964 } else {
7965 next_wmode = default_wmode;
7966 }
7967 } else if (SSD_WMODE_DEFAULT == m) {
7968 next_wmode = default_wmode;
7969 } else {
7970 next_wmode = m;
7971 }
7972
7973 if (next_wmode != dev->wmode) {
7974 hio_warn("%s: switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7975 ret = ssd_do_switch_wmode(dev, next_wmode);
7976 if (ret) {
7977 hio_err("%s: can not switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7978 }
7979 }
7980
7981 return ret;
7982}
7983
7984static int ssd_init_wmode(struct ssd_device *dev)
7985{
7986 int default_wmode;
7987 int ret = 0;
7988
7989 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7990 default_wmode = SSD_WMODE_BUFFER;
7991 } else {
7992 default_wmode = SSD_WMODE_BUFFER_EX;
7993 }
7994
7995 /* dummy mode */
7996 if (SSD_WMODE_AUTO == dev->user_wmode) {
7997 /* battery fault ? */
7998 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7999 dev->wmode = SSD_WMODE_FUA;
8000 } else {
8001 dev->wmode = default_wmode;
8002 }
8003 } else if (SSD_WMODE_DEFAULT == dev->user_wmode) {
8004 dev->wmode = default_wmode;
8005 } else {
8006 dev->wmode = dev->user_wmode;
8007 }
8008 ssd_set_flush_timeout(dev, dev->wmode);
8009
8010 return ret;
8011}
8012
8013static int __ssd_set_wmode(struct ssd_device *dev, int m)
8014{
8015 int ret = 0;
8016
8017 /* not support old fw*/
8018 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
8019 ret = -EOPNOTSUPP;
8020 goto out;
8021 }
8022
8023 if (m < SSD_WMODE_BUFFER || m > SSD_WMODE_DEFAULT) {
8024 ret = -EINVAL;
8025 goto out;
8026 }
8027
8028 ssd_gen_swlog(dev, SSD_LOG_SET_WMODE, m);
8029
8030 dev->user_wmode = m;
8031
8032 ret = ssd_switch_wmode(dev, dev->user_wmode);
8033 if (ret) {
8034 goto out;
8035 }
8036
8037out:
8038 return ret;
8039}
8040
8041int ssd_set_wmode(struct block_device *bdev, int m)
8042{
8043 struct ssd_device *dev;
8044
8045 if (!bdev || !(bdev->bd_disk)) {
8046 return -EINVAL;
8047 }
8048
8049 dev = bdev->bd_disk->private_data;
8050
8051 return __ssd_set_wmode(dev, m);
8052}
8053
8054static int ssd_do_reset(struct ssd_device *dev)
8055{
8056 int ret = 0;
8057
8058 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8059 return 0;
8060 }
8061
8062 ssd_stop_workq(dev);
8063
8064 ret = ssd_barrier_start(dev);
8065 if (ret) {
8066 goto out;
8067 }
8068
8069 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8070 /* old reset */
8071 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8072 } else {
8073 /* full reset */
8074 //ret = __ssd_reset(dev, SSD_RST_FULL);
8075 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8076 }
8077 if (ret) {
8078 goto out_barrier_end;
8079 }
8080
8081out_barrier_end:
8082 ssd_barrier_end(dev);
8083out:
8084 ssd_start_workq(dev);
8085 test_and_clear_bit(SSD_RESETING, &dev->state);
8086 return ret;
8087}
8088
8089static int ssd_full_reset(struct ssd_device *dev)
8090{
8091 int ret = 0;
8092
8093 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8094 return 0;
8095 }
8096
8097 ssd_stop_workq(dev);
8098
8099 ret = ssd_barrier_start(dev);
8100 if (ret) {
8101 goto out;
8102 }
8103
8104 ret = ssd_barrier_flush(dev);
8105 if (ret) {
8106 goto out_barrier_end;
8107 }
8108
8109 ret = ssd_barrier_save_md(dev);
8110 if (ret) {
8111 goto out_barrier_end;
8112 }
8113
8114 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8115 /* old reset */
8116 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8117 } else {
8118 /* full reset */
8119 //ret = __ssd_reset(dev, SSD_RST_FULL);
8120 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8121 }
8122 if (ret) {
8123 goto out_barrier_end;
8124 }
8125
8126out_barrier_end:
8127 ssd_barrier_end(dev);
8128out:
8129 ssd_start_workq(dev);
8130 test_and_clear_bit(SSD_RESETING, &dev->state);
8131 return ret;
8132}
8133
8134int ssd_reset(struct block_device *bdev)
8135{
8136 struct ssd_device *dev;
8137
8138 if (!bdev || !(bdev->bd_disk)) {
8139 return -EINVAL;
8140 }
8141
8142 dev = bdev->bd_disk->private_data;
8143
8144 return ssd_full_reset(dev);
8145}
8146
8147#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
8148static int ssd_issue_flush_fn(struct request_queue *q, struct gendisk *disk,
8149 sector_t *error_sector)
8150{
8151 struct ssd_device *dev = q->queuedata;
8152
8153 return ssd_flush(dev);
8154}
8155#endif
8156
8157void ssd_submit_pbio(struct request_queue *q, struct bio *bio)
8158{
8159 struct ssd_device *dev = q->queuedata;
8160#ifdef SSD_QUEUE_PBIO
8161 int ret = -EBUSY;
8162#endif
8163
8164 if (!test_bit(SSD_ONLINE, &dev->state)) {
8165#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8166 bio_endio(bio, -ENODEV);
8167#else
8168 bio_endio(bio, bio->bi_size, -ENODEV);
8169#endif
8170 goto out;
8171 }
8172
8173#ifdef SSD_DEBUG_ERR
8174 if (atomic_read(&dev->tocnt)) {
8175 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8176#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8177 bio_endio(bio, -EIO);
8178#else
8179 bio_endio(bio, bio->bi_size, -EIO);
8180#endif
8181 goto out;
8182 }
8183#endif
8184
8185#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8186 if (unlikely(bio_barrier(bio))) {
8187#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8188 bio_endio(bio, -EOPNOTSUPP);
8189#else
8190 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8191#endif
8192 goto out;
8193 }
8194#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8195 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8196#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8197 bio_endio(bio, -EOPNOTSUPP);
8198#else
8199 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8200#endif
8201 goto out;
8202 }
8203#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8204 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8205#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8206 bio_endio(bio, -EOPNOTSUPP);
8207#else
8208 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8209#endif
8210 goto out;
8211 }
8212#else
8213 //xx
195d6988
AW
8214#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
8215 if (unlikely(bio->bi_opf & REQ_FUA)) {
8216#else
a6a796ca 8217 if (unlikely(bio->bi_rw & REQ_FUA)) {
195d6988 8218#endif
a6a796ca
HSDT
8219#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8220 bio_endio(bio, -EOPNOTSUPP);
8221#else
8222 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8223#endif
8224 goto out;
8225 }
8226#endif
8227
8228 if (unlikely(dev->readonly && bio_data_dir(bio) == WRITE)) {
8229#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8230 bio_endio(bio, -EROFS);
8231#else
8232 bio_endio(bio, bio->bi_size, -EROFS);
8233#endif
8234 goto out;
8235 }
8236
8237#ifdef SSD_QUEUE_PBIO
8238 if (0 == atomic_read(&dev->in_sendq)) {
8239 ret = __ssd_submit_pbio(dev, bio, 0);
8240 }
8241
8242 if (ret) {
8243 (void)test_and_set_bit(BIO_SSD_PBIO, &bio->bi_flags);
8244 ssd_queue_bio(dev, bio);
8245 }
8246#else
8247 __ssd_submit_pbio(dev, bio, 1);
8248#endif
8249
8250out:
8251 return;
8252}
8253
363ace19
KM
8254#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0))
8255static blk_qc_t ssd_make_request(struct request_queue *q, struct bio *bio)
8256#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
a6a796ca 8257static void ssd_make_request(struct request_queue *q, struct bio *bio)
363ace19
KM
8258#else
8259static int ssd_make_request(struct request_queue *q, struct bio *bio)
a6a796ca
HSDT
8260#endif
8261{
8262 struct ssd_device *dev = q->queuedata;
8263 int ret = -EBUSY;
8264
8265 if (!test_bit(SSD_ONLINE, &dev->state)) {
8266#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8267 bio_endio(bio, -ENODEV);
8268#else
8269 bio_endio(bio, bio->bi_size, -ENODEV);
8270#endif
8271 goto out;
8272 }
8273
8274#ifdef SSD_DEBUG_ERR
8275 if (atomic_read(&dev->tocnt)) {
8276 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8277#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8278 bio_endio(bio, -EIO);
8279#else
8280 bio_endio(bio, bio->bi_size, -EIO);
8281#endif
8282 goto out;
8283 }
8284#endif
8285
8286#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8287 if (unlikely(bio_barrier(bio))) {
8288#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8289 bio_endio(bio, -EOPNOTSUPP);
8290#else
8291 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8292#endif
8293 goto out;
8294 }
8295#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8296 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8297#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8298 bio_endio(bio, -EOPNOTSUPP);
8299#else
8300 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8301#endif
8302 goto out;
8303 }
8304#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8305 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8306#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8307 bio_endio(bio, -EOPNOTSUPP);
8308#else
8309 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8310#endif
8311 goto out;
8312 }
8313#else
8314 //xx
195d6988
AW
8315#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
8316 if (unlikely(bio->bi_opf & REQ_FUA)) {
8317#else
a6a796ca 8318 if (unlikely(bio->bi_rw & REQ_FUA)) {
195d6988 8319#endif
a6a796ca
HSDT
8320#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8321 bio_endio(bio, -EOPNOTSUPP);
8322#else
8323 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8324#endif
8325 goto out;
8326 }
8327
8328 /* writeback_cache_control.txt: REQ_FLUSH requests without data can be completed successfully without doing any work */
195d6988
AW
8329#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,8,0))
8330 if (unlikely((bio_op(bio) & REQ_OP_FLUSH) && !bio_sectors(bio))) {
8331#else
a6a796ca 8332 if (unlikely((bio->bi_rw & REQ_FLUSH) && !bio_sectors(bio))) {
195d6988 8333#endif
a6a796ca
HSDT
8334 bio_endio(bio, 0);
8335 goto out;
8336 }
8337
8338#endif
8339
8340 if (0 == atomic_read(&dev->in_sendq)) {
8341 ret = ssd_submit_bio(dev, bio, 0);
8342 }
8343
8344 if (ret) {
8345 ssd_queue_bio(dev, bio);
8346 }
8347
8348out:
363ace19
KM
8349#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,4,0))
8350 return BLK_QC_T_NONE;
8351#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
a6a796ca 8352 return;
363ace19
KM
8353#else
8354 return 0;
a6a796ca
HSDT
8355#endif
8356}
8357
8358#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
8359static int ssd_block_getgeo(struct block_device *bdev, struct hd_geometry *geo)
8360{
8361 struct ssd_device *dev;
8362
8363 if (!bdev) {
8364 return -EINVAL;
8365 }
8366
8367 dev = bdev->bd_disk->private_data;
8368 if (!dev) {
8369 return -EINVAL;
8370 }
8371
8372 geo->heads = 4;
8373 geo->sectors = 16;
8374 geo->cylinders = (dev->hw_info.size & ~0x3f) >> 6;
8375 return 0;
8376}
8377#endif
8378
8379static void ssd_cleanup_blkdev(struct ssd_device *dev);
8380static int ssd_init_blkdev(struct ssd_device *dev);
8381static int ssd_ioctl_common(struct ssd_device *dev, unsigned int cmd, unsigned long arg)
8382{
8383 void __user *argp = (void __user *)arg;
8384 void __user *buf = NULL;
8385 void *kbuf = NULL;
8386 int ret = 0;
8387
8388 switch (cmd) {
8389 case SSD_CMD_GET_PROTOCOL_INFO:
8390 if (copy_to_user(argp, &dev->protocol_info, sizeof(struct ssd_protocol_info))) {
8391 hio_warn("%s: copy_to_user: failed\n", dev->name);
8392 ret = -EFAULT;
8393 break;
8394 }
8395 break;
8396
8397 case SSD_CMD_GET_HW_INFO:
8398 if (copy_to_user(argp, &dev->hw_info, sizeof(struct ssd_hw_info))) {
8399 hio_warn("%s: copy_to_user: failed\n", dev->name);
8400 ret = -EFAULT;
8401 break;
8402 }
8403 break;
8404
8405 case SSD_CMD_GET_ROM_INFO:
8406 if (copy_to_user(argp, &dev->rom_info, sizeof(struct ssd_rom_info))) {
8407 hio_warn("%s: copy_to_user: failed\n", dev->name);
8408 ret = -EFAULT;
8409 break;
8410 }
8411 break;
8412
8413 case SSD_CMD_GET_SMART: {
8414 struct ssd_smart smart;
8415 int i;
8416
8417 memcpy(&smart, &dev->smart, sizeof(struct ssd_smart));
8418
8419 mutex_lock(&dev->gd_mutex);
8420 ssd_update_smart(dev, &smart);
8421 mutex_unlock(&dev->gd_mutex);
8422
8423 /* combine the volatile log info */
8424 if (dev->log_info.nr_log) {
8425 for (i=0; i<SSD_LOG_NR_LEVEL; i++) {
8426 smart.log_info.stat[i] += dev->log_info.stat[i];
8427 }
8428 }
8429
8430 if (copy_to_user(argp, &smart, sizeof(struct ssd_smart))) {
8431 hio_warn("%s: copy_to_user: failed\n", dev->name);
8432 ret = -EFAULT;
8433 break;
8434 }
8435
8436 break;
8437 }
8438
8439 case SSD_CMD_GET_IDX:
8440 if (copy_to_user(argp, &dev->idx, sizeof(int))) {
8441 hio_warn("%s: copy_to_user: failed\n", dev->name);
8442 ret = -EFAULT;
8443 break;
8444 }
8445 break;
8446
8447 case SSD_CMD_GET_AMOUNT: {
8448 int nr_ssd = atomic_read(&ssd_nr);
8449 if (copy_to_user(argp, &nr_ssd, sizeof(int))) {
8450 hio_warn("%s: copy_to_user: failed\n", dev->name);
8451 ret = -EFAULT;
8452 break;
8453 }
8454 break;
8455 }
8456
8457 case SSD_CMD_GET_TO_INFO: {
8458 int tocnt = atomic_read(&dev->tocnt);
8459
8460 if (copy_to_user(argp, &tocnt, sizeof(int))) {
8461 hio_warn("%s: copy_to_user: failed\n", dev->name);
8462 ret = -EFAULT;
8463 break;
8464 }
8465 break;
8466 }
8467
8468 case SSD_CMD_GET_DRV_VER: {
8469 char ver[] = DRIVER_VERSION;
8470 int len = sizeof(ver);
8471
8472 if (len > (DRIVER_VERSION_LEN - 1)) {
8473 len = (DRIVER_VERSION_LEN - 1);
8474 }
8475 if (copy_to_user(argp, ver, len)) {
8476 hio_warn("%s: copy_to_user: failed\n", dev->name);
8477 ret = -EFAULT;
8478 break;
8479 }
8480 break;
8481 }
8482
8483 case SSD_CMD_GET_BBACC_INFO: {
8484 struct ssd_acc_info acc;
8485
8486 mutex_lock(&dev->fw_mutex);
8487 ret = ssd_bb_acc(dev, &acc);
8488 mutex_unlock(&dev->fw_mutex);
8489 if (ret) {
8490 break;
8491 }
8492
8493 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8494 hio_warn("%s: copy_to_user: failed\n", dev->name);
8495 ret = -EFAULT;
8496 break;
8497 }
8498 break;
8499 }
8500
8501 case SSD_CMD_GET_ECACC_INFO: {
8502 struct ssd_acc_info acc;
8503
8504 mutex_lock(&dev->fw_mutex);
8505 ret = ssd_ec_acc(dev, &acc);
8506 mutex_unlock(&dev->fw_mutex);
8507 if (ret) {
8508 break;
8509 }
8510
8511 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8512 hio_warn("%s: copy_to_user: failed\n", dev->name);
8513 ret = -EFAULT;
8514 break;
8515 }
8516 break;
8517 }
8518
8519 case SSD_CMD_GET_HW_INFO_EXT:
8520 if (copy_to_user(argp, &dev->hw_info_ext, sizeof(struct ssd_hw_info_extend))) {
8521 hio_warn("%s: copy_to_user: failed\n", dev->name);
8522 ret = -EFAULT;
8523 break;
8524 }
8525 break;
8526
8527 case SSD_CMD_REG_READ: {
8528 struct ssd_reg_op_info reg_info;
8529
8530 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8531 hio_warn("%s: copy_from_user: failed\n", dev->name);
8532 ret = -EFAULT;
8533 break;
8534 }
8535
8536 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8537 ret = -EINVAL;
8538 break;
8539 }
8540
8541 reg_info.value = ssd_reg32_read(dev->ctrlp + reg_info.offset);
8542 if (copy_to_user(argp, &reg_info, sizeof(struct ssd_reg_op_info))) {
8543 hio_warn("%s: copy_to_user: failed\n", dev->name);
8544 ret = -EFAULT;
8545 break;
8546 }
8547
8548 break;
8549 }
8550
8551 case SSD_CMD_REG_WRITE: {
8552 struct ssd_reg_op_info reg_info;
8553
8554 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8555 hio_warn("%s: copy_from_user: failed\n", dev->name);
8556 ret = -EFAULT;
8557 break;
8558 }
8559
8560 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8561 ret = -EINVAL;
8562 break;
8563 }
8564
8565 ssd_reg32_write(dev->ctrlp + reg_info.offset, reg_info.value);
8566
8567 break;
8568 }
8569
8570 case SSD_CMD_SPI_READ: {
8571 struct ssd_spi_op_info spi_info;
8572 uint32_t off, size;
8573
8574 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8575 hio_warn("%s: copy_from_user: failed\n", dev->name);
8576 ret = -EFAULT;
8577 break;
8578 }
8579
8580 off = spi_info.off;
8581 size = spi_info.len;
8582 buf = spi_info.buf;
8583
8584 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8585 ret = -EINVAL;
8586 break;
8587 }
8588
8589 kbuf = kmalloc(size, GFP_KERNEL);
8590 if (!kbuf) {
8591 ret = -ENOMEM;
8592 break;
8593 }
8594
8595 ret = ssd_spi_page_read(dev, kbuf, off, size);
8596 if (ret) {
8597 kfree(kbuf);
8598 break;
8599 }
8600
8601 if (copy_to_user(buf, kbuf, size)) {
8602 hio_warn("%s: copy_to_user: failed\n", dev->name);
8603 kfree(kbuf);
8604 ret = -EFAULT;
8605 break;
8606 }
8607
8608 kfree(kbuf);
8609
8610 break;
8611 }
8612
8613 case SSD_CMD_SPI_WRITE: {
8614 struct ssd_spi_op_info spi_info;
8615 uint32_t off, size;
8616
8617 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8618 hio_warn("%s: copy_from_user: failed\n", dev->name);
8619 ret = -EFAULT;
8620 break;
8621 }
8622
8623 off = spi_info.off;
8624 size = spi_info.len;
8625 buf = spi_info.buf;
8626
8627 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8628 ret = -EINVAL;
8629 break;
8630 }
8631
8632 kbuf = kmalloc(size, GFP_KERNEL);
8633 if (!kbuf) {
8634 ret = -ENOMEM;
8635 break;
8636 }
8637
8638 if (copy_from_user(kbuf, buf, size)) {
8639 hio_warn("%s: copy_from_user: failed\n", dev->name);
8640 kfree(kbuf);
8641 ret = -EFAULT;
8642 break;
8643 }
8644
8645 ret = ssd_spi_page_write(dev, kbuf, off, size);
8646 if (ret) {
8647 kfree(kbuf);
8648 break;
8649 }
8650
8651 kfree(kbuf);
8652
8653 break;
8654 }
8655
8656 case SSD_CMD_SPI_ERASE: {
8657 struct ssd_spi_op_info spi_info;
8658 uint32_t off;
8659
8660 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8661 hio_warn("%s: copy_from_user: failed\n", dev->name);
8662 ret = -EFAULT;
8663 break;
8664 }
8665
8666 off = spi_info.off;
8667
8668 if ((off + dev->rom_info.block_size) > dev->rom_info.size) {
8669 ret = -EINVAL;
8670 break;
8671 }
8672
8673 ret = ssd_spi_block_erase(dev, off);
8674 if (ret) {
8675 break;
8676 }
8677
8678 break;
8679 }
8680
8681 case SSD_CMD_I2C_READ: {
8682 struct ssd_i2c_op_info i2c_info;
8683 uint8_t saddr;
8684 uint8_t rsize;
8685
8686 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8687 hio_warn("%s: copy_from_user: failed\n", dev->name);
8688 ret = -EFAULT;
8689 break;
8690 }
8691
8692 saddr = i2c_info.saddr;
8693 rsize = i2c_info.rsize;
8694 buf = i2c_info.rbuf;
8695
8696 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8697 ret = -EINVAL;
8698 break;
8699 }
8700
8701 kbuf = kmalloc(rsize, GFP_KERNEL);
8702 if (!kbuf) {
8703 ret = -ENOMEM;
8704 break;
8705 }
8706
8707 ret = ssd_i2c_read(dev, saddr, rsize, kbuf);
8708 if (ret) {
8709 kfree(kbuf);
8710 break;
8711 }
8712
8713 if (copy_to_user(buf, kbuf, rsize)) {
8714 hio_warn("%s: copy_to_user: failed\n", dev->name);
8715 kfree(kbuf);
8716 ret = -EFAULT;
8717 break;
8718 }
8719
8720 kfree(kbuf);
8721
8722 break;
8723 }
8724
8725 case SSD_CMD_I2C_WRITE: {
8726 struct ssd_i2c_op_info i2c_info;
8727 uint8_t saddr;
8728 uint8_t wsize;
8729
8730 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8731 hio_warn("%s: copy_from_user: failed\n", dev->name);
8732 ret = -EFAULT;
8733 break;
8734 }
8735
8736 saddr = i2c_info.saddr;
8737 wsize = i2c_info.wsize;
8738 buf = i2c_info.wbuf;
8739
8740 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8741 ret = -EINVAL;
8742 break;
8743 }
8744
8745 kbuf = kmalloc(wsize, GFP_KERNEL);
8746 if (!kbuf) {
8747 ret = -ENOMEM;
8748 break;
8749 }
8750
8751 if (copy_from_user(kbuf, buf, wsize)) {
8752 hio_warn("%s: copy_from_user: failed\n", dev->name);
8753 kfree(kbuf);
8754 ret = -EFAULT;
8755 break;
8756 }
8757
8758 ret = ssd_i2c_write(dev, saddr, wsize, kbuf);
8759 if (ret) {
8760 kfree(kbuf);
8761 break;
8762 }
8763
8764 kfree(kbuf);
8765
8766 break;
8767 }
8768
8769 case SSD_CMD_I2C_WRITE_READ: {
8770 struct ssd_i2c_op_info i2c_info;
8771 uint8_t saddr;
8772 uint8_t wsize;
8773 uint8_t rsize;
8774 uint8_t size;
8775
8776 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8777 hio_warn("%s: copy_from_user: failed\n", dev->name);
8778 ret = -EFAULT;
8779 break;
8780 }
8781
8782 saddr = i2c_info.saddr;
8783 wsize = i2c_info.wsize;
8784 rsize = i2c_info.rsize;
8785 buf = i2c_info.wbuf;
8786
8787 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8788 ret = -EINVAL;
8789 break;
8790 }
8791
8792 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8793 ret = -EINVAL;
8794 break;
8795 }
8796
8797 size = wsize + rsize;
8798
8799 kbuf = kmalloc(size, GFP_KERNEL);
8800 if (!kbuf) {
8801 ret = -ENOMEM;
8802 break;
8803 }
8804
8805 if (copy_from_user((kbuf + rsize), buf, wsize)) {
8806 hio_warn("%s: copy_from_user: failed\n", dev->name);
8807 kfree(kbuf);
8808 ret = -EFAULT;
8809 break;
8810 }
8811
8812 buf = i2c_info.rbuf;
8813
8814 ret = ssd_i2c_write_read(dev, saddr, wsize, (kbuf + rsize), rsize, kbuf);
8815 if (ret) {
8816 kfree(kbuf);
8817 break;
8818 }
8819
8820 if (copy_to_user(buf, kbuf, rsize)) {
8821 hio_warn("%s: copy_to_user: failed\n", dev->name);
8822 kfree(kbuf);
8823 ret = -EFAULT;
8824 break;
8825 }
8826
8827 kfree(kbuf);
8828
8829 break;
8830 }
8831
8832 case SSD_CMD_SMBUS_SEND_BYTE: {
8833 struct ssd_smbus_op_info smbus_info;
8834 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8835 uint8_t saddr;
8836 uint8_t size;
8837
8838 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8839 hio_warn("%s: copy_from_user: failed\n", dev->name);
8840 ret = -EFAULT;
8841 break;
8842 }
8843
8844 saddr = smbus_info.saddr;
8845 buf = smbus_info.buf;
8846 size = 1;
8847
8848 if (copy_from_user(smb_data, buf, size)) {
8849 hio_warn("%s: copy_from_user: failed\n", dev->name);
8850 ret = -EFAULT;
8851 break;
8852 }
8853
8854 ret = ssd_smbus_send_byte(dev, saddr, smb_data);
8855 if (ret) {
8856 break;
8857 }
8858
8859 break;
8860 }
8861
8862 case SSD_CMD_SMBUS_RECEIVE_BYTE: {
8863 struct ssd_smbus_op_info smbus_info;
8864 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8865 uint8_t saddr;
8866 uint8_t size;
8867
8868 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8869 hio_warn("%s: copy_from_user: failed\n", dev->name);
8870 ret = -EFAULT;
8871 break;
8872 }
8873
8874 saddr = smbus_info.saddr;
8875 buf = smbus_info.buf;
8876 size = 1;
8877
8878 ret = ssd_smbus_receive_byte(dev, saddr, smb_data);
8879 if (ret) {
8880 break;
8881 }
8882
8883 if (copy_to_user(buf, smb_data, size)) {
8884 hio_warn("%s: copy_to_user: failed\n", dev->name);
8885 ret = -EFAULT;
8886 break;
8887 }
8888
8889 break;
8890 }
8891
8892 case SSD_CMD_SMBUS_WRITE_BYTE: {
8893 struct ssd_smbus_op_info smbus_info;
8894 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8895 uint8_t saddr;
8896 uint8_t command;
8897 uint8_t size;
8898
8899 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8900 hio_warn("%s: copy_from_user: failed\n", dev->name);
8901 ret = -EFAULT;
8902 break;
8903 }
8904
8905 saddr = smbus_info.saddr;
8906 command = smbus_info.cmd;
8907 buf = smbus_info.buf;
8908 size = 1;
8909
8910 if (copy_from_user(smb_data, buf, size)) {
8911 hio_warn("%s: copy_from_user: failed\n", dev->name);
8912 ret = -EFAULT;
8913 break;
8914 }
8915
8916 ret = ssd_smbus_write_byte(dev, saddr, command, smb_data);
8917 if (ret) {
8918 break;
8919 }
8920
8921 break;
8922 }
8923
8924 case SSD_CMD_SMBUS_READ_BYTE: {
8925 struct ssd_smbus_op_info smbus_info;
8926 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8927 uint8_t saddr;
8928 uint8_t command;
8929 uint8_t size;
8930
8931 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8932 hio_warn("%s: copy_from_user: failed\n", dev->name);
8933 ret = -EFAULT;
8934 break;
8935 }
8936
8937 saddr = smbus_info.saddr;
8938 command = smbus_info.cmd;
8939 buf = smbus_info.buf;
8940 size = 1;
8941
8942 ret = ssd_smbus_read_byte(dev, saddr, command, smb_data);
8943 if (ret) {
8944 break;
8945 }
8946
8947 if (copy_to_user(buf, smb_data, size)) {
8948 hio_warn("%s: copy_to_user: failed\n", dev->name);
8949 ret = -EFAULT;
8950 break;
8951 }
8952
8953 break;
8954 }
8955
8956 case SSD_CMD_SMBUS_WRITE_WORD: {
8957 struct ssd_smbus_op_info smbus_info;
8958 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8959 uint8_t saddr;
8960 uint8_t command;
8961 uint8_t size;
8962
8963 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8964 hio_warn("%s: copy_from_user: failed\n", dev->name);
8965 ret = -EFAULT;
8966 break;
8967 }
8968
8969 saddr = smbus_info.saddr;
8970 command = smbus_info.cmd;
8971 buf = smbus_info.buf;
8972 size = 2;
8973
8974 if (copy_from_user(smb_data, buf, size)) {
8975 hio_warn("%s: copy_from_user: failed\n", dev->name);
8976 ret = -EFAULT;
8977 break;
8978 }
8979
8980 ret = ssd_smbus_write_word(dev, saddr, command, smb_data);
8981 if (ret) {
8982 break;
8983 }
8984
8985 break;
8986 }
8987
8988 case SSD_CMD_SMBUS_READ_WORD: {
8989 struct ssd_smbus_op_info smbus_info;
8990 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8991 uint8_t saddr;
8992 uint8_t command;
8993 uint8_t size;
8994
8995 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8996 hio_warn("%s: copy_from_user: failed\n", dev->name);
8997 ret = -EFAULT;
8998 break;
8999 }
9000
9001 saddr = smbus_info.saddr;
9002 command = smbus_info.cmd;
9003 buf = smbus_info.buf;
9004 size = 2;
9005
9006 ret = ssd_smbus_read_word(dev, saddr, command, smb_data);
9007 if (ret) {
9008 break;
9009 }
9010
9011 if (copy_to_user(buf, smb_data, size)) {
9012 hio_warn("%s: copy_to_user: failed\n", dev->name);
9013 ret = -EFAULT;
9014 break;
9015 }
9016
9017 break;
9018 }
9019
9020 case SSD_CMD_SMBUS_WRITE_BLOCK: {
9021 struct ssd_smbus_op_info smbus_info;
9022 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9023 uint8_t saddr;
9024 uint8_t command;
9025 uint8_t size;
9026
9027 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9028 hio_warn("%s: copy_from_user: failed\n", dev->name);
9029 ret = -EFAULT;
9030 break;
9031 }
9032
9033 saddr = smbus_info.saddr;
9034 command = smbus_info.cmd;
9035 buf = smbus_info.buf;
9036 size = smbus_info.size;
9037
9038 if (size > SSD_SMBUS_BLOCK_MAX) {
9039 ret = -EINVAL;
9040 break;
9041 }
9042
9043 if (copy_from_user(smb_data, buf, size)) {
9044 hio_warn("%s: copy_from_user: failed\n", dev->name);
9045 ret = -EFAULT;
9046 break;
9047 }
9048
9049 ret = ssd_smbus_write_block(dev, saddr, command, size, smb_data);
9050 if (ret) {
9051 break;
9052 }
9053
9054 break;
9055 }
9056
9057 case SSD_CMD_SMBUS_READ_BLOCK: {
9058 struct ssd_smbus_op_info smbus_info;
9059 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9060 uint8_t saddr;
9061 uint8_t command;
9062 uint8_t size;
9063
9064 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9065 hio_warn("%s: copy_from_user: failed\n", dev->name);
9066 ret = -EFAULT;
9067 break;
9068 }
9069
9070 saddr = smbus_info.saddr;
9071 command = smbus_info.cmd;
9072 buf = smbus_info.buf;
9073 size = smbus_info.size;
9074
9075 if (size > SSD_SMBUS_BLOCK_MAX) {
9076 ret = -EINVAL;
9077 break;
9078 }
9079
9080 ret = ssd_smbus_read_block(dev, saddr, command, size, smb_data);
9081 if (ret) {
9082 break;
9083 }
9084
9085 if (copy_to_user(buf, smb_data, size)) {
9086 hio_warn("%s: copy_to_user: failed\n", dev->name);
9087 ret = -EFAULT;
9088 break;
9089 }
9090
9091 break;
9092 }
9093
9094 case SSD_CMD_BM_GET_VER: {
9095 uint16_t ver;
9096
9097 ret = ssd_bm_get_version(dev, &ver);
9098 if (ret) {
9099 break;
9100 }
9101
9102 if (copy_to_user(argp, &ver, sizeof(uint16_t))) {
9103 hio_warn("%s: copy_to_user: failed\n", dev->name);
9104 ret = -EFAULT;
9105 break;
9106 }
9107
9108 break;
9109 }
9110
9111 case SSD_CMD_BM_GET_NR_CAP: {
9112 int nr_cap;
9113
9114 ret = ssd_bm_nr_cap(dev, &nr_cap);
9115 if (ret) {
9116 break;
9117 }
9118
9119 if (copy_to_user(argp, &nr_cap, sizeof(int))) {
9120 hio_warn("%s: copy_to_user: failed\n", dev->name);
9121 ret = -EFAULT;
9122 break;
9123 }
9124
9125 break;
9126 }
9127
9128 case SSD_CMD_BM_CAP_LEARNING: {
9129 ret = ssd_bm_enter_cap_learning(dev);
9130
9131 if (ret) {
9132 break;
9133 }
9134
9135 break;
9136 }
9137
9138 case SSD_CMD_CAP_LEARN: {
9139 uint32_t cap = 0;
9140
9141 ret = ssd_cap_learn(dev, &cap);
9142 if (ret) {
9143 break;
9144 }
9145
9146 if (copy_to_user(argp, &cap, sizeof(uint32_t))) {
9147 hio_warn("%s: copy_to_user: failed\n", dev->name);
9148 ret = -EFAULT;
9149 break;
9150 }
9151
9152 break;
9153 }
9154
9155 case SSD_CMD_GET_CAP_STATUS: {
9156 int cap_status = 0;
9157
9158 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9159 cap_status = 1;
9160 }
9161
9162 if (copy_to_user(argp, &cap_status, sizeof(int))) {
9163 hio_warn("%s: copy_to_user: failed\n", dev->name);
9164 ret = -EFAULT;
9165 break;
9166 }
9167
9168 break;
9169 }
9170
9171 case SSD_CMD_RAM_READ: {
9172 struct ssd_ram_op_info ram_info;
9173 uint64_t ofs;
9174 uint32_t length;
9175 size_t rlen, len = dev->hw_info.ram_max_len;
9176 int ctrl_idx;
9177
9178 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9179 hio_warn("%s: copy_from_user: failed\n", dev->name);
9180 ret = -EFAULT;
9181 break;
9182 }
9183
9184 ofs = ram_info.start;
9185 length = ram_info.length;
9186 buf = ram_info.buf;
9187 ctrl_idx = ram_info.ctrl_idx;
9188
9189 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9190 ret = -EINVAL;
9191 break;
9192 }
9193
9194 kbuf = kmalloc(len, GFP_KERNEL);
9195 if (!kbuf) {
9196 ret = -ENOMEM;
9197 break;
9198 }
9199
9200 for (rlen=0; rlen<length; rlen+=len, buf+=len, ofs+=len) {
9201 if ((length - rlen) < len) {
9202 len = length - rlen;
9203 }
9204
9205 ret = ssd_ram_read(dev, kbuf, len, ofs, ctrl_idx);
9206 if (ret) {
9207 break;
9208 }
9209
9210 if (copy_to_user(buf, kbuf, len)) {
9211 ret = -EFAULT;
9212 break;
9213 }
9214 }
9215
9216 kfree(kbuf);
9217
9218 break;
9219 }
9220
9221 case SSD_CMD_RAM_WRITE: {
9222 struct ssd_ram_op_info ram_info;
9223 uint64_t ofs;
9224 uint32_t length;
9225 size_t wlen, len = dev->hw_info.ram_max_len;
9226 int ctrl_idx;
9227
9228 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9229 hio_warn("%s: copy_from_user: failed\n", dev->name);
9230 ret = -EFAULT;
9231 break;
9232 }
9233 ofs = ram_info.start;
9234 length = ram_info.length;
9235 buf = ram_info.buf;
9236 ctrl_idx = ram_info.ctrl_idx;
9237
9238 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9239 ret = -EINVAL;
9240 break;
9241 }
9242
9243 kbuf = kmalloc(len, GFP_KERNEL);
9244 if (!kbuf) {
9245 ret = -ENOMEM;
9246 break;
9247 }
9248
9249 for (wlen=0; wlen<length; wlen+=len, buf+=len, ofs+=len) {
9250 if ((length - wlen) < len) {
9251 len = length - wlen;
9252 }
9253
9254 if (copy_from_user(kbuf, buf, len)) {
9255 ret = -EFAULT;
9256 break;
9257 }
9258
9259 ret = ssd_ram_write(dev, kbuf, len, ofs, ctrl_idx);
9260 if (ret) {
9261 break;
9262 }
9263 }
9264
9265 kfree(kbuf);
9266
9267 break;
9268 }
9269
9270 case SSD_CMD_NAND_READ_ID: {
9271 struct ssd_flash_op_info flash_info;
9272 int chip_no, chip_ce, length, ctrl_idx;
9273
9274 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9275 hio_warn("%s: copy_from_user: failed\n", dev->name);
9276 ret = -EFAULT;
9277 break;
9278 }
9279
9280 chip_no = flash_info.flash;
9281 chip_ce = flash_info.chip;
9282 ctrl_idx = flash_info.ctrl_idx;
9283 buf = flash_info.buf;
9284 length = dev->hw_info.id_size;
9285
9286 //kbuf = kmalloc(length, GFP_KERNEL);
9287 kbuf = kmalloc(SSD_NAND_ID_BUFF_SZ, GFP_KERNEL); //xx
9288 if (!kbuf) {
9289 ret = -ENOMEM;
9290 break;
9291 }
9292 memset(kbuf, 0, length);
9293
9294 ret = ssd_nand_read_id(dev, kbuf, chip_no, chip_ce, ctrl_idx);
9295 if (ret) {
9296 kfree(kbuf);
9297 break;
9298 }
9299
9300 if (copy_to_user(buf, kbuf, length)) {
9301 kfree(kbuf);
9302 ret = -EFAULT;
9303 break;
9304 }
9305
9306 kfree(kbuf);
9307
9308 break;
9309 }
9310
9311 case SSD_CMD_NAND_READ: { //with oob
9312 struct ssd_flash_op_info flash_info;
9313 uint32_t length;
9314 int flash, chip, page, ctrl_idx;
9315 int err = 0;
9316
9317 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9318 hio_warn("%s: copy_from_user: failed\n", dev->name);
9319 ret = -EFAULT;
9320 break;
9321 }
9322
9323 flash = flash_info.flash;
9324 chip = flash_info.chip;
9325 page = flash_info.page;
9326 buf = flash_info.buf;
9327 ctrl_idx = flash_info.ctrl_idx;
9328
9329 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9330
9331 kbuf = kmalloc(length, GFP_KERNEL);
9332 if (!kbuf) {
9333 ret = -ENOMEM;
9334 break;
9335 }
9336
9337 err = ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9338 if (ret && (-EIO != ret)) {
9339 kfree(kbuf);
9340 break;
9341 }
9342
9343 if (copy_to_user(buf, kbuf, length)) {
9344 kfree(kbuf);
9345 ret = -EFAULT;
9346 break;
9347 }
9348
9349 ret = err;
9350
9351 kfree(kbuf);
9352 break;
9353 }
9354
9355 case SSD_CMD_NAND_WRITE: {
9356 struct ssd_flash_op_info flash_info;
9357 int flash, chip, page, ctrl_idx;
9358 uint32_t length;
9359
9360 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9361 hio_warn("%s: copy_from_user: failed\n", dev->name);
9362 ret = -EFAULT;
9363 break;
9364 }
9365
9366 flash = flash_info.flash;
9367 chip = flash_info.chip;
9368 page = flash_info.page;
9369 buf = flash_info.buf;
9370 ctrl_idx = flash_info.ctrl_idx;
9371
9372 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9373
9374 kbuf = kmalloc(length, GFP_KERNEL);
9375 if (!kbuf) {
9376 ret = -ENOMEM;
9377 break;
9378 }
9379
9380 if (copy_from_user(kbuf, buf, length)) {
9381 kfree(kbuf);
9382 ret = -EFAULT;
9383 break;
9384 }
9385
9386 ret = ssd_nand_write(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9387 if (ret) {
9388 kfree(kbuf);
9389 break;
9390 }
9391
9392 kfree(kbuf);
9393 break;
9394 }
9395
9396 case SSD_CMD_NAND_ERASE: {
9397 struct ssd_flash_op_info flash_info;
9398 int flash, chip, page, ctrl_idx;
9399
9400 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9401 hio_warn("%s: copy_from_user: failed\n", dev->name);
9402 ret = -EFAULT;
9403 break;
9404 }
9405
9406 flash = flash_info.flash;
9407 chip = flash_info.chip;
9408 page = flash_info.page;
9409 ctrl_idx = flash_info.ctrl_idx;
9410
9411 if ((page % dev->hw_info.page_count) != 0) {
9412 ret = -EINVAL;
9413 break;
9414 }
9415
9416 //hio_warn("erase fs = %llx\n", ofs);
9417 ret = ssd_nand_erase(dev, flash, chip, page, ctrl_idx);
9418 if (ret) {
9419 break;
9420 }
9421
9422 break;
9423 }
9424
9425 case SSD_CMD_NAND_READ_EXT: { //ingore EIO
9426 struct ssd_flash_op_info flash_info;
9427 uint32_t length;
9428 int flash, chip, page, ctrl_idx;
9429
9430 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9431 hio_warn("%s: copy_from_user: failed\n", dev->name);
9432 ret = -EFAULT;
9433 break;
9434 }
9435
9436 flash = flash_info.flash;
9437 chip = flash_info.chip;
9438 page = flash_info.page;
9439 buf = flash_info.buf;
9440 ctrl_idx = flash_info.ctrl_idx;
9441
9442 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9443
9444 kbuf = kmalloc(length, GFP_KERNEL);
9445 if (!kbuf) {
9446 ret = -ENOMEM;
9447 break;
9448 }
9449
9450 ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9451 if (-EIO == ret) { //ingore EIO
9452 ret = 0;
9453 }
9454 if (ret) {
9455 kfree(kbuf);
9456 break;
9457 }
9458
9459 if (copy_to_user(buf, kbuf, length)) {
9460 kfree(kbuf);
9461 ret = -EFAULT;
9462 break;
9463 }
9464
9465 kfree(kbuf);
9466 break;
9467 }
9468
9469 case SSD_CMD_UPDATE_BBT: {
9470 struct ssd_flash_op_info flash_info;
9471 int ctrl_idx, flash;
9472
9473 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9474 hio_warn("%s: copy_from_user: failed\n", dev->name);
9475 ret = -EFAULT;
9476 break;
9477 }
9478
9479 ctrl_idx = flash_info.ctrl_idx;
9480 flash = flash_info.flash;
9481 ret = ssd_update_bbt(dev, flash, ctrl_idx);
9482 if (ret) {
9483 break;
9484 }
9485
9486 break;
9487 }
9488
9489 case SSD_CMD_CLEAR_ALARM:
9490 ssd_clear_alarm(dev);
9491 break;
9492
9493 case SSD_CMD_SET_ALARM:
9494 ssd_set_alarm(dev);
9495 break;
9496
9497 case SSD_CMD_RESET:
9498 ret = ssd_do_reset(dev);
9499 break;
9500
9501 case SSD_CMD_RELOAD_FW:
9502 dev->reload_fw = 1;
9503 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9504 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
9505 } else if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_1_1) {
9506 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
9507
9508 }
9509 break;
9510
9511 case SSD_CMD_UNLOAD_DEV: {
9512 if (atomic_read(&dev->refcnt)) {
9513 ret = -EBUSY;
9514 break;
9515 }
9516
9517 /* save smart */
9518 ssd_save_smart(dev);
9519
9520 ret = ssd_flush(dev);
9521 if (ret) {
9522 break;
9523 }
9524
9525 /* cleanup the block device */
9526 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
9527 mutex_lock(&dev->gd_mutex);
9528 ssd_cleanup_blkdev(dev);
9529 mutex_unlock(&dev->gd_mutex);
9530 }
9531
9532 break;
9533 }
9534
9535 case SSD_CMD_LOAD_DEV: {
9536
9537 if (test_bit(SSD_INIT_BD, &dev->state)) {
9538 ret = -EINVAL;
9539 break;
9540 }
9541
9542 ret = ssd_init_smart(dev);
9543 if (ret) {
9544 hio_warn("%s: init info: failed\n", dev->name);
9545 break;
9546 }
9547
9548 ret = ssd_init_blkdev(dev);
9549 if (ret) {
9550 hio_warn("%s: register block device: failed\n", dev->name);
9551 break;
9552 }
9553 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
9554
9555 break;
9556 }
9557
9558 case SSD_CMD_UPDATE_VP: {
9559 uint32_t val;
9560 uint32_t new_vp, new_vp1 = 0;
9561
9562 if (test_bit(SSD_INIT_BD, &dev->state)) {
9563 ret = -EINVAL;
9564 break;
9565 }
9566
9567 if (copy_from_user(&new_vp, argp, sizeof(uint32_t))) {
9568 hio_warn("%s: copy_from_user: failed\n", dev->name);
9569 ret = -EFAULT;
9570 break;
9571 }
9572
9573 if (new_vp > dev->hw_info.max_valid_pages || new_vp <= 0) {
9574 ret = -EINVAL;
9575 break;
9576 }
9577
9578 while (new_vp <= dev->hw_info.max_valid_pages) {
9579 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, new_vp);
9580 msleep(10);
9581 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
9582 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9583 new_vp1 = val & 0x3FF;
9584 } else {
9585 new_vp1 = val & 0x7FFF;
9586 }
9587
9588 if (new_vp1 == new_vp) {
9589 break;
9590 }
9591
9592 new_vp++;
9593 /*if (new_vp == dev->hw_info.valid_pages) {
9594 new_vp++;
9595 }*/
9596 }
9597
9598 if (new_vp1 != new_vp || new_vp > dev->hw_info.max_valid_pages) {
9599 /* restore */
9600 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9601 ret = -EINVAL;
9602 break;
9603 }
9604
9605 if (copy_to_user(argp, &new_vp, sizeof(uint32_t))) {
9606 hio_warn("%s: copy_to_user: failed\n", dev->name);
9607 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9608 ret = -EFAULT;
9609 break;
9610 }
9611
9612 /* new */
9613 dev->hw_info.valid_pages = new_vp;
9614 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
9615 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
9616 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
9617
9618 break;
9619 }
9620
9621 case SSD_CMD_FULL_RESET: {
9622 ret = ssd_full_reset(dev);
9623 break;
9624 }
9625
9626 case SSD_CMD_GET_NR_LOG: {
9627 if (copy_to_user(argp, &dev->internal_log.nr_log, sizeof(dev->internal_log.nr_log))) {
9628 ret = -EFAULT;
9629 break;
9630 }
9631 break;
9632 }
9633
9634 case SSD_CMD_GET_LOG: {
9635 uint32_t length = dev->rom_info.log_sz;
9636
9637 buf = argp;
9638
9639 if (copy_to_user(buf, dev->internal_log.log, length)) {
9640 ret = -EFAULT;
9641 break;
9642 }
9643
9644 break;
9645 }
9646
9647 case SSD_CMD_LOG_LEVEL: {
9648 int level = 0;
9649 if (copy_from_user(&level, argp, sizeof(int))) {
9650 hio_warn("%s: copy_from_user: failed\n", dev->name);
9651 ret = -EFAULT;
9652 break;
9653 }
9654
9655 if (level >= SSD_LOG_NR_LEVEL || level < SSD_LOG_LEVEL_INFO) {
9656 level = SSD_LOG_LEVEL_ERR;
9657 }
9658
9659 //just for showing log, no need to protect
9660 log_level = level;
9661 break;
9662 }
9663
9664 case SSD_CMD_OT_PROTECT: {
9665 int protect = 0;
9666
9667 if (copy_from_user(&protect, argp, sizeof(int))) {
9668 hio_warn("%s: copy_from_user: failed\n", dev->name);
9669 ret = -EFAULT;
9670 break;
9671 }
9672
9673 ssd_set_ot_protect(dev, !!protect);
9674 break;
9675 }
9676
9677 case SSD_CMD_GET_OT_STATUS: {
9678 int status = ssd_get_ot_status(dev, &status);
9679
9680 if (copy_to_user(argp, &status, sizeof(int))) {
9681 hio_warn("%s: copy_to_user: failed\n", dev->name);
9682 ret = -EFAULT;
9683 break;
9684 }
9685 break;
9686 }
9687
9688 case SSD_CMD_CLEAR_LOG: {
9689 ret = ssd_clear_log(dev);
9690 break;
9691 }
9692
9693 case SSD_CMD_CLEAR_SMART: {
9694 ret = ssd_clear_smart(dev);
9695 break;
9696 }
9697
9698 case SSD_CMD_SW_LOG: {
9699 struct ssd_sw_log_info sw_log;
9700
9701 if (copy_from_user(&sw_log, argp, sizeof(struct ssd_sw_log_info))) {
9702 hio_warn("%s: copy_from_user: failed\n", dev->name);
9703 ret = -EFAULT;
9704 break;
9705 }
9706
9707 ret = ssd_gen_swlog(dev, sw_log.event, sw_log.data);
9708 break;
9709 }
9710
9711 case SSD_CMD_GET_LABEL: {
9712
9713 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9714 ret = -EINVAL;
9715 break;
9716 }
9717
9718 if (copy_to_user(argp, &dev->label, sizeof(struct ssd_label))) {
9719 hio_warn("%s: copy_to_user: failed\n", dev->name);
9720 ret = -EFAULT;
9721 break;
9722 }
9723 break;
9724 }
9725
9726 case SSD_CMD_GET_VERSION: {
9727 struct ssd_version_info ver;
9728
9729 mutex_lock(&dev->fw_mutex);
9730 ret = __ssd_get_version(dev, &ver);
9731 mutex_unlock(&dev->fw_mutex);
9732 if (ret) {
9733 break;
9734 }
9735
9736 if (copy_to_user(argp, &ver, sizeof(struct ssd_version_info))) {
9737 hio_warn("%s: copy_to_user: failed\n", dev->name);
9738 ret = -EFAULT;
9739 break;
9740 }
9741 break;
9742 }
9743
9744 case SSD_CMD_GET_TEMPERATURE: {
9745 int temp;
9746
9747 mutex_lock(&dev->fw_mutex);
9748 ret = __ssd_get_temperature(dev, &temp);
9749 mutex_unlock(&dev->fw_mutex);
9750 if (ret) {
9751 break;
9752 }
9753
9754 if (copy_to_user(argp, &temp, sizeof(int))) {
9755 hio_warn("%s: copy_to_user: failed\n", dev->name);
9756 ret = -EFAULT;
9757 break;
9758 }
9759 break;
9760 }
9761
9762 case SSD_CMD_GET_BMSTATUS: {
9763 int status;
9764
9765 mutex_lock(&dev->fw_mutex);
9766 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9767 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9768 status = SSD_BMSTATUS_WARNING;
9769 } else {
9770 status = SSD_BMSTATUS_OK;
9771 }
9772 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
9773 ret = __ssd_bm_status(dev, &status);
9774 } else {
9775 status = SSD_BMSTATUS_OK;
9776 }
9777 mutex_unlock(&dev->fw_mutex);
9778 if (ret) {
9779 break;
9780 }
9781
9782 if (copy_to_user(argp, &status, sizeof(int))) {
9783 hio_warn("%s: copy_to_user: failed\n", dev->name);
9784 ret = -EFAULT;
9785 break;
9786 }
9787 break;
9788 }
9789
9790 case SSD_CMD_GET_LABEL2: {
9791 void *label;
9792 int length;
9793
9794 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9795 label = &dev->label;
9796 length = sizeof(struct ssd_label);
9797 } else {
9798 label = &dev->labelv3;
9799 length = sizeof(struct ssd_labelv3);
9800 }
9801
9802 if (copy_to_user(argp, label, length)) {
9803 ret = -EFAULT;
9804 break;
9805 }
9806 break;
9807 }
9808
9809 case SSD_CMD_FLUSH:
9810 ret = ssd_flush(dev);
9811 if (ret) {
9812 hio_warn("%s: ssd_flush: failed\n", dev->name);
9813 ret = -EFAULT;
9814 break;
9815 }
9816 break;
9817
9818 case SSD_CMD_SAVE_MD: {
9819 int save_md = 0;
9820
9821 if (copy_from_user(&save_md, argp, sizeof(int))) {
9822 hio_warn("%s: copy_from_user: failed\n", dev->name);
9823 ret = -EFAULT;
9824 break;
9825 }
9826
9827 dev->save_md = !!save_md;
9828 break;
9829 }
9830
9831 case SSD_CMD_SET_WMODE: {
9832 int new_wmode = 0;
9833
9834 if (copy_from_user(&new_wmode, argp, sizeof(int))) {
9835 hio_warn("%s: copy_from_user: failed\n", dev->name);
9836 ret = -EFAULT;
9837 break;
9838 }
9839
9840 ret = __ssd_set_wmode(dev, new_wmode);
9841 if (ret) {
9842 break;
9843 }
9844
9845 break;
9846 }
9847
9848 case SSD_CMD_GET_WMODE: {
9849 if (copy_to_user(argp, &dev->wmode, sizeof(int))) {
9850 hio_warn("%s: copy_to_user: failed\n", dev->name);
9851 ret = -EFAULT;
9852 break;
9853 }
9854
9855 break;
9856 }
9857
9858 case SSD_CMD_GET_USER_WMODE: {
9859 if (copy_to_user(argp, &dev->user_wmode, sizeof(int))) {
9860 hio_warn("%s: copy_to_user: failed\n", dev->name);
9861 ret = -EFAULT;
9862 break;
9863 }
9864
9865 break;
9866 }
9867
9868 case SSD_CMD_DEBUG: {
9869 struct ssd_debug_info db_info;
9870
9871 if (!finject) {
9872 ret = -EOPNOTSUPP;
9873 break;
9874 }
9875
9876 if (copy_from_user(&db_info, argp, sizeof(struct ssd_debug_info))) {
9877 hio_warn("%s: copy_from_user: failed\n", dev->name);
9878 ret = -EFAULT;
9879 break;
9880 }
9881
9882 if (db_info.type < SSD_DEBUG_NONE || db_info.type >= SSD_DEBUG_NR) {
9883 ret = -EINVAL;
9884 break;
9885 }
9886
9887 /* IO */
9888 if (db_info.type >= SSD_DEBUG_READ_ERR && db_info.type <= SSD_DEBUG_RW_ERR &&
9889 (db_info.data.loc.off + db_info.data.loc.len) > (dev->hw_info.size >> 9)) {
9890 ret = -EINVAL;
9891 break;
9892 }
9893
9894 memcpy(&dev->db_info, &db_info, sizeof(struct ssd_debug_info));
9895
9896#ifdef SSD_OT_PROTECT
9897 /* temperature */
9898 if (db_info.type == SSD_DEBUG_NONE) {
9899 ssd_check_temperature(dev, SSD_OT_TEMP);
9900 } else if (db_info.type == SSD_DEBUG_LOG) {
9901 if (db_info.data.log.event == SSD_LOG_OVER_TEMP) {
9902 dev->ot_delay = SSD_OT_DELAY;
9903 } else if (db_info.data.log.event == SSD_LOG_NORMAL_TEMP) {
9904 dev->ot_delay = 0;
9905 }
9906 }
9907#endif
9908
9909 /* offline */
9910 if (db_info.type == SSD_DEBUG_OFFLINE) {
9911 test_and_clear_bit(SSD_ONLINE, &dev->state);
9912 } else if (db_info.type == SSD_DEBUG_NONE) {
9913 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
9914 }
9915
9916 /* log */
9917 if (db_info.type == SSD_DEBUG_LOG && dev->event_call && dev->gd) {
9918 dev->event_call(dev->gd, db_info.data.log.event, 0);
9919 }
9920
9921 break;
9922 }
9923
9924 case SSD_CMD_DRV_PARAM_INFO: {
9925 struct ssd_drv_param_info drv_param;
9926
9927 memset(&drv_param, 0, sizeof(struct ssd_drv_param_info));
9928
9929 drv_param.mode = mode;
9930 drv_param.status_mask = status_mask;
9931 drv_param.int_mode = int_mode;
9932 drv_param.threaded_irq = threaded_irq;
9933 drv_param.log_level = log_level;
9934 drv_param.wmode = wmode;
9935 drv_param.ot_protect = ot_protect;
9936 drv_param.finject = finject;
9937
9938 if (copy_to_user(argp, &drv_param, sizeof(struct ssd_drv_param_info))) {
9939 hio_warn("%s: copy_to_user: failed\n", dev->name);
9940 ret = -EFAULT;
9941 break;
9942 }
9943 break;
9944 }
9945
9946 default:
9947 ret = -EINVAL;
9948 break;
9949 }
9950
9951 return ret;
9952}
9953
9954
9955#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9956static int ssd_block_ioctl(struct inode *inode, struct file *file,
9957 unsigned int cmd, unsigned long arg)
9958{
9959 struct ssd_device *dev;
9960 void __user *argp = (void __user *)arg;
9961 int ret = 0;
9962
9963 if (!inode) {
9964 return -EINVAL;
9965 }
9966 dev = inode->i_bdev->bd_disk->private_data;
9967 if (!dev) {
9968 return -EINVAL;
9969 }
9970#else
9971static int ssd_block_ioctl(struct block_device *bdev, fmode_t mode,
9972 unsigned int cmd, unsigned long arg)
9973{
9974 struct ssd_device *dev;
9975 void __user *argp = (void __user *)arg;
9976 int ret = 0;
9977
9978 if (!bdev) {
9979 return -EINVAL;
9980 }
9981
9982 dev = bdev->bd_disk->private_data;
9983 if (!dev) {
9984 return -EINVAL;
9985 }
9986#endif
9987
9988 switch (cmd) {
9989 case HDIO_GETGEO: {
9990 struct hd_geometry geo;
9991 geo.cylinders = (dev->hw_info.size & ~0x3f) >> 6;
9992 geo.heads = 4;
9993 geo.sectors = 16;
9994#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9995 geo.start = get_start_sect(inode->i_bdev);
9996#else
9997 geo.start = get_start_sect(bdev);
9998#endif
9999 if (copy_to_user(argp, &geo, sizeof(geo))) {
10000 ret = -EFAULT;
10001 break;
10002 }
10003
10004 break;
10005 }
10006
10007 case BLKFLSBUF:
10008 ret = ssd_flush(dev);
10009 if (ret) {
10010 hio_warn("%s: ssd_flush: failed\n", dev->name);
10011 ret = -EFAULT;
10012 break;
10013 }
10014 break;
10015
10016 default:
10017 if (!dev->slave) {
10018 ret = ssd_ioctl_common(dev, cmd, arg);
10019 } else {
10020 ret = -EFAULT;
10021 }
10022 break;
10023 }
10024
10025 return ret;
10026}
10027
10028
10029static void ssd_free_dev(struct kref *kref)
10030{
10031 struct ssd_device *dev;
10032
10033 if (!kref) {
10034 return;
10035 }
10036
10037 dev = container_of(kref, struct ssd_device, kref);
10038
10039 put_disk(dev->gd);
10040
10041 ssd_put_index(dev->slave, dev->idx);
10042
10043 kfree(dev);
10044}
10045
10046static void ssd_put(struct ssd_device *dev)
10047{
10048 kref_put(&dev->kref, ssd_free_dev);
10049}
10050
10051static int ssd_get(struct ssd_device *dev)
10052{
10053 kref_get(&dev->kref);
10054 return 0;
10055}
10056
10057/* block device */
10058#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10059static int ssd_block_open(struct inode *inode, struct file *filp)
10060{
10061 struct ssd_device *dev;
10062
10063 if (!inode) {
10064 return -EINVAL;
10065 }
10066
10067 dev = inode->i_bdev->bd_disk->private_data;
10068 if (!dev) {
10069 return -EINVAL;
10070 }
10071#else
10072static int ssd_block_open(struct block_device *bdev, fmode_t mode)
10073{
10074 struct ssd_device *dev;
10075
10076 if (!bdev) {
10077 return -EINVAL;
10078 }
10079
10080 dev = bdev->bd_disk->private_data;
10081 if (!dev) {
10082 return -EINVAL;
10083 }
10084#endif
10085
10086 /*if (!try_module_get(dev->owner))
10087 return -ENODEV;
10088 */
10089
10090 ssd_get(dev);
10091
10092 atomic_inc(&dev->refcnt);
10093
10094 return 0;
10095}
10096
10097#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10098static int ssd_block_release(struct inode *inode, struct file *filp)
10099{
10100 struct ssd_device *dev;
10101
10102 if (!inode) {
10103 return -EINVAL;
10104 }
10105
10106 dev = inode->i_bdev->bd_disk->private_data;
10107 if (!dev) {
10108 return -EINVAL;
10109 }
10110#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10111static int ssd_block_release(struct gendisk *disk, fmode_t mode)
10112{
10113 struct ssd_device *dev;
10114
10115 if (!disk) {
10116 return -EINVAL;
10117 }
10118
10119 dev = disk->private_data;
10120 if (!dev) {
10121 return -EINVAL;
10122 }
10123#else
10124static void ssd_block_release(struct gendisk *disk, fmode_t mode)
10125{
10126 struct ssd_device *dev;
10127
10128 if (!disk) {
10129 return;
10130 }
10131
10132 dev = disk->private_data;
10133 if (!dev) {
10134 return;
10135 }
10136#endif
10137
10138 atomic_dec(&dev->refcnt);
10139
10140 ssd_put(dev);
10141
10142 //module_put(dev->owner);
10143#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10144 return 0;
10145#endif
10146}
10147
10148static struct block_device_operations ssd_fops = {
10149 .owner = THIS_MODULE,
10150 .open = ssd_block_open,
10151 .release = ssd_block_release,
10152 .ioctl = ssd_block_ioctl,
10153#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
10154 .getgeo = ssd_block_getgeo,
10155#endif
10156};
10157
10158static void ssd_init_trim(ssd_device_t *dev)
10159{
10160#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
10161 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10162 return;
10163 }
10164 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, dev->rq);
10165
10166#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6))
10167 dev->rq->limits.discard_zeroes_data = 1;
10168 dev->rq->limits.discard_alignment = 4096;
10169 dev->rq->limits.discard_granularity = 4096;
10170#endif
10171 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_4) {
10172 dev->rq->limits.max_discard_sectors = dev->hw_info.sg_max_sec;
10173 } else {
10174 dev->rq->limits.max_discard_sectors = (dev->hw_info.sg_max_sec) * (dev->hw_info.cmd_max_sg);
10175 }
10176#endif
10177}
10178
10179static void ssd_cleanup_queue(struct ssd_device *dev)
10180{
10181 ssd_wait_io(dev);
10182
10183 blk_cleanup_queue(dev->rq);
10184 dev->rq = NULL;
10185}
10186
10187static int ssd_init_queue(struct ssd_device *dev)
10188{
10189 dev->rq = blk_alloc_queue(GFP_KERNEL);
10190 if (dev->rq == NULL) {
10191 hio_warn("%s: alloc queue: failed\n ", dev->name);
10192 goto out_init_queue;
10193 }
10194
10195 /* must be first */
10196 blk_queue_make_request(dev->rq, ssd_make_request);
10197
10198#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) && !(defined RHEL_MAJOR && RHEL_MAJOR == 6))
10199 blk_queue_max_hw_segments(dev->rq, dev->hw_info.cmd_max_sg);
10200 blk_queue_max_phys_segments(dev->rq, dev->hw_info.cmd_max_sg);
10201 blk_queue_max_sectors(dev->rq, dev->hw_info.sg_max_sec);
10202#else
10203 blk_queue_max_segments(dev->rq, dev->hw_info.cmd_max_sg);
10204 blk_queue_max_hw_sectors(dev->rq, dev->hw_info.sg_max_sec);
10205#endif
10206
10207#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
10208 blk_queue_hardsect_size(dev->rq, 512);
10209#else
10210 blk_queue_logical_block_size(dev->rq, 512);
10211#endif
10212 /* not work for make_request based drivers(bio) */
10213 blk_queue_max_segment_size(dev->rq, dev->hw_info.sg_max_sec << 9);
10214
10215 blk_queue_bounce_limit(dev->rq, BLK_BOUNCE_HIGH);
10216
10217 dev->rq->queuedata = dev;
10218
10219#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
10220 blk_queue_issue_flush_fn(dev->rq, ssd_issue_flush_fn);
10221#endif
10222
10223#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
10224 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, dev->rq);
10225#endif
10226
10227 ssd_init_trim(dev);
10228
10229 return 0;
10230
10231out_init_queue:
10232 return -ENOMEM;
10233}
10234
10235static void ssd_cleanup_blkdev(struct ssd_device *dev)
10236{
10237 del_gendisk(dev->gd);
10238}
10239
10240static int ssd_init_blkdev(struct ssd_device *dev)
10241{
10242 if (dev->gd) {
10243 put_disk(dev->gd);
10244 }
10245
10246 dev->gd = alloc_disk(ssd_minors);
10247 if (!dev->gd) {
10248 hio_warn("%s: alloc_disk fail\n", dev->name);
10249 goto out_alloc_gd;
10250 }
10251 dev->gd->major = dev->major;
10252 dev->gd->first_minor = dev->idx * ssd_minors;
10253 dev->gd->fops = &ssd_fops;
10254 dev->gd->queue = dev->rq;
10255 dev->gd->private_data = dev;
195d6988 10256#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0))
a6a796ca 10257 dev->gd->driverfs_dev = &dev->pdev->dev;
195d6988 10258#endif
a6a796ca
HSDT
10259 snprintf (dev->gd->disk_name, sizeof(dev->gd->disk_name), "%s", dev->name);
10260
10261 set_capacity(dev->gd, dev->hw_info.size >> 9);
10262
195d6988 10263#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,8,0))
a6a796ca 10264 add_disk(dev->gd);
195d6988
AW
10265#else
10266 device_add_disk(&dev->pdev->dev, dev->gd);
10267#endif
a6a796ca
HSDT
10268
10269 return 0;
10270
10271out_alloc_gd:
10272 return -ENOMEM;
10273}
10274
10275#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10276static int ssd_ioctl(struct inode *inode, struct file *file,
10277 unsigned int cmd, unsigned long arg)
10278#else
10279static long ssd_ioctl(struct file *file,
10280 unsigned int cmd, unsigned long arg)
10281#endif
10282{
10283 struct ssd_device *dev;
10284
10285 if (!file) {
10286 return -EINVAL;
10287 }
10288
10289 dev = file->private_data;
10290 if (!dev) {
10291 return -EINVAL;
10292 }
10293
10294 return (long)ssd_ioctl_common(dev, cmd, arg);
10295}
10296
10297static int ssd_open(struct inode *inode, struct file *file)
10298{
10299 struct ssd_device *dev = NULL;
10300 struct ssd_device *n = NULL;
10301 int idx;
10302 int ret = -ENODEV;
10303
10304 if (!inode || !file) {
10305 return -EINVAL;
10306 }
10307
10308 idx = iminor(inode);
10309
10310 list_for_each_entry_safe(dev, n, &ssd_list, list) {
10311 if (dev->idx == idx) {
10312 ret = 0;
10313 break;
10314 }
10315 }
10316
10317 if (ret) {
10318 return ret;
10319 }
10320
10321 file->private_data = dev;
10322
10323 ssd_get(dev);
10324
10325 return 0;
10326}
10327
10328static int ssd_release(struct inode *inode, struct file *file)
10329{
10330 struct ssd_device *dev;
10331
10332 if (!file) {
10333 return -EINVAL;
10334 }
10335
10336 dev = file->private_data;
10337 if (!dev) {
10338 return -EINVAL;
10339 }
10340
10341 ssd_put(dev);
10342
10343 file->private_data = NULL;
10344
10345 return 0;
10346}
10347
10348static struct file_operations ssd_cfops = {
10349 .owner = THIS_MODULE,
10350 .open = ssd_open,
10351 .release = ssd_release,
10352#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10353 .ioctl = ssd_ioctl,
10354#else
10355 .unlocked_ioctl = ssd_ioctl,
10356#endif
10357};
10358
10359static void ssd_cleanup_chardev(struct ssd_device *dev)
10360{
10361 if (dev->slave) {
10362 return;
10363 }
10364
10365#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10366 class_simple_device_remove(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10367 devfs_remove("c%s", dev->name);
10368#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10369 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10370 devfs_remove("c%s", dev->name);
10371#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10372 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10373 devfs_remove("c%s", dev->name);
10374#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10375 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10376#else
10377 device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10378#endif
10379}
10380
10381static int ssd_init_chardev(struct ssd_device *dev)
10382{
10383 int ret = 0;
10384
10385 if (dev->slave) {
10386 return 0;
10387 }
10388
10389#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10390 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10391 if (ret) {
10392 goto out;
10393 }
10394 class_simple_device_add(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10395out:
10396#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10397 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10398 if (ret) {
10399 goto out;
10400 }
10401 class_device_create(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10402out:
10403#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10404 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10405 if (ret) {
10406 goto out;
10407 }
10408 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10409out:
10410#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10411 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10412#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
10413 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), "c%s", dev->name);
10414#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10415 device_create_drvdata(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10416#else
10417 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10418#endif
10419
10420 return ret;
10421}
10422
10423static int ssd_check_hw(struct ssd_device *dev)
10424{
10425 uint32_t test_data = 0x55AA5AA5;
10426 uint32_t read_data;
10427
10428 ssd_reg32_write(dev->ctrlp + SSD_BRIDGE_TEST_REG, test_data);
10429 read_data = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_TEST_REG);
10430 if (read_data != ~(test_data)) {
10431 //hio_warn("%s: check bridge error: %#x\n", dev->name, read_data);
10432 return -1;
10433 }
10434
10435 return 0;
10436}
10437
10438static int ssd_check_fw(struct ssd_device *dev)
10439{
10440 uint32_t val = 0;
10441 int i;
10442
10443 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10444 return 0;
10445 }
10446
10447 for (i=0; i<SSD_CONTROLLER_WAIT; i++) {
10448 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10449 if ((val & 0x1) && ((val >> 8) & 0x1)) {
10450 break;
10451 }
10452
10453 msleep(SSD_INIT_WAIT);
10454 }
10455
10456 if (!(val & 0x1)) {
10457 /* controller fw status */
10458 hio_warn("%s: controller firmware load failed: %#x\n", dev->name, val);
10459 return -1;
10460 } else if (!((val >> 8) & 0x1)) {
10461 /* controller state */
10462 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10463 return -1;
10464 }
10465
10466 val = ssd_reg32_read(dev->ctrlp + SSD_RELOAD_FW_REG);
10467 if (val) {
10468 dev->reload_fw = 1;
10469 }
10470
10471 return 0;
10472}
10473
10474static int ssd_init_fw_info(struct ssd_device *dev)
10475{
10476 uint32_t val;
10477 int ret = 0;
10478
10479 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_VER_REG);
10480 dev->hw_info.bridge_ver = val & 0xFFF;
10481 if (dev->hw_info.bridge_ver < SSD_FW_MIN) {
10482 hio_warn("%s: bridge firmware version %03X is not supported\n", dev->name, dev->hw_info.bridge_ver);
10483 return -EINVAL;
10484 }
10485 hio_info("%s: bridge firmware version: %03X\n", dev->name, dev->hw_info.bridge_ver);
10486
10487 ret = ssd_check_fw(dev);
10488 if (ret) {
10489 goto out;
10490 }
10491
10492out:
10493 /* skip error if not in standard mode */
10494 if (mode != SSD_DRV_MODE_STANDARD) {
10495 ret = 0;
10496 }
10497 return ret;
10498}
10499
10500static int ssd_check_clock(struct ssd_device *dev)
10501{
10502 uint32_t val;
10503 int ret = 0;
10504
10505 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10506 return 0;
10507 }
10508
10509 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10510
10511 /* clock status */
10512 if (!((val >> 4 ) & 0x1)) {
10513 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_LOST), &dev->hwmon)) {
10514 hio_warn("%s: 166MHz clock losed: %#x\n", dev->name, val);
10515 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10516 }
10517 ret = -1;
10518 }
10519
10520 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
10521 if (!((val >> 5 ) & 0x1)) {
10522 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_SKEW), &dev->hwmon)) {
10523 hio_warn("%s: 166MHz clock is skew: %#x\n", dev->name, val);
10524 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10525 }
10526 ret = -1;
10527 }
10528 if (!((val >> 6 ) & 0x1)) {
10529 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_LOST), &dev->hwmon)) {
10530 hio_warn("%s: 156.25MHz clock lost: %#x\n", dev->name, val);
10531 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10532 }
10533 ret = -1;
10534 }
10535 if (!((val >> 7 ) & 0x1)) {
10536 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_SKEW), &dev->hwmon)) {
10537 hio_warn("%s: 156.25MHz clock is skew: %#x\n", dev->name, val);
10538 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10539 }
10540 ret = -1;
10541 }
10542 }
10543
10544 return ret;
10545}
10546
10547static int ssd_check_volt(struct ssd_device *dev)
10548{
10549 int i = 0;
10550 uint64_t val;
10551 uint32_t adc_val;
10552 int ret =0;
10553
10554 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10555 return 0;
10556 }
10557
10558 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10559 /* 1.0v */
10560 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon)) {
10561 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V0_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10562 adc_val = SSD_FPGA_VOLT_MAX(val);
10563 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10564 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10565 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10566 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10567 ret = -1;
10568 }
10569
10570 adc_val = SSD_FPGA_VOLT_MIN(val);
10571 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10572 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10573 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10574 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10575 ret = -2;
10576 }
10577 }
10578
10579 /* 1.8v */
10580 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon)) {
10581 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V8_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10582 adc_val = SSD_FPGA_VOLT_MAX(val);
10583 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10584 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10585 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10586 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10587 ret = -3;
10588 }
10589
10590 adc_val = SSD_FPGA_VOLT_MIN(val);
10591 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10592 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10593 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10594 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10595 ret = -4;
10596 }
10597 }
10598 }
10599
10600 return ret;
10601}
10602
10603static int ssd_check_reset_sync(struct ssd_device *dev)
10604{
10605 uint32_t val;
10606
10607 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10608 return 0;
10609 }
10610
10611 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10612 if (!((val >> 8) & 0x1)) {
10613 /* controller state */
10614 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10615 return -1;
10616 }
10617
10618 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10619 return 0;
10620 }
10621
10622 if (((val >> 9 ) & 0x1)) {
10623 hio_warn("%s: controller reset asynchronously: %#x\n", dev->name, val);
10624 ssd_gen_swlog(dev, SSD_LOG_CTRL_RST_SYNC, val);
10625 return -1;
10626 }
10627
10628 return 0;
10629}
10630
10631static int ssd_check_hw_bh(struct ssd_device *dev)
10632{
10633 int ret;
10634
10635 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10636 return 0;
10637 }
10638
10639 /* clock status */
10640 ret = ssd_check_clock(dev);
10641 if (ret) {
10642 goto out;
10643 }
10644
10645out:
10646 /* skip error if not in standard mode */
10647 if (mode != SSD_DRV_MODE_STANDARD) {
10648 ret = 0;
10649 }
10650 return ret;
10651}
10652
10653static int ssd_check_controller(struct ssd_device *dev)
10654{
10655 int ret;
10656
10657 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10658 return 0;
10659 }
10660
10661 /* sync reset */
10662 ret = ssd_check_reset_sync(dev);
10663 if (ret) {
10664 goto out;
10665 }
10666
10667out:
10668 /* skip error if not in standard mode */
10669 if (mode != SSD_DRV_MODE_STANDARD) {
10670 ret = 0;
10671 }
10672 return ret;
10673}
10674
10675static int ssd_check_controller_bh(struct ssd_device *dev)
10676{
10677 uint32_t test_data = 0x55AA5AA5;
10678 uint32_t val;
10679 int reg_base, reg_sz;
10680 int init_wait = 0;
10681 int i;
10682 int ret = 0;
10683
10684 if (mode != SSD_DRV_MODE_STANDARD) {
10685 return 0;
10686 }
10687
10688 /* controller */
10689 val = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
10690 if (val & 0x1) {
10691 hio_warn("%s: controller 0 not ready\n", dev->name);
10692 return -1;
10693 }
10694
10695 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10696 reg_base = SSD_CTRL_TEST_REG0 + i * SSD_CTRL_TEST_REG_SZ;
10697 ssd_reg32_write(dev->ctrlp + reg_base, test_data);
10698 val = ssd_reg32_read(dev->ctrlp + reg_base);
10699 if (val != ~(test_data)) {
10700 hio_warn("%s: check controller %d error: %#x\n", dev->name, i, val);
10701 return -1;
10702 }
10703 }
10704
10705 /* clock */
10706 ret = ssd_check_volt(dev);
10707 if (ret) {
10708 return ret;
10709 }
10710
10711 /* ddr */
10712 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
10713 reg_base = SSD_PV3_RAM_STATUS_REG0;
10714 reg_sz = SSD_PV3_RAM_STATUS_REG_SZ;
10715
10716 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10717check_ram_status:
10718 val = ssd_reg32_read(dev->ctrlp + reg_base);
10719
10720 if (!((val >> 1) & 0x1)) {
10721 init_wait++;
10722 if (init_wait <= SSD_RAM_INIT_MAX_WAIT) {
10723 msleep(SSD_INIT_WAIT);
10724 goto check_ram_status;
10725 } else {
10726 hio_warn("%s: controller %d ram init failed: %#x\n", dev->name, i, val);
10727 ssd_gen_swlog(dev, SSD_LOG_DDR_INIT_ERR, i);
10728 return -1;
10729 }
10730 }
10731
10732 reg_base += reg_sz;
10733 }
10734 }
10735
10736 /* ch info */
10737 for (i=0; i<SSD_CH_INFO_MAX_WAIT; i++) {
10738 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10739 if (!((val >> 31) & 0x1)) {
10740 break;
10741 }
10742
10743 msleep(SSD_INIT_WAIT);
10744 }
10745 if ((val >> 31) & 0x1) {
10746 hio_warn("%s: channel info init failed: %#x\n", dev->name, val);
10747 return -1;
10748 }
10749
10750 return 0;
10751}
10752
10753static int ssd_init_protocol_info(struct ssd_device *dev)
10754{
10755 uint32_t val;
10756
10757 val = ssd_reg32_read(dev->ctrlp + SSD_PROTOCOL_VER_REG);
10758 if (val == (uint32_t)-1) {
10759 hio_warn("%s: protocol version error: %#x\n", dev->name, val);
10760 return -EINVAL;
10761 }
10762 dev->protocol_info.ver = val;
10763
10764 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10765 dev->protocol_info.init_state_reg = SSD_INIT_STATE_REG0;
10766 dev->protocol_info.init_state_reg_sz = SSD_INIT_STATE_REG_SZ;
10767
10768 dev->protocol_info.chip_info_reg = SSD_CHIP_INFO_REG0;
10769 dev->protocol_info.chip_info_reg_sz = SSD_CHIP_INFO_REG_SZ;
10770 } else {
10771 dev->protocol_info.init_state_reg = SSD_PV3_INIT_STATE_REG0;
10772 dev->protocol_info.init_state_reg_sz = SSD_PV3_INIT_STATE_REG_SZ;
10773
10774 dev->protocol_info.chip_info_reg = SSD_PV3_CHIP_INFO_REG0;
10775 dev->protocol_info.chip_info_reg_sz = SSD_PV3_CHIP_INFO_REG_SZ;
10776 }
10777
10778 return 0;
10779}
10780
10781static int ssd_init_hw_info(struct ssd_device *dev)
10782{
10783 uint64_t val64;
10784 uint32_t val;
10785 uint32_t nr_ctrl;
10786 int ret = 0;
10787
10788 /* base info */
10789 val = ssd_reg32_read(dev->ctrlp + SSD_RESP_INFO_REG);
10790 dev->hw_info.resp_ptr_sz = 16 * (1U << (val & 0xFF));
10791 dev->hw_info.resp_msg_sz = 16 * (1U << ((val >> 8) & 0xFF));
10792
10793 if (0 == dev->hw_info.resp_ptr_sz || 0 == dev->hw_info.resp_msg_sz) {
10794 hio_warn("%s: response info error\n", dev->name);
10795 ret = -EINVAL;
10796 goto out;
10797 }
10798
10799 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10800 dev->hw_info.cmd_fifo_sz = 1U << ((val >> 4) & 0xF);
10801 dev->hw_info.cmd_max_sg = 1U << ((val >> 8) & 0xF);
10802 dev->hw_info.sg_max_sec = 1U << ((val >> 12) & 0xF);
10803 dev->hw_info.cmd_fifo_sz_mask = dev->hw_info.cmd_fifo_sz - 1;
10804
10805 if (0 == dev->hw_info.cmd_fifo_sz || 0 == dev->hw_info.cmd_max_sg || 0 == dev->hw_info.sg_max_sec) {
10806 hio_warn("%s: cmd info error\n", dev->name);
10807 ret = -EINVAL;
10808 goto out;
10809 }
10810
10811 /* check hw */
10812 if (ssd_check_hw_bh(dev)) {
10813 hio_warn("%s: check hardware status failed\n", dev->name);
10814 ret = -EINVAL;
10815 goto out;
10816 }
10817
10818 if (ssd_check_controller(dev)) {
10819 hio_warn("%s: check controller state failed\n", dev->name);
10820 ret = -EINVAL;
10821 goto out;
10822 }
10823
10824 /* nr controller : read again*/
10825 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10826 dev->hw_info.nr_ctrl = (val >> 16) & 0xF;
10827
10828 /* nr ctrl configured */
10829 nr_ctrl = (val >> 20) & 0xF;
10830 if (0 == dev->hw_info.nr_ctrl) {
10831 hio_warn("%s: nr controller error: %u\n", dev->name, dev->hw_info.nr_ctrl);
10832 ret = -EINVAL;
10833 goto out;
10834 } else if (0 != nr_ctrl && nr_ctrl != dev->hw_info.nr_ctrl) {
10835 hio_warn("%s: nr controller error: configured %u but found %u\n", dev->name, nr_ctrl, dev->hw_info.nr_ctrl);
10836 if (mode <= SSD_DRV_MODE_STANDARD) {
10837 ret = -EINVAL;
10838 goto out;
10839 }
10840 }
10841
10842 if (ssd_check_controller_bh(dev)) {
10843 hio_warn("%s: check controller failed\n", dev->name);
10844 ret = -EINVAL;
10845 goto out;
10846 }
10847
10848 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
10849 dev->hw_info.pcb_ver = (uint8_t) ((val >> 4) & 0xF) + 'A' -1;
10850 if ((val & 0xF) != 0xF) {
10851 dev->hw_info.upper_pcb_ver = (uint8_t) (val & 0xF) + 'A' -1;
10852 }
10853
10854 if (dev->hw_info.pcb_ver < 'A' || (0 != dev->hw_info.upper_pcb_ver && dev->hw_info.upper_pcb_ver < 'A')) {
10855 hio_warn("%s: PCB version error: %#x %#x\n", dev->name, dev->hw_info.pcb_ver, dev->hw_info.upper_pcb_ver);
10856 ret = -EINVAL;
10857 goto out;
10858 }
10859
10860 /* channel info */
10861 if (mode <= SSD_DRV_MODE_DEBUG) {
10862 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10863 dev->hw_info.nr_data_ch = val & 0xFF;
10864 dev->hw_info.nr_ch = dev->hw_info.nr_data_ch + ((val >> 8) & 0xFF);
10865 dev->hw_info.nr_chip = (val >> 16) & 0xFF;
10866
10867 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10868 dev->hw_info.max_ch = 1;
10869 while (dev->hw_info.max_ch < dev->hw_info.nr_ch) dev->hw_info.max_ch <<= 1;
10870 } else {
10871 /* set max channel 32 */
10872 dev->hw_info.max_ch = 32;
10873 }
10874
10875 if (0 == dev->hw_info.nr_chip) {
10876 //for debug mode
10877 dev->hw_info.nr_chip = 1;
10878 }
10879
10880 //xx
10881 dev->hw_info.id_size = SSD_NAND_ID_SZ;
10882 dev->hw_info.max_ce = SSD_NAND_MAX_CE;
10883
10884 if (0 == dev->hw_info.nr_data_ch || 0 == dev->hw_info.nr_ch || 0 == dev->hw_info.nr_chip) {
10885 hio_warn("%s: channel info error: data_ch %u ch %u chip %u\n", dev->name, dev->hw_info.nr_data_ch, dev->hw_info.nr_ch, dev->hw_info.nr_chip);
10886 ret = -EINVAL;
10887 goto out;
10888 }
10889 }
10890
10891 /* ram info */
10892 if (mode <= SSD_DRV_MODE_DEBUG) {
10893 val = ssd_reg32_read(dev->ctrlp + SSD_RAM_INFO_REG);
10894 dev->hw_info.ram_size = 0x4000000ull * (1ULL << (val & 0xF));
10895 dev->hw_info.ram_align = 1U << ((val >> 12) & 0xF);
10896 if (dev->hw_info.ram_align < SSD_RAM_ALIGN) {
10897 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10898 dev->hw_info.ram_align = SSD_RAM_ALIGN;
10899 } else {
10900 hio_warn("%s: ram align error: %u\n", dev->name, dev->hw_info.ram_align);
10901 ret = -EINVAL;
10902 goto out;
10903 }
10904 }
10905 dev->hw_info.ram_max_len = 0x1000 * (1U << ((val >> 16) & 0xF));
10906
10907 if (0 == dev->hw_info.ram_size || 0 == dev->hw_info.ram_align || 0 == dev->hw_info.ram_max_len || dev->hw_info.ram_align > dev->hw_info.ram_max_len) {
10908 hio_warn("%s: ram info error\n", dev->name);
10909 ret = -EINVAL;
10910 goto out;
10911 }
10912
10913 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10914 dev->hw_info.log_sz = SSD_LOG_MAX_SZ;
10915 } else {
10916 val = ssd_reg32_read(dev->ctrlp + SSD_LOG_INFO_REG);
10917 dev->hw_info.log_sz = 0x1000 * (1U << (val & 0xFF));
10918 }
10919 if (0 == dev->hw_info.log_sz) {
10920 hio_warn("%s: log size error\n", dev->name);
10921 ret = -EINVAL;
10922 goto out;
10923 }
10924
10925 val = ssd_reg32_read(dev->ctrlp + SSD_BBT_BASE_REG);
10926 dev->hw_info.bbt_base = 0x40000ull * (val & 0xFFFF);
10927 dev->hw_info.bbt_size = 0x40000 * (((val >> 16) & 0xFFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10928 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10929 if (dev->hw_info.bbt_base > dev->hw_info.ram_size || 0 == dev->hw_info.bbt_size) {
10930 hio_warn("%s: bbt info error\n", dev->name);
10931 ret = -EINVAL;
10932 goto out;
10933 }
10934 }
10935
10936 val = ssd_reg32_read(dev->ctrlp + SSD_ECT_BASE_REG);
10937 dev->hw_info.md_base = 0x40000ull * (val & 0xFFFF);
10938 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10939 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10940 } else {
10941 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.nr_chip);
10942 }
10943 dev->hw_info.md_entry_sz = 8 * (1U << ((val >> 28) & 0xF));
10944 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3) {
10945 if (dev->hw_info.md_base > dev->hw_info.ram_size || 0 == dev->hw_info.md_size ||
10946 0 == dev->hw_info.md_entry_sz || dev->hw_info.md_entry_sz > dev->hw_info.md_size) {
10947 hio_warn("%s: md info error\n", dev->name);
10948 ret = -EINVAL;
10949 goto out;
10950 }
10951 }
10952
10953 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10954 dev->hw_info.nand_wbuff_base = dev->hw_info.ram_size + 1;
10955 } else {
10956 val = ssd_reg32_read(dev->ctrlp + SSD_NAND_BUFF_BASE);
10957 dev->hw_info.nand_wbuff_base = 0x8000ull * val;
10958 }
10959 }
10960
10961 /* flash info */
10962 if (mode <= SSD_DRV_MODE_DEBUG) {
10963 if (dev->hw_info.nr_ctrl > 1) {
10964 val = ssd_reg32_read(dev->ctrlp + SSD_CTRL_VER_REG);
10965 dev->hw_info.ctrl_ver = val & 0xFFF;
10966 hio_info("%s: controller firmware version: %03X\n", dev->name, dev->hw_info.ctrl_ver);
10967 }
10968
10969 val64 = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
10970 dev->hw_info.nand_vendor_id = ((val64 >> 56) & 0xFF);
10971 dev->hw_info.nand_dev_id = ((val64 >> 48) & 0xFF);
10972
10973 dev->hw_info.block_count = (((val64 >> 32) & 0xFFFF) + 1);
10974 dev->hw_info.page_count = ((val64>>16) & 0xFFFF);
10975 dev->hw_info.page_size = (val64 & 0xFFFF);
10976
10977 val = ssd_reg32_read(dev->ctrlp + SSD_BB_INFO_REG);
10978 dev->hw_info.bbf_pages = val & 0xFF;
10979 dev->hw_info.bbf_seek = (val >> 8) & 0x1;
10980
10981 if (0 == dev->hw_info.block_count || 0 == dev->hw_info.page_count || 0 == dev->hw_info.page_size || dev->hw_info.block_count > INT_MAX) {
10982 hio_warn("%s: flash info error\n", dev->name);
10983 ret = -EINVAL;
10984 goto out;
10985 }
10986
10987 //xx
10988 dev->hw_info.oob_size = SSD_NAND_OOB_SZ; //(dev->hw_info.page_size) >> 5;
10989
10990 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
10991 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10992 dev->hw_info.valid_pages = val & 0x3FF;
10993 dev->hw_info.max_valid_pages = (val>>20) & 0x3FF;
10994 } else {
10995 dev->hw_info.valid_pages = val & 0x7FFF;
10996 dev->hw_info.max_valid_pages = (val>>15) & 0x7FFF;
10997 }
10998 if (0 == dev->hw_info.valid_pages || 0 == dev->hw_info.max_valid_pages ||
10999 dev->hw_info.valid_pages > dev->hw_info.max_valid_pages || dev->hw_info.max_valid_pages > dev->hw_info.page_count) {
11000 hio_warn("%s: valid page info error: valid_pages %d, max_valid_pages %d\n", dev->name, dev->hw_info.valid_pages, dev->hw_info.max_valid_pages);
11001 ret = -EINVAL;
11002 goto out;
11003 }
11004
11005 val = ssd_reg32_read(dev->ctrlp + SSD_RESERVED_BLKS_REG);
11006 dev->hw_info.reserved_blks = val & 0xFFFF;
11007 dev->hw_info.md_reserved_blks = (val >> 16) & 0xFF;
11008 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
11009 dev->hw_info.md_reserved_blks = SSD_BBT_RESERVED;
11010 }
11011 if (dev->hw_info.reserved_blks > dev->hw_info.block_count || dev->hw_info.md_reserved_blks > dev->hw_info.block_count) {
11012 hio_warn("%s: reserved blocks info error: reserved_blks %d, md_reserved_blks %d\n", dev->name, dev->hw_info.reserved_blks, dev->hw_info.md_reserved_blks);
11013 ret = -EINVAL;
11014 goto out;
11015 }
11016 }
11017
11018 /* size */
11019 if (mode < SSD_DRV_MODE_DEBUG) {
11020 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
11021 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
11022 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
11023 }
11024
11025 /* extend hardware info */
11026 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
11027 dev->hw_info_ext.board_type = (val >> 24) & 0xF;
11028
11029 dev->hw_info_ext.form_factor = SSD_FORM_FACTOR_FHHL;
11030 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_1) {
11031 dev->hw_info_ext.form_factor = (val >> 31) & 0x1;
11032 }
11033 /*
11034 dev->hw_info_ext.cap_type = (val >> 28) & 0x3;
11035 if (SSD_BM_CAP_VINA != dev->hw_info_ext.cap_type && SSD_BM_CAP_JH != dev->hw_info_ext.cap_type) {
11036 dev->hw_info_ext.cap_type = SSD_BM_CAP_VINA;
11037 }*/
11038
11039 /* power loss protect */
11040 val = ssd_reg32_read(dev->ctrlp + SSD_PLP_INFO_REG);
11041 dev->hw_info_ext.plp_type = (val & 0x3);
11042 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
11043 /* 3 or 4 cap */
11044 dev->hw_info_ext.cap_type = ((val >> 2)& 0x1);
11045 }
11046
11047 /* work mode */
11048 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
11049 dev->hw_info_ext.work_mode = (val >> 25) & 0x1;
11050
11051out:
11052 /* skip error if not in standard mode */
11053 if (mode != SSD_DRV_MODE_STANDARD) {
11054 ret = 0;
11055 }
11056 return ret;
11057}
11058
11059static void ssd_cleanup_response(struct ssd_device *dev)
11060{
11061 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11062 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11063
11064 pci_free_consistent(dev->pdev, resp_ptr_sz, dev->resp_ptr_base, dev->resp_ptr_base_dma);
11065 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11066}
11067
11068static int ssd_init_response(struct ssd_device *dev)
11069{
11070 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11071 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11072
11073 dev->resp_msg_base = pci_alloc_consistent(dev->pdev, resp_msg_sz, &(dev->resp_msg_base_dma));
11074 if (!dev->resp_msg_base) {
11075 hio_warn("%s: unable to allocate resp msg DMA buffer\n", dev->name);
11076 goto out_alloc_resp_msg;
11077 }
11078 memset(dev->resp_msg_base, 0xFF, resp_msg_sz);
11079
11080 dev->resp_ptr_base = pci_alloc_consistent(dev->pdev, resp_ptr_sz, &(dev->resp_ptr_base_dma));
11081 if (!dev->resp_ptr_base){
11082 hio_warn("%s: unable to allocate resp ptr DMA buffer\n", dev->name);
11083 goto out_alloc_resp_ptr;
11084 }
11085 memset(dev->resp_ptr_base, 0, resp_ptr_sz);
11086 dev->resp_idx = *(uint32_t *)(dev->resp_ptr_base) = dev->hw_info.cmd_fifo_sz * 2 - 1;
11087
11088 ssd_reg_write(dev->ctrlp + SSD_RESP_FIFO_REG, dev->resp_msg_base_dma);
11089 ssd_reg_write(dev->ctrlp + SSD_RESP_PTR_REG, dev->resp_ptr_base_dma);
11090
11091 return 0;
11092
11093out_alloc_resp_ptr:
11094 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11095out_alloc_resp_msg:
11096 return -ENOMEM;
11097}
11098
11099static int ssd_cleanup_cmd(struct ssd_device *dev)
11100{
11101 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11102 int i;
11103
11104 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11105 kfree(dev->cmd[i].sgl);
11106 }
11107 kfree(dev->cmd);
11108 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11109 return 0;
11110}
11111
11112static int ssd_init_cmd(struct ssd_device *dev)
11113{
11114 int sgl_sz = sizeof(struct scatterlist) * dev->hw_info.cmd_max_sg;
11115 int cmd_sz = sizeof(struct ssd_cmd) * dev->hw_info.cmd_fifo_sz;
11116 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11117 int i;
11118
11119 spin_lock_init(&dev->cmd_lock);
11120
11121 dev->msg_base = pci_alloc_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), &dev->msg_base_dma);
11122 if (!dev->msg_base) {
11123 hio_warn("%s: can not alloc cmd msg\n", dev->name);
11124 goto out_alloc_msg;
11125 }
11126
11127 dev->cmd = kmalloc(cmd_sz, GFP_KERNEL);
11128 if (!dev->cmd) {
11129 hio_warn("%s: can not alloc cmd\n", dev->name);
11130 goto out_alloc_cmd;
11131 }
11132 memset(dev->cmd, 0, cmd_sz);
11133
11134 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11135 dev->cmd[i].sgl = kmalloc(sgl_sz, GFP_KERNEL);
11136 if (!dev->cmd[i].sgl) {
11137 hio_warn("%s: can not alloc cmd sgl %d\n", dev->name, i);
11138 goto out_alloc_sgl;
11139 }
11140
11141 dev->cmd[i].msg = dev->msg_base + (msg_sz * i);
11142 dev->cmd[i].msg_dma = dev->msg_base_dma + ((dma_addr_t)msg_sz * i);
11143
11144 dev->cmd[i].dev = dev;
11145 dev->cmd[i].tag = i;
11146 dev->cmd[i].flag = 0;
11147
11148 INIT_LIST_HEAD(&dev->cmd[i].list);
11149 }
11150
11151 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11152 dev->scmd = ssd_dispatch_cmd;
11153 } else {
11154 ssd_reg_write(dev->ctrlp + SSD_MSG_BASE_REG, dev->msg_base_dma);
11155 if (finject) {
11156 dev->scmd = ssd_send_cmd_db;
11157 } else {
11158 dev->scmd = ssd_send_cmd;
11159 }
11160 }
11161
11162 return 0;
11163
11164out_alloc_sgl:
11165 for (i--; i>=0; i--) {
11166 kfree(dev->cmd[i].sgl);
11167 }
11168 kfree(dev->cmd);
11169out_alloc_cmd:
11170 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11171out_alloc_msg:
11172 return -ENOMEM;
11173}
11174
11175#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11176static irqreturn_t ssd_interrupt_check(int irq, void *dev_id)
11177{
11178 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11179
11180 if (*(uint32_t *)queue->resp_ptr == queue->resp_idx) {
11181 return IRQ_NONE;
11182 }
11183
11184 return IRQ_WAKE_THREAD;
11185}
11186
11187static irqreturn_t ssd_interrupt_threaded(int irq, void *dev_id)
11188{
11189 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11190 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11191 struct ssd_cmd *cmd;
11192 union ssd_response_msq __msg;
11193 union ssd_response_msq *msg = &__msg;
11194 uint64_t *u64_msg;
11195 uint32_t resp_idx = queue->resp_idx;
11196 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11197 uint32_t end_resp_idx;
11198
11199 if (unlikely(resp_idx == new_resp_idx)) {
11200 return IRQ_NONE;
11201 }
11202
11203 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11204
11205 do {
11206 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11207
11208 /* the resp msg */
11209 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11210 msg->u64_msg = *u64_msg;
11211
11212 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11213 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11214 continue;
11215 }
11216 /* clear the resp msg */
11217 *u64_msg = (uint64_t)(-1);
11218
11219 cmd = &queue->cmd[msg->resp_msg.tag];
11220 /*if (unlikely(!cmd->bio)) {
11221 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11222 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11223 continue;
11224 }*/
11225
11226 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11227 cmd->errors = -EIO;
11228 } else {
11229 cmd->errors = 0;
11230 }
11231 cmd->nr_log = msg->log_resp_msg.nr_log;
11232
11233 ssd_done(cmd);
11234
11235 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11236 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11237 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11238 queue_work(dev->workq, &dev->log_work);
11239 }
11240 }
11241
11242 if (unlikely(msg->resp_msg.status)) {
11243 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11244 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11245 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11246
11247 /* alarm led */
11248 ssd_set_alarm(dev);
11249 queue->io_stat.nr_rwerr++;
11250 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11251 } else {
11252 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11253 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11254
11255 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11256 }
11257 queue->io_stat.nr_ioerr++;
11258 }
11259
11260 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11261 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11262 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11263
11264 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11265 }
11266 }while (resp_idx != end_resp_idx);
11267
11268 queue->resp_idx = new_resp_idx;
11269
11270 return IRQ_HANDLED;
11271}
11272#endif
11273
11274#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11275static irqreturn_t ssd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
11276#else
11277static irqreturn_t ssd_interrupt(int irq, void *dev_id)
11278#endif
11279{
11280 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11281 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11282 struct ssd_cmd *cmd;
11283 union ssd_response_msq __msg;
11284 union ssd_response_msq *msg = &__msg;
11285 uint64_t *u64_msg;
11286 uint32_t resp_idx = queue->resp_idx;
11287 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11288 uint32_t end_resp_idx;
11289
11290 if (unlikely(resp_idx == new_resp_idx)) {
11291 return IRQ_NONE;
11292 }
11293
11294#if (defined SSD_ESCAPE_IRQ)
11295 if (SSD_INT_MSIX != dev->int_mode) {
11296 dev->irq_cpu = smp_processor_id();
11297 }
11298#endif
11299
11300 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11301
11302 do {
11303 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11304
11305 /* the resp msg */
11306 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11307 msg->u64_msg = *u64_msg;
11308
11309 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11310 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11311 continue;
11312 }
11313 /* clear the resp msg */
11314 *u64_msg = (uint64_t)(-1);
11315
11316 cmd = &queue->cmd[msg->resp_msg.tag];
11317 /*if (unlikely(!cmd->bio)) {
11318 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11319 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11320 continue;
11321 }*/
11322
11323 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11324 cmd->errors = -EIO;
11325 } else {
11326 cmd->errors = 0;
11327 }
11328 cmd->nr_log = msg->log_resp_msg.nr_log;
11329
11330 ssd_done_bh(cmd);
11331
11332 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11333 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11334 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11335 queue_work(dev->workq, &dev->log_work);
11336 }
11337 }
11338
11339 if (unlikely(msg->resp_msg.status)) {
11340 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11341 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11342 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11343
11344 /* alarm led */
11345 ssd_set_alarm(dev);
11346 queue->io_stat.nr_rwerr++;
11347 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11348 } else {
11349 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11350 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11351
11352 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11353 }
11354 queue->io_stat.nr_ioerr++;
11355 }
11356
11357 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11358 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11359 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11360
11361 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11362 }
11363 }while (resp_idx != end_resp_idx);
11364
11365 queue->resp_idx = new_resp_idx;
11366
11367 return IRQ_HANDLED;
11368}
11369
11370#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11371static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id, struct pt_regs *regs)
11372#else
11373static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id)
11374#endif
11375{
11376 irqreturn_t ret;
11377 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11378 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11379
11380#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11381 ret = ssd_interrupt(irq, dev_id, regs);
11382#else
11383 ret = ssd_interrupt(irq, dev_id);
11384#endif
11385
11386 /* clear intr */
11387 if (IRQ_HANDLED == ret) {
11388 ssd_reg32_write(dev->ctrlp + SSD_CLEAR_INTR_REG, 1);
11389 }
11390
11391 return ret;
11392}
11393
11394static void ssd_reset_resp_ptr(struct ssd_device *dev)
11395{
11396 int i;
11397
11398 for (i=0; i<dev->nr_queue; i++) {
11399 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11400 }
11401}
11402
11403static void ssd_free_irq(struct ssd_device *dev)
11404{
11405 int i;
11406
11407#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11408 if (SSD_INT_MSIX == dev->int_mode) {
11409 for (i=0; i<dev->nr_queue; i++) {
11410 irq_set_affinity_hint(dev->entry[i].vector, NULL);
11411 }
11412 }
11413#endif
11414
11415 for (i=0; i<dev->nr_queue; i++) {
11416 free_irq(dev->entry[i].vector, &dev->queue[i]);
11417 }
11418
11419 if (SSD_INT_MSIX == dev->int_mode) {
11420 pci_disable_msix(dev->pdev);
11421 } else if (SSD_INT_MSI == dev->int_mode) {
11422 pci_disable_msi(dev->pdev);
11423 }
11424
11425}
11426
11427static int ssd_init_irq(struct ssd_device *dev)
11428{
11429#if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11430 const struct cpumask *cpu_mask;
11431 static int cpu_affinity = 0;
11432#endif
11433#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
376d62f7 11434 const struct cpumask *mask = NULL;
a6a796ca
HSDT
11435 static int cpu = 0;
11436 int j;
11437#endif
11438 int i;
11439 unsigned long flags = 0;
11440 int ret = 0;
11441
11442 ssd_reg32_write(dev->ctrlp + SSD_INTR_INTERVAL_REG, 0x800);
11443
11444#ifdef SSD_ESCAPE_IRQ
11445 dev->irq_cpu = -1;
11446#endif
11447
11448 if (int_mode >= SSD_INT_MSIX && pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
11449 dev->nr_queue = SSD_MSIX_VEC;
11450 for (i=0; i<dev->nr_queue; i++) {
11451 dev->entry[i].entry = i;
11452 }
11453 for (;;) {
11454 ret = pci_enable_msix(dev->pdev, dev->entry, dev->nr_queue);
11455 if (ret == 0) {
11456 break;
11457 } else if (ret > 0) {
11458 dev->nr_queue = ret;
11459 } else {
11460 hio_warn("%s: can not enable msix\n", dev->name);
11461 /* alarm led */
11462 ssd_set_alarm(dev);
11463 goto out;
11464 }
11465 }
11466
11467#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11468 mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11469 if ((0 == cpu) || (!cpumask_intersects(mask, cpumask_of(cpu)))) {
11470 cpu = cpumask_first(mask);
11471 }
11472 for (i=0; i<dev->nr_queue; i++) {
11473 irq_set_affinity_hint(dev->entry[i].vector, cpumask_of(cpu));
11474 cpu = cpumask_next(cpu, mask);
11475 if (cpu >= nr_cpu_ids) {
11476 cpu = cpumask_first(mask);
11477 }
11478 }
11479#endif
11480
11481 dev->int_mode = SSD_INT_MSIX;
11482 } else if (int_mode >= SSD_INT_MSI && pci_find_capability(dev->pdev, PCI_CAP_ID_MSI)) {
11483 ret = pci_enable_msi(dev->pdev);
11484 if (ret) {
11485 hio_warn("%s: can not enable msi\n", dev->name);
11486 /* alarm led */
11487 ssd_set_alarm(dev);
11488 goto out;
11489 }
11490
11491 dev->nr_queue = 1;
11492 dev->entry[0].vector = dev->pdev->irq;
11493
11494 dev->int_mode = SSD_INT_MSI;
11495 } else {
11496 dev->nr_queue = 1;
11497 dev->entry[0].vector = dev->pdev->irq;
11498
11499 dev->int_mode = SSD_INT_LEGACY;
11500 }
11501
11502 for (i=0; i<dev->nr_queue; i++) {
11503 if (dev->nr_queue > 1) {
11504 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100-%d", dev->name, i);
11505 } else {
11506 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100", dev->name);
11507 }
11508
11509 dev->queue[i].dev = dev;
11510 dev->queue[i].idx = i;
11511
11512 dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11513 dev->queue[i].resp_idx_mask = dev->hw_info.cmd_fifo_sz - 1;
11514
11515 dev->queue[i].resp_msg_sz = dev->hw_info.resp_msg_sz;
11516 dev->queue[i].resp_msg = dev->resp_msg_base + dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * i;
11517 dev->queue[i].resp_ptr = dev->resp_ptr_base + dev->hw_info.resp_ptr_sz * i;
11518 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx;
11519
11520 dev->queue[i].cmd = dev->cmd;
11521 }
11522
11523#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
11524 flags = IRQF_SHARED;
11525#else
11526 flags = SA_SHIRQ;
11527#endif
11528
11529 for (i=0; i<dev->nr_queue; i++) {
11530#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11531 if (threaded_irq) {
11532 ret = request_threaded_irq(dev->entry[i].vector, ssd_interrupt_check, ssd_interrupt_threaded, flags, dev->queue[i].name, &dev->queue[i]);
11533 } else if (dev->int_mode == SSD_INT_LEGACY) {
11534 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11535 } else {
11536 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11537 }
11538#else
11539 if (dev->int_mode == SSD_INT_LEGACY) {
11540 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11541 } else {
11542 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11543 }
11544#endif
11545 if (ret) {
11546 hio_warn("%s: request irq failed\n", dev->name);
11547 /* alarm led */
11548 ssd_set_alarm(dev);
11549 goto out_request_irq;
11550 }
11551
11552#if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11553 cpu_mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11554 if (SSD_INT_MSIX == dev->int_mode) {
11555 if ((0 == cpu_affinity) || (!cpumask_intersects(mask, cpumask_of(cpu_affinity)))) {
11556 cpu_affinity = cpumask_first(cpu_mask);
11557 }
11558
11559 irq_set_affinity(dev->entry[i].vector, cpumask_of(cpu_affinity));
11560 cpu_affinity = cpumask_next(cpu_affinity, cpu_mask);
11561 if (cpu_affinity >= nr_cpu_ids) {
11562 cpu_affinity = cpumask_first(cpu_mask);
11563 }
11564 }
11565#endif
11566 }
11567
11568 return ret;
11569
11570out_request_irq:
11571#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11572 if (SSD_INT_MSIX == dev->int_mode) {
11573 for (j=0; j<dev->nr_queue; j++) {
11574 irq_set_affinity_hint(dev->entry[j].vector, NULL);
11575 }
11576 }
11577#endif
11578
11579 for (i--; i>=0; i--) {
11580 free_irq(dev->entry[i].vector, &dev->queue[i]);
11581 }
11582
11583 if (SSD_INT_MSIX == dev->int_mode) {
11584 pci_disable_msix(dev->pdev);
11585 } else if (SSD_INT_MSI == dev->int_mode) {
11586 pci_disable_msi(dev->pdev);
11587 }
11588
11589out:
11590 return ret;
11591}
11592
11593static void ssd_initial_log(struct ssd_device *dev)
11594{
11595 uint32_t val;
11596 uint32_t speed, width;
11597
11598 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11599 return;
11600 }
11601
11602 val = ssd_reg32_read(dev->ctrlp + SSD_POWER_ON_REG);
11603 if (val) {
11604 ssd_gen_swlog(dev, SSD_LOG_POWER_ON, dev->hw_info.bridge_ver);
11605 }
11606
11607 val = ssd_reg32_read(dev->ctrlp + SSD_PCIE_LINKSTATUS_REG);
11608 speed = val & 0xF;
11609 width = (val >> 4)& 0x3F;
11610 if (0x1 == speed) {
11611 hio_info("%s: PCIe: 2.5GT/s, x%u\n", dev->name, width);
11612 } else if (0x2 == speed) {
11613 hio_info("%s: PCIe: 5GT/s, x%u\n", dev->name, width);
11614 } else {
11615 hio_info("%s: PCIe: unknown GT/s, x%u\n", dev->name, width);
11616 }
11617 ssd_gen_swlog(dev, SSD_LOG_PCIE_LINK_STATUS, val);
11618
11619 return;
11620}
11621
11622#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11623static void ssd_hwmon_worker(void *data)
11624{
11625 struct ssd_device *dev = (struct ssd_device *)data;
11626#else
11627static void ssd_hwmon_worker(struct work_struct *work)
11628{
11629 struct ssd_device *dev = container_of(work, struct ssd_device, hwmon_work);
11630#endif
11631
11632 if (ssd_check_hw(dev)) {
11633 //hio_err("%s: check hardware failed\n", dev->name);
11634 return;
11635 }
11636
11637 ssd_check_clock(dev);
11638 ssd_check_volt(dev);
11639
11640 ssd_mon_boardvolt(dev);
11641}
11642
11643#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11644static void ssd_tempmon_worker(void *data)
11645{
11646 struct ssd_device *dev = (struct ssd_device *)data;
11647#else
11648static void ssd_tempmon_worker(struct work_struct *work)
11649{
11650 struct ssd_device *dev = container_of(work, struct ssd_device, tempmon_work);
11651#endif
11652
11653 if (ssd_check_hw(dev)) {
11654 //hio_err("%s: check hardware failed\n", dev->name);
11655 return;
11656 }
11657
11658 ssd_mon_temp(dev);
11659}
11660
11661
11662#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11663static void ssd_capmon_worker(void *data)
11664{
11665 struct ssd_device *dev = (struct ssd_device *)data;
11666#else
11667static void ssd_capmon_worker(struct work_struct *work)
11668{
11669 struct ssd_device *dev = container_of(work, struct ssd_device, capmon_work);
11670#endif
11671 uint32_t cap = 0;
11672 uint32_t cap_threshold = SSD_PL_CAP_THRESHOLD;
11673 int ret = 0;
11674
11675 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11676 return;
11677 }
11678
11679 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
11680 return;
11681 }
11682
11683 /* fault before? */
11684 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11685 ret = ssd_check_pl_cap_fast(dev);
11686 if (ret) {
11687 return;
11688 }
11689 }
11690
11691 /* learn */
11692 ret = ssd_do_cap_learn(dev, &cap);
11693 if (ret) {
11694 hio_err("%s: cap learn failed\n", dev->name);
11695 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
11696 return;
11697 }
11698
11699 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, cap);
11700
11701 if (SSD_PL_CAP_CP == dev->hw_info_ext.cap_type) {
11702 cap_threshold = SSD_PL_CAP_CP_THRESHOLD;
11703 }
11704
11705 //use the fw event id?
11706 if (cap < cap_threshold) {
11707 if (!test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11708 ssd_gen_swlog(dev, SSD_LOG_BATTERY_FAULT, 0);
11709 }
11710 } else if (cap >= (cap_threshold + SSD_PL_CAP_THRESHOLD_HYST)) {
11711 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11712 ssd_gen_swlog(dev, SSD_LOG_BATTERY_OK, 0);
11713 }
11714 }
11715}
11716
11717static void ssd_routine_start(void *data)
11718{
11719 struct ssd_device *dev;
11720
11721 if (!data) {
11722 return;
11723 }
11724 dev = data;
11725
11726 dev->routine_tick++;
11727
11728 if (test_bit(SSD_INIT_WORKQ, &dev->state) && !ssd_busy(dev)) {
11729 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11730 queue_work(dev->workq, &dev->log_work);
11731 }
11732
11733 if ((dev->routine_tick % SSD_HWMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11734 queue_work(dev->workq, &dev->hwmon_work);
11735 }
11736
11737 if ((dev->routine_tick % SSD_CAPMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11738 queue_work(dev->workq, &dev->capmon_work);
11739 }
11740
11741 if ((dev->routine_tick % SSD_CAPMON2_ROUTINE_TICK) == 0 && test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon) && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11742 /* CAP fault? check again */
11743 queue_work(dev->workq, &dev->capmon_work);
11744 }
11745
11746 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11747 queue_work(dev->workq, &dev->tempmon_work);
11748 }
11749
11750 /* schedule routine */
11751 mod_timer(&dev->routine_timer, jiffies + msecs_to_jiffies(SSD_ROUTINE_INTERVAL));
11752}
11753
11754static void ssd_cleanup_routine(struct ssd_device *dev)
11755{
11756 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11757 return;
11758
11759 (void)ssd_del_timer(&dev->routine_timer);
11760
11761 (void)ssd_del_timer(&dev->bm_timer);
11762}
11763
11764static int ssd_init_routine(struct ssd_device *dev)
11765{
11766 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11767 return 0;
11768
11769#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11770 INIT_WORK(&dev->bm_work, ssd_bm_worker, dev);
11771 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker, dev);
11772 INIT_WORK(&dev->capmon_work, ssd_capmon_worker, dev);
11773 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker, dev);
11774#else
11775 INIT_WORK(&dev->bm_work, ssd_bm_worker);
11776 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker);
11777 INIT_WORK(&dev->capmon_work, ssd_capmon_worker);
11778 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker);
11779#endif
11780
11781 /* initial log */
11782 ssd_initial_log(dev);
11783
11784 /* schedule bm routine */
11785 ssd_add_timer(&dev->bm_timer, msecs_to_jiffies(SSD_BM_CAP_LEARNING_DELAY), ssd_bm_routine_start, dev);
11786
11787 /* schedule routine */
11788 ssd_add_timer(&dev->routine_timer, msecs_to_jiffies(SSD_ROUTINE_INTERVAL), ssd_routine_start, dev);
11789
11790 return 0;
11791}
11792
11793static void
11794#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11795__devexit
11796#endif
11797ssd_remove_one (struct pci_dev *pdev)
11798{
11799 struct ssd_device *dev;
11800
11801 if (!pdev) {
11802 return;
11803 }
11804
11805 dev = pci_get_drvdata(pdev);
11806 if (!dev) {
11807 return;
11808 }
11809
11810 list_del_init(&dev->list);
11811
11812 ssd_unregister_sysfs(dev);
11813
11814 /* offline firstly */
11815 test_and_clear_bit(SSD_ONLINE, &dev->state);
11816
11817 /* clean work queue first */
11818 if (!dev->slave) {
11819 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
11820 ssd_cleanup_workq(dev);
11821 }
11822
11823 /* flush cache */
11824 (void)ssd_flush(dev);
11825 (void)ssd_save_md(dev);
11826
11827 /* save smart */
11828 if (!dev->slave) {
11829 ssd_save_smart(dev);
11830 }
11831
11832 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
11833 ssd_cleanup_blkdev(dev);
11834 }
11835
11836 if (!dev->slave) {
11837 ssd_cleanup_chardev(dev);
11838 }
11839
11840 /* clean routine */
11841 if (!dev->slave) {
11842 ssd_cleanup_routine(dev);
11843 }
11844
11845 ssd_cleanup_queue(dev);
11846
11847 ssd_cleanup_tag(dev);
11848 ssd_cleanup_thread(dev);
11849
11850 ssd_free_irq(dev);
11851
11852 ssd_cleanup_dcmd(dev);
11853 ssd_cleanup_cmd(dev);
11854 ssd_cleanup_response(dev);
11855
11856 if (!dev->slave) {
11857 ssd_cleanup_log(dev);
11858 }
11859
11860 if (dev->reload_fw) { //reload fw
11861 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
11862 }
11863
11864 /* unmap physical adress */
11865#ifdef LINUX_SUSE_OS
11866 iounmap(dev->ctrlp);
11867#else
11868 pci_iounmap(pdev, dev->ctrlp);
11869#endif
11870
11871 release_mem_region(dev->mmio_base, dev->mmio_len);
11872
11873 pci_disable_device(pdev);
11874
11875 pci_set_drvdata(pdev, NULL);
11876
11877 ssd_put(dev);
11878}
11879
11880static int
11881#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11882__devinit
11883#endif
11884ssd_init_one(struct pci_dev *pdev,
11885 const struct pci_device_id *ent)
11886{
11887 struct ssd_device *dev;
11888 int ret = 0;
11889
11890 if (!pdev || !ent) {
11891 ret = -EINVAL;
11892 goto out;
11893 }
11894
11895 dev = kmalloc(sizeof(struct ssd_device), GFP_KERNEL);
11896 if (!dev) {
11897 ret = -ENOMEM;
11898 goto out_alloc_dev;
11899 }
11900 memset(dev, 0, sizeof(struct ssd_device));
11901
11902 dev->owner = THIS_MODULE;
11903
11904 if (SSD_SLAVE_PORT_DEVID == ent->device) {
11905 dev->slave = 1;
11906 }
11907
11908 dev->idx = ssd_get_index(dev->slave);
11909 if (dev->idx < 0) {
11910 ret = -ENOMEM;
11911 goto out_get_index;
11912 }
11913
11914 if (!dev->slave) {
11915 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_DEV_NAME);
11916 ssd_set_dev_name(&dev->name[strlen(SSD_DEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_DEV_NAME), dev->idx);
11917
11918 dev->major = ssd_major;
11919 dev->cmajor = ssd_cmajor;
11920 } else {
11921 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_SDEV_NAME);
11922 ssd_set_dev_name(&dev->name[strlen(SSD_SDEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_SDEV_NAME), dev->idx);
11923 dev->major = ssd_major_sl;
11924 dev->cmajor = 0;
11925 }
11926
11927 atomic_set(&(dev->refcnt), 0);
11928 atomic_set(&(dev->tocnt), 0);
11929
11930 mutex_init(&dev->fw_mutex);
11931
11932 //xx
11933 mutex_init(&dev->gd_mutex);
11934
11935 dev->pdev = pdev;
11936 pci_set_drvdata(pdev, dev);
11937
11938 kref_init(&dev->kref);
11939
11940 ret = pci_enable_device(pdev);
11941 if (ret) {
11942 hio_warn("%s: can not enable device\n", dev->name);
11943 goto out_enable_device;
11944 }
11945
11946 pci_set_master(pdev);
11947
11948#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11949 ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
11950#else
11951 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
11952#endif
11953 if (ret) {
11954 hio_warn("%s: set dma mask: failed\n", dev->name);
11955 goto out_set_dma_mask;
11956 }
11957
11958#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11959 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
11960#else
11961 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
11962#endif
11963 if (ret) {
11964 hio_warn("%s: set consistent dma mask: failed\n", dev->name);
11965 goto out_set_dma_mask;
11966 }
11967
11968 dev->mmio_base = pci_resource_start(pdev, 0);
11969 dev->mmio_len = pci_resource_len(pdev, 0);
11970
11971 if (!request_mem_region(dev->mmio_base, dev->mmio_len, SSD_DEV_NAME)) {
11972 hio_warn("%s: can not reserve MMIO region 0\n", dev->name);
11973 ret = -EBUSY;
11974 goto out_request_mem_region;
11975 }
11976
11977 /* 2.6.9 kernel bug */
11978 dev->ctrlp = pci_iomap(pdev, 0, 0);
11979 if (!dev->ctrlp) {
11980 hio_warn("%s: can not remap IO region 0\n", dev->name);
11981 ret = -ENOMEM;
11982 goto out_pci_iomap;
11983 }
11984
11985 ret = ssd_check_hw(dev);
11986 if (ret) {
11987 hio_err("%s: check hardware failed\n", dev->name);
11988 goto out_check_hw;
11989 }
11990
11991 ret = ssd_init_protocol_info(dev);
11992 if (ret) {
11993 hio_err("%s: init protocol info failed\n", dev->name);
11994 goto out_init_protocol_info;
11995 }
11996
11997 /* alarm led ? */
11998 ssd_clear_alarm(dev);
11999
12000 ret = ssd_init_fw_info(dev);
12001 if (ret) {
12002 hio_err("%s: init firmware info failed\n", dev->name);
12003 /* alarm led */
12004 ssd_set_alarm(dev);
12005 goto out_init_fw_info;
12006 }
12007
12008 /* slave port ? */
12009 if (dev->slave) {
12010 goto init_next1;
12011 }
12012
12013 ret = ssd_init_rom_info(dev);
12014 if (ret) {
12015 hio_err("%s: init rom info failed\n", dev->name);
12016 /* alarm led */
12017 ssd_set_alarm(dev);
12018 goto out_init_rom_info;
12019 }
12020
12021 ret = ssd_init_label(dev);
12022 if (ret) {
12023 hio_err("%s: init label failed\n", dev->name);
12024 /* alarm led */
12025 ssd_set_alarm(dev);
12026 goto out_init_label;
12027 }
12028
12029 ret = ssd_init_workq(dev);
12030 if (ret) {
12031 hio_warn("%s: init workq failed\n", dev->name);
12032 goto out_init_workq;
12033 }
12034 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
12035
12036 ret = ssd_init_log(dev);
12037 if (ret) {
12038 hio_err("%s: init log failed\n", dev->name);
12039 /* alarm led */
12040 ssd_set_alarm(dev);
12041 goto out_init_log;
12042 }
12043
12044 ret = ssd_init_smart(dev);
12045 if (ret) {
12046 hio_err("%s: init info failed\n", dev->name);
12047 /* alarm led */
12048 ssd_set_alarm(dev);
12049 goto out_init_smart;
12050 }
12051
12052init_next1:
12053 ret = ssd_init_hw_info(dev);
12054 if (ret) {
12055 hio_err("%s: init hardware info failed\n", dev->name);
12056 /* alarm led */
12057 ssd_set_alarm(dev);
12058 goto out_init_hw_info;
12059 }
12060
12061 /* slave port ? */
12062 if (dev->slave) {
12063 goto init_next2;
12064 }
12065
12066 ret = ssd_init_sensor(dev);
12067 if (ret) {
12068 hio_err("%s: init sensor failed\n", dev->name);
12069 /* alarm led */
12070 ssd_set_alarm(dev);
12071 goto out_init_sensor;
12072 }
12073
12074 ret = ssd_init_pl_cap(dev);
12075 if (ret) {
12076 hio_err("%s: int pl_cap failed\n", dev->name);
12077 /* alarm led */
12078 ssd_set_alarm(dev);
12079 goto out_init_pl_cap;
12080 }
12081
12082init_next2:
12083 ret = ssd_check_init_state(dev);
12084 if (ret) {
12085 hio_err("%s: check init state failed\n", dev->name);
12086 /* alarm led */
12087 ssd_set_alarm(dev);
12088 goto out_check_init_state;
12089 }
12090
12091 ret = ssd_init_response(dev);
12092 if (ret) {
12093 hio_warn("%s: init resp_msg failed\n", dev->name);
12094 goto out_init_response;
12095 }
12096
12097 ret = ssd_init_cmd(dev);
12098 if (ret) {
12099 hio_warn("%s: init msg failed\n", dev->name);
12100 goto out_init_cmd;
12101 }
12102
12103 ret = ssd_init_dcmd(dev);
12104 if (ret) {
12105 hio_warn("%s: init cmd failed\n", dev->name);
12106 goto out_init_dcmd;
12107 }
12108
12109 ret = ssd_init_irq(dev);
12110 if (ret) {
12111 hio_warn("%s: init irq failed\n", dev->name);
12112 goto out_init_irq;
12113 }
12114
12115 ret = ssd_init_thread(dev);
12116 if (ret) {
12117 hio_warn("%s: init thread failed\n", dev->name);
12118 goto out_init_thread;
12119 }
12120
12121 ret = ssd_init_tag(dev);
12122 if(ret) {
12123 hio_warn("%s: init tags failed\n", dev->name);
12124 goto out_init_tags;
12125 }
12126
12127 /* */
12128 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
12129
12130 ret = ssd_init_queue(dev);
12131 if (ret) {
12132 hio_warn("%s: init queue failed\n", dev->name);
12133 goto out_init_queue;
12134 }
12135
12136 /* slave port ? */
12137 if (dev->slave) {
12138 goto init_next3;
12139 }
12140
12141 ret = ssd_init_ot_protect(dev);
12142 if (ret) {
12143 hio_err("%s: int ot_protect failed\n", dev->name);
12144 /* alarm led */
12145 ssd_set_alarm(dev);
12146 goto out_int_ot_protect;
12147 }
12148
12149 ret = ssd_init_wmode(dev);
12150 if (ret) {
12151 hio_warn("%s: init write mode\n", dev->name);
12152 goto out_init_wmode;
12153 }
12154
12155 /* init routine after hw is ready */
12156 ret = ssd_init_routine(dev);
12157 if (ret) {
12158 hio_warn("%s: init routine\n", dev->name);
12159 goto out_init_routine;
12160 }
12161
12162 ret = ssd_init_chardev(dev);
12163 if (ret) {
12164 hio_warn("%s: register char device failed\n", dev->name);
12165 goto out_init_chardev;
12166 }
12167
12168init_next3:
12169 ret = ssd_init_blkdev(dev);
12170 if (ret) {
12171 hio_warn("%s: register block device failed\n", dev->name);
12172 goto out_init_blkdev;
12173 }
12174 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
12175
12176 ret = ssd_register_sysfs(dev);
12177 if (ret) {
12178 hio_warn("%s: register sysfs failed\n", dev->name);
12179 goto out_register_sysfs;
12180 }
12181
12182 dev->save_md = 1;
12183
12184 list_add_tail(&dev->list, &ssd_list);
12185
12186 return 0;
12187
12188out_register_sysfs:
12189 test_and_clear_bit(SSD_INIT_BD, &dev->state);
12190 ssd_cleanup_blkdev(dev);
12191out_init_blkdev:
12192 /* slave port ? */
12193 if (!dev->slave) {
12194 ssd_cleanup_chardev(dev);
12195 }
12196out_init_chardev:
12197 /* slave port ? */
12198 if (!dev->slave) {
12199 ssd_cleanup_routine(dev);
12200 }
12201out_init_routine:
12202out_init_wmode:
12203out_int_ot_protect:
12204 ssd_cleanup_queue(dev);
12205out_init_queue:
12206 test_and_clear_bit(SSD_ONLINE, &dev->state);
12207 ssd_cleanup_tag(dev);
12208out_init_tags:
12209 ssd_cleanup_thread(dev);
12210out_init_thread:
12211 ssd_free_irq(dev);
12212out_init_irq:
12213 ssd_cleanup_dcmd(dev);
12214out_init_dcmd:
12215 ssd_cleanup_cmd(dev);
12216out_init_cmd:
12217 ssd_cleanup_response(dev);
12218out_init_response:
12219out_check_init_state:
12220out_init_pl_cap:
12221out_init_sensor:
12222out_init_hw_info:
12223out_init_smart:
12224 /* slave port ? */
12225 if (!dev->slave) {
12226 ssd_cleanup_log(dev);
12227 }
12228out_init_log:
12229 /* slave port ? */
12230 if (!dev->slave) {
12231 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12232 ssd_cleanup_workq(dev);
12233 }
12234out_init_workq:
12235out_init_label:
12236out_init_rom_info:
12237out_init_fw_info:
12238out_init_protocol_info:
12239out_check_hw:
12240#ifdef LINUX_SUSE_OS
12241 iounmap(dev->ctrlp);
12242#else
12243 pci_iounmap(pdev, dev->ctrlp);
12244#endif
12245out_pci_iomap:
12246 release_mem_region(dev->mmio_base, dev->mmio_len);
12247out_request_mem_region:
12248out_set_dma_mask:
12249 pci_disable_device(pdev);
12250out_enable_device:
12251 pci_set_drvdata(pdev, NULL);
12252out_get_index:
12253 kfree(dev);
12254out_alloc_dev:
12255out:
12256 return ret;
12257}
12258
12259static void ssd_cleanup_tasklet(void)
12260{
12261 int i;
12262 for_each_online_cpu(i) {
12263 tasklet_kill(&per_cpu(ssd_tasklet, i));
12264 }
12265}
12266
12267static int ssd_init_tasklet(void)
12268{
12269 int i;
12270
12271 for_each_online_cpu(i) {
12272 INIT_LIST_HEAD(&per_cpu(ssd_doneq, i));
12273
12274 if (finject) {
12275 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done_db, 0);
12276 } else {
12277 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done, 0);
12278 }
12279 }
12280
12281 return 0;
12282}
12283
12284static struct pci_device_id ssd_pci_tbl[] = {
12285 { 0x10ee, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* g3 */
12286 { 0x19e5, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 */
12287 //{ 0x19e5, 0x0008, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 sp*/
12288 { 0x19e5, 0x0009, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 */
12289 { 0x19e5, 0x000a, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 dp slave*/
12290 { 0, }
12291};
12292MODULE_DEVICE_TABLE(pci, ssd_pci_tbl);
12293
12294static struct pci_driver ssd_driver = {
12295 .name = MODULE_NAME,
12296 .id_table = ssd_pci_tbl,
12297 .probe = ssd_init_one,
12298#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12299 .remove = __devexit_p(ssd_remove_one),
12300#else
12301 .remove = ssd_remove_one,
12302#endif
12303};
12304
12305/* notifier block to get a notify on system shutdown/halt/reboot */
12306static int ssd_notify_reboot(struct notifier_block *nb, unsigned long event, void *buf)
12307{
12308 struct ssd_device *dev = NULL;
12309 struct ssd_device *n = NULL;
12310
12311 list_for_each_entry_safe(dev, n, &ssd_list, list) {
12312 ssd_gen_swlog(dev, SSD_LOG_POWER_OFF, 0);
12313
12314 (void)ssd_flush(dev);
12315 (void)ssd_save_md(dev);
12316
12317 /* slave port ? */
12318 if (!dev->slave) {
12319 ssd_save_smart(dev);
12320
12321 ssd_stop_workq(dev);
12322
12323 if (dev->reload_fw) {
12324 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12325 }
12326 }
12327 }
12328
12329 return NOTIFY_OK;
12330}
12331
12332static struct notifier_block ssd_notifier = {
12333 ssd_notify_reboot, NULL, 0
12334};
12335
12336static int __init ssd_init_module(void)
12337{
12338 int ret = 0;
12339
12340 hio_info("driver version: %s\n", DRIVER_VERSION);
12341
12342 ret = ssd_init_index();
12343 if (ret) {
12344 hio_warn("init index failed\n");
12345 goto out_init_index;
12346 }
12347
12348 ret = ssd_init_proc();
12349 if (ret) {
12350 hio_warn("init proc failed\n");
12351 goto out_init_proc;
12352 }
12353
12354 ret = ssd_init_sysfs();
12355 if (ret) {
12356 hio_warn("init sysfs failed\n");
12357 goto out_init_sysfs;
12358 }
12359
12360 ret = ssd_init_tasklet();
12361 if (ret) {
12362 hio_warn("init tasklet failed\n");
12363 goto out_init_tasklet;
12364 }
12365
12366#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12367 ssd_class = class_simple_create(THIS_MODULE, SSD_DEV_NAME);
12368#else
12369 ssd_class = class_create(THIS_MODULE, SSD_DEV_NAME);
12370#endif
12371 if (IS_ERR(ssd_class)) {
12372 ret = PTR_ERR(ssd_class);
12373 goto out_class_create;
12374 }
12375
12376 if (ssd_cmajor > 0) {
12377 ret = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12378 } else {
12379 ret = ssd_cmajor = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12380 }
12381 if (ret < 0) {
12382 hio_warn("unable to register chardev major number\n");
12383 goto out_register_chardev;
12384 }
12385
12386 if (ssd_major > 0) {
12387 ret = register_blkdev(ssd_major, SSD_DEV_NAME);
12388 } else {
12389 ret = ssd_major = register_blkdev(ssd_major, SSD_DEV_NAME);
12390 }
12391 if (ret < 0) {
12392 hio_warn("unable to register major number\n");
12393 goto out_register_blkdev;
12394 }
12395
12396 if (ssd_major_sl > 0) {
12397 ret = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12398 } else {
12399 ret = ssd_major_sl = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12400 }
12401 if (ret < 0) {
12402 hio_warn("unable to register slave major number\n");
12403 goto out_register_blkdev_sl;
12404 }
12405
12406 if (mode < SSD_DRV_MODE_STANDARD || mode > SSD_DRV_MODE_BASE) {
12407 mode = SSD_DRV_MODE_STANDARD;
12408 }
12409
12410 /* for debug */
12411 if (mode != SSD_DRV_MODE_STANDARD) {
12412 ssd_minors = 1;
12413 }
12414
12415 if (int_mode < SSD_INT_LEGACY || int_mode > SSD_INT_MSIX) {
12416 int_mode = SSD_INT_MODE_DEFAULT;
12417 }
12418
12419 if (threaded_irq) {
12420 int_mode = SSD_INT_MSI;
12421 }
12422
12423 if (log_level >= SSD_LOG_NR_LEVEL || log_level < SSD_LOG_LEVEL_INFO) {
12424 log_level = SSD_LOG_LEVEL_ERR;
12425 }
12426
12427 if (wmode < SSD_WMODE_BUFFER || wmode > SSD_WMODE_DEFAULT) {
12428 wmode = SSD_WMODE_DEFAULT;
12429 }
12430
12431#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
12432 ret = pci_module_init(&ssd_driver);
12433#else
12434 ret = pci_register_driver(&ssd_driver);
12435#endif
12436 if (ret) {
12437 hio_warn("pci init failed\n");
12438 goto out_pci_init;
12439 }
12440
12441 ret = register_reboot_notifier(&ssd_notifier);
12442 if (ret) {
12443 hio_warn("register reboot notifier failed\n");
12444 goto out_register_reboot_notifier;
12445 }
12446
12447 return 0;
12448
12449out_register_reboot_notifier:
12450out_pci_init:
12451 pci_unregister_driver(&ssd_driver);
12452 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12453out_register_blkdev_sl:
12454 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12455out_register_blkdev:
12456 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12457out_register_chardev:
12458#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12459 class_simple_destroy(ssd_class);
12460#else
12461 class_destroy(ssd_class);
12462#endif
12463out_class_create:
12464 ssd_cleanup_tasklet();
12465out_init_tasklet:
12466 ssd_cleanup_sysfs();
12467out_init_sysfs:
12468 ssd_cleanup_proc();
12469out_init_proc:
12470 ssd_cleanup_index();
12471out_init_index:
12472 return ret;
12473
12474}
12475
12476static void __exit ssd_cleanup_module(void)
12477{
12478
12479 hio_info("unload driver: %s\n", DRIVER_VERSION);
12480 /* exiting */
12481 ssd_exiting = 1;
12482
12483 unregister_reboot_notifier(&ssd_notifier);
12484
12485 pci_unregister_driver(&ssd_driver);
12486
12487 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12488 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12489 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12490#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12491 class_simple_destroy(ssd_class);
12492#else
12493 class_destroy(ssd_class);
12494#endif
12495
12496 ssd_cleanup_tasklet();
12497 ssd_cleanup_sysfs();
12498 ssd_cleanup_proc();
12499 ssd_cleanup_index();
12500}
12501
12502int ssd_register_event_notifier(struct block_device *bdev, ssd_event_call event_call)
12503{
12504 struct ssd_device *dev;
12505 struct timeval tv;
12506 struct ssd_log *le;
12507 uint64_t cur;
12508 int log_nr;
12509
12510 if (!bdev || !event_call || !(bdev->bd_disk)) {
12511 return -EINVAL;
12512 }
12513
12514 dev = bdev->bd_disk->private_data;
12515 dev->event_call = event_call;
12516
12517 do_gettimeofday(&tv);
12518 cur = tv.tv_sec;
12519
12520 le = (struct ssd_log *)(dev->internal_log.log);
12521 log_nr = dev->internal_log.nr_log;
12522
12523 while (log_nr--) {
12524 if (le->time <= cur && le->time >= dev->uptime) {
12525 (void)dev->event_call(dev->gd, le->le.event, ssd_parse_log(dev, le, 0));
12526 }
12527 le++;
12528 }
12529
12530 return 0;
12531}
12532
12533int ssd_unregister_event_notifier(struct block_device *bdev)
12534{
12535 struct ssd_device *dev;
12536
12537 if (!bdev || !(bdev->bd_disk)) {
12538 return -EINVAL;
12539 }
12540
12541 dev = bdev->bd_disk->private_data;
12542 dev->event_call = NULL;
12543
12544 return 0;
12545}
12546
12547EXPORT_SYMBOL(ssd_get_label);
12548EXPORT_SYMBOL(ssd_get_version);
12549EXPORT_SYMBOL(ssd_set_otprotect);
12550EXPORT_SYMBOL(ssd_bm_status);
12551EXPORT_SYMBOL(ssd_submit_pbio);
12552EXPORT_SYMBOL(ssd_get_pciaddr);
12553EXPORT_SYMBOL(ssd_get_temperature);
12554EXPORT_SYMBOL(ssd_register_event_notifier);
12555EXPORT_SYMBOL(ssd_unregister_event_notifier);
12556EXPORT_SYMBOL(ssd_reset);
12557EXPORT_SYMBOL(ssd_set_wmode);
12558
12559
12560
12561module_init(ssd_init_module);
12562module_exit(ssd_cleanup_module);
12563MODULE_VERSION(DRIVER_VERSION);
12564MODULE_LICENSE("GPL");
12565MODULE_AUTHOR("Huawei SSD DEV Team");
12566MODULE_DESCRIPTION("Huawei SSD driver");