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f1765db4
HSDT
1/*
2* Huawei SSD device driver
3* Copyright (c) 2016, Huawei Technologies Co., Ltd.
4*
5* This program is free software; you can redistribute it and/or modify it
6* under the terms and conditions of the GNU General Public License,
7* version 2, as published by the Free Software Foundation.
8*
9* This program is distributed in the hope it will be useful, but WITHOUT
10* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12* more details.
13*/
14
15#ifndef LINUX_VERSION_CODE
16#include <linux/version.h>
17#endif
18#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
19#include <linux/config.h>
20#endif
21#include <linux/types.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/bio.h>
25#include <linux/timer.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/slab.h>
29#include <linux/spinlock.h>
30#include <linux/blkdev.h>
31#include <linux/sched.h>
32#include <linux/fcntl.h>
33#include <linux/interrupt.h>
34#include <linux/compiler.h>
35#include <linux/bitops.h>
36#include <linux/delay.h>
37#include <linux/time.h>
38#include <linux/stat.h>
39#include <linux/fs.h>
40#include <linux/dma-mapping.h>
41#include <linux/completion.h>
42#include <linux/workqueue.h>
43#include <linux/mm.h>
44#include <linux/ioctl.h>
45#include <linux/hdreg.h> /* HDIO_GETGEO */
46#include <linux/list.h>
47#include <linux/reboot.h>
48#include <linux/kthread.h>
49#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,2,0))
50#include <linux/seq_file.h>
51#endif
52#include <asm/uaccess.h>
53#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,2,0))
54#include <linux/scatterlist.h>
55#include <linux/vmalloc.h>
56#else
57#include <asm/scatterlist.h>
58#endif
59#include <asm/io.h>
60#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
61#include <linux/devfs_fs_kernel.h>
62#endif
0e006bc3
KM
63#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4,3,0))
64#define bio_endio(bio, errors) bio_endio(bio)
65#endif
f1765db4
HSDT
66
67/* driver */
68#define MODULE_NAME "hio"
69#define DRIVER_VERSION "2.1.0.23"
70#define DRIVER_VERSION_LEN 16
71
72#define SSD_FW_MIN 0x1
73
74#define SSD_DEV_NAME MODULE_NAME
75#define SSD_DEV_NAME_LEN 16
76#define SSD_CDEV_NAME "c"SSD_DEV_NAME
77#define SSD_SDEV_NAME "s"SSD_DEV_NAME
78
79
80#define SSD_CMAJOR 0
81#define SSD_MAJOR 0
82#define SSD_MAJOR_SL 0
83#define SSD_MINORS 16
84
85#define SSD_MAX_DEV 702
86#define SSD_ALPHABET_NUM 26
87
88#define hio_info(f, arg...) printk(KERN_INFO MODULE_NAME"info: " f , ## arg)
89#define hio_note(f, arg...) printk(KERN_NOTICE MODULE_NAME"note: " f , ## arg)
90#define hio_warn(f, arg...) printk(KERN_WARNING MODULE_NAME"warn: " f , ## arg)
91#define hio_err(f, arg...) printk(KERN_ERR MODULE_NAME"err: " f , ## arg)
92
93/* slave port */
94#define SSD_SLAVE_PORT_DEVID 0x000a
95
96/* int mode */
97
98/* 2.6.9 msi affinity bug, should turn msi & msi-x off */
99//#define SSD_MSI
100#define SSD_ESCAPE_IRQ
101
102//#define SSD_MSIX
103#ifndef MODULE
104#define SSD_MSIX
105#endif
106#define SSD_MSIX_VEC 8
107#ifdef SSD_MSIX
108#undef SSD_MSI
109//#undef SSD_ESCAPE_IRQ
110#define SSD_MSIX_AFFINITY_FORCE
111#endif
112
113#define SSD_TRIM
114
115/* Over temperature protect */
116#define SSD_OT_PROTECT
117
118#ifdef SSD_QUEUE_PBIO
119#define BIO_SSD_PBIO 20
120#endif
121
122/* debug */
123//#define SSD_DEBUG_ERR
124
125/* cmd timer */
126#define SSD_CMD_TIMEOUT (60*HZ)
127
128/* i2c & smbus */
129#define SSD_SPI_TIMEOUT (5*HZ)
130#define SSD_I2C_TIMEOUT (5*HZ)
131
132#define SSD_I2C_MAX_DATA (127)
133#define SSD_SMBUS_BLOCK_MAX (32)
134#define SSD_SMBUS_DATA_MAX (SSD_SMBUS_BLOCK_MAX + 2)
135
136/* wait for init */
137#define SSD_INIT_WAIT (1000) //1s
138#define SSD_CONTROLLER_WAIT (20*1000/SSD_INIT_WAIT) //20s
139#define SSD_INIT_MAX_WAIT (500*1000/SSD_INIT_WAIT) //500s
140#define SSD_INIT_MAX_WAIT_V3_2 (1400*1000/SSD_INIT_WAIT) //1400s
141#define SSD_RAM_INIT_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
142#define SSD_CH_INFO_MAX_WAIT (10*1000/SSD_INIT_WAIT) //10s
143
144/* blkdev busy wait */
145#define SSD_DEV_BUSY_WAIT 1000 //ms
146#define SSD_DEV_BUSY_MAX_WAIT (8*1000/SSD_DEV_BUSY_WAIT) //8s
147
148/* smbus retry */
149#define SSD_SMBUS_RETRY_INTERVAL (5) //ms
150#define SSD_SMBUS_RETRY_MAX (1000/SSD_SMBUS_RETRY_INTERVAL)
151
152#define SSD_BM_RETRY_MAX 7
153
154/* bm routine interval */
155#define SSD_BM_CAP_LEARNING_DELAY (10*60*1000)
156
157/* routine interval */
158#define SSD_ROUTINE_INTERVAL (10*1000) //10s
159#define SSD_HWMON_ROUTINE_TICK (60*1000/SSD_ROUTINE_INTERVAL)
160#define SSD_CAPMON_ROUTINE_TICK ((3600*1000/SSD_ROUTINE_INTERVAL)*24*30)
161#define SSD_CAPMON2_ROUTINE_TICK (10*60*1000/SSD_ROUTINE_INTERVAL) //fault recover
162
163/* dma align */
164#define SSD_DMA_ALIGN (16)
165
166/* some hw defalut */
167#define SSD_LOG_MAX_SZ 4096
168
169#define SSD_NAND_OOB_SZ 1024
170#define SSD_NAND_ID_SZ 8
171#define SSD_NAND_ID_BUFF_SZ 1024
172#define SSD_NAND_MAX_CE 2
173
174#define SSD_BBT_RESERVED 8
175
176#define SSD_ECC_MAX_FLIP (64+1)
177
178#define SSD_RAM_ALIGN 16
179
180
181#define SSD_RELOAD_FLAG 0x3333CCCC
182#define SSD_RELOAD_FW 0xAA5555AA
183#define SSD_RESET_NOINIT 0xAA5555AA
184#define SSD_RESET 0x55AAAA55
185#define SSD_RESET_FULL 0x5A
186//#define SSD_RESET_WAIT 1000 //1s
187//#define SSD_RESET_MAX_WAIT (200*1000/SSD_RESET_WAIT) //200s
188
189
190/* reverion 1 */
191#define SSD_PROTOCOL_V1 0x0
192
193#define SSD_ROM_SIZE (16*1024*1024)
194#define SSD_ROM_BLK_SIZE (256*1024)
195#define SSD_ROM_PAGE_SIZE (256)
196#define SSD_ROM_NR_BRIDGE_FW 2
197#define SSD_ROM_NR_CTRL_FW 2
198#define SSD_ROM_BRIDGE_FW_BASE 0
199#define SSD_ROM_BRIDGE_FW_SIZE (2*1024*1024)
200#define SSD_ROM_CTRL_FW_BASE (SSD_ROM_NR_BRIDGE_FW*SSD_ROM_BRIDGE_FW_SIZE)
201#define SSD_ROM_CTRL_FW_SIZE (5*1024*1024)
202#define SSD_ROM_LABEL_BASE (SSD_ROM_CTRL_FW_BASE+SSD_ROM_CTRL_FW_SIZE*SSD_ROM_NR_CTRL_FW)
203#define SSD_ROM_VP_BASE (SSD_ROM_LABEL_BASE+SSD_ROM_BLK_SIZE)
204
205/* reverion 3 */
206#define SSD_PROTOCOL_V3 0x3000000
207#define SSD_PROTOCOL_V3_1_1 0x3010001
208#define SSD_PROTOCOL_V3_1_3 0x3010003
209#define SSD_PROTOCOL_V3_2 0x3020000
210#define SSD_PROTOCOL_V3_2_1 0x3020001 /* <4KB improved */
211#define SSD_PROTOCOL_V3_2_2 0x3020002 /* ot protect */
212#define SSD_PROTOCOL_V3_2_4 0x3020004
213
214
215#define SSD_PV3_ROM_NR_BM_FW 1
216#define SSD_PV3_ROM_BM_FW_SZ (64*1024*8)
217
218#define SSD_ROM_LOG_SZ (64*1024*4)
219
220#define SSD_ROM_NR_SMART_MAX 2
221#define SSD_PV3_ROM_NR_SMART SSD_ROM_NR_SMART_MAX
222#define SSD_PV3_ROM_SMART_SZ (64*1024)
223
224/* reverion 3.2 */
225#define SSD_PV3_2_ROM_LOG_SZ (64*1024*80) /* 5MB */
226#define SSD_PV3_2_ROM_SEC_SZ (256*1024) /* 256KB */
227
228
229/* register */
230#define SSD_REQ_FIFO_REG 0x0000
231#define SSD_RESP_FIFO_REG 0x0008 //0x0010
232#define SSD_RESP_PTR_REG 0x0010 //0x0018
233#define SSD_INTR_INTERVAL_REG 0x0018
234#define SSD_READY_REG 0x001C
235#define SSD_BRIDGE_TEST_REG 0x0020
236#define SSD_STRIPE_SIZE_REG 0x0028
237#define SSD_CTRL_VER_REG 0x0030 //controller
238#define SSD_BRIDGE_VER_REG 0x0034 //bridge
239#define SSD_PCB_VER_REG 0x0038
240#define SSD_BURN_FLAG_REG 0x0040
241#define SSD_BRIDGE_INFO_REG 0x0044
242
243#define SSD_WL_VAL_REG 0x0048 //32-bit
244
245#define SSD_BB_INFO_REG 0x004C
246
247#define SSD_ECC_TEST_REG 0x0050 //test only
248#define SSD_ERASE_TEST_REG 0x0058 //test only
249#define SSD_WRITE_TEST_REG 0x0060 //test only
250
251#define SSD_RESET_REG 0x0068
252#define SSD_RELOAD_FW_REG 0x0070
253
254#define SSD_RESERVED_BLKS_REG 0x0074
255#define SSD_VALID_PAGES_REG 0x0078
256#define SSD_CH_INFO_REG 0x007C
257
258#define SSD_CTRL_TEST_REG_SZ 0x8
259#define SSD_CTRL_TEST_REG0 0x0080
260#define SSD_CTRL_TEST_REG1 0x0088
261#define SSD_CTRL_TEST_REG2 0x0090
262#define SSD_CTRL_TEST_REG3 0x0098
263#define SSD_CTRL_TEST_REG4 0x00A0
264#define SSD_CTRL_TEST_REG5 0x00A8
265#define SSD_CTRL_TEST_REG6 0x00B0
266#define SSD_CTRL_TEST_REG7 0x00B8
267
268#define SSD_FLASH_INFO_REG0 0x00C0
269#define SSD_FLASH_INFO_REG1 0x00C8
270#define SSD_FLASH_INFO_REG2 0x00D0
271#define SSD_FLASH_INFO_REG3 0x00D8
272#define SSD_FLASH_INFO_REG4 0x00E0
273#define SSD_FLASH_INFO_REG5 0x00E8
274#define SSD_FLASH_INFO_REG6 0x00F0
275#define SSD_FLASH_INFO_REG7 0x00F8
276
277#define SSD_RESP_INFO_REG 0x01B8
278#define SSD_NAND_BUFF_BASE 0x01BC //for nand write
279
280#define SSD_CHIP_INFO_REG_SZ 0x10
281#define SSD_CHIP_INFO_REG0 0x0100 //128 bit
282#define SSD_CHIP_INFO_REG1 0x0110
283#define SSD_CHIP_INFO_REG2 0x0120
284#define SSD_CHIP_INFO_REG3 0x0130
285#define SSD_CHIP_INFO_REG4 0x0140
286#define SSD_CHIP_INFO_REG5 0x0150
287#define SSD_CHIP_INFO_REG6 0x0160
288#define SSD_CHIP_INFO_REG7 0x0170
289
290#define SSD_RAM_INFO_REG 0x01C4
291
292#define SSD_BBT_BASE_REG 0x01C8
293#define SSD_ECT_BASE_REG 0x01CC
294
295#define SSD_CLEAR_INTR_REG 0x01F0
296
297#define SSD_INIT_STATE_REG_SZ 0x8
298#define SSD_INIT_STATE_REG0 0x0200
299#define SSD_INIT_STATE_REG1 0x0208
300#define SSD_INIT_STATE_REG2 0x0210
301#define SSD_INIT_STATE_REG3 0x0218
302#define SSD_INIT_STATE_REG4 0x0220
303#define SSD_INIT_STATE_REG5 0x0228
304#define SSD_INIT_STATE_REG6 0x0230
305#define SSD_INIT_STATE_REG7 0x0238
306
307#define SSD_ROM_INFO_REG 0x0600
308#define SSD_ROM_BRIDGE_FW_INFO_REG 0x0604
309#define SSD_ROM_CTRL_FW_INFO_REG 0x0608
310#define SSD_ROM_VP_INFO_REG 0x060C
311
312#define SSD_LOG_INFO_REG 0x0610
313#define SSD_LED_REG 0x0614
314#define SSD_MSG_BASE_REG 0x06F8
315
316/*spi reg */
317#define SSD_SPI_REG_CMD 0x0180
318#define SSD_SPI_REG_CMD_HI 0x0184
319#define SSD_SPI_REG_WDATA 0x0188
320#define SSD_SPI_REG_ID 0x0190
321#define SSD_SPI_REG_STATUS 0x0198
322#define SSD_SPI_REG_RDATA 0x01A0
323#define SSD_SPI_REG_READY 0x01A8
324
325/* i2c register */
326#define SSD_I2C_CTRL_REG 0x06F0
327#define SSD_I2C_RDATA_REG 0x06F4
328
329/* temperature reg */
330#define SSD_BRIGE_TEMP_REG 0x0618
331
332#define SSD_CTRL_TEMP_REG0 0x0700
333#define SSD_CTRL_TEMP_REG1 0x0708
334#define SSD_CTRL_TEMP_REG2 0x0710
335#define SSD_CTRL_TEMP_REG3 0x0718
336#define SSD_CTRL_TEMP_REG4 0x0720
337#define SSD_CTRL_TEMP_REG5 0x0728
338#define SSD_CTRL_TEMP_REG6 0x0730
339#define SSD_CTRL_TEMP_REG7 0x0738
340
341/* reversion 3 reg */
342#define SSD_PROTOCOL_VER_REG 0x01B4
343
344#define SSD_FLUSH_TIMEOUT_REG 0x02A4
345#define SSD_BM_FAULT_REG 0x0660
346
347#define SSD_PV3_RAM_STATUS_REG_SZ 0x4
348#define SSD_PV3_RAM_STATUS_REG0 0x0260
349#define SSD_PV3_RAM_STATUS_REG1 0x0264
350#define SSD_PV3_RAM_STATUS_REG2 0x0268
351#define SSD_PV3_RAM_STATUS_REG3 0x026C
352#define SSD_PV3_RAM_STATUS_REG4 0x0270
353#define SSD_PV3_RAM_STATUS_REG5 0x0274
354#define SSD_PV3_RAM_STATUS_REG6 0x0278
355#define SSD_PV3_RAM_STATUS_REG7 0x027C
356
357#define SSD_PV3_CHIP_INFO_REG_SZ 0x40
358#define SSD_PV3_CHIP_INFO_REG0 0x0300
359#define SSD_PV3_CHIP_INFO_REG1 0x0340
360#define SSD_PV3_CHIP_INFO_REG2 0x0380
361#define SSD_PV3_CHIP_INFO_REG3 0x03B0
362#define SSD_PV3_CHIP_INFO_REG4 0x0400
363#define SSD_PV3_CHIP_INFO_REG5 0x0440
364#define SSD_PV3_CHIP_INFO_REG6 0x0480
365#define SSD_PV3_CHIP_INFO_REG7 0x04B0
366
367#define SSD_PV3_INIT_STATE_REG_SZ 0x20
368#define SSD_PV3_INIT_STATE_REG0 0x0500
369#define SSD_PV3_INIT_STATE_REG1 0x0520
370#define SSD_PV3_INIT_STATE_REG2 0x0540
371#define SSD_PV3_INIT_STATE_REG3 0x0560
372#define SSD_PV3_INIT_STATE_REG4 0x0580
373#define SSD_PV3_INIT_STATE_REG5 0x05A0
374#define SSD_PV3_INIT_STATE_REG6 0x05C0
375#define SSD_PV3_INIT_STATE_REG7 0x05E0
376
377/* reversion 3.1.1 reg */
378#define SSD_FULL_RESET_REG 0x01B0
379
380#define SSD_CTRL_REG_ZONE_SZ 0x800
381
382#define SSD_BB_THRESHOLD_L1_REG 0x2C0
383#define SSD_BB_THRESHOLD_L2_REG 0x2C4
384
385#define SSD_BB_ACC_REG_SZ 0x4
386#define SSD_BB_ACC_REG0 0x21C0
387#define SSD_BB_ACC_REG1 0x29C0
388#define SSD_BB_ACC_REG2 0x31C0
389
390#define SSD_EC_THRESHOLD_L1_REG 0x2C8
391#define SSD_EC_THRESHOLD_L2_REG 0x2CC
392
393#define SSD_EC_ACC_REG_SZ 0x4
394#define SSD_EC_ACC_REG0 0x21E0
395#define SSD_EC_ACC_REG1 0x29E0
396#define SSD_EC_ACC_REG2 0x31E0
397
398/* reversion 3.1.2 & 3.1.3 reg */
399#define SSD_HW_STATUS_REG 0x02AC
400
401#define SSD_PLP_INFO_REG 0x0664
402
403/*reversion 3.2 reg*/
404#define SSD_POWER_ON_REG 0x01EC
405#define SSD_PCIE_LINKSTATUS_REG 0x01F8
406#define SSD_PL_CAP_LEARN_REG 0x01FC
407
408#define SSD_FPGA_1V0_REG0 0x2070
409#define SSD_FPGA_1V8_REG0 0x2078
410#define SSD_FPGA_1V0_REG1 0x2870
411#define SSD_FPGA_1V8_REG1 0x2878
412
413/*reversion 3.2 reg*/
414#define SSD_READ_OT_REG0 0x2260
415#define SSD_WRITE_OT_REG0 0x2264
416#define SSD_READ_OT_REG1 0x2A60
417#define SSD_WRITE_OT_REG1 0x2A64
418
419
420/* function */
421#define SSD_FUNC_READ 0x01
422#define SSD_FUNC_WRITE 0x02
423#define SSD_FUNC_NAND_READ_WOOB 0x03
424#define SSD_FUNC_NAND_READ 0x04
425#define SSD_FUNC_NAND_WRITE 0x05
426#define SSD_FUNC_NAND_ERASE 0x06
427#define SSD_FUNC_NAND_READ_ID 0x07
428#define SSD_FUNC_READ_LOG 0x08
429#define SSD_FUNC_TRIM 0x09
430#define SSD_FUNC_RAM_READ 0x10
431#define SSD_FUNC_RAM_WRITE 0x11
432#define SSD_FUNC_FLUSH 0x12 //cache / bbt
433
434/* spi function */
435#define SSD_SPI_CMD_PROGRAM 0x02
436#define SSD_SPI_CMD_READ 0x03
437#define SSD_SPI_CMD_W_DISABLE 0x04
438#define SSD_SPI_CMD_READ_STATUS 0x05
439#define SSD_SPI_CMD_W_ENABLE 0x06
440#define SSD_SPI_CMD_ERASE 0xd8
441#define SSD_SPI_CMD_CLSR 0x30
442#define SSD_SPI_CMD_READ_ID 0x9f
443
444/* i2c */
445#define SSD_I2C_CTRL_READ 0x00
446#define SSD_I2C_CTRL_WRITE 0x01
447
448/* i2c internal register */
449#define SSD_I2C_CFG_REG 0x00
450#define SSD_I2C_DATA_REG 0x01
451#define SSD_I2C_CMD_REG 0x02
452#define SSD_I2C_STATUS_REG 0x03
453#define SSD_I2C_SADDR_REG 0x04
454#define SSD_I2C_LEN_REG 0x05
455#define SSD_I2C_RLEN_REG 0x06
456#define SSD_I2C_WLEN_REG 0x07
457#define SSD_I2C_RESET_REG 0x08 //write for reset
458#define SSD_I2C_PRER_REG 0x09
459
460
461/* hw mon */
462/* FPGA volt = ADC_value / 4096 * 3v */
463#define SSD_FPGA_1V0_ADC_MIN 1228 // 0.9v
464#define SSD_FPGA_1V0_ADC_MAX 1502 // 1.1v
465#define SSD_FPGA_1V8_ADC_MIN 2211 // 1.62v
466#define SSD_FPGA_1V8_ADC_MAX 2703 // 1.98
467
468/* ADC value */
469#define SSD_FPGA_VOLT_MAX(val) (((val) & 0xffff) >> 4)
470#define SSD_FPGA_VOLT_MIN(val) (((val >> 16) & 0xffff) >> 4)
471#define SSD_FPGA_VOLT_CUR(val) (((val >> 32) & 0xffff) >> 4)
472#define SSD_FPGA_VOLT(val) ((val * 3000) >> 12)
473
474#define SSD_VOLT_LOG_DATA(idx, ctrl, volt) (((uint32_t)idx << 24) | ((uint32_t)ctrl << 16) | ((uint32_t)volt))
475
476enum ssd_fpga_volt
477{
478 SSD_FPGA_1V0 = 0,
479 SSD_FPGA_1V8,
480 SSD_FPGA_VOLT_NR
481};
482
483enum ssd_clock
484{
485 SSD_CLOCK_166M_LOST = 0,
486 SSD_CLOCK_166M_SKEW,
487 SSD_CLOCK_156M_LOST,
488 SSD_CLOCK_156M_SKEW,
489 SSD_CLOCK_NR
490};
491
492/* sensor */
493#define SSD_SENSOR_LM75_SADDRESS (0x49 << 1)
494#define SSD_SENSOR_LM80_SADDRESS (0x28 << 1)
495
496#define SSD_SENSOR_CONVERT_TEMP(val) ((int)(val >> 8))
497
498#define SSD_INLET_OT_TEMP (55) //55 DegC
499#define SSD_INLET_OT_HYST (50) //50 DegC
500#define SSD_FLASH_OT_TEMP (70) //70 DegC
501#define SSD_FLASH_OT_HYST (65) //65 DegC
502
503enum ssd_sensor
504{
505 SSD_SENSOR_LM80 = 0,
506 SSD_SENSOR_LM75,
507 SSD_SENSOR_NR
508};
509
510
511/* lm75 */
512enum ssd_lm75_reg
513{
514 SSD_LM75_REG_TEMP = 0,
515 SSD_LM75_REG_CONF,
516 SSD_LM75_REG_THYST,
517 SSD_LM75_REG_TOS
518};
519
520/* lm96080 */
521#define SSD_LM80_REG_IN_MAX(nr) (0x2a + (nr) * 2)
522#define SSD_LM80_REG_IN_MIN(nr) (0x2b + (nr) * 2)
523#define SSD_LM80_REG_IN(nr) (0x20 + (nr))
524
525#define SSD_LM80_REG_FAN1 0x28
526#define SSD_LM80_REG_FAN2 0x29
527#define SSD_LM80_REG_FAN_MIN(nr) (0x3b + (nr))
528
529#define SSD_LM80_REG_TEMP 0x27
530#define SSD_LM80_REG_TEMP_HOT_MAX 0x38
531#define SSD_LM80_REG_TEMP_HOT_HYST 0x39
532#define SSD_LM80_REG_TEMP_OS_MAX 0x3a
533#define SSD_LM80_REG_TEMP_OS_HYST 0x3b
534
535#define SSD_LM80_REG_CONFIG 0x00
536#define SSD_LM80_REG_ALARM1 0x01
537#define SSD_LM80_REG_ALARM2 0x02
538#define SSD_LM80_REG_MASK1 0x03
539#define SSD_LM80_REG_MASK2 0x04
540#define SSD_LM80_REG_FANDIV 0x05
541#define SSD_LM80_REG_RES 0x06
542
543#define SSD_LM80_CONVERT_VOLT(val) ((val * 10) >> 8)
544
545#define SSD_LM80_3V3_VOLT(val) ((val)*33/19)
546
547#define SSD_LM80_CONV_INTERVAL (1000)
548
549enum ssd_lm80_in
550{
551 SSD_LM80_IN_CAP = 0,
552 SSD_LM80_IN_1V2,
553 SSD_LM80_IN_1V2a,
554 SSD_LM80_IN_1V5,
555 SSD_LM80_IN_1V8,
556 SSD_LM80_IN_FPGA_3V3,
557 SSD_LM80_IN_3V3,
558 SSD_LM80_IN_NR
559};
560
561struct ssd_lm80_limit
562{
563 uint8_t low;
564 uint8_t high;
565};
566
567/* +/- 5% except cap in*/
568static struct ssd_lm80_limit ssd_lm80_limit[SSD_LM80_IN_NR] = {
569 {171, 217}, /* CAP in: 1710 ~ 2170 */
570 {114, 126},
571 {114, 126},
572 {142, 158},
573 {171, 189},
574 {180, 200},
575 {180, 200},
576};
577
578/* temperature sensors */
579enum ssd_temp_sensor
580{
581 SSD_TEMP_INLET = 0,
582 SSD_TEMP_FLASH,
583 SSD_TEMP_CTRL,
584 SSD_TEMP_NR
585};
586
587
588#ifdef SSD_OT_PROTECT
589#define SSD_OT_DELAY (60) //ms
590
591#define SSD_OT_TEMP (90) //90 DegC
592
593#define SSD_OT_TEMP_HYST (85) //85 DegC
594#endif
595
596/* fpga temperature */
597//#define CONVERT_TEMP(val) ((float)(val)*503.975f/4096.0f-273.15f)
598#define CONVERT_TEMP(val) ((val)*504/4096-273)
599
600#define MAX_TEMP(val) CONVERT_TEMP(((val & 0xffff) >> 4))
601#define MIN_TEMP(val) CONVERT_TEMP((((val>>16) & 0xffff) >> 4))
602#define CUR_TEMP(val) CONVERT_TEMP((((val>>32) & 0xffff) >> 4))
603
604
605/* CAP monitor */
606#define SSD_PL_CAP_U1 SSD_LM80_REG_IN(SSD_LM80_IN_CAP)
607#define SSD_PL_CAP_U2 SSD_LM80_REG_IN(SSD_LM80_IN_1V8)
608#define SSD_PL_CAP_LEARN(u1, u2, t) ((t*(u1+u2))/(2*162*(u1-u2)))
609#define SSD_PL_CAP_LEARN_WAIT (20) //20ms
610#define SSD_PL_CAP_LEARN_MAX_WAIT (1000/SSD_PL_CAP_LEARN_WAIT) //1s
611
612#define SSD_PL_CAP_CHARGE_WAIT (1000)
613#define SSD_PL_CAP_CHARGE_MAX_WAIT ((120*1000)/SSD_PL_CAP_CHARGE_WAIT) //120s
614
615#define SSD_PL_CAP_VOLT(val) (val*7)
616
617#define SSD_PL_CAP_VOLT_FULL (13700)
618#define SSD_PL_CAP_VOLT_READY (12880)
619
620#define SSD_PL_CAP_THRESHOLD (8900)
621#define SSD_PL_CAP_CP_THRESHOLD (5800)
622#define SSD_PL_CAP_THRESHOLD_HYST (100)
623
624enum ssd_pl_cap_status
625{
626 SSD_PL_CAP = 0,
627 SSD_PL_CAP_NR
628};
629
630enum ssd_pl_cap_type
631{
632 SSD_PL_CAP_DEFAULT = 0, /* 4 cap */
633 SSD_PL_CAP_CP /* 3 cap */
634};
635
636
637/* hwmon offset */
638#define SSD_HWMON_OFFS_TEMP (0)
639#define SSD_HWMON_OFFS_SENSOR (SSD_HWMON_OFFS_TEMP + SSD_TEMP_NR)
640#define SSD_HWMON_OFFS_PL_CAP (SSD_HWMON_OFFS_SENSOR + SSD_SENSOR_NR)
641#define SSD_HWMON_OFFS_LM80 (SSD_HWMON_OFFS_PL_CAP + SSD_PL_CAP_NR)
642#define SSD_HWMON_OFFS_CLOCK (SSD_HWMON_OFFS_LM80 + SSD_LM80_IN_NR)
643#define SSD_HWMON_OFFS_FPGA (SSD_HWMON_OFFS_CLOCK + SSD_CLOCK_NR)
644
645#define SSD_HWMON_TEMP(idx) (SSD_HWMON_OFFS_TEMP + idx)
646#define SSD_HWMON_SENSOR(idx) (SSD_HWMON_OFFS_SENSOR + idx)
647#define SSD_HWMON_PL_CAP(idx) (SSD_HWMON_OFFS_PL_CAP + idx)
648#define SSD_HWMON_LM80(idx) (SSD_HWMON_OFFS_LM80 + idx)
649#define SSD_HWMON_CLOCK(idx) (SSD_HWMON_OFFS_CLOCK + idx)
650#define SSD_HWMON_FPGA(ctrl, idx) (SSD_HWMON_OFFS_FPGA + (ctrl * SSD_FPGA_VOLT_NR) + idx)
651
652
653
654/* fifo */
655typedef struct sfifo
656{
657 uint32_t in;
658 uint32_t out;
659 uint32_t size;
660 uint32_t esize;
661 uint32_t mask;
662 spinlock_t lock;
663 void *data;
664} sfifo_t;
665
666static int sfifo_alloc(struct sfifo *fifo, uint32_t size, uint32_t esize)
667{
668 uint32_t __size = 1;
669
670 if (!fifo || size > INT_MAX || esize == 0) {
671 return -EINVAL;
672 }
673
674 while (__size < size) __size <<= 1;
675
676 if (__size < 2) {
677 return -EINVAL;
678 }
679
680 fifo->data = vmalloc(esize * __size);
681 if (!fifo->data) {
682 return -ENOMEM;
683 }
684
685 fifo->in = 0;
686 fifo->out = 0;
687 fifo->mask = __size - 1;
688 fifo->size = __size;
689 fifo->esize = esize;
690 spin_lock_init(&fifo->lock);
691
692 return 0;
693}
694
695static void sfifo_free(struct sfifo *fifo)
696{
697 if (!fifo) {
698 return;
699 }
700
701 vfree(fifo->data);
702 fifo->data = NULL;
703 fifo->in = 0;
704 fifo->out = 0;
705 fifo->mask = 0;
706 fifo->size = 0;
707 fifo->esize = 0;
708}
709
710static int __sfifo_put(struct sfifo *fifo, void *val)
711{
712 if (((fifo->in + 1) & fifo->mask) == fifo->out) {
713 return -1;
714 }
715
716 memcpy((fifo->data + (fifo->in * fifo->esize)), val, fifo->esize);
717 fifo->in = (fifo->in + 1) & fifo->mask;
718
719 return 0;
720}
721
722static int sfifo_put(struct sfifo *fifo, void *val)
723{
724 int ret = 0;
725
726 if (!fifo || !val) {
727 return -EINVAL;
728 }
729
730 if (!in_interrupt()) {
731 spin_lock_irq(&fifo->lock);
732 ret = __sfifo_put(fifo, val);
733 spin_unlock_irq(&fifo->lock);
734 } else {
735 spin_lock(&fifo->lock);
736 ret = __sfifo_put(fifo, val);
737 spin_unlock(&fifo->lock);
738 }
739
740 return ret;
741}
742
743static int __sfifo_get(struct sfifo *fifo, void *val)
744{
745 if (fifo->out == fifo->in) {
746 return -1;
747 }
748
749 memcpy(val, (fifo->data + (fifo->out * fifo->esize)), fifo->esize);
750 fifo->out = (fifo->out + 1) & fifo->mask;
751
752 return 0;
753}
754
755static int sfifo_get(struct sfifo *fifo, void *val)
756{
757 int ret = 0;
758
759 if (!fifo || !val) {
760 return -EINVAL;
761 }
762
763 if (!in_interrupt()) {
764 spin_lock_irq(&fifo->lock);
765 ret = __sfifo_get(fifo, val);
766 spin_unlock_irq(&fifo->lock);
767 } else {
768 spin_lock(&fifo->lock);
769 ret = __sfifo_get(fifo, val);
770 spin_unlock(&fifo->lock);
771 }
772
773 return ret;
774}
775
776/* bio list */
777#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
778struct ssd_blist {
779 struct bio *prev;
780 struct bio *next;
781};
782
783static inline void ssd_blist_init(struct ssd_blist *ssd_bl)
784{
785 ssd_bl->prev = NULL;
786 ssd_bl->next = NULL;
787}
788
789static inline struct bio *ssd_blist_get(struct ssd_blist *ssd_bl)
790{
791 struct bio *bio = ssd_bl->prev;
792
793 ssd_bl->prev = NULL;
794 ssd_bl->next = NULL;
795
796 return bio;
797}
798
799static inline void ssd_blist_add(struct ssd_blist *ssd_bl, struct bio *bio)
800{
801 bio->bi_next = NULL;
802
803 if (ssd_bl->next) {
804 ssd_bl->next->bi_next = bio;
805 } else {
806 ssd_bl->prev = bio;
807 }
808
809 ssd_bl->next = bio;
810}
811
812#else
813#define ssd_blist bio_list
814#define ssd_blist_init bio_list_init
815#define ssd_blist_get bio_list_get
816#define ssd_blist_add bio_list_add
817#endif
818
819#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
820#define bio_start(bio) (bio->bi_sector)
821#else
822#define bio_start(bio) (bio->bi_iter.bi_sector)
823#endif
824
825/* mutex */
826#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,16))
827#define mutex_lock down
828#define mutex_unlock up
829#define mutex semaphore
830#define mutex_init init_MUTEX
831#endif
832
833/* i2c */
834typedef union ssd_i2c_ctrl {
835 uint32_t val;
836 struct {
837 uint8_t wdata;
838 uint8_t addr;
839 uint16_t rw:1;
840 uint16_t pad:15;
841 } bits;
842}__attribute__((packed)) ssd_i2c_ctrl_t;
843
844typedef union ssd_i2c_data {
845 uint32_t val;
846 struct {
847 uint32_t rdata:8;
848 uint32_t valid:1;
849 uint32_t pad:23;
850 } bits;
851}__attribute__((packed)) ssd_i2c_data_t;
852
853/* write mode */
854enum ssd_write_mode
855{
856 SSD_WMODE_BUFFER = 0,
857 SSD_WMODE_BUFFER_EX,
858 SSD_WMODE_FUA,
859 /* dummy */
860 SSD_WMODE_AUTO,
861 SSD_WMODE_DEFAULT
862};
863
864/* reset type */
865enum ssd_reset_type
866{
867 SSD_RST_NOINIT = 0,
868 SSD_RST_NORMAL,
869 SSD_RST_FULL
870};
871
872/* ssd msg */
873typedef struct ssd_sg_entry
874{
875 uint64_t block:48;
876 uint64_t length:16;
877 uint64_t buf;
878}__attribute__((packed))ssd_sg_entry_t;
879
880typedef struct ssd_rw_msg
881{
882 uint8_t tag;
883 uint8_t flag;
884 uint8_t nsegs;
885 uint8_t fun;
886 uint32_t reserved; //for 64-bit align
887 struct ssd_sg_entry sge[1]; //base
888}__attribute__((packed))ssd_rw_msg_t;
889
890typedef struct ssd_resp_msg
891{
892 uint8_t tag;
893 uint8_t status:2;
894 uint8_t bitflip:6;
895 uint8_t log;
896 uint8_t fun;
897 uint32_t reserved;
898}__attribute__((packed))ssd_resp_msg_t;
899
900typedef struct ssd_flush_msg
901{
902 uint8_t tag;
903 uint8_t flag:2; //flash cache 0 or bbt 1
904 uint8_t flash:6;
905 uint8_t ctrl_idx;
906 uint8_t fun;
907 uint32_t reserved; //align
908}__attribute__((packed))ssd_flush_msg_t;
909
910typedef struct ssd_nand_op_msg
911{
912 uint8_t tag;
913 uint8_t flag;
914 uint8_t ctrl_idx;
915 uint8_t fun;
916 uint32_t reserved; //align
917 uint16_t page_count;
918 uint8_t chip_ce;
919 uint8_t chip_no;
920 uint32_t page_no;
921 uint64_t buf;
922}__attribute__((packed))ssd_nand_op_msg_t;
923
924typedef struct ssd_ram_op_msg
925{
926 uint8_t tag;
927 uint8_t flag;
928 uint8_t ctrl_idx;
929 uint8_t fun;
930 uint32_t reserved; //align
931 uint32_t start;
932 uint32_t length;
933 uint64_t buf;
934}__attribute__((packed))ssd_ram_op_msg_t;
935
936
937/* log msg */
938typedef struct ssd_log_msg
939{
940 uint8_t tag;
941 uint8_t flag;
942 uint8_t ctrl_idx;
943 uint8_t fun;
944 uint32_t reserved; //align
945 uint64_t buf;
946}__attribute__((packed))ssd_log_msg_t;
947
948typedef struct ssd_log_op_msg
949{
950 uint8_t tag;
951 uint8_t flag;
952 uint8_t ctrl_idx;
953 uint8_t fun;
954 uint32_t reserved; //align
955 uint64_t reserved1; //align
956 uint64_t buf;
957}__attribute__((packed))ssd_log_op_msg_t;
958
959typedef struct ssd_log_resp_msg
960{
961 uint8_t tag;
962 uint16_t status :2;
963 uint16_t reserved1 :2; //align with the normal resp msg
964 uint16_t nr_log :12;
965 uint8_t fun;
966 uint32_t reserved;
967}__attribute__((packed))ssd_log_resp_msg_t;
968
969
970/* resp msg */
971typedef union ssd_response_msq
972{
973 ssd_resp_msg_t resp_msg;
974 ssd_log_resp_msg_t log_resp_msg;
975 uint64_t u64_msg;
976 uint32_t u32_msg[2];
977} ssd_response_msq_t;
978
979
980/* custom struct */
981typedef struct ssd_protocol_info
982{
983 uint32_t ver;
984 uint32_t init_state_reg;
985 uint32_t init_state_reg_sz;
986 uint32_t chip_info_reg;
987 uint32_t chip_info_reg_sz;
988} ssd_protocol_info_t;
989
990typedef struct ssd_hw_info
991{
992 uint32_t bridge_ver;
993 uint32_t ctrl_ver;
994
995 uint32_t cmd_fifo_sz;
996 uint32_t cmd_fifo_sz_mask;
997 uint32_t cmd_max_sg;
998 uint32_t sg_max_sec;
999 uint32_t resp_ptr_sz;
1000 uint32_t resp_msg_sz;
1001
1002 uint16_t nr_ctrl;
1003
1004 uint16_t nr_data_ch;
1005 uint16_t nr_ch;
1006 uint16_t max_ch;
1007 uint16_t nr_chip;
1008
1009 uint8_t pcb_ver;
1010 uint8_t upper_pcb_ver;
1011
1012 uint8_t nand_vendor_id;
1013 uint8_t nand_dev_id;
1014
1015 uint8_t max_ce;
1016 uint8_t id_size;
1017 uint16_t oob_size;
1018
1019 uint16_t bbf_pages;
1020 uint16_t bbf_seek; //
1021
1022 uint16_t page_count; //per block
1023 uint32_t page_size;
1024 uint32_t block_count; //per flash
1025
1026 uint64_t ram_size;
1027 uint32_t ram_align;
1028 uint32_t ram_max_len;
1029
1030 uint64_t bbt_base;
1031 uint32_t bbt_size;
1032 uint64_t md_base; //metadata
1033 uint32_t md_size;
1034 uint32_t md_entry_sz;
1035
1036 uint32_t log_sz;
1037
1038 uint64_t nand_wbuff_base;
1039
1040 uint32_t md_reserved_blks;
1041 uint32_t reserved_blks;
1042 uint32_t valid_pages;
1043 uint32_t max_valid_pages;
1044 uint64_t size;
1045} ssd_hw_info_t;
1046
1047typedef struct ssd_hw_info_extend
1048{
1049 uint8_t board_type;
1050 uint8_t cap_type;
1051 uint8_t plp_type;
1052 uint8_t work_mode;
1053 uint8_t form_factor;
1054
1055 uint8_t pad[59];
1056}ssd_hw_info_extend_t;
1057
1058typedef struct ssd_rom_info
1059{
1060 uint32_t size;
1061 uint32_t block_size;
1062 uint16_t page_size;
1063 uint8_t nr_bridge_fw;
1064 uint8_t nr_ctrl_fw;
1065 uint8_t nr_bm_fw;
1066 uint8_t nr_smart;
1067 uint32_t bridge_fw_base;
1068 uint32_t bridge_fw_sz;
1069 uint32_t ctrl_fw_base;
1070 uint32_t ctrl_fw_sz;
1071 uint32_t bm_fw_base;
1072 uint32_t bm_fw_sz;
1073 uint32_t log_base;
1074 uint32_t log_sz;
1075 uint32_t smart_base;
1076 uint32_t smart_sz;
1077 uint32_t vp_base;
1078 uint32_t label_base;
1079} ssd_rom_info_t;
1080
1081/* debug info */
1082enum ssd_debug_type
1083{
1084 SSD_DEBUG_NONE = 0,
1085 SSD_DEBUG_READ_ERR,
1086 SSD_DEBUG_WRITE_ERR,
1087 SSD_DEBUG_RW_ERR,
1088 SSD_DEBUG_READ_TO,
1089 SSD_DEBUG_WRITE_TO,
1090 SSD_DEBUG_RW_TO,
1091 SSD_DEBUG_LOG,
1092 SSD_DEBUG_OFFLINE,
1093 SSD_DEBUG_NR
1094};
1095
1096typedef struct ssd_debug_info
1097{
1098 int type;
1099 union {
1100 struct {
1101 uint64_t off;
1102 uint32_t len;
1103 } loc;
1104 struct {
1105 int event;
1106 uint32_t extra;
1107 } log;
1108 } data;
1109}ssd_debug_info_t;
1110
1111/* label */
1112#define SSD_LABEL_FIELD_SZ 32
1113#define SSD_SN_SZ 16
1114
1115typedef struct ssd_label
1116{
1117 char date[SSD_LABEL_FIELD_SZ];
1118 char sn[SSD_LABEL_FIELD_SZ];
1119 char part[SSD_LABEL_FIELD_SZ];
1120 char desc[SSD_LABEL_FIELD_SZ];
1121 char other[SSD_LABEL_FIELD_SZ];
1122 char maf[SSD_LABEL_FIELD_SZ];
1123} ssd_label_t;
1124
1125#define SSD_LABEL_DESC_SZ 256
1126
1127typedef struct ssd_labelv3
1128{
1129 char boardtype[SSD_LABEL_FIELD_SZ];
1130 char barcode[SSD_LABEL_FIELD_SZ];
1131 char item[SSD_LABEL_FIELD_SZ];
1132 char description[SSD_LABEL_DESC_SZ];
1133 char manufactured[SSD_LABEL_FIELD_SZ];
1134 char vendorname[SSD_LABEL_FIELD_SZ];
1135 char issuenumber[SSD_LABEL_FIELD_SZ];
1136 char cleicode[SSD_LABEL_FIELD_SZ];
1137 char bom[SSD_LABEL_FIELD_SZ];
1138} ssd_labelv3_t;
1139
1140/* battery */
1141typedef struct ssd_battery_info
1142{
1143 uint32_t fw_ver;
1144} ssd_battery_info_t;
1145
1146/* ssd power stat */
1147typedef struct ssd_power_stat
1148{
1149 uint64_t nr_poweron;
1150 uint64_t nr_powerloss;
1151 uint64_t init_failed;
1152} ssd_power_stat_t;
1153
1154/* io stat */
1155typedef struct ssd_io_stat
1156{
1157 uint64_t run_time;
1158 uint64_t nr_to;
1159 uint64_t nr_ioerr;
1160 uint64_t nr_rwerr;
1161 uint64_t nr_read;
1162 uint64_t nr_write;
1163 uint64_t rsectors;
1164 uint64_t wsectors;
1165} ssd_io_stat_t;
1166
1167/* ecc */
1168typedef struct ssd_ecc_info
1169{
1170 uint64_t bitflip[SSD_ECC_MAX_FLIP];
1171} ssd_ecc_info_t;
1172
1173/* log */
1174enum ssd_log_level
1175{
1176 SSD_LOG_LEVEL_INFO = 0,
1177 SSD_LOG_LEVEL_NOTICE,
1178 SSD_LOG_LEVEL_WARNING,
1179 SSD_LOG_LEVEL_ERR,
1180 SSD_LOG_NR_LEVEL
1181};
1182
1183typedef struct ssd_log_info
1184{
1185 uint64_t nr_log;
1186 uint64_t stat[SSD_LOG_NR_LEVEL];
1187} ssd_log_info_t;
1188
1189/* S.M.A.R.T. */
1190#define SSD_SMART_MAGIC (0x5452414D53445353ull)
1191
1192typedef struct ssd_smart
1193{
1194 struct ssd_power_stat pstat;
1195 struct ssd_io_stat io_stat;
1196 struct ssd_ecc_info ecc_info;
1197 struct ssd_log_info log_info;
1198 uint64_t version;
1199 uint64_t magic;
1200} ssd_smart_t;
1201
1202/* internal log */
1203typedef struct ssd_internal_log
1204{
1205 uint32_t nr_log;
1206 void *log;
1207} ssd_internal_log_t;
1208
1209/* ssd cmd */
1210typedef struct ssd_cmd
1211{
1212 struct bio *bio;
1213 struct scatterlist *sgl;
1214 struct list_head list;
1215 void *dev;
1216 int nsegs;
1217 int flag; /*pbio(1) or bio(0)*/
1218
1219 int tag;
1220 void *msg;
1221 dma_addr_t msg_dma;
1222
1223 unsigned long start_time;
1224
1225 int errors;
1226 unsigned int nr_log;
1227
1228 struct timer_list cmd_timer;
1229 struct completion *waiting;
1230} ssd_cmd_t;
1231
1232typedef void (*send_cmd_func)(struct ssd_cmd *);
1233typedef int (*ssd_event_call)(struct gendisk *, int, int); /* gendisk, event id, event level */
1234
1235/* dcmd sz */
1236#define SSD_DCMD_MAX_SZ 32
1237
1238typedef struct ssd_dcmd
1239{
1240 struct list_head list;
1241 void *dev;
1242 uint8_t msg[SSD_DCMD_MAX_SZ];
1243} ssd_dcmd_t;
1244
1245
1246enum ssd_state {
1247 SSD_INIT_WORKQ,
1248 SSD_INIT_BD,
1249 SSD_ONLINE,
1250 /* full reset */
1251 SSD_RESETING,
1252 /* hw log */
1253 SSD_LOG_HW,
1254 /* log err */
1255 SSD_LOG_ERR
1256};
1257
1258#define SSD_QUEUE_NAME_LEN 16
1259typedef struct ssd_queue {
1260 char name[SSD_QUEUE_NAME_LEN];
1261 void *dev;
1262
1263 int idx;
1264
1265 uint32_t resp_idx;
1266 uint32_t resp_idx_mask;
1267 uint32_t resp_msg_sz;
1268
1269 void *resp_msg;
1270 void *resp_ptr;
1271
1272 struct ssd_cmd *cmd;
1273
1274 struct ssd_io_stat io_stat;
1275 struct ssd_ecc_info ecc_info;
1276} ssd_queue_t;
1277
1278typedef struct ssd_device {
1279 char name[SSD_DEV_NAME_LEN];
1280
1281 int idx;
1282 int major;
1283 int readonly;
1284
1285 int int_mode;
1286#ifdef SSD_ESCAPE_IRQ
1287 int irq_cpu;
1288#endif
1289
1290 int reload_fw;
1291
1292 int ot_delay; //in ms
1293
1294 atomic_t refcnt;
1295 atomic_t tocnt;
1296 atomic_t in_flight[2]; //r&w
1297
1298 uint64_t uptime;
1299
1300 struct list_head list;
1301 struct pci_dev *pdev;
1302
1303 unsigned long mmio_base;
1304 unsigned long mmio_len;
1305 void __iomem *ctrlp;
1306
1307 struct mutex spi_mutex;
1308 struct mutex i2c_mutex;
1309
1310 struct ssd_protocol_info protocol_info;
1311 struct ssd_hw_info hw_info;
1312 struct ssd_rom_info rom_info;
1313 struct ssd_label label;
1314
1315 struct ssd_smart smart;
1316
1317 atomic_t in_sendq;
1318 spinlock_t sendq_lock;
1319 struct ssd_blist sendq;
1320 struct task_struct *send_thread;
1321 wait_queue_head_t send_waitq;
1322
1323 atomic_t in_doneq;
1324 spinlock_t doneq_lock;
1325 struct ssd_blist doneq;
1326 struct task_struct *done_thread;
1327 wait_queue_head_t done_waitq;
1328
1329 struct ssd_dcmd *dcmd;
1330 spinlock_t dcmd_lock;
1331 struct list_head dcmd_list; /* direct cmd list */
1332 wait_queue_head_t dcmd_wq;
1333
1334 unsigned long *tag_map;
1335 wait_queue_head_t tag_wq;
1336
1337 spinlock_t cmd_lock;
1338 struct ssd_cmd *cmd;
1339 send_cmd_func scmd;
1340
1341 ssd_event_call event_call;
1342 void *msg_base;
1343 dma_addr_t msg_base_dma;
1344
1345 uint32_t resp_idx;
1346 void *resp_msg_base;
1347 void *resp_ptr_base;
1348 dma_addr_t resp_msg_base_dma;
1349 dma_addr_t resp_ptr_base_dma;
1350
1351 int nr_queue;
1352 struct msix_entry entry[SSD_MSIX_VEC];
1353 struct ssd_queue queue[SSD_MSIX_VEC];
1354
1355 struct request_queue *rq; /* The device request queue */
1356 struct gendisk *gd; /* The gendisk structure */
1357
1358 struct mutex internal_log_mutex;
1359 struct ssd_internal_log internal_log;
1360 struct workqueue_struct *workq;
1361 struct work_struct log_work; /* get log */
1362 void *log_buf;
1363
1364 unsigned long state; /* device state, for example, block device inited */
1365
1366 struct module *owner;
1367
1368 /* extend */
1369
1370 int slave;
1371 int cmajor;
1372 int save_md;
1373 int ot_protect;
1374
1375 struct kref kref;
1376
1377 struct mutex gd_mutex;
1378 struct ssd_log_info log_info; /* volatile */
1379
1380 atomic_t queue_depth;
1381 struct mutex barrier_mutex;
1382 struct mutex fw_mutex;
1383
1384 struct ssd_hw_info_extend hw_info_ext;
1385 struct ssd_labelv3 labelv3;
1386
1387 int wmode;
1388 int user_wmode;
1389 struct mutex bm_mutex;
1390 struct work_struct bm_work; /* check bm */
1391 struct timer_list bm_timer;
1392 struct sfifo log_fifo;
1393
1394 struct timer_list routine_timer;
1395 unsigned long routine_tick;
1396 unsigned long hwmon;
1397
1398 struct work_struct hwmon_work; /* check hw */
1399 struct work_struct capmon_work; /* check battery */
1400 struct work_struct tempmon_work; /* check temp */
1401
1402 /* debug info */
1403 struct ssd_debug_info db_info;
1404} ssd_device_t;
1405
1406
1407/* Ioctl struct */
1408typedef struct ssd_acc_info {
1409 uint32_t threshold_l1;
1410 uint32_t threshold_l2;
1411 uint32_t val;
1412} ssd_acc_info_t;
1413
1414typedef struct ssd_reg_op_info
1415{
1416 uint32_t offset;
1417 uint32_t value;
1418} ssd_reg_op_info_t;
1419
1420typedef struct ssd_spi_op_info
1421{
1422 void __user *buf;
1423 uint32_t off;
1424 uint32_t len;
1425} ssd_spi_op_info_t;
1426
1427typedef struct ssd_i2c_op_info
1428{
1429 uint8_t saddr;
1430 uint8_t wsize;
1431 uint8_t rsize;
1432 void __user *wbuf;
1433 void __user *rbuf;
1434} ssd_i2c_op_info_t;
1435
1436typedef struct ssd_smbus_op_info
1437{
1438 uint8_t saddr;
1439 uint8_t cmd;
1440 uint8_t size;
1441 void __user *buf;
1442} ssd_smbus_op_info_t;
1443
1444typedef struct ssd_ram_op_info {
1445 uint8_t ctrl_idx;
1446 uint32_t length;
1447 uint64_t start;
1448 uint8_t __user *buf;
1449} ssd_ram_op_info_t;
1450
1451typedef struct ssd_flash_op_info {
1452 uint32_t page;
1453 uint16_t flash;
1454 uint8_t chip;
1455 uint8_t ctrl_idx;
1456 uint8_t __user *buf;
1457} ssd_flash_op_info_t;
1458
1459typedef struct ssd_sw_log_info {
1460 uint16_t event;
1461 uint16_t pad;
1462 uint32_t data;
1463} ssd_sw_log_info_t;
1464
1465typedef struct ssd_version_info
1466{
1467 uint32_t bridge_ver; /* bridge fw version */
1468 uint32_t ctrl_ver; /* controller fw version */
1469 uint32_t bm_ver; /* battery manager fw version */
1470 uint8_t pcb_ver; /* main pcb version */
1471 uint8_t upper_pcb_ver;
1472 uint8_t pad0;
1473 uint8_t pad1;
1474} ssd_version_info_t;
1475
1476typedef struct pci_addr
1477{
1478 uint16_t domain;
1479 uint8_t bus;
1480 uint8_t slot;
1481 uint8_t func;
1482} pci_addr_t;
1483
1484typedef struct ssd_drv_param_info {
1485 int mode;
1486 int status_mask;
1487 int int_mode;
1488 int threaded_irq;
1489 int log_level;
1490 int wmode;
1491 int ot_protect;
1492 int finject;
1493 int pad[8];
1494} ssd_drv_param_info_t;
1495
1496
1497/* form factor */
1498enum ssd_form_factor
1499{
1500 SSD_FORM_FACTOR_HHHL = 0,
1501 SSD_FORM_FACTOR_FHHL
1502};
1503
1504
1505/* ssd power loss protect */
1506enum ssd_plp_type
1507{
1508 SSD_PLP_SCAP = 0,
1509 SSD_PLP_CAP,
1510 SSD_PLP_NONE
1511};
1512
1513/* ssd bm */
1514#define SSD_BM_SLAVE_ADDRESS 0x16
1515#define SSD_BM_CAP 5
1516
1517/* SBS cmd */
1518#define SSD_BM_SAFETYSTATUS 0x51
1519#define SSD_BM_OPERATIONSTATUS 0x54
1520
1521/* ManufacturerAccess */
1522#define SSD_BM_MANUFACTURERACCESS 0x00
1523#define SSD_BM_ENTER_CAP_LEARNING 0x0023 /* cap learning */
1524
1525/* Data flash access */
1526#define SSD_BM_DATA_FLASH_SUBCLASS_ID 0x77
1527#define SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1 0x78
1528#define SSD_BM_SYSTEM_DATA_SUBCLASS_ID 56
1529#define SSD_BM_CONFIGURATION_REGISTERS_ID 64
1530
1531/* min cap voltage */
1532#define SSD_BM_CAP_VOLT_MIN 500
1533
1534/*
1535enum ssd_bm_cap
1536{
1537 SSD_BM_CAP_VINA = 1,
1538 SSD_BM_CAP_JH = 3
1539};*/
1540
1541enum ssd_bmstatus
1542{
1543 SSD_BMSTATUS_OK = 0,
1544 SSD_BMSTATUS_CHARGING, /* not fully charged */
1545 SSD_BMSTATUS_WARNING
1546};
1547
1548enum sbs_unit {
1549 SBS_UNIT_VALUE = 0,
1550 SBS_UNIT_TEMPERATURE,
1551 SBS_UNIT_VOLTAGE,
1552 SBS_UNIT_CURRENT,
1553 SBS_UNIT_ESR,
1554 SBS_UNIT_PERCENT,
1555 SBS_UNIT_CAPACITANCE
1556};
1557
1558enum sbs_size {
1559 SBS_SIZE_BYTE = 1,
1560 SBS_SIZE_WORD,
1561 SBS_SIZE_BLK,
1562};
1563
1564struct sbs_cmd {
1565 uint8_t cmd;
1566 uint8_t size;
1567 uint8_t unit;
1568 uint8_t off;
1569 uint16_t mask;
1570 char *desc;
1571};
1572
1573struct ssd_bm {
1574 uint16_t temp;
1575 uint16_t volt;
1576 uint16_t curr;
1577 uint16_t esr;
1578 uint16_t rsoc;
1579 uint16_t health;
1580 uint16_t cap;
1581 uint16_t chg_curr;
1582 uint16_t chg_volt;
1583 uint16_t cap_volt[SSD_BM_CAP];
1584 uint16_t sf_alert;
1585 uint16_t sf_status;
1586 uint16_t op_status;
1587 uint16_t sys_volt;
1588};
1589
1590struct ssd_bm_manufacturer_data
1591{
1592 uint16_t pack_lot_code;
1593 uint16_t pcb_lot_code;
1594 uint16_t firmware_ver;
1595 uint16_t hardware_ver;
1596};
1597
1598struct ssd_bm_configuration_registers
1599{
1600 struct {
1601 uint16_t cc:3;
1602 uint16_t rsvd:5;
1603 uint16_t stack:1;
1604 uint16_t rsvd1:2;
1605 uint16_t temp:2;
1606 uint16_t rsvd2:1;
1607 uint16_t lt_en:1;
1608 uint16_t rsvd3:1;
1609 } operation_cfg;
1610 uint16_t pad;
1611 uint16_t fet_action;
1612 uint16_t pad1;
1613 uint16_t fault;
1614};
1615
1616#define SBS_VALUE_MASK 0xffff
1617
1618#define bm_var_offset(var) ((size_t) &((struct ssd_bm *)0)->var)
1619#define bm_var(start, offset) ((void *) start + (offset))
1620
1621static struct sbs_cmd ssd_bm_sbs[] = {
1622 {0x08, SBS_SIZE_WORD, SBS_UNIT_TEMPERATURE, bm_var_offset(temp), SBS_VALUE_MASK, "Temperature"},
1623 {0x09, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(volt), SBS_VALUE_MASK, "Voltage"},
1624 {0x0a, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(curr), SBS_VALUE_MASK, "Current"},
1625 {0x0b, SBS_SIZE_WORD, SBS_UNIT_ESR, bm_var_offset(esr), SBS_VALUE_MASK, "ESR"},
1626 {0x0d, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(rsoc), SBS_VALUE_MASK, "RelativeStateOfCharge"},
1627 {0x0e, SBS_SIZE_BYTE, SBS_UNIT_PERCENT, bm_var_offset(health), SBS_VALUE_MASK, "Health"},
1628 {0x10, SBS_SIZE_WORD, SBS_UNIT_CAPACITANCE, bm_var_offset(cap), SBS_VALUE_MASK, "Capacitance"},
1629 {0x14, SBS_SIZE_WORD, SBS_UNIT_CURRENT, bm_var_offset(chg_curr), SBS_VALUE_MASK, "ChargingCurrent"},
1630 {0x15, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(chg_volt), SBS_VALUE_MASK, "ChargingVoltage"},
1631 {0x3b, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[4]), SBS_VALUE_MASK, "CapacitorVoltage5"},
1632 {0x3c, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[3]), SBS_VALUE_MASK, "CapacitorVoltage4"},
1633 {0x3d, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[2]), SBS_VALUE_MASK, "CapacitorVoltage3"},
1634 {0x3e, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[1]), SBS_VALUE_MASK, "CapacitorVoltage2"},
1635 {0x3f, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, (uint8_t)bm_var_offset(cap_volt[0]), SBS_VALUE_MASK, "CapacitorVoltage1"},
1636 {0x50, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_alert), 0x870F, "SafetyAlert"},
1637 {0x51, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(sf_status), 0xE7BF, "SafetyStatus"},
1638 {0x54, SBS_SIZE_WORD, SBS_UNIT_VALUE, bm_var_offset(op_status), 0x79F4, "OperationStatus"},
1639 {0x5a, SBS_SIZE_WORD, SBS_UNIT_VOLTAGE, bm_var_offset(sys_volt), SBS_VALUE_MASK, "SystemVoltage"},
1640 {0, 0, 0, 0, 0, NULL},
1641};
1642
1643/* ssd ioctl */
1644#define SSD_CMD_GET_PROTOCOL_INFO _IOR('H', 100, struct ssd_protocol_info)
1645#define SSD_CMD_GET_HW_INFO _IOR('H', 101, struct ssd_hw_info)
1646#define SSD_CMD_GET_ROM_INFO _IOR('H', 102, struct ssd_rom_info)
1647#define SSD_CMD_GET_SMART _IOR('H', 103, struct ssd_smart)
1648#define SSD_CMD_GET_IDX _IOR('H', 105, int)
1649#define SSD_CMD_GET_AMOUNT _IOR('H', 106, int)
1650#define SSD_CMD_GET_TO_INFO _IOR('H', 107, int)
1651#define SSD_CMD_GET_DRV_VER _IOR('H', 108, char[DRIVER_VERSION_LEN])
1652
1653#define SSD_CMD_GET_BBACC_INFO _IOR('H', 109, struct ssd_acc_info)
1654#define SSD_CMD_GET_ECACC_INFO _IOR('H', 110, struct ssd_acc_info)
1655
1656#define SSD_CMD_GET_HW_INFO_EXT _IOR('H', 111, struct ssd_hw_info_extend)
1657
1658#define SSD_CMD_REG_READ _IOWR('H', 120, struct ssd_reg_op_info)
1659#define SSD_CMD_REG_WRITE _IOWR('H', 121, struct ssd_reg_op_info)
1660
1661#define SSD_CMD_SPI_READ _IOWR('H', 125, struct ssd_spi_op_info)
1662#define SSD_CMD_SPI_WRITE _IOWR('H', 126, struct ssd_spi_op_info)
1663#define SSD_CMD_SPI_ERASE _IOWR('H', 127, struct ssd_spi_op_info)
1664
1665#define SSD_CMD_I2C_READ _IOWR('H', 128, struct ssd_i2c_op_info)
1666#define SSD_CMD_I2C_WRITE _IOWR('H', 129, struct ssd_i2c_op_info)
1667#define SSD_CMD_I2C_WRITE_READ _IOWR('H', 130, struct ssd_i2c_op_info)
1668
1669#define SSD_CMD_SMBUS_SEND_BYTE _IOWR('H', 131, struct ssd_smbus_op_info)
1670#define SSD_CMD_SMBUS_RECEIVE_BYTE _IOWR('H', 132, struct ssd_smbus_op_info)
1671#define SSD_CMD_SMBUS_WRITE_BYTE _IOWR('H', 133, struct ssd_smbus_op_info)
1672#define SSD_CMD_SMBUS_READ_BYTE _IOWR('H', 135, struct ssd_smbus_op_info)
1673#define SSD_CMD_SMBUS_WRITE_WORD _IOWR('H', 136, struct ssd_smbus_op_info)
1674#define SSD_CMD_SMBUS_READ_WORD _IOWR('H', 137, struct ssd_smbus_op_info)
1675#define SSD_CMD_SMBUS_WRITE_BLOCK _IOWR('H', 138, struct ssd_smbus_op_info)
1676#define SSD_CMD_SMBUS_READ_BLOCK _IOWR('H', 139, struct ssd_smbus_op_info)
1677
1678#define SSD_CMD_BM_GET_VER _IOR('H', 140, uint16_t)
1679#define SSD_CMD_BM_GET_NR_CAP _IOR('H', 141, int)
1680#define SSD_CMD_BM_CAP_LEARNING _IOW('H', 142, int)
1681#define SSD_CMD_CAP_LEARN _IOR('H', 143, uint32_t)
1682#define SSD_CMD_GET_CAP_STATUS _IOR('H', 144, int)
1683
1684#define SSD_CMD_RAM_READ _IOWR('H', 150, struct ssd_ram_op_info)
1685#define SSD_CMD_RAM_WRITE _IOWR('H', 151, struct ssd_ram_op_info)
1686
1687#define SSD_CMD_NAND_READ_ID _IOR('H', 160, struct ssd_flash_op_info)
1688#define SSD_CMD_NAND_READ _IOWR('H', 161, struct ssd_flash_op_info) //with oob
1689#define SSD_CMD_NAND_WRITE _IOWR('H', 162, struct ssd_flash_op_info)
1690#define SSD_CMD_NAND_ERASE _IOWR('H', 163, struct ssd_flash_op_info)
1691#define SSD_CMD_NAND_READ_EXT _IOWR('H', 164, struct ssd_flash_op_info) //ingore EIO
1692
1693#define SSD_CMD_UPDATE_BBT _IOW('H', 180, struct ssd_flash_op_info)
1694
1695#define SSD_CMD_CLEAR_ALARM _IOW('H', 190, int)
1696#define SSD_CMD_SET_ALARM _IOW('H', 191, int)
1697
1698#define SSD_CMD_RESET _IOW('H', 200, int)
1699#define SSD_CMD_RELOAD_FW _IOW('H', 201, int)
1700#define SSD_CMD_UNLOAD_DEV _IOW('H', 202, int)
1701#define SSD_CMD_LOAD_DEV _IOW('H', 203, int)
1702#define SSD_CMD_UPDATE_VP _IOWR('H', 205, uint32_t)
1703#define SSD_CMD_FULL_RESET _IOW('H', 206, int)
1704
1705#define SSD_CMD_GET_NR_LOG _IOR('H', 220, uint32_t)
1706#define SSD_CMD_GET_LOG _IOR('H', 221, void *)
1707#define SSD_CMD_LOG_LEVEL _IOW('H', 222, int)
1708
1709#define SSD_CMD_OT_PROTECT _IOW('H', 223, int)
1710#define SSD_CMD_GET_OT_STATUS _IOR('H', 224, int)
1711
1712#define SSD_CMD_CLEAR_LOG _IOW('H', 230, int)
1713#define SSD_CMD_CLEAR_SMART _IOW('H', 231, int)
1714
1715#define SSD_CMD_SW_LOG _IOW('H', 232, struct ssd_sw_log_info)
1716
1717#define SSD_CMD_GET_LABEL _IOR('H', 235, struct ssd_label)
1718#define SSD_CMD_GET_VERSION _IOR('H', 236, struct ssd_version_info)
1719#define SSD_CMD_GET_TEMPERATURE _IOR('H', 237, int)
1720#define SSD_CMD_GET_BMSTATUS _IOR('H', 238, int)
1721#define SSD_CMD_GET_LABEL2 _IOR('H', 239, void *)
1722
1723
1724#define SSD_CMD_FLUSH _IOW('H', 240, int)
1725#define SSD_CMD_SAVE_MD _IOW('H', 241, int)
1726
1727#define SSD_CMD_SET_WMODE _IOW('H', 242, int)
1728#define SSD_CMD_GET_WMODE _IOR('H', 243, int)
1729#define SSD_CMD_GET_USER_WMODE _IOR('H', 244, int)
1730
1731#define SSD_CMD_DEBUG _IOW('H', 250, struct ssd_debug_info)
1732#define SSD_CMD_DRV_PARAM_INFO _IOR('H', 251, struct ssd_drv_param_info)
1733
1734
1735/* log */
1736#define SSD_LOG_MAX_SZ 4096
1737#define SSD_LOG_LEVEL SSD_LOG_LEVEL_NOTICE
1738
1739enum ssd_log_data
1740{
1741 SSD_LOG_DATA_NONE = 0,
1742 SSD_LOG_DATA_LOC,
1743 SSD_LOG_DATA_HEX
1744};
1745
1746typedef struct ssd_log_entry
1747{
1748 union {
1749 struct {
1750 uint32_t page:10;
1751 uint32_t block:14;
1752 uint32_t flash:8;
1753 } loc;
1754 struct {
1755 uint32_t page:12;
1756 uint32_t block:12;
1757 uint32_t flash:8;
1758 } loc1;
1759 uint32_t val;
1760 } data;
1761 uint16_t event:10;
1762 uint16_t mod:6;
1763 uint16_t idx;
1764}__attribute__((packed))ssd_log_entry_t;
1765
1766typedef struct ssd_log
1767{
1768 uint64_t time:56;
1769 uint64_t ctrl_idx:8;
1770 ssd_log_entry_t le;
1771} __attribute__((packed)) ssd_log_t;
1772
1773typedef struct ssd_log_desc
1774{
1775 uint16_t event;
1776 uint8_t level;
1777 uint8_t data;
1778 uint8_t sblock;
1779 uint8_t spage;
1780 char *desc;
1781} __attribute__((packed)) ssd_log_desc_t;
1782
1783#define SSD_LOG_SW_IDX 0xF
1784#define SSD_UNKNOWN_EVENT ((uint16_t)-1)
1785static struct ssd_log_desc ssd_log_desc[] = {
1786 /* event, level, show flash, show block, show page, desc */
1787 {0x0, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Create BBT failure"}, //g3
1788 {0x1, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 0, 0, "Read BBT failure"}, //g3
1789 {0x2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Mark bad block"},
1790 {0x3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flush BBT failure"},
1791 {0x4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1792 {0x7, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "No available blocks"},
1793 {0x8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Bad EC header"},
1794 {0x9, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 0, "Bad VID header"}, //g3
1795 {0xa, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Wear leveling"},
1796 {0xb, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "WL read back failure"},
1797 {0x11, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Data recovery failure"}, // err
1798 {0x20, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan mapping table failure"}, // err g3
1799 {0x21, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1800 {0x22, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1801 {0x23, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1802 {0x24, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Merge: read mapping page failure"},
1803 {0x25, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: read back failure"},
1804 {0x26, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1805 {0x27, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Data corrupted for abnormal power down"}, //g3
1806 {0x28, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Merge: mapping page corrupted"},
1807 {0x29, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: no mapping page"},
1808 {0x2a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: mapping pages incomplete"},
1809 {0x2b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read back failure after programming failure"}, // err
1810 {0xf1, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Read failure without recovery"}, // err
1811 {0xf2, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available blocks"}, // maybe err g3
1812 {0xf3, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: RAID incomplete"}, // err g3
1813 {0xf4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1814 {0xf5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read failure in moving data"},
1815 {0xf6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Program failure"},
1816 {0xf7, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_LOC, 1, 1, "Init: RAID not complete"},
1817 {0xf8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: data moving interrupted"},
1818 {0xfe, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Data inspection failure"},
1819 {0xff, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "IO: ECC failed"},
1820
1821 /* new */
1822 {0x2e, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 0, 0, "No available reserved blocks" }, // err
1823 {0x30, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PMT membership not found"},
1824 {0x31, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PMT corrupted"},
1825 {0x32, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT membership not found"},
1826 {0x33, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT not found"},
1827 {0x34, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PBT corrupted"},
1828 {0x35, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT page read failure"},
1829 {0x36, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT page read failure"},
1830 {0x37, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT backup page read failure"},
1831 {0x38, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT read failure"},
1832 {0x39, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PBMT scan failure"}, // err
1833 {0x3a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page read failure"},
1834 {0x3b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: first page scan failure"}, // err
1835 {0x3c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: scan unclosed block failure"}, // err
1836 {0x3d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: write pointer mismatch"},
1837 {0x3e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: PBMT read failure"},
1838 {0x3f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Init: PMT recovery: PBMT scan failure"},
1839 {0x40, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "Init: PMT recovery: data page read failure"}, //err
1840 {0x41, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT write pointer mismatch"},
1841 {0x42, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: PBT latest version corrupted"},
1842 {0x43, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Init: too many unclosed blocks"},
1843 {0x44, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Init: PDW block found"},
1844 {0x45, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Init: more than one PDW block found"}, //err
1845 {0x46, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Init: first page is blank or read failure"},
1846 {0x47, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Init: PDW block not found"},
1847
1848 {0x50, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: hit error data"}, // err
1849 {0x51, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 0, "Cache: read back failure"}, // err
1850 {0x52, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Cache: unknown command"}, //?
1851 {0x53, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_LOC, 1, 1, "GC/WL read back failure"}, // err
1852
1853 {0x60, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "Erase failure"},
1854
1855 {0x70, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "LPA not matched"},
1856 {0x71, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "PBN not matched"},
1857 {0x72, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read retry failure"},
1858 {0x73, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Need raid recovery"},
1859 {0x74, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "Need read retry"},
1860 {0x75, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read invalid data page"},
1861 {0x76, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN matched"},
1862 {0x77, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in cache, PBN not matched"},
1863 {0x78, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC error, data in flash, PBN not matched"},
1864 {0x79, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in cache, LPA not matched"},
1865 {0x7a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "ECC ok, data in flash, LPA not matched"},
1866 {0x7b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in cache, LPA not matched"},
1867 {0x7c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID data in flash, LPA not matched"},
1868 {0x7d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data page status error"},
1869 {0x7e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1870 {0x7f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Access flash timeout"},
1871
1872 {0x80, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "EC overflow"},
1873 {0x81, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_NONE, 0, 0, "Scrubbing completed"},
1874 {0x82, SSD_LOG_LEVEL_INFO, SSD_LOG_DATA_LOC, 1, 0, "Unstable block(too much bit flip)"},
1875 {0x83, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: ram error"}, //?
1876 {0x84, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: one PBMT read failure"},
1877
1878 {0x88, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: mark bad block"},
1879 {0x89, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 0, "GC: invalid page count error"}, // maybe err
1880 {0x8a, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: Bad Block close to limit"},
1881 {0x8b, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: Bad Block over limit"},
1882 {0x8c, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Warning: P/E cycles close to limit"},
1883 {0x8d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Error: P/E cycles over limit"},
1884
1885 {0x90, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Over temperature"}, //xx
1886 {0x91, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is OK"}, //xx
1887 {0x92, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "Battery fault"},
1888 {0x93, SSD_LOG_LEVEL_WARNING, SSD_LOG_DATA_NONE, 0, 0, "SEU fault"}, //err
1889 {0x94, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "DDR error"}, //err
1890 {0x95, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Controller serdes error"}, //err
1891 {0x96, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 1 error"}, //err
1892 {0x97, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_NONE, 0, 0, "Bridge serdes 2 error"}, //err
1893 {0x98, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "SEU fault (corrected)"}, //err
1894 {0x99, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Battery is OK"},
1895 {0x9a, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature close to limit"}, //xx
1896
1897 {0x9b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (low)"},
1898 {0x9c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "SEU fault address (high)"},
1899 {0x9d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "I2C fault" },
1900 {0x9e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "DDR single bit error" },
1901 {0x9f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Board voltage fault" },
1902
1903 {0xa0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "LPA not matched"},
1904 {0xa1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Re-read data in cache"},
1905 {0xa2, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read blank page"},
1906 {0xa3, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Read blank page"},
1907 {0xa4, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: new data in cache"},
1908 {0xa5, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: PBN not matched"},
1909 {0xa6, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Read data with error flag"},
1910 {0xa7, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: recoverd data with error flag"},
1911 {0xa8, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Blank page in cache, PBN matched"},
1912 {0xa9, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: Blank page in cache, PBN matched"},
1913 {0xaa, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 0, 0, "Flash init failure"},
1914 {0xab, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "Mapping table recovery failure"},
1915 {0xac, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_LOC, 1, 1, "RAID recovery: ECC failed"},
1916 {0xb0, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 95"},
1917 {0xb1, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Temperature is up to degree 100"},
1918
1919 {0x300, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "CMD timeout"},
1920 {0x301, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Power on"},
1921 {0x302, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Power off"},
1922 {0x303, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear log"},
1923 {0x304, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity"},
1924 {0x305, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data"},
1925 {0x306, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "BM safety status"},
1926 {0x307, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "I/O error"},
1927 {0x308, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CMD error"},
1928 {0x309, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set wmode"},
1929 {0x30a, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "DDR init failed" },
1930 {0x30b, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "PCIe link status" },
1931 {0x30c, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Controller reset sync error" },
1932 {0x30d, SSD_LOG_LEVEL_ERR, SSD_LOG_DATA_HEX, 0, 0, "Clock fault" },
1933 {0x30e, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "FPGA voltage fault status" },
1934 {0x30f, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Set capacity finished"},
1935 {0x310, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Clear data finished"},
1936 {0x311, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Reset"},
1937 {0x312, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "CAP: voltage fault"},
1938 {0x313, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: learn fault"},
1939 {0x314, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "CAP status"},
1940 {0x315, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "Board voltage fault status"},
1941 {0x316, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet over temperature"},
1942 {0x317, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Inlet temperature is OK"},
1943 {0x318, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash over temperature"},
1944 {0x319, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Flash temperature is OK"},
1945 {0x31a, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_NONE, 0, 0, "CAP: short circuit"},
1946 {0x31b, SSD_LOG_LEVEL_WARNING,SSD_LOG_DATA_HEX, 0, 0, "Sensor fault"},
1947 {0x31c, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data"},
1948 {0x31d, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_NONE, 0, 0, "Erase all data finished"},
1949
1950 {SSD_UNKNOWN_EVENT, SSD_LOG_LEVEL_NOTICE, SSD_LOG_DATA_HEX, 0, 0, "unknown event"},
1951};
1952/* */
1953#define SSD_LOG_OVER_TEMP 0x90
1954#define SSD_LOG_NORMAL_TEMP 0x91
1955#define SSD_LOG_WARN_TEMP 0x9a
1956#define SSD_LOG_SEU_FAULT 0x93
1957#define SSD_LOG_SEU_FAULT1 0x98
1958#define SSD_LOG_BATTERY_FAULT 0x92
1959#define SSD_LOG_BATTERY_OK 0x99
1960#define SSD_LOG_BOARD_VOLT_FAULT 0x9f
1961
1962/* software log */
1963#define SSD_LOG_TIMEOUT 0x300
1964#define SSD_LOG_POWER_ON 0x301
1965#define SSD_LOG_POWER_OFF 0x302
1966#define SSD_LOG_CLEAR_LOG 0x303
1967#define SSD_LOG_SET_CAPACITY 0x304
1968#define SSD_LOG_CLEAR_DATA 0x305
1969#define SSD_LOG_BM_SFSTATUS 0x306
1970#define SSD_LOG_EIO 0x307
1971#define SSD_LOG_ECMD 0x308
1972#define SSD_LOG_SET_WMODE 0x309
1973#define SSD_LOG_DDR_INIT_ERR 0x30a
1974#define SSD_LOG_PCIE_LINK_STATUS 0x30b
1975#define SSD_LOG_CTRL_RST_SYNC 0x30c
1976#define SSD_LOG_CLK_FAULT 0x30d
1977#define SSD_LOG_VOLT_FAULT 0x30e
1978#define SSD_LOG_SET_CAPACITY_END 0x30F
1979#define SSD_LOG_CLEAR_DATA_END 0x310
1980#define SSD_LOG_RESET 0x311
1981#define SSD_LOG_CAP_VOLT_FAULT 0x312
1982#define SSD_LOG_CAP_LEARN_FAULT 0x313
1983#define SSD_LOG_CAP_STATUS 0x314
1984#define SSD_LOG_VOLT_STATUS 0x315
1985#define SSD_LOG_INLET_OVER_TEMP 0x316
1986#define SSD_LOG_INLET_NORMAL_TEMP 0x317
1987#define SSD_LOG_FLASH_OVER_TEMP 0x318
1988#define SSD_LOG_FLASH_NORMAL_TEMP 0x319
1989#define SSD_LOG_CAP_SHORT_CIRCUIT 0x31a
1990#define SSD_LOG_SENSOR_FAULT 0x31b
1991#define SSD_LOG_ERASE_ALL 0x31c
1992#define SSD_LOG_ERASE_ALL_END 0x31d
1993
1994
1995/* sw log fifo depth */
1996#define SSD_LOG_FIFO_SZ 1024
1997
1998
1999/* done queue */
2000static DEFINE_PER_CPU(struct list_head, ssd_doneq);
2001static DEFINE_PER_CPU(struct tasklet_struct, ssd_tasklet);
2002
2003
2004/* unloading driver */
2005static volatile int ssd_exiting = 0;
2006
2007#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
2008static struct class_simple *ssd_class;
2009#else
2010static struct class *ssd_class;
2011#endif
2012
2013static int ssd_cmajor = SSD_CMAJOR;
2014
2015/* ssd block device major, minors */
2016static int ssd_major = SSD_MAJOR;
2017static int ssd_major_sl = SSD_MAJOR_SL;
2018static int ssd_minors = SSD_MINORS;
2019
2020/* ssd device list */
2021static struct list_head ssd_list;
2022static unsigned long ssd_index_bits[SSD_MAX_DEV / BITS_PER_LONG + 1];
2023static unsigned long ssd_index_bits_sl[SSD_MAX_DEV / BITS_PER_LONG + 1];
2024static atomic_t ssd_nr;
2025
2026/* module param */
2027enum ssd_drv_mode
2028{
2029 SSD_DRV_MODE_STANDARD = 0, /* full */
2030 SSD_DRV_MODE_DEBUG = 2, /* debug */
2031 SSD_DRV_MODE_BASE /* base only */
2032};
2033
2034enum ssd_int_mode
2035{
2036 SSD_INT_LEGACY = 0,
2037 SSD_INT_MSI,
2038 SSD_INT_MSIX
2039};
2040
2041#if (defined SSD_MSIX)
2042#define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2043#elif (defined SSD_MSI)
2044#define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2045#else
2046/* auto select the defaut int mode according to the kernel version*/
2047/* suse 11 sp1 irqbalance bug: use msi instead*/
2048#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6) || (defined RHEL_MAJOR && RHEL_MAJOR == 5 && RHEL_MINOR >= 5))
2049#define SSD_INT_MODE_DEFAULT SSD_INT_MSIX
2050#else
2051#define SSD_INT_MODE_DEFAULT SSD_INT_MSI
2052#endif
2053#endif
2054
2055static int mode = SSD_DRV_MODE_STANDARD;
2056static int status_mask = 0xFF;
2057static int int_mode = SSD_INT_MODE_DEFAULT;
2058static int threaded_irq = 0;
2059static int log_level = SSD_LOG_LEVEL_WARNING;
2060static int ot_protect = 1;
2061static int wmode = SSD_WMODE_DEFAULT;
2062static int finject = 0;
2063
2064module_param(mode, int, 0);
2065module_param(status_mask, int, 0);
2066module_param(int_mode, int, 0);
2067module_param(threaded_irq, int, 0);
2068module_param(log_level, int, 0);
2069module_param(ot_protect, int, 0);
2070module_param(wmode, int, 0);
2071module_param(finject, int, 0);
2072
2073
2074MODULE_PARM_DESC(mode, "driver mode, 0 - standard, 1 - debug, 2 - debug without IO, 3 - basic debug mode");
2075MODULE_PARM_DESC(status_mask, "command status mask, 0 - without command error, 0xff - with command error");
2076MODULE_PARM_DESC(int_mode, "preferred interrupt mode, 0 - legacy, 1 - msi, 2 - msix");
2077MODULE_PARM_DESC(threaded_irq, "threaded irq, 0 - normal irq, 1 - threaded irq");
2078MODULE_PARM_DESC(log_level, "log level to display, 0 - info and above, 1 - notice and above, 2 - warning and above, 3 - error only");
2079MODULE_PARM_DESC(ot_protect, "over temperature protect, 0 - disable, 1 - enable");
2080MODULE_PARM_DESC(wmode, "write mode, 0 - write buffer (with risk for the 6xx firmware), 1 - write buffer ex, 2 - write through, 3 - auto, 4 - default");
2081MODULE_PARM_DESC(finject, "enable fault simulation, 0 - off, 1 - on, for debug purpose only");
2082
2083
2084#ifndef MODULE
2085static int __init ssd_drv_mode(char *str)
2086{
2087 mode = (int)simple_strtoul(str, NULL, 0);
2088
2089 return 1;
2090}
2091
2092static int __init ssd_status_mask(char *str)
2093{
2094 status_mask = (int)simple_strtoul(str, NULL, 16);
2095
2096 return 1;
2097}
2098
2099static int __init ssd_int_mode(char *str)
2100{
2101 int_mode = (int)simple_strtoul(str, NULL, 0);
2102
2103 return 1;
2104}
2105
2106static int __init ssd_threaded_irq(char *str)
2107{
2108 threaded_irq = (int)simple_strtoul(str, NULL, 0);
2109
2110 return 1;
2111}
2112
2113static int __init ssd_log_level(char *str)
2114{
2115 log_level = (int)simple_strtoul(str, NULL, 0);
2116
2117 return 1;
2118}
2119
2120static int __init ssd_ot_protect(char *str)
2121{
2122 ot_protect = (int)simple_strtoul(str, NULL, 0);
2123
2124 return 1;
2125}
2126
2127static int __init ssd_wmode(char *str)
2128{
2129 wmode = (int)simple_strtoul(str, NULL, 0);
2130
2131 return 1;
2132}
2133
2134static int __init ssd_finject(char *str)
2135{
2136 finject = (int)simple_strtoul(str, NULL, 0);
2137
2138 return 1;
2139}
2140
2141__setup(MODULE_NAME"_mode=", ssd_drv_mode);
2142__setup(MODULE_NAME"_status_mask=", ssd_status_mask);
2143__setup(MODULE_NAME"_int_mode=", ssd_int_mode);
2144__setup(MODULE_NAME"_threaded_irq=", ssd_threaded_irq);
2145__setup(MODULE_NAME"_log_level=", ssd_log_level);
2146__setup(MODULE_NAME"_ot_protect=", ssd_ot_protect);
2147__setup(MODULE_NAME"_wmode=", ssd_wmode);
2148__setup(MODULE_NAME"_finject=", ssd_finject);
2149#endif
2150
2151
2152#ifdef CONFIG_PROC_FS
2153#include <linux/proc_fs.h>
2154#include <asm/uaccess.h>
2155
2156#define SSD_PROC_DIR MODULE_NAME
2157#define SSD_PROC_INFO "info"
2158
2159static struct proc_dir_entry *ssd_proc_dir = NULL;
2160static struct proc_dir_entry *ssd_proc_info = NULL;
2161
2162#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2163static int ssd_proc_read(char *page, char **start,
2164 off_t off, int count, int *eof, void *data)
2165{
2166 struct ssd_device *dev = NULL;
2167 struct ssd_device *n = NULL;
2168 uint64_t size;
2169 int idx;
2170 int len = 0;
2171 //char type; //xx
2172
2173 if (ssd_exiting) {
2174 return 0;
2175 }
2176
2177 len += snprintf((page + len), (count - len), "Driver Version:\t%s\n", DRIVER_VERSION);
2178
2179 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2180 idx = dev->idx + 1;
2181 size = dev->hw_info.size ;
2182 do_div(size, 1000000000);
2183
2184 len += snprintf((page + len), (count - len), "\n");
2185
2186 len += snprintf((page + len), (count - len), "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2187
2188 len += snprintf((page + len), (count - len), "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2189 if (dev->hw_info.ctrl_ver != 0) {
2190 len += snprintf((page + len), (count - len), "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2191 }
2192
2193 len += snprintf((page + len), (count - len), "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2194
2195 if (dev->hw_info.upper_pcb_ver >= 'A') {
2196 len += snprintf((page + len), (count - len), "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2197 }
2198
2199 len += snprintf((page + len), (count - len), "HIO %d Device:\t%s\n", idx, dev->name);
2200 }
2201
2202 return len;
2203}
2204
2205#else
2206
2207static int ssd_proc_show(struct seq_file *m, void *v)
2208{
2209 struct ssd_device *dev = NULL;
2210 struct ssd_device *n = NULL;
2211 uint64_t size;
2212 int idx;
2213
2214 if (ssd_exiting) {
2215 return 0;
2216 }
2217
2218 seq_printf(m, "Driver Version:\t%s\n", DRIVER_VERSION);
2219
2220 list_for_each_entry_safe(dev, n, &ssd_list, list) {
2221 idx = dev->idx + 1;
2222 size = dev->hw_info.size ;
2223 do_div(size, 1000000000);
2224
2225 seq_printf(m, "\n");
2226
2227 seq_printf(m, "HIO %d Size:\t%uGB\n", idx, (uint32_t)size);
2228
2229 seq_printf(m, "HIO %d Bridge FW VER:\t%03X\n", idx, dev->hw_info.bridge_ver);
2230 if (dev->hw_info.ctrl_ver != 0) {
2231 seq_printf(m, "HIO %d Controller FW VER:\t%03X\n", idx, dev->hw_info.ctrl_ver);
2232 }
2233
2234 seq_printf(m, "HIO %d PCB VER:\t.%c\n", idx, dev->hw_info.pcb_ver);
2235
2236 if (dev->hw_info.upper_pcb_ver >= 'A') {
2237 seq_printf(m, "HIO %d Upper PCB VER:\t.%c\n", idx, dev->hw_info.upper_pcb_ver);
2238 }
2239
2240 seq_printf(m, "HIO %d Device:\t%s\n", idx, dev->name);
2241 }
2242
2243 return 0;
2244}
2245
2246static int ssd_proc_open(struct inode *inode, struct file *file)
2247{
2248#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
2249 return single_open(file, ssd_proc_show, PDE(inode)->data);
2250#else
2251 return single_open(file, ssd_proc_show, PDE_DATA(inode));
2252#endif
2253}
2254
2255static const struct file_operations ssd_proc_fops = {
2256 .open = ssd_proc_open,
2257 .read = seq_read,
2258 .llseek = seq_lseek,
2259 .release = single_release,
2260};
2261#endif
2262
2263
2264static void ssd_cleanup_proc(void)
2265{
2266 if (ssd_proc_info) {
2267 remove_proc_entry(SSD_PROC_INFO, ssd_proc_dir);
2268 ssd_proc_info = NULL;
2269 }
2270 if (ssd_proc_dir) {
2271 remove_proc_entry(SSD_PROC_DIR, NULL);
2272 ssd_proc_dir = NULL;
2273 }
2274}
2275static int ssd_init_proc(void)
2276{
2277 ssd_proc_dir = proc_mkdir(SSD_PROC_DIR, NULL);
2278 if (!ssd_proc_dir)
2279 goto out_proc_mkdir;
2280
2281#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
2282 ssd_proc_info = create_proc_entry(SSD_PROC_INFO, S_IFREG | S_IRUGO | S_IWUSR, ssd_proc_dir);
2283 if (!ssd_proc_info)
2284 goto out_create_proc_entry;
2285
2286 ssd_proc_info->read_proc = ssd_proc_read;
2287
2288/* kernel bug */
2289#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30))
2290 ssd_proc_info->owner = THIS_MODULE;
2291#endif
2292#else
2293 ssd_proc_info = proc_create(SSD_PROC_INFO, 0600, ssd_proc_dir, &ssd_proc_fops);
2294 if (!ssd_proc_info)
2295 goto out_create_proc_entry;
2296#endif
2297
2298 return 0;
2299
2300out_create_proc_entry:
2301 remove_proc_entry(SSD_PROC_DIR, NULL);
2302out_proc_mkdir:
2303 return -ENOMEM;
2304}
2305
2306#else
2307static void ssd_cleanup_proc(void)
2308{
2309 return;
2310}
2311static int ssd_init_proc(void)
2312{
2313 return 0;
2314}
2315#endif /* CONFIG_PROC_FS */
2316
2317/* sysfs */
2318static void ssd_unregister_sysfs(struct ssd_device *dev)
2319{
2320 return;
2321}
2322
2323static int ssd_register_sysfs(struct ssd_device *dev)
2324{
2325 return 0;
2326}
2327
2328static void ssd_cleanup_sysfs(void)
2329{
2330 return;
2331}
2332
2333static int ssd_init_sysfs(void)
2334{
2335 return 0;
2336}
2337
2338static inline void ssd_put_index(int slave, int index)
2339{
2340 unsigned long *index_bits = ssd_index_bits;
2341
2342 if (slave) {
2343 index_bits = ssd_index_bits_sl;
2344 }
2345
2346 if (test_and_clear_bit(index, index_bits)) {
2347 atomic_dec(&ssd_nr);
2348 }
2349}
2350
2351static inline int ssd_get_index(int slave)
2352{
2353 unsigned long *index_bits = ssd_index_bits;
2354 int index;
2355
2356 if (slave) {
2357 index_bits = ssd_index_bits_sl;
2358 }
2359
2360find_index:
2361 if ((index = find_first_zero_bit(index_bits, SSD_MAX_DEV)) >= SSD_MAX_DEV) {
2362 return -1;
2363 }
2364
2365 if (test_and_set_bit(index, index_bits)) {
2366 goto find_index;
2367 }
2368
2369 atomic_inc(&ssd_nr);
2370
2371 return index;
2372}
2373
2374static void ssd_cleanup_index(void)
2375{
2376 return;
2377}
2378
2379static int ssd_init_index(void)
2380{
2381 INIT_LIST_HEAD(&ssd_list);
2382 atomic_set(&ssd_nr, 0);
2383 memset(ssd_index_bits, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2384 memset(ssd_index_bits_sl, 0, (SSD_MAX_DEV / BITS_PER_LONG + 1));
2385
2386 return 0;
2387}
2388
2389static void ssd_set_dev_name(char *name, size_t size, int idx)
2390{
2391 if(idx < SSD_ALPHABET_NUM) {
2392 snprintf(name, size, "%c", 'a'+idx);
2393 } else {
2394 idx -= SSD_ALPHABET_NUM;
2395 snprintf(name, size, "%c%c", 'a'+(idx/SSD_ALPHABET_NUM), 'a'+(idx%SSD_ALPHABET_NUM));
2396 }
2397}
2398
2399/* pci register r&w */
2400static inline void ssd_reg_write(void *addr, uint64_t val)
2401{
2402 iowrite32((uint32_t)val, addr);
2403 iowrite32((uint32_t)(val >> 32), addr + 4);
2404 wmb();
2405}
2406
2407static inline uint64_t ssd_reg_read(void *addr)
2408{
2409 uint64_t val;
2410 uint32_t val_lo, val_hi;
2411
2412 val_lo = ioread32(addr);
2413 val_hi = ioread32(addr + 4);
2414
2415 rmb();
2416 val = val_lo | ((uint64_t)val_hi << 32);
2417
2418 return val;
2419}
2420
2421
2422#define ssd_reg32_write(addr, val) writel(val, addr)
2423#define ssd_reg32_read(addr) readl(addr)
2424
2425/* alarm led */
2426static void ssd_clear_alarm(struct ssd_device *dev)
2427{
2428 uint32_t val;
2429
2430 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2431 return;
2432 }
2433
2434 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2435
2436 /* firmware control */
2437 val &= ~0x2;
2438
2439 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2440}
2441
2442static void ssd_set_alarm(struct ssd_device *dev)
2443{
2444 uint32_t val;
2445
2446 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
2447 return;
2448 }
2449
2450 val = ssd_reg32_read(dev->ctrlp + SSD_LED_REG);
2451
2452 /* light up */
2453 val &= ~0x1;
2454 /* software control */
2455 val |= 0x2;
2456
2457 ssd_reg32_write(dev->ctrlp + SSD_LED_REG, val);
2458}
2459
2460#define u32_swap(x) \
2461 ((uint32_t)( \
2462 (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \
2463 (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \
2464 (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \
2465 (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24)))
2466
2467#define u16_swap(x) \
2468 ((uint16_t)( \
2469 (((uint16_t)(x) & (uint16_t)0x00ff) << 8) | \
2470 (((uint16_t)(x) & (uint16_t)0xff00) >> 8) ))
2471
2472
2473#if 0
2474/* No lock, for init only*/
2475static int ssd_spi_read_id(struct ssd_device *dev, uint32_t *id)
2476{
2477 uint32_t val;
2478 unsigned long st;
2479 int ret = 0;
2480
2481 if (!dev || !id) {
2482 return -EINVAL;
2483 }
2484
2485 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_ID);
2486
2487 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2488 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2489 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2490 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2491
2492 st = jiffies;
2493 for (;;) {
2494 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2495 if (val == 0x1000000) {
2496 break;
2497 }
2498
2499 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2500 ret = -ETIMEDOUT;
2501 goto out;
2502 }
2503 cond_resched();
2504 }
2505
2506 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_ID);
2507 *id = val;
2508
2509out:
2510 return ret;
2511}
2512#endif
2513
2514/* spi access */
2515static int ssd_init_spi(struct ssd_device *dev)
2516{
2517 uint32_t val;
2518 unsigned long st;
2519 int ret = 0;
2520
2521 mutex_lock(&dev->spi_mutex);
2522 st = jiffies;
2523 for(;;) {
2524 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2525
2526 do {
2527 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2528
2529 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2530 ret = -ETIMEDOUT;
2531 goto out;
2532 }
2533 cond_resched();
2534 } while (val != 0x1000000);
2535
2536 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2537 if (!(val & 0x1)) {
2538 break;
2539 }
2540
2541 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2542 ret = -ETIMEDOUT;
2543 goto out;
2544 }
2545 cond_resched();
2546 }
2547
2548out:
2549 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2550 if (val & 0x1) {
2551 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2552 }
2553 }
2554 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2555 mutex_unlock(&dev->spi_mutex);
2556
2557 ret = 0;
2558
2559 return ret;
2560}
2561
2562static int ssd_spi_page_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2563{
2564 uint32_t val;
2565 uint32_t rlen = 0;
2566 unsigned long st;
2567 int ret = 0;
2568
2569 if (!dev || !buf) {
2570 return -EINVAL;
2571 }
2572
2573 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2574 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size) {
2575 return -EINVAL;
2576 }
2577
2578 mutex_lock(&dev->spi_mutex);
2579 while (rlen < size) {
2580 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, ((off + rlen) >> 24));
2581 wmb();
2582 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, (((off + rlen) << 8) | SSD_SPI_CMD_READ));
2583
2584 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2585 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2586 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2587 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2588
2589 st = jiffies;
2590 for (;;) {
2591 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2592 if (val == 0x1000000) {
2593 break;
2594 }
2595
2596 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2597 ret = -ETIMEDOUT;
2598 goto out;
2599 }
2600 cond_resched();
2601 }
2602
2603 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
2604 *(uint32_t *)(buf + rlen)= u32_swap(val);
2605
2606 rlen += sizeof(uint32_t);
2607 }
2608
2609out:
2610 mutex_unlock(&dev->spi_mutex);
2611 return ret;
2612}
2613
2614static int ssd_spi_page_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2615{
2616 uint32_t val;
2617 uint32_t wlen;
2618 unsigned long st;
2619 int i;
2620 int ret = 0;
2621
2622 if (!dev || !buf) {
2623 return -EINVAL;
2624 }
2625
2626 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2627 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size || size > dev->rom_info.page_size ||
2628 (off / dev->rom_info.page_size) != ((off + size - 1) / dev->rom_info.page_size)) {
2629 return -EINVAL;
2630 }
2631
2632 mutex_lock(&dev->spi_mutex);
2633
2634 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2635
2636 wlen = size / sizeof(uint32_t);
2637 for (i=0; i<(int)wlen; i++) {
2638 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_WDATA, u32_swap(*((uint32_t *)buf + i)));
2639 }
2640
2641 wmb();
2642 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2643 wmb();
2644 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_PROGRAM));
2645
2646 udelay(1);
2647
2648 st = jiffies;
2649 for (;;) {
2650 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2651 do {
2652 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2653
2654 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2655 ret = -ETIMEDOUT;
2656 goto out;
2657 }
2658 cond_resched();
2659 } while (val != 0x1000000);
2660
2661 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2662 if (!(val & 0x1)) {
2663 break;
2664 }
2665
2666 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2667 ret = -ETIMEDOUT;
2668 goto out;
2669 }
2670 cond_resched();
2671 }
2672
2673 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2674 if ((val >> 6) & 0x1) {
2675 ret = -EIO;
2676 goto out;
2677 }
2678 }
2679
2680out:
2681 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2682 if (val & 0x1) {
2683 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2684 }
2685 }
2686 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2687
2688 mutex_unlock(&dev->spi_mutex);
2689
2690 return ret;
2691}
2692
2693static int ssd_spi_block_erase(struct ssd_device *dev, uint32_t off)
2694{
2695 uint32_t val;
2696 unsigned long st;
2697 int ret = 0;
2698
2699 if (!dev) {
2700 return -EINVAL;
2701 }
2702
2703 if ((off % dev->rom_info.block_size) != 0 || off >= dev->rom_info.size) {
2704 return -EINVAL;
2705 }
2706
2707 mutex_lock(&dev->spi_mutex);
2708
2709 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2710 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_ENABLE);
2711
2712 wmb();
2713 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD_HI, (off >> 24));
2714 wmb();
2715 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, ((off << 8) | SSD_SPI_CMD_ERASE));
2716
2717 st = jiffies;
2718 for (;;) {
2719 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_READ_STATUS);
2720
2721 do {
2722 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_READY);
2723
2724 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2725 ret = -ETIMEDOUT;
2726 goto out;
2727 }
2728 cond_resched();
2729 } while (val != 0x1000000);
2730
2731 val = ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_STATUS);
2732 if (!(val & 0x1)) {
2733 break;
2734 }
2735
2736 if (time_after(jiffies, (st + SSD_SPI_TIMEOUT))) {
2737 ret = -ETIMEDOUT;
2738 goto out;
2739 }
2740 cond_resched();
2741 }
2742
2743 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2744 if ((val >> 5) & 0x1) {
2745 ret = -EIO;
2746 goto out;
2747 }
2748 }
2749
2750out:
2751 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
2752 if (val & 0x1) {
2753 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_CLSR);
2754 }
2755 }
2756 ssd_reg32_write(dev->ctrlp + SSD_SPI_REG_CMD, SSD_SPI_CMD_W_DISABLE);
2757
2758 mutex_unlock(&dev->spi_mutex);
2759
2760 return ret;
2761}
2762
2763static int ssd_spi_read(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2764{
2765 uint32_t len = 0;
2766 uint32_t roff;
2767 uint32_t rsize;
2768 int ret = 0;
2769
2770 if (!dev || !buf) {
2771 return -EINVAL;
2772 }
2773
2774 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2775 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2776 return -EINVAL;
2777 }
2778
2779 while (len < size) {
2780 roff = (off + len) % dev->rom_info.page_size;
2781 rsize = dev->rom_info.page_size - roff;
2782 if ((size - len) < rsize) {
2783 rsize = (size - len);
2784 }
2785 roff = off + len;
2786
2787 ret = ssd_spi_page_read(dev, (buf + len), roff, rsize);
2788 if (ret) {
2789 goto out;
2790 }
2791
2792 len += rsize;
2793
2794 cond_resched();
2795 }
2796
2797out:
2798 return ret;
2799}
2800
2801static int ssd_spi_write(struct ssd_device *dev, void *buf, uint32_t off, uint32_t size)
2802{
2803 uint32_t len = 0;
2804 uint32_t woff;
2805 uint32_t wsize;
2806 int ret = 0;
2807
2808 if (!dev || !buf) {
2809 return -EINVAL;
2810 }
2811
2812 if ((off % sizeof(uint32_t)) != 0 || (size % sizeof(uint32_t)) != 0 || size == 0 ||
2813 ((uint64_t)off + (uint64_t)size) > dev->rom_info.size) {
2814 return -EINVAL;
2815 }
2816
2817 while (len < size) {
2818 woff = (off + len) % dev->rom_info.page_size;
2819 wsize = dev->rom_info.page_size - woff;
2820 if ((size - len) < wsize) {
2821 wsize = (size - len);
2822 }
2823 woff = off + len;
2824
2825 ret = ssd_spi_page_write(dev, (buf + len), woff, wsize);
2826 if (ret) {
2827 goto out;
2828 }
2829
2830 len += wsize;
2831
2832 cond_resched();
2833 }
2834
2835out:
2836 return ret;
2837}
2838
2839static int ssd_spi_erase(struct ssd_device *dev, uint32_t off, uint32_t size)
2840{
2841 uint32_t len = 0;
2842 uint32_t eoff;
2843 int ret = 0;
2844
2845 if (!dev) {
2846 return -EINVAL;
2847 }
2848
2849 if (size == 0 || ((uint64_t)off + (uint64_t)size) > dev->rom_info.size ||
2850 (off % dev->rom_info.block_size) != 0 || (size % dev->rom_info.block_size) != 0) {
2851 return -EINVAL;
2852 }
2853
2854 while (len < size) {
2855 eoff = (off + len);
2856
2857 ret = ssd_spi_block_erase(dev, eoff);
2858 if (ret) {
2859 goto out;
2860 }
2861
2862 len += dev->rom_info.block_size;
2863
2864 cond_resched();
2865 }
2866
2867out:
2868 return ret;
2869}
2870
2871/* i2c access */
2872static uint32_t __ssd_i2c_reg32_read(void *addr)
2873{
2874 return ssd_reg32_read(addr);
2875}
2876
2877static void __ssd_i2c_reg32_write(void *addr, uint32_t val)
2878{
2879 ssd_reg32_write(addr, val);
2880 ssd_reg32_read(addr);
2881}
2882
2883static int __ssd_i2c_clear(struct ssd_device *dev, uint8_t saddr)
2884{
2885 ssd_i2c_ctrl_t ctrl;
2886 ssd_i2c_data_t data;
2887 uint8_t status = 0;
2888 int nr_data = 0;
2889 unsigned long st;
2890 int ret = 0;
2891
2892check_status:
2893 ctrl.bits.wdata = 0;
2894 ctrl.bits.addr = SSD_I2C_STATUS_REG;
2895 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2896 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2897
2898 st = jiffies;
2899 for (;;) {
2900 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2901 if (data.bits.valid == 0) {
2902 break;
2903 }
2904
2905 /* retry */
2906 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2907 ret = -ETIMEDOUT;
2908 goto out;
2909 }
2910 cond_resched();
2911 }
2912 status = data.bits.rdata;
2913
2914 if (!(status & 0x4)) {
2915 /* clear read fifo data */
2916 ctrl.bits.wdata = 0;
2917 ctrl.bits.addr = SSD_I2C_DATA_REG;
2918 ctrl.bits.rw = SSD_I2C_CTRL_READ;
2919 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2920
2921 st = jiffies;
2922 for (;;) {
2923 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
2924 if (data.bits.valid == 0) {
2925 break;
2926 }
2927
2928 /* retry */
2929 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
2930 ret = -ETIMEDOUT;
2931 goto out;
2932 }
2933 cond_resched();
2934 }
2935
2936 nr_data++;
2937 if (nr_data <= SSD_I2C_MAX_DATA) {
2938 goto check_status;
2939 } else {
2940 goto out_reset;
2941 }
2942 }
2943
2944 if (status & 0x3) {
2945 /* clear int */
2946 ctrl.bits.wdata = 0x04;
2947 ctrl.bits.addr = SSD_I2C_CMD_REG;
2948 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2949 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2950 }
2951
2952 if (!(status & 0x8)) {
2953out_reset:
2954 /* reset i2c controller */
2955 ctrl.bits.wdata = 0x0;
2956 ctrl.bits.addr = SSD_I2C_RESET_REG;
2957 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2958 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2959 }
2960
2961out:
2962 return ret;
2963}
2964
2965static int ssd_i2c_write(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
2966{
2967 ssd_i2c_ctrl_t ctrl;
2968 ssd_i2c_data_t data;
2969 uint8_t off = 0;
2970 uint8_t status = 0;
2971 unsigned long st;
2972 int ret = 0;
2973
2974 mutex_lock(&dev->i2c_mutex);
2975
2976 ctrl.val = 0;
2977
2978 /* slave addr */
2979 ctrl.bits.wdata = saddr;
2980 ctrl.bits.addr = SSD_I2C_SADDR_REG;
2981 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2982 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2983
2984 /* data */
2985 while (off < size) {
2986 ctrl.bits.wdata = buf[off];
2987 ctrl.bits.addr = SSD_I2C_DATA_REG;
2988 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2989 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2990
2991 off++;
2992 }
2993
2994 /* write */
2995 ctrl.bits.wdata = 0x01;
2996 ctrl.bits.addr = SSD_I2C_CMD_REG;
2997 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
2998 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
2999
3000 /* wait */
3001 st = jiffies;
3002 for (;;) {
3003 ctrl.bits.wdata = 0;
3004 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3005 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3006 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3007
3008 for (;;) {
3009 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3010 if (data.bits.valid == 0) {
3011 break;
3012 }
3013
3014 /* retry */
3015 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3016 ret = -ETIMEDOUT;
3017 goto out_clear;
3018 }
3019 cond_resched();
3020 }
3021
3022 status = data.bits.rdata;
3023 if (status & 0x1) {
3024 break;
3025 }
3026
3027 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3028 ret = -ETIMEDOUT;
3029 goto out_clear;
3030 }
3031 cond_resched();
3032 }
3033
3034 if (!(status & 0x1)) {
3035 ret = -1;
3036 goto out_clear;
3037 }
3038
3039 /* busy ? */
3040 if (status & 0x20) {
3041 ret = -2;
3042 goto out_clear;
3043 }
3044
3045 /* ack ? */
3046 if (status & 0x10) {
3047 ret = -3;
3048 goto out_clear;
3049 }
3050
3051 /* clear */
3052out_clear:
3053 if (__ssd_i2c_clear(dev, saddr)) {
3054 if (!ret) ret = -4;
3055 }
3056
3057 mutex_unlock(&dev->i2c_mutex);
3058
3059 return ret;
3060}
3061
3062static int ssd_i2c_read(struct ssd_device *dev, uint8_t saddr, uint8_t size, uint8_t *buf)
3063{
3064 ssd_i2c_ctrl_t ctrl;
3065 ssd_i2c_data_t data;
3066 uint8_t off = 0;
3067 uint8_t status = 0;
3068 unsigned long st;
3069 int ret = 0;
3070
3071 mutex_lock(&dev->i2c_mutex);
3072
3073 ctrl.val = 0;
3074
3075 /* slave addr */
3076 ctrl.bits.wdata = saddr;
3077 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3078 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3079 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3080
3081 /* read len */
3082 ctrl.bits.wdata = size;
3083 ctrl.bits.addr = SSD_I2C_LEN_REG;
3084 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3085 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3086
3087 /* read */
3088 ctrl.bits.wdata = 0x02;
3089 ctrl.bits.addr = SSD_I2C_CMD_REG;
3090 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3091 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3092
3093 /* wait */
3094 st = jiffies;
3095 for (;;) {
3096 ctrl.bits.wdata = 0;
3097 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3098 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3099 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3100
3101 for (;;) {
3102 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3103 if (data.bits.valid == 0) {
3104 break;
3105 }
3106
3107 /* retry */
3108 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3109 ret = -ETIMEDOUT;
3110 goto out_clear;
3111 }
3112 cond_resched();
3113 }
3114
3115 status = data.bits.rdata;
3116 if (status & 0x2) {
3117 break;
3118 }
3119
3120 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3121 ret = -ETIMEDOUT;
3122 goto out_clear;
3123 }
3124 cond_resched();
3125 }
3126
3127 if (!(status & 0x2)) {
3128 ret = -1;
3129 goto out_clear;
3130 }
3131
3132 /* busy ? */
3133 if (status & 0x20) {
3134 ret = -2;
3135 goto out_clear;
3136 }
3137
3138 /* ack ? */
3139 if (status & 0x10) {
3140 ret = -3;
3141 goto out_clear;
3142 }
3143
3144 /* data */
3145 while (off < size) {
3146 ctrl.bits.wdata = 0;
3147 ctrl.bits.addr = SSD_I2C_DATA_REG;
3148 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3149 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3150
3151 st = jiffies;
3152 for (;;) {
3153 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3154 if (data.bits.valid == 0) {
3155 break;
3156 }
3157
3158 /* retry */
3159 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3160 ret = -ETIMEDOUT;
3161 goto out_clear;
3162 }
3163 cond_resched();
3164 }
3165
3166 buf[off] = data.bits.rdata;
3167
3168 off++;
3169 }
3170
3171 /* clear */
3172out_clear:
3173 if (__ssd_i2c_clear(dev, saddr)) {
3174 if (!ret) ret = -4;
3175 }
3176
3177 mutex_unlock(&dev->i2c_mutex);
3178
3179 return ret;
3180}
3181
3182static int ssd_i2c_write_read(struct ssd_device *dev, uint8_t saddr, uint8_t wsize, uint8_t *wbuf, uint8_t rsize, uint8_t *rbuf)
3183{
3184 ssd_i2c_ctrl_t ctrl;
3185 ssd_i2c_data_t data;
3186 uint8_t off = 0;
3187 uint8_t status = 0;
3188 unsigned long st;
3189 int ret = 0;
3190
3191 mutex_lock(&dev->i2c_mutex);
3192
3193 ctrl.val = 0;
3194
3195 /* slave addr */
3196 ctrl.bits.wdata = saddr;
3197 ctrl.bits.addr = SSD_I2C_SADDR_REG;
3198 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3199 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3200
3201 /* data */
3202 off = 0;
3203 while (off < wsize) {
3204 ctrl.bits.wdata = wbuf[off];
3205 ctrl.bits.addr = SSD_I2C_DATA_REG;
3206 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3207 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3208
3209 off++;
3210 }
3211
3212 /* read len */
3213 ctrl.bits.wdata = rsize;
3214 ctrl.bits.addr = SSD_I2C_LEN_REG;
3215 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3216 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3217
3218 /* write -> read */
3219 ctrl.bits.wdata = 0x03;
3220 ctrl.bits.addr = SSD_I2C_CMD_REG;
3221 ctrl.bits.rw = SSD_I2C_CTRL_WRITE;
3222 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3223
3224 /* wait */
3225 st = jiffies;
3226 for (;;) {
3227 ctrl.bits.wdata = 0;
3228 ctrl.bits.addr = SSD_I2C_STATUS_REG;
3229 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3230 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3231
3232 for (;;) {
3233 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3234 if (data.bits.valid == 0) {
3235 break;
3236 }
3237
3238 /* retry */
3239 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3240 ret = -ETIMEDOUT;
3241 goto out_clear;
3242 }
3243 cond_resched();
3244 }
3245
3246 status = data.bits.rdata;
3247 if (status & 0x2) {
3248 break;
3249 }
3250
3251 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3252 ret = -ETIMEDOUT;
3253 goto out_clear;
3254 }
3255 cond_resched();
3256 }
3257
3258 if (!(status & 0x2)) {
3259 ret = -1;
3260 goto out_clear;
3261 }
3262
3263 /* busy ? */
3264 if (status & 0x20) {
3265 ret = -2;
3266 goto out_clear;
3267 }
3268
3269 /* ack ? */
3270 if (status & 0x10) {
3271 ret = -3;
3272 goto out_clear;
3273 }
3274
3275 /* data */
3276 off = 0;
3277 while (off < rsize) {
3278 ctrl.bits.wdata = 0;
3279 ctrl.bits.addr = SSD_I2C_DATA_REG;
3280 ctrl.bits.rw = SSD_I2C_CTRL_READ;
3281 __ssd_i2c_reg32_write(dev->ctrlp + SSD_I2C_CTRL_REG, ctrl.val);
3282
3283 st = jiffies;
3284 for (;;) {
3285 data.val = __ssd_i2c_reg32_read(dev->ctrlp + SSD_I2C_RDATA_REG);
3286 if (data.bits.valid == 0) {
3287 break;
3288 }
3289
3290 /* retry */
3291 if (time_after(jiffies, (st + SSD_I2C_TIMEOUT))) {
3292 ret = -ETIMEDOUT;
3293 goto out_clear;
3294 }
3295 cond_resched();
3296 }
3297
3298 rbuf[off] = data.bits.rdata;
3299
3300 off++;
3301 }
3302
3303 /* clear */
3304out_clear:
3305 if (__ssd_i2c_clear(dev, saddr)) {
3306 if (!ret) ret = -4;
3307 }
3308 mutex_unlock(&dev->i2c_mutex);
3309
3310 return ret;
3311}
3312
3313static int ssd_smbus_send_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3314{
3315 int i = 0;
3316 int ret = 0;
3317
3318 for (;;) {
3319 ret = ssd_i2c_write(dev, saddr, 1, buf);
3320 if (!ret || -ETIMEDOUT == ret) {
3321 break;
3322 }
3323
3324 i++;
3325 if (i >= SSD_SMBUS_RETRY_MAX) {
3326 break;
3327 }
3328 msleep(SSD_SMBUS_RETRY_INTERVAL);
3329 }
3330
3331 return ret;
3332}
3333
3334static int ssd_smbus_receive_byte(struct ssd_device *dev, uint8_t saddr, uint8_t *buf)
3335{
3336 int i = 0;
3337 int ret = 0;
3338
3339 for (;;) {
3340 ret = ssd_i2c_read(dev, saddr, 1, buf);
3341 if (!ret || -ETIMEDOUT == ret) {
3342 break;
3343 }
3344
3345 i++;
3346 if (i >= SSD_SMBUS_RETRY_MAX) {
3347 break;
3348 }
3349 msleep(SSD_SMBUS_RETRY_INTERVAL);
3350 }
3351
3352 return ret;
3353}
3354
3355static int ssd_smbus_write_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3356{
3357 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3358 int i = 0;
3359 int ret = 0;
3360
3361 smb_data[0] = cmd;
3362 memcpy((smb_data + 1), buf, 1);
3363
3364 for (;;) {
3365 ret = ssd_i2c_write(dev, saddr, 2, smb_data);
3366 if (!ret || -ETIMEDOUT == ret) {
3367 break;
3368 }
3369
3370 i++;
3371 if (i >= SSD_SMBUS_RETRY_MAX) {
3372 break;
3373 }
3374 msleep(SSD_SMBUS_RETRY_INTERVAL);
3375 }
3376
3377 return ret;
3378}
3379
3380static int ssd_smbus_read_byte(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3381{
3382 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3383 int i = 0;
3384 int ret = 0;
3385
3386 smb_data[0] = cmd;
3387
3388 for (;;) {
3389 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 1, buf);
3390 if (!ret || -ETIMEDOUT == ret) {
3391 break;
3392 }
3393
3394 i++;
3395 if (i >= SSD_SMBUS_RETRY_MAX) {
3396 break;
3397 }
3398 msleep(SSD_SMBUS_RETRY_INTERVAL);
3399 }
3400
3401 return ret;
3402}
3403
3404static int ssd_smbus_write_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3405{
3406 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3407 int i = 0;
3408 int ret = 0;
3409
3410 smb_data[0] = cmd;
3411 memcpy((smb_data + 1), buf, 2);
3412
3413 for (;;) {
3414 ret = ssd_i2c_write(dev, saddr, 3, smb_data);
3415 if (!ret || -ETIMEDOUT == ret) {
3416 break;
3417 }
3418
3419 i++;
3420 if (i >= SSD_SMBUS_RETRY_MAX) {
3421 break;
3422 }
3423 msleep(SSD_SMBUS_RETRY_INTERVAL);
3424 }
3425
3426 return ret;
3427}
3428
3429static int ssd_smbus_read_word(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t *buf)
3430{
3431 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3432 int i = 0;
3433 int ret = 0;
3434
3435 smb_data[0] = cmd;
3436
3437 for (;;) {
3438 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, 2, buf);
3439 if (!ret || -ETIMEDOUT == ret) {
3440 break;
3441 }
3442
3443 i++;
3444 if (i >= SSD_SMBUS_RETRY_MAX) {
3445 break;
3446 }
3447 msleep(SSD_SMBUS_RETRY_INTERVAL);
3448 }
3449
3450 return ret;
3451}
3452
3453static int ssd_smbus_write_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3454{
3455 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3456 int i = 0;
3457 int ret = 0;
3458
3459 smb_data[0] = cmd;
3460 smb_data[1] = size;
3461 memcpy((smb_data + 2), buf, size);
3462
3463 for (;;) {
3464 ret = ssd_i2c_write(dev, saddr, (2 + size), smb_data);
3465 if (!ret || -ETIMEDOUT == ret) {
3466 break;
3467 }
3468
3469 i++;
3470 if (i >= SSD_SMBUS_RETRY_MAX) {
3471 break;
3472 }
3473 msleep(SSD_SMBUS_RETRY_INTERVAL);
3474 }
3475
3476 return ret;
3477}
3478
3479static int ssd_smbus_read_block(struct ssd_device *dev, uint8_t saddr, uint8_t cmd, uint8_t size, uint8_t *buf)
3480{
3481 uint8_t smb_data[SSD_SMBUS_DATA_MAX] = {0};
3482 uint8_t rsize;
3483 int i = 0;
3484 int ret = 0;
3485
3486 smb_data[0] = cmd;
3487
3488 for (;;) {
3489 ret = ssd_i2c_write_read(dev, saddr, 1, smb_data, (SSD_SMBUS_BLOCK_MAX + 1), (smb_data + 1));
3490 if (!ret || -ETIMEDOUT == ret) {
3491 break;
3492 }
3493
3494 i++;
3495 if (i >= SSD_SMBUS_RETRY_MAX) {
3496 break;
3497 }
3498 msleep(SSD_SMBUS_RETRY_INTERVAL);
3499 }
3500 if (ret) {
3501 return ret;
3502 }
3503
3504 rsize = smb_data[1];
3505
3506 if (rsize > size ) {
3507 rsize = size;
3508 }
3509
3510 memcpy(buf, (smb_data + 2), rsize);
3511
3512 return 0;
3513}
3514
3515
3516static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data);
3517
3518/* sensor */
3519static int ssd_init_lm75(struct ssd_device *dev, uint8_t saddr)
3520{
3521 uint8_t conf = 0;
3522 int ret = 0;
3523
3524 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3525 if (ret) {
3526 goto out;
3527 }
3528
3529 conf &= (uint8_t)(~1u);
3530
3531 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM75_REG_CONF, &conf);
3532 if (ret) {
3533 goto out;
3534 }
3535
3536out:
3537 return ret;
3538}
3539
3540static int ssd_lm75_read(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3541{
3542 uint16_t val = 0;
3543 int ret;
3544
3545 ret = ssd_smbus_read_word(dev, saddr, SSD_LM75_REG_TEMP, (uint8_t *)&val);
3546 if (ret) {
3547 return ret;
3548 }
3549
3550 *data = u16_swap(val);
3551
3552 return 0;
3553}
3554
3555static int ssd_init_lm80(struct ssd_device *dev, uint8_t saddr)
3556{
3557 uint8_t val;
3558 uint8_t low, high;
3559 int i;
3560 int ret = 0;
3561
3562 /* init */
3563 val = 0x80;
3564 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3565 if (ret) {
3566 goto out;
3567 }
3568
3569 /* 11-bit temp */
3570 val = 0x08;
3571 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_RES, &val);
3572 if (ret) {
3573 goto out;
3574 }
3575
3576 /* set volt limit */
3577 for (i=0; i<SSD_LM80_IN_NR; i++) {
3578 high = ssd_lm80_limit[i].high;
3579 low = ssd_lm80_limit[i].low;
3580
3581 if (SSD_LM80_IN_CAP == i) {
3582 low = 0;
3583 }
3584
3585 if (dev->hw_info.nr_ctrl <= 1 && SSD_LM80_IN_1V2 == i) {
3586 high = 0xFF;
3587 low = 0;
3588 }
3589
3590 /* high limit */
3591 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MAX(i), &high);
3592 if (ret) {
3593 goto out;
3594 }
3595
3596 /* low limit*/
3597 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_IN_MIN(i), &low);
3598 if (ret) {
3599 goto out;
3600 }
3601 }
3602
3603 /* set interrupt mask: allow volt in interrupt except cap in*/
3604 val = 0x81;
3605 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3606 if (ret) {
3607 goto out;
3608 }
3609
3610 /* set interrupt mask: disable others */
3611 val = 0xFF;
3612 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK2, &val);
3613 if (ret) {
3614 goto out;
3615 }
3616
3617 /* start */
3618 val = 0x03;
3619 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_CONFIG, &val);
3620 if (ret) {
3621 goto out;
3622 }
3623
3624out:
3625 return ret;
3626}
3627
3628static int ssd_lm80_enable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3629{
3630 uint8_t val = 0;
3631 int ret = 0;
3632
3633 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3634 return -EINVAL;
3635 }
3636
3637 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3638 if (ret) {
3639 goto out;
3640 }
3641
3642 val &= ~(1UL << (uint32_t)idx);
3643
3644 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3645 if (ret) {
3646 goto out;
3647 }
3648
3649out:
3650 return ret;
3651}
3652
3653static int ssd_lm80_disable_in(struct ssd_device *dev, uint8_t saddr, int idx)
3654{
3655 uint8_t val = 0;
3656 int ret = 0;
3657
3658 if (idx >= SSD_LM80_IN_NR || idx < 0) {
3659 return -EINVAL;
3660 }
3661
3662 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3663 if (ret) {
3664 goto out;
3665 }
3666
3667 val |= (1UL << (uint32_t)idx);
3668
3669 ret = ssd_smbus_write_byte(dev, saddr, SSD_LM80_REG_MASK1, &val);
3670 if (ret) {
3671 goto out;
3672 }
3673
3674out:
3675 return ret;
3676}
3677
3678static int ssd_lm80_read_temp(struct ssd_device *dev, uint8_t saddr, uint16_t *data)
3679{
3680 uint16_t val = 0;
3681 int ret;
3682
3683 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_TEMP, (uint8_t *)&val);
3684 if (ret) {
3685 return ret;
3686 }
3687
3688 *data = u16_swap(val);
3689
3690 return 0;
3691}
3692
3693static int ssd_lm80_check_event(struct ssd_device *dev, uint8_t saddr)
3694{
3695 uint32_t volt;
3696 uint16_t val = 0, status;
3697 uint8_t alarm1 = 0, alarm2 = 0;
3698 int i;
3699 int ret = 0;
3700
3701 /* read interrupt status to clear interrupt */
3702 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM1, &alarm1);
3703 if (ret) {
3704 goto out;
3705 }
3706
3707 ret = ssd_smbus_read_byte(dev, saddr, SSD_LM80_REG_ALARM2, &alarm2);
3708 if (ret) {
3709 goto out;
3710 }
3711
3712 status = (uint16_t)alarm1 | ((uint16_t)alarm2 << 8);
3713
3714 /* parse inetrrupt status */
3715 for (i=0; i<SSD_LM80_IN_NR; i++) {
3716 if (!((status >> (uint32_t)i) & 0x1)) {
3717 if (test_and_clear_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3718 /* enable INx irq */
3719 ret = ssd_lm80_enable_in(dev, saddr, i);
3720 if (ret) {
3721 goto out;
3722 }
3723 }
3724
3725 continue;
3726 }
3727
3728 /* disable INx irq */
3729 ret = ssd_lm80_disable_in(dev, saddr, i);
3730 if (ret) {
3731 goto out;
3732 }
3733
3734 if (test_and_set_bit(SSD_HWMON_LM80(i), &dev->hwmon)) {
3735 continue;
3736 }
3737
3738 ret = ssd_smbus_read_word(dev, saddr, SSD_LM80_REG_IN(i), (uint8_t *)&val);
3739 if (ret) {
3740 goto out;
3741 }
3742
3743 volt = SSD_LM80_CONVERT_VOLT(u16_swap(val));
3744
3745 switch (i) {
3746 case SSD_LM80_IN_CAP: {
3747 if (0 == volt) {
3748 ssd_gen_swlog(dev, SSD_LOG_CAP_SHORT_CIRCUIT, 0);
3749 } else {
3750 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(volt));
3751 }
3752 break;
3753 }
3754
3755 case SSD_LM80_IN_1V2:
3756 case SSD_LM80_IN_1V2a:
3757 case SSD_LM80_IN_1V5:
3758 case SSD_LM80_IN_1V8: {
3759 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, volt));
3760 break;
3761 }
3762 case SSD_LM80_IN_FPGA_3V3:
3763 case SSD_LM80_IN_3V3: {
3764 ssd_gen_swlog(dev, SSD_LOG_VOLT_STATUS, SSD_VOLT_LOG_DATA(i, 0, SSD_LM80_3V3_VOLT(volt)));
3765 break;
3766 }
3767 default:
3768 break;
3769 }
3770 }
3771
3772out:
3773 if (ret) {
3774 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3775 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, (uint32_t)saddr);
3776 }
3777 } else {
3778 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3779 }
3780 return ret;
3781}
3782
3783static int ssd_init_sensor(struct ssd_device *dev)
3784{
3785 int ret = 0;
3786
3787 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3788 goto out;
3789 }
3790
3791 ret = ssd_init_lm75(dev, SSD_SENSOR_LM75_SADDRESS);
3792 if (ret) {
3793 hio_warn("%s: init lm75 failed\n", dev->name);
3794 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3795 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3796 }
3797 goto out;
3798 }
3799
3800 if (dev->hw_info.pcb_ver >= 'B' || dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_HHHL) {
3801 ret = ssd_init_lm80(dev, SSD_SENSOR_LM80_SADDRESS);
3802 if (ret) {
3803 hio_warn("%s: init lm80 failed\n", dev->name);
3804 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3805 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3806 }
3807 goto out;
3808 }
3809 }
3810
3811out:
3812 /* skip error if not in standard mode */
3813 if (mode != SSD_DRV_MODE_STANDARD) {
3814 ret = 0;
3815 }
3816 return ret;
3817}
3818
3819/* board volt */
3820static int ssd_mon_boardvolt(struct ssd_device *dev)
3821{
3822 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3823 return 0;
3824 }
3825
3826 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3827 return 0;
3828 }
3829
3830 return ssd_lm80_check_event(dev, SSD_SENSOR_LM80_SADDRESS);
3831}
3832
3833/* temperature */
3834static int ssd_mon_temp(struct ssd_device *dev)
3835{
3836 int cur;
3837 uint16_t val = 0;
3838 int ret = 0;
3839
3840 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
3841 return 0;
3842 }
3843
3844 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
3845 return 0;
3846 }
3847
3848 /* inlet */
3849 ret = ssd_lm80_read_temp(dev, SSD_SENSOR_LM80_SADDRESS, &val);
3850 if (ret) {
3851 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
3852 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
3853 }
3854 goto out;
3855 }
3856 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon);
3857
3858 cur = SSD_SENSOR_CONVERT_TEMP(val);
3859 if (cur >= SSD_INLET_OT_TEMP) {
3860 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3861 ssd_gen_swlog(dev, SSD_LOG_INLET_OVER_TEMP, (uint32_t)cur);
3862 }
3863 } else if(cur < SSD_INLET_OT_HYST) {
3864 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_INLET), &dev->hwmon)) {
3865 ssd_gen_swlog(dev, SSD_LOG_INLET_NORMAL_TEMP, (uint32_t)cur);
3866 }
3867 }
3868
3869 /* flash */
3870 ret = ssd_lm75_read(dev, SSD_SENSOR_LM75_SADDRESS, &val);
3871 if (ret) {
3872 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon)) {
3873 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM75_SADDRESS);
3874 }
3875 goto out;
3876 }
3877 test_and_clear_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM75), &dev->hwmon);
3878
3879 cur = SSD_SENSOR_CONVERT_TEMP(val);
3880 if (cur >= SSD_FLASH_OT_TEMP) {
3881 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3882 ssd_gen_swlog(dev, SSD_LOG_FLASH_OVER_TEMP, (uint32_t)cur);
3883 }
3884 } else if(cur < SSD_FLASH_OT_HYST) {
3885 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_FLASH), &dev->hwmon)) {
3886 ssd_gen_swlog(dev, SSD_LOG_FLASH_NORMAL_TEMP, (uint32_t)cur);
3887 }
3888 }
3889
3890out:
3891 return ret;
3892}
3893
3894/* cmd tag */
3895static inline void ssd_put_tag(struct ssd_device *dev, int tag)
3896{
3897 test_and_clear_bit(tag, dev->tag_map);
3898 wake_up(&dev->tag_wq);
3899}
3900
3901static inline int ssd_get_tag(struct ssd_device *dev, int wait)
3902{
3903 int tag;
3904
3905find_tag:
3906 while ((tag = find_first_zero_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz)) >= atomic_read(&dev->queue_depth)) {
3907 DEFINE_WAIT(__wait);
3908
3909 if (!wait) {
3910 return -1;
3911 }
3912
3913 prepare_to_wait_exclusive(&dev->tag_wq, &__wait, TASK_UNINTERRUPTIBLE);
3914 schedule();
3915
3916 finish_wait(&dev->tag_wq, &__wait);
3917 }
3918
3919 if (test_and_set_bit(tag, dev->tag_map)) {
3920 goto find_tag;
3921 }
3922
3923 return tag;
3924}
3925
3926static void ssd_barrier_put_tag(struct ssd_device *dev, int tag)
3927{
3928 test_and_clear_bit(tag, dev->tag_map);
3929}
3930
3931static int ssd_barrier_get_tag(struct ssd_device *dev)
3932{
3933 int tag = 0;
3934
3935 if (test_and_set_bit(tag, dev->tag_map)) {
3936 return -1;
3937 }
3938
3939 return tag;
3940}
3941
3942static void ssd_barrier_end(struct ssd_device *dev)
3943{
3944 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3945 wake_up_all(&dev->tag_wq);
3946
3947 mutex_unlock(&dev->barrier_mutex);
3948}
3949
3950static int ssd_barrier_start(struct ssd_device *dev)
3951{
3952 int i;
3953
3954 mutex_lock(&dev->barrier_mutex);
3955
3956 atomic_set(&dev->queue_depth, 0);
3957
3958 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3959 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3960 return 0;
3961 }
3962
3963 __set_current_state(TASK_INTERRUPTIBLE);
3964 schedule_timeout(1);
3965 }
3966
3967 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
3968 wake_up_all(&dev->tag_wq);
3969
3970 mutex_unlock(&dev->barrier_mutex);
3971
3972 return -EBUSY;
3973}
3974
3975static int ssd_busy(struct ssd_device *dev)
3976{
3977 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3978 return 0;
3979 }
3980
3981 return 1;
3982}
3983
3984static int ssd_wait_io(struct ssd_device *dev)
3985{
3986 int i;
3987
3988 for (i=0; i<SSD_CMD_TIMEOUT; i++) {
3989 if (find_first_bit(dev->tag_map, dev->hw_info.cmd_fifo_sz) >= dev->hw_info.cmd_fifo_sz) {
3990 return 0;
3991 }
3992
3993 __set_current_state(TASK_INTERRUPTIBLE);
3994 schedule_timeout(1);
3995 }
3996
3997 return -EBUSY;
3998}
3999
4000#if 0
4001static int ssd_in_barrier(struct ssd_device *dev)
4002{
4003 return (0 == atomic_read(&dev->queue_depth));
4004}
4005#endif
4006
4007static void ssd_cleanup_tag(struct ssd_device *dev)
4008{
4009 kfree(dev->tag_map);
4010}
4011
4012static int ssd_init_tag(struct ssd_device *dev)
4013{
4014 int nr_ulongs = ALIGN(dev->hw_info.cmd_fifo_sz, BITS_PER_LONG) / BITS_PER_LONG;
4015
4016 mutex_init(&dev->barrier_mutex);
4017
4018 atomic_set(&dev->queue_depth, dev->hw_info.cmd_fifo_sz);
4019
4020 dev->tag_map = kmalloc(nr_ulongs * sizeof(unsigned long), GFP_ATOMIC);
4021 if (!dev->tag_map) {
4022 return -ENOMEM;
4023 }
4024
4025 memset(dev->tag_map, 0, nr_ulongs * sizeof(unsigned long));
4026
4027 init_waitqueue_head(&dev->tag_wq);
4028
4029 return 0;
4030}
4031
4032/* io stat */
4033static void ssd_end_io_acct(struct ssd_cmd *cmd)
4034{
4035 struct ssd_device *dev = cmd->dev;
4036 struct bio *bio = cmd->bio;
4037 unsigned long dur = jiffies - cmd->start_time;
4038 int rw = bio_data_dir(bio);
4039
4040#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4041 int cpu = part_stat_lock();
4042 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4043 part_round_stats(cpu, part);
4044 part_stat_add(cpu, part, ticks[rw], dur);
4045 part_dec_in_flight(part, rw);
4046 part_stat_unlock();
4047#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4048 int cpu = part_stat_lock();
4049 struct hd_struct *part = &dev->gd->part0;
4050 part_round_stats(cpu, part);
4051 part_stat_add(cpu, part, ticks[rw], dur);
4052 part_stat_unlock();
4053 part->in_flight[rw] = atomic_dec_return(&dev->in_flight[rw]);
4054#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4055 preempt_disable();
4056 disk_round_stats(dev->gd);
4057 preempt_enable();
4058 disk_stat_add(dev->gd, ticks[rw], dur);
4059 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4060#else
4061 preempt_disable();
4062 disk_round_stats(dev->gd);
4063 preempt_enable();
4064 if (rw == WRITE) {
4065 disk_stat_add(dev->gd, write_ticks, dur);
4066 } else {
4067 disk_stat_add(dev->gd, read_ticks, dur);
4068 }
4069 dev->gd->in_flight = atomic_dec_return(&dev->in_flight[0]);
4070#endif
4071}
4072
4073static void ssd_start_io_acct(struct ssd_cmd *cmd)
4074{
4075 struct ssd_device *dev = cmd->dev;
4076 struct bio *bio = cmd->bio;
4077 int rw = bio_data_dir(bio);
4078
4079#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6 && RHEL_MINOR >= 7))
4080 int cpu = part_stat_lock();
4081 struct hd_struct *part = disk_map_sector_rcu(dev->gd, bio_start(bio));
4082 part_round_stats(cpu, part);
4083 part_stat_inc(cpu, part, ios[rw]);
4084 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4085 part_inc_in_flight(part, rw);
4086 part_stat_unlock();
4087#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
4088 int cpu = part_stat_lock();
4089 struct hd_struct *part = &dev->gd->part0;
4090 part_round_stats(cpu, part);
4091 part_stat_inc(cpu, part, ios[rw]);
4092 part_stat_add(cpu, part, sectors[rw], bio_sectors(bio));
4093 part_stat_unlock();
4094 part->in_flight[rw] = atomic_inc_return(&dev->in_flight[rw]);
4095#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
4096 preempt_disable();
4097 disk_round_stats(dev->gd);
4098 preempt_enable();
4099 disk_stat_inc(dev->gd, ios[rw]);
4100 disk_stat_add(dev->gd, sectors[rw], bio_sectors(bio));
4101 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4102#else
4103 preempt_disable();
4104 disk_round_stats(dev->gd);
4105 preempt_enable();
4106 if (rw == WRITE) {
4107 disk_stat_inc(dev->gd, writes);
4108 disk_stat_add(dev->gd, write_sectors, bio_sectors(bio));
4109 } else {
4110 disk_stat_inc(dev->gd, reads);
4111 disk_stat_add(dev->gd, read_sectors, bio_sectors(bio));
4112 }
4113 dev->gd->in_flight = atomic_inc_return(&dev->in_flight[0]);
4114#endif
4115
4116 cmd->start_time = jiffies;
4117}
4118
4119/* io */
4120static void ssd_queue_bio(struct ssd_device *dev, struct bio *bio)
4121{
4122 spin_lock(&dev->sendq_lock);
4123 ssd_blist_add(&dev->sendq, bio);
4124 spin_unlock(&dev->sendq_lock);
4125
4126 atomic_inc(&dev->in_sendq);
4127 wake_up(&dev->send_waitq);
4128}
4129
4130static inline void ssd_end_request(struct ssd_cmd *cmd)
4131{
4132 struct ssd_device *dev = cmd->dev;
4133 struct bio *bio = cmd->bio;
4134 int errors = cmd->errors;
4135 int tag = cmd->tag;
4136
4137 if (bio) {
4138#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4139 if (!(bio->bi_rw & REQ_DISCARD)) {
4140 ssd_end_io_acct(cmd);
4141 if (!cmd->flag) {
4142 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4143 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4144 }
4145 }
4146#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4147 if (!bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4148 ssd_end_io_acct(cmd);
4149 if (!cmd->flag) {
4150 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4151 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4152 }
4153 }
4154#else
4155 ssd_end_io_acct(cmd);
4156
4157 if (!cmd->flag) {
4158 pci_unmap_sg(dev->pdev, cmd->sgl, cmd->nsegs,
4159 bio_data_dir(bio) == READ ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
4160 }
4161#endif
4162
4163 cmd->bio = NULL;
4164 ssd_put_tag(dev, tag);
4165
4166 if (SSD_INT_MSIX == dev->int_mode || tag < 16 || errors) {
4167#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4168 bio_endio(bio, errors);
4169#else
4170 bio_endio(bio, bio->bi_size, errors);
4171#endif
4172 } else /* if (bio->bi_idx >= bio->bi_vcnt)*/ {
4173 spin_lock(&dev->doneq_lock);
4174 ssd_blist_add(&dev->doneq, bio);
4175 spin_unlock(&dev->doneq_lock);
4176
4177 atomic_inc(&dev->in_doneq);
4178 wake_up(&dev->done_waitq);
4179 }
4180 } else {
4181 if (cmd->waiting) {
4182 complete(cmd->waiting);
4183 }
4184 }
4185}
4186
4187static void ssd_end_timeout_request(struct ssd_cmd *cmd)
4188{
4189 struct ssd_device *dev = cmd->dev;
4190 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4191 int i;
4192
4193 for (i=0; i<dev->nr_queue; i++) {
4194 disable_irq(dev->entry[i].vector);
4195 }
4196
4197 atomic_inc(&dev->tocnt);
4198 //if (cmd->bio) {
4199 hio_err("%s: cmd timeout: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4200 cmd->errors = -ETIMEDOUT;
4201 ssd_end_request(cmd);
4202 //}
4203
4204 for (i=0; i<dev->nr_queue; i++) {
4205 enable_irq(dev->entry[i].vector);
4206 }
4207
4208 /* alarm led */
4209 ssd_set_alarm(dev);
4210}
4211
4212/* cmd timer */
4213static void ssd_cmd_add_timer(struct ssd_cmd *cmd, int timeout, void (*complt)(struct ssd_cmd *))
4214{
4215 init_timer(&cmd->cmd_timer);
4216
4217 cmd->cmd_timer.data = (unsigned long)cmd;
4218 cmd->cmd_timer.expires = jiffies + timeout;
4219 cmd->cmd_timer.function = (void (*)(unsigned long)) complt;
4220
4221 add_timer(&cmd->cmd_timer);
4222}
4223
4224static int ssd_cmd_del_timer(struct ssd_cmd *cmd)
4225{
4226 return del_timer(&cmd->cmd_timer);
4227}
4228
4229static void ssd_add_timer(struct timer_list *timer, int timeout, void (*complt)(void *), void *data)
4230{
4231 init_timer(timer);
4232
4233 timer->data = (unsigned long)data;
4234 timer->expires = jiffies + timeout;
4235 timer->function = (void (*)(unsigned long)) complt;
4236
4237 add_timer(timer);
4238}
4239
4240static int ssd_del_timer(struct timer_list *timer)
4241{
4242 return del_timer(timer);
4243}
4244
4245static void ssd_cmd_timeout(struct ssd_cmd *cmd)
4246{
4247 struct ssd_device *dev = cmd->dev;
4248 uint32_t msg = *(uint32_t *)cmd->msg;
4249
4250 ssd_end_timeout_request(cmd);
4251
4252 ssd_gen_swlog(dev, SSD_LOG_TIMEOUT, msg);
4253}
4254
4255
4256static void __ssd_done(unsigned long data)
4257{
4258 struct ssd_cmd *cmd;
4259 LIST_HEAD(localq);
4260
4261 local_irq_disable();
4262#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4263 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4264#else
4265 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4266#endif
4267 local_irq_enable();
4268
4269 while (!list_empty(&localq)) {
4270 cmd = list_entry(localq.next, struct ssd_cmd, list);
4271 list_del_init(&cmd->list);
4272
4273 ssd_end_request(cmd);
4274 }
4275}
4276
4277static void __ssd_done_db(unsigned long data)
4278{
4279 struct ssd_cmd *cmd;
4280 struct ssd_device *dev;
4281 struct bio *bio;
4282 LIST_HEAD(localq);
4283
4284 local_irq_disable();
4285#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4286 list_splice_init(&__get_cpu_var(ssd_doneq), &localq);
4287#else
4288 list_splice_init(this_cpu_ptr(&ssd_doneq), &localq);
4289#endif
4290 local_irq_enable();
4291
4292 while (!list_empty(&localq)) {
4293 cmd = list_entry(localq.next, struct ssd_cmd, list);
4294 list_del_init(&cmd->list);
4295
4296 dev = (struct ssd_device *)cmd->dev;
4297 bio = cmd->bio;
4298
4299 if (bio) {
4300 sector_t off = dev->db_info.data.loc.off;
4301 uint32_t len = dev->db_info.data.loc.len;
4302
4303 switch (dev->db_info.type) {
4304 case SSD_DEBUG_READ_ERR:
4305 if (bio_data_dir(bio) == READ &&
4306 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4307 cmd->errors = -EIO;
4308 }
4309 break;
4310 case SSD_DEBUG_WRITE_ERR:
4311 if (bio_data_dir(bio) == WRITE &&
4312 !((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4313 cmd->errors = -EROFS;
4314 }
4315 break;
4316 case SSD_DEBUG_RW_ERR:
4317 if (!((off + len) <= bio_start(bio) || off >= (bio_start(bio) + bio_sectors(bio)))) {
4318 if (bio_data_dir(bio) == READ) {
4319 cmd->errors = -EIO;
4320 } else {
4321 cmd->errors = -EROFS;
4322 }
4323 }
4324 break;
4325 default:
4326 break;
4327 }
4328 }
4329
4330 ssd_end_request(cmd);
4331 }
4332}
4333
4334static inline void ssd_done_bh(struct ssd_cmd *cmd)
4335{
4336 unsigned long flags = 0;
4337
4338 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4339 struct ssd_device *dev = cmd->dev;
4340 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4341 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4342
4343 /* alarm led */
4344 ssd_set_alarm(dev);
4345 return;
4346 }
4347
4348 local_irq_save(flags);
4349#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0))
4350 list_add_tail(&cmd->list, &__get_cpu_var(ssd_doneq));
4351 tasklet_hi_schedule(&__get_cpu_var(ssd_tasklet));
4352#else
4353 list_add_tail(&cmd->list, this_cpu_ptr(&ssd_doneq));
4354 tasklet_hi_schedule(this_cpu_ptr(&ssd_tasklet));
4355#endif
4356 local_irq_restore(flags);
4357
4358 return;
4359}
4360
4361static inline void ssd_done(struct ssd_cmd *cmd)
4362{
4363 if (unlikely(!ssd_cmd_del_timer(cmd))) {
4364 struct ssd_device *dev = cmd->dev;
4365 struct ssd_rw_msg *msg = (struct ssd_rw_msg *)cmd->msg;
4366 hio_err("%s: unknown cmd: tag %d fun %#x\n", dev->name, msg->tag, msg->fun);
4367
4368 /* alarm led */
4369 ssd_set_alarm(dev);
4370 return;
4371 }
4372
4373 ssd_end_request(cmd);
4374
4375 return;
4376}
4377
4378static inline void ssd_dispatch_cmd(struct ssd_cmd *cmd)
4379{
4380 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4381
4382 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4383
4384 spin_lock(&dev->cmd_lock);
4385 ssd_reg_write(dev->ctrlp + SSD_REQ_FIFO_REG, cmd->msg_dma);
4386 spin_unlock(&dev->cmd_lock);
4387}
4388
4389static inline void ssd_send_cmd(struct ssd_cmd *cmd)
4390{
4391 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4392
4393 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4394
4395 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4396}
4397
4398static inline void ssd_send_cmd_db(struct ssd_cmd *cmd)
4399{
4400 struct ssd_device *dev = (struct ssd_device *)cmd->dev;
4401 struct bio *bio = cmd->bio;
4402
4403 ssd_cmd_add_timer(cmd, SSD_CMD_TIMEOUT, ssd_cmd_timeout);
4404
4405 if (bio) {
4406 switch (dev->db_info.type) {
4407 case SSD_DEBUG_READ_TO:
4408 if (bio_data_dir(bio) == READ) {
4409 return;
4410 }
4411 break;
4412 case SSD_DEBUG_WRITE_TO:
4413 if (bio_data_dir(bio) == WRITE) {
4414 return;
4415 }
4416 break;
4417 case SSD_DEBUG_RW_TO:
4418 return;
4419 break;
4420 default:
4421 break;
4422 }
4423 }
4424
4425 ssd_reg32_write(dev->ctrlp + SSD_REQ_FIFO_REG, ((uint32_t)cmd->tag | ((uint32_t)cmd->nsegs << 16)));
4426}
4427
4428
4429/* fixed for BIOVEC_PHYS_MERGEABLE */
4430#ifdef SSD_BIOVEC_PHYS_MERGEABLE_FIXED
4431#include <linux/bio.h>
4432#include <linux/io.h>
4433#include <xen/page.h>
4434
4435static bool xen_biovec_phys_mergeable_fixed(const struct bio_vec *vec1,
4436 const struct bio_vec *vec2)
4437{
4438 unsigned long mfn1 = pfn_to_mfn(page_to_pfn(vec1->bv_page));
4439 unsigned long mfn2 = pfn_to_mfn(page_to_pfn(vec2->bv_page));
4440
4441 return __BIOVEC_PHYS_MERGEABLE(vec1, vec2) &&
4442 ((mfn1 == mfn2) || ((mfn1+1) == mfn2));
4443}
4444
4445#ifdef BIOVEC_PHYS_MERGEABLE
4446#undef BIOVEC_PHYS_MERGEABLE
4447#endif
4448#define BIOVEC_PHYS_MERGEABLE(vec1, vec2) \
4449 (__BIOVEC_PHYS_MERGEABLE(vec1, vec2) && \
4450 (!xen_domain() || xen_biovec_phys_mergeable_fixed(vec1, vec2)))
4451
4452#endif
4453
4454static inline int ssd_bio_map_sg(struct ssd_device *dev, struct bio *bio, struct scatterlist *sgl)
4455{
4456#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0))
4457 struct bio_vec *bvec, *bvprv = NULL;
4458 struct scatterlist *sg = NULL;
4459 int i = 0, nsegs = 0;
4460
4461#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,23))
4462 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4463#endif
4464
4465 /*
4466 * for each segment in bio
4467 */
4468 bio_for_each_segment(bvec, bio, i) {
4469 if (bvprv && BIOVEC_PHYS_MERGEABLE(bvprv, bvec)) {
4470 sg->length += bvec->bv_len;
4471 } else {
4472 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4473 break;
4474 }
4475
4476 sg = sg ? (sg + 1) : sgl;
4477#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4478 sg_set_page(sg, bvec->bv_page, bvec->bv_len, bvec->bv_offset);
4479#else
4480 sg->page = bvec->bv_page;
4481 sg->length = bvec->bv_len;
4482 sg->offset = bvec->bv_offset;
4483#endif
4484 nsegs++;
4485 }
4486 bvprv = bvec;
4487 }
4488
4489#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4490 if (sg) {
4491 sg_mark_end(sg);
4492 }
4493#endif
4494
4495 bio->bi_idx = i;
4496
4497 return nsegs;
4498#else
4499 struct bio_vec bvec, bvprv;
4500 struct bvec_iter iter;
4501 struct scatterlist *sg = NULL;
4502 int nsegs = 0;
4503 int first = 1;
4504
4505 sg_init_table(sgl, dev->hw_info.cmd_max_sg);
4506
4507 /*
4508 * for each segment in bio
4509 */
4510 bio_for_each_segment(bvec, bio, iter) {
4511 if (!first && BIOVEC_PHYS_MERGEABLE(&bvprv, &bvec)) {
4512 sg->length += bvec.bv_len;
4513 } else {
4514 if (unlikely(nsegs >= (int)dev->hw_info.cmd_max_sg)) {
4515 break;
4516 }
4517
4518 sg = sg ? (sg + 1) : sgl;
4519
4520 sg_set_page(sg, bvec.bv_page, bvec.bv_len, bvec.bv_offset);
4521
4522 nsegs++;
4523 first = 0;
4524 }
4525 bvprv = bvec;
4526 }
4527
4528 if (sg) {
4529 sg_mark_end(sg);
4530 }
4531
4532 return nsegs;
4533#endif
4534}
4535
4536
4537static int __ssd_submit_pbio(struct ssd_device *dev, struct bio *bio, int wait)
4538{
4539 struct ssd_cmd *cmd;
4540 struct ssd_rw_msg *msg;
4541 struct ssd_sg_entry *sge;
4542 sector_t block = bio_start(bio);
4543 int tag;
4544 int i;
4545
4546 tag = ssd_get_tag(dev, wait);
4547 if (tag < 0) {
4548 return -EBUSY;
4549 }
4550
4551 cmd = &dev->cmd[tag];
4552 cmd->bio = bio;
4553 cmd->flag = 1;
4554
4555 msg = (struct ssd_rw_msg *)cmd->msg;
4556
4557#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4558 if (bio->bi_rw & REQ_DISCARD) {
4559 unsigned int length = bio_sectors(bio);
4560
4561 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4562 msg->tag = tag;
4563 msg->fun = SSD_FUNC_TRIM;
4564
4565 sge = msg->sge;
4566 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4567 sge->block = block;
4568 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4569 sge->buf = 0;
4570
4571 block += sge->length;
4572 length -= sge->length;
4573 sge++;
4574
4575 if (length <= 0) {
4576 break;
4577 }
4578 }
4579 msg->nsegs = cmd->nsegs = (i + 1);
4580
4581 dev->scmd(cmd);
4582 return 0;
4583 }
4584#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4585 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4586 unsigned int length = bio_sectors(bio);
4587
4588 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4589 msg->tag = tag;
4590 msg->fun = SSD_FUNC_TRIM;
4591
4592 sge = msg->sge;
4593 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4594 sge->block = block;
4595 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4596 sge->buf = 0;
4597
4598 block += sge->length;
4599 length -= sge->length;
4600 sge++;
4601
4602 if (length <= 0) {
4603 break;
4604 }
4605 }
4606 msg->nsegs = cmd->nsegs = (i + 1);
4607
4608 dev->scmd(cmd);
4609 return 0;
4610 }
4611#endif
4612
4613 //msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4614 msg->nsegs = cmd->nsegs = bio->bi_vcnt;
4615
4616 //xx
4617 if (bio_data_dir(bio) == READ) {
4618 msg->fun = SSD_FUNC_READ;
4619 msg->flag = 0;
4620 } else {
4621 msg->fun = SSD_FUNC_WRITE;
4622 msg->flag = dev->wmode;
4623 }
4624
4625 sge = msg->sge;
4626 for (i=0; i<bio->bi_vcnt; i++) {
4627 sge->block = block;
4628 sge->length = bio->bi_io_vec[i].bv_len >> 9;
4629 sge->buf = (uint64_t)((void *)bio->bi_io_vec[i].bv_page + bio->bi_io_vec[i].bv_offset);
4630
4631 block += sge->length;
4632 sge++;
4633 }
4634
4635 msg->tag = tag;
4636
4637#ifdef SSD_OT_PROTECT
4638 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4639 msleep_interruptible(dev->ot_delay);
4640 }
4641#endif
4642
4643 ssd_start_io_acct(cmd);
4644 dev->scmd(cmd);
4645
4646 return 0;
4647}
4648
4649static inline int ssd_submit_bio(struct ssd_device *dev, struct bio *bio, int wait)
4650{
4651 struct ssd_cmd *cmd;
4652 struct ssd_rw_msg *msg;
4653 struct ssd_sg_entry *sge;
4654 struct scatterlist *sgl;
4655 sector_t block = bio_start(bio);
4656 int tag;
4657 int i;
4658
4659 tag = ssd_get_tag(dev, wait);
4660 if (tag < 0) {
4661 return -EBUSY;
4662 }
4663
4664 cmd = &dev->cmd[tag];
4665 cmd->bio = bio;
4666 cmd->flag = 0;
4667
4668 msg = (struct ssd_rw_msg *)cmd->msg;
4669
4670 sgl = cmd->sgl;
4671
4672#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)))
4673 if (bio->bi_rw & REQ_DISCARD) {
4674 unsigned int length = bio_sectors(bio);
4675
4676 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4677 msg->tag = tag;
4678 msg->fun = SSD_FUNC_TRIM;
4679
4680 sge = msg->sge;
4681 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4682 sge->block = block;
4683 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4684 sge->buf = 0;
4685
4686 block += sge->length;
4687 length -= sge->length;
4688 sge++;
4689
4690 if (length <= 0) {
4691 break;
4692 }
4693 }
4694 msg->nsegs = cmd->nsegs = (i + 1);
4695
4696 dev->scmd(cmd);
4697 return 0;
4698 }
4699#elif (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
4700 if (bio_rw_flagged(bio, BIO_RW_DISCARD)) {
4701 unsigned int length = bio_sectors(bio);
4702
4703 //printk(KERN_WARNING "%s: discard len %u, block %llu\n", dev->name, bio_sectors(bio), block);
4704 msg->tag = tag;
4705 msg->fun = SSD_FUNC_TRIM;
4706
4707 sge = msg->sge;
4708 for (i=0; i<(dev->hw_info.cmd_max_sg); i++) {
4709 sge->block = block;
4710 sge->length = (length >= dev->hw_info.sg_max_sec) ? dev->hw_info.sg_max_sec : length;
4711 sge->buf = 0;
4712
4713 block += sge->length;
4714 length -= sge->length;
4715 sge++;
4716
4717 if (length <= 0) {
4718 break;
4719 }
4720 }
4721 msg->nsegs = cmd->nsegs = (i + 1);
4722
4723 dev->scmd(cmd);
4724 return 0;
4725 }
4726#endif
4727
4728 msg->nsegs = cmd->nsegs = ssd_bio_map_sg(dev, bio, sgl);
4729
4730 //xx
4731 if (bio_data_dir(bio) == READ) {
4732 msg->fun = SSD_FUNC_READ;
4733 msg->flag = 0;
4734 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_FROMDEVICE);
4735 } else {
4736 msg->fun = SSD_FUNC_WRITE;
4737 msg->flag = dev->wmode;
4738 pci_map_sg(dev->pdev, sgl, cmd->nsegs, PCI_DMA_TODEVICE);
4739 }
4740
4741 sge = msg->sge;
4742 for (i=0; i<cmd->nsegs; i++) {
4743 sge->block = block;
4744 sge->length = sg_dma_len(sgl) >> 9;
4745 sge->buf = sg_dma_address(sgl);
4746
4747 block += sge->length;
4748 sgl++;
4749 sge++;
4750 }
4751
4752 msg->tag = tag;
4753
4754#ifdef SSD_OT_PROTECT
4755 if (unlikely(dev->ot_delay > 0 && dev->ot_protect != 0)) {
4756 msleep_interruptible(dev->ot_delay);
4757 }
4758#endif
4759
4760 ssd_start_io_acct(cmd);
4761 dev->scmd(cmd);
4762
4763 return 0;
4764}
4765
4766/* threads */
4767static int ssd_done_thread(void *data)
4768{
4769 struct ssd_device *dev;
4770 struct bio *bio;
4771 struct bio *next;
4772#ifdef SSD_ESCAPE_IRQ
4773 cpumask_t new_mask;
4774#endif
4775
4776 if (!data) {
4777 return -EINVAL;
4778 }
4779 dev = data;
4780
4781 //set_user_nice(current, -5);
4782
4783 while (!kthread_should_stop()) {
4784 wait_event_interruptible(dev->done_waitq, (atomic_read(&dev->in_doneq) || kthread_should_stop()));
4785
4786 while (atomic_read(&dev->in_doneq)) {
4787 if (threaded_irq) {
4788 spin_lock(&dev->doneq_lock);
4789 bio = ssd_blist_get(&dev->doneq);
4790 spin_unlock(&dev->doneq_lock);
4791 } else {
4792 spin_lock_irq(&dev->doneq_lock);
4793 bio = ssd_blist_get(&dev->doneq);
4794 spin_unlock_irq(&dev->doneq_lock);
4795 }
4796
4797 while (bio) {
4798 next = bio->bi_next;
4799 bio->bi_next = NULL;
4800#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
4801 bio_endio(bio, 0);
4802#else
4803 bio_endio(bio, bio->bi_size, 0);
4804#endif
4805 atomic_dec(&dev->in_doneq);
4806 bio = next;
4807 }
4808
4809 cond_resched();
4810
4811#ifdef SSD_ESCAPE_IRQ
4812 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4813#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4814 cpumask_setall(&new_mask);
4815 cpumask_clear_cpu(dev->irq_cpu, &new_mask);
4816 set_cpus_allowed_ptr(current, &new_mask);
4817#else
4818 cpus_setall(new_mask);
4819 cpu_clear(dev->irq_cpu, new_mask);
4820 set_cpus_allowed(current, new_mask);
4821#endif
4822 }
4823#endif
4824 }
4825 }
4826 return 0;
4827}
4828
4829static int ssd_send_thread(void *data)
4830{
4831 struct ssd_device *dev;
4832 struct bio *bio;
4833 struct bio *next;
4834#ifdef SSD_ESCAPE_IRQ
4835 cpumask_t new_mask;
4836#endif
4837
4838 if (!data) {
4839 return -EINVAL;
4840 }
4841 dev = data;
4842
4843 //set_user_nice(current, -5);
4844
4845 while (!kthread_should_stop()) {
4846 wait_event_interruptible(dev->send_waitq, (atomic_read(&dev->in_sendq) || kthread_should_stop()));
4847
4848 while (atomic_read(&dev->in_sendq)) {
4849 spin_lock(&dev->sendq_lock);
4850 bio = ssd_blist_get(&dev->sendq);
4851 spin_unlock(&dev->sendq_lock);
4852
4853 while (bio) {
4854 next = bio->bi_next;
4855 bio->bi_next = NULL;
4856#ifdef SSD_QUEUE_PBIO
4857 if (test_and_clear_bit(BIO_SSD_PBIO, &bio->bi_flags)) {
4858 __ssd_submit_pbio(dev, bio, 1);
4859 } else {
4860 ssd_submit_bio(dev, bio, 1);
4861 }
4862#else
4863 ssd_submit_bio(dev, bio, 1);
4864#endif
4865 atomic_dec(&dev->in_sendq);
4866 bio = next;
4867 }
4868
4869 cond_resched();
4870
4871#ifdef SSD_ESCAPE_IRQ
4872 if (unlikely(smp_processor_id() == dev->irq_cpu)) {
4873#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
4874 cpumask_setall(&new_mask);
4875 cpumask_clear_cpu(dev->irq_cpu, &new_mask);
4876 set_cpus_allowed_ptr(current, &new_mask);
4877#else
4878 cpus_setall(new_mask);
4879 cpu_clear(dev->irq_cpu, new_mask);
4880 set_cpus_allowed(current, new_mask);
4881#endif
4882 }
4883#endif
4884 }
4885 }
4886
4887 return 0;
4888}
4889
4890static void ssd_cleanup_thread(struct ssd_device *dev)
4891{
4892 kthread_stop(dev->send_thread);
4893 kthread_stop(dev->done_thread);
4894}
4895
4896static int ssd_init_thread(struct ssd_device *dev)
4897{
4898 int ret;
4899
4900 atomic_set(&dev->in_doneq, 0);
4901 atomic_set(&dev->in_sendq, 0);
4902
4903 spin_lock_init(&dev->doneq_lock);
4904 spin_lock_init(&dev->sendq_lock);
4905
4906 ssd_blist_init(&dev->doneq);
4907 ssd_blist_init(&dev->sendq);
4908
4909 init_waitqueue_head(&dev->done_waitq);
4910 init_waitqueue_head(&dev->send_waitq);
4911
4912 dev->done_thread = kthread_run(ssd_done_thread, dev, "%s/d", dev->name);
4913 if (IS_ERR(dev->done_thread)) {
4914 ret = PTR_ERR(dev->done_thread);
4915 goto out_done_thread;
4916 }
4917
4918 dev->send_thread = kthread_run(ssd_send_thread, dev, "%s/s", dev->name);
4919 if (IS_ERR(dev->send_thread)) {
4920 ret = PTR_ERR(dev->send_thread);
4921 goto out_send_thread;
4922 }
4923
4924 return 0;
4925
4926out_send_thread:
4927 kthread_stop(dev->done_thread);
4928out_done_thread:
4929 return ret;
4930}
4931
4932/* dcmd pool */
4933static void ssd_put_dcmd(struct ssd_dcmd *dcmd)
4934{
4935 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
4936
4937 spin_lock(&dev->dcmd_lock);
4938 list_add_tail(&dcmd->list, &dev->dcmd_list);
4939 spin_unlock(&dev->dcmd_lock);
4940}
4941
4942static struct ssd_dcmd *ssd_get_dcmd(struct ssd_device *dev)
4943{
4944 struct ssd_dcmd *dcmd = NULL;
4945
4946 spin_lock(&dev->dcmd_lock);
4947 if (!list_empty(&dev->dcmd_list)) {
4948 dcmd = list_entry(dev->dcmd_list.next,
4949 struct ssd_dcmd, list);
4950 list_del_init(&dcmd->list);
4951 }
4952 spin_unlock(&dev->dcmd_lock);
4953
4954 return dcmd;
4955}
4956
4957static void ssd_cleanup_dcmd(struct ssd_device *dev)
4958{
4959 kfree(dev->dcmd);
4960}
4961
4962static int ssd_init_dcmd(struct ssd_device *dev)
4963{
4964 struct ssd_dcmd *dcmd;
4965 int dcmd_sz = sizeof(struct ssd_dcmd)*dev->hw_info.cmd_fifo_sz;
4966 int i;
4967
4968 spin_lock_init(&dev->dcmd_lock);
4969 INIT_LIST_HEAD(&dev->dcmd_list);
4970 init_waitqueue_head(&dev->dcmd_wq);
4971
4972 dev->dcmd = kmalloc(dcmd_sz, GFP_KERNEL);
4973 if (!dev->dcmd) {
4974 hio_warn("%s: can not alloc dcmd\n", dev->name);
4975 goto out_alloc_dcmd;
4976 }
4977 memset(dev->dcmd, 0, dcmd_sz);
4978
4979 for (i=0, dcmd=dev->dcmd; i<(int)dev->hw_info.cmd_fifo_sz; i++, dcmd++) {
4980 dcmd->dev = dev;
4981 INIT_LIST_HEAD(&dcmd->list);
4982 list_add_tail(&dcmd->list, &dev->dcmd_list);
4983 }
4984
4985 return 0;
4986
4987out_alloc_dcmd:
4988 return -ENOMEM;
4989}
4990
4991static void ssd_put_dmsg(void *msg)
4992{
4993 struct ssd_dcmd *dcmd = container_of(msg, struct ssd_dcmd, msg);
4994 struct ssd_device *dev = (struct ssd_device *)dcmd->dev;
4995
4996 memset(dcmd->msg, 0, SSD_DCMD_MAX_SZ);
4997 ssd_put_dcmd(dcmd);
4998 wake_up(&dev->dcmd_wq);
4999}
5000
5001static void *ssd_get_dmsg(struct ssd_device *dev)
5002{
5003 struct ssd_dcmd *dcmd = ssd_get_dcmd(dev);
5004
5005 while (!dcmd) {
5006 DEFINE_WAIT(wait);
5007 prepare_to_wait_exclusive(&dev->dcmd_wq, &wait, TASK_UNINTERRUPTIBLE);
5008 schedule();
5009
5010 dcmd = ssd_get_dcmd(dev);
5011
5012 finish_wait(&dev->dcmd_wq, &wait);
5013 }
5014 return dcmd->msg;
5015}
5016
5017/* do direct cmd */
5018static int ssd_do_request(struct ssd_device *dev, int rw, void *msg, int *done)
5019{
5020 DECLARE_COMPLETION(wait);
5021 struct ssd_cmd *cmd;
5022 int tag;
5023 int ret = 0;
5024
5025 tag = ssd_get_tag(dev, 1);
5026 if (tag < 0) {
5027 return -EBUSY;
5028 }
5029
5030 cmd = &dev->cmd[tag];
5031 cmd->nsegs = 1;
5032 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5033 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5034
5035 cmd->waiting = &wait;
5036
5037 dev->scmd(cmd);
5038
5039 wait_for_completion(cmd->waiting);
5040 cmd->waiting = NULL;
5041
5042 if (cmd->errors == -ETIMEDOUT) {
5043 ret = cmd->errors;
5044 } else if (cmd->errors) {
5045 ret = -EIO;
5046 }
5047
5048 if (done != NULL) {
5049 *done = cmd->nr_log;
5050 }
5051 ssd_put_tag(dev, cmd->tag);
5052
5053 return ret;
5054}
5055
5056static int ssd_do_barrier_request(struct ssd_device *dev, int rw, void *msg, int *done)
5057{
5058 DECLARE_COMPLETION(wait);
5059 struct ssd_cmd *cmd;
5060 int tag;
5061 int ret = 0;
5062
5063 tag = ssd_barrier_get_tag(dev);
5064 if (tag < 0) {
5065 return -EBUSY;
5066 }
5067
5068 cmd = &dev->cmd[tag];
5069 cmd->nsegs = 1;
5070 memcpy(cmd->msg, msg, SSD_DCMD_MAX_SZ);
5071 ((struct ssd_rw_msg *)cmd->msg)->tag = tag;
5072
5073 cmd->waiting = &wait;
5074
5075 dev->scmd(cmd);
5076
5077 wait_for_completion(cmd->waiting);
5078 cmd->waiting = NULL;
5079
5080 if (cmd->errors == -ETIMEDOUT) {
5081 ret = cmd->errors;
5082 } else if (cmd->errors) {
5083 ret = -EIO;
5084 }
5085
5086 if (done != NULL) {
5087 *done = cmd->nr_log;
5088 }
5089 ssd_barrier_put_tag(dev, cmd->tag);
5090
5091 return ret;
5092}
5093
5094#ifdef SSD_OT_PROTECT
5095static void ssd_check_temperature(struct ssd_device *dev, int temp)
5096{
5097 uint64_t val;
5098 uint32_t off;
5099 int cur;
5100 int i;
5101
5102 if (mode != SSD_DRV_MODE_STANDARD) {
5103 return;
5104 }
5105
5106 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5107 }
5108
5109 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5110 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
5111
5112 val = ssd_reg_read(dev->ctrlp + off);
5113 if (val == 0xffffffffffffffffull) {
5114 continue;
5115 }
5116
5117 cur = (int)CUR_TEMP(val);
5118 if (cur >= temp) {
5119 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5120 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5121 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5122 dev->ot_delay = SSD_OT_DELAY;
5123 }
5124 }
5125 return;
5126 }
5127 }
5128
5129 if (test_and_clear_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5130 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5131 hio_warn("%s: Temperature is OK.\n", dev->name);
5132 dev->ot_delay = 0;
5133 }
5134 }
5135}
5136#endif
5137
5138static int ssd_get_ot_status(struct ssd_device *dev, int *status)
5139{
5140 uint32_t off;
5141 uint32_t val;
5142 int i;
5143
5144 if (!dev || !status) {
5145 return -EINVAL;
5146 }
5147
5148 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5149 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5150 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5151 val = ssd_reg32_read(dev->ctrlp + off);
5152 if ((val >> 22) & 0x1) {
5153 *status = 1;
5154 goto out;
5155 }
5156
5157
5158 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5159 val = ssd_reg32_read(dev->ctrlp + off);
5160 if ((val >> 22) & 0x1) {
5161 *status = 1;
5162 goto out;
5163 }
5164 }
5165 } else {
5166 *status = !!dev->ot_delay;
5167 }
5168
5169out:
5170 return 0;
5171}
5172
5173static void ssd_set_ot_protect(struct ssd_device *dev, int protect)
5174{
5175 uint32_t off;
5176 uint32_t val;
5177 int i;
5178
5179 mutex_lock(&dev->fw_mutex);
5180
5181 dev->ot_protect = !!protect;
5182
5183 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_2) {
5184 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5185 off = SSD_READ_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5186 val = ssd_reg32_read(dev->ctrlp + off);
5187 if (dev->ot_protect) {
5188 val |= (1U << 21);
5189 } else {
5190 val &= ~(1U << 21);
5191 }
5192 ssd_reg32_write(dev->ctrlp + off, val);
5193
5194
5195 off = SSD_WRITE_OT_REG0 + (i * SSD_CTRL_REG_ZONE_SZ);
5196 val = ssd_reg32_read(dev->ctrlp + off);
5197 if (dev->ot_protect) {
5198 val |= (1U << 21);
5199 } else {
5200 val &= ~(1U << 21);
5201 }
5202 ssd_reg32_write(dev->ctrlp + off, val);
5203 }
5204 }
5205
5206 mutex_unlock(&dev->fw_mutex);
5207}
5208
5209static int ssd_init_ot_protect(struct ssd_device *dev)
5210{
5211 ssd_set_ot_protect(dev, ot_protect);
5212
5213#ifdef SSD_OT_PROTECT
5214 ssd_check_temperature(dev, SSD_OT_TEMP);
5215#endif
5216
5217 return 0;
5218}
5219
5220/* log */
5221static int ssd_read_log(struct ssd_device *dev, int ctrl_idx, void *buf, int *nr_log)
5222{
5223 struct ssd_log_op_msg *msg;
5224 struct ssd_log_msg *lmsg;
5225 dma_addr_t buf_dma;
5226 size_t length = dev->hw_info.log_sz;
5227 int ret = 0;
5228
5229 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
5230 return -EINVAL;
5231 }
5232
5233 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
5234#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
5235 ret = dma_mapping_error(buf_dma);
5236#else
5237 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
5238#endif
5239 if (ret) {
5240 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
5241 goto out_dma_mapping;
5242 }
5243
5244 msg = (struct ssd_log_op_msg *)ssd_get_dmsg(dev);
5245
5246 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5247 lmsg = (struct ssd_log_msg *)msg;
5248 lmsg->fun = SSD_FUNC_READ_LOG;
5249 lmsg->ctrl_idx = ctrl_idx;
5250 lmsg->buf = buf_dma;
5251 } else {
5252 msg->fun = SSD_FUNC_READ_LOG;
5253 msg->ctrl_idx = ctrl_idx;
5254 msg->buf = buf_dma;
5255 }
5256
5257 ret = ssd_do_request(dev, READ, msg, nr_log);
5258 ssd_put_dmsg(msg);
5259
5260 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
5261
5262out_dma_mapping:
5263 return ret;
5264}
5265
5266#define SSD_LOG_PRINT_BUF_SZ 256
5267static int ssd_parse_log(struct ssd_device *dev, struct ssd_log *log, int print)
5268{
5269 struct ssd_log_desc *log_desc = ssd_log_desc;
5270 struct ssd_log_entry *le;
5271 char *sn = NULL;
5272 char print_buf[SSD_LOG_PRINT_BUF_SZ];
5273 int print_len;
5274
5275 le = &log->le;
5276
5277 /* find desc */
5278 while (log_desc->event != SSD_UNKNOWN_EVENT) {
5279 if (log_desc->event == le->event) {
5280 break;
5281 }
5282 log_desc++;
5283 }
5284
5285 if (!print) {
5286 goto out;
5287 }
5288
5289 if (log_desc->level < log_level) {
5290 goto out;
5291 }
5292
5293 /* parse */
5294 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5295 sn = dev->label.sn;
5296 } else {
5297 sn = dev->labelv3.barcode;
5298 }
5299
5300 print_len = snprintf(print_buf, SSD_LOG_PRINT_BUF_SZ, "%s (%s): <%#x>", dev->name, sn, le->event);
5301
5302 if (log->ctrl_idx != SSD_LOG_SW_IDX) {
5303 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " controller %d", log->ctrl_idx);
5304 }
5305
5306 switch (log_desc->data) {
5307 case SSD_LOG_DATA_NONE:
5308 break;
5309 case SSD_LOG_DATA_LOC:
5310 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5311 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc.flash);
5312 if (log_desc->sblock) {
5313 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc.block);
5314 }
5315 if (log_desc->spage) {
5316 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc.page);
5317 }
5318 } else {
5319 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " flash %d", le->data.loc1.flash);
5320 if (log_desc->sblock) {
5321 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " block %d", le->data.loc1.block);
5322 }
5323 if (log_desc->spage) {
5324 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " page %d", le->data.loc1.page);
5325 }
5326 }
5327 break;
5328 case SSD_LOG_DATA_HEX:
5329 print_len += snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), " info %#x", le->data.val);
5330 break;
5331 default:
5332 break;
5333 }
5334 /*print_len += */snprintf((print_buf + print_len), (SSD_LOG_PRINT_BUF_SZ - print_len), ": %s", log_desc->desc);
5335
5336 switch (log_desc->level) {
5337 case SSD_LOG_LEVEL_INFO:
5338 hio_info("%s\n", print_buf);
5339 break;
5340 case SSD_LOG_LEVEL_NOTICE:
5341 hio_note("%s\n", print_buf);
5342 break;
5343 case SSD_LOG_LEVEL_WARNING:
5344 hio_warn("%s\n", print_buf);
5345 break;
5346 case SSD_LOG_LEVEL_ERR:
5347 hio_err("%s\n", print_buf);
5348 //printk(KERN_ERR MODULE_NAME": some exception occurred, please check the data or refer to FAQ.");
5349 break;
5350 default:
5351 hio_warn("%s\n", print_buf);
5352 break;
5353 }
5354
5355out:
5356 return log_desc->level;
5357}
5358
5359static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status);
5360static int ssd_switch_wmode(struct ssd_device *dev, int wmode);
5361
5362
5363static int ssd_handle_event(struct ssd_device *dev, uint16_t event, int level)
5364{
5365 int ret = 0;
5366
5367 switch (event) {
5368 case SSD_LOG_OVER_TEMP: {
5369#ifdef SSD_OT_PROTECT
5370 if (!test_and_set_bit(SSD_HWMON_TEMP(SSD_TEMP_CTRL), &dev->hwmon)) {
5371 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2_2) {
5372 hio_warn("%s: Over temperature, please check the fans.\n", dev->name);
5373 dev->ot_delay = SSD_OT_DELAY;
5374 }
5375 }
5376#endif
5377 break;
5378 }
5379
5380 case SSD_LOG_NORMAL_TEMP: {
5381#ifdef SSD_OT_PROTECT
5382 /* need to check all controller's temperature */
5383 ssd_check_temperature(dev, SSD_OT_TEMP_HYST);
5384#endif
5385 break;
5386 }
5387
5388 case SSD_LOG_BATTERY_FAULT: {
5389 uint16_t sfstatus;
5390
5391 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5392 if (!ssd_bm_get_sfstatus(dev, &sfstatus)) {
5393 ssd_gen_swlog(dev, SSD_LOG_BM_SFSTATUS, sfstatus);
5394 }
5395 }
5396
5397 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5398 ssd_switch_wmode(dev, dev->user_wmode);
5399 }
5400 break;
5401 }
5402
5403 case SSD_LOG_BATTERY_OK: {
5404 if (test_and_clear_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5405 ssd_switch_wmode(dev, dev->user_wmode);
5406 }
5407 break;
5408 }
5409
5410 case SSD_LOG_BOARD_VOLT_FAULT: {
5411 ssd_mon_boardvolt(dev);
5412 break;
5413 }
5414
5415 case SSD_LOG_CLEAR_LOG: {
5416 /* update smart */
5417 memset(&dev->smart.log_info, 0, sizeof(struct ssd_log_info));
5418 break;
5419 }
5420
5421 case SSD_LOG_CAP_VOLT_FAULT:
5422 case SSD_LOG_CAP_LEARN_FAULT:
5423 case SSD_LOG_CAP_SHORT_CIRCUIT: {
5424 if (!test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
5425 ssd_switch_wmode(dev, dev->user_wmode);
5426 }
5427 break;
5428 }
5429
5430 default:
5431 break;
5432 }
5433
5434 /* ssd event call */
5435 if (dev->event_call) {
5436 dev->event_call(dev->gd, event, level);
5437
5438 /* FIXME */
5439 if (SSD_LOG_CAP_VOLT_FAULT == event || SSD_LOG_CAP_LEARN_FAULT == event || SSD_LOG_CAP_SHORT_CIRCUIT == event) {
5440 dev->event_call(dev->gd, SSD_LOG_BATTERY_FAULT, level);
5441 }
5442 }
5443
5444 return ret;
5445}
5446
5447static int ssd_save_log(struct ssd_device *dev, struct ssd_log *log)
5448{
5449 uint32_t off, size;
5450 void *internal_log;
5451 int ret = 0;
5452
5453 mutex_lock(&dev->internal_log_mutex);
5454
5455 size = sizeof(struct ssd_log);
5456 off = dev->internal_log.nr_log * size;
5457
5458 if (off == dev->rom_info.log_sz) {
5459 if (dev->internal_log.nr_log == dev->smart.log_info.nr_log) {
5460 hio_warn("%s: internal log is full\n", dev->name);
5461 }
5462 goto out;
5463 }
5464
5465 internal_log = dev->internal_log.log + off;
5466 memcpy(internal_log, log, size);
5467
5468 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
5469 off += dev->rom_info.log_base;
5470
5471 ret = ssd_spi_write(dev, log, off, size);
5472 if (ret) {
5473 goto out;
5474 }
5475 }
5476
5477 dev->internal_log.nr_log++;
5478
5479out:
5480 mutex_unlock(&dev->internal_log_mutex);
5481 return ret;
5482}
5483
5484static int ssd_save_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5485{
5486 struct ssd_log log;
5487 struct timeval tv;
5488 int level;
5489 int ret = 0;
5490
5491 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5492 return 0;
5493
5494 memset(&log, 0, sizeof(struct ssd_log));
5495
5496 do_gettimeofday(&tv);
5497 log.ctrl_idx = SSD_LOG_SW_IDX;
5498 log.time = tv.tv_sec;
5499 log.le.event = event;
5500 log.le.data.val = data;
5501
5502 level = ssd_parse_log(dev, &log, 0);
5503 if (level >= SSD_LOG_LEVEL) {
5504 ret = ssd_save_log(dev, &log);
5505 }
5506
5507 /* set alarm */
5508 if (SSD_LOG_LEVEL_ERR == level) {
5509 ssd_set_alarm(dev);
5510 }
5511
5512 /* update smart */
5513 dev->smart.log_info.nr_log++;
5514 dev->smart.log_info.stat[level]++;
5515
5516 /* handle event */
5517 ssd_handle_event(dev, event, level);
5518
5519 return ret;
5520}
5521
5522static int ssd_gen_swlog(struct ssd_device *dev, uint16_t event, uint32_t data)
5523{
5524 struct ssd_log_entry le;
5525 int ret;
5526
5527 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
5528 return 0;
5529
5530 /* slave port ? */
5531 if (dev->slave) {
5532 return 0;
5533 }
5534
5535 memset(&le, 0, sizeof(struct ssd_log_entry));
5536 le.event = event;
5537 le.data.val = data;
5538
5539 ret = sfifo_put(&dev->log_fifo, &le);
5540 if (ret) {
5541 return ret;
5542 }
5543
5544 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
5545 queue_work(dev->workq, &dev->log_work);
5546 }
5547
5548 return 0;
5549}
5550
5551static int ssd_do_swlog(struct ssd_device *dev)
5552{
5553 struct ssd_log_entry le;
5554 int ret = 0;
5555
5556 memset(&le, 0, sizeof(struct ssd_log_entry));
5557 while (!sfifo_get(&dev->log_fifo, &le)) {
5558 ret = ssd_save_swlog(dev, le.event, le.data.val);
5559 if (ret) {
5560 break;
5561 }
5562 }
5563
5564 return ret;
5565}
5566
5567static int __ssd_clear_log(struct ssd_device *dev)
5568{
5569 uint32_t off, length;
5570 int ret;
5571
5572 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5573 return 0;
5574 }
5575
5576 if (dev->internal_log.nr_log == 0) {
5577 return 0;
5578 }
5579
5580 mutex_lock(&dev->internal_log_mutex);
5581
5582 off = dev->rom_info.log_base;
5583 length = dev->rom_info.log_sz;
5584
5585 ret = ssd_spi_erase(dev, off, length);
5586 if (ret) {
5587 hio_warn("%s: log erase: failed\n", dev->name);
5588 goto out;
5589 }
5590
5591 dev->internal_log.nr_log = 0;
5592
5593out:
5594 mutex_unlock(&dev->internal_log_mutex);
5595 return ret;
5596}
5597
5598static int ssd_clear_log(struct ssd_device *dev)
5599{
5600 int ret;
5601
5602 ret = __ssd_clear_log(dev);
5603 if(!ret) {
5604 ssd_gen_swlog(dev, SSD_LOG_CLEAR_LOG, 0);
5605 }
5606
5607 return ret;
5608}
5609
5610static int ssd_do_log(struct ssd_device *dev, int ctrl_idx, void *buf)
5611{
5612 struct ssd_log_entry *le;
5613 struct ssd_log log;
5614 struct timeval tv;
5615 int nr_log = 0;
5616 int level;
5617 int ret = 0;
5618
5619 ret = ssd_read_log(dev, ctrl_idx, buf, &nr_log);
5620 if (ret) {
5621 return ret;
5622 }
5623
5624 do_gettimeofday(&tv);
5625
5626 log.time = tv.tv_sec;
5627 log.ctrl_idx = ctrl_idx;
5628
5629 le = (ssd_log_entry_t *)buf;
5630 while (nr_log > 0) {
5631 memcpy(&log.le, le, sizeof(struct ssd_log_entry));
5632
5633 level = ssd_parse_log(dev, &log, 1);
5634 if (level >= SSD_LOG_LEVEL) {
5635 ssd_save_log(dev, &log);
5636 }
5637
5638 /* set alarm */
5639 if (SSD_LOG_LEVEL_ERR == level) {
5640 ssd_set_alarm(dev);
5641 }
5642
5643 dev->smart.log_info.nr_log++;
5644 if (SSD_LOG_SEU_FAULT != le->event && SSD_LOG_SEU_FAULT1 != le->event) {
5645 dev->smart.log_info.stat[level]++;
5646 } else {
5647 /* SEU fault */
5648
5649 /* log to the volatile log info */
5650 dev->log_info.nr_log++;
5651 dev->log_info.stat[level]++;
5652
5653 /* do something */
5654 dev->reload_fw = 1;
5655 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
5656
5657 /*dev->readonly = 1;
5658 set_disk_ro(dev->gd, 1);
5659 hio_warn("%s: switched to read-only mode.\n", dev->name);*/
5660 }
5661
5662 /* handle event */
5663 ssd_handle_event(dev, le->event, level);
5664
5665 le++;
5666 nr_log--;
5667 }
5668
5669 return 0;
5670}
5671
5672#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5673static void ssd_log_worker(void *data)
5674{
5675 struct ssd_device *dev = (struct ssd_device *)data;
5676#else
5677static void ssd_log_worker(struct work_struct *work)
5678{
5679 struct ssd_device *dev = container_of(work, struct ssd_device, log_work);
5680#endif
5681 int i;
5682 int ret;
5683
5684 if (!test_bit(SSD_LOG_ERR, &dev->state) && test_bit(SSD_ONLINE, &dev->state)) {
5685 /* alloc log buf */
5686 if (!dev->log_buf) {
5687 dev->log_buf = kmalloc(dev->hw_info.log_sz, GFP_KERNEL);
5688 if (!dev->log_buf) {
5689 hio_warn("%s: ssd_log_worker: no mem\n", dev->name);
5690 return;
5691 }
5692 }
5693
5694 /* get log */
5695 if (test_and_clear_bit(SSD_LOG_HW, &dev->state)) {
5696 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
5697 ret = ssd_do_log(dev, i, dev->log_buf);
5698 if (ret) {
5699 (void)test_and_set_bit(SSD_LOG_ERR, &dev->state);
5700 hio_warn("%s: do log fail\n", dev->name);
5701 }
5702 }
5703 }
5704 }
5705
5706 ret = ssd_do_swlog(dev);
5707 if (ret) {
5708 hio_warn("%s: do swlog fail\n", dev->name);
5709 }
5710}
5711
5712static void ssd_cleanup_log(struct ssd_device *dev)
5713{
5714 if (dev->log_buf) {
5715 kfree(dev->log_buf);
5716 dev->log_buf = NULL;
5717 }
5718
5719 sfifo_free(&dev->log_fifo);
5720
5721 if (dev->internal_log.log) {
5722 vfree(dev->internal_log.log);
5723 dev->internal_log.log = NULL;
5724 }
5725}
5726
5727static int ssd_init_log(struct ssd_device *dev)
5728{
5729 struct ssd_log *log;
5730 uint32_t off, size;
5731 uint32_t len = 0;
5732 int ret = 0;
5733
5734 mutex_init(&dev->internal_log_mutex);
5735
5736#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
5737 INIT_WORK(&dev->log_work, ssd_log_worker, dev);
5738#else
5739 INIT_WORK(&dev->log_work, ssd_log_worker);
5740#endif
5741
5742 off = dev->rom_info.log_base;
5743 size = dev->rom_info.log_sz;
5744
5745 dev->internal_log.log = vmalloc(size);
5746 if (!dev->internal_log.log) {
5747 ret = -ENOMEM;
5748 goto out_alloc_log;
5749 }
5750
5751 ret = sfifo_alloc(&dev->log_fifo, SSD_LOG_FIFO_SZ, sizeof(struct ssd_log_entry));
5752 if (ret < 0) {
5753 goto out_alloc_log_fifo;
5754 }
5755
5756 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
5757 return 0;
5758 }
5759
5760 log = (struct ssd_log *)dev->internal_log.log;
5761 while (len < size) {
5762 ret = ssd_spi_read(dev, log, off, sizeof(struct ssd_log));
5763 if (ret) {
5764 goto out_read_log;
5765 }
5766
5767 if (log->ctrl_idx == 0xff) {
5768 break;
5769 }
5770
5771 dev->internal_log.nr_log++;
5772 log++;
5773 len += sizeof(struct ssd_log);
5774 off += sizeof(struct ssd_log);
5775 }
5776
5777 return 0;
5778
5779out_read_log:
5780 sfifo_free(&dev->log_fifo);
5781out_alloc_log_fifo:
5782 vfree(dev->internal_log.log);
5783 dev->internal_log.log = NULL;
5784 dev->internal_log.nr_log = 0;
5785out_alloc_log:
5786 /* skip error if not in standard mode */
5787 if (mode != SSD_DRV_MODE_STANDARD) {
5788 ret = 0;
5789 }
5790 return ret;
5791}
5792
5793/* work queue */
5794static void ssd_stop_workq(struct ssd_device *dev)
5795{
5796 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
5797 flush_workqueue(dev->workq);
5798}
5799
5800static void ssd_start_workq(struct ssd_device *dev)
5801{
5802 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
5803
5804 /* log ? */
5805 queue_work(dev->workq, &dev->log_work);
5806}
5807
5808static void ssd_cleanup_workq(struct ssd_device *dev)
5809{
5810 flush_workqueue(dev->workq);
5811 destroy_workqueue(dev->workq);
5812 dev->workq = NULL;
5813}
5814
5815static int ssd_init_workq(struct ssd_device *dev)
5816{
5817 int ret = 0;
5818
5819 dev->workq = create_singlethread_workqueue(dev->name);
5820 if (!dev->workq) {
5821 ret = -ESRCH;
5822 goto out;
5823 }
5824
5825out:
5826 return ret;
5827}
5828
5829/* rom */
5830static int ssd_init_rom_info(struct ssd_device *dev)
5831{
5832 uint32_t val;
5833
5834 mutex_init(&dev->spi_mutex);
5835 mutex_init(&dev->i2c_mutex);
5836
5837 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
5838 /* fix bug: read data to clear status */
5839 (void)ssd_reg32_read(dev->ctrlp + SSD_SPI_REG_RDATA);
5840
5841 dev->rom_info.size = SSD_ROM_SIZE;
5842 dev->rom_info.block_size = SSD_ROM_BLK_SIZE;
5843 dev->rom_info.page_size = SSD_ROM_PAGE_SIZE;
5844
5845 dev->rom_info.bridge_fw_base = SSD_ROM_BRIDGE_FW_BASE;
5846 dev->rom_info.bridge_fw_sz = SSD_ROM_BRIDGE_FW_SIZE;
5847 dev->rom_info.nr_bridge_fw = SSD_ROM_NR_BRIDGE_FW;
5848
5849 dev->rom_info.ctrl_fw_base = SSD_ROM_CTRL_FW_BASE;
5850 dev->rom_info.ctrl_fw_sz = SSD_ROM_CTRL_FW_SIZE;
5851 dev->rom_info.nr_ctrl_fw = SSD_ROM_NR_CTRL_FW;
5852
5853 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5854
5855 dev->rom_info.vp_base = SSD_ROM_VP_BASE;
5856 dev->rom_info.label_base = SSD_ROM_LABEL_BASE;
5857 } else if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
5858 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5859 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5860 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5861 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5862
5863 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5864 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5865 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5866 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5867
5868 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5869 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5870 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5871 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5872
5873 dev->rom_info.bm_fw_base = dev->rom_info.ctrl_fw_base + (dev->rom_info.nr_ctrl_fw * dev->rom_info.ctrl_fw_sz);
5874 dev->rom_info.bm_fw_sz = SSD_PV3_ROM_BM_FW_SZ;
5875 dev->rom_info.nr_bm_fw = SSD_PV3_ROM_NR_BM_FW;
5876
5877 dev->rom_info.log_base = dev->rom_info.bm_fw_base + (dev->rom_info.nr_bm_fw * dev->rom_info.bm_fw_sz);
5878 dev->rom_info.log_sz = SSD_ROM_LOG_SZ;
5879
5880 dev->rom_info.smart_base = dev->rom_info.log_base + dev->rom_info.log_sz;
5881 dev->rom_info.smart_sz = SSD_PV3_ROM_SMART_SZ;
5882 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5883
5884 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5885 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5886 dev->rom_info.label_base = dev->rom_info.vp_base + dev->rom_info.block_size;
5887 if (dev->rom_info.label_base >= dev->rom_info.size) {
5888 dev->rom_info.label_base = dev->rom_info.vp_base - dev->rom_info.block_size;
5889 }
5890 } else {
5891 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_INFO_REG);
5892 dev->rom_info.size = 0x100000 * (1U << (val & 0xFF));
5893 dev->rom_info.block_size = 0x10000 * (1U << ((val>>8) & 0xFF));
5894 dev->rom_info.page_size = (val>>16) & 0xFFFF;
5895
5896 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_BRIDGE_FW_INFO_REG);
5897 dev->rom_info.bridge_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5898 dev->rom_info.bridge_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5899 dev->rom_info.nr_bridge_fw = ((val >> 30) & 0x3) + 1;
5900
5901 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_CTRL_FW_INFO_REG);
5902 dev->rom_info.ctrl_fw_base = dev->rom_info.block_size * (val & 0xFFFF);
5903 dev->rom_info.ctrl_fw_sz = dev->rom_info.block_size * ((val>>16) & 0x3FFF);
5904 dev->rom_info.nr_ctrl_fw = ((val >> 30) & 0x3) + 1;
5905
5906 val = ssd_reg32_read(dev->ctrlp + SSD_ROM_VP_INFO_REG);
5907 dev->rom_info.vp_base = dev->rom_info.block_size * val;
5908 dev->rom_info.label_base = dev->rom_info.vp_base - SSD_PV3_2_ROM_SEC_SZ;
5909
5910 dev->rom_info.nr_smart = SSD_PV3_ROM_NR_SMART;
5911 dev->rom_info.smart_sz = SSD_PV3_2_ROM_SEC_SZ;
5912 dev->rom_info.smart_base = dev->rom_info.label_base - (dev->rom_info.smart_sz * dev->rom_info.nr_smart);
5913 if (dev->rom_info.smart_sz > dev->rom_info.block_size) {
5914 dev->rom_info.smart_sz = dev->rom_info.block_size;
5915 }
5916
5917 dev->rom_info.log_sz = SSD_PV3_2_ROM_LOG_SZ;
5918 dev->rom_info.log_base = dev->rom_info.smart_base - dev->rom_info.log_sz;
5919 }
5920
5921 return ssd_init_spi(dev);
5922}
5923
5924/* smart */
5925static int ssd_update_smart(struct ssd_device *dev, struct ssd_smart *smart)
5926{
5927 struct timeval tv;
5928 uint64_t run_time;
5929#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5930 struct hd_struct *part;
5931 int cpu;
5932#endif
5933 int i, j;
5934 int ret = 0;
5935
5936 if (!test_bit(SSD_INIT_BD, &dev->state)) {
5937 return 0;
5938 }
5939
5940 do_gettimeofday(&tv);
5941 if ((uint64_t)tv.tv_sec < dev->uptime) {
5942 run_time = 0;
5943 } else {
5944 run_time = tv.tv_sec - dev->uptime;
5945 }
5946
5947 /* avoid frequently update */
5948 if (run_time >= 60) {
5949 ret = 1;
5950 }
5951
5952 /* io stat */
5953 smart->io_stat.run_time += run_time;
5954
5955#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27))
5956 cpu = part_stat_lock();
5957 part = &dev->gd->part0;
5958 part_round_stats(cpu, part);
5959 part_stat_unlock();
5960
5961 smart->io_stat.nr_read += part_stat_read(part, ios[READ]);
5962 smart->io_stat.nr_write += part_stat_read(part, ios[WRITE]);
5963 smart->io_stat.rsectors += part_stat_read(part, sectors[READ]);
5964 smart->io_stat.wsectors += part_stat_read(part, sectors[WRITE]);
5965#elif (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,14))
5966 preempt_disable();
5967 disk_round_stats(dev->gd);
5968 preempt_enable();
5969
5970 smart->io_stat.nr_read += disk_stat_read(dev->gd, ios[READ]);
5971 smart->io_stat.nr_write += disk_stat_read(dev->gd, ios[WRITE]);
5972 smart->io_stat.rsectors += disk_stat_read(dev->gd, sectors[READ]);
5973 smart->io_stat.wsectors += disk_stat_read(dev->gd, sectors[WRITE]);
5974#else
5975 preempt_disable();
5976 disk_round_stats(dev->gd);
5977 preempt_enable();
5978
5979 smart->io_stat.nr_read += disk_stat_read(dev->gd, reads);
5980 smart->io_stat.nr_write += disk_stat_read(dev->gd, writes);
5981 smart->io_stat.rsectors += disk_stat_read(dev->gd, read_sectors);
5982 smart->io_stat.wsectors += disk_stat_read(dev->gd, write_sectors);
5983#endif
5984
5985 smart->io_stat.nr_to += atomic_read(&dev->tocnt);
5986
5987 for (i=0; i<dev->nr_queue; i++) {
5988 smart->io_stat.nr_rwerr += dev->queue[i].io_stat.nr_rwerr;
5989 smart->io_stat.nr_ioerr += dev->queue[i].io_stat.nr_ioerr;
5990 }
5991
5992 for (i=0; i<dev->nr_queue; i++) {
5993 for (j=0; j<SSD_ECC_MAX_FLIP; j++) {
5994 smart->ecc_info.bitflip[j] += dev->queue[i].ecc_info.bitflip[j];
5995 }
5996 }
5997
5998 //dev->uptime = tv.tv_sec;
5999
6000 return ret;
6001}
6002
6003static int ssd_clear_smart(struct ssd_device *dev)
6004{
6005 struct timeval tv;
6006 uint64_t sversion;
6007 uint32_t off, length;
6008 int i;
6009 int ret;
6010
6011 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6012 return 0;
6013 }
6014
6015 /* clear smart */
6016 off = dev->rom_info.smart_base;
6017 length = dev->rom_info.smart_sz * dev->rom_info.nr_smart;
6018
6019 ret = ssd_spi_erase(dev, off, length);
6020 if (ret) {
6021 hio_warn("%s: info erase: failed\n", dev->name);
6022 goto out;
6023 }
6024
6025 sversion = dev->smart.version;
6026
6027 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6028 dev->smart.version = sversion + 1;
6029 dev->smart.magic = SSD_SMART_MAGIC;
6030
6031 /* clear all tmp acc */
6032 for (i=0; i<dev->nr_queue; i++) {
6033 memset(&(dev->queue[i].io_stat), 0, sizeof(struct ssd_io_stat));
6034 memset(&(dev->queue[i].ecc_info), 0, sizeof(struct ssd_ecc_info));
6035 }
6036
6037 atomic_set(&dev->tocnt, 0);
6038
6039 /* clear tmp log info */
6040 memset(&dev->log_info, 0, sizeof(struct ssd_log_info));
6041
6042 do_gettimeofday(&tv);
6043 dev->uptime = tv.tv_sec;
6044
6045 /* clear alarm ? */
6046 //ssd_clear_alarm(dev);
6047out:
6048 return ret;
6049}
6050
6051static int ssd_save_smart(struct ssd_device *dev)
6052{
6053 uint32_t off, size;
6054 int i;
6055 int ret = 0;
6056
6057 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
6058 return 0;
6059
6060 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6061 return 0;
6062 }
6063
6064 if (!ssd_update_smart(dev, &dev->smart)) {
6065 return 0;
6066 }
6067
6068 dev->smart.version++;
6069
6070 for (i=0; i<dev->rom_info.nr_smart; i++) {
6071 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6072 size = dev->rom_info.smart_sz;
6073
6074 ret = ssd_spi_erase(dev, off, size);
6075 if (ret) {
6076 hio_warn("%s: info erase failed\n", dev->name);
6077 goto out;
6078 }
6079
6080 size = sizeof(struct ssd_smart);
6081
6082 ret = ssd_spi_write(dev, &dev->smart, off, size);
6083 if (ret) {
6084 hio_warn("%s: info write failed\n", dev->name);
6085 goto out;
6086 }
6087
6088 //xx
6089 }
6090
6091out:
6092 return ret;
6093}
6094
6095static int ssd_init_smart(struct ssd_device *dev)
6096{
6097 struct ssd_smart *smart;
6098 struct timeval tv;
6099 uint32_t off, size;
6100 int i;
6101 int ret = 0;
6102
6103 do_gettimeofday(&tv);
6104 dev->uptime = tv.tv_sec;
6105
6106 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6107 return 0;
6108 }
6109
6110 smart = kmalloc(sizeof(struct ssd_smart) * SSD_ROM_NR_SMART_MAX, GFP_KERNEL);
6111 if (!smart) {
6112 ret = -ENOMEM;
6113 goto out_nomem;
6114 }
6115
6116 memset(&dev->smart, 0, sizeof(struct ssd_smart));
6117
6118 /* read smart */
6119 for (i=0; i<dev->rom_info.nr_smart; i++) {
6120 memset(&smart[i], 0, sizeof(struct ssd_smart));
6121
6122 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6123 size = sizeof(struct ssd_smart);
6124
6125 ret = ssd_spi_read(dev, &smart[i], off, size);
6126 if (ret) {
6127 hio_warn("%s: info read failed\n", dev->name);
6128 goto out;
6129 }
6130
6131 if (smart[i].magic != SSD_SMART_MAGIC) {
6132 smart[i].magic = 0;
6133 smart[i].version = 0;
6134 continue;
6135 }
6136
6137 if (smart[i].version > dev->smart.version) {
6138 memcpy(&dev->smart, &smart[i], sizeof(struct ssd_smart));
6139 }
6140 }
6141
6142 if (dev->smart.magic != SSD_SMART_MAGIC) {
6143 /* first time power up */
6144 dev->smart.magic = SSD_SMART_MAGIC;
6145 dev->smart.version = 1;
6146 }
6147
6148 /* check log info */
6149 {
6150 struct ssd_log_info log_info;
6151 struct ssd_log *log = (struct ssd_log *)dev->internal_log.log;
6152
6153 memset(&log_info, 0, sizeof(struct ssd_log_info));
6154
6155 while (log_info.nr_log < dev->internal_log.nr_log) {
6156 /* skip the volatile log info */
6157 if (SSD_LOG_SEU_FAULT != log->le.event && SSD_LOG_SEU_FAULT1 != log->le.event) {
6158 log_info.stat[ssd_parse_log(dev, log, 0)]++;
6159 }
6160
6161 log_info.nr_log++;
6162 log++;
6163 }
6164
6165 /* check */
6166 for (i=(SSD_LOG_NR_LEVEL-1); i>=0; i--) {
6167 if (log_info.stat[i] > dev->smart.log_info.stat[i]) {
6168 /* unclean */
6169 memcpy(&dev->smart.log_info, &log_info, sizeof(struct ssd_log_info));
6170 dev->smart.version++;
6171 break;
6172 }
6173 }
6174 }
6175
6176 for (i=0; i<dev->rom_info.nr_smart; i++) {
6177 if (smart[i].magic == SSD_SMART_MAGIC && smart[i].version == dev->smart.version) {
6178 continue;
6179 }
6180
6181 off = dev->rom_info.smart_base + (dev->rom_info.smart_sz * i);
6182 size = dev->rom_info.smart_sz;
6183
6184 ret = ssd_spi_erase(dev, off, size);
6185 if (ret) {
6186 hio_warn("%s: info erase failed\n", dev->name);
6187 goto out;
6188 }
6189
6190 size = sizeof(struct ssd_smart);
6191 ret = ssd_spi_write(dev, &dev->smart, off, size);
6192 if (ret) {
6193 hio_warn("%s: info write failed\n", dev->name);
6194 goto out;
6195 }
6196
6197 //xx
6198 }
6199
6200 /* sync smart with alarm led */
6201 if (dev->smart.io_stat.nr_to || dev->smart.io_stat.nr_rwerr || dev->smart.log_info.stat[SSD_LOG_LEVEL_ERR]) {
6202 hio_warn("%s: some fault found in the history info\n", dev->name);
6203 ssd_set_alarm(dev);
6204 }
6205
6206out:
6207 kfree(smart);
6208out_nomem:
6209 /* skip error if not in standard mode */
6210 if (mode != SSD_DRV_MODE_STANDARD) {
6211 ret = 0;
6212 }
6213 return ret;
6214}
6215
6216/* bm */
6217static int __ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6218{
6219 struct ssd_bm_manufacturer_data bm_md = {0};
6220 uint16_t sc_id = SSD_BM_SYSTEM_DATA_SUBCLASS_ID;
6221 uint8_t cmd;
6222 int ret = 0;
6223
6224 if (!dev || !ver) {
6225 return -EINVAL;
6226 }
6227
6228 mutex_lock(&dev->bm_mutex);
6229
6230 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6231 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6232 if (ret) {
6233 goto out;
6234 }
6235
6236 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6237 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_manufacturer_data), (uint8_t *)&bm_md);
6238 if (ret) {
6239 goto out;
6240 }
6241
6242 if (bm_md.firmware_ver & 0xF000) {
6243 ret = -EIO;
6244 goto out;
6245 }
6246
6247 *ver = bm_md.firmware_ver;
6248
6249out:
6250 mutex_unlock(&dev->bm_mutex);
6251 return ret;
6252}
6253
6254static int ssd_bm_get_version(struct ssd_device *dev, uint16_t *ver)
6255{
6256 uint16_t tmp = 0;
6257 int i = SSD_BM_RETRY_MAX;
6258 int ret = 0;
6259
6260 while (i-- > 0) {
6261 ret = __ssd_bm_get_version(dev, &tmp);
6262 if (!ret) {
6263 break;
6264 }
6265 }
6266 if (ret) {
6267 return ret;
6268 }
6269
6270 *ver = tmp;
6271
6272 return 0;
6273}
6274
6275static int __ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6276{
6277 struct ssd_bm_configuration_registers bm_cr;
6278 uint16_t sc_id = SSD_BM_CONFIGURATION_REGISTERS_ID;
6279 uint8_t cmd;
6280 int ret;
6281
6282 mutex_lock(&dev->bm_mutex);
6283
6284 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID;
6285 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&sc_id);
6286 if (ret) {
6287 goto out;
6288 }
6289
6290 cmd = SSD_BM_DATA_FLASH_SUBCLASS_ID_PAGE1;
6291 ret = ssd_smbus_read_block(dev, SSD_BM_SLAVE_ADDRESS, cmd, sizeof(struct ssd_bm_configuration_registers), (uint8_t *)&bm_cr);
6292 if (ret) {
6293 goto out;
6294 }
6295
6296 if (bm_cr.operation_cfg.cc == 0 || bm_cr.operation_cfg.cc > 4) {
6297 ret = -EIO;
6298 goto out;
6299 }
6300
6301 *nr_cap = bm_cr.operation_cfg.cc + 1;
6302
6303out:
6304 mutex_unlock(&dev->bm_mutex);
6305 return ret;
6306}
6307
6308static int ssd_bm_nr_cap(struct ssd_device *dev, int *nr_cap)
6309{
6310 int tmp = 0;
6311 int i = SSD_BM_RETRY_MAX;
6312 int ret = 0;
6313
6314 while (i-- > 0) {
6315 ret = __ssd_bm_nr_cap(dev, &tmp);
6316 if (!ret) {
6317 break;
6318 }
6319 }
6320 if (ret) {
6321 return ret;
6322 }
6323
6324 *nr_cap = tmp;
6325
6326 return 0;
6327}
6328
6329static int ssd_bm_enter_cap_learning(struct ssd_device *dev)
6330{
6331 uint16_t buf = SSD_BM_ENTER_CAP_LEARNING;
6332 uint8_t cmd = SSD_BM_MANUFACTURERACCESS;
6333 int ret;
6334
6335 ret = ssd_smbus_write_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&buf);
6336 if (ret) {
6337 goto out;
6338 }
6339
6340out:
6341 return ret;
6342}
6343
6344static int ssd_bm_get_sfstatus(struct ssd_device *dev, uint16_t *status)
6345{
6346 uint16_t val = 0;
6347 uint8_t cmd = SSD_BM_SAFETYSTATUS;
6348 int ret;
6349
6350 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6351 if (ret) {
6352 goto out;
6353 }
6354
6355 *status = val;
6356out:
6357 return ret;
6358}
6359
6360static int ssd_bm_get_opstatus(struct ssd_device *dev, uint16_t *status)
6361{
6362 uint16_t val = 0;
6363 uint8_t cmd = SSD_BM_OPERATIONSTATUS;
6364 int ret;
6365
6366 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, cmd, (uint8_t *)&val);
6367 if (ret) {
6368 goto out;
6369 }
6370
6371 *status = val;
6372out:
6373 return ret;
6374}
6375
6376static int ssd_get_bmstruct(struct ssd_device *dev, struct ssd_bm *bm_status_out)
6377{
6378 struct sbs_cmd *bm_sbs = ssd_bm_sbs;
6379 struct ssd_bm bm_status;
6380 uint8_t buf[2] = {0, };
6381 uint16_t val = 0;
6382 uint16_t cval;
6383 int ret = 0;
6384
6385 memset(&bm_status, 0, sizeof(struct ssd_bm));
6386
6387 while (bm_sbs->desc != NULL) {
6388 switch (bm_sbs->size) {
6389 case SBS_SIZE_BYTE:
6390 ret = ssd_smbus_read_byte(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, buf);
6391 if (ret) {
6392 //printf("Error: smbus read byte %#x\n", bm_sbs->cmd);
6393 goto out;
6394 }
6395 val = buf[0];
6396 break;
6397 case SBS_SIZE_WORD:
6398 ret = ssd_smbus_read_word(dev, SSD_BM_SLAVE_ADDRESS, bm_sbs->cmd, (uint8_t *)&val);
6399 if (ret) {
6400 //printf("Error: smbus read word %#x\n", bm_sbs->cmd);
6401 goto out;
6402 }
6403 //val = *(uint16_t *)buf;
6404 break;
6405 default:
6406 ret = -1;
6407 goto out;
6408 break;
6409 }
6410
6411 switch (bm_sbs->unit) {
6412 case SBS_UNIT_VALUE:
6413 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val & bm_sbs->mask;
6414 break;
6415 case SBS_UNIT_TEMPERATURE:
6416 cval = (uint16_t)(val - 2731) / 10;
6417 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = cval;
6418 break;
6419 case SBS_UNIT_VOLTAGE:
6420 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6421 break;
6422 case SBS_UNIT_CURRENT:
6423 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6424 break;
6425 case SBS_UNIT_ESR:
6426 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6427 break;
6428 case SBS_UNIT_PERCENT:
6429 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6430 break;
6431 case SBS_UNIT_CAPACITANCE:
6432 *(uint16_t *)bm_var(&bm_status, bm_sbs->off) = val;
6433 break;
6434 default:
6435 ret = -1;
6436 goto out;
6437 break;
6438 }
6439
6440 bm_sbs++;
6441 }
6442
6443 memcpy(bm_status_out, &bm_status, sizeof(struct ssd_bm));
6444
6445out:
6446 return ret;
6447}
6448
6449static int __ssd_bm_status(struct ssd_device *dev, int *status)
6450{
6451 struct ssd_bm bm_status = {0};
6452 int nr_cap = 0;
6453 int i;
6454 int ret = 0;
6455
6456 ret = ssd_get_bmstruct(dev, &bm_status);
6457 if (ret) {
6458 goto out;
6459 }
6460
6461 /* capacitor voltage */
6462 ret = ssd_bm_nr_cap(dev, &nr_cap);
6463 if (ret) {
6464 goto out;
6465 }
6466
6467 for (i=0; i<nr_cap; i++) {
6468 if (bm_status.cap_volt[i] < SSD_BM_CAP_VOLT_MIN) {
6469 *status = SSD_BMSTATUS_WARNING;
6470 goto out;
6471 }
6472 }
6473
6474 /* Safety Status */
6475 if (bm_status.sf_status) {
6476 *status = SSD_BMSTATUS_WARNING;
6477 goto out;
6478 }
6479
6480 /* charge status */
6481 if (!((bm_status.op_status >> 12) & 0x1)) {
6482 *status = SSD_BMSTATUS_CHARGING;
6483 }else{
6484 *status = SSD_BMSTATUS_OK;
6485 }
6486
6487out:
6488 return ret;
6489}
6490
6491static void ssd_set_flush_timeout(struct ssd_device *dev, int mode);
6492
6493#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
6494static void ssd_bm_worker(void *data)
6495{
6496 struct ssd_device *dev = (struct ssd_device *)data;
6497#else
6498static void ssd_bm_worker(struct work_struct *work)
6499{
6500 struct ssd_device *dev = container_of(work, struct ssd_device, bm_work);
6501#endif
6502
6503 uint16_t opstatus;
6504 int ret = 0;
6505
6506 if (mode != SSD_DRV_MODE_STANDARD) {
6507 return;
6508 }
6509
6510 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
6511 return;
6512 }
6513
6514 if (dev->hw_info_ext.plp_type != SSD_PLP_SCAP) {
6515 return;
6516 }
6517
6518 ret = ssd_bm_get_opstatus(dev, &opstatus);
6519 if (ret) {
6520 hio_warn("%s: get bm operationstatus failed\n", dev->name);
6521 return;
6522 }
6523
6524 /* need cap learning ? */
6525 if (!(opstatus & 0xF0)) {
6526 ret = ssd_bm_enter_cap_learning(dev);
6527 if (ret) {
6528 hio_warn("%s: enter capacitance learning failed\n", dev->name);
6529 return;
6530 }
6531 }
6532}
6533
6534static void ssd_bm_routine_start(void *data)
6535{
6536 struct ssd_device *dev;
6537
6538 if (!data) {
6539 return;
6540 }
6541 dev = data;
6542
6543 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
6544 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6545 queue_work(dev->workq, &dev->bm_work);
6546 } else {
6547 queue_work(dev->workq, &dev->capmon_work);
6548 }
6549 }
6550}
6551
6552/* CAP */
6553static int ssd_do_cap_learn(struct ssd_device *dev, uint32_t *cap)
6554{
6555 uint32_t u1, u2, t;
6556 uint16_t val = 0;
6557 int wait = 0;
6558 int ret = 0;
6559
6560 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6561 *cap = 0;
6562 return 0;
6563 }
6564
6565 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6566 *cap = 0;
6567 return 0;
6568 }
6569
6570 /* make sure the lm80 voltage value is updated */
6571 msleep(SSD_LM80_CONV_INTERVAL);
6572
6573 /* check if full charged */
6574 wait = 0;
6575 for (;;) {
6576 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6577 if (ret) {
6578 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6579 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6580 }
6581 goto out;
6582 }
6583 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6584 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_FULL) {
6585 break;
6586 }
6587
6588 wait++;
6589 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6590 ret = -ETIMEDOUT;
6591 goto out;
6592 }
6593 msleep(SSD_PL_CAP_CHARGE_WAIT);
6594 }
6595
6596 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U2, (uint8_t *)&val);
6597 if (ret) {
6598 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6599 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6600 }
6601 goto out;
6602 }
6603 u2 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6604
6605 if (u1 == u2) {
6606 ret = -EINVAL;
6607 goto out;
6608 }
6609
6610 /* enter cap learn */
6611 ssd_reg32_write(dev->ctrlp + SSD_PL_CAP_LEARN_REG, 0x1);
6612
6613 wait = 0;
6614 for (;;) {
6615 msleep(SSD_PL_CAP_LEARN_WAIT);
6616
6617 t = ssd_reg32_read(dev->ctrlp + SSD_PL_CAP_LEARN_REG);
6618 if (!((t >> 1) & 0x1)) {
6619 break;
6620 }
6621
6622 wait++;
6623 if (wait > SSD_PL_CAP_LEARN_MAX_WAIT) {
6624 ret = -ETIMEDOUT;
6625 goto out;
6626 }
6627 }
6628
6629 if ((t >> 4) & 0x1) {
6630 ret = -ETIMEDOUT;
6631 goto out;
6632 }
6633
6634 t = (t >> 8);
6635 if (0 == t) {
6636 ret = -EINVAL;
6637 goto out;
6638 }
6639
6640 *cap = SSD_PL_CAP_LEARN(u1, u2, t);
6641
6642out:
6643 return ret;
6644}
6645
6646static int ssd_cap_learn(struct ssd_device *dev, uint32_t *cap)
6647{
6648 int ret = 0;
6649
6650 if (!dev || !cap) {
6651 return -EINVAL;
6652 }
6653
6654 mutex_lock(&dev->bm_mutex);
6655
6656 ssd_stop_workq(dev);
6657
6658 ret = ssd_do_cap_learn(dev, cap);
6659 if (ret) {
6660 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
6661 goto out;
6662 }
6663
6664 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, *cap);
6665
6666out:
6667 ssd_start_workq(dev);
6668 mutex_unlock(&dev->bm_mutex);
6669
6670 return ret;
6671}
6672
6673static int ssd_check_pl_cap(struct ssd_device *dev)
6674{
6675 uint32_t u1;
6676 uint16_t val = 0;
6677 uint8_t low = 0;
6678 int wait = 0;
6679 int ret = 0;
6680
6681 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6682 return 0;
6683 }
6684
6685 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6686 return 0;
6687 }
6688
6689 /* cap ready ? */
6690 wait = 0;
6691 for (;;) {
6692 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6693 if (ret) {
6694 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6695 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6696 }
6697 goto out;
6698 }
6699 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6700 if (SSD_PL_CAP_VOLT(u1) >= SSD_PL_CAP_VOLT_READY) {
6701 break;
6702 }
6703
6704 wait++;
6705 if (wait > SSD_PL_CAP_CHARGE_MAX_WAIT) {
6706 ret = -ETIMEDOUT;
6707 ssd_gen_swlog(dev, SSD_LOG_CAP_VOLT_FAULT, SSD_PL_CAP_VOLT(u1));
6708 goto out;
6709 }
6710 msleep(SSD_PL_CAP_CHARGE_WAIT);
6711 }
6712
6713 low = ssd_lm80_limit[SSD_LM80_IN_CAP].low;
6714 ret = ssd_smbus_write_byte(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_REG_IN_MIN(SSD_LM80_IN_CAP), &low);
6715 if (ret) {
6716 goto out;
6717 }
6718
6719 /* enable cap INx */
6720 ret = ssd_lm80_enable_in(dev, SSD_SENSOR_LM80_SADDRESS, SSD_LM80_IN_CAP);
6721 if (ret) {
6722 if (!test_and_set_bit(SSD_HWMON_SENSOR(SSD_SENSOR_LM80), &dev->hwmon)) {
6723 ssd_gen_swlog(dev, SSD_LOG_SENSOR_FAULT, SSD_SENSOR_LM80_SADDRESS);
6724 }
6725 goto out;
6726 }
6727
6728out:
6729 /* skip error if not in standard mode */
6730 if (mode != SSD_DRV_MODE_STANDARD) {
6731 ret = 0;
6732 }
6733 return ret;
6734}
6735
6736static int ssd_check_pl_cap_fast(struct ssd_device *dev)
6737{
6738 uint32_t u1;
6739 uint16_t val = 0;
6740 int ret = 0;
6741
6742 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6743 return 0;
6744 }
6745
6746 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
6747 return 0;
6748 }
6749
6750 /* cap ready ? */
6751 ret = ssd_smbus_read_word(dev, SSD_SENSOR_LM80_SADDRESS, SSD_PL_CAP_U1, (uint8_t *)&val);
6752 if (ret) {
6753 goto out;
6754 }
6755 u1 = SSD_LM80_CONVERT_VOLT(u16_swap(val));
6756 if (SSD_PL_CAP_VOLT(u1) < SSD_PL_CAP_VOLT_READY) {
6757 ret = 1;
6758 }
6759
6760out:
6761 return ret;
6762}
6763
6764static int ssd_init_pl_cap(struct ssd_device *dev)
6765{
6766 int ret = 0;
6767
6768 /* set here: user write mode */
6769 dev->user_wmode = wmode;
6770
6771 mutex_init(&dev->bm_mutex);
6772
6773 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6774 uint32_t val;
6775 val = ssd_reg32_read(dev->ctrlp + SSD_BM_FAULT_REG);
6776 if ((val >> 1) & 0x1) {
6777 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6778 }
6779 } else {
6780 ret = ssd_check_pl_cap(dev);
6781 if (ret) {
6782 (void)test_and_set_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon);
6783 }
6784 }
6785
6786 return 0;
6787}
6788
6789/* label */
6790static void __end_str(char *str, int len)
6791{
6792 int i;
6793
6794 for(i=0; i<len; i++) {
6795 if (*(str+i) == '\0')
6796 return;
6797 }
6798 *str = '\0';
6799}
6800
6801static int ssd_init_label(struct ssd_device *dev)
6802{
6803 uint32_t off;
6804 uint32_t size;
6805 int ret;
6806
6807 /* label location */
6808 off = dev->rom_info.label_base;
6809
6810 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6811 size = sizeof(struct ssd_label);
6812
6813 /* read label */
6814 ret = ssd_spi_read(dev, &dev->label, off, size);
6815 if (ret) {
6816 memset(&dev->label, 0, size);
6817 goto out;
6818 }
6819
6820 __end_str(dev->label.date, SSD_LABEL_FIELD_SZ);
6821 __end_str(dev->label.sn, SSD_LABEL_FIELD_SZ);
6822 __end_str(dev->label.part, SSD_LABEL_FIELD_SZ);
6823 __end_str(dev->label.desc, SSD_LABEL_FIELD_SZ);
6824 __end_str(dev->label.other, SSD_LABEL_FIELD_SZ);
6825 __end_str(dev->label.maf, SSD_LABEL_FIELD_SZ);
6826 } else {
6827 size = sizeof(struct ssd_labelv3);
6828
6829 /* read label */
6830 ret = ssd_spi_read(dev, &dev->labelv3, off, size);
6831 if (ret) {
6832 memset(&dev->labelv3, 0, size);
6833 goto out;
6834 }
6835
6836 __end_str(dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6837 __end_str(dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6838 __end_str(dev->labelv3.item, SSD_LABEL_FIELD_SZ);
6839 __end_str(dev->labelv3.description, SSD_LABEL_DESC_SZ);
6840 __end_str(dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6841 __end_str(dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6842 __end_str(dev->labelv3.issuenumber, SSD_LABEL_FIELD_SZ);
6843 __end_str(dev->labelv3.cleicode, SSD_LABEL_FIELD_SZ);
6844 __end_str(dev->labelv3.bom, SSD_LABEL_FIELD_SZ);
6845 }
6846
6847out:
6848 /* skip error if not in standard mode */
6849 if (mode != SSD_DRV_MODE_STANDARD) {
6850 ret = 0;
6851 }
6852 return ret;
6853}
6854
6855int ssd_get_label(struct block_device *bdev, struct ssd_label *label)
6856{
6857 struct ssd_device *dev;
6858
6859 if (!bdev || !label || !(bdev->bd_disk)) {
6860 return -EINVAL;
6861 }
6862
6863 dev = bdev->bd_disk->private_data;
6864
6865 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
6866 memset(label, 0, sizeof(struct ssd_label));
6867 memcpy(label->date, dev->labelv3.manufactured, SSD_LABEL_FIELD_SZ);
6868 memcpy(label->sn, dev->labelv3.barcode, SSD_LABEL_FIELD_SZ);
6869 memcpy(label->desc, dev->labelv3.boardtype, SSD_LABEL_FIELD_SZ);
6870 memcpy(label->maf, dev->labelv3.vendorname, SSD_LABEL_FIELD_SZ);
6871 } else {
6872 memcpy(label, &dev->label, sizeof(struct ssd_label));
6873 }
6874
6875 return 0;
6876}
6877
6878static int __ssd_get_version(struct ssd_device *dev, struct ssd_version_info *ver)
6879{
6880 uint16_t bm_ver = 0;
6881 int ret = 0;
6882
6883 if (dev->protocol_info.ver > SSD_PROTOCOL_V3 && dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
6884 ret = ssd_bm_get_version(dev, &bm_ver);
6885 if(ret){
6886 goto out;
6887 }
6888 }
6889
6890 ver->bridge_ver = dev->hw_info.bridge_ver;
6891 ver->ctrl_ver = dev->hw_info.ctrl_ver;
6892 ver->bm_ver = bm_ver;
6893 ver->pcb_ver = dev->hw_info.pcb_ver;
6894 ver->upper_pcb_ver = dev->hw_info.upper_pcb_ver;
6895
6896out:
6897 return ret;
6898
6899}
6900
6901int ssd_get_version(struct block_device *bdev, struct ssd_version_info *ver)
6902{
6903 struct ssd_device *dev;
6904 int ret;
6905
6906 if (!bdev || !ver || !(bdev->bd_disk)) {
6907 return -EINVAL;
6908 }
6909
6910 dev = bdev->bd_disk->private_data;
6911
6912 mutex_lock(&dev->fw_mutex);
6913 ret = __ssd_get_version(dev, ver);
6914 mutex_unlock(&dev->fw_mutex);
6915
6916 return ret;
6917}
6918
6919static int __ssd_get_temperature(struct ssd_device *dev, int *temp)
6920{
6921 uint64_t val;
6922 uint32_t off;
6923 int max = -300;
6924 int cur;
6925 int i;
6926
6927 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
6928 *temp = 0;
6929 return 0;
6930 }
6931
6932 if (finject) {
6933 if (dev->db_info.type == SSD_DEBUG_LOG &&
6934 (dev->db_info.data.log.event == SSD_LOG_OVER_TEMP ||
6935 dev->db_info.data.log.event == SSD_LOG_NORMAL_TEMP ||
6936 dev->db_info.data.log.event == SSD_LOG_WARN_TEMP)) {
6937 *temp = (int)dev->db_info.data.log.extra;
6938 return 0;
6939 }
6940 }
6941
6942 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
6943 off = SSD_CTRL_TEMP_REG0 + i * sizeof(uint64_t);
6944
6945 val = ssd_reg_read(dev->ctrlp + off);
6946 if (val == 0xffffffffffffffffull) {
6947 continue;
6948 }
6949
6950 cur = (int)CUR_TEMP(val);
6951 if (cur >= max) {
6952 max = cur;
6953 }
6954 }
6955
6956 *temp = max;
6957
6958 return 0;
6959}
6960
6961int ssd_get_temperature(struct block_device *bdev, int *temp)
6962{
6963 struct ssd_device *dev;
6964 int ret;
6965
6966 if (!bdev || !temp || !(bdev->bd_disk)) {
6967 return -EINVAL;
6968 }
6969
6970 dev = bdev->bd_disk->private_data;
6971
6972
6973 mutex_lock(&dev->fw_mutex);
6974 ret = __ssd_get_temperature(dev, temp);
6975 mutex_unlock(&dev->fw_mutex);
6976
6977 return ret;
6978}
6979
6980int ssd_set_otprotect(struct block_device *bdev, int otprotect)
6981 {
6982 struct ssd_device *dev;
6983
6984 if (!bdev || !(bdev->bd_disk)) {
6985 return -EINVAL;
6986 }
6987
6988 dev = bdev->bd_disk->private_data;
6989 ssd_set_ot_protect(dev, !!otprotect);
6990
6991 return 0;
6992 }
6993
6994int ssd_bm_status(struct block_device *bdev, int *status)
6995{
6996 struct ssd_device *dev;
6997 int ret = 0;
6998
6999 if (!bdev || !status || !(bdev->bd_disk)) {
7000 return -EINVAL;
7001 }
7002
7003 dev = bdev->bd_disk->private_data;
7004
7005 mutex_lock(&dev->fw_mutex);
7006 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7007 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7008 *status = SSD_BMSTATUS_WARNING;
7009 } else {
7010 *status = SSD_BMSTATUS_OK;
7011 }
7012 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7013 ret = __ssd_bm_status(dev, status);
7014 } else {
7015 *status = SSD_BMSTATUS_OK;
7016 }
7017 mutex_unlock(&dev->fw_mutex);
7018
7019 return ret;
7020}
7021
7022int ssd_get_pciaddr(struct block_device *bdev, struct pci_addr *paddr)
7023{
7024 struct ssd_device *dev;
7025
7026 if (!bdev || !paddr || !bdev->bd_disk) {
7027 return -EINVAL;
7028 }
7029
7030 dev = bdev->bd_disk->private_data;
7031
7032 paddr->domain = pci_domain_nr(dev->pdev->bus);
7033 paddr->bus = dev->pdev->bus->number;
7034 paddr->slot = PCI_SLOT(dev->pdev->devfn);
7035 paddr->func= PCI_FUNC(dev->pdev->devfn);
7036
7037 return 0;
7038}
7039
7040/* acc */
7041static int ssd_bb_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7042{
7043 uint32_t val;
7044 int ctrl, chip;
7045
7046 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7047 return -EOPNOTSUPP;
7048 }
7049
7050 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L1_REG);
7051 if (0xffffffffull == acc->threshold_l1) {
7052 return -EIO;
7053 }
7054 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_BB_THRESHOLD_L2_REG);
7055 if (0xffffffffull == acc->threshold_l2) {
7056 return -EIO;
7057 }
7058 acc->val = 0;
7059
7060 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7061 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7062 val = ssd_reg32_read(dev->ctrlp + SSD_BB_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_BB_ACC_REG_SZ * chip));
7063 if (0xffffffffull == acc->val) {
7064 return -EIO;
7065 }
7066 if (val > acc->val) {
7067 acc->val = val;
7068 }
7069 }
7070 }
7071
7072 return 0;
7073}
7074
7075static int ssd_ec_acc(struct ssd_device *dev, struct ssd_acc_info *acc)
7076{
7077 uint32_t val;
7078 int ctrl, chip;
7079
7080 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7081 return -EOPNOTSUPP;
7082 }
7083
7084 acc->threshold_l1 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L1_REG);
7085 if (0xffffffffull == acc->threshold_l1) {
7086 return -EIO;
7087 }
7088 acc->threshold_l2 = ssd_reg32_read(dev->ctrlp + SSD_EC_THRESHOLD_L2_REG);
7089 if (0xffffffffull == acc->threshold_l2) {
7090 return -EIO;
7091 }
7092 acc->val = 0;
7093
7094 for (ctrl=0; ctrl<dev->hw_info.nr_ctrl; ctrl++) {
7095 for (chip=0; chip<dev->hw_info.nr_chip; chip++) {
7096 val = ssd_reg32_read(dev->ctrlp + SSD_EC_ACC_REG0 + (SSD_CTRL_REG_ZONE_SZ * ctrl) + (SSD_EC_ACC_REG_SZ * chip));
7097 if (0xffffffffull == acc->val) {
7098 return -EIO;
7099 }
7100
7101 if (val > acc->val) {
7102 acc->val = val;
7103 }
7104 }
7105 }
7106
7107 return 0;
7108}
7109
7110
7111/* ram r&w */
7112static int ssd_ram_read_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7113{
7114 struct ssd_ram_op_msg *msg;
7115 dma_addr_t buf_dma;
7116 size_t len = length;
7117 loff_t ofs_w = ofs;
7118 int ret = 0;
7119
7120 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7121 || !length || length > dev->hw_info.ram_max_len
7122 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7123 return -EINVAL;
7124 }
7125
7126 len /= dev->hw_info.ram_align;
7127 do_div(ofs_w, dev->hw_info.ram_align);
7128
7129 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7130#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7131 ret = dma_mapping_error(buf_dma);
7132#else
7133 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7134#endif
7135 if (ret) {
7136 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7137 goto out_dma_mapping;
7138 }
7139
7140 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7141
7142 msg->fun = SSD_FUNC_RAM_READ;
7143 msg->ctrl_idx = ctrl_idx;
7144 msg->start = (uint32_t)ofs_w;
7145 msg->length = len;
7146 msg->buf = buf_dma;
7147
7148 ret = ssd_do_request(dev, READ, msg, NULL);
7149 ssd_put_dmsg(msg);
7150
7151 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7152
7153out_dma_mapping:
7154 return ret;
7155}
7156
7157static int ssd_ram_write_4k(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7158{
7159 struct ssd_ram_op_msg *msg;
7160 dma_addr_t buf_dma;
7161 size_t len = length;
7162 loff_t ofs_w = ofs;
7163 int ret = 0;
7164
7165 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size
7166 || !length || length > dev->hw_info.ram_max_len
7167 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7168 return -EINVAL;
7169 }
7170
7171 len /= dev->hw_info.ram_align;
7172 do_div(ofs_w, dev->hw_info.ram_align);
7173
7174 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7175#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7176 ret = dma_mapping_error(buf_dma);
7177#else
7178 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7179#endif
7180 if (ret) {
7181 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7182 goto out_dma_mapping;
7183 }
7184
7185 msg = (struct ssd_ram_op_msg *)ssd_get_dmsg(dev);
7186
7187 msg->fun = SSD_FUNC_RAM_WRITE;
7188 msg->ctrl_idx = ctrl_idx;
7189 msg->start = (uint32_t)ofs_w;
7190 msg->length = len;
7191 msg->buf = buf_dma;
7192
7193 ret = ssd_do_request(dev, WRITE, msg, NULL);
7194 ssd_put_dmsg(msg);
7195
7196 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7197
7198out_dma_mapping:
7199 return ret;
7200
7201}
7202
7203static int ssd_ram_read(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7204{
7205 int left = length;
7206 size_t len;
7207 loff_t off = ofs;
7208 int ret = 0;
7209
7210 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7211 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7212 return -EINVAL;
7213 }
7214
7215 while (left > 0) {
7216 len = dev->hw_info.ram_max_len;
7217 if (left < (int)dev->hw_info.ram_max_len) {
7218 len = left;
7219 }
7220
7221 ret = ssd_ram_read_4k(dev, buf, len, off, ctrl_idx);
7222 if (ret) {
7223 break;
7224 }
7225
7226 left -= len;
7227 off += len;
7228 buf += len;
7229 }
7230
7231 return ret;
7232}
7233
7234static int ssd_ram_write(struct ssd_device *dev, void *buf, size_t length, loff_t ofs, int ctrl_idx)
7235{
7236 int left = length;
7237 size_t len;
7238 loff_t off = ofs;
7239 int ret = 0;
7240
7241 if (ctrl_idx >= dev->hw_info.nr_ctrl || (uint64_t)(ofs + length) > dev->hw_info.ram_size || !length
7242 || (length & (dev->hw_info.ram_align - 1)) != 0 || ((uint64_t)ofs & (dev->hw_info.ram_align - 1)) != 0) {
7243 return -EINVAL;
7244 }
7245
7246 while (left > 0) {
7247 len = dev->hw_info.ram_max_len;
7248 if (left < (int)dev->hw_info.ram_max_len) {
7249 len = left;
7250 }
7251
7252 ret = ssd_ram_write_4k(dev, buf, len, off, ctrl_idx);
7253 if (ret) {
7254 break;
7255 }
7256
7257 left -= len;
7258 off += len;
7259 buf += len;
7260 }
7261
7262 return ret;
7263}
7264
7265
7266/* flash op */
7267static int ssd_check_flash(struct ssd_device *dev, int flash, int page, int ctrl_idx)
7268{
7269 int cur_ch = flash % dev->hw_info.max_ch;
7270 int cur_chip = flash /dev->hw_info.max_ch;
7271
7272 if (ctrl_idx >= dev->hw_info.nr_ctrl) {
7273 return -EINVAL;
7274 }
7275
7276 if (cur_ch >= dev->hw_info.nr_ch || cur_chip >= dev->hw_info.nr_chip) {
7277 return -EINVAL;
7278 }
7279
7280 if (page >= (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7281 return -EINVAL;
7282 }
7283 return 0;
7284}
7285
7286static int ssd_nand_read_id(struct ssd_device *dev, void *id, int flash, int chip, int ctrl_idx)
7287{
7288 struct ssd_nand_op_msg *msg;
7289 dma_addr_t buf_dma;
7290 int ret = 0;
7291
7292 if (unlikely(!id))
7293 return -EINVAL;
7294
7295 buf_dma = pci_map_single(dev->pdev, id, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7296#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7297 ret = dma_mapping_error(buf_dma);
7298#else
7299 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7300#endif
7301 if (ret) {
7302 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7303 goto out_dma_mapping;
7304 }
7305
7306 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7307 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7308 chip = 0;
7309 }
7310
7311 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7312
7313 msg->fun = SSD_FUNC_NAND_READ_ID;
7314 msg->chip_no = flash;
7315 msg->chip_ce = chip;
7316 msg->ctrl_idx = ctrl_idx;
7317 msg->buf = buf_dma;
7318
7319 ret = ssd_do_request(dev, READ, msg, NULL);
7320 ssd_put_dmsg(msg);
7321
7322 pci_unmap_single(dev->pdev, buf_dma, SSD_NAND_ID_BUFF_SZ, PCI_DMA_FROMDEVICE);
7323
7324out_dma_mapping:
7325 return ret;
7326}
7327
7328#if 0
7329static int ssd_nand_read(struct ssd_device *dev, void *buf,
7330 int flash, int chip, int page, int page_count, int ctrl_idx)
7331{
7332 struct ssd_nand_op_msg *msg;
7333 dma_addr_t buf_dma;
7334 int length;
7335 int ret = 0;
7336
7337 if (!buf) {
7338 return -EINVAL;
7339 }
7340
7341 if ((page + page_count) > dev->hw_info.block_count*dev->hw_info.page_count) {
7342 return -EINVAL;
7343 }
7344
7345 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7346 if (ret) {
7347 return ret;
7348 }
7349
7350 length = page_count * dev->hw_info.page_size;
7351
7352 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7353#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7354 ret = dma_mapping_error(buf_dma);
7355#else
7356 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7357#endif
7358 if (ret) {
7359 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7360 goto out_dma_mapping;
7361 }
7362
7363 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7364 flash = (flash << 1) | chip;
7365 chip = 0;
7366 }
7367
7368 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7369
7370 msg->fun = SSD_FUNC_NAND_READ;
7371 msg->ctrl_idx = ctrl_idx;
7372 msg->chip_no = flash;
7373 msg->chip_ce = chip;
7374 msg->page_no = page;
7375 msg->page_count = page_count;
7376 msg->buf = buf_dma;
7377
7378 ret = ssd_do_request(dev, READ, msg, NULL);
7379 ssd_put_dmsg(msg);
7380
7381 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7382
7383out_dma_mapping:
7384 return ret;
7385}
7386#endif
7387
7388static int ssd_nand_read_w_oob(struct ssd_device *dev, void *buf,
7389 int flash, int chip, int page, int count, int ctrl_idx)
7390{
7391 struct ssd_nand_op_msg *msg;
7392 dma_addr_t buf_dma;
7393 int length;
7394 int ret = 0;
7395
7396 if (!buf) {
7397 return -EINVAL;
7398 }
7399
7400 if ((page + count) > (int)(dev->hw_info.block_count * dev->hw_info.page_count)) {
7401 return -EINVAL;
7402 }
7403
7404 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7405 if (ret) {
7406 return ret;
7407 }
7408
7409 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7410
7411 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_FROMDEVICE);
7412#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7413 ret = dma_mapping_error(buf_dma);
7414#else
7415 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7416#endif
7417 if (ret) {
7418 hio_warn("%s: unable to map read DMA buffer\n", dev->name);
7419 goto out_dma_mapping;
7420 }
7421
7422 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7423 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7424 chip = 0;
7425 }
7426
7427 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7428
7429 msg->fun = SSD_FUNC_NAND_READ_WOOB;
7430 msg->ctrl_idx = ctrl_idx;
7431 msg->chip_no = flash;
7432 msg->chip_ce = chip;
7433 msg->page_no = page;
7434 msg->page_count = count;
7435 msg->buf = buf_dma;
7436
7437 ret = ssd_do_request(dev, READ, msg, NULL);
7438 ssd_put_dmsg(msg);
7439
7440 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_FROMDEVICE);
7441
7442out_dma_mapping:
7443 return ret;
7444}
7445
7446/* write 1 page */
7447static int ssd_nand_write(struct ssd_device *dev, void *buf,
7448 int flash, int chip, int page, int count, int ctrl_idx)
7449{
7450 struct ssd_nand_op_msg *msg;
7451 dma_addr_t buf_dma;
7452 int length;
7453 int ret = 0;
7454
7455 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7456 return -EINVAL;
7457 }
7458
7459 if (!buf) {
7460 return -EINVAL;
7461 }
7462
7463 if (count != 1) {
7464 return -EINVAL;
7465 }
7466
7467 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7468 if (ret) {
7469 return ret;
7470 }
7471
7472 length = count * (dev->hw_info.page_size + dev->hw_info.oob_size);
7473
7474 /* write data to ram */
7475 /*ret = ssd_ram_write(dev, buf, length, dev->hw_info.nand_wbuff_base, ctrl_idx);
7476 if (ret) {
7477 return ret;
7478 }*/
7479
7480 buf_dma = pci_map_single(dev->pdev, buf, length, PCI_DMA_TODEVICE);
7481#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
7482 ret = dma_mapping_error(buf_dma);
7483#else
7484 ret = dma_mapping_error(&(dev->pdev->dev), buf_dma);
7485#endif
7486 if (ret) {
7487 hio_warn("%s: unable to map write DMA buffer\n", dev->name);
7488 goto out_dma_mapping;
7489 }
7490
7491 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7492 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7493 chip = 0;
7494 }
7495
7496 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7497
7498 msg->fun = SSD_FUNC_NAND_WRITE;
7499 msg->ctrl_idx = ctrl_idx;
7500 msg->chip_no = flash;
7501 msg->chip_ce = chip;
7502
7503 msg->page_no = page;
7504 msg->page_count = count;
7505 msg->buf = buf_dma;
7506
7507 ret = ssd_do_request(dev, WRITE, msg, NULL);
7508 ssd_put_dmsg(msg);
7509
7510 pci_unmap_single(dev->pdev, buf_dma, length, PCI_DMA_TODEVICE);
7511
7512out_dma_mapping:
7513 return ret;
7514}
7515
7516static int ssd_nand_erase(struct ssd_device *dev, int flash, int chip, int page, int ctrl_idx)
7517{
7518 struct ssd_nand_op_msg *msg;
7519 int ret = 0;
7520
7521 ret = ssd_check_flash(dev, flash, page, ctrl_idx);
7522 if (ret) {
7523 return ret;
7524 }
7525
7526 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7527 flash = ((uint32_t)flash << 1) | (uint32_t)chip;
7528 chip = 0;
7529 }
7530
7531 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7532
7533 msg->fun = SSD_FUNC_NAND_ERASE;
7534 msg->ctrl_idx = ctrl_idx;
7535 msg->chip_no = flash;
7536 msg->chip_ce = chip;
7537 msg->page_no = page;
7538
7539 ret = ssd_do_request(dev, WRITE, msg, NULL);
7540 ssd_put_dmsg(msg);
7541
7542 return ret;
7543}
7544
7545static int ssd_update_bbt(struct ssd_device *dev, int flash, int ctrl_idx)
7546{
7547 struct ssd_nand_op_msg *msg;
7548 struct ssd_flush_msg *fmsg;
7549 int ret = 0;
7550
7551 ret = ssd_check_flash(dev, flash, 0, ctrl_idx);
7552 if (ret) {
7553 return ret;
7554 }
7555
7556 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7557
7558 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7559 fmsg = (struct ssd_flush_msg *)msg;
7560
7561 fmsg->fun = SSD_FUNC_FLUSH;
7562 fmsg->flag = 0x1;
7563 fmsg->flash = flash;
7564 fmsg->ctrl_idx = ctrl_idx;
7565 } else {
7566 msg->fun = SSD_FUNC_FLUSH;
7567 msg->flag = 0x1;
7568 msg->chip_no = flash;
7569 msg->ctrl_idx = ctrl_idx;
7570 }
7571
7572 ret = ssd_do_request(dev, WRITE, msg, NULL);
7573 ssd_put_dmsg(msg);
7574
7575 return ret;
7576}
7577
7578/* flash controller init state */
7579static int __ssd_check_init_state(struct ssd_device *dev)
7580{
7581 uint32_t *init_state = NULL;
7582 int reg_base, reg_sz;
7583 int max_wait = SSD_INIT_MAX_WAIT;
7584 int init_wait = 0;
7585 int i, j, k;
7586 int ch_start = 0;
7587
7588/*
7589 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7590 ssd_reg32_write(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8, test_data);
7591 read_data = ssd_reg32_read(dev->ctrlp + SSD_CTRL_TEST_REG0 + i * 8);
7592 if (read_data == ~test_data) {
7593 //dev->hw_info.nr_ctrl++;
7594 dev->hw_info.nr_ctrl_map |= 1<<i;
7595 }
7596 }
7597*/
7598
7599/*
7600 read_data = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
7601 j=0;
7602 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7603 if (((read_data>>i) & 0x1) == 0) {
7604 j++;
7605 }
7606 }
7607
7608 if (dev->hw_info.nr_ctrl != j) {
7609 printk(KERN_WARNING "%s: nr_ctrl mismatch: %d %d\n", dev->name, dev->hw_info.nr_ctrl, j);
7610 return -1;
7611 }
7612*/
7613
7614/*
7615 init_state = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
7616 for (j=1; j<dev->hw_info.nr_ctrl;j++) {
7617 if (init_state != ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0 + j*8)) {
7618 printk(KERN_WARNING "SSD_FLASH_INFO_REG[%d], not match\n", j);
7619 return -1;
7620 }
7621 }
7622*/
7623
7624/* init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0);
7625 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7626 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + j*16)) {
7627 printk(KERN_WARNING "SSD_CHIP_INFO_REG Lo [%d], not match\n", j);
7628 return -1;
7629 }
7630 }
7631
7632 init_state = ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8);
7633 for (j=1; j<dev->hw_info.nr_ctrl; j++) {
7634 if (init_state != ssd_reg_read(dev->ctrlp + SSD_CHIP_INFO_REG0 + 8 + j*16)) {
7635 printk(KERN_WARNING "SSD_CHIP_INFO_REG Hi [%d], not match\n", j);
7636 return -1;
7637 }
7638 }
7639*/
7640
7641 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
7642 max_wait = SSD_INIT_MAX_WAIT_V3_2;
7643 }
7644
7645 reg_base = dev->protocol_info.init_state_reg;
7646 reg_sz = dev->protocol_info.init_state_reg_sz;
7647
7648 init_state = (uint32_t *)kmalloc(reg_sz, GFP_KERNEL);
7649 if (!init_state) {
7650 return -ENOMEM;
7651 }
7652
7653 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
7654check_init:
7655 for (j=0, k=0; j<reg_sz; j+=sizeof(uint32_t), k++) {
7656 init_state[k] = ssd_reg32_read(dev->ctrlp + reg_base + j);
7657 }
7658
7659 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
7660 /* just check the last bit, no need to check all channel */
7661 ch_start = dev->hw_info.max_ch - 1;
7662 } else {
7663 ch_start = 0;
7664 }
7665
7666 for (j=0; j<dev->hw_info.nr_chip; j++) {
7667 for (k=ch_start; k<dev->hw_info.max_ch; k++) {
7668 if (test_bit((j*dev->hw_info.max_ch + k), (void *)init_state)) {
7669 continue;
7670 }
7671
7672 init_wait++;
7673 if (init_wait <= max_wait) {
7674 msleep(SSD_INIT_WAIT);
7675 goto check_init;
7676 } else {
7677 if (k < dev->hw_info.nr_ch) {
7678 hio_warn("%s: controller %d chip %d ch %d init failed\n",
7679 dev->name, i, j, k);
7680 } else {
7681 hio_warn("%s: controller %d chip %d init failed\n",
7682 dev->name, i, j);
7683 }
7684
7685 kfree(init_state);
7686 return -1;
7687 }
7688 }
7689 }
7690 reg_base += reg_sz;
7691 }
7692 //printk(KERN_WARNING "%s: init wait %d\n", dev->name, init_wait);
7693
7694 kfree(init_state);
7695 return 0;
7696}
7697
7698static int ssd_check_init_state(struct ssd_device *dev)
7699{
7700 if (mode != SSD_DRV_MODE_STANDARD) {
7701 return 0;
7702 }
7703
7704 return __ssd_check_init_state(dev);
7705}
7706
7707static void ssd_reset_resp_ptr(struct ssd_device *dev);
7708
7709/* reset flash controller etc */
7710static int __ssd_reset(struct ssd_device *dev, int type)
7711{
7712 if (type < SSD_RST_NOINIT || type > SSD_RST_FULL) {
7713 return -EINVAL;
7714 }
7715
7716 mutex_lock(&dev->fw_mutex);
7717
7718 if (type == SSD_RST_NOINIT) { //no init
7719 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET_NOINIT);
7720 } else if (type == SSD_RST_NORMAL) { //reset & init
7721 ssd_reg32_write(dev->ctrlp + SSD_RESET_REG, SSD_RESET);
7722 } else { // full reset
7723 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7724 mutex_unlock(&dev->fw_mutex);
7725 return -EINVAL;
7726 }
7727
7728 ssd_reg32_write(dev->ctrlp + SSD_FULL_RESET_REG, SSD_RESET_FULL);
7729
7730 /* ?? */
7731 ssd_reset_resp_ptr(dev);
7732 }
7733
7734#ifdef SSD_OT_PROTECT
7735 dev->ot_delay = 0;
7736#endif
7737
7738 msleep(1000);
7739
7740 /* xx */
7741 ssd_set_flush_timeout(dev, dev->wmode);
7742
7743 mutex_unlock(&dev->fw_mutex);
7744 ssd_gen_swlog(dev, SSD_LOG_RESET, (uint32_t)type);
7745
7746 return __ssd_check_init_state(dev);
7747}
7748
7749static int ssd_save_md(struct ssd_device *dev)
7750{
7751 struct ssd_nand_op_msg *msg;
7752 int ret = 0;
7753
7754 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7755 return 0;
7756
7757 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7758 return 0;
7759 }
7760
7761 if (!dev->save_md) {
7762 return 0;
7763 }
7764
7765 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7766
7767 msg->fun = SSD_FUNC_FLUSH;
7768 msg->flag = 0x2;
7769 msg->ctrl_idx = 0;
7770 msg->chip_no = 0;
7771
7772 ret = ssd_do_request(dev, WRITE, msg, NULL);
7773 ssd_put_dmsg(msg);
7774
7775 return ret;
7776}
7777
7778static int ssd_barrier_save_md(struct ssd_device *dev)
7779{
7780 struct ssd_nand_op_msg *msg;
7781 int ret = 0;
7782
7783 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7784 return 0;
7785
7786 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
7787 return 0;
7788 }
7789
7790 if (!dev->save_md) {
7791 return 0;
7792 }
7793
7794 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7795
7796 msg->fun = SSD_FUNC_FLUSH;
7797 msg->flag = 0x2;
7798 msg->ctrl_idx = 0;
7799 msg->chip_no = 0;
7800
7801 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7802 ssd_put_dmsg(msg);
7803
7804 return ret;
7805}
7806
7807static int ssd_flush(struct ssd_device *dev)
7808{
7809 struct ssd_nand_op_msg *msg;
7810 struct ssd_flush_msg *fmsg;
7811 int ret = 0;
7812
7813 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7814 return 0;
7815
7816 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7817
7818 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7819 fmsg = (struct ssd_flush_msg *)msg;
7820
7821 fmsg->fun = SSD_FUNC_FLUSH;
7822 fmsg->flag = 0;
7823 fmsg->ctrl_idx = 0;
7824 fmsg->flash = 0;
7825 } else {
7826 msg->fun = SSD_FUNC_FLUSH;
7827 msg->flag = 0;
7828 msg->ctrl_idx = 0;
7829 msg->chip_no = 0;
7830 }
7831
7832 ret = ssd_do_request(dev, WRITE, msg, NULL);
7833 ssd_put_dmsg(msg);
7834
7835 return ret;
7836}
7837
7838static int ssd_barrier_flush(struct ssd_device *dev)
7839{
7840 struct ssd_nand_op_msg *msg;
7841 struct ssd_flush_msg *fmsg;
7842 int ret = 0;
7843
7844 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
7845 return 0;
7846
7847 msg = (struct ssd_nand_op_msg *)ssd_get_dmsg(dev);
7848
7849 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
7850 fmsg = (struct ssd_flush_msg *)msg;
7851
7852 fmsg->fun = SSD_FUNC_FLUSH;
7853 fmsg->flag = 0;
7854 fmsg->ctrl_idx = 0;
7855 fmsg->flash = 0;
7856 } else {
7857 msg->fun = SSD_FUNC_FLUSH;
7858 msg->flag = 0;
7859 msg->ctrl_idx = 0;
7860 msg->chip_no = 0;
7861 }
7862
7863 ret = ssd_do_barrier_request(dev, WRITE, msg, NULL);
7864 ssd_put_dmsg(msg);
7865
7866 return ret;
7867}
7868
7869#define SSD_WMODE_BUFFER_TIMEOUT 0x00c82710
7870#define SSD_WMODE_BUFFER_EX_TIMEOUT 0x000500c8
7871#define SSD_WMODE_FUA_TIMEOUT 0x000503E8
7872static void ssd_set_flush_timeout(struct ssd_device *dev, int m)
7873{
7874 uint32_t to;
7875 uint32_t val = 0;
7876
7877 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
7878 return;
7879 }
7880
7881 switch(m) {
7882 case SSD_WMODE_BUFFER:
7883 to = SSD_WMODE_BUFFER_TIMEOUT;
7884 break;
7885 case SSD_WMODE_BUFFER_EX:
7886 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_1) {
7887 to = SSD_WMODE_BUFFER_EX_TIMEOUT;
7888 } else {
7889 to = SSD_WMODE_BUFFER_TIMEOUT;
7890 }
7891 break;
7892 case SSD_WMODE_FUA:
7893 to = SSD_WMODE_FUA_TIMEOUT;
7894 break;
7895 default:
7896 return;
7897 }
7898
7899 val = (((uint32_t)((uint32_t)m & 0x3) << 28) | to);
7900
7901 ssd_reg32_write(dev->ctrlp + SSD_FLUSH_TIMEOUT_REG, val);
7902}
7903
7904static int ssd_do_switch_wmode(struct ssd_device *dev, int m)
7905{
7906 int ret = 0;
7907
7908 ret = ssd_barrier_start(dev);
7909 if (ret) {
7910 goto out;
7911 }
7912
7913 ret = ssd_barrier_flush(dev);
7914 if (ret) {
7915 goto out_barrier_end;
7916 }
7917
7918 /* set contoller flush timeout */
7919 ssd_set_flush_timeout(dev, m);
7920
7921 dev->wmode = m;
7922 mb();
7923
7924out_barrier_end:
7925 ssd_barrier_end(dev);
7926out:
7927 return ret;
7928}
7929
7930static int ssd_switch_wmode(struct ssd_device *dev, int m)
7931{
7932 int default_wmode;
7933 int next_wmode;
7934 int ret = 0;
7935
7936 if (!test_bit(SSD_ONLINE, &dev->state)) {
7937 return -ENODEV;
7938 }
7939
7940 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7941 default_wmode = SSD_WMODE_BUFFER;
7942 } else {
7943 default_wmode = SSD_WMODE_BUFFER_EX;
7944 }
7945
7946 if (SSD_WMODE_AUTO == m) {
7947 /* battery fault ? */
7948 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7949 next_wmode = SSD_WMODE_FUA;
7950 } else {
7951 next_wmode = default_wmode;
7952 }
7953 } else if (SSD_WMODE_DEFAULT == m) {
7954 next_wmode = default_wmode;
7955 } else {
7956 next_wmode = m;
7957 }
7958
7959 if (next_wmode != dev->wmode) {
7960 hio_warn("%s: switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7961 ret = ssd_do_switch_wmode(dev, next_wmode);
7962 if (ret) {
7963 hio_err("%s: can not switch write mode (%d -> %d)\n", dev->name, dev->wmode, next_wmode);
7964 }
7965 }
7966
7967 return ret;
7968}
7969
7970static int ssd_init_wmode(struct ssd_device *dev)
7971{
7972 int default_wmode;
7973 int ret = 0;
7974
7975 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
7976 default_wmode = SSD_WMODE_BUFFER;
7977 } else {
7978 default_wmode = SSD_WMODE_BUFFER_EX;
7979 }
7980
7981 /* dummy mode */
7982 if (SSD_WMODE_AUTO == dev->user_wmode) {
7983 /* battery fault ? */
7984 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
7985 dev->wmode = SSD_WMODE_FUA;
7986 } else {
7987 dev->wmode = default_wmode;
7988 }
7989 } else if (SSD_WMODE_DEFAULT == dev->user_wmode) {
7990 dev->wmode = default_wmode;
7991 } else {
7992 dev->wmode = dev->user_wmode;
7993 }
7994 ssd_set_flush_timeout(dev, dev->wmode);
7995
7996 return ret;
7997}
7998
7999static int __ssd_set_wmode(struct ssd_device *dev, int m)
8000{
8001 int ret = 0;
8002
8003 /* not support old fw*/
8004 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_1) {
8005 ret = -EOPNOTSUPP;
8006 goto out;
8007 }
8008
8009 if (m < SSD_WMODE_BUFFER || m > SSD_WMODE_DEFAULT) {
8010 ret = -EINVAL;
8011 goto out;
8012 }
8013
8014 ssd_gen_swlog(dev, SSD_LOG_SET_WMODE, m);
8015
8016 dev->user_wmode = m;
8017
8018 ret = ssd_switch_wmode(dev, dev->user_wmode);
8019 if (ret) {
8020 goto out;
8021 }
8022
8023out:
8024 return ret;
8025}
8026
8027int ssd_set_wmode(struct block_device *bdev, int m)
8028{
8029 struct ssd_device *dev;
8030
8031 if (!bdev || !(bdev->bd_disk)) {
8032 return -EINVAL;
8033 }
8034
8035 dev = bdev->bd_disk->private_data;
8036
8037 return __ssd_set_wmode(dev, m);
8038}
8039
8040static int ssd_do_reset(struct ssd_device *dev)
8041{
8042 int ret = 0;
8043
8044 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8045 return 0;
8046 }
8047
8048 ssd_stop_workq(dev);
8049
8050 ret = ssd_barrier_start(dev);
8051 if (ret) {
8052 goto out;
8053 }
8054
8055 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8056 /* old reset */
8057 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8058 } else {
8059 /* full reset */
8060 //ret = __ssd_reset(dev, SSD_RST_FULL);
8061 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8062 }
8063 if (ret) {
8064 goto out_barrier_end;
8065 }
8066
8067out_barrier_end:
8068 ssd_barrier_end(dev);
8069out:
8070 ssd_start_workq(dev);
8071 test_and_clear_bit(SSD_RESETING, &dev->state);
8072 return ret;
8073}
8074
8075static int ssd_full_reset(struct ssd_device *dev)
8076{
8077 int ret = 0;
8078
8079 if (test_and_set_bit(SSD_RESETING, &dev->state)) {
8080 return 0;
8081 }
8082
8083 ssd_stop_workq(dev);
8084
8085 ret = ssd_barrier_start(dev);
8086 if (ret) {
8087 goto out;
8088 }
8089
8090 ret = ssd_barrier_flush(dev);
8091 if (ret) {
8092 goto out_barrier_end;
8093 }
8094
8095 ret = ssd_barrier_save_md(dev);
8096 if (ret) {
8097 goto out_barrier_end;
8098 }
8099
8100 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
8101 /* old reset */
8102 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8103 } else {
8104 /* full reset */
8105 //ret = __ssd_reset(dev, SSD_RST_FULL);
8106 ret = __ssd_reset(dev, SSD_RST_NORMAL);
8107 }
8108 if (ret) {
8109 goto out_barrier_end;
8110 }
8111
8112out_barrier_end:
8113 ssd_barrier_end(dev);
8114out:
8115 ssd_start_workq(dev);
8116 test_and_clear_bit(SSD_RESETING, &dev->state);
8117 return ret;
8118}
8119
8120int ssd_reset(struct block_device *bdev)
8121{
8122 struct ssd_device *dev;
8123
8124 if (!bdev || !(bdev->bd_disk)) {
8125 return -EINVAL;
8126 }
8127
8128 dev = bdev->bd_disk->private_data;
8129
8130 return ssd_full_reset(dev);
8131}
8132
8133#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
8134static int ssd_issue_flush_fn(struct request_queue *q, struct gendisk *disk,
8135 sector_t *error_sector)
8136{
8137 struct ssd_device *dev = q->queuedata;
8138
8139 return ssd_flush(dev);
8140}
8141#endif
8142
8143void ssd_submit_pbio(struct request_queue *q, struct bio *bio)
8144{
8145 struct ssd_device *dev = q->queuedata;
8146#ifdef SSD_QUEUE_PBIO
8147 int ret = -EBUSY;
8148#endif
8149
8150 if (!test_bit(SSD_ONLINE, &dev->state)) {
8151#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8152 bio_endio(bio, -ENODEV);
8153#else
8154 bio_endio(bio, bio->bi_size, -ENODEV);
8155#endif
8156 goto out;
8157 }
8158
8159#ifdef SSD_DEBUG_ERR
8160 if (atomic_read(&dev->tocnt)) {
8161 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8162#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8163 bio_endio(bio, -EIO);
8164#else
8165 bio_endio(bio, bio->bi_size, -EIO);
8166#endif
8167 goto out;
8168 }
8169#endif
8170
8171#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8172 if (unlikely(bio_barrier(bio))) {
8173#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8174 bio_endio(bio, -EOPNOTSUPP);
8175#else
8176 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8177#endif
8178 goto out;
8179 }
8180#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8181 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8182#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8183 bio_endio(bio, -EOPNOTSUPP);
8184#else
8185 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8186#endif
8187 goto out;
8188 }
8189#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8190 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8191#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8192 bio_endio(bio, -EOPNOTSUPP);
8193#else
8194 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8195#endif
8196 goto out;
8197 }
8198#else
8199 //xx
8200 if (unlikely(bio->bi_rw & REQ_FUA)) {
8201#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8202 bio_endio(bio, -EOPNOTSUPP);
8203#else
8204 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8205#endif
8206 goto out;
8207 }
8208#endif
8209
8210 if (unlikely(dev->readonly && bio_data_dir(bio) == WRITE)) {
8211#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8212 bio_endio(bio, -EROFS);
8213#else
8214 bio_endio(bio, bio->bi_size, -EROFS);
8215#endif
8216 goto out;
8217 }
8218
8219#ifdef SSD_QUEUE_PBIO
8220 if (0 == atomic_read(&dev->in_sendq)) {
8221 ret = __ssd_submit_pbio(dev, bio, 0);
8222 }
8223
8224 if (ret) {
8225 (void)test_and_set_bit(BIO_SSD_PBIO, &bio->bi_flags);
8226 ssd_queue_bio(dev, bio);
8227 }
8228#else
8229 __ssd_submit_pbio(dev, bio, 1);
8230#endif
8231
8232out:
8233 return;
8234}
8235
8236#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
8237static int ssd_make_request(struct request_queue *q, struct bio *bio)
8238#else
8239static void ssd_make_request(struct request_queue *q, struct bio *bio)
8240#endif
8241{
8242 struct ssd_device *dev = q->queuedata;
8243 int ret = -EBUSY;
8244
8245 if (!test_bit(SSD_ONLINE, &dev->state)) {
8246#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8247 bio_endio(bio, -ENODEV);
8248#else
8249 bio_endio(bio, bio->bi_size, -ENODEV);
8250#endif
8251 goto out;
8252 }
8253
8254#ifdef SSD_DEBUG_ERR
8255 if (atomic_read(&dev->tocnt)) {
8256 hio_warn("%s: IO rejected because of IO timeout!\n", dev->name);
8257#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8258 bio_endio(bio, -EIO);
8259#else
8260 bio_endio(bio, bio->bi_size, -EIO);
8261#endif
8262 goto out;
8263 }
8264#endif
8265
8266#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32))
8267 if (unlikely(bio_barrier(bio))) {
8268#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8269 bio_endio(bio, -EOPNOTSUPP);
8270#else
8271 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8272#endif
8273 goto out;
8274 }
8275#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36))
8276 if (unlikely(bio_rw_flagged(bio, BIO_RW_BARRIER))) {
8277#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8278 bio_endio(bio, -EOPNOTSUPP);
8279#else
8280 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8281#endif
8282 goto out;
8283 }
8284#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37))
8285 if (unlikely(bio->bi_rw & REQ_HARDBARRIER)) {
8286#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8287 bio_endio(bio, -EOPNOTSUPP);
8288#else
8289 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8290#endif
8291 goto out;
8292 }
8293#else
8294 //xx
8295 if (unlikely(bio->bi_rw & REQ_FUA)) {
8296#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24))
8297 bio_endio(bio, -EOPNOTSUPP);
8298#else
8299 bio_endio(bio, bio->bi_size, -EOPNOTSUPP);
8300#endif
8301 goto out;
8302 }
8303
8304 /* writeback_cache_control.txt: REQ_FLUSH requests without data can be completed successfully without doing any work */
8305 if (unlikely((bio->bi_rw & REQ_FLUSH) && !bio_sectors(bio))) {
8306 bio_endio(bio, 0);
8307 goto out;
8308 }
8309
8310#endif
8311
8312 if (0 == atomic_read(&dev->in_sendq)) {
8313 ret = ssd_submit_bio(dev, bio, 0);
8314 }
8315
8316 if (ret) {
8317 ssd_queue_bio(dev, bio);
8318 }
8319
8320out:
8321#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0))
8322 return 0;
8323#else
8324 return;
8325#endif
8326}
8327
8328#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
8329static int ssd_block_getgeo(struct block_device *bdev, struct hd_geometry *geo)
8330{
8331 struct ssd_device *dev;
8332
8333 if (!bdev) {
8334 return -EINVAL;
8335 }
8336
8337 dev = bdev->bd_disk->private_data;
8338 if (!dev) {
8339 return -EINVAL;
8340 }
8341
8342 geo->heads = 4;
8343 geo->sectors = 16;
8344 geo->cylinders = (dev->hw_info.size & ~0x3f) >> 6;
8345 return 0;
8346}
8347#endif
8348
8349static void ssd_cleanup_blkdev(struct ssd_device *dev);
8350static int ssd_init_blkdev(struct ssd_device *dev);
8351static int ssd_ioctl_common(struct ssd_device *dev, unsigned int cmd, unsigned long arg)
8352{
8353 void __user *argp = (void __user *)arg;
8354 void __user *buf = NULL;
8355 void *kbuf = NULL;
8356 int ret = 0;
8357
8358 switch (cmd) {
8359 case SSD_CMD_GET_PROTOCOL_INFO:
8360 if (copy_to_user(argp, &dev->protocol_info, sizeof(struct ssd_protocol_info))) {
8361 hio_warn("%s: copy_to_user: failed\n", dev->name);
8362 ret = -EFAULT;
8363 break;
8364 }
8365 break;
8366
8367 case SSD_CMD_GET_HW_INFO:
8368 if (copy_to_user(argp, &dev->hw_info, sizeof(struct ssd_hw_info))) {
8369 hio_warn("%s: copy_to_user: failed\n", dev->name);
8370 ret = -EFAULT;
8371 break;
8372 }
8373 break;
8374
8375 case SSD_CMD_GET_ROM_INFO:
8376 if (copy_to_user(argp, &dev->rom_info, sizeof(struct ssd_rom_info))) {
8377 hio_warn("%s: copy_to_user: failed\n", dev->name);
8378 ret = -EFAULT;
8379 break;
8380 }
8381 break;
8382
8383 case SSD_CMD_GET_SMART: {
8384 struct ssd_smart smart;
8385 int i;
8386
8387 memcpy(&smart, &dev->smart, sizeof(struct ssd_smart));
8388
8389 mutex_lock(&dev->gd_mutex);
8390 ssd_update_smart(dev, &smart);
8391 mutex_unlock(&dev->gd_mutex);
8392
8393 /* combine the volatile log info */
8394 if (dev->log_info.nr_log) {
8395 for (i=0; i<SSD_LOG_NR_LEVEL; i++) {
8396 smart.log_info.stat[i] += dev->log_info.stat[i];
8397 }
8398 }
8399
8400 if (copy_to_user(argp, &smart, sizeof(struct ssd_smart))) {
8401 hio_warn("%s: copy_to_user: failed\n", dev->name);
8402 ret = -EFAULT;
8403 break;
8404 }
8405
8406 break;
8407 }
8408
8409 case SSD_CMD_GET_IDX:
8410 if (copy_to_user(argp, &dev->idx, sizeof(int))) {
8411 hio_warn("%s: copy_to_user: failed\n", dev->name);
8412 ret = -EFAULT;
8413 break;
8414 }
8415 break;
8416
8417 case SSD_CMD_GET_AMOUNT: {
8418 int nr_ssd = atomic_read(&ssd_nr);
8419 if (copy_to_user(argp, &nr_ssd, sizeof(int))) {
8420 hio_warn("%s: copy_to_user: failed\n", dev->name);
8421 ret = -EFAULT;
8422 break;
8423 }
8424 break;
8425 }
8426
8427 case SSD_CMD_GET_TO_INFO: {
8428 int tocnt = atomic_read(&dev->tocnt);
8429
8430 if (copy_to_user(argp, &tocnt, sizeof(int))) {
8431 hio_warn("%s: copy_to_user: failed\n", dev->name);
8432 ret = -EFAULT;
8433 break;
8434 }
8435 break;
8436 }
8437
8438 case SSD_CMD_GET_DRV_VER: {
8439 char ver[] = DRIVER_VERSION;
8440 int len = sizeof(ver);
8441
8442 if (len > (DRIVER_VERSION_LEN - 1)) {
8443 len = (DRIVER_VERSION_LEN - 1);
8444 }
8445 if (copy_to_user(argp, ver, len)) {
8446 hio_warn("%s: copy_to_user: failed\n", dev->name);
8447 ret = -EFAULT;
8448 break;
8449 }
8450 break;
8451 }
8452
8453 case SSD_CMD_GET_BBACC_INFO: {
8454 struct ssd_acc_info acc;
8455
8456 mutex_lock(&dev->fw_mutex);
8457 ret = ssd_bb_acc(dev, &acc);
8458 mutex_unlock(&dev->fw_mutex);
8459 if (ret) {
8460 break;
8461 }
8462
8463 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8464 hio_warn("%s: copy_to_user: failed\n", dev->name);
8465 ret = -EFAULT;
8466 break;
8467 }
8468 break;
8469 }
8470
8471 case SSD_CMD_GET_ECACC_INFO: {
8472 struct ssd_acc_info acc;
8473
8474 mutex_lock(&dev->fw_mutex);
8475 ret = ssd_ec_acc(dev, &acc);
8476 mutex_unlock(&dev->fw_mutex);
8477 if (ret) {
8478 break;
8479 }
8480
8481 if (copy_to_user(argp, &acc, sizeof(struct ssd_acc_info))) {
8482 hio_warn("%s: copy_to_user: failed\n", dev->name);
8483 ret = -EFAULT;
8484 break;
8485 }
8486 break;
8487 }
8488
8489 case SSD_CMD_GET_HW_INFO_EXT:
8490 if (copy_to_user(argp, &dev->hw_info_ext, sizeof(struct ssd_hw_info_extend))) {
8491 hio_warn("%s: copy_to_user: failed\n", dev->name);
8492 ret = -EFAULT;
8493 break;
8494 }
8495 break;
8496
8497 case SSD_CMD_REG_READ: {
8498 struct ssd_reg_op_info reg_info;
8499
8500 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8501 hio_warn("%s: copy_from_user: failed\n", dev->name);
8502 ret = -EFAULT;
8503 break;
8504 }
8505
8506 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8507 ret = -EINVAL;
8508 break;
8509 }
8510
8511 reg_info.value = ssd_reg32_read(dev->ctrlp + reg_info.offset);
8512 if (copy_to_user(argp, &reg_info, sizeof(struct ssd_reg_op_info))) {
8513 hio_warn("%s: copy_to_user: failed\n", dev->name);
8514 ret = -EFAULT;
8515 break;
8516 }
8517
8518 break;
8519 }
8520
8521 case SSD_CMD_REG_WRITE: {
8522 struct ssd_reg_op_info reg_info;
8523
8524 if (copy_from_user(&reg_info, argp, sizeof(struct ssd_reg_op_info))) {
8525 hio_warn("%s: copy_from_user: failed\n", dev->name);
8526 ret = -EFAULT;
8527 break;
8528 }
8529
8530 if (reg_info.offset > dev->mmio_len-sizeof(uint32_t)) {
8531 ret = -EINVAL;
8532 break;
8533 }
8534
8535 ssd_reg32_write(dev->ctrlp + reg_info.offset, reg_info.value);
8536
8537 break;
8538 }
8539
8540 case SSD_CMD_SPI_READ: {
8541 struct ssd_spi_op_info spi_info;
8542 uint32_t off, size;
8543
8544 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8545 hio_warn("%s: copy_from_user: failed\n", dev->name);
8546 ret = -EFAULT;
8547 break;
8548 }
8549
8550 off = spi_info.off;
8551 size = spi_info.len;
8552 buf = spi_info.buf;
8553
8554 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8555 ret = -EINVAL;
8556 break;
8557 }
8558
8559 kbuf = kmalloc(size, GFP_KERNEL);
8560 if (!kbuf) {
8561 ret = -ENOMEM;
8562 break;
8563 }
8564
8565 ret = ssd_spi_page_read(dev, kbuf, off, size);
8566 if (ret) {
8567 kfree(kbuf);
8568 break;
8569 }
8570
8571 if (copy_to_user(buf, kbuf, size)) {
8572 hio_warn("%s: copy_to_user: failed\n", dev->name);
8573 kfree(kbuf);
8574 ret = -EFAULT;
8575 break;
8576 }
8577
8578 kfree(kbuf);
8579
8580 break;
8581 }
8582
8583 case SSD_CMD_SPI_WRITE: {
8584 struct ssd_spi_op_info spi_info;
8585 uint32_t off, size;
8586
8587 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8588 hio_warn("%s: copy_from_user: failed\n", dev->name);
8589 ret = -EFAULT;
8590 break;
8591 }
8592
8593 off = spi_info.off;
8594 size = spi_info.len;
8595 buf = spi_info.buf;
8596
8597 if (size > dev->rom_info.size || 0 == size || (off + size) > dev->rom_info.size) {
8598 ret = -EINVAL;
8599 break;
8600 }
8601
8602 kbuf = kmalloc(size, GFP_KERNEL);
8603 if (!kbuf) {
8604 ret = -ENOMEM;
8605 break;
8606 }
8607
8608 if (copy_from_user(kbuf, buf, size)) {
8609 hio_warn("%s: copy_from_user: failed\n", dev->name);
8610 kfree(kbuf);
8611 ret = -EFAULT;
8612 break;
8613 }
8614
8615 ret = ssd_spi_page_write(dev, kbuf, off, size);
8616 if (ret) {
8617 kfree(kbuf);
8618 break;
8619 }
8620
8621 kfree(kbuf);
8622
8623 break;
8624 }
8625
8626 case SSD_CMD_SPI_ERASE: {
8627 struct ssd_spi_op_info spi_info;
8628 uint32_t off;
8629
8630 if (copy_from_user(&spi_info, argp, sizeof(struct ssd_spi_op_info))) {
8631 hio_warn("%s: copy_from_user: failed\n", dev->name);
8632 ret = -EFAULT;
8633 break;
8634 }
8635
8636 off = spi_info.off;
8637
8638 if ((off + dev->rom_info.block_size) > dev->rom_info.size) {
8639 ret = -EINVAL;
8640 break;
8641 }
8642
8643 ret = ssd_spi_block_erase(dev, off);
8644 if (ret) {
8645 break;
8646 }
8647
8648 break;
8649 }
8650
8651 case SSD_CMD_I2C_READ: {
8652 struct ssd_i2c_op_info i2c_info;
8653 uint8_t saddr;
8654 uint8_t rsize;
8655
8656 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8657 hio_warn("%s: copy_from_user: failed\n", dev->name);
8658 ret = -EFAULT;
8659 break;
8660 }
8661
8662 saddr = i2c_info.saddr;
8663 rsize = i2c_info.rsize;
8664 buf = i2c_info.rbuf;
8665
8666 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8667 ret = -EINVAL;
8668 break;
8669 }
8670
8671 kbuf = kmalloc(rsize, GFP_KERNEL);
8672 if (!kbuf) {
8673 ret = -ENOMEM;
8674 break;
8675 }
8676
8677 ret = ssd_i2c_read(dev, saddr, rsize, kbuf);
8678 if (ret) {
8679 kfree(kbuf);
8680 break;
8681 }
8682
8683 if (copy_to_user(buf, kbuf, rsize)) {
8684 hio_warn("%s: copy_to_user: failed\n", dev->name);
8685 kfree(kbuf);
8686 ret = -EFAULT;
8687 break;
8688 }
8689
8690 kfree(kbuf);
8691
8692 break;
8693 }
8694
8695 case SSD_CMD_I2C_WRITE: {
8696 struct ssd_i2c_op_info i2c_info;
8697 uint8_t saddr;
8698 uint8_t wsize;
8699
8700 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8701 hio_warn("%s: copy_from_user: failed\n", dev->name);
8702 ret = -EFAULT;
8703 break;
8704 }
8705
8706 saddr = i2c_info.saddr;
8707 wsize = i2c_info.wsize;
8708 buf = i2c_info.wbuf;
8709
8710 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8711 ret = -EINVAL;
8712 break;
8713 }
8714
8715 kbuf = kmalloc(wsize, GFP_KERNEL);
8716 if (!kbuf) {
8717 ret = -ENOMEM;
8718 break;
8719 }
8720
8721 if (copy_from_user(kbuf, buf, wsize)) {
8722 hio_warn("%s: copy_from_user: failed\n", dev->name);
8723 kfree(kbuf);
8724 ret = -EFAULT;
8725 break;
8726 }
8727
8728 ret = ssd_i2c_write(dev, saddr, wsize, kbuf);
8729 if (ret) {
8730 kfree(kbuf);
8731 break;
8732 }
8733
8734 kfree(kbuf);
8735
8736 break;
8737 }
8738
8739 case SSD_CMD_I2C_WRITE_READ: {
8740 struct ssd_i2c_op_info i2c_info;
8741 uint8_t saddr;
8742 uint8_t wsize;
8743 uint8_t rsize;
8744 uint8_t size;
8745
8746 if (copy_from_user(&i2c_info, argp, sizeof(struct ssd_i2c_op_info))) {
8747 hio_warn("%s: copy_from_user: failed\n", dev->name);
8748 ret = -EFAULT;
8749 break;
8750 }
8751
8752 saddr = i2c_info.saddr;
8753 wsize = i2c_info.wsize;
8754 rsize = i2c_info.rsize;
8755 buf = i2c_info.wbuf;
8756
8757 if (wsize <= 0 || wsize > SSD_I2C_MAX_DATA) {
8758 ret = -EINVAL;
8759 break;
8760 }
8761
8762 if (rsize <= 0 || rsize > SSD_I2C_MAX_DATA) {
8763 ret = -EINVAL;
8764 break;
8765 }
8766
8767 size = wsize + rsize;
8768
8769 kbuf = kmalloc(size, GFP_KERNEL);
8770 if (!kbuf) {
8771 ret = -ENOMEM;
8772 break;
8773 }
8774
8775 if (copy_from_user((kbuf + rsize), buf, wsize)) {
8776 hio_warn("%s: copy_from_user: failed\n", dev->name);
8777 kfree(kbuf);
8778 ret = -EFAULT;
8779 break;
8780 }
8781
8782 buf = i2c_info.rbuf;
8783
8784 ret = ssd_i2c_write_read(dev, saddr, wsize, (kbuf + rsize), rsize, kbuf);
8785 if (ret) {
8786 kfree(kbuf);
8787 break;
8788 }
8789
8790 if (copy_to_user(buf, kbuf, rsize)) {
8791 hio_warn("%s: copy_to_user: failed\n", dev->name);
8792 kfree(kbuf);
8793 ret = -EFAULT;
8794 break;
8795 }
8796
8797 kfree(kbuf);
8798
8799 break;
8800 }
8801
8802 case SSD_CMD_SMBUS_SEND_BYTE: {
8803 struct ssd_smbus_op_info smbus_info;
8804 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8805 uint8_t saddr;
8806 uint8_t size;
8807
8808 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8809 hio_warn("%s: copy_from_user: failed\n", dev->name);
8810 ret = -EFAULT;
8811 break;
8812 }
8813
8814 saddr = smbus_info.saddr;
8815 buf = smbus_info.buf;
8816 size = 1;
8817
8818 if (copy_from_user(smb_data, buf, size)) {
8819 hio_warn("%s: copy_from_user: failed\n", dev->name);
8820 ret = -EFAULT;
8821 break;
8822 }
8823
8824 ret = ssd_smbus_send_byte(dev, saddr, smb_data);
8825 if (ret) {
8826 break;
8827 }
8828
8829 break;
8830 }
8831
8832 case SSD_CMD_SMBUS_RECEIVE_BYTE: {
8833 struct ssd_smbus_op_info smbus_info;
8834 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8835 uint8_t saddr;
8836 uint8_t size;
8837
8838 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8839 hio_warn("%s: copy_from_user: failed\n", dev->name);
8840 ret = -EFAULT;
8841 break;
8842 }
8843
8844 saddr = smbus_info.saddr;
8845 buf = smbus_info.buf;
8846 size = 1;
8847
8848 ret = ssd_smbus_receive_byte(dev, saddr, smb_data);
8849 if (ret) {
8850 break;
8851 }
8852
8853 if (copy_to_user(buf, smb_data, size)) {
8854 hio_warn("%s: copy_to_user: failed\n", dev->name);
8855 ret = -EFAULT;
8856 break;
8857 }
8858
8859 break;
8860 }
8861
8862 case SSD_CMD_SMBUS_WRITE_BYTE: {
8863 struct ssd_smbus_op_info smbus_info;
8864 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8865 uint8_t saddr;
8866 uint8_t command;
8867 uint8_t size;
8868
8869 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8870 hio_warn("%s: copy_from_user: failed\n", dev->name);
8871 ret = -EFAULT;
8872 break;
8873 }
8874
8875 saddr = smbus_info.saddr;
8876 command = smbus_info.cmd;
8877 buf = smbus_info.buf;
8878 size = 1;
8879
8880 if (copy_from_user(smb_data, buf, size)) {
8881 hio_warn("%s: copy_from_user: failed\n", dev->name);
8882 ret = -EFAULT;
8883 break;
8884 }
8885
8886 ret = ssd_smbus_write_byte(dev, saddr, command, smb_data);
8887 if (ret) {
8888 break;
8889 }
8890
8891 break;
8892 }
8893
8894 case SSD_CMD_SMBUS_READ_BYTE: {
8895 struct ssd_smbus_op_info smbus_info;
8896 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8897 uint8_t saddr;
8898 uint8_t command;
8899 uint8_t size;
8900
8901 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8902 hio_warn("%s: copy_from_user: failed\n", dev->name);
8903 ret = -EFAULT;
8904 break;
8905 }
8906
8907 saddr = smbus_info.saddr;
8908 command = smbus_info.cmd;
8909 buf = smbus_info.buf;
8910 size = 1;
8911
8912 ret = ssd_smbus_read_byte(dev, saddr, command, smb_data);
8913 if (ret) {
8914 break;
8915 }
8916
8917 if (copy_to_user(buf, smb_data, size)) {
8918 hio_warn("%s: copy_to_user: failed\n", dev->name);
8919 ret = -EFAULT;
8920 break;
8921 }
8922
8923 break;
8924 }
8925
8926 case SSD_CMD_SMBUS_WRITE_WORD: {
8927 struct ssd_smbus_op_info smbus_info;
8928 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8929 uint8_t saddr;
8930 uint8_t command;
8931 uint8_t size;
8932
8933 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8934 hio_warn("%s: copy_from_user: failed\n", dev->name);
8935 ret = -EFAULT;
8936 break;
8937 }
8938
8939 saddr = smbus_info.saddr;
8940 command = smbus_info.cmd;
8941 buf = smbus_info.buf;
8942 size = 2;
8943
8944 if (copy_from_user(smb_data, buf, size)) {
8945 hio_warn("%s: copy_from_user: failed\n", dev->name);
8946 ret = -EFAULT;
8947 break;
8948 }
8949
8950 ret = ssd_smbus_write_word(dev, saddr, command, smb_data);
8951 if (ret) {
8952 break;
8953 }
8954
8955 break;
8956 }
8957
8958 case SSD_CMD_SMBUS_READ_WORD: {
8959 struct ssd_smbus_op_info smbus_info;
8960 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8961 uint8_t saddr;
8962 uint8_t command;
8963 uint8_t size;
8964
8965 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8966 hio_warn("%s: copy_from_user: failed\n", dev->name);
8967 ret = -EFAULT;
8968 break;
8969 }
8970
8971 saddr = smbus_info.saddr;
8972 command = smbus_info.cmd;
8973 buf = smbus_info.buf;
8974 size = 2;
8975
8976 ret = ssd_smbus_read_word(dev, saddr, command, smb_data);
8977 if (ret) {
8978 break;
8979 }
8980
8981 if (copy_to_user(buf, smb_data, size)) {
8982 hio_warn("%s: copy_to_user: failed\n", dev->name);
8983 ret = -EFAULT;
8984 break;
8985 }
8986
8987 break;
8988 }
8989
8990 case SSD_CMD_SMBUS_WRITE_BLOCK: {
8991 struct ssd_smbus_op_info smbus_info;
8992 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
8993 uint8_t saddr;
8994 uint8_t command;
8995 uint8_t size;
8996
8997 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
8998 hio_warn("%s: copy_from_user: failed\n", dev->name);
8999 ret = -EFAULT;
9000 break;
9001 }
9002
9003 saddr = smbus_info.saddr;
9004 command = smbus_info.cmd;
9005 buf = smbus_info.buf;
9006 size = smbus_info.size;
9007
9008 if (size > SSD_SMBUS_BLOCK_MAX) {
9009 ret = -EINVAL;
9010 break;
9011 }
9012
9013 if (copy_from_user(smb_data, buf, size)) {
9014 hio_warn("%s: copy_from_user: failed\n", dev->name);
9015 ret = -EFAULT;
9016 break;
9017 }
9018
9019 ret = ssd_smbus_write_block(dev, saddr, command, size, smb_data);
9020 if (ret) {
9021 break;
9022 }
9023
9024 break;
9025 }
9026
9027 case SSD_CMD_SMBUS_READ_BLOCK: {
9028 struct ssd_smbus_op_info smbus_info;
9029 uint8_t smb_data[SSD_SMBUS_BLOCK_MAX];
9030 uint8_t saddr;
9031 uint8_t command;
9032 uint8_t size;
9033
9034 if (copy_from_user(&smbus_info, argp, sizeof(struct ssd_smbus_op_info))) {
9035 hio_warn("%s: copy_from_user: failed\n", dev->name);
9036 ret = -EFAULT;
9037 break;
9038 }
9039
9040 saddr = smbus_info.saddr;
9041 command = smbus_info.cmd;
9042 buf = smbus_info.buf;
9043 size = smbus_info.size;
9044
9045 if (size > SSD_SMBUS_BLOCK_MAX) {
9046 ret = -EINVAL;
9047 break;
9048 }
9049
9050 ret = ssd_smbus_read_block(dev, saddr, command, size, smb_data);
9051 if (ret) {
9052 break;
9053 }
9054
9055 if (copy_to_user(buf, smb_data, size)) {
9056 hio_warn("%s: copy_to_user: failed\n", dev->name);
9057 ret = -EFAULT;
9058 break;
9059 }
9060
9061 break;
9062 }
9063
9064 case SSD_CMD_BM_GET_VER: {
9065 uint16_t ver;
9066
9067 ret = ssd_bm_get_version(dev, &ver);
9068 if (ret) {
9069 break;
9070 }
9071
9072 if (copy_to_user(argp, &ver, sizeof(uint16_t))) {
9073 hio_warn("%s: copy_to_user: failed\n", dev->name);
9074 ret = -EFAULT;
9075 break;
9076 }
9077
9078 break;
9079 }
9080
9081 case SSD_CMD_BM_GET_NR_CAP: {
9082 int nr_cap;
9083
9084 ret = ssd_bm_nr_cap(dev, &nr_cap);
9085 if (ret) {
9086 break;
9087 }
9088
9089 if (copy_to_user(argp, &nr_cap, sizeof(int))) {
9090 hio_warn("%s: copy_to_user: failed\n", dev->name);
9091 ret = -EFAULT;
9092 break;
9093 }
9094
9095 break;
9096 }
9097
9098 case SSD_CMD_BM_CAP_LEARNING: {
9099 ret = ssd_bm_enter_cap_learning(dev);
9100
9101 if (ret) {
9102 break;
9103 }
9104
9105 break;
9106 }
9107
9108 case SSD_CMD_CAP_LEARN: {
9109 uint32_t cap = 0;
9110
9111 ret = ssd_cap_learn(dev, &cap);
9112 if (ret) {
9113 break;
9114 }
9115
9116 if (copy_to_user(argp, &cap, sizeof(uint32_t))) {
9117 hio_warn("%s: copy_to_user: failed\n", dev->name);
9118 ret = -EFAULT;
9119 break;
9120 }
9121
9122 break;
9123 }
9124
9125 case SSD_CMD_GET_CAP_STATUS: {
9126 int cap_status = 0;
9127
9128 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9129 cap_status = 1;
9130 }
9131
9132 if (copy_to_user(argp, &cap_status, sizeof(int))) {
9133 hio_warn("%s: copy_to_user: failed\n", dev->name);
9134 ret = -EFAULT;
9135 break;
9136 }
9137
9138 break;
9139 }
9140
9141 case SSD_CMD_RAM_READ: {
9142 struct ssd_ram_op_info ram_info;
9143 uint64_t ofs;
9144 uint32_t length;
9145 size_t rlen, len = dev->hw_info.ram_max_len;
9146 int ctrl_idx;
9147
9148 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9149 hio_warn("%s: copy_from_user: failed\n", dev->name);
9150 ret = -EFAULT;
9151 break;
9152 }
9153
9154 ofs = ram_info.start;
9155 length = ram_info.length;
9156 buf = ram_info.buf;
9157 ctrl_idx = ram_info.ctrl_idx;
9158
9159 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9160 ret = -EINVAL;
9161 break;
9162 }
9163
9164 kbuf = kmalloc(len, GFP_KERNEL);
9165 if (!kbuf) {
9166 ret = -ENOMEM;
9167 break;
9168 }
9169
9170 for (rlen=0; rlen<length; rlen+=len, buf+=len, ofs+=len) {
9171 if ((length - rlen) < len) {
9172 len = length - rlen;
9173 }
9174
9175 ret = ssd_ram_read(dev, kbuf, len, ofs, ctrl_idx);
9176 if (ret) {
9177 break;
9178 }
9179
9180 if (copy_to_user(buf, kbuf, len)) {
9181 ret = -EFAULT;
9182 break;
9183 }
9184 }
9185
9186 kfree(kbuf);
9187
9188 break;
9189 }
9190
9191 case SSD_CMD_RAM_WRITE: {
9192 struct ssd_ram_op_info ram_info;
9193 uint64_t ofs;
9194 uint32_t length;
9195 size_t wlen, len = dev->hw_info.ram_max_len;
9196 int ctrl_idx;
9197
9198 if (copy_from_user(&ram_info, argp, sizeof(struct ssd_ram_op_info))) {
9199 hio_warn("%s: copy_from_user: failed\n", dev->name);
9200 ret = -EFAULT;
9201 break;
9202 }
9203 ofs = ram_info.start;
9204 length = ram_info.length;
9205 buf = ram_info.buf;
9206 ctrl_idx = ram_info.ctrl_idx;
9207
9208 if (ofs >= dev->hw_info.ram_size || length > dev->hw_info.ram_size || 0 == length || (ofs + length) > dev->hw_info.ram_size) {
9209 ret = -EINVAL;
9210 break;
9211 }
9212
9213 kbuf = kmalloc(len, GFP_KERNEL);
9214 if (!kbuf) {
9215 ret = -ENOMEM;
9216 break;
9217 }
9218
9219 for (wlen=0; wlen<length; wlen+=len, buf+=len, ofs+=len) {
9220 if ((length - wlen) < len) {
9221 len = length - wlen;
9222 }
9223
9224 if (copy_from_user(kbuf, buf, len)) {
9225 ret = -EFAULT;
9226 break;
9227 }
9228
9229 ret = ssd_ram_write(dev, kbuf, len, ofs, ctrl_idx);
9230 if (ret) {
9231 break;
9232 }
9233 }
9234
9235 kfree(kbuf);
9236
9237 break;
9238 }
9239
9240 case SSD_CMD_NAND_READ_ID: {
9241 struct ssd_flash_op_info flash_info;
9242 int chip_no, chip_ce, length, ctrl_idx;
9243
9244 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9245 hio_warn("%s: copy_from_user: failed\n", dev->name);
9246 ret = -EFAULT;
9247 break;
9248 }
9249
9250 chip_no = flash_info.flash;
9251 chip_ce = flash_info.chip;
9252 ctrl_idx = flash_info.ctrl_idx;
9253 buf = flash_info.buf;
9254 length = dev->hw_info.id_size;
9255
9256 //kbuf = kmalloc(length, GFP_KERNEL);
9257 kbuf = kmalloc(SSD_NAND_ID_BUFF_SZ, GFP_KERNEL); //xx
9258 if (!kbuf) {
9259 ret = -ENOMEM;
9260 break;
9261 }
9262 memset(kbuf, 0, length);
9263
9264 ret = ssd_nand_read_id(dev, kbuf, chip_no, chip_ce, ctrl_idx);
9265 if (ret) {
9266 kfree(kbuf);
9267 break;
9268 }
9269
9270 if (copy_to_user(buf, kbuf, length)) {
9271 kfree(kbuf);
9272 ret = -EFAULT;
9273 break;
9274 }
9275
9276 kfree(kbuf);
9277
9278 break;
9279 }
9280
9281 case SSD_CMD_NAND_READ: { //with oob
9282 struct ssd_flash_op_info flash_info;
9283 uint32_t length;
9284 int flash, chip, page, ctrl_idx;
9285 int err = 0;
9286
9287 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9288 hio_warn("%s: copy_from_user: failed\n", dev->name);
9289 ret = -EFAULT;
9290 break;
9291 }
9292
9293 flash = flash_info.flash;
9294 chip = flash_info.chip;
9295 page = flash_info.page;
9296 buf = flash_info.buf;
9297 ctrl_idx = flash_info.ctrl_idx;
9298
9299 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9300
9301 kbuf = kmalloc(length, GFP_KERNEL);
9302 if (!kbuf) {
9303 ret = -ENOMEM;
9304 break;
9305 }
9306
9307 err = ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9308 if (ret && (-EIO != ret)) {
9309 kfree(kbuf);
9310 break;
9311 }
9312
9313 if (copy_to_user(buf, kbuf, length)) {
9314 kfree(kbuf);
9315 ret = -EFAULT;
9316 break;
9317 }
9318
9319 ret = err;
9320
9321 kfree(kbuf);
9322 break;
9323 }
9324
9325 case SSD_CMD_NAND_WRITE: {
9326 struct ssd_flash_op_info flash_info;
9327 int flash, chip, page, ctrl_idx;
9328 uint32_t length;
9329
9330 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9331 hio_warn("%s: copy_from_user: failed\n", dev->name);
9332 ret = -EFAULT;
9333 break;
9334 }
9335
9336 flash = flash_info.flash;
9337 chip = flash_info.chip;
9338 page = flash_info.page;
9339 buf = flash_info.buf;
9340 ctrl_idx = flash_info.ctrl_idx;
9341
9342 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9343
9344 kbuf = kmalloc(length, GFP_KERNEL);
9345 if (!kbuf) {
9346 ret = -ENOMEM;
9347 break;
9348 }
9349
9350 if (copy_from_user(kbuf, buf, length)) {
9351 kfree(kbuf);
9352 ret = -EFAULT;
9353 break;
9354 }
9355
9356 ret = ssd_nand_write(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9357 if (ret) {
9358 kfree(kbuf);
9359 break;
9360 }
9361
9362 kfree(kbuf);
9363 break;
9364 }
9365
9366 case SSD_CMD_NAND_ERASE: {
9367 struct ssd_flash_op_info flash_info;
9368 int flash, chip, page, ctrl_idx;
9369
9370 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9371 hio_warn("%s: copy_from_user: failed\n", dev->name);
9372 ret = -EFAULT;
9373 break;
9374 }
9375
9376 flash = flash_info.flash;
9377 chip = flash_info.chip;
9378 page = flash_info.page;
9379 ctrl_idx = flash_info.ctrl_idx;
9380
9381 if ((page % dev->hw_info.page_count) != 0) {
9382 ret = -EINVAL;
9383 break;
9384 }
9385
9386 //hio_warn("erase fs = %llx\n", ofs);
9387 ret = ssd_nand_erase(dev, flash, chip, page, ctrl_idx);
9388 if (ret) {
9389 break;
9390 }
9391
9392 break;
9393 }
9394
9395 case SSD_CMD_NAND_READ_EXT: { //ingore EIO
9396 struct ssd_flash_op_info flash_info;
9397 uint32_t length;
9398 int flash, chip, page, ctrl_idx;
9399
9400 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9401 hio_warn("%s: copy_from_user: failed\n", dev->name);
9402 ret = -EFAULT;
9403 break;
9404 }
9405
9406 flash = flash_info.flash;
9407 chip = flash_info.chip;
9408 page = flash_info.page;
9409 buf = flash_info.buf;
9410 ctrl_idx = flash_info.ctrl_idx;
9411
9412 length = dev->hw_info.page_size + dev->hw_info.oob_size;
9413
9414 kbuf = kmalloc(length, GFP_KERNEL);
9415 if (!kbuf) {
9416 ret = -ENOMEM;
9417 break;
9418 }
9419
9420 ret = ssd_nand_read_w_oob(dev, kbuf, flash, chip, page, 1, ctrl_idx);
9421 if (-EIO == ret) { //ingore EIO
9422 ret = 0;
9423 }
9424 if (ret) {
9425 kfree(kbuf);
9426 break;
9427 }
9428
9429 if (copy_to_user(buf, kbuf, length)) {
9430 kfree(kbuf);
9431 ret = -EFAULT;
9432 break;
9433 }
9434
9435 kfree(kbuf);
9436 break;
9437 }
9438
9439 case SSD_CMD_UPDATE_BBT: {
9440 struct ssd_flash_op_info flash_info;
9441 int ctrl_idx, flash;
9442
9443 if (copy_from_user(&flash_info, argp, sizeof(struct ssd_flash_op_info))) {
9444 hio_warn("%s: copy_from_user: failed\n", dev->name);
9445 ret = -EFAULT;
9446 break;
9447 }
9448
9449 ctrl_idx = flash_info.ctrl_idx;
9450 flash = flash_info.flash;
9451 ret = ssd_update_bbt(dev, flash, ctrl_idx);
9452 if (ret) {
9453 break;
9454 }
9455
9456 break;
9457 }
9458
9459 case SSD_CMD_CLEAR_ALARM:
9460 ssd_clear_alarm(dev);
9461 break;
9462
9463 case SSD_CMD_SET_ALARM:
9464 ssd_set_alarm(dev);
9465 break;
9466
9467 case SSD_CMD_RESET:
9468 ret = ssd_do_reset(dev);
9469 break;
9470
9471 case SSD_CMD_RELOAD_FW:
9472 dev->reload_fw = 1;
9473 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9474 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FLAG);
9475 } else if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_1_1) {
9476 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
9477
9478 }
9479 break;
9480
9481 case SSD_CMD_UNLOAD_DEV: {
9482 if (atomic_read(&dev->refcnt)) {
9483 ret = -EBUSY;
9484 break;
9485 }
9486
9487 /* save smart */
9488 ssd_save_smart(dev);
9489
9490 ret = ssd_flush(dev);
9491 if (ret) {
9492 break;
9493 }
9494
9495 /* cleanup the block device */
9496 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
9497 mutex_lock(&dev->gd_mutex);
9498 ssd_cleanup_blkdev(dev);
9499 mutex_unlock(&dev->gd_mutex);
9500 }
9501
9502 break;
9503 }
9504
9505 case SSD_CMD_LOAD_DEV: {
9506
9507 if (test_bit(SSD_INIT_BD, &dev->state)) {
9508 ret = -EINVAL;
9509 break;
9510 }
9511
9512 ret = ssd_init_smart(dev);
9513 if (ret) {
9514 hio_warn("%s: init info: failed\n", dev->name);
9515 break;
9516 }
9517
9518 ret = ssd_init_blkdev(dev);
9519 if (ret) {
9520 hio_warn("%s: register block device: failed\n", dev->name);
9521 break;
9522 }
9523 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
9524
9525 break;
9526 }
9527
9528 case SSD_CMD_UPDATE_VP: {
9529 uint32_t val;
9530 uint32_t new_vp, new_vp1 = 0;
9531
9532 if (test_bit(SSD_INIT_BD, &dev->state)) {
9533 ret = -EINVAL;
9534 break;
9535 }
9536
9537 if (copy_from_user(&new_vp, argp, sizeof(uint32_t))) {
9538 hio_warn("%s: copy_from_user: failed\n", dev->name);
9539 ret = -EFAULT;
9540 break;
9541 }
9542
9543 if (new_vp > dev->hw_info.max_valid_pages || new_vp <= 0) {
9544 ret = -EINVAL;
9545 break;
9546 }
9547
9548 while (new_vp <= dev->hw_info.max_valid_pages) {
9549 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, new_vp);
9550 msleep(10);
9551 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
9552 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9553 new_vp1 = val & 0x3FF;
9554 } else {
9555 new_vp1 = val & 0x7FFF;
9556 }
9557
9558 if (new_vp1 == new_vp) {
9559 break;
9560 }
9561
9562 new_vp++;
9563 /*if (new_vp == dev->hw_info.valid_pages) {
9564 new_vp++;
9565 }*/
9566 }
9567
9568 if (new_vp1 != new_vp || new_vp > dev->hw_info.max_valid_pages) {
9569 /* restore */
9570 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9571 ret = -EINVAL;
9572 break;
9573 }
9574
9575 if (copy_to_user(argp, &new_vp, sizeof(uint32_t))) {
9576 hio_warn("%s: copy_to_user: failed\n", dev->name);
9577 ssd_reg32_write(dev->ctrlp + SSD_VALID_PAGES_REG, dev->hw_info.valid_pages);
9578 ret = -EFAULT;
9579 break;
9580 }
9581
9582 /* new */
9583 dev->hw_info.valid_pages = new_vp;
9584 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
9585 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
9586 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
9587
9588 break;
9589 }
9590
9591 case SSD_CMD_FULL_RESET: {
9592 ret = ssd_full_reset(dev);
9593 break;
9594 }
9595
9596 case SSD_CMD_GET_NR_LOG: {
9597 if (copy_to_user(argp, &dev->internal_log.nr_log, sizeof(dev->internal_log.nr_log))) {
9598 ret = -EFAULT;
9599 break;
9600 }
9601 break;
9602 }
9603
9604 case SSD_CMD_GET_LOG: {
9605 uint32_t length = dev->rom_info.log_sz;
9606
9607 buf = argp;
9608
9609 if (copy_to_user(buf, dev->internal_log.log, length)) {
9610 ret = -EFAULT;
9611 break;
9612 }
9613
9614 break;
9615 }
9616
9617 case SSD_CMD_LOG_LEVEL: {
9618 int level = 0;
9619 if (copy_from_user(&level, argp, sizeof(int))) {
9620 hio_warn("%s: copy_from_user: failed\n", dev->name);
9621 ret = -EFAULT;
9622 break;
9623 }
9624
9625 if (level >= SSD_LOG_NR_LEVEL || level < SSD_LOG_LEVEL_INFO) {
9626 level = SSD_LOG_LEVEL_ERR;
9627 }
9628
9629 //just for showing log, no need to protect
9630 log_level = level;
9631 break;
9632 }
9633
9634 case SSD_CMD_OT_PROTECT: {
9635 int protect = 0;
9636
9637 if (copy_from_user(&protect, argp, sizeof(int))) {
9638 hio_warn("%s: copy_from_user: failed\n", dev->name);
9639 ret = -EFAULT;
9640 break;
9641 }
9642
9643 ssd_set_ot_protect(dev, !!protect);
9644 break;
9645 }
9646
9647 case SSD_CMD_GET_OT_STATUS: {
9648 int status = ssd_get_ot_status(dev, &status);
9649
9650 if (copy_to_user(argp, &status, sizeof(int))) {
9651 hio_warn("%s: copy_to_user: failed\n", dev->name);
9652 ret = -EFAULT;
9653 break;
9654 }
9655 break;
9656 }
9657
9658 case SSD_CMD_CLEAR_LOG: {
9659 ret = ssd_clear_log(dev);
9660 break;
9661 }
9662
9663 case SSD_CMD_CLEAR_SMART: {
9664 ret = ssd_clear_smart(dev);
9665 break;
9666 }
9667
9668 case SSD_CMD_SW_LOG: {
9669 struct ssd_sw_log_info sw_log;
9670
9671 if (copy_from_user(&sw_log, argp, sizeof(struct ssd_sw_log_info))) {
9672 hio_warn("%s: copy_from_user: failed\n", dev->name);
9673 ret = -EFAULT;
9674 break;
9675 }
9676
9677 ret = ssd_gen_swlog(dev, sw_log.event, sw_log.data);
9678 break;
9679 }
9680
9681 case SSD_CMD_GET_LABEL: {
9682
9683 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9684 ret = -EINVAL;
9685 break;
9686 }
9687
9688 if (copy_to_user(argp, &dev->label, sizeof(struct ssd_label))) {
9689 hio_warn("%s: copy_to_user: failed\n", dev->name);
9690 ret = -EFAULT;
9691 break;
9692 }
9693 break;
9694 }
9695
9696 case SSD_CMD_GET_VERSION: {
9697 struct ssd_version_info ver;
9698
9699 mutex_lock(&dev->fw_mutex);
9700 ret = __ssd_get_version(dev, &ver);
9701 mutex_unlock(&dev->fw_mutex);
9702 if (ret) {
9703 break;
9704 }
9705
9706 if (copy_to_user(argp, &ver, sizeof(struct ssd_version_info))) {
9707 hio_warn("%s: copy_to_user: failed\n", dev->name);
9708 ret = -EFAULT;
9709 break;
9710 }
9711 break;
9712 }
9713
9714 case SSD_CMD_GET_TEMPERATURE: {
9715 int temp;
9716
9717 mutex_lock(&dev->fw_mutex);
9718 ret = __ssd_get_temperature(dev, &temp);
9719 mutex_unlock(&dev->fw_mutex);
9720 if (ret) {
9721 break;
9722 }
9723
9724 if (copy_to_user(argp, &temp, sizeof(int))) {
9725 hio_warn("%s: copy_to_user: failed\n", dev->name);
9726 ret = -EFAULT;
9727 break;
9728 }
9729 break;
9730 }
9731
9732 case SSD_CMD_GET_BMSTATUS: {
9733 int status;
9734
9735 mutex_lock(&dev->fw_mutex);
9736 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
9737 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
9738 status = SSD_BMSTATUS_WARNING;
9739 } else {
9740 status = SSD_BMSTATUS_OK;
9741 }
9742 } else if(dev->protocol_info.ver > SSD_PROTOCOL_V3) {
9743 ret = __ssd_bm_status(dev, &status);
9744 } else {
9745 status = SSD_BMSTATUS_OK;
9746 }
9747 mutex_unlock(&dev->fw_mutex);
9748 if (ret) {
9749 break;
9750 }
9751
9752 if (copy_to_user(argp, &status, sizeof(int))) {
9753 hio_warn("%s: copy_to_user: failed\n", dev->name);
9754 ret = -EFAULT;
9755 break;
9756 }
9757 break;
9758 }
9759
9760 case SSD_CMD_GET_LABEL2: {
9761 void *label;
9762 int length;
9763
9764 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
9765 label = &dev->label;
9766 length = sizeof(struct ssd_label);
9767 } else {
9768 label = &dev->labelv3;
9769 length = sizeof(struct ssd_labelv3);
9770 }
9771
9772 if (copy_to_user(argp, label, length)) {
9773 ret = -EFAULT;
9774 break;
9775 }
9776 break;
9777 }
9778
9779 case SSD_CMD_FLUSH:
9780 ret = ssd_flush(dev);
9781 if (ret) {
9782 hio_warn("%s: ssd_flush: failed\n", dev->name);
9783 ret = -EFAULT;
9784 break;
9785 }
9786 break;
9787
9788 case SSD_CMD_SAVE_MD: {
9789 int save_md = 0;
9790
9791 if (copy_from_user(&save_md, argp, sizeof(int))) {
9792 hio_warn("%s: copy_from_user: failed\n", dev->name);
9793 ret = -EFAULT;
9794 break;
9795 }
9796
9797 dev->save_md = !!save_md;
9798 break;
9799 }
9800
9801 case SSD_CMD_SET_WMODE: {
9802 int new_wmode = 0;
9803
9804 if (copy_from_user(&new_wmode, argp, sizeof(int))) {
9805 hio_warn("%s: copy_from_user: failed\n", dev->name);
9806 ret = -EFAULT;
9807 break;
9808 }
9809
9810 ret = __ssd_set_wmode(dev, new_wmode);
9811 if (ret) {
9812 break;
9813 }
9814
9815 break;
9816 }
9817
9818 case SSD_CMD_GET_WMODE: {
9819 if (copy_to_user(argp, &dev->wmode, sizeof(int))) {
9820 hio_warn("%s: copy_to_user: failed\n", dev->name);
9821 ret = -EFAULT;
9822 break;
9823 }
9824
9825 break;
9826 }
9827
9828 case SSD_CMD_GET_USER_WMODE: {
9829 if (copy_to_user(argp, &dev->user_wmode, sizeof(int))) {
9830 hio_warn("%s: copy_to_user: failed\n", dev->name);
9831 ret = -EFAULT;
9832 break;
9833 }
9834
9835 break;
9836 }
9837
9838 case SSD_CMD_DEBUG: {
9839 struct ssd_debug_info db_info;
9840
9841 if (!finject) {
9842 ret = -EOPNOTSUPP;
9843 break;
9844 }
9845
9846 if (copy_from_user(&db_info, argp, sizeof(struct ssd_debug_info))) {
9847 hio_warn("%s: copy_from_user: failed\n", dev->name);
9848 ret = -EFAULT;
9849 break;
9850 }
9851
9852 if (db_info.type < SSD_DEBUG_NONE || db_info.type >= SSD_DEBUG_NR) {
9853 ret = -EINVAL;
9854 break;
9855 }
9856
9857 /* IO */
9858 if (db_info.type >= SSD_DEBUG_READ_ERR && db_info.type <= SSD_DEBUG_RW_ERR &&
9859 (db_info.data.loc.off + db_info.data.loc.len) > (dev->hw_info.size >> 9)) {
9860 ret = -EINVAL;
9861 break;
9862 }
9863
9864 memcpy(&dev->db_info, &db_info, sizeof(struct ssd_debug_info));
9865
9866#ifdef SSD_OT_PROTECT
9867 /* temperature */
9868 if (db_info.type == SSD_DEBUG_NONE) {
9869 ssd_check_temperature(dev, SSD_OT_TEMP);
9870 } else if (db_info.type == SSD_DEBUG_LOG) {
9871 if (db_info.data.log.event == SSD_LOG_OVER_TEMP) {
9872 dev->ot_delay = SSD_OT_DELAY;
9873 } else if (db_info.data.log.event == SSD_LOG_NORMAL_TEMP) {
9874 dev->ot_delay = 0;
9875 }
9876 }
9877#endif
9878
9879 /* offline */
9880 if (db_info.type == SSD_DEBUG_OFFLINE) {
9881 test_and_clear_bit(SSD_ONLINE, &dev->state);
9882 } else if (db_info.type == SSD_DEBUG_NONE) {
9883 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
9884 }
9885
9886 /* log */
9887 if (db_info.type == SSD_DEBUG_LOG && dev->event_call && dev->gd) {
9888 dev->event_call(dev->gd, db_info.data.log.event, 0);
9889 }
9890
9891 break;
9892 }
9893
9894 case SSD_CMD_DRV_PARAM_INFO: {
9895 struct ssd_drv_param_info drv_param;
9896
9897 memset(&drv_param, 0, sizeof(struct ssd_drv_param_info));
9898
9899 drv_param.mode = mode;
9900 drv_param.status_mask = status_mask;
9901 drv_param.int_mode = int_mode;
9902 drv_param.threaded_irq = threaded_irq;
9903 drv_param.log_level = log_level;
9904 drv_param.wmode = wmode;
9905 drv_param.ot_protect = ot_protect;
9906 drv_param.finject = finject;
9907
9908 if (copy_to_user(argp, &drv_param, sizeof(struct ssd_drv_param_info))) {
9909 hio_warn("%s: copy_to_user: failed\n", dev->name);
9910 ret = -EFAULT;
9911 break;
9912 }
9913 break;
9914 }
9915
9916 default:
9917 ret = -EINVAL;
9918 break;
9919 }
9920
9921 return ret;
9922}
9923
9924
9925#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9926static int ssd_block_ioctl(struct inode *inode, struct file *file,
9927 unsigned int cmd, unsigned long arg)
9928{
9929 struct ssd_device *dev;
9930 void __user *argp = (void __user *)arg;
9931 int ret = 0;
9932
9933 if (!inode) {
9934 return -EINVAL;
9935 }
9936 dev = inode->i_bdev->bd_disk->private_data;
9937 if (!dev) {
9938 return -EINVAL;
9939 }
9940#else
9941static int ssd_block_ioctl(struct block_device *bdev, fmode_t mode,
9942 unsigned int cmd, unsigned long arg)
9943{
9944 struct ssd_device *dev;
9945 void __user *argp = (void __user *)arg;
9946 int ret = 0;
9947
9948 if (!bdev) {
9949 return -EINVAL;
9950 }
9951
9952 dev = bdev->bd_disk->private_data;
9953 if (!dev) {
9954 return -EINVAL;
9955 }
9956#endif
9957
9958 switch (cmd) {
9959 case HDIO_GETGEO: {
9960 struct hd_geometry geo;
9961 geo.cylinders = (dev->hw_info.size & ~0x3f) >> 6;
9962 geo.heads = 4;
9963 geo.sectors = 16;
9964#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
9965 geo.start = get_start_sect(inode->i_bdev);
9966#else
9967 geo.start = get_start_sect(bdev);
9968#endif
9969 if (copy_to_user(argp, &geo, sizeof(geo))) {
9970 ret = -EFAULT;
9971 break;
9972 }
9973
9974 break;
9975 }
9976
9977 case BLKFLSBUF:
9978 ret = ssd_flush(dev);
9979 if (ret) {
9980 hio_warn("%s: ssd_flush: failed\n", dev->name);
9981 ret = -EFAULT;
9982 break;
9983 }
9984 break;
9985
9986 default:
9987 if (!dev->slave) {
9988 ret = ssd_ioctl_common(dev, cmd, arg);
9989 } else {
9990 ret = -EFAULT;
9991 }
9992 break;
9993 }
9994
9995 return ret;
9996}
9997
9998
9999static void ssd_free_dev(struct kref *kref)
10000{
10001 struct ssd_device *dev;
10002
10003 if (!kref) {
10004 return;
10005 }
10006
10007 dev = container_of(kref, struct ssd_device, kref);
10008
10009 put_disk(dev->gd);
10010
10011 ssd_put_index(dev->slave, dev->idx);
10012
10013 kfree(dev);
10014}
10015
10016static void ssd_put(struct ssd_device *dev)
10017{
10018 kref_put(&dev->kref, ssd_free_dev);
10019}
10020
10021static int ssd_get(struct ssd_device *dev)
10022{
10023 kref_get(&dev->kref);
10024 return 0;
10025}
10026
10027/* block device */
10028#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10029static int ssd_block_open(struct inode *inode, struct file *filp)
10030{
10031 struct ssd_device *dev;
10032
10033 if (!inode) {
10034 return -EINVAL;
10035 }
10036
10037 dev = inode->i_bdev->bd_disk->private_data;
10038 if (!dev) {
10039 return -EINVAL;
10040 }
10041#else
10042static int ssd_block_open(struct block_device *bdev, fmode_t mode)
10043{
10044 struct ssd_device *dev;
10045
10046 if (!bdev) {
10047 return -EINVAL;
10048 }
10049
10050 dev = bdev->bd_disk->private_data;
10051 if (!dev) {
10052 return -EINVAL;
10053 }
10054#endif
10055
10056 /*if (!try_module_get(dev->owner))
10057 return -ENODEV;
10058 */
10059
10060 ssd_get(dev);
10061
10062 atomic_inc(&dev->refcnt);
10063
10064 return 0;
10065}
10066
10067#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10068static int ssd_block_release(struct inode *inode, struct file *filp)
10069{
10070 struct ssd_device *dev;
10071
10072 if (!inode) {
10073 return -EINVAL;
10074 }
10075
10076 dev = inode->i_bdev->bd_disk->private_data;
10077 if (!dev) {
10078 return -EINVAL;
10079 }
10080#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10081static int ssd_block_release(struct gendisk *disk, fmode_t mode)
10082{
10083 struct ssd_device *dev;
10084
10085 if (!disk) {
10086 return -EINVAL;
10087 }
10088
10089 dev = disk->private_data;
10090 if (!dev) {
10091 return -EINVAL;
10092 }
10093#else
10094static void ssd_block_release(struct gendisk *disk, fmode_t mode)
10095{
10096 struct ssd_device *dev;
10097
10098 if (!disk) {
10099 return;
10100 }
10101
10102 dev = disk->private_data;
10103 if (!dev) {
10104 return;
10105 }
10106#endif
10107
10108 atomic_dec(&dev->refcnt);
10109
10110 ssd_put(dev);
10111
10112 //module_put(dev->owner);
10113#if (LINUX_VERSION_CODE <= KERNEL_VERSION(3,9,0))
10114 return 0;
10115#endif
10116}
10117
10118static struct block_device_operations ssd_fops = {
10119 .owner = THIS_MODULE,
10120 .open = ssd_block_open,
10121 .release = ssd_block_release,
10122 .ioctl = ssd_block_ioctl,
10123#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16))
10124 .getgeo = ssd_block_getgeo,
10125#endif
10126};
10127
10128static void ssd_init_trim(ssd_device_t *dev)
10129{
10130#if (defined SSD_TRIM && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)))
10131 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10132 return;
10133 }
10134 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, dev->rq);
10135
10136#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33)) || (defined RHEL_MAJOR && RHEL_MAJOR >= 6))
10137 dev->rq->limits.discard_zeroes_data = 1;
10138 dev->rq->limits.discard_alignment = 4096;
10139 dev->rq->limits.discard_granularity = 4096;
10140#endif
10141 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2_4) {
10142 dev->rq->limits.max_discard_sectors = dev->hw_info.sg_max_sec;
10143 } else {
10144 dev->rq->limits.max_discard_sectors = (dev->hw_info.sg_max_sec) * (dev->hw_info.cmd_max_sg);
10145 }
10146#endif
10147}
10148
10149static void ssd_cleanup_queue(struct ssd_device *dev)
10150{
10151 ssd_wait_io(dev);
10152
10153 blk_cleanup_queue(dev->rq);
10154 dev->rq = NULL;
10155}
10156
10157static int ssd_init_queue(struct ssd_device *dev)
10158{
10159 dev->rq = blk_alloc_queue(GFP_KERNEL);
10160 if (dev->rq == NULL) {
10161 hio_warn("%s: alloc queue: failed\n ", dev->name);
10162 goto out_init_queue;
10163 }
10164
10165 /* must be first */
10166 blk_queue_make_request(dev->rq, ssd_make_request);
10167
10168#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) && !(defined RHEL_MAJOR && RHEL_MAJOR == 6))
10169 blk_queue_max_hw_segments(dev->rq, dev->hw_info.cmd_max_sg);
10170 blk_queue_max_phys_segments(dev->rq, dev->hw_info.cmd_max_sg);
10171 blk_queue_max_sectors(dev->rq, dev->hw_info.sg_max_sec);
10172#else
10173 blk_queue_max_segments(dev->rq, dev->hw_info.cmd_max_sg);
10174 blk_queue_max_hw_sectors(dev->rq, dev->hw_info.sg_max_sec);
10175#endif
10176
10177#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
10178 blk_queue_hardsect_size(dev->rq, 512);
10179#else
10180 blk_queue_logical_block_size(dev->rq, 512);
10181#endif
10182 /* not work for make_request based drivers(bio) */
10183 blk_queue_max_segment_size(dev->rq, dev->hw_info.sg_max_sec << 9);
10184
10185 blk_queue_bounce_limit(dev->rq, BLK_BOUNCE_HIGH);
10186
10187 dev->rq->queuedata = dev;
10188
10189#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
10190 blk_queue_issue_flush_fn(dev->rq, ssd_issue_flush_fn);
10191#endif
10192
10193#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28))
10194 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, dev->rq);
10195#endif
10196
10197 ssd_init_trim(dev);
10198
10199 return 0;
10200
10201out_init_queue:
10202 return -ENOMEM;
10203}
10204
10205static void ssd_cleanup_blkdev(struct ssd_device *dev)
10206{
10207 del_gendisk(dev->gd);
10208}
10209
10210static int ssd_init_blkdev(struct ssd_device *dev)
10211{
10212 if (dev->gd) {
10213 put_disk(dev->gd);
10214 }
10215
10216 dev->gd = alloc_disk(ssd_minors);
10217 if (!dev->gd) {
10218 hio_warn("%s: alloc_disk fail\n", dev->name);
10219 goto out_alloc_gd;
10220 }
10221 dev->gd->major = dev->major;
10222 dev->gd->first_minor = dev->idx * ssd_minors;
10223 dev->gd->fops = &ssd_fops;
10224 dev->gd->queue = dev->rq;
10225 dev->gd->private_data = dev;
10226 dev->gd->driverfs_dev = &dev->pdev->dev;
10227 snprintf (dev->gd->disk_name, sizeof(dev->gd->disk_name), "%s", dev->name);
10228
10229 set_capacity(dev->gd, dev->hw_info.size >> 9);
10230
10231 add_disk(dev->gd);
10232
10233 return 0;
10234
10235out_alloc_gd:
10236 return -ENOMEM;
10237}
10238
10239#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10240static int ssd_ioctl(struct inode *inode, struct file *file,
10241 unsigned int cmd, unsigned long arg)
10242#else
10243static long ssd_ioctl(struct file *file,
10244 unsigned int cmd, unsigned long arg)
10245#endif
10246{
10247 struct ssd_device *dev;
10248
10249 if (!file) {
10250 return -EINVAL;
10251 }
10252
10253 dev = file->private_data;
10254 if (!dev) {
10255 return -EINVAL;
10256 }
10257
10258 return (long)ssd_ioctl_common(dev, cmd, arg);
10259}
10260
10261static int ssd_open(struct inode *inode, struct file *file)
10262{
10263 struct ssd_device *dev = NULL;
10264 struct ssd_device *n = NULL;
10265 int idx;
10266 int ret = -ENODEV;
10267
10268 if (!inode || !file) {
10269 return -EINVAL;
10270 }
10271
10272 idx = iminor(inode);
10273
10274 list_for_each_entry_safe(dev, n, &ssd_list, list) {
10275 if (dev->idx == idx) {
10276 ret = 0;
10277 break;
10278 }
10279 }
10280
10281 if (ret) {
10282 return ret;
10283 }
10284
10285 file->private_data = dev;
10286
10287 ssd_get(dev);
10288
10289 return 0;
10290}
10291
10292static int ssd_release(struct inode *inode, struct file *file)
10293{
10294 struct ssd_device *dev;
10295
10296 if (!file) {
10297 return -EINVAL;
10298 }
10299
10300 dev = file->private_data;
10301 if (!dev) {
10302 return -EINVAL;
10303 }
10304
10305 ssd_put(dev);
10306
10307 file->private_data = NULL;
10308
10309 return 0;
10310}
10311
10312static struct file_operations ssd_cfops = {
10313 .owner = THIS_MODULE,
10314 .open = ssd_open,
10315 .release = ssd_release,
10316#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10))
10317 .ioctl = ssd_ioctl,
10318#else
10319 .unlocked_ioctl = ssd_ioctl,
10320#endif
10321};
10322
10323static void ssd_cleanup_chardev(struct ssd_device *dev)
10324{
10325 if (dev->slave) {
10326 return;
10327 }
10328
10329#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10330 class_simple_device_remove(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10331 devfs_remove("c%s", dev->name);
10332#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10333 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10334 devfs_remove("c%s", dev->name);
10335#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10336 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10337 devfs_remove("c%s", dev->name);
10338#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10339 class_device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10340#else
10341 device_destroy(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx));
10342#endif
10343}
10344
10345static int ssd_init_chardev(struct ssd_device *dev)
10346{
10347 int ret = 0;
10348
10349 if (dev->slave) {
10350 return 0;
10351 }
10352
10353#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
10354 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10355 if (ret) {
10356 goto out;
10357 }
10358 class_simple_device_add(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10359out:
10360#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,14))
10361 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10362 if (ret) {
10363 goto out;
10364 }
10365 class_device_create(ssd_class, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10366out:
10367#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,17))
10368 ret = devfs_mk_cdev(MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), S_IFCHR|S_IRUSR|S_IWUSR, "c%s", dev->name);
10369 if (ret) {
10370 goto out;
10371 }
10372 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10373out:
10374#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,24))
10375 class_device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10376#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,26))
10377 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), "c%s", dev->name);
10378#elif (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,27))
10379 device_create_drvdata(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10380#else
10381 device_create(ssd_class, NULL, MKDEV((dev_t)dev->cmajor, (dev_t)dev->idx), NULL, "c%s", dev->name);
10382#endif
10383
10384 return ret;
10385}
10386
10387static int ssd_check_hw(struct ssd_device *dev)
10388{
10389 uint32_t test_data = 0x55AA5AA5;
10390 uint32_t read_data;
10391
10392 ssd_reg32_write(dev->ctrlp + SSD_BRIDGE_TEST_REG, test_data);
10393 read_data = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_TEST_REG);
10394 if (read_data != ~(test_data)) {
10395 //hio_warn("%s: check bridge error: %#x\n", dev->name, read_data);
10396 return -1;
10397 }
10398
10399 return 0;
10400}
10401
10402static int ssd_check_fw(struct ssd_device *dev)
10403{
10404 uint32_t val = 0;
10405 int i;
10406
10407 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10408 return 0;
10409 }
10410
10411 for (i=0; i<SSD_CONTROLLER_WAIT; i++) {
10412 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10413 if ((val & 0x1) && ((val >> 8) & 0x1)) {
10414 break;
10415 }
10416
10417 msleep(SSD_INIT_WAIT);
10418 }
10419
10420 if (!(val & 0x1)) {
10421 /* controller fw status */
10422 hio_warn("%s: controller firmware load failed: %#x\n", dev->name, val);
10423 return -1;
10424 } else if (!((val >> 8) & 0x1)) {
10425 /* controller state */
10426 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10427 return -1;
10428 }
10429
10430 val = ssd_reg32_read(dev->ctrlp + SSD_RELOAD_FW_REG);
10431 if (val) {
10432 dev->reload_fw = 1;
10433 }
10434
10435 return 0;
10436}
10437
10438static int ssd_init_fw_info(struct ssd_device *dev)
10439{
10440 uint32_t val;
10441 int ret = 0;
10442
10443 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_VER_REG);
10444 dev->hw_info.bridge_ver = val & 0xFFF;
10445 if (dev->hw_info.bridge_ver < SSD_FW_MIN) {
10446 hio_warn("%s: bridge firmware version %03X is not supported\n", dev->name, dev->hw_info.bridge_ver);
10447 return -EINVAL;
10448 }
10449 hio_info("%s: bridge firmware version: %03X\n", dev->name, dev->hw_info.bridge_ver);
10450
10451 ret = ssd_check_fw(dev);
10452 if (ret) {
10453 goto out;
10454 }
10455
10456out:
10457 /* skip error if not in standard mode */
10458 if (mode != SSD_DRV_MODE_STANDARD) {
10459 ret = 0;
10460 }
10461 return ret;
10462}
10463
10464static int ssd_check_clock(struct ssd_device *dev)
10465{
10466 uint32_t val;
10467 int ret = 0;
10468
10469 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10470 return 0;
10471 }
10472
10473 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10474
10475 /* clock status */
10476 if (!((val >> 4 ) & 0x1)) {
10477 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_LOST), &dev->hwmon)) {
10478 hio_warn("%s: 166MHz clock losed: %#x\n", dev->name, val);
10479 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10480 }
10481 ret = -1;
10482 }
10483
10484 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
10485 if (!((val >> 5 ) & 0x1)) {
10486 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_166M_SKEW), &dev->hwmon)) {
10487 hio_warn("%s: 166MHz clock is skew: %#x\n", dev->name, val);
10488 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10489 }
10490 ret = -1;
10491 }
10492 if (!((val >> 6 ) & 0x1)) {
10493 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_LOST), &dev->hwmon)) {
10494 hio_warn("%s: 156.25MHz clock lost: %#x\n", dev->name, val);
10495 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10496 }
10497 ret = -1;
10498 }
10499 if (!((val >> 7 ) & 0x1)) {
10500 if (!test_and_set_bit(SSD_HWMON_CLOCK(SSD_CLOCK_156M_SKEW), &dev->hwmon)) {
10501 hio_warn("%s: 156.25MHz clock is skew: %#x\n", dev->name, val);
10502 ssd_gen_swlog(dev, SSD_LOG_CLK_FAULT, val);
10503 }
10504 ret = -1;
10505 }
10506 }
10507
10508 return ret;
10509}
10510
10511static int ssd_check_volt(struct ssd_device *dev)
10512{
10513 int i = 0;
10514 uint64_t val;
10515 uint32_t adc_val;
10516 int ret =0;
10517
10518 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10519 return 0;
10520 }
10521
10522 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10523 /* 1.0v */
10524 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon)) {
10525 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V0_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10526 adc_val = SSD_FPGA_VOLT_MAX(val);
10527 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10528 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10529 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10530 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10531 ret = -1;
10532 }
10533
10534 adc_val = SSD_FPGA_VOLT_MIN(val);
10535 if (adc_val < SSD_FPGA_1V0_ADC_MIN || adc_val > SSD_FPGA_1V0_ADC_MAX) {
10536 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V0), &dev->hwmon);
10537 hio_warn("%s: controller %d 1.0V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10538 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V0, i, adc_val));
10539 ret = -2;
10540 }
10541 }
10542
10543 /* 1.8v */
10544 if (!test_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon)) {
10545 val = ssd_reg_read(dev->ctrlp + SSD_FPGA_1V8_REG0 + i * SSD_CTRL_REG_ZONE_SZ);
10546 adc_val = SSD_FPGA_VOLT_MAX(val);
10547 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10548 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10549 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10550 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10551 ret = -3;
10552 }
10553
10554 adc_val = SSD_FPGA_VOLT_MIN(val);
10555 if (adc_val < SSD_FPGA_1V8_ADC_MIN || adc_val > SSD_FPGA_1V8_ADC_MAX) {
10556 (void)test_and_set_bit(SSD_HWMON_FPGA(i, SSD_FPGA_1V8), &dev->hwmon);
10557 hio_warn("%s: controller %d 1.8V fault: %d mV.\n", dev->name, i, SSD_FPGA_VOLT(adc_val));
10558 ssd_gen_swlog(dev, SSD_LOG_VOLT_FAULT, SSD_VOLT_LOG_DATA(SSD_FPGA_1V8, i, adc_val));
10559 ret = -4;
10560 }
10561 }
10562 }
10563
10564 return ret;
10565}
10566
10567static int ssd_check_reset_sync(struct ssd_device *dev)
10568{
10569 uint32_t val;
10570
10571 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10572 return 0;
10573 }
10574
10575 val = ssd_reg32_read(dev->ctrlp + SSD_HW_STATUS_REG);
10576 if (!((val >> 8) & 0x1)) {
10577 /* controller state */
10578 hio_warn("%s: controller state error: %#x\n", dev->name, val);
10579 return -1;
10580 }
10581
10582 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10583 return 0;
10584 }
10585
10586 if (((val >> 9 ) & 0x1)) {
10587 hio_warn("%s: controller reset asynchronously: %#x\n", dev->name, val);
10588 ssd_gen_swlog(dev, SSD_LOG_CTRL_RST_SYNC, val);
10589 return -1;
10590 }
10591
10592 return 0;
10593}
10594
10595static int ssd_check_hw_bh(struct ssd_device *dev)
10596{
10597 int ret;
10598
10599 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10600 return 0;
10601 }
10602
10603 /* clock status */
10604 ret = ssd_check_clock(dev);
10605 if (ret) {
10606 goto out;
10607 }
10608
10609out:
10610 /* skip error if not in standard mode */
10611 if (mode != SSD_DRV_MODE_STANDARD) {
10612 ret = 0;
10613 }
10614 return ret;
10615}
10616
10617static int ssd_check_controller(struct ssd_device *dev)
10618{
10619 int ret;
10620
10621 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_1_3) {
10622 return 0;
10623 }
10624
10625 /* sync reset */
10626 ret = ssd_check_reset_sync(dev);
10627 if (ret) {
10628 goto out;
10629 }
10630
10631out:
10632 /* skip error if not in standard mode */
10633 if (mode != SSD_DRV_MODE_STANDARD) {
10634 ret = 0;
10635 }
10636 return ret;
10637}
10638
10639static int ssd_check_controller_bh(struct ssd_device *dev)
10640{
10641 uint32_t test_data = 0x55AA5AA5;
10642 uint32_t val;
10643 int reg_base, reg_sz;
10644 int init_wait = 0;
10645 int i;
10646 int ret = 0;
10647
10648 if (mode != SSD_DRV_MODE_STANDARD) {
10649 return 0;
10650 }
10651
10652 /* controller */
10653 val = ssd_reg32_read(dev->ctrlp + SSD_READY_REG);
10654 if (val & 0x1) {
10655 hio_warn("%s: controller 0 not ready\n", dev->name);
10656 return -1;
10657 }
10658
10659 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10660 reg_base = SSD_CTRL_TEST_REG0 + i * SSD_CTRL_TEST_REG_SZ;
10661 ssd_reg32_write(dev->ctrlp + reg_base, test_data);
10662 val = ssd_reg32_read(dev->ctrlp + reg_base);
10663 if (val != ~(test_data)) {
10664 hio_warn("%s: check controller %d error: %#x\n", dev->name, i, val);
10665 return -1;
10666 }
10667 }
10668
10669 /* clock */
10670 ret = ssd_check_volt(dev);
10671 if (ret) {
10672 return ret;
10673 }
10674
10675 /* ddr */
10676 if (dev->protocol_info.ver > SSD_PROTOCOL_V3) {
10677 reg_base = SSD_PV3_RAM_STATUS_REG0;
10678 reg_sz = SSD_PV3_RAM_STATUS_REG_SZ;
10679
10680 for (i=0; i<dev->hw_info.nr_ctrl; i++) {
10681check_ram_status:
10682 val = ssd_reg32_read(dev->ctrlp + reg_base);
10683
10684 if (!((val >> 1) & 0x1)) {
10685 init_wait++;
10686 if (init_wait <= SSD_RAM_INIT_MAX_WAIT) {
10687 msleep(SSD_INIT_WAIT);
10688 goto check_ram_status;
10689 } else {
10690 hio_warn("%s: controller %d ram init failed: %#x\n", dev->name, i, val);
10691 ssd_gen_swlog(dev, SSD_LOG_DDR_INIT_ERR, i);
10692 return -1;
10693 }
10694 }
10695
10696 reg_base += reg_sz;
10697 }
10698 }
10699
10700 /* ch info */
10701 for (i=0; i<SSD_CH_INFO_MAX_WAIT; i++) {
10702 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10703 if (!((val >> 31) & 0x1)) {
10704 break;
10705 }
10706
10707 msleep(SSD_INIT_WAIT);
10708 }
10709 if ((val >> 31) & 0x1) {
10710 hio_warn("%s: channel info init failed: %#x\n", dev->name, val);
10711 return -1;
10712 }
10713
10714 return 0;
10715}
10716
10717static int ssd_init_protocol_info(struct ssd_device *dev)
10718{
10719 uint32_t val;
10720
10721 val = ssd_reg32_read(dev->ctrlp + SSD_PROTOCOL_VER_REG);
10722 if (val == (uint32_t)-1) {
10723 hio_warn("%s: protocol version error: %#x\n", dev->name, val);
10724 return -EINVAL;
10725 }
10726 dev->protocol_info.ver = val;
10727
10728 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10729 dev->protocol_info.init_state_reg = SSD_INIT_STATE_REG0;
10730 dev->protocol_info.init_state_reg_sz = SSD_INIT_STATE_REG_SZ;
10731
10732 dev->protocol_info.chip_info_reg = SSD_CHIP_INFO_REG0;
10733 dev->protocol_info.chip_info_reg_sz = SSD_CHIP_INFO_REG_SZ;
10734 } else {
10735 dev->protocol_info.init_state_reg = SSD_PV3_INIT_STATE_REG0;
10736 dev->protocol_info.init_state_reg_sz = SSD_PV3_INIT_STATE_REG_SZ;
10737
10738 dev->protocol_info.chip_info_reg = SSD_PV3_CHIP_INFO_REG0;
10739 dev->protocol_info.chip_info_reg_sz = SSD_PV3_CHIP_INFO_REG_SZ;
10740 }
10741
10742 return 0;
10743}
10744
10745static int ssd_init_hw_info(struct ssd_device *dev)
10746{
10747 uint64_t val64;
10748 uint32_t val;
10749 uint32_t nr_ctrl;
10750 int ret = 0;
10751
10752 /* base info */
10753 val = ssd_reg32_read(dev->ctrlp + SSD_RESP_INFO_REG);
10754 dev->hw_info.resp_ptr_sz = 16 * (1U << (val & 0xFF));
10755 dev->hw_info.resp_msg_sz = 16 * (1U << ((val >> 8) & 0xFF));
10756
10757 if (0 == dev->hw_info.resp_ptr_sz || 0 == dev->hw_info.resp_msg_sz) {
10758 hio_warn("%s: response info error\n", dev->name);
10759 ret = -EINVAL;
10760 goto out;
10761 }
10762
10763 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10764 dev->hw_info.cmd_fifo_sz = 1U << ((val >> 4) & 0xF);
10765 dev->hw_info.cmd_max_sg = 1U << ((val >> 8) & 0xF);
10766 dev->hw_info.sg_max_sec = 1U << ((val >> 12) & 0xF);
10767 dev->hw_info.cmd_fifo_sz_mask = dev->hw_info.cmd_fifo_sz - 1;
10768
10769 if (0 == dev->hw_info.cmd_fifo_sz || 0 == dev->hw_info.cmd_max_sg || 0 == dev->hw_info.sg_max_sec) {
10770 hio_warn("%s: cmd info error\n", dev->name);
10771 ret = -EINVAL;
10772 goto out;
10773 }
10774
10775 /* check hw */
10776 if (ssd_check_hw_bh(dev)) {
10777 hio_warn("%s: check hardware status failed\n", dev->name);
10778 ret = -EINVAL;
10779 goto out;
10780 }
10781
10782 if (ssd_check_controller(dev)) {
10783 hio_warn("%s: check controller state failed\n", dev->name);
10784 ret = -EINVAL;
10785 goto out;
10786 }
10787
10788 /* nr controller : read again*/
10789 val = ssd_reg32_read(dev->ctrlp + SSD_BRIDGE_INFO_REG);
10790 dev->hw_info.nr_ctrl = (val >> 16) & 0xF;
10791
10792 /* nr ctrl configured */
10793 nr_ctrl = (val >> 20) & 0xF;
10794 if (0 == dev->hw_info.nr_ctrl) {
10795 hio_warn("%s: nr controller error: %u\n", dev->name, dev->hw_info.nr_ctrl);
10796 ret = -EINVAL;
10797 goto out;
10798 } else if (0 != nr_ctrl && nr_ctrl != dev->hw_info.nr_ctrl) {
10799 hio_warn("%s: nr controller error: configured %u but found %u\n", dev->name, nr_ctrl, dev->hw_info.nr_ctrl);
10800 if (mode <= SSD_DRV_MODE_STANDARD) {
10801 ret = -EINVAL;
10802 goto out;
10803 }
10804 }
10805
10806 if (ssd_check_controller_bh(dev)) {
10807 hio_warn("%s: check controller failed\n", dev->name);
10808 ret = -EINVAL;
10809 goto out;
10810 }
10811
10812 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
10813 dev->hw_info.pcb_ver = (uint8_t) ((val >> 4) & 0xF) + 'A' -1;
10814 if ((val & 0xF) != 0xF) {
10815 dev->hw_info.upper_pcb_ver = (uint8_t) (val & 0xF) + 'A' -1;
10816 }
10817
10818 if (dev->hw_info.pcb_ver < 'A' || (0 != dev->hw_info.upper_pcb_ver && dev->hw_info.upper_pcb_ver < 'A')) {
10819 hio_warn("%s: PCB version error: %#x %#x\n", dev->name, dev->hw_info.pcb_ver, dev->hw_info.upper_pcb_ver);
10820 ret = -EINVAL;
10821 goto out;
10822 }
10823
10824 /* channel info */
10825 if (mode <= SSD_DRV_MODE_DEBUG) {
10826 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
10827 dev->hw_info.nr_data_ch = val & 0xFF;
10828 dev->hw_info.nr_ch = dev->hw_info.nr_data_ch + ((val >> 8) & 0xFF);
10829 dev->hw_info.nr_chip = (val >> 16) & 0xFF;
10830
10831 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10832 dev->hw_info.max_ch = 1;
10833 while (dev->hw_info.max_ch < dev->hw_info.nr_ch) dev->hw_info.max_ch <<= 1;
10834 } else {
10835 /* set max channel 32 */
10836 dev->hw_info.max_ch = 32;
10837 }
10838
10839 if (0 == dev->hw_info.nr_chip) {
10840 //for debug mode
10841 dev->hw_info.nr_chip = 1;
10842 }
10843
10844 //xx
10845 dev->hw_info.id_size = SSD_NAND_ID_SZ;
10846 dev->hw_info.max_ce = SSD_NAND_MAX_CE;
10847
10848 if (0 == dev->hw_info.nr_data_ch || 0 == dev->hw_info.nr_ch || 0 == dev->hw_info.nr_chip) {
10849 hio_warn("%s: channel info error: data_ch %u ch %u chip %u\n", dev->name, dev->hw_info.nr_data_ch, dev->hw_info.nr_ch, dev->hw_info.nr_chip);
10850 ret = -EINVAL;
10851 goto out;
10852 }
10853 }
10854
10855 /* ram info */
10856 if (mode <= SSD_DRV_MODE_DEBUG) {
10857 val = ssd_reg32_read(dev->ctrlp + SSD_RAM_INFO_REG);
10858 dev->hw_info.ram_size = 0x4000000ull * (1ULL << (val & 0xF));
10859 dev->hw_info.ram_align = 1U << ((val >> 12) & 0xF);
10860 if (dev->hw_info.ram_align < SSD_RAM_ALIGN) {
10861 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10862 dev->hw_info.ram_align = SSD_RAM_ALIGN;
10863 } else {
10864 hio_warn("%s: ram align error: %u\n", dev->name, dev->hw_info.ram_align);
10865 ret = -EINVAL;
10866 goto out;
10867 }
10868 }
10869 dev->hw_info.ram_max_len = 0x1000 * (1U << ((val >> 16) & 0xF));
10870
10871 if (0 == dev->hw_info.ram_size || 0 == dev->hw_info.ram_align || 0 == dev->hw_info.ram_max_len || dev->hw_info.ram_align > dev->hw_info.ram_max_len) {
10872 hio_warn("%s: ram info error\n", dev->name);
10873 ret = -EINVAL;
10874 goto out;
10875 }
10876
10877 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10878 dev->hw_info.log_sz = SSD_LOG_MAX_SZ;
10879 } else {
10880 val = ssd_reg32_read(dev->ctrlp + SSD_LOG_INFO_REG);
10881 dev->hw_info.log_sz = 0x1000 * (1U << (val & 0xFF));
10882 }
10883 if (0 == dev->hw_info.log_sz) {
10884 hio_warn("%s: log size error\n", dev->name);
10885 ret = -EINVAL;
10886 goto out;
10887 }
10888
10889 val = ssd_reg32_read(dev->ctrlp + SSD_BBT_BASE_REG);
10890 dev->hw_info.bbt_base = 0x40000ull * (val & 0xFFFF);
10891 dev->hw_info.bbt_size = 0x40000 * (((val >> 16) & 0xFFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10892 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10893 if (dev->hw_info.bbt_base > dev->hw_info.ram_size || 0 == dev->hw_info.bbt_size) {
10894 hio_warn("%s: bbt info error\n", dev->name);
10895 ret = -EINVAL;
10896 goto out;
10897 }
10898 }
10899
10900 val = ssd_reg32_read(dev->ctrlp + SSD_ECT_BASE_REG);
10901 dev->hw_info.md_base = 0x40000ull * (val & 0xFFFF);
10902 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10903 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.max_ch * dev->hw_info.nr_chip);
10904 } else {
10905 dev->hw_info.md_size = 0x40000 * (((val >> 16) & 0xFFF) + 1) / (dev->hw_info.nr_chip);
10906 }
10907 dev->hw_info.md_entry_sz = 8 * (1U << ((val >> 28) & 0xF));
10908 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3) {
10909 if (dev->hw_info.md_base > dev->hw_info.ram_size || 0 == dev->hw_info.md_size ||
10910 0 == dev->hw_info.md_entry_sz || dev->hw_info.md_entry_sz > dev->hw_info.md_size) {
10911 hio_warn("%s: md info error\n", dev->name);
10912 ret = -EINVAL;
10913 goto out;
10914 }
10915 }
10916
10917 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
10918 dev->hw_info.nand_wbuff_base = dev->hw_info.ram_size + 1;
10919 } else {
10920 val = ssd_reg32_read(dev->ctrlp + SSD_NAND_BUFF_BASE);
10921 dev->hw_info.nand_wbuff_base = 0x8000ull * val;
10922 }
10923 }
10924
10925 /* flash info */
10926 if (mode <= SSD_DRV_MODE_DEBUG) {
10927 if (dev->hw_info.nr_ctrl > 1) {
10928 val = ssd_reg32_read(dev->ctrlp + SSD_CTRL_VER_REG);
10929 dev->hw_info.ctrl_ver = val & 0xFFF;
10930 hio_info("%s: controller firmware version: %03X\n", dev->name, dev->hw_info.ctrl_ver);
10931 }
10932
10933 val64 = ssd_reg_read(dev->ctrlp + SSD_FLASH_INFO_REG0);
10934 dev->hw_info.nand_vendor_id = ((val64 >> 56) & 0xFF);
10935 dev->hw_info.nand_dev_id = ((val64 >> 48) & 0xFF);
10936
10937 dev->hw_info.block_count = (((val64 >> 32) & 0xFFFF) + 1);
10938 dev->hw_info.page_count = ((val64>>16) & 0xFFFF);
10939 dev->hw_info.page_size = (val64 & 0xFFFF);
10940
10941 val = ssd_reg32_read(dev->ctrlp + SSD_BB_INFO_REG);
10942 dev->hw_info.bbf_pages = val & 0xFF;
10943 dev->hw_info.bbf_seek = (val >> 8) & 0x1;
10944
10945 if (0 == dev->hw_info.block_count || 0 == dev->hw_info.page_count || 0 == dev->hw_info.page_size || dev->hw_info.block_count > INT_MAX) {
10946 hio_warn("%s: flash info error\n", dev->name);
10947 ret = -EINVAL;
10948 goto out;
10949 }
10950
10951 //xx
10952 dev->hw_info.oob_size = SSD_NAND_OOB_SZ; //(dev->hw_info.page_size) >> 5;
10953
10954 val = ssd_reg32_read(dev->ctrlp + SSD_VALID_PAGES_REG);
10955 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
10956 dev->hw_info.valid_pages = val & 0x3FF;
10957 dev->hw_info.max_valid_pages = (val>>20) & 0x3FF;
10958 } else {
10959 dev->hw_info.valid_pages = val & 0x7FFF;
10960 dev->hw_info.max_valid_pages = (val>>15) & 0x7FFF;
10961 }
10962 if (0 == dev->hw_info.valid_pages || 0 == dev->hw_info.max_valid_pages ||
10963 dev->hw_info.valid_pages > dev->hw_info.max_valid_pages || dev->hw_info.max_valid_pages > dev->hw_info.page_count) {
10964 hio_warn("%s: valid page info error: valid_pages %d, max_valid_pages %d\n", dev->name, dev->hw_info.valid_pages, dev->hw_info.max_valid_pages);
10965 ret = -EINVAL;
10966 goto out;
10967 }
10968
10969 val = ssd_reg32_read(dev->ctrlp + SSD_RESERVED_BLKS_REG);
10970 dev->hw_info.reserved_blks = val & 0xFFFF;
10971 dev->hw_info.md_reserved_blks = (val >> 16) & 0xFF;
10972 if (dev->protocol_info.ver <= SSD_PROTOCOL_V3) {
10973 dev->hw_info.md_reserved_blks = SSD_BBT_RESERVED;
10974 }
10975 if (dev->hw_info.reserved_blks > dev->hw_info.block_count || dev->hw_info.md_reserved_blks > dev->hw_info.block_count) {
10976 hio_warn("%s: reserved blocks info error: reserved_blks %d, md_reserved_blks %d\n", dev->name, dev->hw_info.reserved_blks, dev->hw_info.md_reserved_blks);
10977 ret = -EINVAL;
10978 goto out;
10979 }
10980 }
10981
10982 /* size */
10983 if (mode < SSD_DRV_MODE_DEBUG) {
10984 dev->hw_info.size = (uint64_t)dev->hw_info.valid_pages * dev->hw_info.page_size;
10985 dev->hw_info.size *= (dev->hw_info.block_count - dev->hw_info.reserved_blks);
10986 dev->hw_info.size *= ((uint64_t)dev->hw_info.nr_data_ch * (uint64_t)dev->hw_info.nr_chip * (uint64_t)dev->hw_info.nr_ctrl);
10987 }
10988
10989 /* extend hardware info */
10990 val = ssd_reg32_read(dev->ctrlp + SSD_PCB_VER_REG);
10991 dev->hw_info_ext.board_type = (val >> 24) & 0xF;
10992
10993 dev->hw_info_ext.form_factor = SSD_FORM_FACTOR_FHHL;
10994 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2_1) {
10995 dev->hw_info_ext.form_factor = (val >> 31) & 0x1;
10996 }
10997 /*
10998 dev->hw_info_ext.cap_type = (val >> 28) & 0x3;
10999 if (SSD_BM_CAP_VINA != dev->hw_info_ext.cap_type && SSD_BM_CAP_JH != dev->hw_info_ext.cap_type) {
11000 dev->hw_info_ext.cap_type = SSD_BM_CAP_VINA;
11001 }*/
11002
11003 /* power loss protect */
11004 val = ssd_reg32_read(dev->ctrlp + SSD_PLP_INFO_REG);
11005 dev->hw_info_ext.plp_type = (val & 0x3);
11006 if (dev->protocol_info.ver >= SSD_PROTOCOL_V3_2) {
11007 /* 3 or 4 cap */
11008 dev->hw_info_ext.cap_type = ((val >> 2)& 0x1);
11009 }
11010
11011 /* work mode */
11012 val = ssd_reg32_read(dev->ctrlp + SSD_CH_INFO_REG);
11013 dev->hw_info_ext.work_mode = (val >> 25) & 0x1;
11014
11015out:
11016 /* skip error if not in standard mode */
11017 if (mode != SSD_DRV_MODE_STANDARD) {
11018 ret = 0;
11019 }
11020 return ret;
11021}
11022
11023static void ssd_cleanup_response(struct ssd_device *dev)
11024{
11025 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11026 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11027
11028 pci_free_consistent(dev->pdev, resp_ptr_sz, dev->resp_ptr_base, dev->resp_ptr_base_dma);
11029 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11030}
11031
11032static int ssd_init_response(struct ssd_device *dev)
11033{
11034 int resp_msg_sz = dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * SSD_MSIX_VEC;
11035 int resp_ptr_sz = dev->hw_info.resp_ptr_sz * SSD_MSIX_VEC;
11036
11037 dev->resp_msg_base = pci_alloc_consistent(dev->pdev, resp_msg_sz, &(dev->resp_msg_base_dma));
11038 if (!dev->resp_msg_base) {
11039 hio_warn("%s: unable to allocate resp msg DMA buffer\n", dev->name);
11040 goto out_alloc_resp_msg;
11041 }
11042 memset(dev->resp_msg_base, 0xFF, resp_msg_sz);
11043
11044 dev->resp_ptr_base = pci_alloc_consistent(dev->pdev, resp_ptr_sz, &(dev->resp_ptr_base_dma));
11045 if (!dev->resp_ptr_base){
11046 hio_warn("%s: unable to allocate resp ptr DMA buffer\n", dev->name);
11047 goto out_alloc_resp_ptr;
11048 }
11049 memset(dev->resp_ptr_base, 0, resp_ptr_sz);
11050 dev->resp_idx = *(uint32_t *)(dev->resp_ptr_base) = dev->hw_info.cmd_fifo_sz * 2 - 1;
11051
11052 ssd_reg_write(dev->ctrlp + SSD_RESP_FIFO_REG, dev->resp_msg_base_dma);
11053 ssd_reg_write(dev->ctrlp + SSD_RESP_PTR_REG, dev->resp_ptr_base_dma);
11054
11055 return 0;
11056
11057out_alloc_resp_ptr:
11058 pci_free_consistent(dev->pdev, resp_msg_sz, dev->resp_msg_base, dev->resp_msg_base_dma);
11059out_alloc_resp_msg:
11060 return -ENOMEM;
11061}
11062
11063static int ssd_cleanup_cmd(struct ssd_device *dev)
11064{
11065 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11066 int i;
11067
11068 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11069 kfree(dev->cmd[i].sgl);
11070 }
11071 kfree(dev->cmd);
11072 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11073 return 0;
11074}
11075
11076static int ssd_init_cmd(struct ssd_device *dev)
11077{
11078 int sgl_sz = sizeof(struct scatterlist) * dev->hw_info.cmd_max_sg;
11079 int cmd_sz = sizeof(struct ssd_cmd) * dev->hw_info.cmd_fifo_sz;
11080 int msg_sz = ALIGN(sizeof(struct ssd_rw_msg) + (dev->hw_info.cmd_max_sg - 1) * sizeof(struct ssd_sg_entry), SSD_DMA_ALIGN);
11081 int i;
11082
11083 spin_lock_init(&dev->cmd_lock);
11084
11085 dev->msg_base = pci_alloc_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), &dev->msg_base_dma);
11086 if (!dev->msg_base) {
11087 hio_warn("%s: can not alloc cmd msg\n", dev->name);
11088 goto out_alloc_msg;
11089 }
11090
11091 dev->cmd = kmalloc(cmd_sz, GFP_KERNEL);
11092 if (!dev->cmd) {
11093 hio_warn("%s: can not alloc cmd\n", dev->name);
11094 goto out_alloc_cmd;
11095 }
11096 memset(dev->cmd, 0, cmd_sz);
11097
11098 for (i=0; i<(int)dev->hw_info.cmd_fifo_sz; i++) {
11099 dev->cmd[i].sgl = kmalloc(sgl_sz, GFP_KERNEL);
11100 if (!dev->cmd[i].sgl) {
11101 hio_warn("%s: can not alloc cmd sgl %d\n", dev->name, i);
11102 goto out_alloc_sgl;
11103 }
11104
11105 dev->cmd[i].msg = dev->msg_base + (msg_sz * i);
11106 dev->cmd[i].msg_dma = dev->msg_base_dma + ((dma_addr_t)msg_sz * i);
11107
11108 dev->cmd[i].dev = dev;
11109 dev->cmd[i].tag = i;
11110 dev->cmd[i].flag = 0;
11111
11112 INIT_LIST_HEAD(&dev->cmd[i].list);
11113 }
11114
11115 if (dev->protocol_info.ver < SSD_PROTOCOL_V3) {
11116 dev->scmd = ssd_dispatch_cmd;
11117 } else {
11118 ssd_reg_write(dev->ctrlp + SSD_MSG_BASE_REG, dev->msg_base_dma);
11119 if (finject) {
11120 dev->scmd = ssd_send_cmd_db;
11121 } else {
11122 dev->scmd = ssd_send_cmd;
11123 }
11124 }
11125
11126 return 0;
11127
11128out_alloc_sgl:
11129 for (i--; i>=0; i--) {
11130 kfree(dev->cmd[i].sgl);
11131 }
11132 kfree(dev->cmd);
11133out_alloc_cmd:
11134 pci_free_consistent(dev->pdev, (msg_sz * dev->hw_info.cmd_fifo_sz), dev->msg_base, dev->msg_base_dma);
11135out_alloc_msg:
11136 return -ENOMEM;
11137}
11138
11139#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11140static irqreturn_t ssd_interrupt_check(int irq, void *dev_id)
11141{
11142 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11143
11144 if (*(uint32_t *)queue->resp_ptr == queue->resp_idx) {
11145 return IRQ_NONE;
11146 }
11147
11148 return IRQ_WAKE_THREAD;
11149}
11150
11151static irqreturn_t ssd_interrupt_threaded(int irq, void *dev_id)
11152{
11153 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11154 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11155 struct ssd_cmd *cmd;
11156 union ssd_response_msq __msg;
11157 union ssd_response_msq *msg = &__msg;
11158 uint64_t *u64_msg;
11159 uint32_t resp_idx = queue->resp_idx;
11160 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11161 uint32_t end_resp_idx;
11162
11163 if (unlikely(resp_idx == new_resp_idx)) {
11164 return IRQ_NONE;
11165 }
11166
11167 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11168
11169 do {
11170 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11171
11172 /* the resp msg */
11173 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11174 msg->u64_msg = *u64_msg;
11175
11176 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11177 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11178 continue;
11179 }
11180 /* clear the resp msg */
11181 *u64_msg = (uint64_t)(-1);
11182
11183 cmd = &queue->cmd[msg->resp_msg.tag];
11184 /*if (unlikely(!cmd->bio)) {
11185 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11186 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11187 continue;
11188 }*/
11189
11190 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11191 cmd->errors = -EIO;
11192 } else {
11193 cmd->errors = 0;
11194 }
11195 cmd->nr_log = msg->log_resp_msg.nr_log;
11196
11197 ssd_done(cmd);
11198
11199 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11200 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11201 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11202 queue_work(dev->workq, &dev->log_work);
11203 }
11204 }
11205
11206 if (unlikely(msg->resp_msg.status)) {
11207 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11208 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11209 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11210
11211 /* alarm led */
11212 ssd_set_alarm(dev);
11213 queue->io_stat.nr_rwerr++;
11214 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11215 } else {
11216 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11217 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11218
11219 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11220 }
11221 queue->io_stat.nr_ioerr++;
11222 }
11223
11224 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11225 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11226 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11227
11228 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11229 }
11230 }while (resp_idx != end_resp_idx);
11231
11232 queue->resp_idx = new_resp_idx;
11233
11234 return IRQ_HANDLED;
11235}
11236#endif
11237
11238#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11239static irqreturn_t ssd_interrupt(int irq, void *dev_id, struct pt_regs *regs)
11240#else
11241static irqreturn_t ssd_interrupt(int irq, void *dev_id)
11242#endif
11243{
11244 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11245 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11246 struct ssd_cmd *cmd;
11247 union ssd_response_msq __msg;
11248 union ssd_response_msq *msg = &__msg;
11249 uint64_t *u64_msg;
11250 uint32_t resp_idx = queue->resp_idx;
11251 uint32_t new_resp_idx = *(uint32_t *)queue->resp_ptr;
11252 uint32_t end_resp_idx;
11253
11254 if (unlikely(resp_idx == new_resp_idx)) {
11255 return IRQ_NONE;
11256 }
11257
11258#if (defined SSD_ESCAPE_IRQ)
11259 if (SSD_INT_MSIX != dev->int_mode) {
11260 dev->irq_cpu = smp_processor_id();
11261 }
11262#endif
11263
11264 end_resp_idx = new_resp_idx & queue->resp_idx_mask;
11265
11266 do {
11267 resp_idx = (resp_idx + 1) & queue->resp_idx_mask;
11268
11269 /* the resp msg */
11270 u64_msg = (uint64_t *)(queue->resp_msg + queue->resp_msg_sz * resp_idx);
11271 msg->u64_msg = *u64_msg;
11272
11273 if (unlikely(msg->u64_msg == (uint64_t)(-1))) {
11274 hio_err("%s: empty resp msg: queue %d idx %u\n", dev->name, queue->idx, resp_idx);
11275 continue;
11276 }
11277 /* clear the resp msg */
11278 *u64_msg = (uint64_t)(-1);
11279
11280 cmd = &queue->cmd[msg->resp_msg.tag];
11281 /*if (unlikely(!cmd->bio)) {
11282 printk(KERN_WARNING "%s: unknown tag %d fun %#x\n",
11283 dev->name, msg->resp_msg.tag, msg->resp_msg.fun);
11284 continue;
11285 }*/
11286
11287 if(unlikely(msg->resp_msg.status & (uint32_t)status_mask)) {
11288 cmd->errors = -EIO;
11289 } else {
11290 cmd->errors = 0;
11291 }
11292 cmd->nr_log = msg->log_resp_msg.nr_log;
11293
11294 ssd_done_bh(cmd);
11295
11296 if (unlikely(msg->resp_msg.fun != SSD_FUNC_READ_LOG && msg->resp_msg.log > 0)) {
11297 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11298 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11299 queue_work(dev->workq, &dev->log_work);
11300 }
11301 }
11302
11303 if (unlikely(msg->resp_msg.status)) {
11304 if (msg->resp_msg.fun == SSD_FUNC_READ || msg->resp_msg.fun == SSD_FUNC_WRITE) {
11305 hio_err("%s: I/O error %d: tag %d fun %#x\n",
11306 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11307
11308 /* alarm led */
11309 ssd_set_alarm(dev);
11310 queue->io_stat.nr_rwerr++;
11311 ssd_gen_swlog(dev, SSD_LOG_EIO, msg->u32_msg[0]);
11312 } else {
11313 hio_info("%s: CMD error %d: tag %d fun %#x\n",
11314 dev->name, msg->resp_msg.status, msg->resp_msg.tag, msg->resp_msg.fun);
11315
11316 ssd_gen_swlog(dev, SSD_LOG_ECMD, msg->u32_msg[0]);
11317 }
11318 queue->io_stat.nr_ioerr++;
11319 }
11320
11321 if (msg->resp_msg.fun == SSD_FUNC_READ ||
11322 msg->resp_msg.fun == SSD_FUNC_NAND_READ_WOOB ||
11323 msg->resp_msg.fun == SSD_FUNC_NAND_READ) {
11324
11325 queue->ecc_info.bitflip[msg->resp_msg.bitflip]++;
11326 }
11327 }while (resp_idx != end_resp_idx);
11328
11329 queue->resp_idx = new_resp_idx;
11330
11331 return IRQ_HANDLED;
11332}
11333
11334#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11335static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id, struct pt_regs *regs)
11336#else
11337static irqreturn_t ssd_interrupt_legacy(int irq, void *dev_id)
11338#endif
11339{
11340 irqreturn_t ret;
11341 struct ssd_queue *queue = (struct ssd_queue *)dev_id;
11342 struct ssd_device *dev = (struct ssd_device *)queue->dev;
11343
11344#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19))
11345 ret = ssd_interrupt(irq, dev_id, regs);
11346#else
11347 ret = ssd_interrupt(irq, dev_id);
11348#endif
11349
11350 /* clear intr */
11351 if (IRQ_HANDLED == ret) {
11352 ssd_reg32_write(dev->ctrlp + SSD_CLEAR_INTR_REG, 1);
11353 }
11354
11355 return ret;
11356}
11357
11358static void ssd_reset_resp_ptr(struct ssd_device *dev)
11359{
11360 int i;
11361
11362 for (i=0; i<dev->nr_queue; i++) {
11363 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11364 }
11365}
11366
11367static void ssd_free_irq(struct ssd_device *dev)
11368{
11369 int i;
11370
11371#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11372 if (SSD_INT_MSIX == dev->int_mode) {
11373 for (i=0; i<dev->nr_queue; i++) {
11374 irq_set_affinity_hint(dev->entry[i].vector, NULL);
11375 }
11376 }
11377#endif
11378
11379 for (i=0; i<dev->nr_queue; i++) {
11380 free_irq(dev->entry[i].vector, &dev->queue[i]);
11381 }
11382
11383 if (SSD_INT_MSIX == dev->int_mode) {
11384 pci_disable_msix(dev->pdev);
11385 } else if (SSD_INT_MSI == dev->int_mode) {
11386 pci_disable_msi(dev->pdev);
11387 }
11388
11389}
11390
11391static int ssd_init_irq(struct ssd_device *dev)
11392{
11393#if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11394 const struct cpumask *cpu_mask;
11395 static int cpu_affinity = 0;
11396#endif
11397#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11398 const struct cpumask *mask;
11399 static int cpu = 0;
11400 int j;
11401#endif
11402 int i;
11403 unsigned long flags = 0;
11404 int ret = 0;
11405
11406 ssd_reg32_write(dev->ctrlp + SSD_INTR_INTERVAL_REG, 0x800);
11407
11408#ifdef SSD_ESCAPE_IRQ
11409 dev->irq_cpu = -1;
11410#endif
11411
11412 if (int_mode >= SSD_INT_MSIX && pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
11413 dev->nr_queue = SSD_MSIX_VEC;
11414 for (i=0; i<dev->nr_queue; i++) {
11415 dev->entry[i].entry = i;
11416 }
11417 for (;;) {
11418 ret = pci_enable_msix(dev->pdev, dev->entry, dev->nr_queue);
11419 if (ret == 0) {
11420 break;
11421 } else if (ret > 0) {
11422 dev->nr_queue = ret;
11423 } else {
11424 hio_warn("%s: can not enable msix\n", dev->name);
11425 /* alarm led */
11426 ssd_set_alarm(dev);
11427 goto out;
11428 }
11429 }
11430
11431#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11432 mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11433 if ((0 == cpu) || (!cpumask_intersects(mask, cpumask_of(cpu)))) {
11434 cpu = cpumask_first(mask);
11435 }
11436 for (i=0; i<dev->nr_queue; i++) {
11437 irq_set_affinity_hint(dev->entry[i].vector, cpumask_of(cpu));
11438 cpu = cpumask_next(cpu, mask);
11439 if (cpu >= nr_cpu_ids) {
11440 cpu = cpumask_first(mask);
11441 }
11442 }
11443#endif
11444
11445 dev->int_mode = SSD_INT_MSIX;
11446 } else if (int_mode >= SSD_INT_MSI && pci_find_capability(dev->pdev, PCI_CAP_ID_MSI)) {
11447 ret = pci_enable_msi(dev->pdev);
11448 if (ret) {
11449 hio_warn("%s: can not enable msi\n", dev->name);
11450 /* alarm led */
11451 ssd_set_alarm(dev);
11452 goto out;
11453 }
11454
11455 dev->nr_queue = 1;
11456 dev->entry[0].vector = dev->pdev->irq;
11457
11458 dev->int_mode = SSD_INT_MSI;
11459 } else {
11460 dev->nr_queue = 1;
11461 dev->entry[0].vector = dev->pdev->irq;
11462
11463 dev->int_mode = SSD_INT_LEGACY;
11464 }
11465
11466 for (i=0; i<dev->nr_queue; i++) {
11467 if (dev->nr_queue > 1) {
11468 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100-%d", dev->name, i);
11469 } else {
11470 snprintf(dev->queue[i].name, SSD_QUEUE_NAME_LEN, "%s_e100", dev->name);
11471 }
11472
11473 dev->queue[i].dev = dev;
11474 dev->queue[i].idx = i;
11475
11476 dev->queue[i].resp_idx = (dev->hw_info.cmd_fifo_sz * 2) - 1;
11477 dev->queue[i].resp_idx_mask = dev->hw_info.cmd_fifo_sz - 1;
11478
11479 dev->queue[i].resp_msg_sz = dev->hw_info.resp_msg_sz;
11480 dev->queue[i].resp_msg = dev->resp_msg_base + dev->hw_info.resp_msg_sz * dev->hw_info.cmd_fifo_sz * i;
11481 dev->queue[i].resp_ptr = dev->resp_ptr_base + dev->hw_info.resp_ptr_sz * i;
11482 *(uint32_t *)dev->queue[i].resp_ptr = dev->queue[i].resp_idx;
11483
11484 dev->queue[i].cmd = dev->cmd;
11485 }
11486
11487#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))
11488 flags = IRQF_SHARED;
11489#else
11490 flags = SA_SHIRQ;
11491#endif
11492
11493 for (i=0; i<dev->nr_queue; i++) {
11494#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30))
11495 if (threaded_irq) {
11496 ret = request_threaded_irq(dev->entry[i].vector, ssd_interrupt_check, ssd_interrupt_threaded, flags, dev->queue[i].name, &dev->queue[i]);
11497 } else if (dev->int_mode == SSD_INT_LEGACY) {
11498 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11499 } else {
11500 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11501 }
11502#else
11503 if (dev->int_mode == SSD_INT_LEGACY) {
11504 ret = request_irq(dev->entry[i].vector, &ssd_interrupt_legacy, flags, dev->queue[i].name, &dev->queue[i]);
11505 } else {
11506 ret = request_irq(dev->entry[i].vector, &ssd_interrupt, flags, dev->queue[i].name, &dev->queue[i]);
11507 }
11508#endif
11509 if (ret) {
11510 hio_warn("%s: request irq failed\n", dev->name);
11511 /* alarm led */
11512 ssd_set_alarm(dev);
11513 goto out_request_irq;
11514 }
11515
11516#if (!defined MODULE) && (defined SSD_MSIX_AFFINITY_FORCE)
11517 cpu_mask = (dev_to_node(&dev->pdev->dev) == -1) ? cpu_online_mask : cpumask_of_node(dev_to_node(&dev->pdev->dev));
11518 if (SSD_INT_MSIX == dev->int_mode) {
11519 if ((0 == cpu_affinity) || (!cpumask_intersects(mask, cpumask_of(cpu_affinity)))) {
11520 cpu_affinity = cpumask_first(cpu_mask);
11521 }
11522
11523 irq_set_affinity(dev->entry[i].vector, cpumask_of(cpu_affinity));
11524 cpu_affinity = cpumask_next(cpu_affinity, cpu_mask);
11525 if (cpu_affinity >= nr_cpu_ids) {
11526 cpu_affinity = cpumask_first(cpu_mask);
11527 }
11528 }
11529#endif
11530 }
11531
11532 return ret;
11533
11534out_request_irq:
11535#if ((LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) || (defined RHEL_MAJOR && RHEL_MAJOR == 6))
11536 if (SSD_INT_MSIX == dev->int_mode) {
11537 for (j=0; j<dev->nr_queue; j++) {
11538 irq_set_affinity_hint(dev->entry[j].vector, NULL);
11539 }
11540 }
11541#endif
11542
11543 for (i--; i>=0; i--) {
11544 free_irq(dev->entry[i].vector, &dev->queue[i]);
11545 }
11546
11547 if (SSD_INT_MSIX == dev->int_mode) {
11548 pci_disable_msix(dev->pdev);
11549 } else if (SSD_INT_MSI == dev->int_mode) {
11550 pci_disable_msi(dev->pdev);
11551 }
11552
11553out:
11554 return ret;
11555}
11556
11557static void ssd_initial_log(struct ssd_device *dev)
11558{
11559 uint32_t val;
11560 uint32_t speed, width;
11561
11562 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11563 return;
11564 }
11565
11566 val = ssd_reg32_read(dev->ctrlp + SSD_POWER_ON_REG);
11567 if (val) {
11568 ssd_gen_swlog(dev, SSD_LOG_POWER_ON, dev->hw_info.bridge_ver);
11569 }
11570
11571 val = ssd_reg32_read(dev->ctrlp + SSD_PCIE_LINKSTATUS_REG);
11572 speed = val & 0xF;
11573 width = (val >> 4)& 0x3F;
11574 if (0x1 == speed) {
11575 hio_info("%s: PCIe: 2.5GT/s, x%u\n", dev->name, width);
11576 } else if (0x2 == speed) {
11577 hio_info("%s: PCIe: 5GT/s, x%u\n", dev->name, width);
11578 } else {
11579 hio_info("%s: PCIe: unknown GT/s, x%u\n", dev->name, width);
11580 }
11581 ssd_gen_swlog(dev, SSD_LOG_PCIE_LINK_STATUS, val);
11582
11583 return;
11584}
11585
11586#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11587static void ssd_hwmon_worker(void *data)
11588{
11589 struct ssd_device *dev = (struct ssd_device *)data;
11590#else
11591static void ssd_hwmon_worker(struct work_struct *work)
11592{
11593 struct ssd_device *dev = container_of(work, struct ssd_device, hwmon_work);
11594#endif
11595
11596 if (ssd_check_hw(dev)) {
11597 //hio_err("%s: check hardware failed\n", dev->name);
11598 return;
11599 }
11600
11601 ssd_check_clock(dev);
11602 ssd_check_volt(dev);
11603
11604 ssd_mon_boardvolt(dev);
11605}
11606
11607#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11608static void ssd_tempmon_worker(void *data)
11609{
11610 struct ssd_device *dev = (struct ssd_device *)data;
11611#else
11612static void ssd_tempmon_worker(struct work_struct *work)
11613{
11614 struct ssd_device *dev = container_of(work, struct ssd_device, tempmon_work);
11615#endif
11616
11617 if (ssd_check_hw(dev)) {
11618 //hio_err("%s: check hardware failed\n", dev->name);
11619 return;
11620 }
11621
11622 ssd_mon_temp(dev);
11623}
11624
11625
11626#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11627static void ssd_capmon_worker(void *data)
11628{
11629 struct ssd_device *dev = (struct ssd_device *)data;
11630#else
11631static void ssd_capmon_worker(struct work_struct *work)
11632{
11633 struct ssd_device *dev = container_of(work, struct ssd_device, capmon_work);
11634#endif
11635 uint32_t cap = 0;
11636 uint32_t cap_threshold = SSD_PL_CAP_THRESHOLD;
11637 int ret = 0;
11638
11639 if (dev->protocol_info.ver < SSD_PROTOCOL_V3_2) {
11640 return;
11641 }
11642
11643 if (dev->hw_info_ext.form_factor == SSD_FORM_FACTOR_FHHL && dev->hw_info.pcb_ver < 'B') {
11644 return;
11645 }
11646
11647 /* fault before? */
11648 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11649 ret = ssd_check_pl_cap_fast(dev);
11650 if (ret) {
11651 return;
11652 }
11653 }
11654
11655 /* learn */
11656 ret = ssd_do_cap_learn(dev, &cap);
11657 if (ret) {
11658 hio_err("%s: cap learn failed\n", dev->name);
11659 ssd_gen_swlog(dev, SSD_LOG_CAP_LEARN_FAULT, 0);
11660 return;
11661 }
11662
11663 ssd_gen_swlog(dev, SSD_LOG_CAP_STATUS, cap);
11664
11665 if (SSD_PL_CAP_CP == dev->hw_info_ext.cap_type) {
11666 cap_threshold = SSD_PL_CAP_CP_THRESHOLD;
11667 }
11668
11669 //use the fw event id?
11670 if (cap < cap_threshold) {
11671 if (!test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11672 ssd_gen_swlog(dev, SSD_LOG_BATTERY_FAULT, 0);
11673 }
11674 } else if (cap >= (cap_threshold + SSD_PL_CAP_THRESHOLD_HYST)) {
11675 if (test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon)) {
11676 ssd_gen_swlog(dev, SSD_LOG_BATTERY_OK, 0);
11677 }
11678 }
11679}
11680
11681static void ssd_routine_start(void *data)
11682{
11683 struct ssd_device *dev;
11684
11685 if (!data) {
11686 return;
11687 }
11688 dev = data;
11689
11690 dev->routine_tick++;
11691
11692 if (test_bit(SSD_INIT_WORKQ, &dev->state) && !ssd_busy(dev)) {
11693 (void)test_and_set_bit(SSD_LOG_HW, &dev->state);
11694 queue_work(dev->workq, &dev->log_work);
11695 }
11696
11697 if ((dev->routine_tick % SSD_HWMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11698 queue_work(dev->workq, &dev->hwmon_work);
11699 }
11700
11701 if ((dev->routine_tick % SSD_CAPMON_ROUTINE_TICK) == 0 && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11702 queue_work(dev->workq, &dev->capmon_work);
11703 }
11704
11705 if ((dev->routine_tick % SSD_CAPMON2_ROUTINE_TICK) == 0 && test_bit(SSD_HWMON_PL_CAP(SSD_PL_CAP), &dev->hwmon) && test_bit(SSD_INIT_WORKQ, &dev->state)) {
11706 /* CAP fault? check again */
11707 queue_work(dev->workq, &dev->capmon_work);
11708 }
11709
11710 if (test_bit(SSD_INIT_WORKQ, &dev->state)) {
11711 queue_work(dev->workq, &dev->tempmon_work);
11712 }
11713
11714 /* schedule routine */
11715 mod_timer(&dev->routine_timer, jiffies + msecs_to_jiffies(SSD_ROUTINE_INTERVAL));
11716}
11717
11718static void ssd_cleanup_routine(struct ssd_device *dev)
11719{
11720 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11721 return;
11722
11723 (void)ssd_del_timer(&dev->routine_timer);
11724
11725 (void)ssd_del_timer(&dev->bm_timer);
11726}
11727
11728static int ssd_init_routine(struct ssd_device *dev)
11729{
11730 if (unlikely(mode != SSD_DRV_MODE_STANDARD))
11731 return 0;
11732
11733#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
11734 INIT_WORK(&dev->bm_work, ssd_bm_worker, dev);
11735 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker, dev);
11736 INIT_WORK(&dev->capmon_work, ssd_capmon_worker, dev);
11737 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker, dev);
11738#else
11739 INIT_WORK(&dev->bm_work, ssd_bm_worker);
11740 INIT_WORK(&dev->hwmon_work, ssd_hwmon_worker);
11741 INIT_WORK(&dev->capmon_work, ssd_capmon_worker);
11742 INIT_WORK(&dev->tempmon_work, ssd_tempmon_worker);
11743#endif
11744
11745 /* initial log */
11746 ssd_initial_log(dev);
11747
11748 /* schedule bm routine */
11749 ssd_add_timer(&dev->bm_timer, msecs_to_jiffies(SSD_BM_CAP_LEARNING_DELAY), ssd_bm_routine_start, dev);
11750
11751 /* schedule routine */
11752 ssd_add_timer(&dev->routine_timer, msecs_to_jiffies(SSD_ROUTINE_INTERVAL), ssd_routine_start, dev);
11753
11754 return 0;
11755}
11756
11757static void
11758#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11759__devexit
11760#endif
11761ssd_remove_one (struct pci_dev *pdev)
11762{
11763 struct ssd_device *dev;
11764
11765 if (!pdev) {
11766 return;
11767 }
11768
11769 dev = pci_get_drvdata(pdev);
11770 if (!dev) {
11771 return;
11772 }
11773
11774 list_del_init(&dev->list);
11775
11776 ssd_unregister_sysfs(dev);
11777
11778 /* offline firstly */
11779 test_and_clear_bit(SSD_ONLINE, &dev->state);
11780
11781 /* clean work queue first */
11782 if (!dev->slave) {
11783 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
11784 ssd_cleanup_workq(dev);
11785 }
11786
11787 /* flush cache */
11788 (void)ssd_flush(dev);
11789 (void)ssd_save_md(dev);
11790
11791 /* save smart */
11792 if (!dev->slave) {
11793 ssd_save_smart(dev);
11794 }
11795
11796 if (test_and_clear_bit(SSD_INIT_BD, &dev->state)) {
11797 ssd_cleanup_blkdev(dev);
11798 }
11799
11800 if (!dev->slave) {
11801 ssd_cleanup_chardev(dev);
11802 }
11803
11804 /* clean routine */
11805 if (!dev->slave) {
11806 ssd_cleanup_routine(dev);
11807 }
11808
11809 ssd_cleanup_queue(dev);
11810
11811 ssd_cleanup_tag(dev);
11812 ssd_cleanup_thread(dev);
11813
11814 ssd_free_irq(dev);
11815
11816 ssd_cleanup_dcmd(dev);
11817 ssd_cleanup_cmd(dev);
11818 ssd_cleanup_response(dev);
11819
11820 if (!dev->slave) {
11821 ssd_cleanup_log(dev);
11822 }
11823
11824 if (dev->reload_fw) { //reload fw
11825 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
11826 }
11827
11828 /* unmap physical adress */
11829#ifdef LINUX_SUSE_OS
11830 iounmap(dev->ctrlp);
11831#else
11832 pci_iounmap(pdev, dev->ctrlp);
11833#endif
11834
11835 release_mem_region(dev->mmio_base, dev->mmio_len);
11836
11837 pci_disable_device(pdev);
11838
11839 pci_set_drvdata(pdev, NULL);
11840
11841 ssd_put(dev);
11842}
11843
11844static int
11845#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
11846__devinit
11847#endif
11848ssd_init_one(struct pci_dev *pdev,
11849 const struct pci_device_id *ent)
11850{
11851 struct ssd_device *dev;
11852 int ret = 0;
11853
11854 if (!pdev || !ent) {
11855 ret = -EINVAL;
11856 goto out;
11857 }
11858
11859 dev = kmalloc(sizeof(struct ssd_device), GFP_KERNEL);
11860 if (!dev) {
11861 ret = -ENOMEM;
11862 goto out_alloc_dev;
11863 }
11864 memset(dev, 0, sizeof(struct ssd_device));
11865
11866 dev->owner = THIS_MODULE;
11867
11868 if (SSD_SLAVE_PORT_DEVID == ent->device) {
11869 dev->slave = 1;
11870 }
11871
11872 dev->idx = ssd_get_index(dev->slave);
11873 if (dev->idx < 0) {
11874 ret = -ENOMEM;
11875 goto out_get_index;
11876 }
11877
11878 if (!dev->slave) {
11879 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_DEV_NAME);
11880 ssd_set_dev_name(&dev->name[strlen(SSD_DEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_DEV_NAME), dev->idx);
11881
11882 dev->major = ssd_major;
11883 dev->cmajor = ssd_cmajor;
11884 } else {
11885 snprintf(dev->name, SSD_DEV_NAME_LEN, SSD_SDEV_NAME);
11886 ssd_set_dev_name(&dev->name[strlen(SSD_SDEV_NAME)], SSD_DEV_NAME_LEN-strlen(SSD_SDEV_NAME), dev->idx);
11887 dev->major = ssd_major_sl;
11888 dev->cmajor = 0;
11889 }
11890
11891 atomic_set(&(dev->refcnt), 0);
11892 atomic_set(&(dev->tocnt), 0);
11893
11894 mutex_init(&dev->fw_mutex);
11895
11896 //xx
11897 mutex_init(&dev->gd_mutex);
11898
11899 dev->pdev = pdev;
11900 pci_set_drvdata(pdev, dev);
11901
11902 kref_init(&dev->kref);
11903
11904 ret = pci_enable_device(pdev);
11905 if (ret) {
11906 hio_warn("%s: can not enable device\n", dev->name);
11907 goto out_enable_device;
11908 }
11909
11910 pci_set_master(pdev);
11911
11912#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11913 ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
11914#else
11915 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
11916#endif
11917 if (ret) {
11918 hio_warn("%s: set dma mask: failed\n", dev->name);
11919 goto out_set_dma_mask;
11920 }
11921
11922#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31))
11923 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
11924#else
11925 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
11926#endif
11927 if (ret) {
11928 hio_warn("%s: set consistent dma mask: failed\n", dev->name);
11929 goto out_set_dma_mask;
11930 }
11931
11932 dev->mmio_base = pci_resource_start(pdev, 0);
11933 dev->mmio_len = pci_resource_len(pdev, 0);
11934
11935 if (!request_mem_region(dev->mmio_base, dev->mmio_len, SSD_DEV_NAME)) {
11936 hio_warn("%s: can not reserve MMIO region 0\n", dev->name);
11937 ret = -EBUSY;
11938 goto out_request_mem_region;
11939 }
11940
11941 /* 2.6.9 kernel bug */
11942 dev->ctrlp = pci_iomap(pdev, 0, 0);
11943 if (!dev->ctrlp) {
11944 hio_warn("%s: can not remap IO region 0\n", dev->name);
11945 ret = -ENOMEM;
11946 goto out_pci_iomap;
11947 }
11948
11949 ret = ssd_check_hw(dev);
11950 if (ret) {
11951 hio_err("%s: check hardware failed\n", dev->name);
11952 goto out_check_hw;
11953 }
11954
11955 ret = ssd_init_protocol_info(dev);
11956 if (ret) {
11957 hio_err("%s: init protocol info failed\n", dev->name);
11958 goto out_init_protocol_info;
11959 }
11960
11961 /* alarm led ? */
11962 ssd_clear_alarm(dev);
11963
11964 ret = ssd_init_fw_info(dev);
11965 if (ret) {
11966 hio_err("%s: init firmware info failed\n", dev->name);
11967 /* alarm led */
11968 ssd_set_alarm(dev);
11969 goto out_init_fw_info;
11970 }
11971
11972 /* slave port ? */
11973 if (dev->slave) {
11974 goto init_next1;
11975 }
11976
11977 ret = ssd_init_rom_info(dev);
11978 if (ret) {
11979 hio_err("%s: init rom info failed\n", dev->name);
11980 /* alarm led */
11981 ssd_set_alarm(dev);
11982 goto out_init_rom_info;
11983 }
11984
11985 ret = ssd_init_label(dev);
11986 if (ret) {
11987 hio_err("%s: init label failed\n", dev->name);
11988 /* alarm led */
11989 ssd_set_alarm(dev);
11990 goto out_init_label;
11991 }
11992
11993 ret = ssd_init_workq(dev);
11994 if (ret) {
11995 hio_warn("%s: init workq failed\n", dev->name);
11996 goto out_init_workq;
11997 }
11998 (void)test_and_set_bit(SSD_INIT_WORKQ, &dev->state);
11999
12000 ret = ssd_init_log(dev);
12001 if (ret) {
12002 hio_err("%s: init log failed\n", dev->name);
12003 /* alarm led */
12004 ssd_set_alarm(dev);
12005 goto out_init_log;
12006 }
12007
12008 ret = ssd_init_smart(dev);
12009 if (ret) {
12010 hio_err("%s: init info failed\n", dev->name);
12011 /* alarm led */
12012 ssd_set_alarm(dev);
12013 goto out_init_smart;
12014 }
12015
12016init_next1:
12017 ret = ssd_init_hw_info(dev);
12018 if (ret) {
12019 hio_err("%s: init hardware info failed\n", dev->name);
12020 /* alarm led */
12021 ssd_set_alarm(dev);
12022 goto out_init_hw_info;
12023 }
12024
12025 /* slave port ? */
12026 if (dev->slave) {
12027 goto init_next2;
12028 }
12029
12030 ret = ssd_init_sensor(dev);
12031 if (ret) {
12032 hio_err("%s: init sensor failed\n", dev->name);
12033 /* alarm led */
12034 ssd_set_alarm(dev);
12035 goto out_init_sensor;
12036 }
12037
12038 ret = ssd_init_pl_cap(dev);
12039 if (ret) {
12040 hio_err("%s: int pl_cap failed\n", dev->name);
12041 /* alarm led */
12042 ssd_set_alarm(dev);
12043 goto out_init_pl_cap;
12044 }
12045
12046init_next2:
12047 ret = ssd_check_init_state(dev);
12048 if (ret) {
12049 hio_err("%s: check init state failed\n", dev->name);
12050 /* alarm led */
12051 ssd_set_alarm(dev);
12052 goto out_check_init_state;
12053 }
12054
12055 ret = ssd_init_response(dev);
12056 if (ret) {
12057 hio_warn("%s: init resp_msg failed\n", dev->name);
12058 goto out_init_response;
12059 }
12060
12061 ret = ssd_init_cmd(dev);
12062 if (ret) {
12063 hio_warn("%s: init msg failed\n", dev->name);
12064 goto out_init_cmd;
12065 }
12066
12067 ret = ssd_init_dcmd(dev);
12068 if (ret) {
12069 hio_warn("%s: init cmd failed\n", dev->name);
12070 goto out_init_dcmd;
12071 }
12072
12073 ret = ssd_init_irq(dev);
12074 if (ret) {
12075 hio_warn("%s: init irq failed\n", dev->name);
12076 goto out_init_irq;
12077 }
12078
12079 ret = ssd_init_thread(dev);
12080 if (ret) {
12081 hio_warn("%s: init thread failed\n", dev->name);
12082 goto out_init_thread;
12083 }
12084
12085 ret = ssd_init_tag(dev);
12086 if(ret) {
12087 hio_warn("%s: init tags failed\n", dev->name);
12088 goto out_init_tags;
12089 }
12090
12091 /* */
12092 (void)test_and_set_bit(SSD_ONLINE, &dev->state);
12093
12094 ret = ssd_init_queue(dev);
12095 if (ret) {
12096 hio_warn("%s: init queue failed\n", dev->name);
12097 goto out_init_queue;
12098 }
12099
12100 /* slave port ? */
12101 if (dev->slave) {
12102 goto init_next3;
12103 }
12104
12105 ret = ssd_init_ot_protect(dev);
12106 if (ret) {
12107 hio_err("%s: int ot_protect failed\n", dev->name);
12108 /* alarm led */
12109 ssd_set_alarm(dev);
12110 goto out_int_ot_protect;
12111 }
12112
12113 ret = ssd_init_wmode(dev);
12114 if (ret) {
12115 hio_warn("%s: init write mode\n", dev->name);
12116 goto out_init_wmode;
12117 }
12118
12119 /* init routine after hw is ready */
12120 ret = ssd_init_routine(dev);
12121 if (ret) {
12122 hio_warn("%s: init routine\n", dev->name);
12123 goto out_init_routine;
12124 }
12125
12126 ret = ssd_init_chardev(dev);
12127 if (ret) {
12128 hio_warn("%s: register char device failed\n", dev->name);
12129 goto out_init_chardev;
12130 }
12131
12132init_next3:
12133 ret = ssd_init_blkdev(dev);
12134 if (ret) {
12135 hio_warn("%s: register block device failed\n", dev->name);
12136 goto out_init_blkdev;
12137 }
12138 (void)test_and_set_bit(SSD_INIT_BD, &dev->state);
12139
12140 ret = ssd_register_sysfs(dev);
12141 if (ret) {
12142 hio_warn("%s: register sysfs failed\n", dev->name);
12143 goto out_register_sysfs;
12144 }
12145
12146 dev->save_md = 1;
12147
12148 list_add_tail(&dev->list, &ssd_list);
12149
12150 return 0;
12151
12152out_register_sysfs:
12153 test_and_clear_bit(SSD_INIT_BD, &dev->state);
12154 ssd_cleanup_blkdev(dev);
12155out_init_blkdev:
12156 /* slave port ? */
12157 if (!dev->slave) {
12158 ssd_cleanup_chardev(dev);
12159 }
12160out_init_chardev:
12161 /* slave port ? */
12162 if (!dev->slave) {
12163 ssd_cleanup_routine(dev);
12164 }
12165out_init_routine:
12166out_init_wmode:
12167out_int_ot_protect:
12168 ssd_cleanup_queue(dev);
12169out_init_queue:
12170 test_and_clear_bit(SSD_ONLINE, &dev->state);
12171 ssd_cleanup_tag(dev);
12172out_init_tags:
12173 ssd_cleanup_thread(dev);
12174out_init_thread:
12175 ssd_free_irq(dev);
12176out_init_irq:
12177 ssd_cleanup_dcmd(dev);
12178out_init_dcmd:
12179 ssd_cleanup_cmd(dev);
12180out_init_cmd:
12181 ssd_cleanup_response(dev);
12182out_init_response:
12183out_check_init_state:
12184out_init_pl_cap:
12185out_init_sensor:
12186out_init_hw_info:
12187out_init_smart:
12188 /* slave port ? */
12189 if (!dev->slave) {
12190 ssd_cleanup_log(dev);
12191 }
12192out_init_log:
12193 /* slave port ? */
12194 if (!dev->slave) {
12195 test_and_clear_bit(SSD_INIT_WORKQ, &dev->state);
12196 ssd_cleanup_workq(dev);
12197 }
12198out_init_workq:
12199out_init_label:
12200out_init_rom_info:
12201out_init_fw_info:
12202out_init_protocol_info:
12203out_check_hw:
12204#ifdef LINUX_SUSE_OS
12205 iounmap(dev->ctrlp);
12206#else
12207 pci_iounmap(pdev, dev->ctrlp);
12208#endif
12209out_pci_iomap:
12210 release_mem_region(dev->mmio_base, dev->mmio_len);
12211out_request_mem_region:
12212out_set_dma_mask:
12213 pci_disable_device(pdev);
12214out_enable_device:
12215 pci_set_drvdata(pdev, NULL);
12216out_get_index:
12217 kfree(dev);
12218out_alloc_dev:
12219out:
12220 return ret;
12221}
12222
12223static void ssd_cleanup_tasklet(void)
12224{
12225 int i;
12226 for_each_online_cpu(i) {
12227 tasklet_kill(&per_cpu(ssd_tasklet, i));
12228 }
12229}
12230
12231static int ssd_init_tasklet(void)
12232{
12233 int i;
12234
12235 for_each_online_cpu(i) {
12236 INIT_LIST_HEAD(&per_cpu(ssd_doneq, i));
12237
12238 if (finject) {
12239 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done_db, 0);
12240 } else {
12241 tasklet_init(&per_cpu(ssd_tasklet, i), __ssd_done, 0);
12242 }
12243 }
12244
12245 return 0;
12246}
12247
12248static struct pci_device_id ssd_pci_tbl[] = {
12249 { 0x10ee, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* g3 */
12250 { 0x19e5, 0x0007, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 */
12251 //{ 0x19e5, 0x0008, PCI_ANY_ID, PCI_ANY_ID, }, /* v1 sp*/
12252 { 0x19e5, 0x0009, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 */
12253 { 0x19e5, 0x000a, PCI_ANY_ID, PCI_ANY_ID, }, /* v2 dp slave*/
12254 { 0, }
12255};
12256MODULE_DEVICE_TABLE(pci, ssd_pci_tbl);
12257
12258static struct pci_driver ssd_driver = {
12259 .name = MODULE_NAME,
12260 .id_table = ssd_pci_tbl,
12261 .probe = ssd_init_one,
12262#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,38))
12263 .remove = __devexit_p(ssd_remove_one),
12264#else
12265 .remove = ssd_remove_one,
12266#endif
12267};
12268
12269/* notifier block to get a notify on system shutdown/halt/reboot */
12270static int ssd_notify_reboot(struct notifier_block *nb, unsigned long event, void *buf)
12271{
12272 struct ssd_device *dev = NULL;
12273 struct ssd_device *n = NULL;
12274
12275 list_for_each_entry_safe(dev, n, &ssd_list, list) {
12276 ssd_gen_swlog(dev, SSD_LOG_POWER_OFF, 0);
12277
12278 (void)ssd_flush(dev);
12279 (void)ssd_save_md(dev);
12280
12281 /* slave port ? */
12282 if (!dev->slave) {
12283 ssd_save_smart(dev);
12284
12285 ssd_stop_workq(dev);
12286
12287 if (dev->reload_fw) {
12288 ssd_reg32_write(dev->ctrlp + SSD_RELOAD_FW_REG, SSD_RELOAD_FW);
12289 }
12290 }
12291 }
12292
12293 return NOTIFY_OK;
12294}
12295
12296static struct notifier_block ssd_notifier = {
12297 ssd_notify_reboot, NULL, 0
12298};
12299
12300static int __init ssd_init_module(void)
12301{
12302 int ret = 0;
12303
12304 hio_info("driver version: %s\n", DRIVER_VERSION);
12305
12306 ret = ssd_init_index();
12307 if (ret) {
12308 hio_warn("init index failed\n");
12309 goto out_init_index;
12310 }
12311
12312 ret = ssd_init_proc();
12313 if (ret) {
12314 hio_warn("init proc failed\n");
12315 goto out_init_proc;
12316 }
12317
12318 ret = ssd_init_sysfs();
12319 if (ret) {
12320 hio_warn("init sysfs failed\n");
12321 goto out_init_sysfs;
12322 }
12323
12324 ret = ssd_init_tasklet();
12325 if (ret) {
12326 hio_warn("init tasklet failed\n");
12327 goto out_init_tasklet;
12328 }
12329
12330#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12331 ssd_class = class_simple_create(THIS_MODULE, SSD_DEV_NAME);
12332#else
12333 ssd_class = class_create(THIS_MODULE, SSD_DEV_NAME);
12334#endif
12335 if (IS_ERR(ssd_class)) {
12336 ret = PTR_ERR(ssd_class);
12337 goto out_class_create;
12338 }
12339
12340 if (ssd_cmajor > 0) {
12341 ret = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12342 } else {
12343 ret = ssd_cmajor = register_chrdev(ssd_cmajor, SSD_CDEV_NAME, &ssd_cfops);
12344 }
12345 if (ret < 0) {
12346 hio_warn("unable to register chardev major number\n");
12347 goto out_register_chardev;
12348 }
12349
12350 if (ssd_major > 0) {
12351 ret = register_blkdev(ssd_major, SSD_DEV_NAME);
12352 } else {
12353 ret = ssd_major = register_blkdev(ssd_major, SSD_DEV_NAME);
12354 }
12355 if (ret < 0) {
12356 hio_warn("unable to register major number\n");
12357 goto out_register_blkdev;
12358 }
12359
12360 if (ssd_major_sl > 0) {
12361 ret = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12362 } else {
12363 ret = ssd_major_sl = register_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12364 }
12365 if (ret < 0) {
12366 hio_warn("unable to register slave major number\n");
12367 goto out_register_blkdev_sl;
12368 }
12369
12370 if (mode < SSD_DRV_MODE_STANDARD || mode > SSD_DRV_MODE_BASE) {
12371 mode = SSD_DRV_MODE_STANDARD;
12372 }
12373
12374 /* for debug */
12375 if (mode != SSD_DRV_MODE_STANDARD) {
12376 ssd_minors = 1;
12377 }
12378
12379 if (int_mode < SSD_INT_LEGACY || int_mode > SSD_INT_MSIX) {
12380 int_mode = SSD_INT_MODE_DEFAULT;
12381 }
12382
12383 if (threaded_irq) {
12384 int_mode = SSD_INT_MSI;
12385 }
12386
12387 if (log_level >= SSD_LOG_NR_LEVEL || log_level < SSD_LOG_LEVEL_INFO) {
12388 log_level = SSD_LOG_LEVEL_ERR;
12389 }
12390
12391 if (wmode < SSD_WMODE_BUFFER || wmode > SSD_WMODE_DEFAULT) {
12392 wmode = SSD_WMODE_DEFAULT;
12393 }
12394
12395#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20))
12396 ret = pci_module_init(&ssd_driver);
12397#else
12398 ret = pci_register_driver(&ssd_driver);
12399#endif
12400 if (ret) {
12401 hio_warn("pci init failed\n");
12402 goto out_pci_init;
12403 }
12404
12405 ret = register_reboot_notifier(&ssd_notifier);
12406 if (ret) {
12407 hio_warn("register reboot notifier failed\n");
12408 goto out_register_reboot_notifier;
12409 }
12410
12411 return 0;
12412
12413out_register_reboot_notifier:
12414out_pci_init:
12415 pci_unregister_driver(&ssd_driver);
12416 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12417out_register_blkdev_sl:
12418 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12419out_register_blkdev:
12420 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12421out_register_chardev:
12422#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12423 class_simple_destroy(ssd_class);
12424#else
12425 class_destroy(ssd_class);
12426#endif
12427out_class_create:
12428 ssd_cleanup_tasklet();
12429out_init_tasklet:
12430 ssd_cleanup_sysfs();
12431out_init_sysfs:
12432 ssd_cleanup_proc();
12433out_init_proc:
12434 ssd_cleanup_index();
12435out_init_index:
12436 return ret;
12437
12438}
12439
12440static void __exit ssd_cleanup_module(void)
12441{
12442
12443 hio_info("unload driver: %s\n", DRIVER_VERSION);
12444 /* exiting */
12445 ssd_exiting = 1;
12446
12447 unregister_reboot_notifier(&ssd_notifier);
12448
12449 pci_unregister_driver(&ssd_driver);
12450
12451 unregister_blkdev(ssd_major_sl, SSD_SDEV_NAME);
12452 unregister_blkdev(ssd_major, SSD_DEV_NAME);
12453 unregister_chrdev(ssd_cmajor, SSD_CDEV_NAME);
12454#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,12))
12455 class_simple_destroy(ssd_class);
12456#else
12457 class_destroy(ssd_class);
12458#endif
12459
12460 ssd_cleanup_tasklet();
12461 ssd_cleanup_sysfs();
12462 ssd_cleanup_proc();
12463 ssd_cleanup_index();
12464}
12465
12466int ssd_register_event_notifier(struct block_device *bdev, ssd_event_call event_call)
12467{
12468 struct ssd_device *dev;
12469 struct timeval tv;
12470 struct ssd_log *le;
12471 uint64_t cur;
12472 int log_nr;
12473
12474 if (!bdev || !event_call || !(bdev->bd_disk)) {
12475 return -EINVAL;
12476 }
12477
12478 dev = bdev->bd_disk->private_data;
12479 dev->event_call = event_call;
12480
12481 do_gettimeofday(&tv);
12482 cur = tv.tv_sec;
12483
12484 le = (struct ssd_log *)(dev->internal_log.log);
12485 log_nr = dev->internal_log.nr_log;
12486
12487 while (log_nr--) {
12488 if (le->time <= cur && le->time >= dev->uptime) {
12489 (void)dev->event_call(dev->gd, le->le.event, ssd_parse_log(dev, le, 0));
12490 }
12491 le++;
12492 }
12493
12494 return 0;
12495}
12496
12497int ssd_unregister_event_notifier(struct block_device *bdev)
12498{
12499 struct ssd_device *dev;
12500
12501 if (!bdev || !(bdev->bd_disk)) {
12502 return -EINVAL;
12503 }
12504
12505 dev = bdev->bd_disk->private_data;
12506 dev->event_call = NULL;
12507
12508 return 0;
12509}
12510
12511EXPORT_SYMBOL(ssd_get_label);
12512EXPORT_SYMBOL(ssd_get_version);
12513EXPORT_SYMBOL(ssd_set_otprotect);
12514EXPORT_SYMBOL(ssd_bm_status);
12515EXPORT_SYMBOL(ssd_submit_pbio);
12516EXPORT_SYMBOL(ssd_get_pciaddr);
12517EXPORT_SYMBOL(ssd_get_temperature);
12518EXPORT_SYMBOL(ssd_register_event_notifier);
12519EXPORT_SYMBOL(ssd_unregister_event_notifier);
12520EXPORT_SYMBOL(ssd_reset);
12521EXPORT_SYMBOL(ssd_set_wmode);
12522
12523
12524
12525module_init(ssd_init_module);
12526module_exit(ssd_cleanup_module);
12527MODULE_VERSION(DRIVER_VERSION);
12528MODULE_LICENSE("GPL");
12529MODULE_AUTHOR("Huawei SSD DEV Team");
12530MODULE_DESCRIPTION("Huawei SSD driver");