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UBUNTU: SAUCE: xr-usb-serial: Changes to support updates in struct gpio_chip
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1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
15 */
16
a0b8e0a5 17#include <linux/gpio/driver.h>
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18/*
19 * CMSPAR, some architectures can't have space and mark parity.
20 */
21
22#ifndef CMSPAR
23#define CMSPAR 0
24#endif
25
26/*
27 * Major and minor numbers.
28 */
29
30#define XR_USB_SERIAL_TTY_MAJOR 266
31#define XR_USB_SERIAL_TTY_MINORS 32
32
33/*
34 * Requests.
35 */
36
37#define USB_RT_XR_USB_SERIAL (USB_TYPE_CLASS | USB_RECIP_INTERFACE)
38
39/*
40 * Output control lines.
41 */
42
43#define XR_USB_SERIAL_CTRL_DTR 0x01
44#define XR_USB_SERIAL_CTRL_RTS 0x02
45
46/*
47 * Input control lines and line errors.
48 */
49
50#define XR_USB_SERIAL_CTRL_DCD 0x01
51#define XR_USB_SERIAL_CTRL_DSR 0x02
52#define XR_USB_SERIAL_CTRL_BRK 0x04
53#define XR_USB_SERIAL_CTRL_RI 0x08
54
55#define XR_USB_SERIAL_CTRL_FRAMING 0x10
56#define XR_USB_SERIAL_CTRL_PARITY 0x20
57#define XR_USB_SERIAL_CTRL_OVERRUN 0x40
58
59/*
60 * Internal driver structures.
61 */
62
63/*
64 * The only reason to have several buffers is to accommodate assumptions
65 * in line disciplines. They ask for empty space amount, receive our URB size,
66 * and proceed to issue several 1-character writes, assuming they will fit.
67 * The very first write takes a complete URB. Fortunately, this only happens
68 * when processing onlcr, so we only need 2 buffers. These values must be
69 * powers of 2.
70 */
71#define XR_USB_SERIAL_NW 16
72#define XR_USB_SERIAL_NR 16
73
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74#define RAMCTL_BUFFER_PARITY 0x1
75#define RAMCTL_BUFFER_BREAK 0x2
76#define RAMCTL_BUFFER_FRAME 0x4
77#define RAMCTL_BUFFER_OVERRUN 0x8
78
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79struct xr_usb_serial_wb {
80 unsigned char *buf;
81 dma_addr_t dmah;
82 int len;
83 int use;
84 struct urb *urb;
85 struct xr_usb_serial *instance;
86};
87
88struct xr_usb_serial_rb {
89 int size;
90 unsigned char *base;
91 dma_addr_t dma;
92 int index;
93 struct xr_usb_serial *instance;
94};
95
96struct reg_addr_map {
97 unsigned int uart_enable_addr;
98 unsigned int uart_format_addr;
99 unsigned int uart_flow_addr;
100 unsigned int uart_loopback_addr;
101 unsigned int uart_xon_char_addr;
102 unsigned int uart_xoff_char_addr;
103 unsigned int uart_gpio_mode_addr;
104 unsigned int uart_gpio_dir_addr;
105 unsigned int uart_gpio_set_addr;
106 unsigned int uart_gpio_clr_addr;
107 unsigned int uart_gpio_status_addr;
108 unsigned int tx_break_addr;
109 unsigned int uart_custom_driver;
110 unsigned int uart_low_latency;
111};
112
113struct xr_usb_serial {
114 struct usb_device *dev; /* the corresponding usb device */
115 struct usb_interface *control; /* control interface */
116 struct usb_interface *data; /* data interface */
117 struct tty_port port; /* our tty port data */
118 struct urb *ctrlurb; /* urbs */
119 u8 *ctrl_buffer; /* buffers of urbs */
120 dma_addr_t ctrl_dma; /* dma handles of buffers */
121 u8 *country_codes; /* country codes from device */
122 unsigned int country_code_size; /* size of this buffer */
123 unsigned int country_rel_date; /* release date of version */
124 struct xr_usb_serial_wb wb[XR_USB_SERIAL_NW];
125 unsigned long read_urbs_free;
126 struct urb *read_urbs[XR_USB_SERIAL_NR];
127 struct xr_usb_serial_rb read_buffers[XR_USB_SERIAL_NR];
128 int rx_buflimit;
129 int rx_endpoint;
130 spinlock_t read_lock;
131 int write_used; /* number of non-empty write buffers */
132 int transmitting;
133 spinlock_t write_lock;
134 struct mutex mutex;
135 bool disconnected;
136 struct usb_cdc_line_coding line; /* bits, stop, parity */
137 struct work_struct work; /* work queue entry for line discipline waking up */
138 unsigned int ctrlin; /* input control lines (DCD, DSR, RI, break, overruns) */
139 unsigned int ctrlout; /* output control lines (DTR, RTS) */
140 unsigned int writesize; /* max packet size for the output bulk endpoint */
141 unsigned int readsize,ctrlsize; /* buffer sizes for freeing */
142 unsigned int minor; /* xr_usb_serial minor number */
143 unsigned char clocal; /* termios CLOCAL */
144 unsigned int ctrl_caps; /* control capabilities from the class specific header */
145 unsigned int susp_count; /* number of suspended interfaces */
146 unsigned int combined_interfaces:1; /* control and data collapsed */
147 unsigned int is_int_ep:1; /* interrupt endpoints contrary to spec used */
148 unsigned int throttled:1; /* actually throttled */
149 unsigned int throttle_req:1; /* throttle requested */
150 u8 bInterval;
151 struct xr_usb_serial_wb *delayed_wb; /* write queued for a device about to be woken */
152 unsigned int channel;
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153 int preciseflags; /* USB: wide mode, TTY: flags per character */
154 int trans9; /* USB: wide mode, serial 9N1 */
155 int have_extra_byte;
156 int extra_byte;
157
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158 unsigned short DeviceVendor;
159 unsigned short DeviceProduct;
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160#ifdef CONFIG_GPIOLIB
161 struct gpio_chip xr_usb_gpio;
162#endif
20c310e9 163 struct reg_addr_map reg_map;
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164 int found_smbios_exar_config;
165 unsigned char channel_config;
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166};
167
168#define CDC_DATA_INTERFACE_TYPE 0x0a
169
170/* constants describing various quirks and errors */
171#define NO_UNION_NORMAL 1
172#define SINGLE_RX_URB 2
173#define NO_CAP_LINE 4
174#define NOT_A_MODEM 8
175#define NO_DATA_INTERFACE 16
176#define IGNORE_DEVICE 32
177
178
179#define UART_ENABLE_TX 1
180#define UART_ENABLE_RX 2
181
182#define UART_GPIO_CLR_DTR 0x8
183#define UART_GPIO_SET_DTR 0x8
184#define UART_GPIO_CLR_RTS 0x20
185#define UART_GPIO_SET_RTS 0x20
186
187#define LOOPBACK_ENABLE_TX_RX 1
188#define LOOPBACK_ENABLE_RTS_CTS 2
189#define LOOPBACK_ENABLE_DTR_DSR 4
190
191#define UART_FLOW_MODE_NONE 0x0
192#define UART_FLOW_MODE_HW 0x1
193#define UART_FLOW_MODE_SW 0x2
194
195#define UART_GPIO_MODE_SEL_GPIO 0x0
196#define UART_GPIO_MODE_SEL_RTS_CTS 0x1
197
198#define XR2280x_FUNC_MGR_OFFSET 0x40
199
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