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Update upstream source from tag 'upstream/1.52.1+dfsg1'
[rustc.git] / vendor / rustc-ap-rustc_target / src / asm / mips.rs
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1use super::{InlineAsmArch, InlineAsmType};
2use rustc_macros::HashStable_Generic;
3use std::fmt;
4
5def_reg_class! {
6 Mips MipsInlineAsmRegClass {
7 reg,
8 freg,
9 }
10}
11
12impl MipsInlineAsmRegClass {
13 pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
14 &[]
15 }
16
17 pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
18 None
19 }
20
21 pub fn suggest_modifier(
22 self,
23 _arch: InlineAsmArch,
24 _ty: InlineAsmType,
25 ) -> Option<(char, &'static str)> {
26 None
27 }
28
29 pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
30 None
31 }
32
33 pub fn supported_types(
34 self,
35 arch: InlineAsmArch,
36 ) -> &'static [(InlineAsmType, Option<&'static str>)] {
37 match (self, arch) {
38 (Self::reg, InlineAsmArch::Mips64) => types! { _: I8, I16, I32, I64, F32, F64; },
39 (Self::reg, _) => types! { _: I8, I16, I32, F32; },
40 (Self::freg, _) => types! { _: F32, F64; },
41 }
42 }
43}
44
45// The reserved registers are somewhat taken from <https://git.io/JUR1k#L150>.
46def_regs! {
47 Mips MipsInlineAsmReg MipsInlineAsmRegClass {
48 r2: reg = ["$2"],
49 r3: reg = ["$3"],
50 r4: reg = ["$4"],
51 r5: reg = ["$5"],
52 r6: reg = ["$6"],
53 r7: reg = ["$7"],
54 // FIXME: Reserve $t0, $t1 if in mips16 mode.
55 r8: reg = ["$8"],
56 r9: reg = ["$9"],
57 r10: reg = ["$10"],
58 r11: reg = ["$11"],
59 r12: reg = ["$12"],
60 r13: reg = ["$13"],
61 r14: reg = ["$14"],
62 r15: reg = ["$15"],
63 r16: reg = ["$16"],
64 r17: reg = ["$17"],
65 r18: reg = ["$18"],
66 r19: reg = ["$19"],
67 r20: reg = ["$20"],
68 r21: reg = ["$21"],
69 r22: reg = ["$22"],
70 r23: reg = ["$23"],
71 r24: reg = ["$24"],
72 r25: reg = ["$25"],
73 f0: freg = ["$f0"],
74 f1: freg = ["$f1"],
75 f2: freg = ["$f2"],
76 f3: freg = ["$f3"],
77 f4: freg = ["$f4"],
78 f5: freg = ["$f5"],
79 f6: freg = ["$f6"],
80 f7: freg = ["$f7"],
81 f8: freg = ["$f8"],
82 f9: freg = ["$f9"],
83 f10: freg = ["$f10"],
84 f11: freg = ["$f11"],
85 f12: freg = ["$f12"],
86 f13: freg = ["$f13"],
87 f14: freg = ["$f14"],
88 f15: freg = ["$f15"],
89 f16: freg = ["$f16"],
90 f17: freg = ["$f17"],
91 f18: freg = ["$f18"],
92 f19: freg = ["$f19"],
93 f20: freg = ["$f20"],
94 f21: freg = ["$f21"],
95 f22: freg = ["$f22"],
96 f23: freg = ["$f23"],
97 f24: freg = ["$f24"],
98 f25: freg = ["$f25"],
99 f26: freg = ["$f26"],
100 f27: freg = ["$f27"],
101 f28: freg = ["$f28"],
102 f29: freg = ["$f29"],
103 f30: freg = ["$f30"],
104 f31: freg = ["$f31"],
105 #error = ["$0"] =>
106 "constant zero cannot be used as an operand for inline asm",
107 #error = ["$1"] =>
108 "reserved for assembler (Assembler Temp)",
109 #error = ["$26"] =>
110 "OS-reserved register cannot be used as an operand for inline asm",
111 #error = ["$27"] =>
112 "OS-reserved register cannot be used as an operand for inline asm",
113 #error = ["$28"] =>
114 "the global pointer cannot be used as an operand for inline asm",
115 #error = ["$29"] =>
116 "the stack pointer cannot be used as an operand for inline asm",
117 #error = ["$30"] =>
118 "the frame pointer cannot be used as an operand for inline asm",
119 #error = ["$31"] =>
120 "the return address register cannot be used as an operand for inline asm",
121 }
122}
123
124impl MipsInlineAsmReg {
125 pub fn emit(
126 self,
127 out: &mut dyn fmt::Write,
128 _arch: InlineAsmArch,
129 _modifier: Option<char>,
130 ) -> fmt::Result {
131 out.write_str(self.name())
132 }
133}