]>
Commit | Line | Data |
---|---|---|
53e72406 MZ |
1 | /* |
2 | * Copyright (C) 2012 ARM Ltd. | |
3 | * Author: Marc Zyngier <marc.zyngier@arm.com> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | */ | |
18 | ||
19 | #include <linux/cpu.h> | |
20 | #include <linux/of_irq.h> | |
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_host.h> | |
23 | #include <linux/interrupt.h> | |
24 | ||
372b7c1b | 25 | #include <clocksource/arm_arch_timer.h> |
53e72406 MZ |
26 | #include <asm/arch_timer.h> |
27 | ||
7275acdf MZ |
28 | #include <kvm/arm_vgic.h> |
29 | #include <kvm/arm_arch_timer.h> | |
53e72406 MZ |
30 | |
31 | static struct timecounter *timecounter; | |
32 | static struct workqueue_struct *wqueue; | |
5ae7f87a | 33 | static unsigned int host_vtimer_irq; |
53e72406 MZ |
34 | |
35 | static cycle_t kvm_phys_timer_read(void) | |
36 | { | |
37 | return timecounter->cc->read(timecounter->cc); | |
38 | } | |
39 | ||
40 | static bool timer_is_armed(struct arch_timer_cpu *timer) | |
41 | { | |
42 | return timer->armed; | |
43 | } | |
44 | ||
45 | /* timer_arm: as in "arm the timer", not as in ARM the company */ | |
46 | static void timer_arm(struct arch_timer_cpu *timer, u64 ns) | |
47 | { | |
48 | timer->armed = true; | |
49 | hrtimer_start(&timer->timer, ktime_add_ns(ktime_get(), ns), | |
50 | HRTIMER_MODE_ABS); | |
51 | } | |
52 | ||
53 | static void timer_disarm(struct arch_timer_cpu *timer) | |
54 | { | |
55 | if (timer_is_armed(timer)) { | |
56 | hrtimer_cancel(&timer->timer); | |
57 | cancel_work_sync(&timer->expired); | |
58 | timer->armed = false; | |
59 | } | |
60 | } | |
61 | ||
62 | static void kvm_timer_inject_irq(struct kvm_vcpu *vcpu) | |
63 | { | |
64 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
65 | ||
372b7c1b | 66 | timer->cntv_ctl |= ARCH_TIMER_CTRL_IT_MASK; |
53e72406 | 67 | kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id, |
5ae7f87a AP |
68 | timer->irq->irq, |
69 | timer->irq->level); | |
53e72406 MZ |
70 | } |
71 | ||
72 | static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id) | |
73 | { | |
74 | struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id; | |
75 | ||
76 | /* | |
77 | * We disable the timer in the world switch and let it be | |
78 | * handled by kvm_timer_sync_hwstate(). Getting a timer | |
79 | * interrupt at this point is a sure sign of some major | |
80 | * breakage. | |
81 | */ | |
82 | pr_warn("Unexpected interrupt %d on vcpu %p\n", irq, vcpu); | |
83 | return IRQ_HANDLED; | |
84 | } | |
85 | ||
86 | static void kvm_timer_inject_irq_work(struct work_struct *work) | |
87 | { | |
88 | struct kvm_vcpu *vcpu; | |
89 | ||
90 | vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired); | |
91 | vcpu->arch.timer_cpu.armed = false; | |
92 | kvm_timer_inject_irq(vcpu); | |
93 | } | |
94 | ||
95 | static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt) | |
96 | { | |
97 | struct arch_timer_cpu *timer; | |
98 | timer = container_of(hrt, struct arch_timer_cpu, timer); | |
99 | queue_work(wqueue, &timer->expired); | |
100 | return HRTIMER_NORESTART; | |
101 | } | |
102 | ||
103 | /** | |
104 | * kvm_timer_flush_hwstate - prepare to move the virt timer to the cpu | |
105 | * @vcpu: The vcpu pointer | |
106 | * | |
107 | * Disarm any pending soft timers, since the world-switch code will write the | |
108 | * virtual timer state back to the physical CPU. | |
109 | */ | |
110 | void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) | |
111 | { | |
112 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
113 | ||
114 | /* | |
115 | * We're about to run this vcpu again, so there is no need to | |
116 | * keep the background timer running, as we're about to | |
117 | * populate the CPU timer again. | |
118 | */ | |
119 | timer_disarm(timer); | |
120 | } | |
121 | ||
122 | /** | |
123 | * kvm_timer_sync_hwstate - sync timer state from cpu | |
124 | * @vcpu: The vcpu pointer | |
125 | * | |
126 | * Check if the virtual timer was armed and either schedule a corresponding | |
127 | * soft timer or inject directly if already expired. | |
128 | */ | |
129 | void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu) | |
130 | { | |
131 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
132 | cycle_t cval, now; | |
133 | u64 ns; | |
134 | ||
372b7c1b MR |
135 | if ((timer->cntv_ctl & ARCH_TIMER_CTRL_IT_MASK) || |
136 | !(timer->cntv_ctl & ARCH_TIMER_CTRL_ENABLE)) | |
53e72406 MZ |
137 | return; |
138 | ||
139 | cval = timer->cntv_cval; | |
140 | now = kvm_phys_timer_read() - vcpu->kvm->arch.timer.cntvoff; | |
141 | ||
142 | BUG_ON(timer_is_armed(timer)); | |
143 | ||
144 | if (cval <= now) { | |
145 | /* | |
146 | * Timer has already expired while we were not | |
147 | * looking. Inject the interrupt and carry on. | |
148 | */ | |
149 | kvm_timer_inject_irq(vcpu); | |
150 | return; | |
151 | } | |
152 | ||
153 | ns = cyclecounter_cyc2ns(timecounter->cc, cval - now); | |
154 | timer_arm(timer, ns); | |
155 | } | |
156 | ||
5ae7f87a AP |
157 | void kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu, |
158 | const struct kvm_irq_level *irq) | |
159 | { | |
160 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
161 | ||
162 | /* | |
163 | * The vcpu timer irq number cannot be determined in | |
164 | * kvm_timer_vcpu_init() because it is called much before | |
165 | * kvm_vcpu_set_target(). To handle this, we determine | |
166 | * vcpu timer irq number when the vcpu is reset. | |
167 | */ | |
168 | timer->irq = irq; | |
169 | } | |
170 | ||
53e72406 MZ |
171 | void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu) |
172 | { | |
173 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
174 | ||
175 | INIT_WORK(&timer->expired, kvm_timer_inject_irq_work); | |
176 | hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS); | |
177 | timer->timer.function = kvm_timer_expire; | |
53e72406 MZ |
178 | } |
179 | ||
180 | static void kvm_timer_init_interrupt(void *info) | |
181 | { | |
5ae7f87a | 182 | enable_percpu_irq(host_vtimer_irq, 0); |
53e72406 MZ |
183 | } |
184 | ||
185 | ||
186 | static int kvm_timer_cpu_notify(struct notifier_block *self, | |
187 | unsigned long action, void *cpu) | |
188 | { | |
189 | switch (action) { | |
190 | case CPU_STARTING: | |
191 | case CPU_STARTING_FROZEN: | |
192 | kvm_timer_init_interrupt(NULL); | |
193 | break; | |
194 | case CPU_DYING: | |
195 | case CPU_DYING_FROZEN: | |
5ae7f87a | 196 | disable_percpu_irq(host_vtimer_irq); |
53e72406 MZ |
197 | break; |
198 | } | |
199 | ||
200 | return NOTIFY_OK; | |
201 | } | |
202 | ||
203 | static struct notifier_block kvm_timer_cpu_nb = { | |
204 | .notifier_call = kvm_timer_cpu_notify, | |
205 | }; | |
206 | ||
207 | static const struct of_device_id arch_timer_of_match[] = { | |
208 | { .compatible = "arm,armv7-timer", }, | |
f61701e0 | 209 | { .compatible = "arm,armv8-timer", }, |
53e72406 MZ |
210 | {}, |
211 | }; | |
212 | ||
213 | int kvm_timer_hyp_init(void) | |
214 | { | |
215 | struct device_node *np; | |
216 | unsigned int ppi; | |
217 | int err; | |
218 | ||
219 | timecounter = arch_timer_get_timecounter(); | |
220 | if (!timecounter) | |
221 | return -ENODEV; | |
222 | ||
223 | np = of_find_matching_node(NULL, arch_timer_of_match); | |
224 | if (!np) { | |
225 | kvm_err("kvm_arch_timer: can't find DT node\n"); | |
226 | return -ENODEV; | |
227 | } | |
228 | ||
229 | ppi = irq_of_parse_and_map(np, 2); | |
230 | if (!ppi) { | |
231 | kvm_err("kvm_arch_timer: no virtual timer interrupt\n"); | |
232 | err = -EINVAL; | |
233 | goto out; | |
234 | } | |
235 | ||
236 | err = request_percpu_irq(ppi, kvm_arch_timer_handler, | |
237 | "kvm guest timer", kvm_get_running_vcpus()); | |
238 | if (err) { | |
239 | kvm_err("kvm_arch_timer: can't request interrupt %d (%d)\n", | |
240 | ppi, err); | |
241 | goto out; | |
242 | } | |
243 | ||
5ae7f87a | 244 | host_vtimer_irq = ppi; |
53e72406 MZ |
245 | |
246 | err = register_cpu_notifier(&kvm_timer_cpu_nb); | |
247 | if (err) { | |
248 | kvm_err("Cannot register timer CPU notifier\n"); | |
249 | goto out_free; | |
250 | } | |
251 | ||
252 | wqueue = create_singlethread_workqueue("kvm_arch_timer"); | |
253 | if (!wqueue) { | |
254 | err = -ENOMEM; | |
255 | goto out_free; | |
256 | } | |
257 | ||
258 | kvm_info("%s IRQ%d\n", np->name, ppi); | |
259 | on_each_cpu(kvm_timer_init_interrupt, NULL, 1); | |
260 | ||
261 | goto out; | |
262 | out_free: | |
263 | free_percpu_irq(ppi, kvm_get_running_vcpus()); | |
264 | out: | |
265 | of_node_put(np); | |
266 | return err; | |
267 | } | |
268 | ||
269 | void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu) | |
270 | { | |
271 | struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; | |
272 | ||
273 | timer_disarm(timer); | |
274 | } | |
275 | ||
276 | int kvm_timer_init(struct kvm *kvm) | |
277 | { | |
278 | if (timecounter && wqueue) { | |
279 | kvm->arch.timer.cntvoff = kvm_phys_timer_read(); | |
280 | kvm->arch.timer.enabled = 1; | |
281 | } | |
282 | ||
283 | return 0; | |
284 | } |