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1/*
2 * Copyright (C) 2012 ARM Ltd.
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#include <linux/cpu.h>
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20#include <linux/kvm.h>
21#include <linux/kvm_host.h>
22#include <linux/interrupt.h>
b452cb52 23#include <linux/irq.h>
99a1db7a 24#include <linux/uaccess.h>
53e72406 25
372b7c1b 26#include <clocksource/arm_arch_timer.h>
53e72406 27#include <asm/arch_timer.h>
488f94d7 28#include <asm/kvm_hyp.h>
53e72406 29
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30#include <kvm/arm_vgic.h>
31#include <kvm/arm_arch_timer.h>
53e72406 32
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33#include "trace.h"
34
53e72406 35static struct timecounter *timecounter;
5ae7f87a 36static unsigned int host_vtimer_irq;
cabdc5c5 37static u32 host_vtimer_irq_flags;
53e72406 38
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39static const struct kvm_irq_level default_ptimer_irq = {
40 .irq = 30,
41 .level = 1,
42};
43
44static const struct kvm_irq_level default_vtimer_irq = {
45 .irq = 27,
46 .level = 1,
47};
48
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49void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
50{
fbb4aeec 51 vcpu_vtimer(vcpu)->active_cleared_last = false;
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52}
53
7b6b4631 54u64 kvm_phys_timer_read(void)
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55{
56 return timecounter->cc->read(timecounter->cc);
57}
58
59static bool timer_is_armed(struct arch_timer_cpu *timer)
60{
61 return timer->armed;
62}
63
64/* timer_arm: as in "arm the timer", not as in ARM the company */
65static void timer_arm(struct arch_timer_cpu *timer, u64 ns)
66{
67 timer->armed = true;
68 hrtimer_start(&timer->timer, ktime_add_ns(ktime_get(), ns),
69 HRTIMER_MODE_ABS);
70}
71
72static void timer_disarm(struct arch_timer_cpu *timer)
73{
74 if (timer_is_armed(timer)) {
75 hrtimer_cancel(&timer->timer);
76 cancel_work_sync(&timer->expired);
77 timer->armed = false;
78 }
79}
80
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81static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
82{
83 struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
84
85 /*
86 * We disable the timer in the world switch and let it be
87 * handled by kvm_timer_sync_hwstate(). Getting a timer
88 * interrupt at this point is a sure sign of some major
89 * breakage.
90 */
91 pr_warn("Unexpected interrupt %d on vcpu %p\n", irq, vcpu);
92 return IRQ_HANDLED;
93}
94
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95/*
96 * Work function for handling the backup timer that we schedule when a vcpu is
97 * no longer running, but had a timer programmed to fire in the future.
98 */
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99static void kvm_timer_inject_irq_work(struct work_struct *work)
100{
101 struct kvm_vcpu *vcpu;
102
103 vcpu = container_of(work, struct kvm_vcpu, arch.timer_cpu.expired);
1c5631c7 104
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105 /*
106 * If the vcpu is blocked we want to wake it up so that it will see
107 * the timer has expired when entering the guest.
108 */
1b6502e5 109 kvm_vcpu_wake_up(vcpu);
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110}
111
9171fa2e 112static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)
1c5631c7 113{
a5a1d1c2 114 u64 cval, now;
1c5631c7 115
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116 cval = timer_ctx->cnt_cval;
117 now = kvm_phys_timer_read() - timer_ctx->cntvoff;
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118
119 if (now < cval) {
120 u64 ns;
121
122 ns = cyclecounter_cyc2ns(timecounter->cc,
123 cval - now,
124 timecounter->mask,
125 &timecounter->frac);
126 return ns;
127 }
128
129 return 0;
130}
131
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132static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx)
133{
134 return !(timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_IT_MASK) &&
135 (timer_ctx->cnt_ctl & ARCH_TIMER_CTRL_ENABLE);
136}
137
138/*
139 * Returns the earliest expiration time in ns among guest timers.
140 * Note that it will return 0 if none of timers can fire.
141 */
142static u64 kvm_timer_earliest_exp(struct kvm_vcpu *vcpu)
143{
144 u64 min_virt = ULLONG_MAX, min_phys = ULLONG_MAX;
145 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
146 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
147
148 if (kvm_timer_irq_can_fire(vtimer))
149 min_virt = kvm_timer_compute_delta(vtimer);
150
151 if (kvm_timer_irq_can_fire(ptimer))
152 min_phys = kvm_timer_compute_delta(ptimer);
153
154 /* If none of timers can fire, then return 0 */
155 if ((min_virt == ULLONG_MAX) && (min_phys == ULLONG_MAX))
156 return 0;
157
158 return min(min_virt, min_phys);
159}
160
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161static enum hrtimer_restart kvm_timer_expire(struct hrtimer *hrt)
162{
163 struct arch_timer_cpu *timer;
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164 struct kvm_vcpu *vcpu;
165 u64 ns;
166
53e72406 167 timer = container_of(hrt, struct arch_timer_cpu, timer);
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168 vcpu = container_of(timer, struct kvm_vcpu, arch.timer_cpu);
169
170 /*
171 * Check that the timer has really expired from the guest's
172 * PoV (NTP on the host may have forced it to expire
173 * early). If we should have slept longer, restart it.
174 */
fb280e97 175 ns = kvm_timer_earliest_exp(vcpu);
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176 if (unlikely(ns)) {
177 hrtimer_forward_now(hrt, ns_to_ktime(ns));
178 return HRTIMER_RESTART;
179 }
180
3706feac 181 schedule_work(&timer->expired);
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182 return HRTIMER_NORESTART;
183}
184
9171fa2e 185bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
1a748478 186{
a5a1d1c2 187 u64 cval, now;
1a748478 188
9171fa2e 189 if (!kvm_timer_irq_can_fire(timer_ctx))
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190 return false;
191
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192 cval = timer_ctx->cnt_cval;
193 now = kvm_phys_timer_read() - timer_ctx->cntvoff;
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194
195 return cval <= now;
196}
197
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198/*
199 * Reflect the timer output level into the kvm_run structure
200 */
201void kvm_timer_update_run(struct kvm_vcpu *vcpu)
202{
203 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
204 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
205 struct kvm_sync_regs *regs = &vcpu->run->s.regs;
206
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207 /* Populate the device bitmap with the timer states */
208 regs->device_irq_level &= ~(KVM_ARM_DEV_EL1_VTIMER |
209 KVM_ARM_DEV_EL1_PTIMER);
210 if (vtimer->irq.level)
211 regs->device_irq_level |= KVM_ARM_DEV_EL1_VTIMER;
212 if (ptimer->irq.level)
213 regs->device_irq_level |= KVM_ARM_DEV_EL1_PTIMER;
214}
215
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216static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
217 struct arch_timer_context *timer_ctx)
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218{
219 int ret;
4b4b4512 220
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221 timer_ctx->active_cleared_last = false;
222 timer_ctx->irq.level = new_level;
223 trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq,
224 timer_ctx->irq.level);
11710dec 225
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226 if (likely(irqchip_in_kernel(vcpu->kvm))) {
227 ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,
228 timer_ctx->irq.irq,
229 timer_ctx->irq.level);
230 WARN_ON(ret);
231 }
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232}
233
234/*
235 * Check if there was a change in the timer state (should we raise or lower
236 * the line level to the GIC).
237 */
b22e7df2 238static void kvm_timer_update_state(struct kvm_vcpu *vcpu)
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239{
240 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
fbb4aeec 241 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
58e0c973 242 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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243
244 /*
245 * If userspace modified the timer registers via SET_ONE_REG before
fbb4aeec 246 * the vgic was initialized, we mustn't set the vtimer->irq.level value
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247 * because the guest would never see the interrupt. Instead wait
248 * until we call this function from kvm_timer_flush_hwstate.
249 */
d9e13977 250 if (unlikely(!timer->enabled))
b22e7df2 251 return;
4b4b4512 252
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253 if (kvm_timer_should_fire(vtimer) != vtimer->irq.level)
254 kvm_timer_update_irq(vcpu, !vtimer->irq.level, vtimer);
b3aff6cc 255
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256 if (kvm_timer_should_fire(ptimer) != ptimer->irq.level)
257 kvm_timer_update_irq(vcpu, !ptimer->irq.level, ptimer);
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258}
259
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260/* Schedule the background timer for the emulated timer. */
261static void kvm_timer_emulate(struct kvm_vcpu *vcpu,
262 struct arch_timer_context *timer_ctx)
263{
264 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
265
266 if (kvm_timer_should_fire(timer_ctx))
267 return;
268
269 if (!kvm_timer_irq_can_fire(timer_ctx))
270 return;
271
272 /* The timer has not yet expired, schedule a background timer */
273 timer_arm(timer, kvm_timer_compute_delta(timer_ctx));
274}
275
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276/*
277 * Schedule the background timer before calling kvm_vcpu_block, so that this
278 * thread is removed from its waitqueue and made runnable when there's a timer
279 * interrupt to handle.
280 */
281void kvm_timer_schedule(struct kvm_vcpu *vcpu)
282{
283 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
9171fa2e 284 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
fb280e97 285 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
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286
287 BUG_ON(timer_is_armed(timer));
288
289 /*
fb280e97 290 * No need to schedule a background timer if any guest timer has
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291 * already expired, because kvm_vcpu_block will return before putting
292 * the thread to sleep.
293 */
fb280e97 294 if (kvm_timer_should_fire(vtimer) || kvm_timer_should_fire(ptimer))
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295 return;
296
297 /*
fb280e97 298 * If both timers are not capable of raising interrupts (disabled or
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299 * masked), then there's no more work for us to do.
300 */
fb280e97 301 if (!kvm_timer_irq_can_fire(vtimer) && !kvm_timer_irq_can_fire(ptimer))
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302 return;
303
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304 /*
305 * The guest timers have not yet expired, schedule a background timer.
306 * Set the earliest expiration time among the guest timers.
307 */
308 timer_arm(timer, kvm_timer_earliest_exp(vcpu));
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309}
310
311void kvm_timer_unschedule(struct kvm_vcpu *vcpu)
312{
313 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
314 timer_disarm(timer);
315}
316
d9e13977 317static void kvm_timer_flush_hwstate_vgic(struct kvm_vcpu *vcpu)
53e72406 318{
fbb4aeec 319 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
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320 bool phys_active;
321 int ret;
53e72406 322
cff9211e 323 /*
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324 * If we enter the guest with the virtual input level to the VGIC
325 * asserted, then we have already told the VGIC what we need to, and
326 * we don't need to exit from the guest until the guest deactivates
327 * the already injected interrupt, so therefore we should set the
328 * hardware active state to prevent unnecessary exits from the guest.
329 *
330 * Also, if we enter the guest with the virtual timer interrupt active,
331 * then it must be active on the physical distributor, because we set
332 * the HW bit and the guest must be able to deactivate the virtual and
333 * physical interrupt at the same time.
334 *
335 * Conversely, if the virtual input level is deasserted and the virtual
336 * interrupt is not active, then always clear the hardware active state
337 * to ensure that hardware interrupts from the timer triggers a guest
338 * exit.
339 */
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340 phys_active = vtimer->irq.level ||
341 kvm_vgic_map_is_active(vcpu, vtimer->irq.irq);
cff9211e 342
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343 /*
344 * We want to avoid hitting the (re)distributor as much as
345 * possible, as this is a potentially expensive MMIO access
346 * (not to mention locks in the irq layer), and a solution for
347 * this is to cache the "active" state in memory.
348 *
349 * Things to consider: we cannot cache an "active set" state,
350 * because the HW can change this behind our back (it becomes
351 * "clear" in the HW). We must then restrict the caching to
352 * the "clear" state.
353 *
354 * The cache is invalidated on:
355 * - vcpu put, indicating that the HW cannot be trusted to be
356 * in a sane state on the next vcpu load,
357 * - any change in the interrupt state
358 *
359 * Usage conditions:
360 * - cached value is "active clear"
361 * - value to be programmed is "active clear"
362 */
fbb4aeec 363 if (vtimer->active_cleared_last && !phys_active)
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364 return;
365
b452cb52 366 ret = irq_set_irqchip_state(host_vtimer_irq,
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367 IRQCHIP_STATE_ACTIVE,
368 phys_active);
369 WARN_ON(ret);
9b4a3004 370
fbb4aeec 371 vtimer->active_cleared_last = !phys_active;
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372}
373
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374bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu)
375{
376 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
377 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
378 struct kvm_sync_regs *sregs = &vcpu->run->s.regs;
379 bool vlevel, plevel;
380
381 if (likely(irqchip_in_kernel(vcpu->kvm)))
382 return false;
383
384 vlevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_VTIMER;
385 plevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_PTIMER;
386
387 return vtimer->irq.level != vlevel ||
388 ptimer->irq.level != plevel;
389}
390
391static void kvm_timer_flush_hwstate_user(struct kvm_vcpu *vcpu)
392{
393 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
394
395 /*
396 * To prevent continuously exiting from the guest, we mask the
397 * physical interrupt such that the guest can make forward progress.
398 * Once we detect the output level being deasserted, we unmask the
399 * interrupt again so that we exit from the guest when the timer
400 * fires.
401 */
402 if (vtimer->irq.level)
403 disable_percpu_irq(host_vtimer_irq);
404 else
405 enable_percpu_irq(host_vtimer_irq, 0);
406}
407
408/**
409 * kvm_timer_flush_hwstate - prepare timers before running the vcpu
410 * @vcpu: The vcpu pointer
411 *
412 * Check if the virtual timer has expired while we were running in the host,
413 * and inject an interrupt if that was the case, making sure the timer is
414 * masked or disabled on the host so that we keep executing. Also schedule a
415 * software timer for the physical timer if it is enabled.
416 */
417void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu)
418{
419 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
420
421 if (unlikely(!timer->enabled))
422 return;
423
424 kvm_timer_update_state(vcpu);
425
426 /* Set the background timer for the physical timer emulation. */
427 kvm_timer_emulate(vcpu, vcpu_ptimer(vcpu));
428
429 if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
430 kvm_timer_flush_hwstate_user(vcpu);
431 else
432 kvm_timer_flush_hwstate_vgic(vcpu);
433}
434
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435/**
436 * kvm_timer_sync_hwstate - sync timer state from cpu
437 * @vcpu: The vcpu pointer
438 *
d9e13977 439 * Check if any of the timers have expired while we were running in the guest,
d35268da 440 * and inject an interrupt if that was the case.
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441 */
442void kvm_timer_sync_hwstate(struct kvm_vcpu *vcpu)
443{
444 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
53e72406 445
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446 /*
447 * This is to cancel the background timer for the physical timer
448 * emulation if it is set.
449 */
450 timer_disarm(timer);
53e72406 451
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452 /*
453 * The guest could have modified the timer registers or the timer
454 * could have expired, update the timer state.
455 */
456 kvm_timer_update_state(vcpu);
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457}
458
85e69ad7 459int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
5ae7f87a 460{
fbb4aeec 461 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
a91d1855 462 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
5ae7f87a 463
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CD
464 /*
465 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
466 * and to 0 for ARMv7. We provide an implementation that always
467 * resets the timer to be disabled and unmasked and is compliant with
468 * the ARMv7 architecture.
469 */
fbb4aeec 470 vtimer->cnt_ctl = 0;
a91d1855 471 ptimer->cnt_ctl = 0;
4b4b4512 472 kvm_timer_update_state(vcpu);
4ad9e16a 473
41a54482 474 return 0;
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AP
475}
476
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477/* Make the updates of cntvoff for all vtimer contexts atomic */
478static void update_vtimer_cntvoff(struct kvm_vcpu *vcpu, u64 cntvoff)
479{
480 int i;
481 struct kvm *kvm = vcpu->kvm;
482 struct kvm_vcpu *tmp;
483
484 mutex_lock(&kvm->lock);
485 kvm_for_each_vcpu(i, tmp, kvm)
486 vcpu_vtimer(tmp)->cntvoff = cntvoff;
487
488 /*
489 * When called from the vcpu create path, the CPU being created is not
490 * included in the loop above, so we just set it here as well.
491 */
492 vcpu_vtimer(vcpu)->cntvoff = cntvoff;
493 mutex_unlock(&kvm->lock);
494}
495
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496void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
497{
498 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
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499 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
500 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
53e72406 501
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502 /* Synchronize cntvoff across all vtimers of a VM. */
503 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read());
a91d1855 504 vcpu_ptimer(vcpu)->cntvoff = 0;
90de943a 505
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506 INIT_WORK(&timer->expired, kvm_timer_inject_irq_work);
507 hrtimer_init(&timer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
508 timer->timer.function = kvm_timer_expire;
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509
510 vtimer->irq.irq = default_vtimer_irq.irq;
511 ptimer->irq.irq = default_ptimer_irq.irq;
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512}
513
514static void kvm_timer_init_interrupt(void *info)
515{
cabdc5c5 516 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
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517}
518
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AP
519int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
520{
fbb4aeec 521 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
39735a3a
AP
522
523 switch (regid) {
524 case KVM_REG_ARM_TIMER_CTL:
fbb4aeec 525 vtimer->cnt_ctl = value;
39735a3a
AP
526 break;
527 case KVM_REG_ARM_TIMER_CNT:
90de943a 528 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read() - value);
39735a3a
AP
529 break;
530 case KVM_REG_ARM_TIMER_CVAL:
fbb4aeec 531 vtimer->cnt_cval = value;
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AP
532 break;
533 default:
534 return -1;
535 }
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536
537 kvm_timer_update_state(vcpu);
39735a3a
AP
538 return 0;
539}
540
541u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid)
542{
fbb4aeec 543 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
39735a3a
AP
544
545 switch (regid) {
546 case KVM_REG_ARM_TIMER_CTL:
fbb4aeec 547 return vtimer->cnt_ctl;
39735a3a 548 case KVM_REG_ARM_TIMER_CNT:
90de943a 549 return kvm_phys_timer_read() - vtimer->cntvoff;
39735a3a 550 case KVM_REG_ARM_TIMER_CVAL:
fbb4aeec 551 return vtimer->cnt_cval;
39735a3a
AP
552 }
553 return (u64)-1;
554}
53e72406 555
b3c9950a 556static int kvm_timer_starting_cpu(unsigned int cpu)
53e72406 557{
b3c9950a
RC
558 kvm_timer_init_interrupt(NULL);
559 return 0;
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560}
561
b3c9950a
RC
562static int kvm_timer_dying_cpu(unsigned int cpu)
563{
564 disable_percpu_irq(host_vtimer_irq);
565 return 0;
566}
53e72406 567
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568int kvm_timer_hyp_init(void)
569{
29c2d6ff 570 struct arch_timer_kvm_info *info;
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571 int err;
572
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573 info = arch_timer_get_kvm_info();
574 timecounter = &info->timecounter;
53e72406 575
8e1a0476
CD
576 if (!timecounter->cc) {
577 kvm_err("kvm_arch_timer: uninitialized timecounter\n");
578 return -ENODEV;
579 }
580
29c2d6ff
JG
581 if (info->virtual_irq <= 0) {
582 kvm_err("kvm_arch_timer: invalid virtual timer IRQ: %d\n",
583 info->virtual_irq);
53e72406
MZ
584 return -ENODEV;
585 }
29c2d6ff 586 host_vtimer_irq = info->virtual_irq;
53e72406 587
cabdc5c5
MZ
588 host_vtimer_irq_flags = irq_get_trigger_type(host_vtimer_irq);
589 if (host_vtimer_irq_flags != IRQF_TRIGGER_HIGH &&
590 host_vtimer_irq_flags != IRQF_TRIGGER_LOW) {
591 kvm_err("Invalid trigger for IRQ%d, assuming level low\n",
592 host_vtimer_irq);
593 host_vtimer_irq_flags = IRQF_TRIGGER_LOW;
594 }
595
29c2d6ff 596 err = request_percpu_irq(host_vtimer_irq, kvm_arch_timer_handler,
53e72406
MZ
597 "kvm guest timer", kvm_get_running_vcpus());
598 if (err) {
599 kvm_err("kvm_arch_timer: can't request interrupt %d (%d)\n",
29c2d6ff 600 host_vtimer_irq, err);
5d947a14 601 return err;
53e72406
MZ
602 }
603
29c2d6ff 604 kvm_info("virtual timer IRQ%d\n", host_vtimer_irq);
53e72406 605
b3c9950a 606 cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING,
73c1b41e 607 "kvm/arm/timer:starting", kvm_timer_starting_cpu,
b3c9950a 608 kvm_timer_dying_cpu);
53e72406
MZ
609 return err;
610}
611
612void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
613{
614 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
fbb4aeec 615 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
53e72406
MZ
616
617 timer_disarm(timer);
fbb4aeec 618 kvm_vgic_unmap_phys_irq(vcpu, vtimer->irq.irq);
53e72406
MZ
619}
620
99a1db7a
CD
621static bool timer_irqs_are_valid(struct kvm *kvm)
622{
623 struct kvm_vcpu *vcpu;
624 int vtimer_irq, ptimer_irq;
625 int i;
626
627 vcpu = kvm_get_vcpu(kvm, 0);
628 vtimer_irq = vcpu_vtimer(vcpu)->irq.irq;
629 ptimer_irq = vcpu_ptimer(vcpu)->irq.irq;
630
631 if (vtimer_irq == ptimer_irq)
632 return false;
633
634 kvm_for_each_vcpu(i, vcpu, kvm) {
635 if (vcpu_vtimer(vcpu)->irq.irq != vtimer_irq ||
636 vcpu_ptimer(vcpu)->irq.irq != ptimer_irq)
637 return false;
638 }
639
640 return true;
641}
642
41a54482 643int kvm_timer_enable(struct kvm_vcpu *vcpu)
53e72406 644{
41a54482 645 struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu;
fbb4aeec 646 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
41a54482
CD
647 struct irq_desc *desc;
648 struct irq_data *data;
649 int phys_irq;
650 int ret;
651
652 if (timer->enabled)
653 return 0;
654
d9e13977
AG
655 /* Without a VGIC we do not map virtual IRQs to physical IRQs */
656 if (!irqchip_in_kernel(vcpu->kvm))
657 goto no_vgic;
658
659 if (!vgic_initialized(vcpu->kvm))
660 return -ENODEV;
661
99a1db7a
CD
662 if (!timer_irqs_are_valid(vcpu->kvm)) {
663 kvm_debug("incorrectly configured timer irqs\n");
664 return -EINVAL;
665 }
666
41a54482
CD
667 /*
668 * Find the physical IRQ number corresponding to the host_vtimer_irq
669 */
670 desc = irq_to_desc(host_vtimer_irq);
671 if (!desc) {
672 kvm_err("%s: no interrupt descriptor\n", __func__);
673 return -EINVAL;
674 }
675
676 data = irq_desc_get_irq_data(desc);
677 while (data->parent_data)
678 data = data->parent_data;
679
680 phys_irq = data->hwirq;
681
682 /*
683 * Tell the VGIC that the virtual interrupt is tied to a
684 * physical interrupt. We do that once per VCPU.
685 */
fbb4aeec 686 ret = kvm_vgic_map_phys_irq(vcpu, vtimer->irq.irq, phys_irq);
41a54482
CD
687 if (ret)
688 return ret;
689
d9e13977 690no_vgic:
fd5ebf99 691 timer->enabled = 1;
41a54482 692 return 0;
05971120 693}
53e72406 694
488f94d7
JL
695/*
696 * On VHE system, we only need to configure trap on physical timer and counter
697 * accesses in EL0 and EL1 once, not for every world switch.
698 * The host kernel runs at EL2 with HCR_EL2.TGE == 1,
699 * and this makes those bits have no effect for the host kernel execution.
700 */
701void kvm_timer_init_vhe(void)
702{
703 /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */
704 u32 cnthctl_shift = 10;
705 u64 val;
706
707 /*
708 * Disallow physical timer access for the guest.
709 * Physical counter access is allowed.
710 */
711 val = read_sysreg(cnthctl_el2);
712 val &= ~(CNTHCTL_EL1PCEN << cnthctl_shift);
713 val |= (CNTHCTL_EL1PCTEN << cnthctl_shift);
714 write_sysreg(val, cnthctl_el2);
715}
99a1db7a
CD
716
717static void set_timer_irqs(struct kvm *kvm, int vtimer_irq, int ptimer_irq)
718{
719 struct kvm_vcpu *vcpu;
720 int i;
721
722 kvm_for_each_vcpu(i, vcpu, kvm) {
723 vcpu_vtimer(vcpu)->irq.irq = vtimer_irq;
724 vcpu_ptimer(vcpu)->irq.irq = ptimer_irq;
725 }
726}
727
728int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
729{
730 int __user *uaddr = (int __user *)(long)attr->addr;
731 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
732 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
733 int irq;
734
735 if (!irqchip_in_kernel(vcpu->kvm))
736 return -EINVAL;
737
738 if (get_user(irq, uaddr))
739 return -EFAULT;
740
741 if (!(irq_is_ppi(irq)))
742 return -EINVAL;
743
744 if (vcpu->arch.timer_cpu.enabled)
745 return -EBUSY;
746
747 switch (attr->attr) {
748 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
749 set_timer_irqs(vcpu->kvm, irq, ptimer->irq.irq);
750 break;
751 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER:
752 set_timer_irqs(vcpu->kvm, vtimer->irq.irq, irq);
753 break;
754 default:
755 return -ENXIO;
756 }
757
758 return 0;
759}
760
761int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
762{
763 int __user *uaddr = (int __user *)(long)attr->addr;
764 struct arch_timer_context *timer;
765 int irq;
766
767 switch (attr->attr) {
768 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
769 timer = vcpu_vtimer(vcpu);
770 break;
771 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER:
772 timer = vcpu_ptimer(vcpu);
773 break;
774 default:
775 return -ENXIO;
776 }
777
778 irq = timer->irq.irq;
779 return put_user(irq, uaddr);
780}
781
782int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
783{
784 switch (attr->attr) {
785 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
786 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER:
787 return 0;
788 }
789
790 return -ENXIO;
791}