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kvm: arm/arm64: Fix stage2_flush_memslot for 4 level page table
[mirror_ubuntu-bionic-kernel.git] / virt / kvm / arm / mmu.c
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
196f878a 23#include <linux/sched/signal.h>
45e96ea6 24#include <trace/events/kvm.h>
342cd0ab 25#include <asm/pgalloc.h>
94f8e641 26#include <asm/cacheflush.h>
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27#include <asm/kvm_arm.h>
28#include <asm/kvm_mmu.h>
45e96ea6 29#include <asm/kvm_mmio.h>
d5d8184d 30#include <asm/kvm_asm.h>
94f8e641 31#include <asm/kvm_emulate.h>
1e947bad 32#include <asm/virt.h>
621f48e4 33#include <asm/system_misc.h>
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34
35#include "trace.h"
342cd0ab 36
5a677ce0 37static pgd_t *boot_hyp_pgd;
2fb41059 38static pgd_t *hyp_pgd;
e4c5a685 39static pgd_t *merged_hyp_pgd;
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40static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
41
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42static unsigned long hyp_idmap_start;
43static unsigned long hyp_idmap_end;
44static phys_addr_t hyp_idmap_vector;
45
9163ee23 46#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t))
38f791a4 47#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 48
15a49a44
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49#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
50#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
51
52static bool memslot_is_logging(struct kvm_memory_slot *memslot)
53{
15a49a44 54 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
55}
56
57/**
58 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
59 * @kvm: pointer to kvm structure.
60 *
61 * Interface to HYP function to flush all VM TLB entries
62 */
63void kvm_flush_remote_tlbs(struct kvm *kvm)
64{
65 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 66}
ad361f09 67
48762767 68static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 69{
8684e701 70 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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71}
72
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73/*
74 * D-Cache management functions. They take the page table entries by
75 * value, as they are flushing the cache using the kernel mapping (or
76 * kmap on 32bit).
77 */
78static void kvm_flush_dcache_pte(pte_t pte)
79{
80 __kvm_flush_dcache_pte(pte);
81}
82
83static void kvm_flush_dcache_pmd(pmd_t pmd)
84{
85 __kvm_flush_dcache_pmd(pmd);
86}
87
88static void kvm_flush_dcache_pud(pud_t pud)
89{
90 __kvm_flush_dcache_pud(pud);
91}
92
e6fab544
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93static bool kvm_is_device_pfn(unsigned long pfn)
94{
95 return !pfn_valid(pfn);
96}
97
15a49a44
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98/**
99 * stage2_dissolve_pmd() - clear and flush huge PMD entry
100 * @kvm: pointer to kvm structure.
101 * @addr: IPA
102 * @pmd: pmd pointer for IPA
103 *
104 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
105 * pages in the range dirty.
106 */
107static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
108{
bbb3b6b3 109 if (!pmd_thp_or_huge(*pmd))
15a49a44
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110 return;
111
112 pmd_clear(pmd);
113 kvm_tlb_flush_vmid_ipa(kvm, addr);
114 put_page(virt_to_page(pmd));
115}
116
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117static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
118 int min, int max)
119{
120 void *page;
121
122 BUG_ON(max > KVM_NR_MEM_OBJS);
123 if (cache->nobjs >= min)
124 return 0;
125 while (cache->nobjs < max) {
126 page = (void *)__get_free_page(PGALLOC_GFP);
127 if (!page)
128 return -ENOMEM;
129 cache->objects[cache->nobjs++] = page;
130 }
131 return 0;
132}
133
134static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
135{
136 while (mc->nobjs)
137 free_page((unsigned long)mc->objects[--mc->nobjs]);
138}
139
140static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
141{
142 void *p;
143
144 BUG_ON(!mc || !mc->nobjs);
145 p = mc->objects[--mc->nobjs];
146 return p;
147}
148
7a1c831e 149static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 150{
7a1c831e
SP
151 pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL);
152 stage2_pgd_clear(pgd);
4f853a71 153 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 154 stage2_pud_free(pud_table);
4f853a71 155 put_page(virt_to_page(pgd));
979acd5e
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156}
157
7a1c831e 158static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 159{
7a1c831e
SP
160 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0);
161 VM_BUG_ON(stage2_pud_huge(*pud));
162 stage2_pud_clear(pud);
4f853a71 163 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 164 stage2_pmd_free(pmd_table);
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165 put_page(virt_to_page(pud));
166}
342cd0ab 167
7a1c831e 168static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 169{
4f853a71 170 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 171 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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172 pmd_clear(pmd);
173 kvm_tlb_flush_vmid_ipa(kvm, addr);
174 pte_free_kernel(NULL, pte_table);
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175 put_page(virt_to_page(pmd));
176}
177
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178/*
179 * Unmapping vs dcache management:
180 *
181 * If a guest maps certain memory pages as uncached, all writes will
182 * bypass the data cache and go directly to RAM. However, the CPUs
183 * can still speculate reads (not writes) and fill cache lines with
184 * data.
185 *
186 * Those cache lines will be *clean* cache lines though, so a
187 * clean+invalidate operation is equivalent to an invalidate
188 * operation, because no cache lines are marked dirty.
189 *
190 * Those clean cache lines could be filled prior to an uncached write
191 * by the guest, and the cache coherent IO subsystem would therefore
192 * end up writing old data to disk.
193 *
194 * This is why right after unmapping a page/section and invalidating
195 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
196 * the IO subsystem will never hit in the cache.
197 */
7a1c831e 198static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 199 phys_addr_t addr, phys_addr_t end)
4f728276 200{
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201 phys_addr_t start_addr = addr;
202 pte_t *pte, *start_pte;
203
204 start_pte = pte = pte_offset_kernel(pmd, addr);
205 do {
206 if (!pte_none(*pte)) {
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207 pte_t old_pte = *pte;
208
4f853a71 209 kvm_set_pte(pte, __pte(0));
4f853a71 210 kvm_tlb_flush_vmid_ipa(kvm, addr);
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211
212 /* No need to invalidate the cache for device mappings */
0de58f85 213 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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214 kvm_flush_dcache_pte(old_pte);
215
216 put_page(virt_to_page(pte));
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217 }
218 } while (pte++, addr += PAGE_SIZE, addr != end);
219
7a1c831e
SP
220 if (stage2_pte_table_empty(start_pte))
221 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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222}
223
7a1c831e 224static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 225 phys_addr_t addr, phys_addr_t end)
000d3996 226{
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227 phys_addr_t next, start_addr = addr;
228 pmd_t *pmd, *start_pmd;
000d3996 229
7a1c831e 230 start_pmd = pmd = stage2_pmd_offset(pud, addr);
4f853a71 231 do {
7a1c831e 232 next = stage2_pmd_addr_end(addr, end);
4f853a71 233 if (!pmd_none(*pmd)) {
bbb3b6b3 234 if (pmd_thp_or_huge(*pmd)) {
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235 pmd_t old_pmd = *pmd;
236
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237 pmd_clear(pmd);
238 kvm_tlb_flush_vmid_ipa(kvm, addr);
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239
240 kvm_flush_dcache_pmd(old_pmd);
241
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242 put_page(virt_to_page(pmd));
243 } else {
7a1c831e 244 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 245 }
ad361f09 246 }
4f853a71 247 } while (pmd++, addr = next, addr != end);
ad361f09 248
7a1c831e
SP
249 if (stage2_pmd_table_empty(start_pmd))
250 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 251}
000d3996 252
7a1c831e 253static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
4f853a71
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254 phys_addr_t addr, phys_addr_t end)
255{
256 phys_addr_t next, start_addr = addr;
257 pud_t *pud, *start_pud;
4f728276 258
7a1c831e 259 start_pud = pud = stage2_pud_offset(pgd, addr);
4f853a71 260 do {
7a1c831e
SP
261 next = stage2_pud_addr_end(addr, end);
262 if (!stage2_pud_none(*pud)) {
263 if (stage2_pud_huge(*pud)) {
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264 pud_t old_pud = *pud;
265
7a1c831e 266 stage2_pud_clear(pud);
4f853a71 267 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 268 kvm_flush_dcache_pud(old_pud);
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CD
269 put_page(virt_to_page(pud));
270 } else {
7a1c831e 271 unmap_stage2_pmds(kvm, pud, addr, next);
4f728276
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272 }
273 }
4f853a71 274 } while (pud++, addr = next, addr != end);
4f728276 275
7a1c831e
SP
276 if (stage2_pud_table_empty(start_pud))
277 clear_stage2_pgd_entry(kvm, pgd, start_addr);
4f853a71
CD
278}
279
7a1c831e
SP
280/**
281 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
282 * @kvm: The VM pointer
283 * @start: The intermediate physical base address of the range to unmap
284 * @size: The size of the area to unmap
285 *
286 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
287 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
288 * destroying the VM), otherwise another faulting VCPU may come in and mess
289 * with things behind our backs.
290 */
291static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
292{
293 pgd_t *pgd;
294 phys_addr_t addr = start, end = start + size;
295 phys_addr_t next;
296
8b3405e3 297 assert_spin_locked(&kvm->mmu_lock);
7a1c831e 298 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
4f853a71 299 do {
0c428a6a
SP
300 /*
301 * Make sure the page table is still active, as another thread
302 * could have possibly freed the page table, while we released
303 * the lock.
304 */
305 if (!READ_ONCE(kvm->arch.pgd))
306 break;
7a1c831e
SP
307 next = stage2_pgd_addr_end(addr, end);
308 if (!stage2_pgd_none(*pgd))
309 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
310 /*
311 * If the range is too large, release the kvm->mmu_lock
312 * to prevent starvation and lockup detector warnings.
313 */
314 if (next != end)
315 cond_resched_lock(&kvm->mmu_lock);
4f853a71 316 } while (pgd++, addr = next, addr != end);
000d3996
MZ
317}
318
9d218a1f
MZ
319static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
320 phys_addr_t addr, phys_addr_t end)
321{
322 pte_t *pte;
323
324 pte = pte_offset_kernel(pmd, addr);
325 do {
0de58f85 326 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 327 kvm_flush_dcache_pte(*pte);
9d218a1f
MZ
328 } while (pte++, addr += PAGE_SIZE, addr != end);
329}
330
331static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
332 phys_addr_t addr, phys_addr_t end)
333{
334 pmd_t *pmd;
335 phys_addr_t next;
336
70fd1906 337 pmd = stage2_pmd_offset(pud, addr);
9d218a1f 338 do {
70fd1906 339 next = stage2_pmd_addr_end(addr, end);
9d218a1f 340 if (!pmd_none(*pmd)) {
bbb3b6b3 341 if (pmd_thp_or_huge(*pmd))
363ef89f
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342 kvm_flush_dcache_pmd(*pmd);
343 else
9d218a1f 344 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
345 }
346 } while (pmd++, addr = next, addr != end);
347}
348
349static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
350 phys_addr_t addr, phys_addr_t end)
351{
352 pud_t *pud;
353 phys_addr_t next;
354
70fd1906 355 pud = stage2_pud_offset(pgd, addr);
9d218a1f 356 do {
70fd1906
SP
357 next = stage2_pud_addr_end(addr, end);
358 if (!stage2_pud_none(*pud)) {
359 if (stage2_pud_huge(*pud))
363ef89f
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360 kvm_flush_dcache_pud(*pud);
361 else
9d218a1f 362 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
363 }
364 } while (pud++, addr = next, addr != end);
365}
366
367static void stage2_flush_memslot(struct kvm *kvm,
368 struct kvm_memory_slot *memslot)
369{
370 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
371 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
372 phys_addr_t next;
373 pgd_t *pgd;
374
70fd1906 375 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
9d218a1f 376 do {
70fd1906 377 next = stage2_pgd_addr_end(addr, end);
de469c60
SP
378 if (!stage2_pgd_none(*pgd))
379 stage2_flush_puds(kvm, pgd, addr, next);
9d218a1f
MZ
380 } while (pgd++, addr = next, addr != end);
381}
382
383/**
384 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
385 * @kvm: The struct kvm pointer
386 *
387 * Go through the stage 2 page tables and invalidate any cache lines
388 * backing memory already mapped to the VM.
389 */
3c1e7165 390static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
391{
392 struct kvm_memslots *slots;
393 struct kvm_memory_slot *memslot;
394 int idx;
395
396 idx = srcu_read_lock(&kvm->srcu);
397 spin_lock(&kvm->mmu_lock);
398
399 slots = kvm_memslots(kvm);
400 kvm_for_each_memslot(memslot, slots)
401 stage2_flush_memslot(kvm, memslot);
402
403 spin_unlock(&kvm->mmu_lock);
404 srcu_read_unlock(&kvm->srcu, idx);
405}
406
64f32497
SP
407static void clear_hyp_pgd_entry(pgd_t *pgd)
408{
409 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
410 pgd_clear(pgd);
411 pud_free(NULL, pud_table);
412 put_page(virt_to_page(pgd));
413}
414
415static void clear_hyp_pud_entry(pud_t *pud)
416{
417 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
418 VM_BUG_ON(pud_huge(*pud));
419 pud_clear(pud);
420 pmd_free(NULL, pmd_table);
421 put_page(virt_to_page(pud));
422}
423
424static void clear_hyp_pmd_entry(pmd_t *pmd)
425{
426 pte_t *pte_table = pte_offset_kernel(pmd, 0);
427 VM_BUG_ON(pmd_thp_or_huge(*pmd));
428 pmd_clear(pmd);
429 pte_free_kernel(NULL, pte_table);
430 put_page(virt_to_page(pmd));
431}
432
433static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
434{
435 pte_t *pte, *start_pte;
436
437 start_pte = pte = pte_offset_kernel(pmd, addr);
438 do {
439 if (!pte_none(*pte)) {
440 kvm_set_pte(pte, __pte(0));
441 put_page(virt_to_page(pte));
442 }
443 } while (pte++, addr += PAGE_SIZE, addr != end);
444
445 if (hyp_pte_table_empty(start_pte))
446 clear_hyp_pmd_entry(pmd);
447}
448
449static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
450{
451 phys_addr_t next;
452 pmd_t *pmd, *start_pmd;
453
454 start_pmd = pmd = pmd_offset(pud, addr);
455 do {
456 next = pmd_addr_end(addr, end);
457 /* Hyp doesn't use huge pmds */
458 if (!pmd_none(*pmd))
459 unmap_hyp_ptes(pmd, addr, next);
460 } while (pmd++, addr = next, addr != end);
461
462 if (hyp_pmd_table_empty(start_pmd))
463 clear_hyp_pud_entry(pud);
464}
465
466static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
467{
468 phys_addr_t next;
469 pud_t *pud, *start_pud;
470
471 start_pud = pud = pud_offset(pgd, addr);
472 do {
473 next = pud_addr_end(addr, end);
474 /* Hyp doesn't use huge puds */
475 if (!pud_none(*pud))
476 unmap_hyp_pmds(pud, addr, next);
477 } while (pud++, addr = next, addr != end);
478
479 if (hyp_pud_table_empty(start_pud))
480 clear_hyp_pgd_entry(pgd);
481}
482
483static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
484{
485 pgd_t *pgd;
486 phys_addr_t addr = start, end = start + size;
487 phys_addr_t next;
488
489 /*
490 * We don't unmap anything from HYP, except at the hyp tear down.
491 * Hence, we don't have to invalidate the TLBs here.
492 */
493 pgd = pgdp + pgd_index(addr);
494 do {
495 next = pgd_addr_end(addr, end);
496 if (!pgd_none(*pgd))
497 unmap_hyp_puds(pgd, addr, next);
498 } while (pgd++, addr = next, addr != end);
499}
500
342cd0ab 501/**
4f728276 502 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 503 *
5a677ce0
MZ
504 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
505 * therefore contains either mappings in the kernel memory area (above
506 * PAGE_OFFSET), or device mappings in the vmalloc range (from
507 * VMALLOC_START to VMALLOC_END).
508 *
509 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 510 */
4f728276 511void free_hyp_pgds(void)
342cd0ab 512{
d157f4a5 513 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 514
26781f9c
MZ
515 if (boot_hyp_pgd) {
516 unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
517 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
518 boot_hyp_pgd = NULL;
519 }
520
4f728276 521 if (hyp_pgd) {
26781f9c 522 unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE);
7839c672
MZ
523 unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
524 (uintptr_t)high_memory - PAGE_OFFSET);
525 unmap_hyp_range(hyp_pgd, kern_hyp_va(VMALLOC_START),
526 VMALLOC_END - VMALLOC_START);
d4cb9df5 527
38f791a4 528 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 529 hyp_pgd = NULL;
4f728276 530 }
e4c5a685
AB
531 if (merged_hyp_pgd) {
532 clear_page(merged_hyp_pgd);
533 free_page((unsigned long)merged_hyp_pgd);
534 merged_hyp_pgd = NULL;
535 }
4f728276 536
342cd0ab
CD
537 mutex_unlock(&kvm_hyp_pgd_mutex);
538}
539
540static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
541 unsigned long end, unsigned long pfn,
542 pgprot_t prot)
342cd0ab
CD
543{
544 pte_t *pte;
545 unsigned long addr;
342cd0ab 546
3562c76d
MZ
547 addr = start;
548 do {
6060df84
MZ
549 pte = pte_offset_kernel(pmd, addr);
550 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 551 get_page(virt_to_page(pte));
5a677ce0 552 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 553 pfn++;
3562c76d 554 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
555}
556
557static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
558 unsigned long end, unsigned long pfn,
559 pgprot_t prot)
342cd0ab
CD
560{
561 pmd_t *pmd;
562 pte_t *pte;
563 unsigned long addr, next;
564
3562c76d
MZ
565 addr = start;
566 do {
6060df84 567 pmd = pmd_offset(pud, addr);
342cd0ab
CD
568
569 BUG_ON(pmd_sect(*pmd));
570
571 if (pmd_none(*pmd)) {
6060df84 572 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
573 if (!pte) {
574 kvm_err("Cannot allocate Hyp pte\n");
575 return -ENOMEM;
576 }
577 pmd_populate_kernel(NULL, pmd, pte);
4f728276 578 get_page(virt_to_page(pmd));
5a677ce0 579 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
580 }
581
582 next = pmd_addr_end(addr, end);
583
6060df84
MZ
584 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
585 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 586 } while (addr = next, addr != end);
342cd0ab
CD
587
588 return 0;
589}
590
38f791a4
CD
591static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
592 unsigned long end, unsigned long pfn,
593 pgprot_t prot)
594{
595 pud_t *pud;
596 pmd_t *pmd;
597 unsigned long addr, next;
598 int ret;
599
600 addr = start;
601 do {
602 pud = pud_offset(pgd, addr);
603
604 if (pud_none_or_clear_bad(pud)) {
605 pmd = pmd_alloc_one(NULL, addr);
606 if (!pmd) {
607 kvm_err("Cannot allocate Hyp pmd\n");
608 return -ENOMEM;
609 }
610 pud_populate(NULL, pud, pmd);
611 get_page(virt_to_page(pud));
612 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
613 }
614
615 next = pud_addr_end(addr, end);
616 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
617 if (ret)
618 return ret;
619 pfn += (next - addr) >> PAGE_SHIFT;
620 } while (addr = next, addr != end);
621
622 return 0;
623}
624
6060df84
MZ
625static int __create_hyp_mappings(pgd_t *pgdp,
626 unsigned long start, unsigned long end,
627 unsigned long pfn, pgprot_t prot)
342cd0ab 628{
342cd0ab
CD
629 pgd_t *pgd;
630 pud_t *pud;
342cd0ab
CD
631 unsigned long addr, next;
632 int err = 0;
633
342cd0ab 634 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
635 addr = start & PAGE_MASK;
636 end = PAGE_ALIGN(end);
637 do {
6060df84 638 pgd = pgdp + pgd_index(addr);
342cd0ab 639
38f791a4
CD
640 if (pgd_none(*pgd)) {
641 pud = pud_alloc_one(NULL, addr);
642 if (!pud) {
643 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
644 err = -ENOMEM;
645 goto out;
646 }
38f791a4
CD
647 pgd_populate(NULL, pgd, pud);
648 get_page(virt_to_page(pgd));
649 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
650 }
651
652 next = pgd_addr_end(addr, end);
38f791a4 653 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
654 if (err)
655 goto out;
6060df84 656 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 657 } while (addr = next, addr != end);
342cd0ab
CD
658out:
659 mutex_unlock(&kvm_hyp_pgd_mutex);
660 return err;
661}
662
40c2729b
CD
663static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
664{
665 if (!is_vmalloc_addr(kaddr)) {
666 BUG_ON(!virt_addr_valid(kaddr));
667 return __pa(kaddr);
668 } else {
669 return page_to_phys(vmalloc_to_page(kaddr)) +
670 offset_in_page(kaddr);
671 }
672}
673
342cd0ab 674/**
06e8c3b0 675 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
676 * @from: The virtual kernel start address of the range
677 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 678 * @prot: The protection to be applied to this range
342cd0ab 679 *
06e8c3b0
MZ
680 * The same virtual address as the kernel virtual address is also used
681 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
682 * physical pages.
342cd0ab 683 */
c8dddecd 684int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 685{
40c2729b
CD
686 phys_addr_t phys_addr;
687 unsigned long virt_addr;
6c41a413
MZ
688 unsigned long start = kern_hyp_va((unsigned long)from);
689 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 690
1e947bad
MZ
691 if (is_kernel_in_hyp_mode())
692 return 0;
693
40c2729b
CD
694 start = start & PAGE_MASK;
695 end = PAGE_ALIGN(end);
6060df84 696
40c2729b
CD
697 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
698 int err;
6060df84 699
40c2729b
CD
700 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
701 err = __create_hyp_mappings(hyp_pgd, virt_addr,
702 virt_addr + PAGE_SIZE,
703 __phys_to_pfn(phys_addr),
c8dddecd 704 prot);
40c2729b
CD
705 if (err)
706 return err;
707 }
708
709 return 0;
342cd0ab
CD
710}
711
712/**
06e8c3b0
MZ
713 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
714 * @from: The kernel start VA of the range
715 * @to: The kernel end VA of the range (exclusive)
6060df84 716 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
717 *
718 * The resulting HYP VA is the same as the kernel VA, modulo
719 * HYP_PAGE_OFFSET.
342cd0ab 720 */
6060df84 721int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 722{
6c41a413
MZ
723 unsigned long start = kern_hyp_va((unsigned long)from);
724 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 725
1e947bad
MZ
726 if (is_kernel_in_hyp_mode())
727 return 0;
728
6060df84
MZ
729 /* Check for a valid kernel IO mapping */
730 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
731 return -EINVAL;
732
733 return __create_hyp_mappings(hyp_pgd, start, end,
734 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
735}
736
d5d8184d
CD
737/**
738 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
739 * @kvm: The KVM struct pointer for the VM.
740 *
9d4dc688
VM
741 * Allocates only the stage-2 HW PGD level table(s) (can support either full
742 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
743 * allocated pages.
d5d8184d
CD
744 *
745 * Note we don't need locking here as this is only called when the VM is
746 * created, which can only be done once.
747 */
748int kvm_alloc_stage2_pgd(struct kvm *kvm)
749{
750 pgd_t *pgd;
751
752 if (kvm->arch.pgd != NULL) {
753 kvm_err("kvm_arch already initialized?\n");
754 return -EINVAL;
755 }
756
9163ee23
SP
757 /* Allocate the HW PGD, making sure that each page gets its own refcount */
758 pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO);
759 if (!pgd)
a987370f
MZ
760 return -ENOMEM;
761
d5d8184d 762 kvm->arch.pgd = pgd;
d5d8184d
CD
763 return 0;
764}
765
957db105
CD
766static void stage2_unmap_memslot(struct kvm *kvm,
767 struct kvm_memory_slot *memslot)
768{
769 hva_t hva = memslot->userspace_addr;
770 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
771 phys_addr_t size = PAGE_SIZE * memslot->npages;
772 hva_t reg_end = hva + size;
773
774 /*
775 * A memory region could potentially cover multiple VMAs, and any holes
776 * between them, so iterate over all of them to find out if we should
777 * unmap any of them.
778 *
779 * +--------------------------------------------+
780 * +---------------+----------------+ +----------------+
781 * | : VMA 1 | VMA 2 | | VMA 3 : |
782 * +---------------+----------------+ +----------------+
783 * | memory region |
784 * +--------------------------------------------+
785 */
786 do {
787 struct vm_area_struct *vma = find_vma(current->mm, hva);
788 hva_t vm_start, vm_end;
789
790 if (!vma || vma->vm_start >= reg_end)
791 break;
792
793 /*
794 * Take the intersection of this VMA with the memory region
795 */
796 vm_start = max(hva, vma->vm_start);
797 vm_end = min(reg_end, vma->vm_end);
798
799 if (!(vma->vm_flags & VM_PFNMAP)) {
800 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
801 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
802 }
803 hva = vm_end;
804 } while (hva < reg_end);
805}
806
807/**
808 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
809 * @kvm: The struct kvm pointer
810 *
811 * Go through the memregions and unmap any reguler RAM
812 * backing memory already mapped to the VM.
813 */
814void stage2_unmap_vm(struct kvm *kvm)
815{
816 struct kvm_memslots *slots;
817 struct kvm_memory_slot *memslot;
818 int idx;
819
820 idx = srcu_read_lock(&kvm->srcu);
90f6e150 821 down_read(&current->mm->mmap_sem);
957db105
CD
822 spin_lock(&kvm->mmu_lock);
823
824 slots = kvm_memslots(kvm);
825 kvm_for_each_memslot(memslot, slots)
826 stage2_unmap_memslot(kvm, memslot);
827
828 spin_unlock(&kvm->mmu_lock);
90f6e150 829 up_read(&current->mm->mmap_sem);
957db105
CD
830 srcu_read_unlock(&kvm->srcu, idx);
831}
832
d5d8184d
CD
833/**
834 * kvm_free_stage2_pgd - free all stage-2 tables
835 * @kvm: The KVM struct pointer for the VM.
836 *
837 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
838 * underlying level-2 and level-3 tables before freeing the actual level-1 table
839 * and setting the struct pointer to NULL.
d5d8184d
CD
840 */
841void kvm_free_stage2_pgd(struct kvm *kvm)
842{
6c0d706b 843 void *pgd = NULL;
d5d8184d 844
8b3405e3 845 spin_lock(&kvm->mmu_lock);
6c0d706b
SP
846 if (kvm->arch.pgd) {
847 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
2952a607 848 pgd = READ_ONCE(kvm->arch.pgd);
6c0d706b
SP
849 kvm->arch.pgd = NULL;
850 }
8b3405e3
SP
851 spin_unlock(&kvm->mmu_lock);
852
9163ee23 853 /* Free the HW pgd, one page at a time */
6c0d706b
SP
854 if (pgd)
855 free_pages_exact(pgd, S2_PGD_SIZE);
d5d8184d
CD
856}
857
38f791a4 858static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 859 phys_addr_t addr)
d5d8184d
CD
860{
861 pgd_t *pgd;
862 pud_t *pud;
d5d8184d 863
70fd1906
SP
864 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
865 if (WARN_ON(stage2_pgd_none(*pgd))) {
38f791a4
CD
866 if (!cache)
867 return NULL;
868 pud = mmu_memory_cache_alloc(cache);
70fd1906 869 stage2_pgd_populate(pgd, pud);
38f791a4
CD
870 get_page(virt_to_page(pgd));
871 }
872
70fd1906 873 return stage2_pud_offset(pgd, addr);
38f791a4
CD
874}
875
876static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
877 phys_addr_t addr)
878{
879 pud_t *pud;
880 pmd_t *pmd;
881
882 pud = stage2_get_pud(kvm, cache, addr);
d6dbdd3c
MZ
883 if (!pud)
884 return NULL;
885
70fd1906 886 if (stage2_pud_none(*pud)) {
d5d8184d 887 if (!cache)
ad361f09 888 return NULL;
d5d8184d 889 pmd = mmu_memory_cache_alloc(cache);
70fd1906 890 stage2_pud_populate(pud, pmd);
d5d8184d 891 get_page(virt_to_page(pud));
c62ee2b2
MZ
892 }
893
70fd1906 894 return stage2_pmd_offset(pud, addr);
ad361f09
CD
895}
896
897static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
898 *cache, phys_addr_t addr, const pmd_t *new_pmd)
899{
900 pmd_t *pmd, old_pmd;
901
902 pmd = stage2_get_pmd(kvm, cache, addr);
903 VM_BUG_ON(!pmd);
d5d8184d 904
ad361f09 905 old_pmd = *pmd;
d4b9e079 906 if (pmd_present(old_pmd)) {
f204504b
PA
907 /*
908 * Multiple vcpus faulting on the same PMD entry, can
909 * lead to them sequentially updating the PMD with the
910 * same value. Following the break-before-make
911 * (pmd_clear() followed by tlb_flush()) process can
912 * hinder forward progress due to refaults generated
913 * on missing translations.
914 *
915 * Skip updating the page table if the entry is
916 * unchanged.
917 */
918 if (pmd_val(old_pmd) == pmd_val(*new_pmd))
919 return 0;
920
921 /*
922 * Mapping in huge pages should only happen through a
923 * fault. If a page is merged into a transparent huge
924 * page, the individual subpages of that huge page
925 * should be unmapped through MMU notifiers before we
926 * get here.
927 *
928 * Merging of CompoundPages is not supported; they
929 * should become splitting first, unmapped, merged,
930 * and mapped back in on-demand.
931 */
932 VM_BUG_ON(pmd_pfn(old_pmd) != pmd_pfn(*new_pmd));
933
d4b9e079 934 pmd_clear(pmd);
ad361f09 935 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 936 } else {
ad361f09 937 get_page(virt_to_page(pmd));
d4b9e079
MZ
938 }
939
940 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
941 return 0;
942}
943
944static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
945 phys_addr_t addr, const pte_t *new_pte,
946 unsigned long flags)
ad361f09
CD
947{
948 pmd_t *pmd;
949 pte_t *pte, old_pte;
15a49a44
MS
950 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
951 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
952
953 VM_BUG_ON(logging_active && !cache);
ad361f09 954
38f791a4 955 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
956 pmd = stage2_get_pmd(kvm, cache, addr);
957 if (!pmd) {
958 /*
959 * Ignore calls from kvm_set_spte_hva for unallocated
960 * address ranges.
961 */
962 return 0;
963 }
964
15a49a44
MS
965 /*
966 * While dirty page logging - dissolve huge PMD, then continue on to
967 * allocate page.
968 */
969 if (logging_active)
970 stage2_dissolve_pmd(kvm, addr, pmd);
971
ad361f09 972 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
973 if (pmd_none(*pmd)) {
974 if (!cache)
975 return 0; /* ignore calls from kvm_set_spte_hva */
976 pte = mmu_memory_cache_alloc(cache);
d5d8184d 977 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 978 get_page(virt_to_page(pmd));
c62ee2b2
MZ
979 }
980
981 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
982
983 if (iomap && pte_present(*pte))
984 return -EFAULT;
985
986 /* Create 2nd stage page table mapping - Level 3 */
987 old_pte = *pte;
d4b9e079 988 if (pte_present(old_pte)) {
6fb85b5e
PA
989 /* Skip page table update if there is no change */
990 if (pte_val(old_pte) == pte_val(*new_pte))
991 return 0;
992
d4b9e079 993 kvm_set_pte(pte, __pte(0));
48762767 994 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 995 } else {
d5d8184d 996 get_page(virt_to_page(pte));
d4b9e079 997 }
d5d8184d 998
d4b9e079 999 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
1000 return 0;
1001}
d5d8184d 1002
06485053
CM
1003#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1004static int stage2_ptep_test_and_clear_young(pte_t *pte)
1005{
1006 if (pte_young(*pte)) {
1007 *pte = pte_mkold(*pte);
1008 return 1;
1009 }
d5d8184d
CD
1010 return 0;
1011}
06485053
CM
1012#else
1013static int stage2_ptep_test_and_clear_young(pte_t *pte)
1014{
1015 return __ptep_test_and_clear_young(pte);
1016}
1017#endif
1018
1019static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
1020{
1021 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
1022}
d5d8184d
CD
1023
1024/**
1025 * kvm_phys_addr_ioremap - map a device range to guest IPA
1026 *
1027 * @kvm: The KVM pointer
1028 * @guest_ipa: The IPA at which to insert the mapping
1029 * @pa: The physical address of the device
1030 * @size: The size of the mapping
1031 */
1032int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1033 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1034{
1035 phys_addr_t addr, end;
1036 int ret = 0;
1037 unsigned long pfn;
1038 struct kvm_mmu_memory_cache cache = { 0, };
1039
1040 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1041 pfn = __phys_to_pfn(pa);
1042
1043 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1044 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1045
c40f2f8f 1046 if (writable)
06485053 1047 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1048
38f791a4
CD
1049 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
1050 KVM_NR_MEM_OBJS);
d5d8184d
CD
1051 if (ret)
1052 goto out;
1053 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1054 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1055 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1056 spin_unlock(&kvm->mmu_lock);
1057 if (ret)
1058 goto out;
1059
1060 pfn++;
1061 }
1062
1063out:
1064 mmu_free_memory_cache(&cache);
1065 return ret;
1066}
1067
ba049e93 1068static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1069{
ba049e93 1070 kvm_pfn_t pfn = *pfnp;
9b5fdb97 1071 gfn_t gfn = *ipap >> PAGE_SHIFT;
dd7c858d 1072 struct page *page = pfn_to_page(pfn);
9b5fdb97 1073
dd7c858d
PA
1074 /*
1075 * PageTransCompoungMap() returns true for THP and
1076 * hugetlbfs. Make sure the adjustment is done only for THP
1077 * pages.
1078 */
1079 if (!PageHuge(page) && PageTransCompoundMap(page)) {
9b5fdb97
CD
1080 unsigned long mask;
1081 /*
1082 * The address we faulted on is backed by a transparent huge
1083 * page. However, because we map the compound huge page and
1084 * not the individual tail page, we need to transfer the
1085 * refcount to the head page. We have to be careful that the
1086 * THP doesn't start to split while we are adjusting the
1087 * refcounts.
1088 *
1089 * We are sure this doesn't happen, because mmu_notifier_retry
1090 * was successful and we are holding the mmu_lock, so if this
1091 * THP is trying to split, it will be blocked in the mmu
1092 * notifier before touching any of the pages, specifically
1093 * before being able to call __split_huge_page_refcount().
1094 *
1095 * We can therefore safely transfer the refcount from PG_tail
1096 * to PG_head and switch the pfn from a tail page to the head
1097 * page accordingly.
1098 */
1099 mask = PTRS_PER_PMD - 1;
1100 VM_BUG_ON((gfn & mask) != (pfn & mask));
1101 if (pfn & mask) {
1102 *ipap &= PMD_MASK;
1103 kvm_release_pfn_clean(pfn);
1104 pfn &= ~mask;
1105 kvm_get_pfn(pfn);
1106 *pfnp = pfn;
1107 }
1108
1109 return true;
1110 }
1111
1112 return false;
1113}
1114
a7d079ce
AB
1115static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1116{
1117 if (kvm_vcpu_trap_is_iabt(vcpu))
1118 return false;
1119
1120 return kvm_vcpu_dabt_iswrite(vcpu);
1121}
1122
c6473555
MS
1123/**
1124 * stage2_wp_ptes - write protect PMD range
1125 * @pmd: pointer to pmd entry
1126 * @addr: range start address
1127 * @end: range end address
1128 */
1129static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1130{
1131 pte_t *pte;
1132
1133 pte = pte_offset_kernel(pmd, addr);
1134 do {
1135 if (!pte_none(*pte)) {
1136 if (!kvm_s2pte_readonly(pte))
1137 kvm_set_s2pte_readonly(pte);
1138 }
1139 } while (pte++, addr += PAGE_SIZE, addr != end);
1140}
1141
1142/**
1143 * stage2_wp_pmds - write protect PUD range
1144 * @pud: pointer to pud entry
1145 * @addr: range start address
1146 * @end: range end address
1147 */
1148static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1149{
1150 pmd_t *pmd;
1151 phys_addr_t next;
1152
70fd1906 1153 pmd = stage2_pmd_offset(pud, addr);
c6473555
MS
1154
1155 do {
70fd1906 1156 next = stage2_pmd_addr_end(addr, end);
c6473555 1157 if (!pmd_none(*pmd)) {
bbb3b6b3 1158 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1159 if (!kvm_s2pmd_readonly(pmd))
1160 kvm_set_s2pmd_readonly(pmd);
1161 } else {
1162 stage2_wp_ptes(pmd, addr, next);
1163 }
1164 }
1165 } while (pmd++, addr = next, addr != end);
1166}
1167
1168/**
1169 * stage2_wp_puds - write protect PGD range
1170 * @pgd: pointer to pgd entry
1171 * @addr: range start address
1172 * @end: range end address
1173 *
1174 * Process PUD entries, for a huge PUD we cause a panic.
1175 */
1176static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1177{
1178 pud_t *pud;
1179 phys_addr_t next;
1180
70fd1906 1181 pud = stage2_pud_offset(pgd, addr);
c6473555 1182 do {
70fd1906
SP
1183 next = stage2_pud_addr_end(addr, end);
1184 if (!stage2_pud_none(*pud)) {
c6473555 1185 /* TODO:PUD not supported, revisit later if supported */
70fd1906 1186 BUG_ON(stage2_pud_huge(*pud));
c6473555
MS
1187 stage2_wp_pmds(pud, addr, next);
1188 }
1189 } while (pud++, addr = next, addr != end);
1190}
1191
1192/**
1193 * stage2_wp_range() - write protect stage2 memory region range
1194 * @kvm: The KVM pointer
1195 * @addr: Start address of range
1196 * @end: End address of range
1197 */
1198static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1199{
1200 pgd_t *pgd;
1201 phys_addr_t next;
1202
70fd1906 1203 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
c6473555
MS
1204 do {
1205 /*
1206 * Release kvm_mmu_lock periodically if the memory region is
1207 * large. Otherwise, we may see kernel panics with
227ea818
CD
1208 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1209 * CONFIG_LOCKDEP. Additionally, holding the lock too long
0c428a6a
SP
1210 * will also starve other vCPUs. We have to also make sure
1211 * that the page tables are not freed while we released
1212 * the lock.
c6473555 1213 */
0c428a6a
SP
1214 cond_resched_lock(&kvm->mmu_lock);
1215 if (!READ_ONCE(kvm->arch.pgd))
1216 break;
70fd1906
SP
1217 next = stage2_pgd_addr_end(addr, end);
1218 if (stage2_pgd_present(*pgd))
c6473555
MS
1219 stage2_wp_puds(pgd, addr, next);
1220 } while (pgd++, addr = next, addr != end);
1221}
1222
1223/**
1224 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1225 * @kvm: The KVM pointer
1226 * @slot: The memory slot to write protect
1227 *
1228 * Called to start logging dirty pages after memory region
1229 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1230 * all present PMD and PTEs are write protected in the memory region.
1231 * Afterwards read of dirty page log can be called.
1232 *
1233 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1234 * serializing operations for VM memory regions.
1235 */
1236void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1237{
9f6b8029
PB
1238 struct kvm_memslots *slots = kvm_memslots(kvm);
1239 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1240 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1241 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1242
1243 spin_lock(&kvm->mmu_lock);
1244 stage2_wp_range(kvm, start, end);
1245 spin_unlock(&kvm->mmu_lock);
1246 kvm_flush_remote_tlbs(kvm);
1247}
53c810c3
MS
1248
1249/**
3b0f1d01 1250 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1251 * @kvm: The KVM pointer
1252 * @slot: The memory slot associated with mask
1253 * @gfn_offset: The gfn offset in memory slot
1254 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1255 * slot to be write protected
1256 *
1257 * Walks bits set in mask write protects the associated pte's. Caller must
1258 * acquire kvm_mmu_lock.
1259 */
3b0f1d01 1260static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1261 struct kvm_memory_slot *slot,
1262 gfn_t gfn_offset, unsigned long mask)
1263{
1264 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1265 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1266 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1267
1268 stage2_wp_range(kvm, start, end);
1269}
c6473555 1270
3b0f1d01
KH
1271/*
1272 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1273 * dirty pages.
1274 *
1275 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1276 * enable dirty logging for them.
1277 */
1278void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1279 struct kvm_memory_slot *slot,
1280 gfn_t gfn_offset, unsigned long mask)
1281{
1282 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1283}
1284
ba049e93 1285static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
13b7756c 1286 unsigned long size)
0d3e4d4f 1287{
13b7756c 1288 __coherent_cache_guest_page(vcpu, pfn, size);
0d3e4d4f
MZ
1289}
1290
196f878a
JM
1291static void kvm_send_hwpoison_signal(unsigned long address,
1292 struct vm_area_struct *vma)
1293{
1294 siginfo_t info;
1295
1296 info.si_signo = SIGBUS;
1297 info.si_errno = 0;
1298 info.si_code = BUS_MCEERR_AR;
1299 info.si_addr = (void __user *)address;
1300
1301 if (is_vm_hugetlb_page(vma))
1302 info.si_addr_lsb = huge_page_shift(hstate_vma(vma));
1303 else
1304 info.si_addr_lsb = PAGE_SHIFT;
1305
1306 send_sig_info(SIGBUS, &info, current);
1307}
1308
94f8e641 1309static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1310 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1311 unsigned long fault_status)
1312{
94f8e641 1313 int ret;
9b5fdb97 1314 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1315 unsigned long mmu_seq;
ad361f09 1316 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1317 struct kvm *kvm = vcpu->kvm;
94f8e641 1318 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1319 struct vm_area_struct *vma;
ba049e93 1320 kvm_pfn_t pfn;
b8865767 1321 pgprot_t mem_type = PAGE_S2;
15a49a44
MS
1322 bool logging_active = memslot_is_logging(memslot);
1323 unsigned long flags = 0;
94f8e641 1324
a7d079ce 1325 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1326 if (fault_status == FSC_PERM && !write_fault) {
1327 kvm_err("Unexpected L2 read permission error\n");
1328 return -EFAULT;
1329 }
1330
ad361f09
CD
1331 /* Let's check if we will get back a huge page backed by hugetlbfs */
1332 down_read(&current->mm->mmap_sem);
1333 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1334 if (unlikely(!vma)) {
1335 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1336 up_read(&current->mm->mmap_sem);
1337 return -EFAULT;
1338 }
1339
c507babf 1340 if (vma_kernel_pagesize(vma) == PMD_SIZE && !logging_active) {
ad361f09
CD
1341 hugetlb = true;
1342 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1343 } else {
1344 /*
136d737f
MZ
1345 * Pages belonging to memslots that don't have the same
1346 * alignment for userspace and IPA cannot be mapped using
1347 * block descriptors even if the pages belong to a THP for
1348 * the process, because the stage-2 block descriptor will
1349 * cover more than a single THP and we loose atomicity for
1350 * unmapping, updates, and splits of the THP or other pages
1351 * in the stage-2 block range.
9b5fdb97 1352 */
136d737f
MZ
1353 if ((memslot->userspace_addr & ~PMD_MASK) !=
1354 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1355 force_pte = true;
ad361f09
CD
1356 }
1357 up_read(&current->mm->mmap_sem);
1358
94f8e641 1359 /* We need minimum second+third level pages */
38f791a4
CD
1360 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1361 KVM_NR_MEM_OBJS);
94f8e641
CD
1362 if (ret)
1363 return ret;
1364
1365 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1366 /*
1367 * Ensure the read of mmu_notifier_seq happens before we call
1368 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1369 * the page we just got a reference to gets unmapped before we have a
1370 * chance to grab the mmu_lock, which ensure that if the page gets
1371 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1372 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1373 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1374 */
1375 smp_rmb();
1376
ad361f09 1377 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
196f878a
JM
1378 if (pfn == KVM_PFN_ERR_HWPOISON) {
1379 kvm_send_hwpoison_signal(hva, vma);
1380 return 0;
1381 }
9ac71595 1382 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1383 return -EFAULT;
1384
15a49a44 1385 if (kvm_is_device_pfn(pfn)) {
b8865767 1386 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1387 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1388 } else if (logging_active) {
1389 /*
1390 * Faults on pages in a memslot with logging enabled
1391 * should not be mapped with huge pages (it introduces churn
1392 * and performance degradation), so force a pte mapping.
1393 */
1394 force_pte = true;
1395 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1396
1397 /*
1398 * Only actually map the page as writable if this was a write
1399 * fault.
1400 */
1401 if (!write_fault)
1402 writable = false;
1403 }
b8865767 1404
ad361f09
CD
1405 spin_lock(&kvm->mmu_lock);
1406 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1407 goto out_unlock;
15a49a44 1408
9b5fdb97
CD
1409 if (!hugetlb && !force_pte)
1410 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09
CD
1411
1412 if (hugetlb) {
b8865767 1413 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1414 new_pmd = pmd_mkhuge(new_pmd);
1415 if (writable) {
06485053 1416 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
ad361f09
CD
1417 kvm_set_pfn_dirty(pfn);
1418 }
13b7756c 1419 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE);
ad361f09
CD
1420 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1421 } else {
b8865767 1422 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1423
ad361f09 1424 if (writable) {
06485053 1425 new_pte = kvm_s2pte_mkwrite(new_pte);
ad361f09 1426 kvm_set_pfn_dirty(pfn);
15a49a44 1427 mark_page_dirty(kvm, gfn);
ad361f09 1428 }
13b7756c 1429 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE);
15a49a44 1430 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1431 }
ad361f09 1432
94f8e641 1433out_unlock:
ad361f09 1434 spin_unlock(&kvm->mmu_lock);
35307b9a 1435 kvm_set_pfn_accessed(pfn);
94f8e641 1436 kvm_release_pfn_clean(pfn);
ad361f09 1437 return ret;
94f8e641
CD
1438}
1439
aeda9130
MZ
1440/*
1441 * Resolve the access fault by making the page young again.
1442 * Note that because the faulting entry is guaranteed not to be
1443 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1444 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1445 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1446 */
1447static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1448{
1449 pmd_t *pmd;
1450 pte_t *pte;
ba049e93 1451 kvm_pfn_t pfn;
aeda9130
MZ
1452 bool pfn_valid = false;
1453
1454 trace_kvm_access_fault(fault_ipa);
1455
1456 spin_lock(&vcpu->kvm->mmu_lock);
1457
1458 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1459 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1460 goto out;
1461
bbb3b6b3 1462 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1463 *pmd = pmd_mkyoung(*pmd);
1464 pfn = pmd_pfn(*pmd);
1465 pfn_valid = true;
1466 goto out;
1467 }
1468
1469 pte = pte_offset_kernel(pmd, fault_ipa);
1470 if (pte_none(*pte)) /* Nothing there either */
1471 goto out;
1472
1473 *pte = pte_mkyoung(*pte); /* Just a page... */
1474 pfn = pte_pfn(*pte);
1475 pfn_valid = true;
1476out:
1477 spin_unlock(&vcpu->kvm->mmu_lock);
1478 if (pfn_valid)
1479 kvm_set_pfn_accessed(pfn);
1480}
1481
94f8e641
CD
1482/**
1483 * kvm_handle_guest_abort - handles all 2nd stage aborts
1484 * @vcpu: the VCPU pointer
1485 * @run: the kvm_run structure
1486 *
1487 * Any abort that gets to the host is almost guaranteed to be caused by a
1488 * missing second stage translation table entry, which can mean that either the
1489 * guest simply needs more memory and we must allocate an appropriate page or it
1490 * can mean that the guest tried to access I/O memory, which is emulated by user
1491 * space. The distinction is based on the IPA causing the fault and whether this
1492 * memory region has been registered as standard RAM by user space.
1493 */
342cd0ab
CD
1494int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1495{
94f8e641
CD
1496 unsigned long fault_status;
1497 phys_addr_t fault_ipa;
1498 struct kvm_memory_slot *memslot;
98047888
CD
1499 unsigned long hva;
1500 bool is_iabt, write_fault, writable;
94f8e641
CD
1501 gfn_t gfn;
1502 int ret, idx;
1503
621f48e4
TB
1504 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
1505
1506 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
bb428921 1507 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
621f48e4 1508
bb428921
JM
1509 /* Synchronous External Abort? */
1510 if (kvm_vcpu_dabt_isextabt(vcpu)) {
1511 /*
1512 * For RAS the host kernel may handle this abort.
1513 * There is no need to pass the error into the guest.
1514 */
621f48e4
TB
1515 if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
1516 return 1;
621f48e4 1517
bb428921
JM
1518 if (unlikely(!is_iabt)) {
1519 kvm_inject_vabt(vcpu);
1520 return 1;
1521 }
4055710b
MZ
1522 }
1523
7393b599
MZ
1524 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1525 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1526
1527 /* Check the stage-2 fault is trans. fault or write fault */
35307b9a
MZ
1528 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1529 fault_status != FSC_ACCESS) {
0496daa5
CD
1530 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1531 kvm_vcpu_trap_get_class(vcpu),
1532 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1533 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1534 return -EFAULT;
1535 }
1536
1537 idx = srcu_read_lock(&vcpu->kvm->srcu);
1538
1539 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1540 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1541 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1542 write_fault = kvm_is_write_fault(vcpu);
98047888 1543 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1544 if (is_iabt) {
1545 /* Prefetch Abort on I/O address */
7393b599 1546 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1547 ret = 1;
1548 goto out_unlock;
1549 }
1550
57c841f1
MZ
1551 /*
1552 * Check for a cache maintenance operation. Since we
1553 * ended-up here, we know it is outside of any memory
1554 * slot. But we can't find out if that is for a device,
1555 * or if the guest is just being stupid. The only thing
1556 * we know for sure is that this range cannot be cached.
1557 *
1558 * So let's assume that the guest is just being
1559 * cautious, and skip the instruction.
1560 */
1561 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1562 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1563 ret = 1;
1564 goto out_unlock;
1565 }
1566
cfe3950c
MZ
1567 /*
1568 * The IPA is reported as [MAX:12], so we need to
1569 * complement it with the bottom 12 bits from the
1570 * faulting VA. This is always 12 bits, irrespective
1571 * of the page size.
1572 */
1573 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1574 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1575 goto out_unlock;
1576 }
1577
c3058d5d
CD
1578 /* Userspace should not be able to register out-of-bounds IPAs */
1579 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1580
aeda9130
MZ
1581 if (fault_status == FSC_ACCESS) {
1582 handle_access_fault(vcpu, fault_ipa);
1583 ret = 1;
1584 goto out_unlock;
1585 }
1586
98047888 1587 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1588 if (ret == 0)
1589 ret = 1;
1590out_unlock:
1591 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1592 return ret;
342cd0ab
CD
1593}
1594
1d2ebacc
MZ
1595static int handle_hva_to_gpa(struct kvm *kvm,
1596 unsigned long start,
1597 unsigned long end,
1598 int (*handler)(struct kvm *kvm,
056aad67
SP
1599 gpa_t gpa, u64 size,
1600 void *data),
1d2ebacc 1601 void *data)
d5d8184d
CD
1602{
1603 struct kvm_memslots *slots;
1604 struct kvm_memory_slot *memslot;
1d2ebacc 1605 int ret = 0;
d5d8184d
CD
1606
1607 slots = kvm_memslots(kvm);
1608
1609 /* we only care about the pages that the guest sees */
1610 kvm_for_each_memslot(memslot, slots) {
1611 unsigned long hva_start, hva_end;
056aad67 1612 gfn_t gpa;
d5d8184d
CD
1613
1614 hva_start = max(start, memslot->userspace_addr);
1615 hva_end = min(end, memslot->userspace_addr +
1616 (memslot->npages << PAGE_SHIFT));
1617 if (hva_start >= hva_end)
1618 continue;
1619
056aad67
SP
1620 gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
1621 ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
d5d8184d 1622 }
1d2ebacc
MZ
1623
1624 return ret;
d5d8184d
CD
1625}
1626
056aad67 1627static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d 1628{
056aad67 1629 unmap_stage2_range(kvm, gpa, size);
1d2ebacc 1630 return 0;
d5d8184d
CD
1631}
1632
1633int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1634{
1635 unsigned long end = hva + PAGE_SIZE;
1636
1637 if (!kvm->arch.pgd)
1638 return 0;
1639
1640 trace_kvm_unmap_hva(hva);
1641 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1642 return 0;
1643}
1644
1645int kvm_unmap_hva_range(struct kvm *kvm,
1646 unsigned long start, unsigned long end)
1647{
1648 if (!kvm->arch.pgd)
1649 return 0;
1650
1651 trace_kvm_unmap_hva_range(start, end);
1652 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1653 return 0;
1654}
1655
056aad67 1656static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d
CD
1657{
1658 pte_t *pte = (pte_t *)data;
1659
056aad67 1660 WARN_ON(size != PAGE_SIZE);
15a49a44
MS
1661 /*
1662 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1663 * flag clear because MMU notifiers will have unmapped a huge PMD before
1664 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1665 * therefore stage2_set_pte() never needs to clear out a huge PMD
1666 * through this calling path.
1667 */
1668 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1669 return 0;
d5d8184d
CD
1670}
1671
1672
1673void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1674{
1675 unsigned long end = hva + PAGE_SIZE;
1676 pte_t stage2_pte;
1677
1678 if (!kvm->arch.pgd)
1679 return;
1680
1681 trace_kvm_set_spte_hva(hva);
1682 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1683 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1684}
1685
056aad67 1686static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1687{
1688 pmd_t *pmd;
1689 pte_t *pte;
1690
056aad67 1691 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1692 pmd = stage2_get_pmd(kvm, NULL, gpa);
1693 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1694 return 0;
1695
06485053
CM
1696 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1697 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1698
1699 pte = pte_offset_kernel(pmd, gpa);
1700 if (pte_none(*pte))
1701 return 0;
1702
06485053 1703 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1704}
1705
056aad67 1706static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1707{
1708 pmd_t *pmd;
1709 pte_t *pte;
1710
056aad67 1711 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1712 pmd = stage2_get_pmd(kvm, NULL, gpa);
1713 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1714 return 0;
1715
bbb3b6b3 1716 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1717 return pmd_young(*pmd);
1718
1719 pte = pte_offset_kernel(pmd, gpa);
1720 if (!pte_none(*pte)) /* Just a page... */
1721 return pte_young(*pte);
1722
1723 return 0;
1724}
1725
1726int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1727{
7e5a6722
SP
1728 if (!kvm->arch.pgd)
1729 return 0;
35307b9a
MZ
1730 trace_kvm_age_hva(start, end);
1731 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1732}
1733
1734int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1735{
7e5a6722
SP
1736 if (!kvm->arch.pgd)
1737 return 0;
35307b9a
MZ
1738 trace_kvm_test_age_hva(hva);
1739 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1740}
1741
d5d8184d
CD
1742void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1743{
1744 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1745}
1746
342cd0ab
CD
1747phys_addr_t kvm_mmu_get_httbr(void)
1748{
e4c5a685
AB
1749 if (__kvm_cpu_uses_extended_idmap())
1750 return virt_to_phys(merged_hyp_pgd);
1751 else
1752 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1753}
1754
5a677ce0
MZ
1755phys_addr_t kvm_get_idmap_vector(void)
1756{
1757 return hyp_idmap_vector;
1758}
1759
0535a3e2
MZ
1760static int kvm_map_idmap_text(pgd_t *pgd)
1761{
1762 int err;
1763
1764 /* Create the idmap in the boot page tables */
1765 err = __create_hyp_mappings(pgd,
1766 hyp_idmap_start, hyp_idmap_end,
1767 __phys_to_pfn(hyp_idmap_start),
1768 PAGE_HYP_EXEC);
1769 if (err)
1770 kvm_err("Failed to idmap %lx-%lx\n",
1771 hyp_idmap_start, hyp_idmap_end);
1772
1773 return err;
1774}
1775
342cd0ab
CD
1776int kvm_mmu_init(void)
1777{
2fb41059
MZ
1778 int err;
1779
4fda342c
SS
1780 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1781 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1782 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1783
06f75a1f
AB
1784 /*
1785 * We rely on the linker script to ensure at build time that the HYP
1786 * init code does not cross a page boundary.
1787 */
1788 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1789
cdebf7c1
AB
1790 kvm_debug("IDMAP page: %lx\n", hyp_idmap_start);
1791 kvm_debug("HYP VA range: %lx:%lx\n",
1792 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
eac378a9 1793
6c41a413 1794 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
d2896d4b
MZ
1795 hyp_idmap_start < kern_hyp_va(~0UL) &&
1796 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1797 /*
1798 * The idmap page is intersecting with the VA space,
1799 * it is not safe to continue further.
1800 */
1801 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
1802 err = -EINVAL;
1803 goto out;
1804 }
1805
38f791a4 1806 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 1807 if (!hyp_pgd) {
d5d8184d 1808 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1809 err = -ENOMEM;
1810 goto out;
1811 }
1812
0535a3e2
MZ
1813 if (__kvm_cpu_uses_extended_idmap()) {
1814 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
1815 hyp_pgd_order);
1816 if (!boot_hyp_pgd) {
1817 kvm_err("Hyp boot PGD not allocated\n");
1818 err = -ENOMEM;
1819 goto out;
1820 }
2fb41059 1821
0535a3e2
MZ
1822 err = kvm_map_idmap_text(boot_hyp_pgd);
1823 if (err)
1824 goto out;
d5d8184d 1825
e4c5a685
AB
1826 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1827 if (!merged_hyp_pgd) {
1828 kvm_err("Failed to allocate extra HYP pgd\n");
1829 goto out;
1830 }
1831 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1832 hyp_idmap_start);
0535a3e2
MZ
1833 } else {
1834 err = kvm_map_idmap_text(hyp_pgd);
1835 if (err)
1836 goto out;
5a677ce0
MZ
1837 }
1838
d5d8184d 1839 return 0;
2fb41059 1840out:
4f728276 1841 free_hyp_pgds();
2fb41059 1842 return err;
342cd0ab 1843}
df6ce24f
EA
1844
1845void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1846 const struct kvm_userspace_memory_region *mem,
df6ce24f 1847 const struct kvm_memory_slot *old,
f36f3f28 1848 const struct kvm_memory_slot *new,
df6ce24f
EA
1849 enum kvm_mr_change change)
1850{
c6473555
MS
1851 /*
1852 * At this point memslot has been committed and there is an
1853 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1854 * memory slot is write protected.
1855 */
1856 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1857 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1858}
1859
1860int kvm_arch_prepare_memory_region(struct kvm *kvm,
1861 struct kvm_memory_slot *memslot,
09170a49 1862 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1863 enum kvm_mr_change change)
1864{
8eef9123
AB
1865 hva_t hva = mem->userspace_addr;
1866 hva_t reg_end = hva + mem->memory_size;
1867 bool writable = !(mem->flags & KVM_MEM_READONLY);
1868 int ret = 0;
1869
15a49a44
MS
1870 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1871 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1872 return 0;
1873
c3058d5d
CD
1874 /*
1875 * Prevent userspace from creating a memory region outside of the IPA
1876 * space addressable by the KVM guest IPA space.
1877 */
1878 if (memslot->base_gfn + memslot->npages >=
1879 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1880 return -EFAULT;
1881
72f31048 1882 down_read(&current->mm->mmap_sem);
8eef9123
AB
1883 /*
1884 * A memory region could potentially cover multiple VMAs, and any holes
1885 * between them, so iterate over all of them to find out if we can map
1886 * any of them right now.
1887 *
1888 * +--------------------------------------------+
1889 * +---------------+----------------+ +----------------+
1890 * | : VMA 1 | VMA 2 | | VMA 3 : |
1891 * +---------------+----------------+ +----------------+
1892 * | memory region |
1893 * +--------------------------------------------+
1894 */
1895 do {
1896 struct vm_area_struct *vma = find_vma(current->mm, hva);
1897 hva_t vm_start, vm_end;
1898
1899 if (!vma || vma->vm_start >= reg_end)
1900 break;
1901
1902 /*
1903 * Mapping a read-only VMA is only allowed if the
1904 * memory region is configured as read-only.
1905 */
1906 if (writable && !(vma->vm_flags & VM_WRITE)) {
1907 ret = -EPERM;
1908 break;
1909 }
1910
1911 /*
1912 * Take the intersection of this VMA with the memory region
1913 */
1914 vm_start = max(hva, vma->vm_start);
1915 vm_end = min(reg_end, vma->vm_end);
1916
1917 if (vma->vm_flags & VM_PFNMAP) {
1918 gpa_t gpa = mem->guest_phys_addr +
1919 (vm_start - mem->userspace_addr);
ca09f02f
MM
1920 phys_addr_t pa;
1921
1922 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1923 pa += vm_start - vma->vm_start;
8eef9123 1924
15a49a44 1925 /* IO region dirty page logging not allowed */
72f31048
MZ
1926 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
1927 ret = -EINVAL;
1928 goto out;
1929 }
15a49a44 1930
8eef9123
AB
1931 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1932 vm_end - vm_start,
1933 writable);
1934 if (ret)
1935 break;
1936 }
1937 hva = vm_end;
1938 } while (hva < reg_end);
1939
15a49a44 1940 if (change == KVM_MR_FLAGS_ONLY)
72f31048 1941 goto out;
15a49a44 1942
849260c7
AB
1943 spin_lock(&kvm->mmu_lock);
1944 if (ret)
8eef9123 1945 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1946 else
1947 stage2_flush_memslot(kvm, memslot);
1948 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
1949out:
1950 up_read(&current->mm->mmap_sem);
8eef9123 1951 return ret;
df6ce24f
EA
1952}
1953
1954void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1955 struct kvm_memory_slot *dont)
1956{
1957}
1958
1959int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1960 unsigned long npages)
1961{
1962 return 0;
1963}
1964
578a59f1 1965void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
df6ce24f
EA
1966{
1967}
1968
1969void kvm_arch_flush_shadow_all(struct kvm *kvm)
1970{
293f2936 1971 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
1972}
1973
1974void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1975 struct kvm_memory_slot *slot)
1976{
8eef9123
AB
1977 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1978 phys_addr_t size = slot->npages << PAGE_SHIFT;
1979
1980 spin_lock(&kvm->mmu_lock);
1981 unmap_stage2_range(kvm, gpa, size);
1982 spin_unlock(&kvm->mmu_lock);
df6ce24f 1983}
3c1e7165
MZ
1984
1985/*
1986 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1987 *
1988 * Main problems:
1989 * - S/W ops are local to a CPU (not broadcast)
1990 * - We have line migration behind our back (speculation)
1991 * - System caches don't support S/W at all (damn!)
1992 *
1993 * In the face of the above, the best we can do is to try and convert
1994 * S/W ops to VA ops. Because the guest is not allowed to infer the
1995 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1996 * which is a rather good thing for us.
1997 *
1998 * Also, it is only used when turning caches on/off ("The expected
1999 * usage of the cache maintenance instructions that operate by set/way
2000 * is associated with the cache maintenance instructions associated
2001 * with the powerdown and powerup of caches, if this is required by
2002 * the implementation.").
2003 *
2004 * We use the following policy:
2005 *
2006 * - If we trap a S/W operation, we enable VM trapping to detect
2007 * caches being turned on/off, and do a full clean.
2008 *
2009 * - We flush the caches on both caches being turned on and off.
2010 *
2011 * - Once the caches are enabled, we stop trapping VM ops.
2012 */
2013void kvm_set_way_flush(struct kvm_vcpu *vcpu)
2014{
2015 unsigned long hcr = vcpu_get_hcr(vcpu);
2016
2017 /*
2018 * If this is the first time we do a S/W operation
2019 * (i.e. HCR_TVM not set) flush the whole memory, and set the
2020 * VM trapping.
2021 *
2022 * Otherwise, rely on the VM trapping to wait for the MMU +
2023 * Caches to be turned off. At that point, we'll be able to
2024 * clean the caches again.
2025 */
2026 if (!(hcr & HCR_TVM)) {
2027 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
2028 vcpu_has_cache_enabled(vcpu));
2029 stage2_flush_vm(vcpu->kvm);
2030 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
2031 }
2032}
2033
2034void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
2035{
2036 bool now_enabled = vcpu_has_cache_enabled(vcpu);
2037
2038 /*
2039 * If switching the MMU+caches on, need to invalidate the caches.
2040 * If switching it off, need to clean the caches.
2041 * Clean + invalidate does the trick always.
2042 */
2043 if (now_enabled != was_enabled)
2044 stage2_flush_vm(vcpu->kvm);
2045
2046 /* Caches are now on, stop trapping VM ops (until a S/W op) */
2047 if (now_enabled)
2048 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
2049
2050 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
2051}