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Merge branch 'for-4.15-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq
[mirror_ubuntu-bionic-kernel.git] / virt / kvm / arm / mmu.c
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1/*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
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18
19#include <linux/mman.h>
20#include <linux/kvm_host.h>
21#include <linux/io.h>
ad361f09 22#include <linux/hugetlb.h>
196f878a 23#include <linux/sched/signal.h>
45e96ea6 24#include <trace/events/kvm.h>
342cd0ab 25#include <asm/pgalloc.h>
94f8e641 26#include <asm/cacheflush.h>
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27#include <asm/kvm_arm.h>
28#include <asm/kvm_mmu.h>
45e96ea6 29#include <asm/kvm_mmio.h>
d5d8184d 30#include <asm/kvm_asm.h>
94f8e641 31#include <asm/kvm_emulate.h>
1e947bad 32#include <asm/virt.h>
621f48e4 33#include <asm/system_misc.h>
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34
35#include "trace.h"
342cd0ab 36
5a677ce0 37static pgd_t *boot_hyp_pgd;
2fb41059 38static pgd_t *hyp_pgd;
e4c5a685 39static pgd_t *merged_hyp_pgd;
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40static DEFINE_MUTEX(kvm_hyp_pgd_mutex);
41
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42static unsigned long hyp_idmap_start;
43static unsigned long hyp_idmap_end;
44static phys_addr_t hyp_idmap_vector;
45
9163ee23 46#define S2_PGD_SIZE (PTRS_PER_S2_PGD * sizeof(pgd_t))
38f791a4 47#define hyp_pgd_order get_order(PTRS_PER_PGD * sizeof(pgd_t))
5d4e08c4 48
15a49a44
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49#define KVM_S2PTE_FLAG_IS_IOMAP (1UL << 0)
50#define KVM_S2_FLAG_LOGGING_ACTIVE (1UL << 1)
51
52static bool memslot_is_logging(struct kvm_memory_slot *memslot)
53{
15a49a44 54 return memslot->dirty_bitmap && !(memslot->flags & KVM_MEM_READONLY);
7276030a
MS
55}
56
57/**
58 * kvm_flush_remote_tlbs() - flush all VM TLB entries for v7/8
59 * @kvm: pointer to kvm structure.
60 *
61 * Interface to HYP function to flush all VM TLB entries
62 */
63void kvm_flush_remote_tlbs(struct kvm *kvm)
64{
65 kvm_call_hyp(__kvm_tlb_flush_vmid, kvm);
15a49a44 66}
ad361f09 67
48762767 68static void kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
d5d8184d 69{
8684e701 70 kvm_call_hyp(__kvm_tlb_flush_vmid_ipa, kvm, ipa);
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71}
72
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73/*
74 * D-Cache management functions. They take the page table entries by
75 * value, as they are flushing the cache using the kernel mapping (or
76 * kmap on 32bit).
77 */
78static void kvm_flush_dcache_pte(pte_t pte)
79{
80 __kvm_flush_dcache_pte(pte);
81}
82
83static void kvm_flush_dcache_pmd(pmd_t pmd)
84{
85 __kvm_flush_dcache_pmd(pmd);
86}
87
88static void kvm_flush_dcache_pud(pud_t pud)
89{
90 __kvm_flush_dcache_pud(pud);
91}
92
e6fab544
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93static bool kvm_is_device_pfn(unsigned long pfn)
94{
95 return !pfn_valid(pfn);
96}
97
15a49a44
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98/**
99 * stage2_dissolve_pmd() - clear and flush huge PMD entry
100 * @kvm: pointer to kvm structure.
101 * @addr: IPA
102 * @pmd: pmd pointer for IPA
103 *
104 * Function clears a PMD entry, flushes addr 1st and 2nd stage TLBs. Marks all
105 * pages in the range dirty.
106 */
107static void stage2_dissolve_pmd(struct kvm *kvm, phys_addr_t addr, pmd_t *pmd)
108{
bbb3b6b3 109 if (!pmd_thp_or_huge(*pmd))
15a49a44
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110 return;
111
112 pmd_clear(pmd);
113 kvm_tlb_flush_vmid_ipa(kvm, addr);
114 put_page(virt_to_page(pmd));
115}
116
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117static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
118 int min, int max)
119{
120 void *page;
121
122 BUG_ON(max > KVM_NR_MEM_OBJS);
123 if (cache->nobjs >= min)
124 return 0;
125 while (cache->nobjs < max) {
126 page = (void *)__get_free_page(PGALLOC_GFP);
127 if (!page)
128 return -ENOMEM;
129 cache->objects[cache->nobjs++] = page;
130 }
131 return 0;
132}
133
134static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
135{
136 while (mc->nobjs)
137 free_page((unsigned long)mc->objects[--mc->nobjs]);
138}
139
140static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc)
141{
142 void *p;
143
144 BUG_ON(!mc || !mc->nobjs);
145 p = mc->objects[--mc->nobjs];
146 return p;
147}
148
7a1c831e 149static void clear_stage2_pgd_entry(struct kvm *kvm, pgd_t *pgd, phys_addr_t addr)
979acd5e 150{
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151 pud_t *pud_table __maybe_unused = stage2_pud_offset(pgd, 0UL);
152 stage2_pgd_clear(pgd);
4f853a71 153 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 154 stage2_pud_free(pud_table);
4f853a71 155 put_page(virt_to_page(pgd));
979acd5e
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156}
157
7a1c831e 158static void clear_stage2_pud_entry(struct kvm *kvm, pud_t *pud, phys_addr_t addr)
342cd0ab 159{
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SP
160 pmd_t *pmd_table __maybe_unused = stage2_pmd_offset(pud, 0);
161 VM_BUG_ON(stage2_pud_huge(*pud));
162 stage2_pud_clear(pud);
4f853a71 163 kvm_tlb_flush_vmid_ipa(kvm, addr);
7a1c831e 164 stage2_pmd_free(pmd_table);
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165 put_page(virt_to_page(pud));
166}
342cd0ab 167
7a1c831e 168static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr)
4f728276 169{
4f853a71 170 pte_t *pte_table = pte_offset_kernel(pmd, 0);
bbb3b6b3 171 VM_BUG_ON(pmd_thp_or_huge(*pmd));
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172 pmd_clear(pmd);
173 kvm_tlb_flush_vmid_ipa(kvm, addr);
174 pte_free_kernel(NULL, pte_table);
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175 put_page(virt_to_page(pmd));
176}
177
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178/*
179 * Unmapping vs dcache management:
180 *
181 * If a guest maps certain memory pages as uncached, all writes will
182 * bypass the data cache and go directly to RAM. However, the CPUs
183 * can still speculate reads (not writes) and fill cache lines with
184 * data.
185 *
186 * Those cache lines will be *clean* cache lines though, so a
187 * clean+invalidate operation is equivalent to an invalidate
188 * operation, because no cache lines are marked dirty.
189 *
190 * Those clean cache lines could be filled prior to an uncached write
191 * by the guest, and the cache coherent IO subsystem would therefore
192 * end up writing old data to disk.
193 *
194 * This is why right after unmapping a page/section and invalidating
195 * the corresponding TLBs, we call kvm_flush_dcache_p*() to make sure
196 * the IO subsystem will never hit in the cache.
197 */
7a1c831e 198static void unmap_stage2_ptes(struct kvm *kvm, pmd_t *pmd,
4f853a71 199 phys_addr_t addr, phys_addr_t end)
4f728276 200{
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201 phys_addr_t start_addr = addr;
202 pte_t *pte, *start_pte;
203
204 start_pte = pte = pte_offset_kernel(pmd, addr);
205 do {
206 if (!pte_none(*pte)) {
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207 pte_t old_pte = *pte;
208
4f853a71 209 kvm_set_pte(pte, __pte(0));
4f853a71 210 kvm_tlb_flush_vmid_ipa(kvm, addr);
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211
212 /* No need to invalidate the cache for device mappings */
0de58f85 213 if (!kvm_is_device_pfn(pte_pfn(old_pte)))
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214 kvm_flush_dcache_pte(old_pte);
215
216 put_page(virt_to_page(pte));
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217 }
218 } while (pte++, addr += PAGE_SIZE, addr != end);
219
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220 if (stage2_pte_table_empty(start_pte))
221 clear_stage2_pmd_entry(kvm, pmd, start_addr);
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222}
223
7a1c831e 224static void unmap_stage2_pmds(struct kvm *kvm, pud_t *pud,
4f853a71 225 phys_addr_t addr, phys_addr_t end)
000d3996 226{
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227 phys_addr_t next, start_addr = addr;
228 pmd_t *pmd, *start_pmd;
000d3996 229
7a1c831e 230 start_pmd = pmd = stage2_pmd_offset(pud, addr);
4f853a71 231 do {
7a1c831e 232 next = stage2_pmd_addr_end(addr, end);
4f853a71 233 if (!pmd_none(*pmd)) {
bbb3b6b3 234 if (pmd_thp_or_huge(*pmd)) {
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235 pmd_t old_pmd = *pmd;
236
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237 pmd_clear(pmd);
238 kvm_tlb_flush_vmid_ipa(kvm, addr);
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239
240 kvm_flush_dcache_pmd(old_pmd);
241
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242 put_page(virt_to_page(pmd));
243 } else {
7a1c831e 244 unmap_stage2_ptes(kvm, pmd, addr, next);
4f853a71 245 }
ad361f09 246 }
4f853a71 247 } while (pmd++, addr = next, addr != end);
ad361f09 248
7a1c831e
SP
249 if (stage2_pmd_table_empty(start_pmd))
250 clear_stage2_pud_entry(kvm, pud, start_addr);
4f853a71 251}
000d3996 252
7a1c831e 253static void unmap_stage2_puds(struct kvm *kvm, pgd_t *pgd,
4f853a71
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254 phys_addr_t addr, phys_addr_t end)
255{
256 phys_addr_t next, start_addr = addr;
257 pud_t *pud, *start_pud;
4f728276 258
7a1c831e 259 start_pud = pud = stage2_pud_offset(pgd, addr);
4f853a71 260 do {
7a1c831e
SP
261 next = stage2_pud_addr_end(addr, end);
262 if (!stage2_pud_none(*pud)) {
263 if (stage2_pud_huge(*pud)) {
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264 pud_t old_pud = *pud;
265
7a1c831e 266 stage2_pud_clear(pud);
4f853a71 267 kvm_tlb_flush_vmid_ipa(kvm, addr);
363ef89f 268 kvm_flush_dcache_pud(old_pud);
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CD
269 put_page(virt_to_page(pud));
270 } else {
7a1c831e 271 unmap_stage2_pmds(kvm, pud, addr, next);
4f728276
MZ
272 }
273 }
4f853a71 274 } while (pud++, addr = next, addr != end);
4f728276 275
7a1c831e
SP
276 if (stage2_pud_table_empty(start_pud))
277 clear_stage2_pgd_entry(kvm, pgd, start_addr);
4f853a71
CD
278}
279
7a1c831e
SP
280/**
281 * unmap_stage2_range -- Clear stage2 page table entries to unmap a range
282 * @kvm: The VM pointer
283 * @start: The intermediate physical base address of the range to unmap
284 * @size: The size of the area to unmap
285 *
286 * Clear a range of stage-2 mappings, lowering the various ref-counts. Must
287 * be called while holding mmu_lock (unless for freeing the stage2 pgd before
288 * destroying the VM), otherwise another faulting VCPU may come in and mess
289 * with things behind our backs.
290 */
291static void unmap_stage2_range(struct kvm *kvm, phys_addr_t start, u64 size)
4f853a71
CD
292{
293 pgd_t *pgd;
294 phys_addr_t addr = start, end = start + size;
295 phys_addr_t next;
296
8b3405e3 297 assert_spin_locked(&kvm->mmu_lock);
7a1c831e 298 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
4f853a71 299 do {
0c428a6a
SP
300 /*
301 * Make sure the page table is still active, as another thread
302 * could have possibly freed the page table, while we released
303 * the lock.
304 */
305 if (!READ_ONCE(kvm->arch.pgd))
306 break;
7a1c831e
SP
307 next = stage2_pgd_addr_end(addr, end);
308 if (!stage2_pgd_none(*pgd))
309 unmap_stage2_puds(kvm, pgd, addr, next);
8b3405e3
SP
310 /*
311 * If the range is too large, release the kvm->mmu_lock
312 * to prevent starvation and lockup detector warnings.
313 */
314 if (next != end)
315 cond_resched_lock(&kvm->mmu_lock);
4f853a71 316 } while (pgd++, addr = next, addr != end);
000d3996
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317}
318
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319static void stage2_flush_ptes(struct kvm *kvm, pmd_t *pmd,
320 phys_addr_t addr, phys_addr_t end)
321{
322 pte_t *pte;
323
324 pte = pte_offset_kernel(pmd, addr);
325 do {
0de58f85 326 if (!pte_none(*pte) && !kvm_is_device_pfn(pte_pfn(*pte)))
363ef89f 327 kvm_flush_dcache_pte(*pte);
9d218a1f
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328 } while (pte++, addr += PAGE_SIZE, addr != end);
329}
330
331static void stage2_flush_pmds(struct kvm *kvm, pud_t *pud,
332 phys_addr_t addr, phys_addr_t end)
333{
334 pmd_t *pmd;
335 phys_addr_t next;
336
70fd1906 337 pmd = stage2_pmd_offset(pud, addr);
9d218a1f 338 do {
70fd1906 339 next = stage2_pmd_addr_end(addr, end);
9d218a1f 340 if (!pmd_none(*pmd)) {
bbb3b6b3 341 if (pmd_thp_or_huge(*pmd))
363ef89f
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342 kvm_flush_dcache_pmd(*pmd);
343 else
9d218a1f 344 stage2_flush_ptes(kvm, pmd, addr, next);
9d218a1f
MZ
345 }
346 } while (pmd++, addr = next, addr != end);
347}
348
349static void stage2_flush_puds(struct kvm *kvm, pgd_t *pgd,
350 phys_addr_t addr, phys_addr_t end)
351{
352 pud_t *pud;
353 phys_addr_t next;
354
70fd1906 355 pud = stage2_pud_offset(pgd, addr);
9d218a1f 356 do {
70fd1906
SP
357 next = stage2_pud_addr_end(addr, end);
358 if (!stage2_pud_none(*pud)) {
359 if (stage2_pud_huge(*pud))
363ef89f
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360 kvm_flush_dcache_pud(*pud);
361 else
9d218a1f 362 stage2_flush_pmds(kvm, pud, addr, next);
9d218a1f
MZ
363 }
364 } while (pud++, addr = next, addr != end);
365}
366
367static void stage2_flush_memslot(struct kvm *kvm,
368 struct kvm_memory_slot *memslot)
369{
370 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
371 phys_addr_t end = addr + PAGE_SIZE * memslot->npages;
372 phys_addr_t next;
373 pgd_t *pgd;
374
70fd1906 375 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
9d218a1f 376 do {
70fd1906 377 next = stage2_pgd_addr_end(addr, end);
9d218a1f
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378 stage2_flush_puds(kvm, pgd, addr, next);
379 } while (pgd++, addr = next, addr != end);
380}
381
382/**
383 * stage2_flush_vm - Invalidate cache for pages mapped in stage 2
384 * @kvm: The struct kvm pointer
385 *
386 * Go through the stage 2 page tables and invalidate any cache lines
387 * backing memory already mapped to the VM.
388 */
3c1e7165 389static void stage2_flush_vm(struct kvm *kvm)
9d218a1f
MZ
390{
391 struct kvm_memslots *slots;
392 struct kvm_memory_slot *memslot;
393 int idx;
394
395 idx = srcu_read_lock(&kvm->srcu);
396 spin_lock(&kvm->mmu_lock);
397
398 slots = kvm_memslots(kvm);
399 kvm_for_each_memslot(memslot, slots)
400 stage2_flush_memslot(kvm, memslot);
401
402 spin_unlock(&kvm->mmu_lock);
403 srcu_read_unlock(&kvm->srcu, idx);
404}
405
64f32497
SP
406static void clear_hyp_pgd_entry(pgd_t *pgd)
407{
408 pud_t *pud_table __maybe_unused = pud_offset(pgd, 0UL);
409 pgd_clear(pgd);
410 pud_free(NULL, pud_table);
411 put_page(virt_to_page(pgd));
412}
413
414static void clear_hyp_pud_entry(pud_t *pud)
415{
416 pmd_t *pmd_table __maybe_unused = pmd_offset(pud, 0);
417 VM_BUG_ON(pud_huge(*pud));
418 pud_clear(pud);
419 pmd_free(NULL, pmd_table);
420 put_page(virt_to_page(pud));
421}
422
423static void clear_hyp_pmd_entry(pmd_t *pmd)
424{
425 pte_t *pte_table = pte_offset_kernel(pmd, 0);
426 VM_BUG_ON(pmd_thp_or_huge(*pmd));
427 pmd_clear(pmd);
428 pte_free_kernel(NULL, pte_table);
429 put_page(virt_to_page(pmd));
430}
431
432static void unmap_hyp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
433{
434 pte_t *pte, *start_pte;
435
436 start_pte = pte = pte_offset_kernel(pmd, addr);
437 do {
438 if (!pte_none(*pte)) {
439 kvm_set_pte(pte, __pte(0));
440 put_page(virt_to_page(pte));
441 }
442 } while (pte++, addr += PAGE_SIZE, addr != end);
443
444 if (hyp_pte_table_empty(start_pte))
445 clear_hyp_pmd_entry(pmd);
446}
447
448static void unmap_hyp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
449{
450 phys_addr_t next;
451 pmd_t *pmd, *start_pmd;
452
453 start_pmd = pmd = pmd_offset(pud, addr);
454 do {
455 next = pmd_addr_end(addr, end);
456 /* Hyp doesn't use huge pmds */
457 if (!pmd_none(*pmd))
458 unmap_hyp_ptes(pmd, addr, next);
459 } while (pmd++, addr = next, addr != end);
460
461 if (hyp_pmd_table_empty(start_pmd))
462 clear_hyp_pud_entry(pud);
463}
464
465static void unmap_hyp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
466{
467 phys_addr_t next;
468 pud_t *pud, *start_pud;
469
470 start_pud = pud = pud_offset(pgd, addr);
471 do {
472 next = pud_addr_end(addr, end);
473 /* Hyp doesn't use huge puds */
474 if (!pud_none(*pud))
475 unmap_hyp_pmds(pud, addr, next);
476 } while (pud++, addr = next, addr != end);
477
478 if (hyp_pud_table_empty(start_pud))
479 clear_hyp_pgd_entry(pgd);
480}
481
482static void unmap_hyp_range(pgd_t *pgdp, phys_addr_t start, u64 size)
483{
484 pgd_t *pgd;
485 phys_addr_t addr = start, end = start + size;
486 phys_addr_t next;
487
488 /*
489 * We don't unmap anything from HYP, except at the hyp tear down.
490 * Hence, we don't have to invalidate the TLBs here.
491 */
492 pgd = pgdp + pgd_index(addr);
493 do {
494 next = pgd_addr_end(addr, end);
495 if (!pgd_none(*pgd))
496 unmap_hyp_puds(pgd, addr, next);
497 } while (pgd++, addr = next, addr != end);
498}
499
342cd0ab 500/**
4f728276 501 * free_hyp_pgds - free Hyp-mode page tables
342cd0ab 502 *
5a677ce0
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503 * Assumes hyp_pgd is a page table used strictly in Hyp-mode and
504 * therefore contains either mappings in the kernel memory area (above
505 * PAGE_OFFSET), or device mappings in the vmalloc range (from
506 * VMALLOC_START to VMALLOC_END).
507 *
508 * boot_hyp_pgd should only map two pages for the init code.
342cd0ab 509 */
4f728276 510void free_hyp_pgds(void)
342cd0ab 511{
d157f4a5 512 mutex_lock(&kvm_hyp_pgd_mutex);
5a677ce0 513
26781f9c
MZ
514 if (boot_hyp_pgd) {
515 unmap_hyp_range(boot_hyp_pgd, hyp_idmap_start, PAGE_SIZE);
516 free_pages((unsigned long)boot_hyp_pgd, hyp_pgd_order);
517 boot_hyp_pgd = NULL;
518 }
519
4f728276 520 if (hyp_pgd) {
26781f9c 521 unmap_hyp_range(hyp_pgd, hyp_idmap_start, PAGE_SIZE);
7839c672
MZ
522 unmap_hyp_range(hyp_pgd, kern_hyp_va(PAGE_OFFSET),
523 (uintptr_t)high_memory - PAGE_OFFSET);
524 unmap_hyp_range(hyp_pgd, kern_hyp_va(VMALLOC_START),
525 VMALLOC_END - VMALLOC_START);
d4cb9df5 526
38f791a4 527 free_pages((unsigned long)hyp_pgd, hyp_pgd_order);
d157f4a5 528 hyp_pgd = NULL;
4f728276 529 }
e4c5a685
AB
530 if (merged_hyp_pgd) {
531 clear_page(merged_hyp_pgd);
532 free_page((unsigned long)merged_hyp_pgd);
533 merged_hyp_pgd = NULL;
534 }
4f728276 535
342cd0ab
CD
536 mutex_unlock(&kvm_hyp_pgd_mutex);
537}
538
539static void create_hyp_pte_mappings(pmd_t *pmd, unsigned long start,
6060df84
MZ
540 unsigned long end, unsigned long pfn,
541 pgprot_t prot)
342cd0ab
CD
542{
543 pte_t *pte;
544 unsigned long addr;
342cd0ab 545
3562c76d
MZ
546 addr = start;
547 do {
6060df84
MZ
548 pte = pte_offset_kernel(pmd, addr);
549 kvm_set_pte(pte, pfn_pte(pfn, prot));
4f728276 550 get_page(virt_to_page(pte));
5a677ce0 551 kvm_flush_dcache_to_poc(pte, sizeof(*pte));
6060df84 552 pfn++;
3562c76d 553 } while (addr += PAGE_SIZE, addr != end);
342cd0ab
CD
554}
555
556static int create_hyp_pmd_mappings(pud_t *pud, unsigned long start,
6060df84
MZ
557 unsigned long end, unsigned long pfn,
558 pgprot_t prot)
342cd0ab
CD
559{
560 pmd_t *pmd;
561 pte_t *pte;
562 unsigned long addr, next;
563
3562c76d
MZ
564 addr = start;
565 do {
6060df84 566 pmd = pmd_offset(pud, addr);
342cd0ab
CD
567
568 BUG_ON(pmd_sect(*pmd));
569
570 if (pmd_none(*pmd)) {
6060df84 571 pte = pte_alloc_one_kernel(NULL, addr);
342cd0ab
CD
572 if (!pte) {
573 kvm_err("Cannot allocate Hyp pte\n");
574 return -ENOMEM;
575 }
576 pmd_populate_kernel(NULL, pmd, pte);
4f728276 577 get_page(virt_to_page(pmd));
5a677ce0 578 kvm_flush_dcache_to_poc(pmd, sizeof(*pmd));
342cd0ab
CD
579 }
580
581 next = pmd_addr_end(addr, end);
582
6060df84
MZ
583 create_hyp_pte_mappings(pmd, addr, next, pfn, prot);
584 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 585 } while (addr = next, addr != end);
342cd0ab
CD
586
587 return 0;
588}
589
38f791a4
CD
590static int create_hyp_pud_mappings(pgd_t *pgd, unsigned long start,
591 unsigned long end, unsigned long pfn,
592 pgprot_t prot)
593{
594 pud_t *pud;
595 pmd_t *pmd;
596 unsigned long addr, next;
597 int ret;
598
599 addr = start;
600 do {
601 pud = pud_offset(pgd, addr);
602
603 if (pud_none_or_clear_bad(pud)) {
604 pmd = pmd_alloc_one(NULL, addr);
605 if (!pmd) {
606 kvm_err("Cannot allocate Hyp pmd\n");
607 return -ENOMEM;
608 }
609 pud_populate(NULL, pud, pmd);
610 get_page(virt_to_page(pud));
611 kvm_flush_dcache_to_poc(pud, sizeof(*pud));
612 }
613
614 next = pud_addr_end(addr, end);
615 ret = create_hyp_pmd_mappings(pud, addr, next, pfn, prot);
616 if (ret)
617 return ret;
618 pfn += (next - addr) >> PAGE_SHIFT;
619 } while (addr = next, addr != end);
620
621 return 0;
622}
623
6060df84
MZ
624static int __create_hyp_mappings(pgd_t *pgdp,
625 unsigned long start, unsigned long end,
626 unsigned long pfn, pgprot_t prot)
342cd0ab 627{
342cd0ab
CD
628 pgd_t *pgd;
629 pud_t *pud;
342cd0ab
CD
630 unsigned long addr, next;
631 int err = 0;
632
342cd0ab 633 mutex_lock(&kvm_hyp_pgd_mutex);
3562c76d
MZ
634 addr = start & PAGE_MASK;
635 end = PAGE_ALIGN(end);
636 do {
6060df84 637 pgd = pgdp + pgd_index(addr);
342cd0ab 638
38f791a4
CD
639 if (pgd_none(*pgd)) {
640 pud = pud_alloc_one(NULL, addr);
641 if (!pud) {
642 kvm_err("Cannot allocate Hyp pud\n");
342cd0ab
CD
643 err = -ENOMEM;
644 goto out;
645 }
38f791a4
CD
646 pgd_populate(NULL, pgd, pud);
647 get_page(virt_to_page(pgd));
648 kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
342cd0ab
CD
649 }
650
651 next = pgd_addr_end(addr, end);
38f791a4 652 err = create_hyp_pud_mappings(pgd, addr, next, pfn, prot);
342cd0ab
CD
653 if (err)
654 goto out;
6060df84 655 pfn += (next - addr) >> PAGE_SHIFT;
3562c76d 656 } while (addr = next, addr != end);
342cd0ab
CD
657out:
658 mutex_unlock(&kvm_hyp_pgd_mutex);
659 return err;
660}
661
40c2729b
CD
662static phys_addr_t kvm_kaddr_to_phys(void *kaddr)
663{
664 if (!is_vmalloc_addr(kaddr)) {
665 BUG_ON(!virt_addr_valid(kaddr));
666 return __pa(kaddr);
667 } else {
668 return page_to_phys(vmalloc_to_page(kaddr)) +
669 offset_in_page(kaddr);
670 }
671}
672
342cd0ab 673/**
06e8c3b0 674 * create_hyp_mappings - duplicate a kernel virtual address range in Hyp mode
342cd0ab
CD
675 * @from: The virtual kernel start address of the range
676 * @to: The virtual kernel end address of the range (exclusive)
c8dddecd 677 * @prot: The protection to be applied to this range
342cd0ab 678 *
06e8c3b0
MZ
679 * The same virtual address as the kernel virtual address is also used
680 * in Hyp-mode mapping (modulo HYP_PAGE_OFFSET) to the same underlying
681 * physical pages.
342cd0ab 682 */
c8dddecd 683int create_hyp_mappings(void *from, void *to, pgprot_t prot)
342cd0ab 684{
40c2729b
CD
685 phys_addr_t phys_addr;
686 unsigned long virt_addr;
6c41a413
MZ
687 unsigned long start = kern_hyp_va((unsigned long)from);
688 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 689
1e947bad
MZ
690 if (is_kernel_in_hyp_mode())
691 return 0;
692
40c2729b
CD
693 start = start & PAGE_MASK;
694 end = PAGE_ALIGN(end);
6060df84 695
40c2729b
CD
696 for (virt_addr = start; virt_addr < end; virt_addr += PAGE_SIZE) {
697 int err;
6060df84 698
40c2729b
CD
699 phys_addr = kvm_kaddr_to_phys(from + virt_addr - start);
700 err = __create_hyp_mappings(hyp_pgd, virt_addr,
701 virt_addr + PAGE_SIZE,
702 __phys_to_pfn(phys_addr),
c8dddecd 703 prot);
40c2729b
CD
704 if (err)
705 return err;
706 }
707
708 return 0;
342cd0ab
CD
709}
710
711/**
06e8c3b0
MZ
712 * create_hyp_io_mappings - duplicate a kernel IO mapping into Hyp mode
713 * @from: The kernel start VA of the range
714 * @to: The kernel end VA of the range (exclusive)
6060df84 715 * @phys_addr: The physical start address which gets mapped
06e8c3b0
MZ
716 *
717 * The resulting HYP VA is the same as the kernel VA, modulo
718 * HYP_PAGE_OFFSET.
342cd0ab 719 */
6060df84 720int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
342cd0ab 721{
6c41a413
MZ
722 unsigned long start = kern_hyp_va((unsigned long)from);
723 unsigned long end = kern_hyp_va((unsigned long)to);
6060df84 724
1e947bad
MZ
725 if (is_kernel_in_hyp_mode())
726 return 0;
727
6060df84
MZ
728 /* Check for a valid kernel IO mapping */
729 if (!is_vmalloc_addr(from) || !is_vmalloc_addr(to - 1))
730 return -EINVAL;
731
732 return __create_hyp_mappings(hyp_pgd, start, end,
733 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
342cd0ab
CD
734}
735
d5d8184d
CD
736/**
737 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
738 * @kvm: The KVM struct pointer for the VM.
739 *
9d4dc688
VM
740 * Allocates only the stage-2 HW PGD level table(s) (can support either full
741 * 40-bit input addresses or limited to 32-bit input addresses). Clears the
742 * allocated pages.
d5d8184d
CD
743 *
744 * Note we don't need locking here as this is only called when the VM is
745 * created, which can only be done once.
746 */
747int kvm_alloc_stage2_pgd(struct kvm *kvm)
748{
749 pgd_t *pgd;
750
751 if (kvm->arch.pgd != NULL) {
752 kvm_err("kvm_arch already initialized?\n");
753 return -EINVAL;
754 }
755
9163ee23
SP
756 /* Allocate the HW PGD, making sure that each page gets its own refcount */
757 pgd = alloc_pages_exact(S2_PGD_SIZE, GFP_KERNEL | __GFP_ZERO);
758 if (!pgd)
a987370f
MZ
759 return -ENOMEM;
760
d5d8184d 761 kvm->arch.pgd = pgd;
d5d8184d
CD
762 return 0;
763}
764
957db105
CD
765static void stage2_unmap_memslot(struct kvm *kvm,
766 struct kvm_memory_slot *memslot)
767{
768 hva_t hva = memslot->userspace_addr;
769 phys_addr_t addr = memslot->base_gfn << PAGE_SHIFT;
770 phys_addr_t size = PAGE_SIZE * memslot->npages;
771 hva_t reg_end = hva + size;
772
773 /*
774 * A memory region could potentially cover multiple VMAs, and any holes
775 * between them, so iterate over all of them to find out if we should
776 * unmap any of them.
777 *
778 * +--------------------------------------------+
779 * +---------------+----------------+ +----------------+
780 * | : VMA 1 | VMA 2 | | VMA 3 : |
781 * +---------------+----------------+ +----------------+
782 * | memory region |
783 * +--------------------------------------------+
784 */
785 do {
786 struct vm_area_struct *vma = find_vma(current->mm, hva);
787 hva_t vm_start, vm_end;
788
789 if (!vma || vma->vm_start >= reg_end)
790 break;
791
792 /*
793 * Take the intersection of this VMA with the memory region
794 */
795 vm_start = max(hva, vma->vm_start);
796 vm_end = min(reg_end, vma->vm_end);
797
798 if (!(vma->vm_flags & VM_PFNMAP)) {
799 gpa_t gpa = addr + (vm_start - memslot->userspace_addr);
800 unmap_stage2_range(kvm, gpa, vm_end - vm_start);
801 }
802 hva = vm_end;
803 } while (hva < reg_end);
804}
805
806/**
807 * stage2_unmap_vm - Unmap Stage-2 RAM mappings
808 * @kvm: The struct kvm pointer
809 *
810 * Go through the memregions and unmap any reguler RAM
811 * backing memory already mapped to the VM.
812 */
813void stage2_unmap_vm(struct kvm *kvm)
814{
815 struct kvm_memslots *slots;
816 struct kvm_memory_slot *memslot;
817 int idx;
818
819 idx = srcu_read_lock(&kvm->srcu);
90f6e150 820 down_read(&current->mm->mmap_sem);
957db105
CD
821 spin_lock(&kvm->mmu_lock);
822
823 slots = kvm_memslots(kvm);
824 kvm_for_each_memslot(memslot, slots)
825 stage2_unmap_memslot(kvm, memslot);
826
827 spin_unlock(&kvm->mmu_lock);
90f6e150 828 up_read(&current->mm->mmap_sem);
957db105
CD
829 srcu_read_unlock(&kvm->srcu, idx);
830}
831
d5d8184d
CD
832/**
833 * kvm_free_stage2_pgd - free all stage-2 tables
834 * @kvm: The KVM struct pointer for the VM.
835 *
836 * Walks the level-1 page table pointed to by kvm->arch.pgd and frees all
837 * underlying level-2 and level-3 tables before freeing the actual level-1 table
838 * and setting the struct pointer to NULL.
d5d8184d
CD
839 */
840void kvm_free_stage2_pgd(struct kvm *kvm)
841{
6c0d706b 842 void *pgd = NULL;
d5d8184d 843
8b3405e3 844 spin_lock(&kvm->mmu_lock);
6c0d706b
SP
845 if (kvm->arch.pgd) {
846 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
2952a607 847 pgd = READ_ONCE(kvm->arch.pgd);
6c0d706b
SP
848 kvm->arch.pgd = NULL;
849 }
8b3405e3
SP
850 spin_unlock(&kvm->mmu_lock);
851
9163ee23 852 /* Free the HW pgd, one page at a time */
6c0d706b
SP
853 if (pgd)
854 free_pages_exact(pgd, S2_PGD_SIZE);
d5d8184d
CD
855}
856
38f791a4 857static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
ad361f09 858 phys_addr_t addr)
d5d8184d
CD
859{
860 pgd_t *pgd;
861 pud_t *pud;
d5d8184d 862
70fd1906
SP
863 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
864 if (WARN_ON(stage2_pgd_none(*pgd))) {
38f791a4
CD
865 if (!cache)
866 return NULL;
867 pud = mmu_memory_cache_alloc(cache);
70fd1906 868 stage2_pgd_populate(pgd, pud);
38f791a4
CD
869 get_page(virt_to_page(pgd));
870 }
871
70fd1906 872 return stage2_pud_offset(pgd, addr);
38f791a4
CD
873}
874
875static pmd_t *stage2_get_pmd(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
876 phys_addr_t addr)
877{
878 pud_t *pud;
879 pmd_t *pmd;
880
881 pud = stage2_get_pud(kvm, cache, addr);
d6dbdd3c
MZ
882 if (!pud)
883 return NULL;
884
70fd1906 885 if (stage2_pud_none(*pud)) {
d5d8184d 886 if (!cache)
ad361f09 887 return NULL;
d5d8184d 888 pmd = mmu_memory_cache_alloc(cache);
70fd1906 889 stage2_pud_populate(pud, pmd);
d5d8184d 890 get_page(virt_to_page(pud));
c62ee2b2
MZ
891 }
892
70fd1906 893 return stage2_pmd_offset(pud, addr);
ad361f09
CD
894}
895
896static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
897 *cache, phys_addr_t addr, const pmd_t *new_pmd)
898{
899 pmd_t *pmd, old_pmd;
900
901 pmd = stage2_get_pmd(kvm, cache, addr);
902 VM_BUG_ON(!pmd);
d5d8184d 903
ad361f09
CD
904 /*
905 * Mapping in huge pages should only happen through a fault. If a
906 * page is merged into a transparent huge page, the individual
907 * subpages of that huge page should be unmapped through MMU
908 * notifiers before we get here.
909 *
910 * Merging of CompoundPages is not supported; they should become
911 * splitting first, unmapped, merged, and mapped back in on-demand.
912 */
913 VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
914
915 old_pmd = *pmd;
d4b9e079
MZ
916 if (pmd_present(old_pmd)) {
917 pmd_clear(pmd);
ad361f09 918 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 919 } else {
ad361f09 920 get_page(virt_to_page(pmd));
d4b9e079
MZ
921 }
922
923 kvm_set_pmd(pmd, *new_pmd);
ad361f09
CD
924 return 0;
925}
926
927static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
15a49a44
MS
928 phys_addr_t addr, const pte_t *new_pte,
929 unsigned long flags)
ad361f09
CD
930{
931 pmd_t *pmd;
932 pte_t *pte, old_pte;
15a49a44
MS
933 bool iomap = flags & KVM_S2PTE_FLAG_IS_IOMAP;
934 bool logging_active = flags & KVM_S2_FLAG_LOGGING_ACTIVE;
935
936 VM_BUG_ON(logging_active && !cache);
ad361f09 937
38f791a4 938 /* Create stage-2 page table mapping - Levels 0 and 1 */
ad361f09
CD
939 pmd = stage2_get_pmd(kvm, cache, addr);
940 if (!pmd) {
941 /*
942 * Ignore calls from kvm_set_spte_hva for unallocated
943 * address ranges.
944 */
945 return 0;
946 }
947
15a49a44
MS
948 /*
949 * While dirty page logging - dissolve huge PMD, then continue on to
950 * allocate page.
951 */
952 if (logging_active)
953 stage2_dissolve_pmd(kvm, addr, pmd);
954
ad361f09 955 /* Create stage-2 page mappings - Level 2 */
d5d8184d
CD
956 if (pmd_none(*pmd)) {
957 if (!cache)
958 return 0; /* ignore calls from kvm_set_spte_hva */
959 pte = mmu_memory_cache_alloc(cache);
d5d8184d 960 pmd_populate_kernel(NULL, pmd, pte);
d5d8184d 961 get_page(virt_to_page(pmd));
c62ee2b2
MZ
962 }
963
964 pte = pte_offset_kernel(pmd, addr);
d5d8184d
CD
965
966 if (iomap && pte_present(*pte))
967 return -EFAULT;
968
969 /* Create 2nd stage page table mapping - Level 3 */
970 old_pte = *pte;
d4b9e079
MZ
971 if (pte_present(old_pte)) {
972 kvm_set_pte(pte, __pte(0));
48762767 973 kvm_tlb_flush_vmid_ipa(kvm, addr);
d4b9e079 974 } else {
d5d8184d 975 get_page(virt_to_page(pte));
d4b9e079 976 }
d5d8184d 977
d4b9e079 978 kvm_set_pte(pte, *new_pte);
d5d8184d
CD
979 return 0;
980}
d5d8184d 981
06485053
CM
982#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
983static int stage2_ptep_test_and_clear_young(pte_t *pte)
984{
985 if (pte_young(*pte)) {
986 *pte = pte_mkold(*pte);
987 return 1;
988 }
d5d8184d
CD
989 return 0;
990}
06485053
CM
991#else
992static int stage2_ptep_test_and_clear_young(pte_t *pte)
993{
994 return __ptep_test_and_clear_young(pte);
995}
996#endif
997
998static int stage2_pmdp_test_and_clear_young(pmd_t *pmd)
999{
1000 return stage2_ptep_test_and_clear_young((pte_t *)pmd);
1001}
d5d8184d
CD
1002
1003/**
1004 * kvm_phys_addr_ioremap - map a device range to guest IPA
1005 *
1006 * @kvm: The KVM pointer
1007 * @guest_ipa: The IPA at which to insert the mapping
1008 * @pa: The physical address of the device
1009 * @size: The size of the mapping
1010 */
1011int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
c40f2f8f 1012 phys_addr_t pa, unsigned long size, bool writable)
d5d8184d
CD
1013{
1014 phys_addr_t addr, end;
1015 int ret = 0;
1016 unsigned long pfn;
1017 struct kvm_mmu_memory_cache cache = { 0, };
1018
1019 end = (guest_ipa + size + PAGE_SIZE - 1) & PAGE_MASK;
1020 pfn = __phys_to_pfn(pa);
1021
1022 for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
c62ee2b2 1023 pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
d5d8184d 1024
c40f2f8f 1025 if (writable)
06485053 1026 pte = kvm_s2pte_mkwrite(pte);
c40f2f8f 1027
38f791a4
CD
1028 ret = mmu_topup_memory_cache(&cache, KVM_MMU_CACHE_MIN_PAGES,
1029 KVM_NR_MEM_OBJS);
d5d8184d
CD
1030 if (ret)
1031 goto out;
1032 spin_lock(&kvm->mmu_lock);
15a49a44
MS
1033 ret = stage2_set_pte(kvm, &cache, addr, &pte,
1034 KVM_S2PTE_FLAG_IS_IOMAP);
d5d8184d
CD
1035 spin_unlock(&kvm->mmu_lock);
1036 if (ret)
1037 goto out;
1038
1039 pfn++;
1040 }
1041
1042out:
1043 mmu_free_memory_cache(&cache);
1044 return ret;
1045}
1046
ba049e93 1047static bool transparent_hugepage_adjust(kvm_pfn_t *pfnp, phys_addr_t *ipap)
9b5fdb97 1048{
ba049e93 1049 kvm_pfn_t pfn = *pfnp;
9b5fdb97
CD
1050 gfn_t gfn = *ipap >> PAGE_SHIFT;
1051
127393fb 1052 if (PageTransCompoundMap(pfn_to_page(pfn))) {
9b5fdb97
CD
1053 unsigned long mask;
1054 /*
1055 * The address we faulted on is backed by a transparent huge
1056 * page. However, because we map the compound huge page and
1057 * not the individual tail page, we need to transfer the
1058 * refcount to the head page. We have to be careful that the
1059 * THP doesn't start to split while we are adjusting the
1060 * refcounts.
1061 *
1062 * We are sure this doesn't happen, because mmu_notifier_retry
1063 * was successful and we are holding the mmu_lock, so if this
1064 * THP is trying to split, it will be blocked in the mmu
1065 * notifier before touching any of the pages, specifically
1066 * before being able to call __split_huge_page_refcount().
1067 *
1068 * We can therefore safely transfer the refcount from PG_tail
1069 * to PG_head and switch the pfn from a tail page to the head
1070 * page accordingly.
1071 */
1072 mask = PTRS_PER_PMD - 1;
1073 VM_BUG_ON((gfn & mask) != (pfn & mask));
1074 if (pfn & mask) {
1075 *ipap &= PMD_MASK;
1076 kvm_release_pfn_clean(pfn);
1077 pfn &= ~mask;
1078 kvm_get_pfn(pfn);
1079 *pfnp = pfn;
1080 }
1081
1082 return true;
1083 }
1084
1085 return false;
1086}
1087
a7d079ce
AB
1088static bool kvm_is_write_fault(struct kvm_vcpu *vcpu)
1089{
1090 if (kvm_vcpu_trap_is_iabt(vcpu))
1091 return false;
1092
1093 return kvm_vcpu_dabt_iswrite(vcpu);
1094}
1095
c6473555
MS
1096/**
1097 * stage2_wp_ptes - write protect PMD range
1098 * @pmd: pointer to pmd entry
1099 * @addr: range start address
1100 * @end: range end address
1101 */
1102static void stage2_wp_ptes(pmd_t *pmd, phys_addr_t addr, phys_addr_t end)
1103{
1104 pte_t *pte;
1105
1106 pte = pte_offset_kernel(pmd, addr);
1107 do {
1108 if (!pte_none(*pte)) {
1109 if (!kvm_s2pte_readonly(pte))
1110 kvm_set_s2pte_readonly(pte);
1111 }
1112 } while (pte++, addr += PAGE_SIZE, addr != end);
1113}
1114
1115/**
1116 * stage2_wp_pmds - write protect PUD range
1117 * @pud: pointer to pud entry
1118 * @addr: range start address
1119 * @end: range end address
1120 */
1121static void stage2_wp_pmds(pud_t *pud, phys_addr_t addr, phys_addr_t end)
1122{
1123 pmd_t *pmd;
1124 phys_addr_t next;
1125
70fd1906 1126 pmd = stage2_pmd_offset(pud, addr);
c6473555
MS
1127
1128 do {
70fd1906 1129 next = stage2_pmd_addr_end(addr, end);
c6473555 1130 if (!pmd_none(*pmd)) {
bbb3b6b3 1131 if (pmd_thp_or_huge(*pmd)) {
c6473555
MS
1132 if (!kvm_s2pmd_readonly(pmd))
1133 kvm_set_s2pmd_readonly(pmd);
1134 } else {
1135 stage2_wp_ptes(pmd, addr, next);
1136 }
1137 }
1138 } while (pmd++, addr = next, addr != end);
1139}
1140
1141/**
1142 * stage2_wp_puds - write protect PGD range
1143 * @pgd: pointer to pgd entry
1144 * @addr: range start address
1145 * @end: range end address
1146 *
1147 * Process PUD entries, for a huge PUD we cause a panic.
1148 */
1149static void stage2_wp_puds(pgd_t *pgd, phys_addr_t addr, phys_addr_t end)
1150{
1151 pud_t *pud;
1152 phys_addr_t next;
1153
70fd1906 1154 pud = stage2_pud_offset(pgd, addr);
c6473555 1155 do {
70fd1906
SP
1156 next = stage2_pud_addr_end(addr, end);
1157 if (!stage2_pud_none(*pud)) {
c6473555 1158 /* TODO:PUD not supported, revisit later if supported */
70fd1906 1159 BUG_ON(stage2_pud_huge(*pud));
c6473555
MS
1160 stage2_wp_pmds(pud, addr, next);
1161 }
1162 } while (pud++, addr = next, addr != end);
1163}
1164
1165/**
1166 * stage2_wp_range() - write protect stage2 memory region range
1167 * @kvm: The KVM pointer
1168 * @addr: Start address of range
1169 * @end: End address of range
1170 */
1171static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1172{
1173 pgd_t *pgd;
1174 phys_addr_t next;
1175
70fd1906 1176 pgd = kvm->arch.pgd + stage2_pgd_index(addr);
c6473555
MS
1177 do {
1178 /*
1179 * Release kvm_mmu_lock periodically if the memory region is
1180 * large. Otherwise, we may see kernel panics with
227ea818
CD
1181 * CONFIG_DETECT_HUNG_TASK, CONFIG_LOCKUP_DETECTOR,
1182 * CONFIG_LOCKDEP. Additionally, holding the lock too long
0c428a6a
SP
1183 * will also starve other vCPUs. We have to also make sure
1184 * that the page tables are not freed while we released
1185 * the lock.
c6473555 1186 */
0c428a6a
SP
1187 cond_resched_lock(&kvm->mmu_lock);
1188 if (!READ_ONCE(kvm->arch.pgd))
1189 break;
70fd1906
SP
1190 next = stage2_pgd_addr_end(addr, end);
1191 if (stage2_pgd_present(*pgd))
c6473555
MS
1192 stage2_wp_puds(pgd, addr, next);
1193 } while (pgd++, addr = next, addr != end);
1194}
1195
1196/**
1197 * kvm_mmu_wp_memory_region() - write protect stage 2 entries for memory slot
1198 * @kvm: The KVM pointer
1199 * @slot: The memory slot to write protect
1200 *
1201 * Called to start logging dirty pages after memory region
1202 * KVM_MEM_LOG_DIRTY_PAGES operation is called. After this function returns
1203 * all present PMD and PTEs are write protected in the memory region.
1204 * Afterwards read of dirty page log can be called.
1205 *
1206 * Acquires kvm_mmu_lock. Called with kvm->slots_lock mutex acquired,
1207 * serializing operations for VM memory regions.
1208 */
1209void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot)
1210{
9f6b8029
PB
1211 struct kvm_memslots *slots = kvm_memslots(kvm);
1212 struct kvm_memory_slot *memslot = id_to_memslot(slots, slot);
c6473555
MS
1213 phys_addr_t start = memslot->base_gfn << PAGE_SHIFT;
1214 phys_addr_t end = (memslot->base_gfn + memslot->npages) << PAGE_SHIFT;
1215
1216 spin_lock(&kvm->mmu_lock);
1217 stage2_wp_range(kvm, start, end);
1218 spin_unlock(&kvm->mmu_lock);
1219 kvm_flush_remote_tlbs(kvm);
1220}
53c810c3
MS
1221
1222/**
3b0f1d01 1223 * kvm_mmu_write_protect_pt_masked() - write protect dirty pages
53c810c3
MS
1224 * @kvm: The KVM pointer
1225 * @slot: The memory slot associated with mask
1226 * @gfn_offset: The gfn offset in memory slot
1227 * @mask: The mask of dirty pages at offset 'gfn_offset' in this memory
1228 * slot to be write protected
1229 *
1230 * Walks bits set in mask write protects the associated pte's. Caller must
1231 * acquire kvm_mmu_lock.
1232 */
3b0f1d01 1233static void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
53c810c3
MS
1234 struct kvm_memory_slot *slot,
1235 gfn_t gfn_offset, unsigned long mask)
1236{
1237 phys_addr_t base_gfn = slot->base_gfn + gfn_offset;
1238 phys_addr_t start = (base_gfn + __ffs(mask)) << PAGE_SHIFT;
1239 phys_addr_t end = (base_gfn + __fls(mask) + 1) << PAGE_SHIFT;
1240
1241 stage2_wp_range(kvm, start, end);
1242}
c6473555 1243
3b0f1d01
KH
1244/*
1245 * kvm_arch_mmu_enable_log_dirty_pt_masked - enable dirty logging for selected
1246 * dirty pages.
1247 *
1248 * It calls kvm_mmu_write_protect_pt_masked to write protect selected pages to
1249 * enable dirty logging for them.
1250 */
1251void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm,
1252 struct kvm_memory_slot *slot,
1253 gfn_t gfn_offset, unsigned long mask)
1254{
1255 kvm_mmu_write_protect_pt_masked(kvm, slot, gfn_offset, mask);
1256}
1257
ba049e93 1258static void coherent_cache_guest_page(struct kvm_vcpu *vcpu, kvm_pfn_t pfn,
13b7756c 1259 unsigned long size)
0d3e4d4f 1260{
13b7756c 1261 __coherent_cache_guest_page(vcpu, pfn, size);
0d3e4d4f
MZ
1262}
1263
196f878a
JM
1264static void kvm_send_hwpoison_signal(unsigned long address,
1265 struct vm_area_struct *vma)
1266{
1267 siginfo_t info;
1268
1269 info.si_signo = SIGBUS;
1270 info.si_errno = 0;
1271 info.si_code = BUS_MCEERR_AR;
1272 info.si_addr = (void __user *)address;
1273
1274 if (is_vm_hugetlb_page(vma))
1275 info.si_addr_lsb = huge_page_shift(hstate_vma(vma));
1276 else
1277 info.si_addr_lsb = PAGE_SHIFT;
1278
1279 send_sig_info(SIGBUS, &info, current);
1280}
1281
94f8e641 1282static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
98047888 1283 struct kvm_memory_slot *memslot, unsigned long hva,
94f8e641
CD
1284 unsigned long fault_status)
1285{
94f8e641 1286 int ret;
9b5fdb97 1287 bool write_fault, writable, hugetlb = false, force_pte = false;
94f8e641 1288 unsigned long mmu_seq;
ad361f09 1289 gfn_t gfn = fault_ipa >> PAGE_SHIFT;
ad361f09 1290 struct kvm *kvm = vcpu->kvm;
94f8e641 1291 struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
ad361f09 1292 struct vm_area_struct *vma;
ba049e93 1293 kvm_pfn_t pfn;
b8865767 1294 pgprot_t mem_type = PAGE_S2;
15a49a44
MS
1295 bool logging_active = memslot_is_logging(memslot);
1296 unsigned long flags = 0;
94f8e641 1297
a7d079ce 1298 write_fault = kvm_is_write_fault(vcpu);
94f8e641
CD
1299 if (fault_status == FSC_PERM && !write_fault) {
1300 kvm_err("Unexpected L2 read permission error\n");
1301 return -EFAULT;
1302 }
1303
ad361f09
CD
1304 /* Let's check if we will get back a huge page backed by hugetlbfs */
1305 down_read(&current->mm->mmap_sem);
1306 vma = find_vma_intersection(current->mm, hva, hva + 1);
37b54408
AB
1307 if (unlikely(!vma)) {
1308 kvm_err("Failed to find VMA for hva 0x%lx\n", hva);
1309 up_read(&current->mm->mmap_sem);
1310 return -EFAULT;
1311 }
1312
15a49a44 1313 if (is_vm_hugetlb_page(vma) && !logging_active) {
ad361f09
CD
1314 hugetlb = true;
1315 gfn = (fault_ipa & PMD_MASK) >> PAGE_SHIFT;
9b5fdb97
CD
1316 } else {
1317 /*
136d737f
MZ
1318 * Pages belonging to memslots that don't have the same
1319 * alignment for userspace and IPA cannot be mapped using
1320 * block descriptors even if the pages belong to a THP for
1321 * the process, because the stage-2 block descriptor will
1322 * cover more than a single THP and we loose atomicity for
1323 * unmapping, updates, and splits of the THP or other pages
1324 * in the stage-2 block range.
9b5fdb97 1325 */
136d737f
MZ
1326 if ((memslot->userspace_addr & ~PMD_MASK) !=
1327 ((memslot->base_gfn << PAGE_SHIFT) & ~PMD_MASK))
9b5fdb97 1328 force_pte = true;
ad361f09
CD
1329 }
1330 up_read(&current->mm->mmap_sem);
1331
94f8e641 1332 /* We need minimum second+third level pages */
38f791a4
CD
1333 ret = mmu_topup_memory_cache(memcache, KVM_MMU_CACHE_MIN_PAGES,
1334 KVM_NR_MEM_OBJS);
94f8e641
CD
1335 if (ret)
1336 return ret;
1337
1338 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1339 /*
1340 * Ensure the read of mmu_notifier_seq happens before we call
1341 * gfn_to_pfn_prot (which calls get_user_pages), so that we don't risk
1342 * the page we just got a reference to gets unmapped before we have a
1343 * chance to grab the mmu_lock, which ensure that if the page gets
1344 * unmapped afterwards, the call to kvm_unmap_hva will take it away
1345 * from us again properly. This smp_rmb() interacts with the smp_wmb()
1346 * in kvm_mmu_notifier_invalidate_<page|range_end>.
1347 */
1348 smp_rmb();
1349
ad361f09 1350 pfn = gfn_to_pfn_prot(kvm, gfn, write_fault, &writable);
196f878a
JM
1351 if (pfn == KVM_PFN_ERR_HWPOISON) {
1352 kvm_send_hwpoison_signal(hva, vma);
1353 return 0;
1354 }
9ac71595 1355 if (is_error_noslot_pfn(pfn))
94f8e641
CD
1356 return -EFAULT;
1357
15a49a44 1358 if (kvm_is_device_pfn(pfn)) {
b8865767 1359 mem_type = PAGE_S2_DEVICE;
15a49a44
MS
1360 flags |= KVM_S2PTE_FLAG_IS_IOMAP;
1361 } else if (logging_active) {
1362 /*
1363 * Faults on pages in a memslot with logging enabled
1364 * should not be mapped with huge pages (it introduces churn
1365 * and performance degradation), so force a pte mapping.
1366 */
1367 force_pte = true;
1368 flags |= KVM_S2_FLAG_LOGGING_ACTIVE;
1369
1370 /*
1371 * Only actually map the page as writable if this was a write
1372 * fault.
1373 */
1374 if (!write_fault)
1375 writable = false;
1376 }
b8865767 1377
ad361f09
CD
1378 spin_lock(&kvm->mmu_lock);
1379 if (mmu_notifier_retry(kvm, mmu_seq))
94f8e641 1380 goto out_unlock;
15a49a44 1381
9b5fdb97
CD
1382 if (!hugetlb && !force_pte)
1383 hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
ad361f09
CD
1384
1385 if (hugetlb) {
b8865767 1386 pmd_t new_pmd = pfn_pmd(pfn, mem_type);
ad361f09
CD
1387 new_pmd = pmd_mkhuge(new_pmd);
1388 if (writable) {
06485053 1389 new_pmd = kvm_s2pmd_mkwrite(new_pmd);
ad361f09
CD
1390 kvm_set_pfn_dirty(pfn);
1391 }
13b7756c 1392 coherent_cache_guest_page(vcpu, pfn, PMD_SIZE);
ad361f09
CD
1393 ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
1394 } else {
b8865767 1395 pte_t new_pte = pfn_pte(pfn, mem_type);
15a49a44 1396
ad361f09 1397 if (writable) {
06485053 1398 new_pte = kvm_s2pte_mkwrite(new_pte);
ad361f09 1399 kvm_set_pfn_dirty(pfn);
15a49a44 1400 mark_page_dirty(kvm, gfn);
ad361f09 1401 }
13b7756c 1402 coherent_cache_guest_page(vcpu, pfn, PAGE_SIZE);
15a49a44 1403 ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, flags);
94f8e641 1404 }
ad361f09 1405
94f8e641 1406out_unlock:
ad361f09 1407 spin_unlock(&kvm->mmu_lock);
35307b9a 1408 kvm_set_pfn_accessed(pfn);
94f8e641 1409 kvm_release_pfn_clean(pfn);
ad361f09 1410 return ret;
94f8e641
CD
1411}
1412
aeda9130
MZ
1413/*
1414 * Resolve the access fault by making the page young again.
1415 * Note that because the faulting entry is guaranteed not to be
1416 * cached in the TLB, we don't need to invalidate anything.
06485053
CM
1417 * Only the HW Access Flag updates are supported for Stage 2 (no DBM),
1418 * so there is no need for atomic (pte|pmd)_mkyoung operations.
aeda9130
MZ
1419 */
1420static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
1421{
1422 pmd_t *pmd;
1423 pte_t *pte;
ba049e93 1424 kvm_pfn_t pfn;
aeda9130
MZ
1425 bool pfn_valid = false;
1426
1427 trace_kvm_access_fault(fault_ipa);
1428
1429 spin_lock(&vcpu->kvm->mmu_lock);
1430
1431 pmd = stage2_get_pmd(vcpu->kvm, NULL, fault_ipa);
1432 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1433 goto out;
1434
bbb3b6b3 1435 if (pmd_thp_or_huge(*pmd)) { /* THP, HugeTLB */
aeda9130
MZ
1436 *pmd = pmd_mkyoung(*pmd);
1437 pfn = pmd_pfn(*pmd);
1438 pfn_valid = true;
1439 goto out;
1440 }
1441
1442 pte = pte_offset_kernel(pmd, fault_ipa);
1443 if (pte_none(*pte)) /* Nothing there either */
1444 goto out;
1445
1446 *pte = pte_mkyoung(*pte); /* Just a page... */
1447 pfn = pte_pfn(*pte);
1448 pfn_valid = true;
1449out:
1450 spin_unlock(&vcpu->kvm->mmu_lock);
1451 if (pfn_valid)
1452 kvm_set_pfn_accessed(pfn);
1453}
1454
94f8e641
CD
1455/**
1456 * kvm_handle_guest_abort - handles all 2nd stage aborts
1457 * @vcpu: the VCPU pointer
1458 * @run: the kvm_run structure
1459 *
1460 * Any abort that gets to the host is almost guaranteed to be caused by a
1461 * missing second stage translation table entry, which can mean that either the
1462 * guest simply needs more memory and we must allocate an appropriate page or it
1463 * can mean that the guest tried to access I/O memory, which is emulated by user
1464 * space. The distinction is based on the IPA causing the fault and whether this
1465 * memory region has been registered as standard RAM by user space.
1466 */
342cd0ab
CD
1467int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
1468{
94f8e641
CD
1469 unsigned long fault_status;
1470 phys_addr_t fault_ipa;
1471 struct kvm_memory_slot *memslot;
98047888
CD
1472 unsigned long hva;
1473 bool is_iabt, write_fault, writable;
94f8e641
CD
1474 gfn_t gfn;
1475 int ret, idx;
1476
621f48e4
TB
1477 fault_status = kvm_vcpu_trap_get_fault_type(vcpu);
1478
1479 fault_ipa = kvm_vcpu_get_fault_ipa(vcpu);
bb428921 1480 is_iabt = kvm_vcpu_trap_is_iabt(vcpu);
621f48e4 1481
bb428921
JM
1482 /* Synchronous External Abort? */
1483 if (kvm_vcpu_dabt_isextabt(vcpu)) {
1484 /*
1485 * For RAS the host kernel may handle this abort.
1486 * There is no need to pass the error into the guest.
1487 */
621f48e4
TB
1488 if (!handle_guest_sea(fault_ipa, kvm_vcpu_get_hsr(vcpu)))
1489 return 1;
621f48e4 1490
bb428921
JM
1491 if (unlikely(!is_iabt)) {
1492 kvm_inject_vabt(vcpu);
1493 return 1;
1494 }
4055710b
MZ
1495 }
1496
7393b599
MZ
1497 trace_kvm_guest_fault(*vcpu_pc(vcpu), kvm_vcpu_get_hsr(vcpu),
1498 kvm_vcpu_get_hfar(vcpu), fault_ipa);
94f8e641
CD
1499
1500 /* Check the stage-2 fault is trans. fault or write fault */
35307b9a
MZ
1501 if (fault_status != FSC_FAULT && fault_status != FSC_PERM &&
1502 fault_status != FSC_ACCESS) {
0496daa5
CD
1503 kvm_err("Unsupported FSC: EC=%#x xFSC=%#lx ESR_EL2=%#lx\n",
1504 kvm_vcpu_trap_get_class(vcpu),
1505 (unsigned long)kvm_vcpu_trap_get_fault(vcpu),
1506 (unsigned long)kvm_vcpu_get_hsr(vcpu));
94f8e641
CD
1507 return -EFAULT;
1508 }
1509
1510 idx = srcu_read_lock(&vcpu->kvm->srcu);
1511
1512 gfn = fault_ipa >> PAGE_SHIFT;
98047888
CD
1513 memslot = gfn_to_memslot(vcpu->kvm, gfn);
1514 hva = gfn_to_hva_memslot_prot(memslot, gfn, &writable);
a7d079ce 1515 write_fault = kvm_is_write_fault(vcpu);
98047888 1516 if (kvm_is_error_hva(hva) || (write_fault && !writable)) {
94f8e641
CD
1517 if (is_iabt) {
1518 /* Prefetch Abort on I/O address */
7393b599 1519 kvm_inject_pabt(vcpu, kvm_vcpu_get_hfar(vcpu));
94f8e641
CD
1520 ret = 1;
1521 goto out_unlock;
1522 }
1523
57c841f1
MZ
1524 /*
1525 * Check for a cache maintenance operation. Since we
1526 * ended-up here, we know it is outside of any memory
1527 * slot. But we can't find out if that is for a device,
1528 * or if the guest is just being stupid. The only thing
1529 * we know for sure is that this range cannot be cached.
1530 *
1531 * So let's assume that the guest is just being
1532 * cautious, and skip the instruction.
1533 */
1534 if (kvm_vcpu_dabt_is_cm(vcpu)) {
1535 kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
1536 ret = 1;
1537 goto out_unlock;
1538 }
1539
cfe3950c
MZ
1540 /*
1541 * The IPA is reported as [MAX:12], so we need to
1542 * complement it with the bottom 12 bits from the
1543 * faulting VA. This is always 12 bits, irrespective
1544 * of the page size.
1545 */
1546 fault_ipa |= kvm_vcpu_get_hfar(vcpu) & ((1 << 12) - 1);
45e96ea6 1547 ret = io_mem_abort(vcpu, run, fault_ipa);
94f8e641
CD
1548 goto out_unlock;
1549 }
1550
c3058d5d
CD
1551 /* Userspace should not be able to register out-of-bounds IPAs */
1552 VM_BUG_ON(fault_ipa >= KVM_PHYS_SIZE);
1553
aeda9130
MZ
1554 if (fault_status == FSC_ACCESS) {
1555 handle_access_fault(vcpu, fault_ipa);
1556 ret = 1;
1557 goto out_unlock;
1558 }
1559
98047888 1560 ret = user_mem_abort(vcpu, fault_ipa, memslot, hva, fault_status);
94f8e641
CD
1561 if (ret == 0)
1562 ret = 1;
1563out_unlock:
1564 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1565 return ret;
342cd0ab
CD
1566}
1567
1d2ebacc
MZ
1568static int handle_hva_to_gpa(struct kvm *kvm,
1569 unsigned long start,
1570 unsigned long end,
1571 int (*handler)(struct kvm *kvm,
056aad67
SP
1572 gpa_t gpa, u64 size,
1573 void *data),
1d2ebacc 1574 void *data)
d5d8184d
CD
1575{
1576 struct kvm_memslots *slots;
1577 struct kvm_memory_slot *memslot;
1d2ebacc 1578 int ret = 0;
d5d8184d
CD
1579
1580 slots = kvm_memslots(kvm);
1581
1582 /* we only care about the pages that the guest sees */
1583 kvm_for_each_memslot(memslot, slots) {
1584 unsigned long hva_start, hva_end;
056aad67 1585 gfn_t gpa;
d5d8184d
CD
1586
1587 hva_start = max(start, memslot->userspace_addr);
1588 hva_end = min(end, memslot->userspace_addr +
1589 (memslot->npages << PAGE_SHIFT));
1590 if (hva_start >= hva_end)
1591 continue;
1592
056aad67
SP
1593 gpa = hva_to_gfn_memslot(hva_start, memslot) << PAGE_SHIFT;
1594 ret |= handler(kvm, gpa, (u64)(hva_end - hva_start), data);
d5d8184d 1595 }
1d2ebacc
MZ
1596
1597 return ret;
d5d8184d
CD
1598}
1599
056aad67 1600static int kvm_unmap_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d 1601{
056aad67 1602 unmap_stage2_range(kvm, gpa, size);
1d2ebacc 1603 return 0;
d5d8184d
CD
1604}
1605
1606int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
1607{
1608 unsigned long end = hva + PAGE_SIZE;
1609
1610 if (!kvm->arch.pgd)
1611 return 0;
1612
1613 trace_kvm_unmap_hva(hva);
1614 handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
1615 return 0;
1616}
1617
1618int kvm_unmap_hva_range(struct kvm *kvm,
1619 unsigned long start, unsigned long end)
1620{
1621 if (!kvm->arch.pgd)
1622 return 0;
1623
1624 trace_kvm_unmap_hva_range(start, end);
1625 handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);
1626 return 0;
1627}
1628
056aad67 1629static int kvm_set_spte_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
d5d8184d
CD
1630{
1631 pte_t *pte = (pte_t *)data;
1632
056aad67 1633 WARN_ON(size != PAGE_SIZE);
15a49a44
MS
1634 /*
1635 * We can always call stage2_set_pte with KVM_S2PTE_FLAG_LOGGING_ACTIVE
1636 * flag clear because MMU notifiers will have unmapped a huge PMD before
1637 * calling ->change_pte() (which in turn calls kvm_set_spte_hva()) and
1638 * therefore stage2_set_pte() never needs to clear out a huge PMD
1639 * through this calling path.
1640 */
1641 stage2_set_pte(kvm, NULL, gpa, pte, 0);
1d2ebacc 1642 return 0;
d5d8184d
CD
1643}
1644
1645
1646void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
1647{
1648 unsigned long end = hva + PAGE_SIZE;
1649 pte_t stage2_pte;
1650
1651 if (!kvm->arch.pgd)
1652 return;
1653
1654 trace_kvm_set_spte_hva(hva);
1655 stage2_pte = pfn_pte(pte_pfn(pte), PAGE_S2);
1656 handle_hva_to_gpa(kvm, hva, end, &kvm_set_spte_handler, &stage2_pte);
1657}
1658
056aad67 1659static int kvm_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1660{
1661 pmd_t *pmd;
1662 pte_t *pte;
1663
056aad67 1664 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1665 pmd = stage2_get_pmd(kvm, NULL, gpa);
1666 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1667 return 0;
1668
06485053
CM
1669 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
1670 return stage2_pmdp_test_and_clear_young(pmd);
35307b9a
MZ
1671
1672 pte = pte_offset_kernel(pmd, gpa);
1673 if (pte_none(*pte))
1674 return 0;
1675
06485053 1676 return stage2_ptep_test_and_clear_young(pte);
35307b9a
MZ
1677}
1678
056aad67 1679static int kvm_test_age_hva_handler(struct kvm *kvm, gpa_t gpa, u64 size, void *data)
35307b9a
MZ
1680{
1681 pmd_t *pmd;
1682 pte_t *pte;
1683
056aad67 1684 WARN_ON(size != PAGE_SIZE && size != PMD_SIZE);
35307b9a
MZ
1685 pmd = stage2_get_pmd(kvm, NULL, gpa);
1686 if (!pmd || pmd_none(*pmd)) /* Nothing there */
1687 return 0;
1688
bbb3b6b3 1689 if (pmd_thp_or_huge(*pmd)) /* THP, HugeTLB */
35307b9a
MZ
1690 return pmd_young(*pmd);
1691
1692 pte = pte_offset_kernel(pmd, gpa);
1693 if (!pte_none(*pte)) /* Just a page... */
1694 return pte_young(*pte);
1695
1696 return 0;
1697}
1698
1699int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
1700{
7e5a6722
SP
1701 if (!kvm->arch.pgd)
1702 return 0;
35307b9a
MZ
1703 trace_kvm_age_hva(start, end);
1704 return handle_hva_to_gpa(kvm, start, end, kvm_age_hva_handler, NULL);
1705}
1706
1707int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
1708{
7e5a6722
SP
1709 if (!kvm->arch.pgd)
1710 return 0;
35307b9a
MZ
1711 trace_kvm_test_age_hva(hva);
1712 return handle_hva_to_gpa(kvm, hva, hva, kvm_test_age_hva_handler, NULL);
1713}
1714
d5d8184d
CD
1715void kvm_mmu_free_memory_caches(struct kvm_vcpu *vcpu)
1716{
1717 mmu_free_memory_cache(&vcpu->arch.mmu_page_cache);
1718}
1719
342cd0ab
CD
1720phys_addr_t kvm_mmu_get_httbr(void)
1721{
e4c5a685
AB
1722 if (__kvm_cpu_uses_extended_idmap())
1723 return virt_to_phys(merged_hyp_pgd);
1724 else
1725 return virt_to_phys(hyp_pgd);
342cd0ab
CD
1726}
1727
5a677ce0
MZ
1728phys_addr_t kvm_get_idmap_vector(void)
1729{
1730 return hyp_idmap_vector;
1731}
1732
0535a3e2
MZ
1733static int kvm_map_idmap_text(pgd_t *pgd)
1734{
1735 int err;
1736
1737 /* Create the idmap in the boot page tables */
1738 err = __create_hyp_mappings(pgd,
1739 hyp_idmap_start, hyp_idmap_end,
1740 __phys_to_pfn(hyp_idmap_start),
1741 PAGE_HYP_EXEC);
1742 if (err)
1743 kvm_err("Failed to idmap %lx-%lx\n",
1744 hyp_idmap_start, hyp_idmap_end);
1745
1746 return err;
1747}
1748
342cd0ab
CD
1749int kvm_mmu_init(void)
1750{
2fb41059
MZ
1751 int err;
1752
4fda342c
SS
1753 hyp_idmap_start = kvm_virt_to_phys(__hyp_idmap_text_start);
1754 hyp_idmap_end = kvm_virt_to_phys(__hyp_idmap_text_end);
1755 hyp_idmap_vector = kvm_virt_to_phys(__kvm_hyp_init);
5a677ce0 1756
06f75a1f
AB
1757 /*
1758 * We rely on the linker script to ensure at build time that the HYP
1759 * init code does not cross a page boundary.
1760 */
1761 BUG_ON((hyp_idmap_start ^ (hyp_idmap_end - 1)) & PAGE_MASK);
5a677ce0 1762
eac378a9
MZ
1763 kvm_info("IDMAP page: %lx\n", hyp_idmap_start);
1764 kvm_info("HYP VA range: %lx:%lx\n",
6c41a413 1765 kern_hyp_va(PAGE_OFFSET), kern_hyp_va(~0UL));
eac378a9 1766
6c41a413 1767 if (hyp_idmap_start >= kern_hyp_va(PAGE_OFFSET) &&
d2896d4b
MZ
1768 hyp_idmap_start < kern_hyp_va(~0UL) &&
1769 hyp_idmap_start != (unsigned long)__hyp_idmap_text_start) {
eac378a9
MZ
1770 /*
1771 * The idmap page is intersecting with the VA space,
1772 * it is not safe to continue further.
1773 */
1774 kvm_err("IDMAP intersecting with HYP VA, unable to continue\n");
1775 err = -EINVAL;
1776 goto out;
1777 }
1778
38f791a4 1779 hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, hyp_pgd_order);
0535a3e2 1780 if (!hyp_pgd) {
d5d8184d 1781 kvm_err("Hyp mode PGD not allocated\n");
2fb41059
MZ
1782 err = -ENOMEM;
1783 goto out;
1784 }
1785
0535a3e2
MZ
1786 if (__kvm_cpu_uses_extended_idmap()) {
1787 boot_hyp_pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
1788 hyp_pgd_order);
1789 if (!boot_hyp_pgd) {
1790 kvm_err("Hyp boot PGD not allocated\n");
1791 err = -ENOMEM;
1792 goto out;
1793 }
2fb41059 1794
0535a3e2
MZ
1795 err = kvm_map_idmap_text(boot_hyp_pgd);
1796 if (err)
1797 goto out;
d5d8184d 1798
e4c5a685
AB
1799 merged_hyp_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1800 if (!merged_hyp_pgd) {
1801 kvm_err("Failed to allocate extra HYP pgd\n");
1802 goto out;
1803 }
1804 __kvm_extend_hypmap(boot_hyp_pgd, hyp_pgd, merged_hyp_pgd,
1805 hyp_idmap_start);
0535a3e2
MZ
1806 } else {
1807 err = kvm_map_idmap_text(hyp_pgd);
1808 if (err)
1809 goto out;
5a677ce0
MZ
1810 }
1811
d5d8184d 1812 return 0;
2fb41059 1813out:
4f728276 1814 free_hyp_pgds();
2fb41059 1815 return err;
342cd0ab 1816}
df6ce24f
EA
1817
1818void kvm_arch_commit_memory_region(struct kvm *kvm,
09170a49 1819 const struct kvm_userspace_memory_region *mem,
df6ce24f 1820 const struct kvm_memory_slot *old,
f36f3f28 1821 const struct kvm_memory_slot *new,
df6ce24f
EA
1822 enum kvm_mr_change change)
1823{
c6473555
MS
1824 /*
1825 * At this point memslot has been committed and there is an
1826 * allocated dirty_bitmap[], dirty pages will be be tracked while the
1827 * memory slot is write protected.
1828 */
1829 if (change != KVM_MR_DELETE && mem->flags & KVM_MEM_LOG_DIRTY_PAGES)
1830 kvm_mmu_wp_memory_region(kvm, mem->slot);
df6ce24f
EA
1831}
1832
1833int kvm_arch_prepare_memory_region(struct kvm *kvm,
1834 struct kvm_memory_slot *memslot,
09170a49 1835 const struct kvm_userspace_memory_region *mem,
df6ce24f
EA
1836 enum kvm_mr_change change)
1837{
8eef9123
AB
1838 hva_t hva = mem->userspace_addr;
1839 hva_t reg_end = hva + mem->memory_size;
1840 bool writable = !(mem->flags & KVM_MEM_READONLY);
1841 int ret = 0;
1842
15a49a44
MS
1843 if (change != KVM_MR_CREATE && change != KVM_MR_MOVE &&
1844 change != KVM_MR_FLAGS_ONLY)
8eef9123
AB
1845 return 0;
1846
c3058d5d
CD
1847 /*
1848 * Prevent userspace from creating a memory region outside of the IPA
1849 * space addressable by the KVM guest IPA space.
1850 */
1851 if (memslot->base_gfn + memslot->npages >=
1852 (KVM_PHYS_SIZE >> PAGE_SHIFT))
1853 return -EFAULT;
1854
72f31048 1855 down_read(&current->mm->mmap_sem);
8eef9123
AB
1856 /*
1857 * A memory region could potentially cover multiple VMAs, and any holes
1858 * between them, so iterate over all of them to find out if we can map
1859 * any of them right now.
1860 *
1861 * +--------------------------------------------+
1862 * +---------------+----------------+ +----------------+
1863 * | : VMA 1 | VMA 2 | | VMA 3 : |
1864 * +---------------+----------------+ +----------------+
1865 * | memory region |
1866 * +--------------------------------------------+
1867 */
1868 do {
1869 struct vm_area_struct *vma = find_vma(current->mm, hva);
1870 hva_t vm_start, vm_end;
1871
1872 if (!vma || vma->vm_start >= reg_end)
1873 break;
1874
1875 /*
1876 * Mapping a read-only VMA is only allowed if the
1877 * memory region is configured as read-only.
1878 */
1879 if (writable && !(vma->vm_flags & VM_WRITE)) {
1880 ret = -EPERM;
1881 break;
1882 }
1883
1884 /*
1885 * Take the intersection of this VMA with the memory region
1886 */
1887 vm_start = max(hva, vma->vm_start);
1888 vm_end = min(reg_end, vma->vm_end);
1889
1890 if (vma->vm_flags & VM_PFNMAP) {
1891 gpa_t gpa = mem->guest_phys_addr +
1892 (vm_start - mem->userspace_addr);
ca09f02f
MM
1893 phys_addr_t pa;
1894
1895 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1896 pa += vm_start - vma->vm_start;
8eef9123 1897
15a49a44 1898 /* IO region dirty page logging not allowed */
72f31048
MZ
1899 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES) {
1900 ret = -EINVAL;
1901 goto out;
1902 }
15a49a44 1903
8eef9123
AB
1904 ret = kvm_phys_addr_ioremap(kvm, gpa, pa,
1905 vm_end - vm_start,
1906 writable);
1907 if (ret)
1908 break;
1909 }
1910 hva = vm_end;
1911 } while (hva < reg_end);
1912
15a49a44 1913 if (change == KVM_MR_FLAGS_ONLY)
72f31048 1914 goto out;
15a49a44 1915
849260c7
AB
1916 spin_lock(&kvm->mmu_lock);
1917 if (ret)
8eef9123 1918 unmap_stage2_range(kvm, mem->guest_phys_addr, mem->memory_size);
849260c7
AB
1919 else
1920 stage2_flush_memslot(kvm, memslot);
1921 spin_unlock(&kvm->mmu_lock);
72f31048
MZ
1922out:
1923 up_read(&current->mm->mmap_sem);
8eef9123 1924 return ret;
df6ce24f
EA
1925}
1926
1927void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1928 struct kvm_memory_slot *dont)
1929{
1930}
1931
1932int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1933 unsigned long npages)
1934{
1935 return 0;
1936}
1937
15f46015 1938void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
df6ce24f
EA
1939{
1940}
1941
1942void kvm_arch_flush_shadow_all(struct kvm *kvm)
1943{
293f2936 1944 kvm_free_stage2_pgd(kvm);
df6ce24f
EA
1945}
1946
1947void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
1948 struct kvm_memory_slot *slot)
1949{
8eef9123
AB
1950 gpa_t gpa = slot->base_gfn << PAGE_SHIFT;
1951 phys_addr_t size = slot->npages << PAGE_SHIFT;
1952
1953 spin_lock(&kvm->mmu_lock);
1954 unmap_stage2_range(kvm, gpa, size);
1955 spin_unlock(&kvm->mmu_lock);
df6ce24f 1956}
3c1e7165
MZ
1957
1958/*
1959 * See note at ARMv7 ARM B1.14.4 (TL;DR: S/W ops are not easily virtualized).
1960 *
1961 * Main problems:
1962 * - S/W ops are local to a CPU (not broadcast)
1963 * - We have line migration behind our back (speculation)
1964 * - System caches don't support S/W at all (damn!)
1965 *
1966 * In the face of the above, the best we can do is to try and convert
1967 * S/W ops to VA ops. Because the guest is not allowed to infer the
1968 * S/W to PA mapping, it can only use S/W to nuke the whole cache,
1969 * which is a rather good thing for us.
1970 *
1971 * Also, it is only used when turning caches on/off ("The expected
1972 * usage of the cache maintenance instructions that operate by set/way
1973 * is associated with the cache maintenance instructions associated
1974 * with the powerdown and powerup of caches, if this is required by
1975 * the implementation.").
1976 *
1977 * We use the following policy:
1978 *
1979 * - If we trap a S/W operation, we enable VM trapping to detect
1980 * caches being turned on/off, and do a full clean.
1981 *
1982 * - We flush the caches on both caches being turned on and off.
1983 *
1984 * - Once the caches are enabled, we stop trapping VM ops.
1985 */
1986void kvm_set_way_flush(struct kvm_vcpu *vcpu)
1987{
1988 unsigned long hcr = vcpu_get_hcr(vcpu);
1989
1990 /*
1991 * If this is the first time we do a S/W operation
1992 * (i.e. HCR_TVM not set) flush the whole memory, and set the
1993 * VM trapping.
1994 *
1995 * Otherwise, rely on the VM trapping to wait for the MMU +
1996 * Caches to be turned off. At that point, we'll be able to
1997 * clean the caches again.
1998 */
1999 if (!(hcr & HCR_TVM)) {
2000 trace_kvm_set_way_flush(*vcpu_pc(vcpu),
2001 vcpu_has_cache_enabled(vcpu));
2002 stage2_flush_vm(vcpu->kvm);
2003 vcpu_set_hcr(vcpu, hcr | HCR_TVM);
2004 }
2005}
2006
2007void kvm_toggle_cache(struct kvm_vcpu *vcpu, bool was_enabled)
2008{
2009 bool now_enabled = vcpu_has_cache_enabled(vcpu);
2010
2011 /*
2012 * If switching the MMU+caches on, need to invalidate the caches.
2013 * If switching it off, need to clean the caches.
2014 * Clean + invalidate does the trick always.
2015 */
2016 if (now_enabled != was_enabled)
2017 stage2_flush_vm(vcpu->kvm);
2018
2019 /* Caches are now on, stop trapping VM ops (until a S/W op) */
2020 if (now_enabled)
2021 vcpu_set_hcr(vcpu, vcpu_get_hcr(vcpu) & ~HCR_TVM);
2022
2023 trace_kvm_toggle_cache(*vcpu_pc(vcpu), was_enabled, now_enabled);
2024}