[mirror_ubuntu-bionic-kernel.git] / virt / kvm / arm / psci.c

/*
 * Copyright (C) 2012 - ARM Ltd
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/arm-smccc.h>
#include <linux/preempt.h>
#include <linux/kvm_host.h>
#include <linux/uaccess.h>
#include <linux/wait.h>

#include <asm/cputype.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_host.h>

#include <kvm/arm_psci.h>

/*
 * This is an implementation of the Power State Coordination Interface
 * as described in ARM document number ARM DEN 0022A.
 */

#define AFFINITY_MASK(level)	~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)

static u32 smccc_get_function(struct kvm_vcpu *vcpu)
{
	return vcpu_get_reg(vcpu, 0);
}

static unsigned long smccc_get_arg1(struct kvm_vcpu *vcpu)
{
	return vcpu_get_reg(vcpu, 1);
}

static unsigned long smccc_get_arg2(struct kvm_vcpu *vcpu)
{
	return vcpu_get_reg(vcpu, 2);
}

static unsigned long smccc_get_arg3(struct kvm_vcpu *vcpu)
{
	return vcpu_get_reg(vcpu, 3);
}

static void smccc_set_retval(struct kvm_vcpu *vcpu,
			     unsigned long a0,
			     unsigned long a1,
			     unsigned long a2,
			     unsigned long a3)
{
	vcpu_set_reg(vcpu, 0, a0);
	vcpu_set_reg(vcpu, 1, a1);
	vcpu_set_reg(vcpu, 2, a2);
	vcpu_set_reg(vcpu, 3, a3);
}

static unsigned long psci_affinity_mask(unsigned long affinity_level)
{
	if (affinity_level <= 3)
		return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);

	return 0;
}

static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
{
	/*
	 * NOTE: For simplicity, we make VCPU suspend emulation to be
	 * same-as WFI (Wait-for-interrupt) emulation.
	 *
	 * This means for KVM the wakeup events are interrupts and
	 * this is consistent with intended use of StateID as described
	 * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	 *
	 * Further, we also treat power-down request to be same as
	 * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	 * specification (ARM DEN 0022A). This means all suspend states
	 * for KVM will preserve the register state.
	 */
	kvm_vcpu_block(vcpu);
	kvm_clear_request(KVM_REQ_UNHALT, vcpu);

	return PSCI_RET_SUCCESS;
}

static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
{
	vcpu->arch.power_off = true;
	kvm_make_request(KVM_REQ_SLEEP, vcpu);
	kvm_vcpu_kick(vcpu);
}

static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
{
	struct kvm *kvm = source_vcpu->kvm;
	struct kvm_vcpu *vcpu = NULL;
	struct swait_queue_head *wq;
	unsigned long cpu_id;
	unsigned long context_id;
	phys_addr_t target_pc;

	cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
	if (vcpu_mode_is_32bit(source_vcpu))
		cpu_id &= ~((u32) 0);

	vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);

	/*
	 * Make sure the caller requested a valid CPU and that the CPU is
	 * turned off.
	 */
	if (!vcpu)
		return PSCI_RET_INVALID_PARAMS;
	if (!vcpu->arch.power_off) {
		if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
			return PSCI_RET_ALREADY_ON;
		else
			return PSCI_RET_INVALID_PARAMS;
	}

	target_pc = smccc_get_arg2(source_vcpu);
	context_id = smccc_get_arg3(source_vcpu);

	kvm_reset_vcpu(vcpu);

	/* Gracefully handle Thumb2 entry point */
	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
		target_pc &= ~((phys_addr_t) 1);
		vcpu_set_thumb(vcpu);
	}

	/* Propagate caller endianness */
	if (kvm_vcpu_is_be(source_vcpu))
		kvm_vcpu_set_be(vcpu);

	*vcpu_pc(vcpu) = target_pc;
	/*
	 * NOTE: We always update r0 (or x0) because for PSCI v0.1
	 * the general puspose registers are undefined upon CPU_ON.
	 */
	smccc_set_retval(vcpu, context_id, 0, 0, 0);
	vcpu->arch.power_off = false;
	smp_mb();		/* Make sure the above is visible */

	wq = kvm_arch_vcpu_wq(vcpu);
	swake_up(wq);

	return PSCI_RET_SUCCESS;
}

static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
{
	int i, matching_cpus = 0;
	unsigned long mpidr;
	unsigned long target_affinity;
	unsigned long target_affinity_mask;
	unsigned long lowest_affinity_level;
	struct kvm *kvm = vcpu->kvm;
	struct kvm_vcpu *tmp;

	target_affinity = smccc_get_arg1(vcpu);
	lowest_affinity_level = smccc_get_arg2(vcpu);

	/* Determine target affinity mask */
	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	if (!target_affinity_mask)
		return PSCI_RET_INVALID_PARAMS;

	/* Ignore other bits of target affinity */
	target_affinity &= target_affinity_mask;

	/*
	 * If one or more VCPU matching target affinity are running
	 * then ON else OFF
	 */
	kvm_for_each_vcpu(i, tmp, kvm) {
		mpidr = kvm_vcpu_get_mpidr_aff(tmp);
		if ((mpidr & target_affinity_mask) == target_affinity) {
			matching_cpus++;
			if (!tmp->arch.power_off)
				return PSCI_0_2_AFFINITY_LEVEL_ON;
		}
	}

	if (!matching_cpus)
		return PSCI_RET_INVALID_PARAMS;

	return PSCI_0_2_AFFINITY_LEVEL_OFF;
}

static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
{
	int i;
	struct kvm_vcpu *tmp;

	/*
	 * The KVM ABI specifies that a system event exit may call KVM_RUN
	 * again and may perform shutdown/reboot at a later time that when the
	 * actual request is made.  Since we are implementing PSCI and a
	 * caller of PSCI reboot and shutdown expects that the system shuts
	 * down or reboots immediately, let's make sure that VCPUs are not run
	 * after this call is handled and before the VCPUs have been
	 * re-initialized.
	 */
	kvm_for_each_vcpu(i, tmp, vcpu->kvm)
		tmp->arch.power_off = true;
	kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);

	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	vcpu->run->system_event.type = type;
	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
}

static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
}

static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
{
	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
}

static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
{
	struct kvm *kvm = vcpu->kvm;
	u32 psci_fn = smccc_get_function(vcpu);
	unsigned long val;
	int ret = 1;

	switch (psci_fn) {
	case PSCI_0_2_FN_PSCI_VERSION:
		/*
		 * Bits[31:16] = Major Version = 0
		 * Bits[15:0] = Minor Version = 2
		 */
		val = KVM_ARM_PSCI_0_2;
		break;
	case PSCI_0_2_FN_CPU_SUSPEND:
	case PSCI_0_2_FN64_CPU_SUSPEND:
		val = kvm_psci_vcpu_suspend(vcpu);
		break;
	case PSCI_0_2_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case PSCI_0_2_FN_CPU_ON:
	case PSCI_0_2_FN64_CPU_ON:
		mutex_lock(&kvm->lock);
		val = kvm_psci_vcpu_on(vcpu);
		mutex_unlock(&kvm->lock);
		break;
	case PSCI_0_2_FN_AFFINITY_INFO:
	case PSCI_0_2_FN64_AFFINITY_INFO:
		val = kvm_psci_vcpu_affinity_info(vcpu);
		break;
	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
		/*
		 * Trusted OS is MP hence does not require migration
	         * or
		 * Trusted OS is not present
		 */
		val = PSCI_0_2_TOS_MP;
		break;
	case PSCI_0_2_FN_SYSTEM_OFF:
		kvm_psci_system_off(vcpu);
		/*
		 * We should'nt be going back to guest VCPU after
		 * receiving SYSTEM_OFF request.
		 *
		 * If user space accidently/deliberately resumes
		 * guest VCPU after SYSTEM_OFF request then guest
		 * VCPU should see internal failure from PSCI return
		 * value. To achieve this, we preload r0 (or x0) with
		 * PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	case PSCI_0_2_FN_SYSTEM_RESET:
		kvm_psci_system_reset(vcpu);
		/*
		 * Same reason as SYSTEM_OFF for preloading r0 (or x0)
		 * with PSCI return value INTERNAL_FAILURE.
		 */
		val = PSCI_RET_INTERNAL_FAILURE;
		ret = 0;
		break;
	default:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	}

	smccc_set_retval(vcpu, val, 0, 0, 0);
	return ret;
}

static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
{
	u32 psci_fn = smccc_get_function(vcpu);
	u32 feature;
	unsigned long val;
	int ret = 1;

	switch(psci_fn) {
	case PSCI_0_2_FN_PSCI_VERSION:
		val = KVM_ARM_PSCI_1_0;
		break;
	case PSCI_1_0_FN_PSCI_FEATURES:
		feature = smccc_get_arg1(vcpu);
		switch(feature) {
		case PSCI_0_2_FN_PSCI_VERSION:
		case PSCI_0_2_FN_CPU_SUSPEND:
		case PSCI_0_2_FN64_CPU_SUSPEND:
		case PSCI_0_2_FN_CPU_OFF:
		case PSCI_0_2_FN_CPU_ON:
		case PSCI_0_2_FN64_CPU_ON:
		case PSCI_0_2_FN_AFFINITY_INFO:
		case PSCI_0_2_FN64_AFFINITY_INFO:
		case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
		case PSCI_0_2_FN_SYSTEM_OFF:
		case PSCI_0_2_FN_SYSTEM_RESET:
		case PSCI_1_0_FN_PSCI_FEATURES:
		case ARM_SMCCC_VERSION_FUNC_ID:
			val = 0;
			break;
		default:
			val = PSCI_RET_NOT_SUPPORTED;
			break;
		}
		break;
	default:
		return kvm_psci_0_2_call(vcpu);
	}

	smccc_set_retval(vcpu, val, 0, 0, 0);
	return ret;
}

static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
{
	struct kvm *kvm = vcpu->kvm;
	u32 psci_fn = smccc_get_function(vcpu);
	unsigned long val;

	switch (psci_fn) {
	case KVM_PSCI_FN_CPU_OFF:
		kvm_psci_vcpu_off(vcpu);
		val = PSCI_RET_SUCCESS;
		break;
	case KVM_PSCI_FN_CPU_ON:
		mutex_lock(&kvm->lock);
		val = kvm_psci_vcpu_on(vcpu);
		mutex_unlock(&kvm->lock);
		break;
	default:
		val = PSCI_RET_NOT_SUPPORTED;
		break;
	}

	smccc_set_retval(vcpu, val, 0, 0, 0);
	return 1;
}

/**
 * kvm_psci_call - handle PSCI call if r0 value is in range
 * @vcpu: Pointer to the VCPU struct
 *
 * Handle PSCI calls from guests through traps from HVC instructions.
 * The calling convention is similar to SMC calls to the secure world
 * where the function number is placed in r0.
 *
 * This function returns: > 0 (success), 0 (success but exit to user
 * space), and < 0 (errors)
 *
 * Errors:
 * -EINVAL: Unrecognized PSCI function
 */
static int kvm_psci_call(struct kvm_vcpu *vcpu)
{
	switch (kvm_psci_version(vcpu, vcpu->kvm)) {
	case KVM_ARM_PSCI_1_0:
		return kvm_psci_1_0_call(vcpu);
	case KVM_ARM_PSCI_0_2:
		return kvm_psci_0_2_call(vcpu);
	case KVM_ARM_PSCI_0_1:
		return kvm_psci_0_1_call(vcpu);
	default:
		return -EINVAL;
	};
}

int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
{
	u32 func_id = smccc_get_function(vcpu);
	u32 val = SMCCC_RET_NOT_SUPPORTED;
	u32 feature;

	switch (func_id) {
	case ARM_SMCCC_VERSION_FUNC_ID:
		val = ARM_SMCCC_VERSION_1_1;
		break;
	case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
		feature = smccc_get_arg1(vcpu);
		switch(feature) {
		case ARM_SMCCC_ARCH_WORKAROUND_1:
			if (kvm_arm_harden_branch_predictor())
				val = SMCCC_RET_SUCCESS;
			break;
		case ARM_SMCCC_ARCH_WORKAROUND_2:
			switch (kvm_arm_have_ssbd()) {
			case KVM_SSBD_FORCE_DISABLE:
			case KVM_SSBD_UNKNOWN:
				break;
			case KVM_SSBD_KERNEL:
				val = SMCCC_RET_SUCCESS;
				break;
			case KVM_SSBD_FORCE_ENABLE:
			case KVM_SSBD_MITIGATED:
				val = SMCCC_RET_NOT_REQUIRED;
				break;
			}
			break;
		}
		break;
	default:
		return kvm_psci_call(vcpu);
	}

	smccc_set_retval(vcpu, val, 0, 0, 0);
	return 1;
}

int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
{
	return 1;		/* PSCI version */
}

int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
{
	if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices))
		return -EFAULT;

	return 0;
}

int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
		void __user *uaddr = (void __user *)(long)reg->addr;
		u64 val;

		val = kvm_psci_version(vcpu, vcpu->kvm);
		if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
			return -EFAULT;

		return 0;
	}

	return -EINVAL;
}

int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
{
	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
		void __user *uaddr = (void __user *)(long)reg->addr;
		bool wants_02;
		u64 val;

		if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
			return -EFAULT;

		wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);

		switch (val) {
		case KVM_ARM_PSCI_0_1:
			if (wants_02)
				return -EINVAL;
			vcpu->kvm->arch.psci_version = val;
			return 0;
		case KVM_ARM_PSCI_0_2:
		case KVM_ARM_PSCI_1_0:
			if (!wants_02)
				return -EINVAL;
			vcpu->kvm->arch.psci_version = val;
			return 0;
		}
	}

	return -EINVAL;
}
Commit	Line	Data
aa024c2f MZ	1	/*
	2	* Copyright (C) 2012 - ARM Ltd
	3	* Author: Marc Zyngier <marc.zyngier@arm.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
7b5b30e9	18	#include <linux/arm-smccc.h>
cf5d3188	19	#include <linux/preempt.h>
aa024c2f	20	#include <linux/kvm_host.h>
9c98a823	21	#include <linux/uaccess.h>
aa024c2f MZ	22	#include <linux/wait.h>
aa024c2f MZ	23
79c64880	24	#include <asm/cputype.h>
aa024c2f	25	#include <asm/kvm_emulate.h>
4429fc64	26	#include <asm/kvm_host.h>
aa024c2f	27
221905ab MZ	28	#include <kvm/arm_psci.h>
221905ab MZ	29
aa024c2f MZ	30	/*
	31	* This is an implementation of the Power State Coordination Interface
	32	* as described in ARM document number ARM DEN 0022A.
	33	*/
	34
e6bc13c8 AP	35	#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
e6bc13c8 AP	36
11f4a8e7 MZ	37	static u32 smccc_get_function(struct kvm_vcpu *vcpu)
	38	{
	39	return vcpu_get_reg(vcpu, 0);
	40	}
	41
	42	static unsigned long smccc_get_arg1(struct kvm_vcpu *vcpu)
	43	{
	44	return vcpu_get_reg(vcpu, 1);
	45	}
	46
	47	static unsigned long smccc_get_arg2(struct kvm_vcpu *vcpu)
	48	{
	49	return vcpu_get_reg(vcpu, 2);
	50	}
	51
	52	static unsigned long smccc_get_arg3(struct kvm_vcpu *vcpu)
	53	{
	54	return vcpu_get_reg(vcpu, 3);
	55	}
	56
	57	static void smccc_set_retval(struct kvm_vcpu *vcpu,
	58	unsigned long a0,
	59	unsigned long a1,
	60	unsigned long a2,
	61	unsigned long a3)
	62	{
	63	vcpu_set_reg(vcpu, 0, a0);
	64	vcpu_set_reg(vcpu, 1, a1);
	65	vcpu_set_reg(vcpu, 2, a2);
	66	vcpu_set_reg(vcpu, 3, a3);
	67	}
	68
e6bc13c8 AP	69	static unsigned long psci_affinity_mask(unsigned long affinity_level)
	70	{
	71	if (affinity_level <= 3)
	72	return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
	73
	74	return 0;
	75	}
	76
b376d02b AP	77	static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
	78	{
	79	/*
	80	* NOTE: For simplicity, we make VCPU suspend emulation to be
	81	* same-as WFI (Wait-for-interrupt) emulation.
	82	*
	83	* This means for KVM the wakeup events are interrupts and
	84	* this is consistent with intended use of StateID as described
	85	* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
	86	*
	87	* Further, we also treat power-down request to be same as
	88	* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
	89	* specification (ARM DEN 0022A). This means all suspend states
	90	* for KVM will preserve the register state.
	91	*/
	92	kvm_vcpu_block(vcpu);
6a6d73be	93	kvm_clear_request(KVM_REQ_UNHALT, vcpu);
b376d02b AP	94
	95	return PSCI_RET_SUCCESS;
	96	}
	97
aa024c2f MZ	98	static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
aa024c2f MZ	99	{
3781528e	100	vcpu->arch.power_off = true;
7b244e2b	101	kvm_make_request(KVM_REQ_SLEEP, vcpu);
424c989b	102	kvm_vcpu_kick(vcpu);
aa024c2f MZ	103	}
	104
	105	static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
	106	{
	107	struct kvm *kvm = source_vcpu->kvm;
4429fc64	108	struct kvm_vcpu *vcpu = NULL;
8577370f	109	struct swait_queue_head *wq;
aa024c2f	110	unsigned long cpu_id;
aa8aeefe	111	unsigned long context_id;
aa024c2f MZ	112	phys_addr_t target_pc;
aa024c2f MZ	113
11f4a8e7	114	cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
aa024c2f MZ	115	if (vcpu_mode_is_32bit(source_vcpu))
	116	cpu_id &= ~((u32) 0);
	117
4429fc64	118	vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
79c64880	119
478a8237 CD	120	/*
	121	* Make sure the caller requested a valid CPU and that the CPU is
	122	* turned off.
	123	*/
aa8aeefe	124	if (!vcpu)
7d0f84aa	125	return PSCI_RET_INVALID_PARAMS;
3781528e	126	if (!vcpu->arch.power_off) {
69b98e81	127	if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
aa8aeefe AP	128	return PSCI_RET_ALREADY_ON;
	129	else
	130	return PSCI_RET_INVALID_PARAMS;
	131	}
aa024c2f	132
11f4a8e7 MZ	133	target_pc = smccc_get_arg2(source_vcpu);
11f4a8e7 MZ	134	context_id = smccc_get_arg3(source_vcpu);
aa024c2f	135
aa024c2f MZ	136	kvm_reset_vcpu(vcpu);
	137
	138	/* Gracefully handle Thumb2 entry point */
	139	if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
	140	target_pc &= ~((phys_addr_t) 1);
	141	vcpu_set_thumb(vcpu);
	142	}
	143
ce94fe93 MZ	144	/* Propagate caller endianness */
	145	if (kvm_vcpu_is_be(source_vcpu))
	146	kvm_vcpu_set_be(vcpu);
	147
aa024c2f	148	*vcpu_pc(vcpu) = target_pc;
aa8aeefe AP	149	/*
	150	* NOTE: We always update r0 (or x0) because for PSCI v0.1
	151	* the general puspose registers are undefined upon CPU_ON.
	152	*/
11f4a8e7	153	smccc_set_retval(vcpu, context_id, 0, 0, 0);
3781528e	154	vcpu->arch.power_off = false;
aa024c2f MZ	155	smp_mb(); /* Make sure the above is visible */
aa024c2f MZ	156
478a8237	157	wq = kvm_arch_vcpu_wq(vcpu);
8577370f	158	swake_up(wq);
aa024c2f	159
7d0f84aa	160	return PSCI_RET_SUCCESS;
aa024c2f MZ	161	}
aa024c2f MZ	162
e6bc13c8 AP	163	static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
e6bc13c8 AP	164	{
0c067292	165	int i, matching_cpus = 0;
e6bc13c8 AP	166	unsigned long mpidr;
	167	unsigned long target_affinity;
	168	unsigned long target_affinity_mask;
	169	unsigned long lowest_affinity_level;
	170	struct kvm *kvm = vcpu->kvm;
	171	struct kvm_vcpu *tmp;
	172
11f4a8e7 MZ	173	target_affinity = smccc_get_arg1(vcpu);
11f4a8e7 MZ	174	lowest_affinity_level = smccc_get_arg2(vcpu);
e6bc13c8 AP	175
	176	/* Determine target affinity mask */
	177	target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
	178	if (!target_affinity_mask)
	179	return PSCI_RET_INVALID_PARAMS;
	180
	181	/* Ignore other bits of target affinity */
	182	target_affinity &= target_affinity_mask;
	183
	184	/*
	185	* If one or more VCPU matching target affinity are running
	186	* then ON else OFF
	187	*/
	188	kvm_for_each_vcpu(i, tmp, kvm) {
4429fc64	189	mpidr = kvm_vcpu_get_mpidr_aff(tmp);
0c067292 AS	190	if ((mpidr & target_affinity_mask) == target_affinity) {
0c067292 AS	191	matching_cpus++;
3781528e	192	if (!tmp->arch.power_off)
0c067292	193	return PSCI_0_2_AFFINITY_LEVEL_ON;
e6bc13c8 AP	194	}
	195	}
	196
0c067292 AS	197	if (!matching_cpus)
	198	return PSCI_RET_INVALID_PARAMS;
	199
e6bc13c8 AP	200	return PSCI_0_2_AFFINITY_LEVEL_OFF;
	201	}
	202
4b123826 AP	203	static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
4b123826 AP	204	{
cf5d3188 CD	205	int i;
	206	struct kvm_vcpu *tmp;
	207
	208	/*
	209	* The KVM ABI specifies that a system event exit may call KVM_RUN
	210	* again and may perform shutdown/reboot at a later time that when the
	211	* actual request is made. Since we are implementing PSCI and a
	212	* caller of PSCI reboot and shutdown expects that the system shuts
	213	* down or reboots immediately, let's make sure that VCPUs are not run
	214	* after this call is handled and before the VCPUs have been
	215	* re-initialized.
	216	*/
cc9b43f9	217	kvm_for_each_vcpu(i, tmp, vcpu->kvm)
3781528e	218	tmp->arch.power_off = true;
7b244e2b	219	kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
cf5d3188	220
4b123826 AP	221	memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
	222	vcpu->run->system_event.type = type;
	223	vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
	224	}
	225
	226	static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
	227	{
	228	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
	229	}
	230
	231	static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
	232	{
	233	kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
	234	}
	235
e8e7fcc5	236	static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
7d0f84aa	237	{
6c7a5dce	238	struct kvm *kvm = vcpu->kvm;
11f4a8e7	239	u32 psci_fn = smccc_get_function(vcpu);
7d0f84aa	240	unsigned long val;
6c7a5dce	241	int ret = 1;
7d0f84aa AP	242
	243	switch (psci_fn) {
	244	case PSCI_0_2_FN_PSCI_VERSION:
	245	/*
	246	* Bits[31:16] = Major Version = 0
	247	* Bits[15:0] = Minor Version = 2
	248	*/
9788f802	249	val = KVM_ARM_PSCI_0_2;
7d0f84aa	250	break;
b376d02b AP	251	case PSCI_0_2_FN_CPU_SUSPEND:
	252	case PSCI_0_2_FN64_CPU_SUSPEND:
	253	val = kvm_psci_vcpu_suspend(vcpu);
	254	break;
7d0f84aa AP	255	case PSCI_0_2_FN_CPU_OFF:
	256	kvm_psci_vcpu_off(vcpu);
	257	val = PSCI_RET_SUCCESS;
	258	break;
	259	case PSCI_0_2_FN_CPU_ON:
	260	case PSCI_0_2_FN64_CPU_ON:
6c7a5dce	261	mutex_lock(&kvm->lock);
7d0f84aa	262	val = kvm_psci_vcpu_on(vcpu);
6c7a5dce	263	mutex_unlock(&kvm->lock);
7d0f84aa	264	break;
e6bc13c8 AP	265	case PSCI_0_2_FN_AFFINITY_INFO:
	266	case PSCI_0_2_FN64_AFFINITY_INFO:
	267	val = kvm_psci_vcpu_affinity_info(vcpu);
	268	break;
bab0b430 AP	269	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	270	/*
	271	* Trusted OS is MP hence does not require migration
	272	* or
	273	* Trusted OS is not present
	274	*/
	275	val = PSCI_0_2_TOS_MP;
	276	break;
4b123826 AP	277	case PSCI_0_2_FN_SYSTEM_OFF:
	278	kvm_psci_system_off(vcpu);
	279	/*
	280	* We should'nt be going back to guest VCPU after
	281	* receiving SYSTEM_OFF request.
	282	*
	283	* If user space accidently/deliberately resumes
	284	* guest VCPU after SYSTEM_OFF request then guest
	285	* VCPU should see internal failure from PSCI return
	286	* value. To achieve this, we preload r0 (or x0) with
	287	* PSCI return value INTERNAL_FAILURE.
	288	*/
	289	val = PSCI_RET_INTERNAL_FAILURE;
	290	ret = 0;
	291	break;
	292	case PSCI_0_2_FN_SYSTEM_RESET:
	293	kvm_psci_system_reset(vcpu);
	294	/*
	295	* Same reason as SYSTEM_OFF for preloading r0 (or x0)
	296	* with PSCI return value INTERNAL_FAILURE.
	297	*/
	298	val = PSCI_RET_INTERNAL_FAILURE;
	299	ret = 0;
	300	break;
7d0f84aa	301	default:
e2d99736 LP	302	val = PSCI_RET_NOT_SUPPORTED;
e2d99736 LP	303	break;
7d0f84aa AP	304	}
7d0f84aa AP	305
11f4a8e7	306	smccc_set_retval(vcpu, val, 0, 0, 0);
4b123826	307	return ret;
7d0f84aa AP	308	}
7d0f84aa AP	309
8d185513 MZ	310	static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
	311	{
	312	u32 psci_fn = smccc_get_function(vcpu);
	313	u32 feature;
	314	unsigned long val;
	315	int ret = 1;
	316
	317	switch(psci_fn) {
	318	case PSCI_0_2_FN_PSCI_VERSION:
	319	val = KVM_ARM_PSCI_1_0;
	320	break;
	321	case PSCI_1_0_FN_PSCI_FEATURES:
	322	feature = smccc_get_arg1(vcpu);
	323	switch(feature) {
	324	case PSCI_0_2_FN_PSCI_VERSION:
	325	case PSCI_0_2_FN_CPU_SUSPEND:
	326	case PSCI_0_2_FN64_CPU_SUSPEND:
	327	case PSCI_0_2_FN_CPU_OFF:
	328	case PSCI_0_2_FN_CPU_ON:
	329	case PSCI_0_2_FN64_CPU_ON:
	330	case PSCI_0_2_FN_AFFINITY_INFO:
	331	case PSCI_0_2_FN64_AFFINITY_INFO:
	332	case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
	333	case PSCI_0_2_FN_SYSTEM_OFF:
	334	case PSCI_0_2_FN_SYSTEM_RESET:
	335	case PSCI_1_0_FN_PSCI_FEATURES:
7b5b30e9	336	case ARM_SMCCC_VERSION_FUNC_ID:
8d185513 MZ	337	val = 0;
	338	break;
	339	default:
	340	val = PSCI_RET_NOT_SUPPORTED;
	341	break;
	342	}
	343	break;
	344	default:
	345	return kvm_psci_0_2_call(vcpu);
	346	}
	347
	348	smccc_set_retval(vcpu, val, 0, 0, 0);
	349	return ret;
	350	}
	351
e8e7fcc5	352	static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
aa024c2f	353	{
6c7a5dce	354	struct kvm *kvm = vcpu->kvm;
11f4a8e7	355	u32 psci_fn = smccc_get_function(vcpu);
aa024c2f MZ	356	unsigned long val;
	357
	358	switch (psci_fn) {
	359	case KVM_PSCI_FN_CPU_OFF:
	360	kvm_psci_vcpu_off(vcpu);
7d0f84aa	361	val = PSCI_RET_SUCCESS;
aa024c2f MZ	362	break;
aa024c2f MZ	363	case KVM_PSCI_FN_CPU_ON:
6c7a5dce	364	mutex_lock(&kvm->lock);
aa024c2f	365	val = kvm_psci_vcpu_on(vcpu);
6c7a5dce	366	mutex_unlock(&kvm->lock);
aa024c2f	367	break;
e2d99736	368	default:
7d0f84aa	369	val = PSCI_RET_NOT_SUPPORTED;
aa024c2f	370	break;
aa024c2f MZ	371	}
aa024c2f MZ	372
11f4a8e7	373	smccc_set_retval(vcpu, val, 0, 0, 0);
e8e7fcc5	374	return 1;
aa024c2f	375	}
7d0f84aa AP	376
	377	/**
	378	* kvm_psci_call - handle PSCI call if r0 value is in range
	379	* @vcpu: Pointer to the VCPU struct
	380	*
	381	* Handle PSCI calls from guests through traps from HVC instructions.
e8e7fcc5 AP	382	* The calling convention is similar to SMC calls to the secure world
	383	* where the function number is placed in r0.
	384	*
	385	* This function returns: > 0 (success), 0 (success but exit to user
	386	* space), and < 0 (errors)
	387	*
	388	* Errors:
	389	* -EINVAL: Unrecognized PSCI function
7d0f84aa	390	*/
7b5b30e9	391	static int kvm_psci_call(struct kvm_vcpu *vcpu)
7d0f84aa	392	{
69b98e81	393	switch (kvm_psci_version(vcpu, vcpu->kvm)) {
8d185513 MZ	394	case KVM_ARM_PSCI_1_0:
8d185513 MZ	395	return kvm_psci_1_0_call(vcpu);
7d0f84aa AP	396	case KVM_ARM_PSCI_0_2:
	397	return kvm_psci_0_2_call(vcpu);
	398	case KVM_ARM_PSCI_0_1:
	399	return kvm_psci_0_1_call(vcpu);
	400	default:
e8e7fcc5	401	return -EINVAL;
7d0f84aa AP	402	};
7d0f84aa AP	403	}
7b5b30e9 MZ	404
	405	int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
	406	{
	407	u32 func_id = smccc_get_function(vcpu);
d469d023	408	u32 val = SMCCC_RET_NOT_SUPPORTED;
d5a70971	409	u32 feature;
7b5b30e9 MZ	410
	411	switch (func_id) {
	412	case ARM_SMCCC_VERSION_FUNC_ID:
	413	val = ARM_SMCCC_VERSION_1_1;
	414	break;
	415	case ARM_SMCCC_ARCH_FEATURES_FUNC_ID:
d5a70971 MZ	416	feature = smccc_get_arg1(vcpu);
	417	switch(feature) {
	418	case ARM_SMCCC_ARCH_WORKAROUND_1:
	419	if (kvm_arm_harden_branch_predictor())
d469d023 MZ	420	val = SMCCC_RET_SUCCESS;
	421	break;
	422	case ARM_SMCCC_ARCH_WORKAROUND_2:
	423	switch (kvm_arm_have_ssbd()) {
	424	case KVM_SSBD_FORCE_DISABLE:
	425	case KVM_SSBD_UNKNOWN:
	426	break;
	427	case KVM_SSBD_KERNEL:
	428	val = SMCCC_RET_SUCCESS;
	429	break;
	430	case KVM_SSBD_FORCE_ENABLE:
	431	case KVM_SSBD_MITIGATED:
	432	val = SMCCC_RET_NOT_REQUIRED;
	433	break;
	434	}
d5a70971 MZ	435	break;
d5a70971 MZ	436	}
7b5b30e9 MZ	437	break;
	438	default:
	439	return kvm_psci_call(vcpu);
	440	}
	441
	442	smccc_set_retval(vcpu, val, 0, 0, 0);
	443	return 1;
	444	}
9c98a823 MZ	445
	446	int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
	447	{
	448	return 1; /* PSCI version */
	449	}
	450
	451	int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu vcpu, u64 __user uindices)
	452	{
	453	if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices))
	454	return -EFAULT;
	455
	456	return 0;
	457	}
	458
	459	int kvm_arm_get_fw_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	460	{
	461	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
	462	void __user uaddr = (void __user )(long)reg->addr;
	463	u64 val;
	464
	465	val = kvm_psci_version(vcpu, vcpu->kvm);
	466	if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
	467	return -EFAULT;
	468
	469	return 0;
	470	}
	471
	472	return -EINVAL;
	473	}
	474
	475	int kvm_arm_set_fw_reg(struct kvm_vcpu vcpu, const struct kvm_one_reg reg)
	476	{
	477	if (reg->id == KVM_REG_ARM_PSCI_VERSION) {
	478	void __user uaddr = (void __user )(long)reg->addr;
	479	bool wants_02;
	480	u64 val;
	481
	482	if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
	483	return -EFAULT;
	484
	485	wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
	486
	487	switch (val) {
	488	case KVM_ARM_PSCI_0_1:
	489	if (wants_02)
	490	return -EINVAL;
	491	vcpu->kvm->arch.psci_version = val;
	492	return 0;
	493	case KVM_ARM_PSCI_0_2:
	494	case KVM_ARM_PSCI_1_0:
	495	if (!wants_02)
	496	return -EINVAL;
	497	vcpu->kvm->arch.psci_version = val;
	498	return 0;
	499	}
	500	}
	501
	502	return -EINVAL;
	503	}