]>
Commit | Line | Data |
---|---|---|
59c5ab40 AP |
1 | /* |
2 | * GICv3 ITS emulation | |
3 | * | |
4 | * Copyright (C) 2015,2016 ARM Ltd. | |
5 | * Author: Andre Przywara <andre.przywara@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/cpu.h> | |
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_host.h> | |
23 | #include <linux/interrupt.h> | |
424c3383 | 24 | #include <linux/list.h> |
1085fdc6 | 25 | #include <linux/uaccess.h> |
57a9a117 | 26 | #include <linux/list_sort.h> |
59c5ab40 AP |
27 | |
28 | #include <linux/irqchip/arm-gic-v3.h> | |
29 | ||
30 | #include <asm/kvm_emulate.h> | |
31 | #include <asm/kvm_arm.h> | |
32 | #include <asm/kvm_mmu.h> | |
33 | ||
34 | #include "vgic.h" | |
35 | #include "vgic-mmio.h" | |
36 | ||
71afe470 EA |
37 | static int vgic_its_save_tables_v0(struct vgic_its *its); |
38 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
39 | static int vgic_its_commit_v0(struct vgic_its *its); | |
06bd5359 | 40 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
6ce18e3a | 41 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
71afe470 | 42 | |
df9f58fb AP |
43 | /* |
44 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
45 | * If this LPI is already mapped on another ITS, we increase its refcount | |
46 | * and return a pointer to the existing structure. | |
47 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
48 | * This function returns a pointer to the _unlocked_ structure. | |
49 | */ | |
06bd5359 EA |
50 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, |
51 | struct kvm_vcpu *vcpu) | |
df9f58fb AP |
52 | { |
53 | struct vgic_dist *dist = &kvm->arch.vgic; | |
54 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
7755559d | 55 | unsigned long flags; |
06bd5359 | 56 | int ret; |
df9f58fb AP |
57 | |
58 | /* In this case there is no put, since we keep the reference. */ | |
59 | if (irq) | |
60 | return irq; | |
61 | ||
62 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL); | |
63 | if (!irq) | |
99e5e886 | 64 | return ERR_PTR(-ENOMEM); |
df9f58fb AP |
65 | |
66 | INIT_LIST_HEAD(&irq->lpi_list); | |
67 | INIT_LIST_HEAD(&irq->ap_list); | |
68 | spin_lock_init(&irq->irq_lock); | |
69 | ||
70 | irq->config = VGIC_CONFIG_EDGE; | |
71 | kref_init(&irq->refcount); | |
72 | irq->intid = intid; | |
06bd5359 | 73 | irq->target_vcpu = vcpu; |
df9f58fb | 74 | |
50f82406 | 75 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
df9f58fb AP |
76 | |
77 | /* | |
78 | * There could be a race with another vgic_add_lpi(), so we need to | |
79 | * check that we don't add a second list entry with the same LPI. | |
80 | */ | |
81 | list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) { | |
82 | if (oldirq->intid != intid) | |
83 | continue; | |
84 | ||
85 | /* Someone was faster with adding this LPI, lets use that. */ | |
86 | kfree(irq); | |
87 | irq = oldirq; | |
88 | ||
89 | /* | |
90 | * This increases the refcount, the caller is expected to | |
91 | * call vgic_put_irq() on the returned pointer once it's | |
92 | * finished with the IRQ. | |
93 | */ | |
d97594e6 | 94 | vgic_get_irq_kref(irq); |
df9f58fb AP |
95 | |
96 | goto out_unlock; | |
97 | } | |
98 | ||
99 | list_add_tail(&irq->lpi_list, &dist->lpi_list_head); | |
100 | dist->lpi_list_count++; | |
101 | ||
102 | out_unlock: | |
50f82406 | 103 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
df9f58fb | 104 | |
06bd5359 EA |
105 | /* |
106 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
107 | * However we only have those structs for mapped IRQs, so we read in | |
108 | * the respective config data from memory here upon mapping the LPI. | |
109 | */ | |
6ce18e3a | 110 | ret = update_lpi_config(kvm, irq, NULL, false); |
06bd5359 EA |
111 | if (ret) |
112 | return ERR_PTR(ret); | |
113 | ||
114 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
115 | if (ret) | |
116 | return ERR_PTR(ret); | |
117 | ||
df9f58fb AP |
118 | return irq; |
119 | } | |
120 | ||
424c3383 AP |
121 | struct its_device { |
122 | struct list_head dev_list; | |
123 | ||
124 | /* the head for the list of ITTEs */ | |
125 | struct list_head itt_head; | |
0d44cdb6 | 126 | u32 num_eventid_bits; |
7333cefe | 127 | gpa_t itt_addr; |
424c3383 AP |
128 | u32 device_id; |
129 | }; | |
130 | ||
131 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
132 | ||
133 | struct its_collection { | |
134 | struct list_head coll_list; | |
135 | ||
136 | u32 collection_id; | |
137 | u32 target_addr; | |
138 | }; | |
139 | ||
140 | #define its_is_collection_mapped(coll) ((coll) && \ | |
141 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
142 | ||
9ce91c72 EA |
143 | struct its_ite { |
144 | struct list_head ite_list; | |
424c3383 | 145 | |
3802411d | 146 | struct vgic_irq *irq; |
424c3383 | 147 | struct its_collection *collection; |
424c3383 AP |
148 | u32 event_id; |
149 | }; | |
150 | ||
71afe470 EA |
151 | /** |
152 | * struct vgic_its_abi - ITS abi ops and settings | |
153 | * @cte_esz: collection table entry size | |
154 | * @dte_esz: device table entry size | |
155 | * @ite_esz: interrupt translation table entry size | |
156 | * @save tables: save the ITS tables into guest RAM | |
157 | * @restore_tables: restore the ITS internal structs from tables | |
158 | * stored in guest RAM | |
159 | * @commit: initialize the registers which expose the ABI settings, | |
160 | * especially the entry sizes | |
161 | */ | |
162 | struct vgic_its_abi { | |
163 | int cte_esz; | |
164 | int dte_esz; | |
165 | int ite_esz; | |
166 | int (*save_tables)(struct vgic_its *its); | |
167 | int (*restore_tables)(struct vgic_its *its); | |
168 | int (*commit)(struct vgic_its *its); | |
169 | }; | |
170 | ||
171 | static const struct vgic_its_abi its_table_abi_versions[] = { | |
172 | [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8, | |
173 | .save_tables = vgic_its_save_tables_v0, | |
174 | .restore_tables = vgic_its_restore_tables_v0, | |
175 | .commit = vgic_its_commit_v0, | |
176 | }, | |
177 | }; | |
178 | ||
179 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
180 | ||
181 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
182 | { | |
183 | return &its_table_abi_versions[its->abi_rev]; | |
184 | } | |
185 | ||
186 | int vgic_its_set_abi(struct vgic_its *its, int rev) | |
187 | { | |
188 | const struct vgic_its_abi *abi; | |
189 | ||
190 | its->abi_rev = rev; | |
191 | abi = vgic_its_get_abi(its); | |
192 | return abi->commit(its); | |
193 | } | |
194 | ||
df9f58fb AP |
195 | /* |
196 | * Find and returns a device in the device table for an ITS. | |
197 | * Must be called with the its_lock mutex held. | |
198 | */ | |
199 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
200 | { | |
201 | struct its_device *device; | |
202 | ||
203 | list_for_each_entry(device, &its->device_list, dev_list) | |
204 | if (device_id == device->device_id) | |
205 | return device; | |
206 | ||
207 | return NULL; | |
208 | } | |
209 | ||
210 | /* | |
211 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
212 | * Device ID/Event ID pair on an ITS. | |
213 | * Must be called with the its_lock mutex held. | |
214 | */ | |
9ce91c72 | 215 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, |
df9f58fb AP |
216 | u32 event_id) |
217 | { | |
218 | struct its_device *device; | |
9ce91c72 | 219 | struct its_ite *ite; |
df9f58fb AP |
220 | |
221 | device = find_its_device(its, device_id); | |
222 | if (device == NULL) | |
223 | return NULL; | |
224 | ||
9ce91c72 EA |
225 | list_for_each_entry(ite, &device->itt_head, ite_list) |
226 | if (ite->event_id == event_id) | |
227 | return ite; | |
df9f58fb AP |
228 | |
229 | return NULL; | |
230 | } | |
231 | ||
232 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
9ce91c72 | 233 | #define for_each_lpi_its(dev, ite, its) \ |
df9f58fb | 234 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ |
9ce91c72 | 235 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) |
df9f58fb | 236 | |
424c3383 AP |
237 | /* |
238 | * We only implement 48 bits of PA at the moment, although the ITS | |
239 | * supports more. Let's be restrictive here. | |
240 | */ | |
df9f58fb | 241 | #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16)) |
424c3383 | 242 | #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12)) |
f9f77af9 AP |
243 | |
244 | #define GIC_LPI_OFFSET 8192 | |
245 | ||
0d44cdb6 | 246 | #define VITS_TYPER_IDBITS 16 |
07a3e9a7 | 247 | #define VITS_TYPER_DEVBITS 16 |
920a7a8f EA |
248 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) |
249 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
0d44cdb6 | 250 | |
df9f58fb AP |
251 | /* |
252 | * Finds and returns a collection in the ITS collection table. | |
253 | * Must be called with the its_lock mutex held. | |
254 | */ | |
255 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
256 | { | |
257 | struct its_collection *collection; | |
258 | ||
259 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
260 | if (coll_id == collection->collection_id) | |
261 | return collection; | |
262 | } | |
263 | ||
264 | return NULL; | |
265 | } | |
266 | ||
f9f77af9 AP |
267 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) |
268 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
269 | ||
270 | /* | |
271 | * Reads the configuration data for a given LPI from guest memory and | |
272 | * updates the fields in struct vgic_irq. | |
273 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
274 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
275 | */ | |
276 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
6ce18e3a | 277 | struct kvm_vcpu *filter_vcpu, bool needs_inv) |
f9f77af9 | 278 | { |
44de9d68 | 279 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); |
f9f77af9 AP |
280 | u8 prop; |
281 | int ret; | |
006df0f3 | 282 | unsigned long flags; |
f9f77af9 | 283 | |
b9c628f6 AP |
284 | ret = kvm_read_guest_lock(kvm, propbase + irq->intid - GIC_LPI_OFFSET, |
285 | &prop, 1); | |
f9f77af9 AP |
286 | |
287 | if (ret) | |
288 | return ret; | |
289 | ||
006df0f3 | 290 | spin_lock_irqsave(&irq->irq_lock, flags); |
f9f77af9 AP |
291 | |
292 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
293 | irq->priority = LPI_PROP_PRIORITY(prop); | |
294 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
295 | ||
95b110ab CD |
296 | if (!irq->hw) { |
297 | vgic_queue_irq_unlock(kvm, irq, flags); | |
298 | return 0; | |
299 | } | |
f9f77af9 AP |
300 | } |
301 | ||
95b110ab CD |
302 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
303 | ||
af340f99 | 304 | if (irq->hw) |
6ce18e3a | 305 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
af340f99 | 306 | |
f9f77af9 AP |
307 | return 0; |
308 | } | |
33d3bc95 AP |
309 | |
310 | /* | |
ccb1d791 EA |
311 | * Create a snapshot of the current LPIs targeting @vcpu, so that we can |
312 | * enumerate those LPIs without holding any lock. | |
313 | * Returns their number and puts the kmalloc'ed array into intid_ptr. | |
33d3bc95 | 314 | */ |
ccb1d791 | 315 | static int vgic_copy_lpi_list(struct kvm_vcpu *vcpu, u32 **intid_ptr) |
33d3bc95 | 316 | { |
ccb1d791 | 317 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
33d3bc95 | 318 | struct vgic_irq *irq; |
7755559d | 319 | unsigned long flags; |
33d3bc95 | 320 | u32 *intids; |
e092e6af | 321 | int irq_count, i = 0; |
33d3bc95 AP |
322 | |
323 | /* | |
e092e6af MZ |
324 | * There is an obvious race between allocating the array and LPIs |
325 | * being mapped/unmapped. If we ended up here as a result of a | |
326 | * command, we're safe (locks are held, preventing another | |
327 | * command). If coming from another path (such as enabling LPIs), | |
328 | * we must be careful not to overrun the array. | |
33d3bc95 | 329 | */ |
e092e6af | 330 | irq_count = READ_ONCE(dist->lpi_list_count); |
33d3bc95 AP |
331 | intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL); |
332 | if (!intids) | |
333 | return -ENOMEM; | |
334 | ||
50f82406 | 335 | raw_spin_lock_irqsave(&dist->lpi_list_lock, flags); |
33d3bc95 | 336 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { |
e092e6af MZ |
337 | if (i == irq_count) |
338 | break; | |
33d3bc95 | 339 | /* We don't need to "get" the IRQ, as we hold the list lock. */ |
ccb1d791 EA |
340 | if (irq->target_vcpu != vcpu) |
341 | continue; | |
342 | intids[i++] = irq->intid; | |
33d3bc95 | 343 | } |
50f82406 | 344 | raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags); |
33d3bc95 AP |
345 | |
346 | *intid_ptr = intids; | |
ccb1d791 | 347 | return i; |
33d3bc95 AP |
348 | } |
349 | ||
08c9fd04 MZ |
350 | static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) |
351 | { | |
0fc9a58e | 352 | int ret = 0; |
38f245d4 | 353 | unsigned long flags; |
0fc9a58e | 354 | |
38f245d4 | 355 | spin_lock_irqsave(&irq->irq_lock, flags); |
08c9fd04 | 356 | irq->target_vcpu = vcpu; |
38f245d4 | 357 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
08c9fd04 | 358 | |
0fc9a58e MZ |
359 | if (irq->hw) { |
360 | struct its_vlpi_map map; | |
361 | ||
362 | ret = its_get_vlpi(irq->host_irq, &map); | |
363 | if (ret) | |
364 | return ret; | |
365 | ||
366 | map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; | |
367 | ||
368 | ret = its_map_vlpi(irq->host_irq, &map); | |
369 | } | |
370 | ||
371 | return ret; | |
08c9fd04 MZ |
372 | } |
373 | ||
df9f58fb AP |
374 | /* |
375 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
376 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
377 | * Needs to be called whenever either the collection for a LPIs has | |
378 | * changed or the collection itself got retargeted. | |
379 | */ | |
9ce91c72 | 380 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) |
df9f58fb AP |
381 | { |
382 | struct kvm_vcpu *vcpu; | |
383 | ||
9ce91c72 | 384 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
385 | return; |
386 | ||
9ce91c72 | 387 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
08c9fd04 | 388 | update_affinity(ite->irq, vcpu); |
df9f58fb AP |
389 | } |
390 | ||
391 | /* | |
392 | * Updates the target VCPU for every LPI targeting this collection. | |
393 | * Must be called with the its_lock mutex held. | |
394 | */ | |
395 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
396 | struct its_collection *coll) | |
397 | { | |
398 | struct its_device *device; | |
9ce91c72 | 399 | struct its_ite *ite; |
df9f58fb | 400 | |
9ce91c72 EA |
401 | for_each_lpi_its(device, ite, its) { |
402 | if (!ite->collection || coll != ite->collection) | |
df9f58fb AP |
403 | continue; |
404 | ||
9ce91c72 | 405 | update_affinity_ite(kvm, ite); |
df9f58fb AP |
406 | } |
407 | } | |
408 | ||
409 | static u32 max_lpis_propbaser(u64 propbaser) | |
410 | { | |
411 | int nr_idbits = (propbaser & 0x1f) + 1; | |
412 | ||
413 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
414 | } | |
415 | ||
33d3bc95 | 416 | /* |
ccb1d791 | 417 | * Sync the pending table pending bit of LPIs targeting @vcpu |
33d3bc95 AP |
418 | * with our own data structures. This relies on the LPI being |
419 | * mapped before. | |
420 | */ | |
421 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
422 | { | |
44de9d68 | 423 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); |
33d3bc95 AP |
424 | struct vgic_irq *irq; |
425 | int last_byte_offset = -1; | |
426 | int ret = 0; | |
427 | u32 *intids; | |
428 | int nr_irqs, i; | |
006df0f3 | 429 | unsigned long flags; |
64afe6e9 | 430 | u8 pendmask; |
33d3bc95 | 431 | |
ccb1d791 | 432 | nr_irqs = vgic_copy_lpi_list(vcpu, &intids); |
33d3bc95 AP |
433 | if (nr_irqs < 0) |
434 | return nr_irqs; | |
435 | ||
436 | for (i = 0; i < nr_irqs; i++) { | |
437 | int byte_offset, bit_nr; | |
33d3bc95 AP |
438 | |
439 | byte_offset = intids[i] / BITS_PER_BYTE; | |
440 | bit_nr = intids[i] % BITS_PER_BYTE; | |
441 | ||
442 | /* | |
443 | * For contiguously allocated LPIs chances are we just read | |
444 | * this very same byte in the last iteration. Reuse that. | |
445 | */ | |
446 | if (byte_offset != last_byte_offset) { | |
b9c628f6 AP |
447 | ret = kvm_read_guest_lock(vcpu->kvm, |
448 | pendbase + byte_offset, | |
449 | &pendmask, 1); | |
33d3bc95 AP |
450 | if (ret) { |
451 | kfree(intids); | |
452 | return ret; | |
453 | } | |
454 | last_byte_offset = byte_offset; | |
455 | } | |
456 | ||
457 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); | |
006df0f3 | 458 | spin_lock_irqsave(&irq->irq_lock, flags); |
8694e4da | 459 | irq->pending_latch = pendmask & (1U << bit_nr); |
006df0f3 | 460 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
33d3bc95 AP |
461 | vgic_put_irq(vcpu->kvm, irq); |
462 | } | |
463 | ||
464 | kfree(intids); | |
465 | ||
466 | return ret; | |
467 | } | |
424c3383 | 468 | |
424c3383 AP |
469 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, |
470 | struct vgic_its *its, | |
471 | gpa_t addr, unsigned int len) | |
472 | { | |
71afe470 | 473 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
424c3383 AP |
474 | u64 reg = GITS_TYPER_PLPIS; |
475 | ||
476 | /* | |
477 | * We use linear CPU numbers for redistributor addressing, | |
478 | * so GITS_TYPER.PTA is 0. | |
479 | * Also we force all PROPBASER registers to be the same, so | |
480 | * CommonLPIAff is 0 as well. | |
481 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
482 | * DevBits low - as least for the time being. | |
483 | */ | |
07a3e9a7 | 484 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; |
0d44cdb6 | 485 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; |
71afe470 | 486 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; |
424c3383 AP |
487 | |
488 | return extract_bytes(reg, addr & 7, len); | |
489 | } | |
490 | ||
491 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
492 | struct vgic_its *its, | |
493 | gpa_t addr, unsigned int len) | |
494 | { | |
ab01c6bd EA |
495 | u32 val; |
496 | ||
497 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
498 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
499 | return val; | |
500 | } | |
501 | ||
502 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
503 | struct vgic_its *its, | |
504 | gpa_t addr, unsigned int len, | |
505 | unsigned long val) | |
506 | { | |
507 | u32 rev = GITS_IIDR_REV(val); | |
508 | ||
509 | if (rev >= NR_ITS_ABIS) | |
510 | return -EINVAL; | |
511 | return vgic_its_set_abi(its, rev); | |
424c3383 AP |
512 | } |
513 | ||
514 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
515 | struct vgic_its *its, | |
516 | gpa_t addr, unsigned int len) | |
517 | { | |
518 | switch (addr & 0xffff) { | |
519 | case GITS_PIDR0: | |
520 | return 0x92; /* part number, bits[7:0] */ | |
521 | case GITS_PIDR1: | |
522 | return 0xb4; /* part number, bits[11:8] */ | |
523 | case GITS_PIDR2: | |
524 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
525 | case GITS_PIDR4: | |
526 | return 0x40; /* This is a 64K software visible page */ | |
527 | /* The following are the ID registers for (any) GIC. */ | |
528 | case GITS_CIDR0: | |
529 | return 0x0d; | |
530 | case GITS_CIDR1: | |
531 | return 0xf0; | |
532 | case GITS_CIDR2: | |
533 | return 0x05; | |
534 | case GITS_CIDR3: | |
535 | return 0xb1; | |
536 | } | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
bebfd2a2 MZ |
541 | int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its, |
542 | u32 devid, u32 eventid, struct vgic_irq **irq) | |
2891a7df | 543 | { |
fd837b08 | 544 | struct kvm_vcpu *vcpu; |
9ce91c72 | 545 | struct its_ite *ite; |
2891a7df AP |
546 | |
547 | if (!its->enabled) | |
fd837b08 | 548 | return -EBUSY; |
2891a7df | 549 | |
9ce91c72 EA |
550 | ite = find_ite(its, devid, eventid); |
551 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
fd837b08 AP |
552 | return E_ITS_INT_UNMAPPED_INTERRUPT; |
553 | ||
9ce91c72 | 554 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
fd837b08 AP |
555 | if (!vcpu) |
556 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
557 | ||
558 | if (!vcpu->arch.vgic_cpu.lpis_enabled) | |
559 | return -EBUSY; | |
560 | ||
bebfd2a2 | 561 | *irq = ite->irq; |
fd837b08 | 562 | return 0; |
2891a7df AP |
563 | } |
564 | ||
bebfd2a2 | 565 | struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi) |
505a19ee | 566 | { |
bebfd2a2 MZ |
567 | u64 address; |
568 | struct kvm_io_device *kvm_io_dev; | |
505a19ee AP |
569 | struct vgic_io_device *iodev; |
570 | ||
bebfd2a2 MZ |
571 | if (!vgic_has_its(kvm)) |
572 | return ERR_PTR(-ENODEV); | |
573 | ||
574 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
575 | return ERR_PTR(-EINVAL); | |
505a19ee | 576 | |
bebfd2a2 MZ |
577 | address = (u64)msi->address_hi << 32 | msi->address_lo; |
578 | ||
579 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address); | |
580 | if (!kvm_io_dev) | |
581 | return ERR_PTR(-EINVAL); | |
505a19ee | 582 | |
bebfd2a2 MZ |
583 | if (kvm_io_dev->ops != &kvm_io_gic_ops) |
584 | return ERR_PTR(-EINVAL); | |
505a19ee | 585 | |
bebfd2a2 | 586 | iodev = container_of(kvm_io_dev, struct vgic_io_device, dev); |
505a19ee | 587 | if (iodev->iodev_type != IODEV_ITS) |
bebfd2a2 | 588 | return ERR_PTR(-EINVAL); |
505a19ee | 589 | |
bebfd2a2 MZ |
590 | return iodev->its; |
591 | } | |
592 | ||
593 | /* | |
594 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
595 | * and make this IRQ pending, possibly injecting it. | |
596 | * Must be called with the its_lock mutex held. | |
597 | * Returns 0 on success, a positive error value for any ITS mapping | |
598 | * related errors and negative error values for generic errors. | |
599 | */ | |
600 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
601 | u32 devid, u32 eventid) | |
602 | { | |
603 | struct vgic_irq *irq = NULL; | |
604 | unsigned long flags; | |
605 | int err; | |
505a19ee | 606 | |
bebfd2a2 MZ |
607 | err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq); |
608 | if (err) | |
609 | return err; | |
610 | ||
1b7fe468 MZ |
611 | if (irq->hw) |
612 | return irq_set_irqchip_state(irq->host_irq, | |
613 | IRQCHIP_STATE_PENDING, true); | |
614 | ||
bebfd2a2 MZ |
615 | spin_lock_irqsave(&irq->irq_lock, flags); |
616 | irq->pending_latch = true; | |
617 | vgic_queue_irq_unlock(kvm, irq, flags); | |
618 | ||
619 | return 0; | |
505a19ee AP |
620 | } |
621 | ||
2891a7df AP |
622 | /* |
623 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
624 | * doorbell address. | |
625 | * We then call vgic_its_trigger_msi() with the decoded data. | |
fd837b08 | 626 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. |
2891a7df AP |
627 | */ |
628 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
629 | { | |
bebfd2a2 | 630 | struct vgic_its *its; |
fd837b08 | 631 | int ret; |
2891a7df | 632 | |
bebfd2a2 MZ |
633 | its = vgic_msi_to_its(kvm, msi); |
634 | if (IS_ERR(its)) | |
635 | return PTR_ERR(its); | |
2891a7df | 636 | |
bebfd2a2 MZ |
637 | mutex_lock(&its->its_lock); |
638 | ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data); | |
639 | mutex_unlock(&its->its_lock); | |
2891a7df | 640 | |
fd837b08 AP |
641 | if (ret < 0) |
642 | return ret; | |
643 | ||
644 | /* | |
645 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
646 | * if the guest has blocked the MSI. So we map any LPI mapping | |
647 | * related error to that. | |
648 | */ | |
649 | if (ret) | |
650 | return 0; | |
651 | else | |
652 | return 1; | |
2891a7df AP |
653 | } |
654 | ||
424c3383 | 655 | /* Requires the its_lock to be held. */ |
9ce91c72 | 656 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) |
424c3383 | 657 | { |
9ce91c72 | 658 | list_del(&ite->ite_list); |
3802411d AP |
659 | |
660 | /* This put matches the get in vgic_add_lpi. */ | |
07b46ed1 MZ |
661 | if (ite->irq) { |
662 | if (ite->irq->hw) | |
663 | WARN_ON(its_unmap_vlpi(ite->irq->host_irq)); | |
664 | ||
9ce91c72 | 665 | vgic_put_irq(kvm, ite->irq); |
07b46ed1 | 666 | } |
3802411d | 667 | |
9ce91c72 | 668 | kfree(ite); |
424c3383 AP |
669 | } |
670 | ||
df9f58fb AP |
671 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) |
672 | { | |
673 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
674 | } | |
675 | ||
676 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
677 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
0d44cdb6 | 678 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) |
df9f58fb AP |
679 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) |
680 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
681 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
7333cefe | 682 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) |
df9f58fb AP |
683 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) |
684 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
685 | ||
686 | /* | |
687 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
688 | * Must be called with the its_lock mutex held. | |
689 | */ | |
690 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
691 | u64 *its_cmd) | |
692 | { | |
693 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
694 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 695 | struct its_ite *ite; |
df9f58fb AP |
696 | |
697 | ||
9ce91c72 EA |
698 | ite = find_ite(its, device_id, event_id); |
699 | if (ite && ite->collection) { | |
df9f58fb AP |
700 | /* |
701 | * Though the spec talks about removing the pending state, we | |
702 | * don't bother here since we clear the ITTE anyway and the | |
703 | * pending state is a property of the ITTE struct. | |
704 | */ | |
9ce91c72 | 705 | its_free_ite(kvm, ite); |
df9f58fb AP |
706 | return 0; |
707 | } | |
708 | ||
709 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
710 | } | |
711 | ||
712 | /* | |
713 | * The MOVI command moves an ITTE to a different collection. | |
714 | * Must be called with the its_lock mutex held. | |
715 | */ | |
716 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
717 | u64 *its_cmd) | |
718 | { | |
719 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
720 | u32 event_id = its_cmd_get_id(its_cmd); | |
721 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
722 | struct kvm_vcpu *vcpu; | |
9ce91c72 | 723 | struct its_ite *ite; |
df9f58fb AP |
724 | struct its_collection *collection; |
725 | ||
9ce91c72 EA |
726 | ite = find_ite(its, device_id, event_id); |
727 | if (!ite) | |
df9f58fb AP |
728 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; |
729 | ||
9ce91c72 | 730 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
731 | return E_ITS_MOVI_UNMAPPED_COLLECTION; |
732 | ||
733 | collection = find_collection(its, coll_id); | |
734 | if (!its_is_collection_mapped(collection)) | |
735 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
736 | ||
9ce91c72 | 737 | ite->collection = collection; |
df9f58fb AP |
738 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); |
739 | ||
08c9fd04 | 740 | return update_affinity(ite->irq, vcpu); |
df9f58fb AP |
741 | } |
742 | ||
6d03a68f MZ |
743 | /* |
744 | * Check whether an ID can be stored into the corresponding guest table. | |
745 | * For a direct table this is pretty easy, but gets a bit nasty for | |
746 | * indirect tables. We check whether the resulting guest physical address | |
07a3e9a7 | 747 | * is actually valid (covered by a memslot and guest accessible). |
6d03a68f MZ |
748 | * For this we have to read the respective first level entry. |
749 | */ | |
dceff702 EA |
750 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, |
751 | gpa_t *eaddr) | |
6d03a68f MZ |
752 | { |
753 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
07a3e9a7 EA |
754 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); |
755 | int esz = GITS_BASER_ENTRY_SIZE(baser); | |
0ba0a025 | 756 | int index, idx; |
6d03a68f | 757 | gfn_t gfn; |
0ba0a025 | 758 | bool ret; |
07a3e9a7 EA |
759 | |
760 | switch (type) { | |
761 | case GITS_BASER_TYPE_DEVICE: | |
762 | if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) | |
763 | return false; | |
764 | break; | |
765 | case GITS_BASER_TYPE_COLLECTION: | |
766 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
767 | if (id >= BIT_ULL(16)) | |
768 | return false; | |
769 | break; | |
770 | default: | |
771 | return false; | |
772 | } | |
6d03a68f MZ |
773 | |
774 | if (!(baser & GITS_BASER_INDIRECT)) { | |
775 | phys_addr_t addr; | |
776 | ||
e29bd6f2 | 777 | if (id >= (l1_tbl_size / esz)) |
6d03a68f MZ |
778 | return false; |
779 | ||
e29bd6f2 | 780 | addr = BASER_ADDRESS(baser) + id * esz; |
6d03a68f MZ |
781 | gfn = addr >> PAGE_SHIFT; |
782 | ||
dceff702 EA |
783 | if (eaddr) |
784 | *eaddr = addr; | |
0ba0a025 MZ |
785 | |
786 | goto out; | |
6d03a68f MZ |
787 | } |
788 | ||
789 | /* calculate and check the index into the 1st level */ | |
e29bd6f2 | 790 | index = id / (SZ_64K / esz); |
6d03a68f MZ |
791 | if (index >= (l1_tbl_size / sizeof(u64))) |
792 | return false; | |
793 | ||
794 | /* Each 1st level entry is represented by a 64-bit value. */ | |
b9c628f6 | 795 | if (kvm_read_guest_lock(its->dev->kvm, |
6d03a68f MZ |
796 | BASER_ADDRESS(baser) + index * sizeof(indirect_ptr), |
797 | &indirect_ptr, sizeof(indirect_ptr))) | |
798 | return false; | |
799 | ||
800 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
801 | ||
802 | /* check the valid bit of the first level entry */ | |
803 | if (!(indirect_ptr & BIT_ULL(63))) | |
804 | return false; | |
805 | ||
806 | /* | |
807 | * Mask the guest physical address and calculate the frame number. | |
808 | * Any address beyond our supported 48 bits of PA will be caught | |
809 | * by the actual check in the final step. | |
810 | */ | |
811 | indirect_ptr &= GENMASK_ULL(51, 16); | |
812 | ||
813 | /* Find the address of the actual entry */ | |
e29bd6f2 VM |
814 | index = id % (SZ_64K / esz); |
815 | indirect_ptr += index * esz; | |
6d03a68f MZ |
816 | gfn = indirect_ptr >> PAGE_SHIFT; |
817 | ||
dceff702 EA |
818 | if (eaddr) |
819 | *eaddr = indirect_ptr; | |
0ba0a025 MZ |
820 | |
821 | out: | |
822 | idx = srcu_read_lock(&its->dev->kvm->srcu); | |
823 | ret = kvm_is_visible_gfn(its->dev->kvm, gfn); | |
824 | srcu_read_unlock(&its->dev->kvm->srcu, idx); | |
825 | return ret; | |
6d03a68f MZ |
826 | } |
827 | ||
17a21f58 MZ |
828 | static int vgic_its_alloc_collection(struct vgic_its *its, |
829 | struct its_collection **colp, | |
df9f58fb AP |
830 | u32 coll_id) |
831 | { | |
17a21f58 MZ |
832 | struct its_collection *collection; |
833 | ||
dceff702 | 834 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) |
6d03a68f MZ |
835 | return E_ITS_MAPC_COLLECTION_OOR; |
836 | ||
17a21f58 | 837 | collection = kzalloc(sizeof(*collection), GFP_KERNEL); |
686f294f MZ |
838 | if (!collection) |
839 | return -ENOMEM; | |
17a21f58 | 840 | |
df9f58fb AP |
841 | collection->collection_id = coll_id; |
842 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
843 | ||
844 | list_add_tail(&collection->coll_list, &its->collection_list); | |
17a21f58 MZ |
845 | *colp = collection; |
846 | ||
847 | return 0; | |
848 | } | |
849 | ||
850 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
851 | { | |
852 | struct its_collection *collection; | |
853 | struct its_device *device; | |
9ce91c72 | 854 | struct its_ite *ite; |
17a21f58 MZ |
855 | |
856 | /* | |
857 | * Clearing the mapping for that collection ID removes the | |
858 | * entry from the list. If there wasn't any before, we can | |
859 | * go home early. | |
860 | */ | |
861 | collection = find_collection(its, coll_id); | |
862 | if (!collection) | |
863 | return; | |
864 | ||
9ce91c72 EA |
865 | for_each_lpi_its(device, ite, its) |
866 | if (ite->collection && | |
867 | ite->collection->collection_id == coll_id) | |
868 | ite->collection = NULL; | |
17a21f58 MZ |
869 | |
870 | list_del(&collection->coll_list); | |
871 | kfree(collection); | |
df9f58fb AP |
872 | } |
873 | ||
528297f5 EA |
874 | /* Must be called with its_lock mutex held */ |
875 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
876 | struct its_collection *collection, | |
7c7d2fa1 | 877 | u32 event_id) |
528297f5 EA |
878 | { |
879 | struct its_ite *ite; | |
880 | ||
881 | ite = kzalloc(sizeof(*ite), GFP_KERNEL); | |
882 | if (!ite) | |
883 | return ERR_PTR(-ENOMEM); | |
884 | ||
885 | ite->event_id = event_id; | |
886 | ite->collection = collection; | |
528297f5 EA |
887 | |
888 | list_add_tail(&ite->ite_list, &device->itt_head); | |
889 | return ite; | |
890 | } | |
891 | ||
df9f58fb AP |
892 | /* |
893 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
894 | * Must be called with its_lock mutex held. | |
895 | */ | |
896 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
a3e7aa27 | 897 | u64 *its_cmd) |
df9f58fb AP |
898 | { |
899 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
900 | u32 event_id = its_cmd_get_id(its_cmd); | |
901 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
9ce91c72 | 902 | struct its_ite *ite; |
06bd5359 | 903 | struct kvm_vcpu *vcpu = NULL; |
df9f58fb AP |
904 | struct its_device *device; |
905 | struct its_collection *collection, *new_coll = NULL; | |
99e5e886 | 906 | struct vgic_irq *irq; |
528297f5 | 907 | int lpi_nr; |
df9f58fb AP |
908 | |
909 | device = find_its_device(its, device_id); | |
910 | if (!device) | |
911 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
912 | ||
0d44cdb6 EA |
913 | if (event_id >= BIT_ULL(device->num_eventid_bits)) |
914 | return E_ITS_MAPTI_ID_OOR; | |
915 | ||
a3e7aa27 | 916 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) |
df9f58fb AP |
917 | lpi_nr = its_cmd_get_physical_id(its_cmd); |
918 | else | |
919 | lpi_nr = event_id; | |
920 | if (lpi_nr < GIC_LPI_OFFSET || | |
3a88bded MZ |
921 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) |
922 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
923 | ||
286054a7 | 924 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ |
9ce91c72 | 925 | if (find_ite(its, device_id, event_id)) |
286054a7 AP |
926 | return 0; |
927 | ||
3a88bded MZ |
928 | collection = find_collection(its, coll_id); |
929 | if (!collection) { | |
930 | int ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
931 | if (ret) | |
932 | return ret; | |
933 | new_coll = collection; | |
df9f58fb AP |
934 | } |
935 | ||
7c7d2fa1 | 936 | ite = vgic_its_alloc_ite(device, collection, event_id); |
528297f5 | 937 | if (IS_ERR(ite)) { |
286054a7 AP |
938 | if (new_coll) |
939 | vgic_its_free_collection(its, coll_id); | |
528297f5 | 940 | return PTR_ERR(ite); |
df9f58fb AP |
941 | } |
942 | ||
06bd5359 EA |
943 | if (its_is_collection_mapped(collection)) |
944 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
945 | ||
946 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
99e5e886 CD |
947 | if (IS_ERR(irq)) { |
948 | if (new_coll) | |
949 | vgic_its_free_collection(its, coll_id); | |
9ce91c72 | 950 | its_free_ite(kvm, ite); |
99e5e886 CD |
951 | return PTR_ERR(irq); |
952 | } | |
9ce91c72 | 953 | ite->irq = irq; |
99e5e886 | 954 | |
df9f58fb AP |
955 | return 0; |
956 | } | |
957 | ||
958 | /* Requires the its_lock to be held. */ | |
0a0d389e | 959 | static void vgic_its_free_device(struct kvm *kvm, struct its_device *device) |
df9f58fb | 960 | { |
9ce91c72 | 961 | struct its_ite *ite, *temp; |
df9f58fb AP |
962 | |
963 | /* | |
964 | * The spec says that unmapping a device with still valid | |
965 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
966 | * since we cannot leave the memory unreferenced. | |
967 | */ | |
9ce91c72 EA |
968 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) |
969 | its_free_ite(kvm, ite); | |
df9f58fb AP |
970 | |
971 | list_del(&device->dev_list); | |
972 | kfree(device); | |
973 | } | |
974 | ||
2f609a03 | 975 | /* its lock must be held */ |
976 | static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its) | |
977 | { | |
978 | struct its_device *cur, *temp; | |
979 | ||
980 | list_for_each_entry_safe(cur, temp, &its->device_list, dev_list) | |
981 | vgic_its_free_device(kvm, cur); | |
982 | } | |
983 | ||
984 | /* its lock must be held */ | |
985 | static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its) | |
986 | { | |
987 | struct its_collection *cur, *temp; | |
988 | ||
989 | list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list) | |
990 | vgic_its_free_collection(its, cur->collection_id); | |
991 | } | |
992 | ||
528297f5 EA |
993 | /* Must be called with its_lock mutex held */ |
994 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
995 | u32 device_id, gpa_t itt_addr, | |
996 | u8 num_eventid_bits) | |
997 | { | |
998 | struct its_device *device; | |
999 | ||
1000 | device = kzalloc(sizeof(*device), GFP_KERNEL); | |
1001 | if (!device) | |
1002 | return ERR_PTR(-ENOMEM); | |
1003 | ||
1004 | device->device_id = device_id; | |
1005 | device->itt_addr = itt_addr; | |
1006 | device->num_eventid_bits = num_eventid_bits; | |
1007 | INIT_LIST_HEAD(&device->itt_head); | |
1008 | ||
1009 | list_add_tail(&device->dev_list, &its->device_list); | |
1010 | return device; | |
1011 | } | |
1012 | ||
df9f58fb AP |
1013 | /* |
1014 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
1015 | * Must be called with the its_lock mutex held. | |
1016 | */ | |
1017 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
1018 | u64 *its_cmd) | |
1019 | { | |
1020 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1021 | bool valid = its_cmd_get_validbit(its_cmd); | |
0d44cdb6 | 1022 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
7333cefe | 1023 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
df9f58fb AP |
1024 | struct its_device *device; |
1025 | ||
dceff702 | 1026 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) |
df9f58fb AP |
1027 | return E_ITS_MAPD_DEVICE_OOR; |
1028 | ||
0d44cdb6 EA |
1029 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) |
1030 | return E_ITS_MAPD_ITTSIZE_OOR; | |
1031 | ||
df9f58fb AP |
1032 | device = find_its_device(its, device_id); |
1033 | ||
1034 | /* | |
1035 | * The spec says that calling MAPD on an already mapped device | |
1036 | * invalidates all cached data for this device. We implement this | |
1037 | * by removing the mapping and re-establishing it. | |
1038 | */ | |
1039 | if (device) | |
0a0d389e | 1040 | vgic_its_free_device(kvm, device); |
df9f58fb AP |
1041 | |
1042 | /* | |
1043 | * The spec does not say whether unmapping a not-mapped device | |
1044 | * is an error, so we are done in any case. | |
1045 | */ | |
1046 | if (!valid) | |
1047 | return 0; | |
1048 | ||
528297f5 EA |
1049 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
1050 | num_eventid_bits); | |
1051 | if (IS_ERR(device)) | |
1052 | return PTR_ERR(device); | |
df9f58fb AP |
1053 | |
1054 | return 0; | |
1055 | } | |
1056 | ||
df9f58fb AP |
1057 | /* |
1058 | * The MAPC command maps collection IDs to redistributors. | |
1059 | * Must be called with the its_lock mutex held. | |
1060 | */ | |
1061 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
1062 | u64 *its_cmd) | |
1063 | { | |
1064 | u16 coll_id; | |
1065 | u32 target_addr; | |
1066 | struct its_collection *collection; | |
1067 | bool valid; | |
1068 | ||
1069 | valid = its_cmd_get_validbit(its_cmd); | |
1070 | coll_id = its_cmd_get_collection(its_cmd); | |
1071 | target_addr = its_cmd_get_target_addr(its_cmd); | |
1072 | ||
1073 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
1074 | return E_ITS_MAPC_PROCNUM_OOR; | |
1075 | ||
df9f58fb | 1076 | if (!valid) { |
17a21f58 | 1077 | vgic_its_free_collection(its, coll_id); |
df9f58fb | 1078 | } else { |
17a21f58 MZ |
1079 | collection = find_collection(its, coll_id); |
1080 | ||
df9f58fb | 1081 | if (!collection) { |
17a21f58 | 1082 | int ret; |
df9f58fb | 1083 | |
17a21f58 MZ |
1084 | ret = vgic_its_alloc_collection(its, &collection, |
1085 | coll_id); | |
1086 | if (ret) | |
1087 | return ret; | |
df9f58fb AP |
1088 | collection->target_addr = target_addr; |
1089 | } else { | |
1090 | collection->target_addr = target_addr; | |
1091 | update_affinity_collection(kvm, its, collection); | |
1092 | } | |
1093 | } | |
1094 | ||
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | /* | |
1099 | * The CLEAR command removes the pending state for a particular LPI. | |
1100 | * Must be called with the its_lock mutex held. | |
1101 | */ | |
1102 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1103 | u64 *its_cmd) | |
1104 | { | |
1105 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1106 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1107 | struct its_ite *ite; |
df9f58fb AP |
1108 | |
1109 | ||
9ce91c72 EA |
1110 | ite = find_ite(its, device_id, event_id); |
1111 | if (!ite) | |
df9f58fb AP |
1112 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; |
1113 | ||
9ce91c72 | 1114 | ite->irq->pending_latch = false; |
df9f58fb | 1115 | |
fb0cada6 MZ |
1116 | if (ite->irq->hw) |
1117 | return irq_set_irqchip_state(ite->irq->host_irq, | |
1118 | IRQCHIP_STATE_PENDING, false); | |
1119 | ||
df9f58fb AP |
1120 | return 0; |
1121 | } | |
1122 | ||
1123 | /* | |
1124 | * The INV command syncs the configuration bits from the memory table. | |
1125 | * Must be called with the its_lock mutex held. | |
1126 | */ | |
1127 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1128 | u64 *its_cmd) | |
1129 | { | |
1130 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1131 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1132 | struct its_ite *ite; |
df9f58fb AP |
1133 | |
1134 | ||
9ce91c72 EA |
1135 | ite = find_ite(its, device_id, event_id); |
1136 | if (!ite) | |
df9f58fb AP |
1137 | return E_ITS_INV_UNMAPPED_INTERRUPT; |
1138 | ||
6ce18e3a | 1139 | return update_lpi_config(kvm, ite->irq, NULL, true); |
df9f58fb AP |
1140 | } |
1141 | ||
1142 | /* | |
1143 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1144 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1145 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1146 | * the specified vcpu. The configuration will be read from the in-memory | |
1147 | * configuration table. | |
1148 | * Must be called with the its_lock mutex held. | |
1149 | */ | |
1150 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1151 | u64 *its_cmd) | |
1152 | { | |
1153 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1154 | struct its_collection *collection; | |
1155 | struct kvm_vcpu *vcpu; | |
1156 | struct vgic_irq *irq; | |
1157 | u32 *intids; | |
1158 | int irq_count, i; | |
1159 | ||
1160 | collection = find_collection(its, coll_id); | |
1161 | if (!its_is_collection_mapped(collection)) | |
1162 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1163 | ||
1164 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1165 | ||
ccb1d791 | 1166 | irq_count = vgic_copy_lpi_list(vcpu, &intids); |
df9f58fb AP |
1167 | if (irq_count < 0) |
1168 | return irq_count; | |
1169 | ||
1170 | for (i = 0; i < irq_count; i++) { | |
1171 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
1172 | if (!irq) | |
1173 | continue; | |
6ce18e3a | 1174 | update_lpi_config(kvm, irq, vcpu, false); |
df9f58fb AP |
1175 | vgic_put_irq(kvm, irq); |
1176 | } | |
1177 | ||
1178 | kfree(intids); | |
1179 | ||
6ce18e3a MZ |
1180 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm) |
1181 | its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe); | |
1182 | ||
df9f58fb AP |
1183 | return 0; |
1184 | } | |
1185 | ||
1186 | /* | |
1187 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1188 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1189 | * but in the IRQs instead, so there is really not much to do for us here. | |
1190 | * However the spec says that no IRQ must target the old redistributor | |
1191 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1192 | * This command affects all LPIs in the system that target that redistributor. | |
1193 | */ | |
1194 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1195 | u64 *its_cmd) | |
1196 | { | |
df9f58fb AP |
1197 | u32 target1_addr = its_cmd_get_target_addr(its_cmd); |
1198 | u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32); | |
1199 | struct kvm_vcpu *vcpu1, *vcpu2; | |
1200 | struct vgic_irq *irq; | |
ff9c1143 MZ |
1201 | u32 *intids; |
1202 | int irq_count, i; | |
df9f58fb AP |
1203 | |
1204 | if (target1_addr >= atomic_read(&kvm->online_vcpus) || | |
1205 | target2_addr >= atomic_read(&kvm->online_vcpus)) | |
1206 | return E_ITS_MOVALL_PROCNUM_OOR; | |
1207 | ||
1208 | if (target1_addr == target2_addr) | |
1209 | return 0; | |
1210 | ||
1211 | vcpu1 = kvm_get_vcpu(kvm, target1_addr); | |
1212 | vcpu2 = kvm_get_vcpu(kvm, target2_addr); | |
1213 | ||
ff9c1143 MZ |
1214 | irq_count = vgic_copy_lpi_list(vcpu1, &intids); |
1215 | if (irq_count < 0) | |
1216 | return irq_count; | |
df9f58fb | 1217 | |
ff9c1143 MZ |
1218 | for (i = 0; i < irq_count; i++) { |
1219 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
df9f58fb | 1220 | |
ff9c1143 | 1221 | update_affinity(irq, vcpu2); |
df9f58fb | 1222 | |
ff9c1143 | 1223 | vgic_put_irq(kvm, irq); |
df9f58fb AP |
1224 | } |
1225 | ||
ff9c1143 | 1226 | kfree(intids); |
df9f58fb AP |
1227 | return 0; |
1228 | } | |
1229 | ||
2891a7df AP |
1230 | /* |
1231 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1232 | * Must be called with the its_lock mutex held. | |
1233 | */ | |
1234 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1235 | u64 *its_cmd) | |
1236 | { | |
1237 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1238 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1239 | ||
fd837b08 | 1240 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); |
2891a7df AP |
1241 | } |
1242 | ||
df9f58fb AP |
1243 | /* |
1244 | * This function is called with the its_cmd lock held, but the ITS data | |
1245 | * structure lock dropped. | |
1246 | */ | |
424c3383 AP |
1247 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, |
1248 | u64 *its_cmd) | |
1249 | { | |
df9f58fb AP |
1250 | int ret = -ENODEV; |
1251 | ||
1252 | mutex_lock(&its->its_lock); | |
a3e7aa27 | 1253 | switch (its_cmd_get_command(its_cmd)) { |
df9f58fb AP |
1254 | case GITS_CMD_MAPD: |
1255 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1256 | break; | |
1257 | case GITS_CMD_MAPC: | |
1258 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1259 | break; | |
1260 | case GITS_CMD_MAPI: | |
a3e7aa27 | 1261 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1262 | break; |
1263 | case GITS_CMD_MAPTI: | |
a3e7aa27 | 1264 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1265 | break; |
1266 | case GITS_CMD_MOVI: | |
1267 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1268 | break; | |
1269 | case GITS_CMD_DISCARD: | |
1270 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1271 | break; | |
1272 | case GITS_CMD_CLEAR: | |
1273 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1274 | break; | |
1275 | case GITS_CMD_MOVALL: | |
1276 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1277 | break; | |
2891a7df AP |
1278 | case GITS_CMD_INT: |
1279 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1280 | break; | |
df9f58fb AP |
1281 | case GITS_CMD_INV: |
1282 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1283 | break; | |
1284 | case GITS_CMD_INVALL: | |
1285 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1286 | break; | |
1287 | case GITS_CMD_SYNC: | |
1288 | /* we ignore this command: we are in sync all of the time */ | |
1289 | ret = 0; | |
1290 | break; | |
1291 | } | |
1292 | mutex_unlock(&its->its_lock); | |
1293 | ||
1294 | return ret; | |
424c3383 AP |
1295 | } |
1296 | ||
1297 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1298 | { | |
1299 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1300 | GITS_BASER_SHAREABILITY_SHIFT, | |
1301 | vgic_sanitise_shareability); | |
1302 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1303 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1304 | vgic_sanitise_inner_cacheability); | |
1305 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1306 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1307 | vgic_sanitise_outer_cacheability); | |
1308 | ||
1309 | /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */ | |
1310 | reg &= ~GENMASK_ULL(15, 12); | |
1311 | ||
1312 | /* We support only one (ITS) page size: 64K */ | |
1313 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1314 | ||
1315 | return reg; | |
1316 | } | |
1317 | ||
1318 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1319 | { | |
1320 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1321 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1322 | vgic_sanitise_shareability); | |
1323 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1324 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1325 | vgic_sanitise_inner_cacheability); | |
1326 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1327 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1328 | vgic_sanitise_outer_cacheability); | |
1329 | ||
1330 | /* | |
1331 | * Sanitise the physical address to be 64k aligned. | |
1332 | * Also limit the physical addresses to 48 bits. | |
1333 | */ | |
1334 | reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12)); | |
1335 | ||
1336 | return reg; | |
1337 | } | |
1338 | ||
1339 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1340 | struct vgic_its *its, | |
1341 | gpa_t addr, unsigned int len) | |
1342 | { | |
1343 | return extract_bytes(its->cbaser, addr & 7, len); | |
1344 | } | |
1345 | ||
1346 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1347 | gpa_t addr, unsigned int len, | |
1348 | unsigned long val) | |
1349 | { | |
1350 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1351 | if (its->enabled) | |
1352 | return; | |
1353 | ||
1354 | mutex_lock(&its->cmd_lock); | |
1355 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1356 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1357 | its->creadr = 0; | |
1358 | /* | |
1359 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1360 | * it to CREADR to make sure we start with an empty command buffer. | |
1361 | */ | |
1362 | its->cwriter = its->creadr; | |
1363 | mutex_unlock(&its->cmd_lock); | |
1364 | } | |
1365 | ||
1366 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1367 | #define ITS_CMD_SIZE 32 | |
1368 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1369 | ||
a5e1e6ca AP |
1370 | /* Must be called with the cmd_lock held. */ |
1371 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
424c3383 AP |
1372 | { |
1373 | gpa_t cbaser; | |
1374 | u64 cmd_buf[4]; | |
424c3383 | 1375 | |
a5e1e6ca AP |
1376 | /* Commands are only processed when the ITS is enabled. */ |
1377 | if (!its->enabled) | |
424c3383 | 1378 | return; |
424c3383 | 1379 | |
424c3383 AP |
1380 | cbaser = CBASER_ADDRESS(its->cbaser); |
1381 | ||
1382 | while (its->cwriter != its->creadr) { | |
b9c628f6 AP |
1383 | int ret = kvm_read_guest_lock(kvm, cbaser + its->creadr, |
1384 | cmd_buf, ITS_CMD_SIZE); | |
424c3383 AP |
1385 | /* |
1386 | * If kvm_read_guest() fails, this could be due to the guest | |
1387 | * programming a bogus value in CBASER or something else going | |
1388 | * wrong from which we cannot easily recover. | |
1389 | * According to section 6.3.2 in the GICv3 spec we can just | |
1390 | * ignore that command then. | |
1391 | */ | |
1392 | if (!ret) | |
1393 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1394 | ||
1395 | its->creadr += ITS_CMD_SIZE; | |
1396 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1397 | its->creadr = 0; | |
1398 | } | |
a5e1e6ca AP |
1399 | } |
1400 | ||
1401 | /* | |
1402 | * By writing to CWRITER the guest announces new commands to be processed. | |
1403 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1404 | * protects our ring buffer variables, so that there is only one user | |
1405 | * per ITS handling commands at a given time. | |
1406 | */ | |
1407 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1408 | gpa_t addr, unsigned int len, | |
1409 | unsigned long val) | |
1410 | { | |
1411 | u64 reg; | |
1412 | ||
1413 | if (!its) | |
1414 | return; | |
1415 | ||
1416 | mutex_lock(&its->cmd_lock); | |
1417 | ||
1418 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1419 | reg = ITS_CMD_OFFSET(reg); | |
1420 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1421 | mutex_unlock(&its->cmd_lock); | |
1422 | return; | |
1423 | } | |
1424 | its->cwriter = reg; | |
1425 | ||
1426 | vgic_its_process_commands(kvm, its); | |
424c3383 AP |
1427 | |
1428 | mutex_unlock(&its->cmd_lock); | |
1429 | } | |
1430 | ||
1431 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1432 | struct vgic_its *its, | |
1433 | gpa_t addr, unsigned int len) | |
1434 | { | |
1435 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1436 | } | |
1437 | ||
1438 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1439 | struct vgic_its *its, | |
1440 | gpa_t addr, unsigned int len) | |
1441 | { | |
1442 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1443 | } | |
1444 | ||
0979bfa6 EA |
1445 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, |
1446 | struct vgic_its *its, | |
1447 | gpa_t addr, unsigned int len, | |
1448 | unsigned long val) | |
1449 | { | |
1450 | u32 cmd_offset; | |
1451 | int ret = 0; | |
1452 | ||
1453 | mutex_lock(&its->cmd_lock); | |
1454 | ||
1455 | if (its->enabled) { | |
1456 | ret = -EBUSY; | |
1457 | goto out; | |
1458 | } | |
1459 | ||
1460 | cmd_offset = ITS_CMD_OFFSET(val); | |
1461 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1462 | ret = -EINVAL; | |
1463 | goto out; | |
1464 | } | |
1465 | ||
1466 | its->creadr = cmd_offset; | |
1467 | out: | |
1468 | mutex_unlock(&its->cmd_lock); | |
1469 | return ret; | |
1470 | } | |
1471 | ||
424c3383 AP |
1472 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) |
1473 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1474 | struct vgic_its *its, | |
1475 | gpa_t addr, unsigned int len) | |
1476 | { | |
1477 | u64 reg; | |
1478 | ||
1479 | switch (BASER_INDEX(addr)) { | |
1480 | case 0: | |
1481 | reg = its->baser_device_table; | |
1482 | break; | |
1483 | case 1: | |
1484 | reg = its->baser_coll_table; | |
1485 | break; | |
1486 | default: | |
1487 | reg = 0; | |
1488 | break; | |
1489 | } | |
1490 | ||
1491 | return extract_bytes(reg, addr & 7, len); | |
1492 | } | |
1493 | ||
1494 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1495 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1496 | struct vgic_its *its, | |
1497 | gpa_t addr, unsigned int len, | |
1498 | unsigned long val) | |
1499 | { | |
71afe470 | 1500 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
36d6961c | 1501 | u64 entry_size, table_type; |
424c3383 AP |
1502 | u64 reg, *regptr, clearbits = 0; |
1503 | ||
1504 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1505 | if (its->enabled) | |
1506 | return; | |
1507 | ||
1508 | switch (BASER_INDEX(addr)) { | |
1509 | case 0: | |
1510 | regptr = &its->baser_device_table; | |
71afe470 | 1511 | entry_size = abi->dte_esz; |
36d6961c | 1512 | table_type = GITS_BASER_TYPE_DEVICE; |
424c3383 AP |
1513 | break; |
1514 | case 1: | |
1515 | regptr = &its->baser_coll_table; | |
71afe470 | 1516 | entry_size = abi->cte_esz; |
36d6961c | 1517 | table_type = GITS_BASER_TYPE_COLLECTION; |
424c3383 AP |
1518 | clearbits = GITS_BASER_INDIRECT; |
1519 | break; | |
1520 | default: | |
1521 | return; | |
1522 | } | |
1523 | ||
1524 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1525 | reg &= ~GITS_BASER_RO_MASK; | |
1526 | reg &= ~clearbits; | |
1527 | ||
1528 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
36d6961c | 1529 | reg |= table_type << GITS_BASER_TYPE_SHIFT; |
424c3383 AP |
1530 | reg = vgic_sanitise_its_baser(reg); |
1531 | ||
1532 | *regptr = reg; | |
36d6961c EA |
1533 | |
1534 | if (!(reg & GITS_BASER_VALID)) { | |
1535 | /* Take the its_lock to prevent a race with a save/restore */ | |
1536 | mutex_lock(&its->its_lock); | |
1537 | switch (table_type) { | |
1538 | case GITS_BASER_TYPE_DEVICE: | |
1539 | vgic_its_free_device_list(kvm, its); | |
1540 | break; | |
1541 | case GITS_BASER_TYPE_COLLECTION: | |
1542 | vgic_its_free_collection_list(kvm, its); | |
1543 | break; | |
1544 | } | |
1545 | mutex_unlock(&its->its_lock); | |
1546 | } | |
424c3383 AP |
1547 | } |
1548 | ||
a5e1e6ca AP |
1549 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, |
1550 | struct vgic_its *its, | |
1551 | gpa_t addr, unsigned int len) | |
1552 | { | |
1553 | u32 reg = 0; | |
1554 | ||
1555 | mutex_lock(&its->cmd_lock); | |
1556 | if (its->creadr == its->cwriter) | |
1557 | reg |= GITS_CTLR_QUIESCENT; | |
1558 | if (its->enabled) | |
1559 | reg |= GITS_CTLR_ENABLE; | |
1560 | mutex_unlock(&its->cmd_lock); | |
1561 | ||
1562 | return reg; | |
1563 | } | |
1564 | ||
1565 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1566 | gpa_t addr, unsigned int len, | |
1567 | unsigned long val) | |
1568 | { | |
1569 | mutex_lock(&its->cmd_lock); | |
1570 | ||
c9b51bb6 EA |
1571 | /* |
1572 | * It is UNPREDICTABLE to enable the ITS if any of the CBASER or | |
1573 | * device/collection BASER are invalid | |
1574 | */ | |
1575 | if (!its->enabled && (val & GITS_CTLR_ENABLE) && | |
1576 | (!(its->baser_device_table & GITS_BASER_VALID) || | |
1577 | !(its->baser_coll_table & GITS_BASER_VALID) || | |
1578 | !(its->cbaser & GITS_CBASER_VALID))) | |
1579 | goto out; | |
1580 | ||
a5e1e6ca AP |
1581 | its->enabled = !!(val & GITS_CTLR_ENABLE); |
1582 | ||
1583 | /* | |
1584 | * Try to process any pending commands. This function bails out early | |
1585 | * if the ITS is disabled or no commands have been queued. | |
1586 | */ | |
1587 | vgic_its_process_commands(kvm, its); | |
1588 | ||
c9b51bb6 | 1589 | out: |
a5e1e6ca AP |
1590 | mutex_unlock(&its->cmd_lock); |
1591 | } | |
1592 | ||
59c5ab40 AP |
1593 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ |
1594 | { \ | |
1595 | .reg_offset = off, \ | |
1596 | .len = length, \ | |
1597 | .access_flags = acc, \ | |
1598 | .its_read = rd, \ | |
1599 | .its_write = wr, \ | |
1600 | } | |
1601 | ||
0979bfa6 EA |
1602 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ |
1603 | { \ | |
1604 | .reg_offset = off, \ | |
1605 | .len = length, \ | |
1606 | .access_flags = acc, \ | |
1607 | .its_read = rd, \ | |
1608 | .its_write = wr, \ | |
1609 | .uaccess_its_write = uwr, \ | |
1610 | } | |
1611 | ||
59c5ab40 AP |
1612 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, |
1613 | gpa_t addr, unsigned int len, unsigned long val) | |
1614 | { | |
1615 | /* Ignore */ | |
1616 | } | |
1617 | ||
1618 | static struct vgic_register_region its_registers[] = { | |
1619 | REGISTER_ITS_DESC(GITS_CTLR, | |
424c3383 | 1620 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, |
59c5ab40 | 1621 | VGIC_ACCESS_32bit), |
ab01c6bd EA |
1622 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, |
1623 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1624 | vgic_mmio_uaccess_write_its_iidr, 4, | |
59c5ab40 AP |
1625 | VGIC_ACCESS_32bit), |
1626 | REGISTER_ITS_DESC(GITS_TYPER, | |
424c3383 | 1627 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, |
59c5ab40 AP |
1628 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1629 | REGISTER_ITS_DESC(GITS_CBASER, | |
424c3383 | 1630 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, |
59c5ab40 AP |
1631 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1632 | REGISTER_ITS_DESC(GITS_CWRITER, | |
424c3383 | 1633 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, |
59c5ab40 | 1634 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
0979bfa6 EA |
1635 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, |
1636 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1637 | vgic_mmio_uaccess_write_its_creadr, 8, | |
59c5ab40 AP |
1638 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1639 | REGISTER_ITS_DESC(GITS_BASER, | |
424c3383 | 1640 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, |
59c5ab40 AP |
1641 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1642 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
424c3383 | 1643 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, |
59c5ab40 AP |
1644 | VGIC_ACCESS_32bit), |
1645 | }; | |
1646 | ||
33d3bc95 AP |
1647 | /* This is called on setting the LPI enable bit in the redistributor. */ |
1648 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1649 | { | |
1650 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1651 | its_sync_lpi_pending_table(vcpu); | |
1652 | } | |
1653 | ||
30e1b684 CD |
1654 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, |
1655 | u64 addr) | |
59c5ab40 AP |
1656 | { |
1657 | struct vgic_io_device *iodev = &its->iodev; | |
1658 | int ret; | |
1659 | ||
30e1b684 CD |
1660 | mutex_lock(&kvm->slots_lock); |
1661 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1662 | ret = -EBUSY; | |
1663 | goto out; | |
1664 | } | |
59c5ab40 | 1665 | |
30e1b684 | 1666 | its->vgic_its_base = addr; |
59c5ab40 AP |
1667 | iodev->regions = its_registers; |
1668 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1669 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1670 | ||
1671 | iodev->base_addr = its->vgic_its_base; | |
1672 | iodev->iodev_type = IODEV_ITS; | |
1673 | iodev->its = its; | |
59c5ab40 AP |
1674 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, |
1675 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
30e1b684 | 1676 | out: |
59c5ab40 AP |
1677 | mutex_unlock(&kvm->slots_lock); |
1678 | ||
1679 | return ret; | |
1680 | } | |
1085fdc6 | 1681 | |
424c3383 AP |
1682 | #define INITIAL_BASER_VALUE \ |
1683 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1684 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1685 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
424c3383 AP |
1686 | GITS_BASER_PAGE_SIZE_64K) |
1687 | ||
1688 | #define INITIAL_PROPBASER_VALUE \ | |
1689 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1690 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1691 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1692 | ||
1085fdc6 AP |
1693 | static int vgic_its_create(struct kvm_device *dev, u32 type) |
1694 | { | |
1695 | struct vgic_its *its; | |
1696 | ||
1697 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1698 | return -ENODEV; | |
1699 | ||
1700 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL); | |
1701 | if (!its) | |
1702 | return -ENOMEM; | |
1703 | ||
74fe55dc MZ |
1704 | if (vgic_initialized(dev->kvm)) { |
1705 | int ret = vgic_v4_init(dev->kvm); | |
3d1ad640 | 1706 | if (ret < 0) { |
74fe55dc MZ |
1707 | kfree(its); |
1708 | return ret; | |
1709 | } | |
1710 | } | |
1711 | ||
424c3383 AP |
1712 | mutex_init(&its->its_lock); |
1713 | mutex_init(&its->cmd_lock); | |
1714 | ||
1085fdc6 AP |
1715 | its->vgic_its_base = VGIC_ADDR_UNDEF; |
1716 | ||
424c3383 AP |
1717 | INIT_LIST_HEAD(&its->device_list); |
1718 | INIT_LIST_HEAD(&its->collection_list); | |
1719 | ||
79962a5c | 1720 | dev->kvm->arch.vgic.msis_require_devid = true; |
1085fdc6 | 1721 | dev->kvm->arch.vgic.has_its = true; |
1085fdc6 | 1722 | its->enabled = false; |
bb717644 | 1723 | its->dev = dev; |
1085fdc6 | 1724 | |
424c3383 AP |
1725 | its->baser_device_table = INITIAL_BASER_VALUE | |
1726 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
1727 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
1728 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
1729 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
1730 | ||
1085fdc6 AP |
1731 | dev->private = its; |
1732 | ||
71afe470 | 1733 | return vgic_its_set_abi(its, NR_ITS_ABIS - 1); |
1085fdc6 AP |
1734 | } |
1735 | ||
1736 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
1737 | { | |
424c3383 | 1738 | struct kvm *kvm = kvm_dev->kvm; |
1085fdc6 | 1739 | struct vgic_its *its = kvm_dev->private; |
424c3383 AP |
1740 | |
1741 | mutex_lock(&its->its_lock); | |
a2b19e6e | 1742 | |
2f609a03 | 1743 | vgic_its_free_device_list(kvm, its); |
1744 | vgic_its_free_collection_list(kvm, its); | |
424c3383 | 1745 | |
424c3383 | 1746 | mutex_unlock(&its->its_lock); |
1085fdc6 | 1747 | kfree(its); |
6180ff75 | 1748 | kfree(kvm_dev);/* alloc by kvm_ioctl_create_device, free by .destroy */ |
1085fdc6 AP |
1749 | } |
1750 | ||
876ae234 EA |
1751 | int vgic_its_has_attr_regs(struct kvm_device *dev, |
1752 | struct kvm_device_attr *attr) | |
1753 | { | |
8331c23c EA |
1754 | const struct vgic_register_region *region; |
1755 | gpa_t offset = attr->attr; | |
1756 | int align; | |
1757 | ||
1758 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
1759 | ||
1760 | if (offset & align) | |
1761 | return -EINVAL; | |
1762 | ||
1763 | region = vgic_find_mmio_region(its_registers, | |
1764 | ARRAY_SIZE(its_registers), | |
1765 | offset); | |
1766 | if (!region) | |
1767 | return -ENXIO; | |
1768 | ||
1769 | return 0; | |
876ae234 EA |
1770 | } |
1771 | ||
1772 | int vgic_its_attr_regs_access(struct kvm_device *dev, | |
1773 | struct kvm_device_attr *attr, | |
1774 | u64 *reg, bool is_write) | |
1775 | { | |
8331c23c EA |
1776 | const struct vgic_register_region *region; |
1777 | struct vgic_its *its; | |
1778 | gpa_t addr, offset; | |
1779 | unsigned int len; | |
1780 | int align, ret = 0; | |
1781 | ||
1782 | its = dev->private; | |
1783 | offset = attr->attr; | |
1784 | ||
1785 | /* | |
1786 | * Although the spec supports upper/lower 32-bit accesses to | |
1787 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
1788 | * accesses to all 64-bit wide registers. We therefore only | |
1789 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
1790 | * registers | |
1791 | */ | |
1792 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
1793 | align = 0x3; | |
1794 | else | |
1795 | align = 0x7; | |
1796 | ||
1797 | if (offset & align) | |
1798 | return -EINVAL; | |
1799 | ||
1800 | mutex_lock(&dev->kvm->lock); | |
1801 | ||
1802 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1803 | ret = -ENXIO; | |
1804 | goto out; | |
1805 | } | |
1806 | ||
1807 | region = vgic_find_mmio_region(its_registers, | |
1808 | ARRAY_SIZE(its_registers), | |
1809 | offset); | |
1810 | if (!region) { | |
1811 | ret = -ENXIO; | |
1812 | goto out; | |
1813 | } | |
1814 | ||
1815 | if (!lock_all_vcpus(dev->kvm)) { | |
1816 | ret = -EBUSY; | |
1817 | goto out; | |
1818 | } | |
1819 | ||
1820 | addr = its->vgic_its_base + offset; | |
1821 | ||
1822 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
1823 | ||
1824 | if (is_write) { | |
1825 | if (region->uaccess_its_write) | |
1826 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
1827 | len, *reg); | |
1828 | else | |
1829 | region->its_write(dev->kvm, its, addr, len, *reg); | |
1830 | } else { | |
1831 | *reg = region->its_read(dev->kvm, its, addr, len); | |
1832 | } | |
1833 | unlock_all_vcpus(dev->kvm); | |
1834 | out: | |
1835 | mutex_unlock(&dev->kvm->lock); | |
1836 | return ret; | |
876ae234 EA |
1837 | } |
1838 | ||
57a9a117 EA |
1839 | static u32 compute_next_devid_offset(struct list_head *h, |
1840 | struct its_device *dev) | |
920a7a8f EA |
1841 | { |
1842 | struct its_device *next; | |
1843 | u32 next_offset; | |
1844 | ||
1845 | if (list_is_last(&dev->dev_list, h)) | |
1846 | return 0; | |
1847 | next = list_next_entry(dev, dev_list); | |
1848 | next_offset = next->device_id - dev->device_id; | |
1849 | ||
1850 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
1851 | } | |
1852 | ||
eff484e0 | 1853 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) |
920a7a8f EA |
1854 | { |
1855 | struct its_ite *next; | |
1856 | u32 next_offset; | |
1857 | ||
1858 | if (list_is_last(&ite->ite_list, h)) | |
1859 | return 0; | |
1860 | next = list_next_entry(ite, ite_list); | |
1861 | next_offset = next->event_id - ite->event_id; | |
1862 | ||
1863 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
1864 | } | |
1865 | ||
1866 | /** | |
1867 | * entry_fn_t - Callback called on a table entry restore path | |
1868 | * @its: its handle | |
1869 | * @id: id of the entry | |
1870 | * @entry: pointer to the entry | |
1871 | * @opaque: pointer to an opaque data | |
1872 | * | |
1873 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
1874 | * element otherwise | |
1875 | */ | |
1876 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
1877 | void *opaque); | |
1878 | ||
1879 | /** | |
1880 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
1881 | * to each entry | |
1882 | * | |
1883 | * @its: its handle | |
1884 | * @base: base gpa of the table | |
1885 | * @size: size of the table in bytes | |
1886 | * @esz: entry size in bytes | |
1887 | * @start_id: the ID of the first entry in the table | |
1888 | * (non zero for 2d level tables) | |
1889 | * @fn: function to apply on each entry | |
1890 | * | |
1891 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
1892 | * (the last element may not be found on second level tables) | |
1893 | */ | |
57a9a117 EA |
1894 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz, |
1895 | int start_id, entry_fn_t fn, void *opaque) | |
920a7a8f | 1896 | { |
920a7a8f EA |
1897 | struct kvm *kvm = its->dev->kvm; |
1898 | unsigned long len = size; | |
1899 | int id = start_id; | |
1900 | gpa_t gpa = base; | |
8c1a8a32 | 1901 | char entry[esz]; |
920a7a8f EA |
1902 | int ret; |
1903 | ||
8c1a8a32 CD |
1904 | memset(entry, 0, esz); |
1905 | ||
920a7a8f EA |
1906 | while (len > 0) { |
1907 | int next_offset; | |
1908 | size_t byte_offset; | |
1909 | ||
bd065cd2 | 1910 | ret = kvm_read_guest_lock(kvm, gpa, entry, esz); |
920a7a8f | 1911 | if (ret) |
8c1a8a32 | 1912 | return ret; |
920a7a8f EA |
1913 | |
1914 | next_offset = fn(its, id, entry, opaque); | |
8c1a8a32 CD |
1915 | if (next_offset <= 0) |
1916 | return next_offset; | |
920a7a8f EA |
1917 | |
1918 | byte_offset = next_offset * esz; | |
1919 | id += next_offset; | |
1920 | gpa += byte_offset; | |
1921 | len -= byte_offset; | |
1922 | } | |
8c1a8a32 | 1923 | return 1; |
920a7a8f EA |
1924 | } |
1925 | ||
eff484e0 EA |
1926 | /** |
1927 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa | |
1928 | */ | |
1929 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
1930 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
1931 | { | |
1932 | struct kvm *kvm = its->dev->kvm; | |
1933 | u32 next_offset; | |
1934 | u64 val; | |
1935 | ||
1936 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
1937 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
7c7d2fa1 | 1938 | ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | |
eff484e0 EA |
1939 | ite->collection->collection_id; |
1940 | val = cpu_to_le64(val); | |
3f401957 | 1941 | return kvm_write_guest_lock(kvm, gpa, &val, ite_esz); |
eff484e0 EA |
1942 | } |
1943 | ||
1944 | /** | |
1945 | * vgic_its_restore_ite - restore an interrupt translation entry | |
1946 | * @event_id: id used for indexing | |
1947 | * @ptr: pointer to the ITE entry | |
1948 | * @opaque: pointer to the its_device | |
1949 | */ | |
1950 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
1951 | void *ptr, void *opaque) | |
1952 | { | |
1953 | struct its_device *dev = (struct its_device *)opaque; | |
1954 | struct its_collection *collection; | |
1955 | struct kvm *kvm = its->dev->kvm; | |
1956 | struct kvm_vcpu *vcpu = NULL; | |
1957 | u64 val; | |
1958 | u64 *p = (u64 *)ptr; | |
1959 | struct vgic_irq *irq; | |
1960 | u32 coll_id, lpi_id; | |
1961 | struct its_ite *ite; | |
1962 | u32 offset; | |
1963 | ||
1964 | val = *p; | |
1965 | ||
1966 | val = le64_to_cpu(val); | |
1967 | ||
1968 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
1969 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
1970 | ||
1971 | if (!lpi_id) | |
1972 | return 1; /* invalid entry, no choice but to scan next entry */ | |
1973 | ||
1974 | if (lpi_id < VGIC_MIN_LPI) | |
1975 | return -EINVAL; | |
1976 | ||
1977 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
1978 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
1979 | return -EINVAL; | |
1980 | ||
1981 | collection = find_collection(its, coll_id); | |
1982 | if (!collection) | |
1983 | return -EINVAL; | |
1984 | ||
7c7d2fa1 | 1985 | ite = vgic_its_alloc_ite(dev, collection, event_id); |
eff484e0 EA |
1986 | if (IS_ERR(ite)) |
1987 | return PTR_ERR(ite); | |
1988 | ||
1989 | if (its_is_collection_mapped(collection)) | |
1990 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1991 | ||
1992 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
1993 | if (IS_ERR(irq)) | |
1994 | return PTR_ERR(irq); | |
1995 | ite->irq = irq; | |
1996 | ||
1997 | return offset; | |
1998 | } | |
1999 | ||
2000 | static int vgic_its_ite_cmp(void *priv, struct list_head *a, | |
2001 | struct list_head *b) | |
2002 | { | |
2003 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
2004 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
2005 | ||
2006 | if (itea->event_id < iteb->event_id) | |
2007 | return -1; | |
2008 | else | |
2009 | return 1; | |
2010 | } | |
2011 | ||
57a9a117 EA |
2012 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) |
2013 | { | |
eff484e0 EA |
2014 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2015 | gpa_t base = device->itt_addr; | |
2016 | struct its_ite *ite; | |
2017 | int ret; | |
2018 | int ite_esz = abi->ite_esz; | |
2019 | ||
2020 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
2021 | ||
2022 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
2023 | gpa_t gpa = base + ite->event_id * ite_esz; | |
2024 | ||
bd94e7ae MZ |
2025 | /* |
2026 | * If an LPI carries the HW bit, this means that this | |
2027 | * interrupt is controlled by GICv4, and we do not | |
2028 | * have direct access to that state. Let's simply fail | |
2029 | * the save operation... | |
2030 | */ | |
2031 | if (ite->irq->hw) | |
2032 | return -EACCES; | |
2033 | ||
eff484e0 EA |
2034 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |
2035 | if (ret) | |
2036 | return ret; | |
2037 | } | |
2038 | return 0; | |
57a9a117 EA |
2039 | } |
2040 | ||
b9238262 | 2041 | /** |
2042 | * vgic_its_restore_itt - restore the ITT of a device | |
2043 | * | |
2044 | * @its: its handle | |
2045 | * @dev: device handle | |
2046 | * | |
2047 | * Return 0 on success, < 0 on error | |
2048 | */ | |
57a9a117 EA |
2049 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) |
2050 | { | |
eff484e0 EA |
2051 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2052 | gpa_t base = dev->itt_addr; | |
2053 | int ret; | |
2054 | int ite_esz = abi->ite_esz; | |
2055 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
2056 | ||
2057 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
2058 | vgic_its_restore_ite, dev); | |
2059 | ||
b9238262 | 2060 | /* scan_its_table returns +1 if all ITEs are invalid */ |
2061 | if (ret > 0) | |
2062 | ret = 0; | |
2063 | ||
eff484e0 | 2064 | return ret; |
57a9a117 EA |
2065 | } |
2066 | ||
2067 | /** | |
2068 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
2069 | * | |
2070 | * @its: ITS handle | |
2071 | * @dev: ITS device | |
2072 | * @ptr: GPA | |
2073 | */ | |
2074 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
2075 | gpa_t ptr, int dte_esz) | |
2076 | { | |
2077 | struct kvm *kvm = its->dev->kvm; | |
2078 | u64 val, itt_addr_field; | |
2079 | u32 next_offset; | |
2080 | ||
2081 | itt_addr_field = dev->itt_addr >> 8; | |
2082 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
2083 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
2084 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
2085 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
2086 | (dev->num_eventid_bits - 1)); | |
2087 | val = cpu_to_le64(val); | |
3f401957 | 2088 | return kvm_write_guest_lock(kvm, ptr, &val, dte_esz); |
57a9a117 EA |
2089 | } |
2090 | ||
2091 | /** | |
2092 | * vgic_its_restore_dte - restore a device table entry | |
2093 | * | |
2094 | * @its: its handle | |
2095 | * @id: device id the DTE corresponds to | |
2096 | * @ptr: kernel VA where the 8 byte DTE is located | |
2097 | * @opaque: unused | |
2098 | * | |
2099 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
2100 | * next dte otherwise | |
2101 | */ | |
2102 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
2103 | void *ptr, void *opaque) | |
2104 | { | |
2105 | struct its_device *dev; | |
2106 | gpa_t itt_addr; | |
2107 | u8 num_eventid_bits; | |
2108 | u64 entry = *(u64 *)ptr; | |
2109 | bool valid; | |
2110 | u32 offset; | |
2111 | int ret; | |
2112 | ||
2113 | entry = le64_to_cpu(entry); | |
2114 | ||
2115 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2116 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2117 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2118 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2119 | ||
2120 | if (!valid) | |
2121 | return 1; | |
2122 | ||
2123 | /* dte entry is valid */ | |
2124 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2125 | ||
2126 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); | |
2127 | if (IS_ERR(dev)) | |
2128 | return PTR_ERR(dev); | |
2129 | ||
2130 | ret = vgic_its_restore_itt(its, dev); | |
a2b19e6e CD |
2131 | if (ret) { |
2132 | vgic_its_free_device(its->dev->kvm, dev); | |
57a9a117 | 2133 | return ret; |
a2b19e6e | 2134 | } |
57a9a117 EA |
2135 | |
2136 | return offset; | |
2137 | } | |
2138 | ||
2139 | static int vgic_its_device_cmp(void *priv, struct list_head *a, | |
2140 | struct list_head *b) | |
2141 | { | |
2142 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2143 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2144 | ||
2145 | if (deva->device_id < devb->device_id) | |
2146 | return -1; | |
2147 | else | |
2148 | return 1; | |
2149 | } | |
2150 | ||
3b65808f EA |
2151 | /** |
2152 | * vgic_its_save_device_tables - Save the device table and all ITT | |
2153 | * into guest RAM | |
57a9a117 EA |
2154 | * |
2155 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2156 | * returns the GPA of the device entry | |
3b65808f EA |
2157 | */ |
2158 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2159 | { | |
57a9a117 | 2160 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2161 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2162 | struct its_device *dev; |
2163 | int dte_esz = abi->dte_esz; | |
57a9a117 | 2164 | |
c2385eaa EA |
2165 | if (!(baser & GITS_BASER_VALID)) |
2166 | return 0; | |
57a9a117 EA |
2167 | |
2168 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2169 | ||
2170 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2171 | int ret; | |
2172 | gpa_t eaddr; | |
2173 | ||
2174 | if (!vgic_its_check_id(its, baser, | |
2175 | dev->device_id, &eaddr)) | |
2176 | return -EINVAL; | |
2177 | ||
2178 | ret = vgic_its_save_itt(its, dev); | |
2179 | if (ret) | |
2180 | return ret; | |
2181 | ||
2182 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2183 | if (ret) | |
2184 | return ret; | |
2185 | } | |
2186 | return 0; | |
2187 | } | |
2188 | ||
2189 | /** | |
2190 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2191 | * | |
2192 | * @its: its handle | |
2193 | * @id: index of the entry in the L1 table | |
2194 | * @addr: kernel VA | |
2195 | * @opaque: unused | |
2196 | * | |
2197 | * L1 table entries are scanned by steps of 1 entry | |
2198 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2199 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2200 | */ | |
2201 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2202 | void *opaque) | |
2203 | { | |
2204 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2205 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2206 | u64 entry = *(u64 *)addr; | |
2207 | int dte_esz = abi->dte_esz; | |
2208 | gpa_t gpa; | |
2209 | int ret; | |
2210 | ||
2211 | entry = le64_to_cpu(entry); | |
2212 | ||
2213 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2214 | return 1; | |
2215 | ||
2216 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2217 | ||
2218 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2219 | l2_start_id, vgic_its_restore_dte, NULL); | |
2220 | ||
b9238262 | 2221 | return ret; |
3b65808f EA |
2222 | } |
2223 | ||
2224 | /** | |
2225 | * vgic_its_restore_device_tables - Restore the device table and all ITT | |
2226 | * from guest RAM to internal data structs | |
2227 | */ | |
2228 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2229 | { | |
57a9a117 EA |
2230 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2231 | u64 baser = its->baser_device_table; | |
2232 | int l1_esz, ret; | |
2233 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2234 | gpa_t l1_gpa; | |
2235 | ||
2236 | if (!(baser & GITS_BASER_VALID)) | |
2237 | return 0; | |
2238 | ||
2239 | l1_gpa = BASER_ADDRESS(baser); | |
2240 | ||
2241 | if (baser & GITS_BASER_INDIRECT) { | |
2242 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2243 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2244 | handle_l1_dte, NULL); | |
2245 | } else { | |
2246 | l1_esz = abi->dte_esz; | |
2247 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2248 | vgic_its_restore_dte, NULL); | |
2249 | } | |
2250 | ||
b9238262 | 2251 | /* scan_its_table returns +1 if all entries are invalid */ |
57a9a117 | 2252 | if (ret > 0) |
b9238262 | 2253 | ret = 0; |
57a9a117 EA |
2254 | |
2255 | return ret; | |
3b65808f EA |
2256 | } |
2257 | ||
ea1ad53e EA |
2258 | static int vgic_its_save_cte(struct vgic_its *its, |
2259 | struct its_collection *collection, | |
2260 | gpa_t gpa, int esz) | |
2261 | { | |
2262 | u64 val; | |
2263 | ||
2264 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2265 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2266 | collection->collection_id); | |
2267 | val = cpu_to_le64(val); | |
3f401957 | 2268 | return kvm_write_guest_lock(its->dev->kvm, gpa, &val, esz); |
ea1ad53e EA |
2269 | } |
2270 | ||
2271 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) | |
2272 | { | |
2273 | struct its_collection *collection; | |
2274 | struct kvm *kvm = its->dev->kvm; | |
2275 | u32 target_addr, coll_id; | |
2276 | u64 val; | |
2277 | int ret; | |
2278 | ||
2279 | BUG_ON(esz > sizeof(val)); | |
bd065cd2 | 2280 | ret = kvm_read_guest_lock(kvm, gpa, &val, esz); |
ea1ad53e EA |
2281 | if (ret) |
2282 | return ret; | |
2283 | val = le64_to_cpu(val); | |
2284 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2285 | return 0; | |
2286 | ||
2287 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2288 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2289 | ||
9e104f5b EA |
2290 | if (target_addr != COLLECTION_NOT_MAPPED && |
2291 | target_addr >= atomic_read(&kvm->online_vcpus)) | |
ea1ad53e EA |
2292 | return -EINVAL; |
2293 | ||
2294 | collection = find_collection(its, coll_id); | |
2295 | if (collection) | |
2296 | return -EEXIST; | |
2297 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
2298 | if (ret) | |
2299 | return ret; | |
2300 | collection->target_addr = target_addr; | |
2301 | return 1; | |
2302 | } | |
2303 | ||
3b65808f EA |
2304 | /** |
2305 | * vgic_its_save_collection_table - Save the collection table into | |
2306 | * guest RAM | |
2307 | */ | |
2308 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2309 | { | |
ea1ad53e | 2310 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa EA |
2311 | u64 baser = its->baser_coll_table; |
2312 | gpa_t gpa = BASER_ADDRESS(baser); | |
ea1ad53e EA |
2313 | struct its_collection *collection; |
2314 | u64 val; | |
ea1ad53e EA |
2315 | size_t max_size, filled = 0; |
2316 | int ret, cte_esz = abi->cte_esz; | |
2317 | ||
c2385eaa | 2318 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2319 | return 0; |
2320 | ||
c2385eaa | 2321 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2322 | |
2323 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2324 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2325 | if (ret) | |
2326 | return ret; | |
2327 | gpa += cte_esz; | |
2328 | filled += cte_esz; | |
2329 | } | |
2330 | ||
2331 | if (filled == max_size) | |
2332 | return 0; | |
2333 | ||
2334 | /* | |
2335 | * table is not fully filled, add a last dummy element | |
2336 | * with valid bit unset | |
2337 | */ | |
2338 | val = 0; | |
2339 | BUG_ON(cte_esz > sizeof(val)); | |
3f401957 | 2340 | ret = kvm_write_guest_lock(its->dev->kvm, gpa, &val, cte_esz); |
ea1ad53e | 2341 | return ret; |
3b65808f EA |
2342 | } |
2343 | ||
2344 | /** | |
2345 | * vgic_its_restore_collection_table - reads the collection table | |
2346 | * in guest memory and restores the ITS internal state. Requires the | |
2347 | * BASER registers to be restored before. | |
2348 | */ | |
2349 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2350 | { | |
ea1ad53e | 2351 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2352 | u64 baser = its->baser_coll_table; |
ea1ad53e EA |
2353 | int cte_esz = abi->cte_esz; |
2354 | size_t max_size, read = 0; | |
2355 | gpa_t gpa; | |
2356 | int ret; | |
2357 | ||
c2385eaa | 2358 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2359 | return 0; |
2360 | ||
c2385eaa | 2361 | gpa = BASER_ADDRESS(baser); |
ea1ad53e | 2362 | |
c2385eaa | 2363 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2364 | |
2365 | while (read < max_size) { | |
2366 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2367 | if (ret <= 0) | |
2368 | break; | |
2369 | gpa += cte_esz; | |
2370 | read += cte_esz; | |
2371 | } | |
f31b98b5 EA |
2372 | |
2373 | if (ret > 0) | |
2374 | return 0; | |
2375 | ||
ea1ad53e | 2376 | return ret; |
3b65808f EA |
2377 | } |
2378 | ||
71afe470 EA |
2379 | /** |
2380 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM | |
2381 | * according to v0 ABI | |
2382 | */ | |
2383 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2384 | { | |
3b65808f EA |
2385 | int ret; |
2386 | ||
3b65808f EA |
2387 | ret = vgic_its_save_device_tables(its); |
2388 | if (ret) | |
3eb4271b | 2389 | return ret; |
3b65808f | 2390 | |
3eb4271b | 2391 | return vgic_its_save_collection_table(its); |
71afe470 EA |
2392 | } |
2393 | ||
2394 | /** | |
2395 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM | |
2396 | * to internal data structs according to V0 ABI | |
2397 | * | |
2398 | */ | |
2399 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2400 | { | |
3b65808f EA |
2401 | int ret; |
2402 | ||
3b65808f EA |
2403 | ret = vgic_its_restore_collection_table(its); |
2404 | if (ret) | |
3eb4271b | 2405 | return ret; |
3b65808f | 2406 | |
3eb4271b | 2407 | return vgic_its_restore_device_tables(its); |
71afe470 EA |
2408 | } |
2409 | ||
2410 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2411 | { | |
2412 | const struct vgic_its_abi *abi; | |
2413 | ||
2414 | abi = vgic_its_get_abi(its); | |
2415 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2416 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2417 | ||
2418 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2419 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2420 | ||
2421 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2422 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2423 | return 0; | |
2424 | } | |
2425 | ||
3eb4271b EA |
2426 | static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its) |
2427 | { | |
2428 | /* We need to keep the ABI specific field values */ | |
2429 | its->baser_coll_table &= ~GITS_BASER_VALID; | |
2430 | its->baser_device_table &= ~GITS_BASER_VALID; | |
2431 | its->cbaser = 0; | |
2432 | its->creadr = 0; | |
2433 | its->cwriter = 0; | |
2434 | its->enabled = 0; | |
2435 | vgic_its_free_device_list(kvm, its); | |
2436 | vgic_its_free_collection_list(kvm, its); | |
2437 | } | |
2438 | ||
1085fdc6 AP |
2439 | static int vgic_its_has_attr(struct kvm_device *dev, |
2440 | struct kvm_device_attr *attr) | |
2441 | { | |
2442 | switch (attr->group) { | |
2443 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2444 | switch (attr->attr) { | |
2445 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2446 | return 0; | |
2447 | } | |
2448 | break; | |
2449 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2450 | switch (attr->attr) { | |
2451 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2452 | return 0; | |
3eb4271b EA |
2453 | case KVM_DEV_ARM_ITS_CTRL_RESET: |
2454 | return 0; | |
3b65808f EA |
2455 | case KVM_DEV_ARM_ITS_SAVE_TABLES: |
2456 | return 0; | |
2457 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2458 | return 0; | |
1085fdc6 AP |
2459 | } |
2460 | break; | |
876ae234 EA |
2461 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: |
2462 | return vgic_its_has_attr_regs(dev, attr); | |
1085fdc6 AP |
2463 | } |
2464 | return -ENXIO; | |
2465 | } | |
2466 | ||
3eb4271b EA |
2467 | static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr) |
2468 | { | |
2469 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2470 | int ret = 0; | |
2471 | ||
2472 | if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */ | |
2473 | return 0; | |
2474 | ||
2475 | mutex_lock(&kvm->lock); | |
2476 | mutex_lock(&its->its_lock); | |
2477 | ||
2478 | if (!lock_all_vcpus(kvm)) { | |
2479 | mutex_unlock(&its->its_lock); | |
2480 | mutex_unlock(&kvm->lock); | |
2481 | return -EBUSY; | |
2482 | } | |
2483 | ||
2484 | switch (attr) { | |
2485 | case KVM_DEV_ARM_ITS_CTRL_RESET: | |
2486 | vgic_its_reset(kvm, its); | |
2487 | break; | |
2488 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2489 | ret = abi->save_tables(its); | |
2490 | break; | |
2491 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2492 | ret = abi->restore_tables(its); | |
2493 | break; | |
2494 | } | |
2495 | ||
2496 | unlock_all_vcpus(kvm); | |
2497 | mutex_unlock(&its->its_lock); | |
2498 | mutex_unlock(&kvm->lock); | |
2499 | return ret; | |
2500 | } | |
2501 | ||
1085fdc6 AP |
2502 | static int vgic_its_set_attr(struct kvm_device *dev, |
2503 | struct kvm_device_attr *attr) | |
2504 | { | |
2505 | struct vgic_its *its = dev->private; | |
2506 | int ret; | |
2507 | ||
2508 | switch (attr->group) { | |
2509 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2510 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2511 | unsigned long type = (unsigned long)attr->attr; | |
2512 | u64 addr; | |
2513 | ||
2514 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2515 | return -ENODEV; | |
2516 | ||
1085fdc6 AP |
2517 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
2518 | return -EFAULT; | |
2519 | ||
2520 | ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base, | |
2521 | addr, SZ_64K); | |
2522 | if (ret) | |
2523 | return ret; | |
2524 | ||
30e1b684 | 2525 | return vgic_register_its_iodev(dev->kvm, its, addr); |
1085fdc6 | 2526 | } |
3eb4271b EA |
2527 | case KVM_DEV_ARM_VGIC_GRP_CTRL: |
2528 | return vgic_its_ctrl(dev->kvm, its, attr->attr); | |
876ae234 EA |
2529 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { |
2530 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2531 | u64 reg; | |
2532 | ||
2533 | if (get_user(reg, uaddr)) | |
2534 | return -EFAULT; | |
2535 | ||
2536 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2537 | } | |
1085fdc6 AP |
2538 | } |
2539 | return -ENXIO; | |
2540 | } | |
2541 | ||
2542 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2543 | struct kvm_device_attr *attr) | |
2544 | { | |
2545 | switch (attr->group) { | |
2546 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2547 | struct vgic_its *its = dev->private; | |
2548 | u64 addr = its->vgic_its_base; | |
2549 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2550 | unsigned long type = (unsigned long)attr->attr; | |
2551 | ||
2552 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2553 | return -ENODEV; | |
2554 | ||
2555 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2556 | return -EFAULT; | |
2557 | break; | |
876ae234 EA |
2558 | } |
2559 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2560 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2561 | u64 reg; | |
2562 | int ret; | |
2563 | ||
2564 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2565 | if (ret) | |
2566 | return ret; | |
2567 | return put_user(reg, uaddr); | |
2568 | } | |
1085fdc6 AP |
2569 | default: |
2570 | return -ENXIO; | |
2571 | } | |
1085fdc6 AP |
2572 | |
2573 | return 0; | |
2574 | } | |
2575 | ||
2576 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2577 | .name = "kvm-arm-vgic-its", | |
2578 | .create = vgic_its_create, | |
2579 | .destroy = vgic_its_destroy, | |
2580 | .set_attr = vgic_its_set_attr, | |
2581 | .get_attr = vgic_its_get_attr, | |
2582 | .has_attr = vgic_its_has_attr, | |
2583 | }; | |
2584 | ||
2585 | int kvm_vgic_register_its_device(void) | |
2586 | { | |
2587 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2588 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2589 | } |