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59c5ab40 AP |
1 | /* |
2 | * GICv3 ITS emulation | |
3 | * | |
4 | * Copyright (C) 2015,2016 ARM Ltd. | |
5 | * Author: Andre Przywara <andre.przywara@arm.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include <linux/cpu.h> | |
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_host.h> | |
23 | #include <linux/interrupt.h> | |
424c3383 | 24 | #include <linux/list.h> |
1085fdc6 | 25 | #include <linux/uaccess.h> |
57a9a117 | 26 | #include <linux/list_sort.h> |
59c5ab40 AP |
27 | |
28 | #include <linux/irqchip/arm-gic-v3.h> | |
29 | ||
30 | #include <asm/kvm_emulate.h> | |
31 | #include <asm/kvm_arm.h> | |
32 | #include <asm/kvm_mmu.h> | |
33 | ||
34 | #include "vgic.h" | |
35 | #include "vgic-mmio.h" | |
36 | ||
71afe470 EA |
37 | static int vgic_its_save_tables_v0(struct vgic_its *its); |
38 | static int vgic_its_restore_tables_v0(struct vgic_its *its); | |
39 | static int vgic_its_commit_v0(struct vgic_its *its); | |
06bd5359 | 40 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, |
6ce18e3a | 41 | struct kvm_vcpu *filter_vcpu, bool needs_inv); |
71afe470 | 42 | |
df9f58fb AP |
43 | /* |
44 | * Creates a new (reference to a) struct vgic_irq for a given LPI. | |
45 | * If this LPI is already mapped on another ITS, we increase its refcount | |
46 | * and return a pointer to the existing structure. | |
47 | * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq. | |
48 | * This function returns a pointer to the _unlocked_ structure. | |
49 | */ | |
06bd5359 EA |
50 | static struct vgic_irq *vgic_add_lpi(struct kvm *kvm, u32 intid, |
51 | struct kvm_vcpu *vcpu) | |
df9f58fb AP |
52 | { |
53 | struct vgic_dist *dist = &kvm->arch.vgic; | |
54 | struct vgic_irq *irq = vgic_get_irq(kvm, NULL, intid), *oldirq; | |
06bd5359 | 55 | int ret; |
df9f58fb AP |
56 | |
57 | /* In this case there is no put, since we keep the reference. */ | |
58 | if (irq) | |
59 | return irq; | |
60 | ||
61 | irq = kzalloc(sizeof(struct vgic_irq), GFP_KERNEL); | |
62 | if (!irq) | |
99e5e886 | 63 | return ERR_PTR(-ENOMEM); |
df9f58fb AP |
64 | |
65 | INIT_LIST_HEAD(&irq->lpi_list); | |
66 | INIT_LIST_HEAD(&irq->ap_list); | |
67 | spin_lock_init(&irq->irq_lock); | |
68 | ||
69 | irq->config = VGIC_CONFIG_EDGE; | |
70 | kref_init(&irq->refcount); | |
71 | irq->intid = intid; | |
06bd5359 | 72 | irq->target_vcpu = vcpu; |
df9f58fb AP |
73 | |
74 | spin_lock(&dist->lpi_list_lock); | |
75 | ||
76 | /* | |
77 | * There could be a race with another vgic_add_lpi(), so we need to | |
78 | * check that we don't add a second list entry with the same LPI. | |
79 | */ | |
80 | list_for_each_entry(oldirq, &dist->lpi_list_head, lpi_list) { | |
81 | if (oldirq->intid != intid) | |
82 | continue; | |
83 | ||
84 | /* Someone was faster with adding this LPI, lets use that. */ | |
85 | kfree(irq); | |
86 | irq = oldirq; | |
87 | ||
88 | /* | |
89 | * This increases the refcount, the caller is expected to | |
90 | * call vgic_put_irq() on the returned pointer once it's | |
91 | * finished with the IRQ. | |
92 | */ | |
d97594e6 | 93 | vgic_get_irq_kref(irq); |
df9f58fb AP |
94 | |
95 | goto out_unlock; | |
96 | } | |
97 | ||
98 | list_add_tail(&irq->lpi_list, &dist->lpi_list_head); | |
99 | dist->lpi_list_count++; | |
100 | ||
101 | out_unlock: | |
102 | spin_unlock(&dist->lpi_list_lock); | |
103 | ||
06bd5359 EA |
104 | /* |
105 | * We "cache" the configuration table entries in our struct vgic_irq's. | |
106 | * However we only have those structs for mapped IRQs, so we read in | |
107 | * the respective config data from memory here upon mapping the LPI. | |
108 | */ | |
6ce18e3a | 109 | ret = update_lpi_config(kvm, irq, NULL, false); |
06bd5359 EA |
110 | if (ret) |
111 | return ERR_PTR(ret); | |
112 | ||
113 | ret = vgic_v3_lpi_sync_pending_status(kvm, irq); | |
114 | if (ret) | |
115 | return ERR_PTR(ret); | |
116 | ||
df9f58fb AP |
117 | return irq; |
118 | } | |
119 | ||
424c3383 AP |
120 | struct its_device { |
121 | struct list_head dev_list; | |
122 | ||
123 | /* the head for the list of ITTEs */ | |
124 | struct list_head itt_head; | |
0d44cdb6 | 125 | u32 num_eventid_bits; |
7333cefe | 126 | gpa_t itt_addr; |
424c3383 AP |
127 | u32 device_id; |
128 | }; | |
129 | ||
130 | #define COLLECTION_NOT_MAPPED ((u32)~0) | |
131 | ||
132 | struct its_collection { | |
133 | struct list_head coll_list; | |
134 | ||
135 | u32 collection_id; | |
136 | u32 target_addr; | |
137 | }; | |
138 | ||
139 | #define its_is_collection_mapped(coll) ((coll) && \ | |
140 | ((coll)->target_addr != COLLECTION_NOT_MAPPED)) | |
141 | ||
9ce91c72 EA |
142 | struct its_ite { |
143 | struct list_head ite_list; | |
424c3383 | 144 | |
3802411d | 145 | struct vgic_irq *irq; |
424c3383 | 146 | struct its_collection *collection; |
424c3383 AP |
147 | u32 event_id; |
148 | }; | |
149 | ||
71afe470 EA |
150 | /** |
151 | * struct vgic_its_abi - ITS abi ops and settings | |
152 | * @cte_esz: collection table entry size | |
153 | * @dte_esz: device table entry size | |
154 | * @ite_esz: interrupt translation table entry size | |
155 | * @save tables: save the ITS tables into guest RAM | |
156 | * @restore_tables: restore the ITS internal structs from tables | |
157 | * stored in guest RAM | |
158 | * @commit: initialize the registers which expose the ABI settings, | |
159 | * especially the entry sizes | |
160 | */ | |
161 | struct vgic_its_abi { | |
162 | int cte_esz; | |
163 | int dte_esz; | |
164 | int ite_esz; | |
165 | int (*save_tables)(struct vgic_its *its); | |
166 | int (*restore_tables)(struct vgic_its *its); | |
167 | int (*commit)(struct vgic_its *its); | |
168 | }; | |
169 | ||
170 | static const struct vgic_its_abi its_table_abi_versions[] = { | |
171 | [0] = {.cte_esz = 8, .dte_esz = 8, .ite_esz = 8, | |
172 | .save_tables = vgic_its_save_tables_v0, | |
173 | .restore_tables = vgic_its_restore_tables_v0, | |
174 | .commit = vgic_its_commit_v0, | |
175 | }, | |
176 | }; | |
177 | ||
178 | #define NR_ITS_ABIS ARRAY_SIZE(its_table_abi_versions) | |
179 | ||
180 | inline const struct vgic_its_abi *vgic_its_get_abi(struct vgic_its *its) | |
181 | { | |
182 | return &its_table_abi_versions[its->abi_rev]; | |
183 | } | |
184 | ||
185 | int vgic_its_set_abi(struct vgic_its *its, int rev) | |
186 | { | |
187 | const struct vgic_its_abi *abi; | |
188 | ||
189 | its->abi_rev = rev; | |
190 | abi = vgic_its_get_abi(its); | |
191 | return abi->commit(its); | |
192 | } | |
193 | ||
df9f58fb AP |
194 | /* |
195 | * Find and returns a device in the device table for an ITS. | |
196 | * Must be called with the its_lock mutex held. | |
197 | */ | |
198 | static struct its_device *find_its_device(struct vgic_its *its, u32 device_id) | |
199 | { | |
200 | struct its_device *device; | |
201 | ||
202 | list_for_each_entry(device, &its->device_list, dev_list) | |
203 | if (device_id == device->device_id) | |
204 | return device; | |
205 | ||
206 | return NULL; | |
207 | } | |
208 | ||
209 | /* | |
210 | * Find and returns an interrupt translation table entry (ITTE) for a given | |
211 | * Device ID/Event ID pair on an ITS. | |
212 | * Must be called with the its_lock mutex held. | |
213 | */ | |
9ce91c72 | 214 | static struct its_ite *find_ite(struct vgic_its *its, u32 device_id, |
df9f58fb AP |
215 | u32 event_id) |
216 | { | |
217 | struct its_device *device; | |
9ce91c72 | 218 | struct its_ite *ite; |
df9f58fb AP |
219 | |
220 | device = find_its_device(its, device_id); | |
221 | if (device == NULL) | |
222 | return NULL; | |
223 | ||
9ce91c72 EA |
224 | list_for_each_entry(ite, &device->itt_head, ite_list) |
225 | if (ite->event_id == event_id) | |
226 | return ite; | |
df9f58fb AP |
227 | |
228 | return NULL; | |
229 | } | |
230 | ||
231 | /* To be used as an iterator this macro misses the enclosing parentheses */ | |
9ce91c72 | 232 | #define for_each_lpi_its(dev, ite, its) \ |
df9f58fb | 233 | list_for_each_entry(dev, &(its)->device_list, dev_list) \ |
9ce91c72 | 234 | list_for_each_entry(ite, &(dev)->itt_head, ite_list) |
df9f58fb | 235 | |
424c3383 AP |
236 | /* |
237 | * We only implement 48 bits of PA at the moment, although the ITS | |
238 | * supports more. Let's be restrictive here. | |
239 | */ | |
df9f58fb | 240 | #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16)) |
424c3383 | 241 | #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12)) |
f9f77af9 AP |
242 | |
243 | #define GIC_LPI_OFFSET 8192 | |
244 | ||
0d44cdb6 | 245 | #define VITS_TYPER_IDBITS 16 |
07a3e9a7 | 246 | #define VITS_TYPER_DEVBITS 16 |
920a7a8f EA |
247 | #define VITS_DTE_MAX_DEVID_OFFSET (BIT(14) - 1) |
248 | #define VITS_ITE_MAX_EVENTID_OFFSET (BIT(16) - 1) | |
0d44cdb6 | 249 | |
df9f58fb AP |
250 | /* |
251 | * Finds and returns a collection in the ITS collection table. | |
252 | * Must be called with the its_lock mutex held. | |
253 | */ | |
254 | static struct its_collection *find_collection(struct vgic_its *its, int coll_id) | |
255 | { | |
256 | struct its_collection *collection; | |
257 | ||
258 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
259 | if (coll_id == collection->collection_id) | |
260 | return collection; | |
261 | } | |
262 | ||
263 | return NULL; | |
264 | } | |
265 | ||
f9f77af9 AP |
266 | #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED) |
267 | #define LPI_PROP_PRIORITY(p) ((p) & 0xfc) | |
268 | ||
269 | /* | |
270 | * Reads the configuration data for a given LPI from guest memory and | |
271 | * updates the fields in struct vgic_irq. | |
272 | * If filter_vcpu is not NULL, applies only if the IRQ is targeting this | |
273 | * VCPU. Unconditionally applies if filter_vcpu is NULL. | |
274 | */ | |
275 | static int update_lpi_config(struct kvm *kvm, struct vgic_irq *irq, | |
6ce18e3a | 276 | struct kvm_vcpu *filter_vcpu, bool needs_inv) |
f9f77af9 | 277 | { |
44de9d68 | 278 | u64 propbase = GICR_PROPBASER_ADDRESS(kvm->arch.vgic.propbaser); |
f9f77af9 AP |
279 | u8 prop; |
280 | int ret; | |
006df0f3 | 281 | unsigned long flags; |
f9f77af9 AP |
282 | |
283 | ret = kvm_read_guest(kvm, propbase + irq->intid - GIC_LPI_OFFSET, | |
284 | &prop, 1); | |
285 | ||
286 | if (ret) | |
287 | return ret; | |
288 | ||
006df0f3 | 289 | spin_lock_irqsave(&irq->irq_lock, flags); |
f9f77af9 AP |
290 | |
291 | if (!filter_vcpu || filter_vcpu == irq->target_vcpu) { | |
292 | irq->priority = LPI_PROP_PRIORITY(prop); | |
293 | irq->enabled = LPI_PROP_ENABLE_BIT(prop); | |
294 | ||
95b110ab CD |
295 | if (!irq->hw) { |
296 | vgic_queue_irq_unlock(kvm, irq, flags); | |
297 | return 0; | |
298 | } | |
f9f77af9 AP |
299 | } |
300 | ||
95b110ab CD |
301 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
302 | ||
af340f99 | 303 | if (irq->hw) |
6ce18e3a | 304 | return its_prop_update_vlpi(irq->host_irq, prop, needs_inv); |
af340f99 | 305 | |
f9f77af9 AP |
306 | return 0; |
307 | } | |
33d3bc95 AP |
308 | |
309 | /* | |
ccb1d791 EA |
310 | * Create a snapshot of the current LPIs targeting @vcpu, so that we can |
311 | * enumerate those LPIs without holding any lock. | |
312 | * Returns their number and puts the kmalloc'ed array into intid_ptr. | |
33d3bc95 | 313 | */ |
ccb1d791 | 314 | static int vgic_copy_lpi_list(struct kvm_vcpu *vcpu, u32 **intid_ptr) |
33d3bc95 | 315 | { |
ccb1d791 | 316 | struct vgic_dist *dist = &vcpu->kvm->arch.vgic; |
33d3bc95 AP |
317 | struct vgic_irq *irq; |
318 | u32 *intids; | |
e092e6af | 319 | int irq_count, i = 0; |
33d3bc95 AP |
320 | |
321 | /* | |
e092e6af MZ |
322 | * There is an obvious race between allocating the array and LPIs |
323 | * being mapped/unmapped. If we ended up here as a result of a | |
324 | * command, we're safe (locks are held, preventing another | |
325 | * command). If coming from another path (such as enabling LPIs), | |
326 | * we must be careful not to overrun the array. | |
33d3bc95 | 327 | */ |
e092e6af | 328 | irq_count = READ_ONCE(dist->lpi_list_count); |
33d3bc95 AP |
329 | intids = kmalloc_array(irq_count, sizeof(intids[0]), GFP_KERNEL); |
330 | if (!intids) | |
331 | return -ENOMEM; | |
332 | ||
333 | spin_lock(&dist->lpi_list_lock); | |
334 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { | |
e092e6af MZ |
335 | if (i == irq_count) |
336 | break; | |
33d3bc95 | 337 | /* We don't need to "get" the IRQ, as we hold the list lock. */ |
ccb1d791 EA |
338 | if (irq->target_vcpu != vcpu) |
339 | continue; | |
340 | intids[i++] = irq->intid; | |
33d3bc95 AP |
341 | } |
342 | spin_unlock(&dist->lpi_list_lock); | |
343 | ||
344 | *intid_ptr = intids; | |
ccb1d791 | 345 | return i; |
33d3bc95 AP |
346 | } |
347 | ||
08c9fd04 MZ |
348 | static int update_affinity(struct vgic_irq *irq, struct kvm_vcpu *vcpu) |
349 | { | |
0fc9a58e MZ |
350 | int ret = 0; |
351 | ||
08c9fd04 MZ |
352 | spin_lock(&irq->irq_lock); |
353 | irq->target_vcpu = vcpu; | |
354 | spin_unlock(&irq->irq_lock); | |
355 | ||
0fc9a58e MZ |
356 | if (irq->hw) { |
357 | struct its_vlpi_map map; | |
358 | ||
359 | ret = its_get_vlpi(irq->host_irq, &map); | |
360 | if (ret) | |
361 | return ret; | |
362 | ||
363 | map.vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe; | |
364 | ||
365 | ret = its_map_vlpi(irq->host_irq, &map); | |
366 | } | |
367 | ||
368 | return ret; | |
08c9fd04 MZ |
369 | } |
370 | ||
df9f58fb AP |
371 | /* |
372 | * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI | |
373 | * is targeting) to the VGIC's view, which deals with target VCPUs. | |
374 | * Needs to be called whenever either the collection for a LPIs has | |
375 | * changed or the collection itself got retargeted. | |
376 | */ | |
9ce91c72 | 377 | static void update_affinity_ite(struct kvm *kvm, struct its_ite *ite) |
df9f58fb AP |
378 | { |
379 | struct kvm_vcpu *vcpu; | |
380 | ||
9ce91c72 | 381 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
382 | return; |
383 | ||
9ce91c72 | 384 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
08c9fd04 | 385 | update_affinity(ite->irq, vcpu); |
df9f58fb AP |
386 | } |
387 | ||
388 | /* | |
389 | * Updates the target VCPU for every LPI targeting this collection. | |
390 | * Must be called with the its_lock mutex held. | |
391 | */ | |
392 | static void update_affinity_collection(struct kvm *kvm, struct vgic_its *its, | |
393 | struct its_collection *coll) | |
394 | { | |
395 | struct its_device *device; | |
9ce91c72 | 396 | struct its_ite *ite; |
df9f58fb | 397 | |
9ce91c72 EA |
398 | for_each_lpi_its(device, ite, its) { |
399 | if (!ite->collection || coll != ite->collection) | |
df9f58fb AP |
400 | continue; |
401 | ||
9ce91c72 | 402 | update_affinity_ite(kvm, ite); |
df9f58fb AP |
403 | } |
404 | } | |
405 | ||
406 | static u32 max_lpis_propbaser(u64 propbaser) | |
407 | { | |
408 | int nr_idbits = (propbaser & 0x1f) + 1; | |
409 | ||
410 | return 1U << min(nr_idbits, INTERRUPT_ID_BITS_ITS); | |
411 | } | |
412 | ||
33d3bc95 | 413 | /* |
ccb1d791 | 414 | * Sync the pending table pending bit of LPIs targeting @vcpu |
33d3bc95 AP |
415 | * with our own data structures. This relies on the LPI being |
416 | * mapped before. | |
417 | */ | |
418 | static int its_sync_lpi_pending_table(struct kvm_vcpu *vcpu) | |
419 | { | |
44de9d68 | 420 | gpa_t pendbase = GICR_PENDBASER_ADDRESS(vcpu->arch.vgic_cpu.pendbaser); |
33d3bc95 AP |
421 | struct vgic_irq *irq; |
422 | int last_byte_offset = -1; | |
423 | int ret = 0; | |
424 | u32 *intids; | |
425 | int nr_irqs, i; | |
006df0f3 | 426 | unsigned long flags; |
64afe6e9 | 427 | u8 pendmask; |
33d3bc95 | 428 | |
ccb1d791 | 429 | nr_irqs = vgic_copy_lpi_list(vcpu, &intids); |
33d3bc95 AP |
430 | if (nr_irqs < 0) |
431 | return nr_irqs; | |
432 | ||
433 | for (i = 0; i < nr_irqs; i++) { | |
434 | int byte_offset, bit_nr; | |
33d3bc95 AP |
435 | |
436 | byte_offset = intids[i] / BITS_PER_BYTE; | |
437 | bit_nr = intids[i] % BITS_PER_BYTE; | |
438 | ||
439 | /* | |
440 | * For contiguously allocated LPIs chances are we just read | |
441 | * this very same byte in the last iteration. Reuse that. | |
442 | */ | |
443 | if (byte_offset != last_byte_offset) { | |
444 | ret = kvm_read_guest(vcpu->kvm, pendbase + byte_offset, | |
445 | &pendmask, 1); | |
446 | if (ret) { | |
447 | kfree(intids); | |
448 | return ret; | |
449 | } | |
450 | last_byte_offset = byte_offset; | |
451 | } | |
452 | ||
453 | irq = vgic_get_irq(vcpu->kvm, NULL, intids[i]); | |
006df0f3 | 454 | spin_lock_irqsave(&irq->irq_lock, flags); |
8694e4da | 455 | irq->pending_latch = pendmask & (1U << bit_nr); |
006df0f3 | 456 | vgic_queue_irq_unlock(vcpu->kvm, irq, flags); |
33d3bc95 AP |
457 | vgic_put_irq(vcpu->kvm, irq); |
458 | } | |
459 | ||
460 | kfree(intids); | |
461 | ||
462 | return ret; | |
463 | } | |
424c3383 | 464 | |
424c3383 AP |
465 | static unsigned long vgic_mmio_read_its_typer(struct kvm *kvm, |
466 | struct vgic_its *its, | |
467 | gpa_t addr, unsigned int len) | |
468 | { | |
71afe470 | 469 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
424c3383 AP |
470 | u64 reg = GITS_TYPER_PLPIS; |
471 | ||
472 | /* | |
473 | * We use linear CPU numbers for redistributor addressing, | |
474 | * so GITS_TYPER.PTA is 0. | |
475 | * Also we force all PROPBASER registers to be the same, so | |
476 | * CommonLPIAff is 0 as well. | |
477 | * To avoid memory waste in the guest, we keep the number of IDBits and | |
478 | * DevBits low - as least for the time being. | |
479 | */ | |
07a3e9a7 | 480 | reg |= GIC_ENCODE_SZ(VITS_TYPER_DEVBITS, 5) << GITS_TYPER_DEVBITS_SHIFT; |
0d44cdb6 | 481 | reg |= GIC_ENCODE_SZ(VITS_TYPER_IDBITS, 5) << GITS_TYPER_IDBITS_SHIFT; |
71afe470 | 482 | reg |= GIC_ENCODE_SZ(abi->ite_esz, 4) << GITS_TYPER_ITT_ENTRY_SIZE_SHIFT; |
424c3383 AP |
483 | |
484 | return extract_bytes(reg, addr & 7, len); | |
485 | } | |
486 | ||
487 | static unsigned long vgic_mmio_read_its_iidr(struct kvm *kvm, | |
488 | struct vgic_its *its, | |
489 | gpa_t addr, unsigned int len) | |
490 | { | |
ab01c6bd EA |
491 | u32 val; |
492 | ||
493 | val = (its->abi_rev << GITS_IIDR_REV_SHIFT) & GITS_IIDR_REV_MASK; | |
494 | val |= (PRODUCT_ID_KVM << GITS_IIDR_PRODUCTID_SHIFT) | IMPLEMENTER_ARM; | |
495 | return val; | |
496 | } | |
497 | ||
498 | static int vgic_mmio_uaccess_write_its_iidr(struct kvm *kvm, | |
499 | struct vgic_its *its, | |
500 | gpa_t addr, unsigned int len, | |
501 | unsigned long val) | |
502 | { | |
503 | u32 rev = GITS_IIDR_REV(val); | |
504 | ||
505 | if (rev >= NR_ITS_ABIS) | |
506 | return -EINVAL; | |
507 | return vgic_its_set_abi(its, rev); | |
424c3383 AP |
508 | } |
509 | ||
510 | static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm, | |
511 | struct vgic_its *its, | |
512 | gpa_t addr, unsigned int len) | |
513 | { | |
514 | switch (addr & 0xffff) { | |
515 | case GITS_PIDR0: | |
516 | return 0x92; /* part number, bits[7:0] */ | |
517 | case GITS_PIDR1: | |
518 | return 0xb4; /* part number, bits[11:8] */ | |
519 | case GITS_PIDR2: | |
520 | return GIC_PIDR2_ARCH_GICv3 | 0x0b; | |
521 | case GITS_PIDR4: | |
522 | return 0x40; /* This is a 64K software visible page */ | |
523 | /* The following are the ID registers for (any) GIC. */ | |
524 | case GITS_CIDR0: | |
525 | return 0x0d; | |
526 | case GITS_CIDR1: | |
527 | return 0xf0; | |
528 | case GITS_CIDR2: | |
529 | return 0x05; | |
530 | case GITS_CIDR3: | |
531 | return 0xb1; | |
532 | } | |
533 | ||
534 | return 0; | |
535 | } | |
536 | ||
bebfd2a2 MZ |
537 | int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its, |
538 | u32 devid, u32 eventid, struct vgic_irq **irq) | |
2891a7df | 539 | { |
fd837b08 | 540 | struct kvm_vcpu *vcpu; |
9ce91c72 | 541 | struct its_ite *ite; |
2891a7df AP |
542 | |
543 | if (!its->enabled) | |
fd837b08 | 544 | return -EBUSY; |
2891a7df | 545 | |
9ce91c72 EA |
546 | ite = find_ite(its, devid, eventid); |
547 | if (!ite || !its_is_collection_mapped(ite->collection)) | |
fd837b08 AP |
548 | return E_ITS_INT_UNMAPPED_INTERRUPT; |
549 | ||
9ce91c72 | 550 | vcpu = kvm_get_vcpu(kvm, ite->collection->target_addr); |
fd837b08 AP |
551 | if (!vcpu) |
552 | return E_ITS_INT_UNMAPPED_INTERRUPT; | |
553 | ||
554 | if (!vcpu->arch.vgic_cpu.lpis_enabled) | |
555 | return -EBUSY; | |
556 | ||
bebfd2a2 | 557 | *irq = ite->irq; |
fd837b08 | 558 | return 0; |
2891a7df AP |
559 | } |
560 | ||
bebfd2a2 | 561 | struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi) |
505a19ee | 562 | { |
bebfd2a2 MZ |
563 | u64 address; |
564 | struct kvm_io_device *kvm_io_dev; | |
505a19ee AP |
565 | struct vgic_io_device *iodev; |
566 | ||
bebfd2a2 MZ |
567 | if (!vgic_has_its(kvm)) |
568 | return ERR_PTR(-ENODEV); | |
569 | ||
570 | if (!(msi->flags & KVM_MSI_VALID_DEVID)) | |
571 | return ERR_PTR(-EINVAL); | |
505a19ee | 572 | |
bebfd2a2 MZ |
573 | address = (u64)msi->address_hi << 32 | msi->address_lo; |
574 | ||
575 | kvm_io_dev = kvm_io_bus_get_dev(kvm, KVM_MMIO_BUS, address); | |
576 | if (!kvm_io_dev) | |
577 | return ERR_PTR(-EINVAL); | |
505a19ee | 578 | |
bebfd2a2 MZ |
579 | if (kvm_io_dev->ops != &kvm_io_gic_ops) |
580 | return ERR_PTR(-EINVAL); | |
505a19ee | 581 | |
bebfd2a2 | 582 | iodev = container_of(kvm_io_dev, struct vgic_io_device, dev); |
505a19ee | 583 | if (iodev->iodev_type != IODEV_ITS) |
bebfd2a2 | 584 | return ERR_PTR(-EINVAL); |
505a19ee | 585 | |
bebfd2a2 MZ |
586 | return iodev->its; |
587 | } | |
588 | ||
589 | /* | |
590 | * Find the target VCPU and the LPI number for a given devid/eventid pair | |
591 | * and make this IRQ pending, possibly injecting it. | |
592 | * Must be called with the its_lock mutex held. | |
593 | * Returns 0 on success, a positive error value for any ITS mapping | |
594 | * related errors and negative error values for generic errors. | |
595 | */ | |
596 | static int vgic_its_trigger_msi(struct kvm *kvm, struct vgic_its *its, | |
597 | u32 devid, u32 eventid) | |
598 | { | |
599 | struct vgic_irq *irq = NULL; | |
600 | unsigned long flags; | |
601 | int err; | |
505a19ee | 602 | |
bebfd2a2 MZ |
603 | err = vgic_its_resolve_lpi(kvm, its, devid, eventid, &irq); |
604 | if (err) | |
605 | return err; | |
606 | ||
1b7fe468 MZ |
607 | if (irq->hw) |
608 | return irq_set_irqchip_state(irq->host_irq, | |
609 | IRQCHIP_STATE_PENDING, true); | |
610 | ||
bebfd2a2 MZ |
611 | spin_lock_irqsave(&irq->irq_lock, flags); |
612 | irq->pending_latch = true; | |
613 | vgic_queue_irq_unlock(kvm, irq, flags); | |
614 | ||
615 | return 0; | |
505a19ee AP |
616 | } |
617 | ||
2891a7df AP |
618 | /* |
619 | * Queries the KVM IO bus framework to get the ITS pointer from the given | |
620 | * doorbell address. | |
621 | * We then call vgic_its_trigger_msi() with the decoded data. | |
fd837b08 | 622 | * According to the KVM_SIGNAL_MSI API description returns 1 on success. |
2891a7df AP |
623 | */ |
624 | int vgic_its_inject_msi(struct kvm *kvm, struct kvm_msi *msi) | |
625 | { | |
bebfd2a2 | 626 | struct vgic_its *its; |
fd837b08 | 627 | int ret; |
2891a7df | 628 | |
bebfd2a2 MZ |
629 | its = vgic_msi_to_its(kvm, msi); |
630 | if (IS_ERR(its)) | |
631 | return PTR_ERR(its); | |
2891a7df | 632 | |
bebfd2a2 MZ |
633 | mutex_lock(&its->its_lock); |
634 | ret = vgic_its_trigger_msi(kvm, its, msi->devid, msi->data); | |
635 | mutex_unlock(&its->its_lock); | |
2891a7df | 636 | |
fd837b08 AP |
637 | if (ret < 0) |
638 | return ret; | |
639 | ||
640 | /* | |
641 | * KVM_SIGNAL_MSI demands a return value > 0 for success and 0 | |
642 | * if the guest has blocked the MSI. So we map any LPI mapping | |
643 | * related error to that. | |
644 | */ | |
645 | if (ret) | |
646 | return 0; | |
647 | else | |
648 | return 1; | |
2891a7df AP |
649 | } |
650 | ||
424c3383 | 651 | /* Requires the its_lock to be held. */ |
9ce91c72 | 652 | static void its_free_ite(struct kvm *kvm, struct its_ite *ite) |
424c3383 | 653 | { |
9ce91c72 | 654 | list_del(&ite->ite_list); |
3802411d AP |
655 | |
656 | /* This put matches the get in vgic_add_lpi. */ | |
07b46ed1 MZ |
657 | if (ite->irq) { |
658 | if (ite->irq->hw) | |
659 | WARN_ON(its_unmap_vlpi(ite->irq->host_irq)); | |
660 | ||
9ce91c72 | 661 | vgic_put_irq(kvm, ite->irq); |
07b46ed1 | 662 | } |
3802411d | 663 | |
9ce91c72 | 664 | kfree(ite); |
424c3383 AP |
665 | } |
666 | ||
df9f58fb AP |
667 | static u64 its_cmd_mask_field(u64 *its_cmd, int word, int shift, int size) |
668 | { | |
669 | return (le64_to_cpu(its_cmd[word]) >> shift) & (BIT_ULL(size) - 1); | |
670 | } | |
671 | ||
672 | #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8) | |
673 | #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32) | |
0d44cdb6 | 674 | #define its_cmd_get_size(cmd) (its_cmd_mask_field(cmd, 1, 0, 5) + 1) |
df9f58fb AP |
675 | #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32) |
676 | #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32) | |
677 | #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16) | |
7333cefe | 678 | #define its_cmd_get_ittaddr(cmd) (its_cmd_mask_field(cmd, 2, 8, 44) << 8) |
df9f58fb AP |
679 | #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32) |
680 | #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1) | |
681 | ||
682 | /* | |
683 | * The DISCARD command frees an Interrupt Translation Table Entry (ITTE). | |
684 | * Must be called with the its_lock mutex held. | |
685 | */ | |
686 | static int vgic_its_cmd_handle_discard(struct kvm *kvm, struct vgic_its *its, | |
687 | u64 *its_cmd) | |
688 | { | |
689 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
690 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 691 | struct its_ite *ite; |
df9f58fb AP |
692 | |
693 | ||
9ce91c72 EA |
694 | ite = find_ite(its, device_id, event_id); |
695 | if (ite && ite->collection) { | |
df9f58fb AP |
696 | /* |
697 | * Though the spec talks about removing the pending state, we | |
698 | * don't bother here since we clear the ITTE anyway and the | |
699 | * pending state is a property of the ITTE struct. | |
700 | */ | |
9ce91c72 | 701 | its_free_ite(kvm, ite); |
df9f58fb AP |
702 | return 0; |
703 | } | |
704 | ||
705 | return E_ITS_DISCARD_UNMAPPED_INTERRUPT; | |
706 | } | |
707 | ||
708 | /* | |
709 | * The MOVI command moves an ITTE to a different collection. | |
710 | * Must be called with the its_lock mutex held. | |
711 | */ | |
712 | static int vgic_its_cmd_handle_movi(struct kvm *kvm, struct vgic_its *its, | |
713 | u64 *its_cmd) | |
714 | { | |
715 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
716 | u32 event_id = its_cmd_get_id(its_cmd); | |
717 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
718 | struct kvm_vcpu *vcpu; | |
9ce91c72 | 719 | struct its_ite *ite; |
df9f58fb AP |
720 | struct its_collection *collection; |
721 | ||
9ce91c72 EA |
722 | ite = find_ite(its, device_id, event_id); |
723 | if (!ite) | |
df9f58fb AP |
724 | return E_ITS_MOVI_UNMAPPED_INTERRUPT; |
725 | ||
9ce91c72 | 726 | if (!its_is_collection_mapped(ite->collection)) |
df9f58fb AP |
727 | return E_ITS_MOVI_UNMAPPED_COLLECTION; |
728 | ||
729 | collection = find_collection(its, coll_id); | |
730 | if (!its_is_collection_mapped(collection)) | |
731 | return E_ITS_MOVI_UNMAPPED_COLLECTION; | |
732 | ||
9ce91c72 | 733 | ite->collection = collection; |
df9f58fb AP |
734 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); |
735 | ||
08c9fd04 | 736 | return update_affinity(ite->irq, vcpu); |
df9f58fb AP |
737 | } |
738 | ||
6d03a68f MZ |
739 | /* |
740 | * Check whether an ID can be stored into the corresponding guest table. | |
741 | * For a direct table this is pretty easy, but gets a bit nasty for | |
742 | * indirect tables. We check whether the resulting guest physical address | |
07a3e9a7 | 743 | * is actually valid (covered by a memslot and guest accessible). |
6d03a68f MZ |
744 | * For this we have to read the respective first level entry. |
745 | */ | |
dceff702 EA |
746 | static bool vgic_its_check_id(struct vgic_its *its, u64 baser, u32 id, |
747 | gpa_t *eaddr) | |
6d03a68f MZ |
748 | { |
749 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
07a3e9a7 EA |
750 | u64 indirect_ptr, type = GITS_BASER_TYPE(baser); |
751 | int esz = GITS_BASER_ENTRY_SIZE(baser); | |
6d03a68f | 752 | int index; |
6d03a68f | 753 | gfn_t gfn; |
07a3e9a7 EA |
754 | |
755 | switch (type) { | |
756 | case GITS_BASER_TYPE_DEVICE: | |
757 | if (id >= BIT_ULL(VITS_TYPER_DEVBITS)) | |
758 | return false; | |
759 | break; | |
760 | case GITS_BASER_TYPE_COLLECTION: | |
761 | /* as GITS_TYPER.CIL == 0, ITS supports 16-bit collection ID */ | |
762 | if (id >= BIT_ULL(16)) | |
763 | return false; | |
764 | break; | |
765 | default: | |
766 | return false; | |
767 | } | |
6d03a68f MZ |
768 | |
769 | if (!(baser & GITS_BASER_INDIRECT)) { | |
770 | phys_addr_t addr; | |
771 | ||
e29bd6f2 | 772 | if (id >= (l1_tbl_size / esz)) |
6d03a68f MZ |
773 | return false; |
774 | ||
e29bd6f2 | 775 | addr = BASER_ADDRESS(baser) + id * esz; |
6d03a68f MZ |
776 | gfn = addr >> PAGE_SHIFT; |
777 | ||
dceff702 EA |
778 | if (eaddr) |
779 | *eaddr = addr; | |
6d03a68f MZ |
780 | return kvm_is_visible_gfn(its->dev->kvm, gfn); |
781 | } | |
782 | ||
783 | /* calculate and check the index into the 1st level */ | |
e29bd6f2 | 784 | index = id / (SZ_64K / esz); |
6d03a68f MZ |
785 | if (index >= (l1_tbl_size / sizeof(u64))) |
786 | return false; | |
787 | ||
788 | /* Each 1st level entry is represented by a 64-bit value. */ | |
789 | if (kvm_read_guest(its->dev->kvm, | |
790 | BASER_ADDRESS(baser) + index * sizeof(indirect_ptr), | |
791 | &indirect_ptr, sizeof(indirect_ptr))) | |
792 | return false; | |
793 | ||
794 | indirect_ptr = le64_to_cpu(indirect_ptr); | |
795 | ||
796 | /* check the valid bit of the first level entry */ | |
797 | if (!(indirect_ptr & BIT_ULL(63))) | |
798 | return false; | |
799 | ||
800 | /* | |
801 | * Mask the guest physical address and calculate the frame number. | |
802 | * Any address beyond our supported 48 bits of PA will be caught | |
803 | * by the actual check in the final step. | |
804 | */ | |
805 | indirect_ptr &= GENMASK_ULL(51, 16); | |
806 | ||
807 | /* Find the address of the actual entry */ | |
e29bd6f2 VM |
808 | index = id % (SZ_64K / esz); |
809 | indirect_ptr += index * esz; | |
6d03a68f MZ |
810 | gfn = indirect_ptr >> PAGE_SHIFT; |
811 | ||
dceff702 EA |
812 | if (eaddr) |
813 | *eaddr = indirect_ptr; | |
6d03a68f MZ |
814 | return kvm_is_visible_gfn(its->dev->kvm, gfn); |
815 | } | |
816 | ||
17a21f58 MZ |
817 | static int vgic_its_alloc_collection(struct vgic_its *its, |
818 | struct its_collection **colp, | |
df9f58fb AP |
819 | u32 coll_id) |
820 | { | |
17a21f58 MZ |
821 | struct its_collection *collection; |
822 | ||
dceff702 | 823 | if (!vgic_its_check_id(its, its->baser_coll_table, coll_id, NULL)) |
6d03a68f MZ |
824 | return E_ITS_MAPC_COLLECTION_OOR; |
825 | ||
17a21f58 | 826 | collection = kzalloc(sizeof(*collection), GFP_KERNEL); |
686f294f MZ |
827 | if (!collection) |
828 | return -ENOMEM; | |
17a21f58 | 829 | |
df9f58fb AP |
830 | collection->collection_id = coll_id; |
831 | collection->target_addr = COLLECTION_NOT_MAPPED; | |
832 | ||
833 | list_add_tail(&collection->coll_list, &its->collection_list); | |
17a21f58 MZ |
834 | *colp = collection; |
835 | ||
836 | return 0; | |
837 | } | |
838 | ||
839 | static void vgic_its_free_collection(struct vgic_its *its, u32 coll_id) | |
840 | { | |
841 | struct its_collection *collection; | |
842 | struct its_device *device; | |
9ce91c72 | 843 | struct its_ite *ite; |
17a21f58 MZ |
844 | |
845 | /* | |
846 | * Clearing the mapping for that collection ID removes the | |
847 | * entry from the list. If there wasn't any before, we can | |
848 | * go home early. | |
849 | */ | |
850 | collection = find_collection(its, coll_id); | |
851 | if (!collection) | |
852 | return; | |
853 | ||
9ce91c72 EA |
854 | for_each_lpi_its(device, ite, its) |
855 | if (ite->collection && | |
856 | ite->collection->collection_id == coll_id) | |
857 | ite->collection = NULL; | |
17a21f58 MZ |
858 | |
859 | list_del(&collection->coll_list); | |
860 | kfree(collection); | |
df9f58fb AP |
861 | } |
862 | ||
528297f5 EA |
863 | /* Must be called with its_lock mutex held */ |
864 | static struct its_ite *vgic_its_alloc_ite(struct its_device *device, | |
865 | struct its_collection *collection, | |
7c7d2fa1 | 866 | u32 event_id) |
528297f5 EA |
867 | { |
868 | struct its_ite *ite; | |
869 | ||
870 | ite = kzalloc(sizeof(*ite), GFP_KERNEL); | |
871 | if (!ite) | |
872 | return ERR_PTR(-ENOMEM); | |
873 | ||
874 | ite->event_id = event_id; | |
875 | ite->collection = collection; | |
528297f5 EA |
876 | |
877 | list_add_tail(&ite->ite_list, &device->itt_head); | |
878 | return ite; | |
879 | } | |
880 | ||
df9f58fb AP |
881 | /* |
882 | * The MAPTI and MAPI commands map LPIs to ITTEs. | |
883 | * Must be called with its_lock mutex held. | |
884 | */ | |
885 | static int vgic_its_cmd_handle_mapi(struct kvm *kvm, struct vgic_its *its, | |
a3e7aa27 | 886 | u64 *its_cmd) |
df9f58fb AP |
887 | { |
888 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
889 | u32 event_id = its_cmd_get_id(its_cmd); | |
890 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
9ce91c72 | 891 | struct its_ite *ite; |
06bd5359 | 892 | struct kvm_vcpu *vcpu = NULL; |
df9f58fb AP |
893 | struct its_device *device; |
894 | struct its_collection *collection, *new_coll = NULL; | |
99e5e886 | 895 | struct vgic_irq *irq; |
528297f5 | 896 | int lpi_nr; |
df9f58fb AP |
897 | |
898 | device = find_its_device(its, device_id); | |
899 | if (!device) | |
900 | return E_ITS_MAPTI_UNMAPPED_DEVICE; | |
901 | ||
0d44cdb6 EA |
902 | if (event_id >= BIT_ULL(device->num_eventid_bits)) |
903 | return E_ITS_MAPTI_ID_OOR; | |
904 | ||
a3e7aa27 | 905 | if (its_cmd_get_command(its_cmd) == GITS_CMD_MAPTI) |
df9f58fb AP |
906 | lpi_nr = its_cmd_get_physical_id(its_cmd); |
907 | else | |
908 | lpi_nr = event_id; | |
909 | if (lpi_nr < GIC_LPI_OFFSET || | |
3a88bded MZ |
910 | lpi_nr >= max_lpis_propbaser(kvm->arch.vgic.propbaser)) |
911 | return E_ITS_MAPTI_PHYSICALID_OOR; | |
912 | ||
286054a7 | 913 | /* If there is an existing mapping, behavior is UNPREDICTABLE. */ |
9ce91c72 | 914 | if (find_ite(its, device_id, event_id)) |
286054a7 AP |
915 | return 0; |
916 | ||
3a88bded MZ |
917 | collection = find_collection(its, coll_id); |
918 | if (!collection) { | |
919 | int ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
920 | if (ret) | |
921 | return ret; | |
922 | new_coll = collection; | |
df9f58fb AP |
923 | } |
924 | ||
7c7d2fa1 | 925 | ite = vgic_its_alloc_ite(device, collection, event_id); |
528297f5 | 926 | if (IS_ERR(ite)) { |
286054a7 AP |
927 | if (new_coll) |
928 | vgic_its_free_collection(its, coll_id); | |
528297f5 | 929 | return PTR_ERR(ite); |
df9f58fb AP |
930 | } |
931 | ||
06bd5359 EA |
932 | if (its_is_collection_mapped(collection)) |
933 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
934 | ||
935 | irq = vgic_add_lpi(kvm, lpi_nr, vcpu); | |
99e5e886 CD |
936 | if (IS_ERR(irq)) { |
937 | if (new_coll) | |
938 | vgic_its_free_collection(its, coll_id); | |
9ce91c72 | 939 | its_free_ite(kvm, ite); |
99e5e886 CD |
940 | return PTR_ERR(irq); |
941 | } | |
9ce91c72 | 942 | ite->irq = irq; |
99e5e886 | 943 | |
df9f58fb AP |
944 | return 0; |
945 | } | |
946 | ||
947 | /* Requires the its_lock to be held. */ | |
0a0d389e | 948 | static void vgic_its_free_device(struct kvm *kvm, struct its_device *device) |
df9f58fb | 949 | { |
9ce91c72 | 950 | struct its_ite *ite, *temp; |
df9f58fb AP |
951 | |
952 | /* | |
953 | * The spec says that unmapping a device with still valid | |
954 | * ITTEs associated is UNPREDICTABLE. We remove all ITTEs, | |
955 | * since we cannot leave the memory unreferenced. | |
956 | */ | |
9ce91c72 EA |
957 | list_for_each_entry_safe(ite, temp, &device->itt_head, ite_list) |
958 | its_free_ite(kvm, ite); | |
df9f58fb AP |
959 | |
960 | list_del(&device->dev_list); | |
961 | kfree(device); | |
962 | } | |
963 | ||
2f609a03 | 964 | /* its lock must be held */ |
965 | static void vgic_its_free_device_list(struct kvm *kvm, struct vgic_its *its) | |
966 | { | |
967 | struct its_device *cur, *temp; | |
968 | ||
969 | list_for_each_entry_safe(cur, temp, &its->device_list, dev_list) | |
970 | vgic_its_free_device(kvm, cur); | |
971 | } | |
972 | ||
973 | /* its lock must be held */ | |
974 | static void vgic_its_free_collection_list(struct kvm *kvm, struct vgic_its *its) | |
975 | { | |
976 | struct its_collection *cur, *temp; | |
977 | ||
978 | list_for_each_entry_safe(cur, temp, &its->collection_list, coll_list) | |
979 | vgic_its_free_collection(its, cur->collection_id); | |
980 | } | |
981 | ||
528297f5 EA |
982 | /* Must be called with its_lock mutex held */ |
983 | static struct its_device *vgic_its_alloc_device(struct vgic_its *its, | |
984 | u32 device_id, gpa_t itt_addr, | |
985 | u8 num_eventid_bits) | |
986 | { | |
987 | struct its_device *device; | |
988 | ||
989 | device = kzalloc(sizeof(*device), GFP_KERNEL); | |
990 | if (!device) | |
991 | return ERR_PTR(-ENOMEM); | |
992 | ||
993 | device->device_id = device_id; | |
994 | device->itt_addr = itt_addr; | |
995 | device->num_eventid_bits = num_eventid_bits; | |
996 | INIT_LIST_HEAD(&device->itt_head); | |
997 | ||
998 | list_add_tail(&device->dev_list, &its->device_list); | |
999 | return device; | |
1000 | } | |
1001 | ||
df9f58fb AP |
1002 | /* |
1003 | * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs). | |
1004 | * Must be called with the its_lock mutex held. | |
1005 | */ | |
1006 | static int vgic_its_cmd_handle_mapd(struct kvm *kvm, struct vgic_its *its, | |
1007 | u64 *its_cmd) | |
1008 | { | |
1009 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1010 | bool valid = its_cmd_get_validbit(its_cmd); | |
0d44cdb6 | 1011 | u8 num_eventid_bits = its_cmd_get_size(its_cmd); |
7333cefe | 1012 | gpa_t itt_addr = its_cmd_get_ittaddr(its_cmd); |
df9f58fb AP |
1013 | struct its_device *device; |
1014 | ||
dceff702 | 1015 | if (!vgic_its_check_id(its, its->baser_device_table, device_id, NULL)) |
df9f58fb AP |
1016 | return E_ITS_MAPD_DEVICE_OOR; |
1017 | ||
0d44cdb6 EA |
1018 | if (valid && num_eventid_bits > VITS_TYPER_IDBITS) |
1019 | return E_ITS_MAPD_ITTSIZE_OOR; | |
1020 | ||
df9f58fb AP |
1021 | device = find_its_device(its, device_id); |
1022 | ||
1023 | /* | |
1024 | * The spec says that calling MAPD on an already mapped device | |
1025 | * invalidates all cached data for this device. We implement this | |
1026 | * by removing the mapping and re-establishing it. | |
1027 | */ | |
1028 | if (device) | |
0a0d389e | 1029 | vgic_its_free_device(kvm, device); |
df9f58fb AP |
1030 | |
1031 | /* | |
1032 | * The spec does not say whether unmapping a not-mapped device | |
1033 | * is an error, so we are done in any case. | |
1034 | */ | |
1035 | if (!valid) | |
1036 | return 0; | |
1037 | ||
528297f5 EA |
1038 | device = vgic_its_alloc_device(its, device_id, itt_addr, |
1039 | num_eventid_bits); | |
1040 | if (IS_ERR(device)) | |
1041 | return PTR_ERR(device); | |
df9f58fb AP |
1042 | |
1043 | return 0; | |
1044 | } | |
1045 | ||
df9f58fb AP |
1046 | /* |
1047 | * The MAPC command maps collection IDs to redistributors. | |
1048 | * Must be called with the its_lock mutex held. | |
1049 | */ | |
1050 | static int vgic_its_cmd_handle_mapc(struct kvm *kvm, struct vgic_its *its, | |
1051 | u64 *its_cmd) | |
1052 | { | |
1053 | u16 coll_id; | |
1054 | u32 target_addr; | |
1055 | struct its_collection *collection; | |
1056 | bool valid; | |
1057 | ||
1058 | valid = its_cmd_get_validbit(its_cmd); | |
1059 | coll_id = its_cmd_get_collection(its_cmd); | |
1060 | target_addr = its_cmd_get_target_addr(its_cmd); | |
1061 | ||
1062 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
1063 | return E_ITS_MAPC_PROCNUM_OOR; | |
1064 | ||
df9f58fb | 1065 | if (!valid) { |
17a21f58 | 1066 | vgic_its_free_collection(its, coll_id); |
df9f58fb | 1067 | } else { |
17a21f58 MZ |
1068 | collection = find_collection(its, coll_id); |
1069 | ||
df9f58fb | 1070 | if (!collection) { |
17a21f58 | 1071 | int ret; |
df9f58fb | 1072 | |
17a21f58 MZ |
1073 | ret = vgic_its_alloc_collection(its, &collection, |
1074 | coll_id); | |
1075 | if (ret) | |
1076 | return ret; | |
df9f58fb AP |
1077 | collection->target_addr = target_addr; |
1078 | } else { | |
1079 | collection->target_addr = target_addr; | |
1080 | update_affinity_collection(kvm, its, collection); | |
1081 | } | |
1082 | } | |
1083 | ||
1084 | return 0; | |
1085 | } | |
1086 | ||
1087 | /* | |
1088 | * The CLEAR command removes the pending state for a particular LPI. | |
1089 | * Must be called with the its_lock mutex held. | |
1090 | */ | |
1091 | static int vgic_its_cmd_handle_clear(struct kvm *kvm, struct vgic_its *its, | |
1092 | u64 *its_cmd) | |
1093 | { | |
1094 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1095 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1096 | struct its_ite *ite; |
df9f58fb AP |
1097 | |
1098 | ||
9ce91c72 EA |
1099 | ite = find_ite(its, device_id, event_id); |
1100 | if (!ite) | |
df9f58fb AP |
1101 | return E_ITS_CLEAR_UNMAPPED_INTERRUPT; |
1102 | ||
9ce91c72 | 1103 | ite->irq->pending_latch = false; |
df9f58fb | 1104 | |
fb0cada6 MZ |
1105 | if (ite->irq->hw) |
1106 | return irq_set_irqchip_state(ite->irq->host_irq, | |
1107 | IRQCHIP_STATE_PENDING, false); | |
1108 | ||
df9f58fb AP |
1109 | return 0; |
1110 | } | |
1111 | ||
1112 | /* | |
1113 | * The INV command syncs the configuration bits from the memory table. | |
1114 | * Must be called with the its_lock mutex held. | |
1115 | */ | |
1116 | static int vgic_its_cmd_handle_inv(struct kvm *kvm, struct vgic_its *its, | |
1117 | u64 *its_cmd) | |
1118 | { | |
1119 | u32 device_id = its_cmd_get_deviceid(its_cmd); | |
1120 | u32 event_id = its_cmd_get_id(its_cmd); | |
9ce91c72 | 1121 | struct its_ite *ite; |
df9f58fb AP |
1122 | |
1123 | ||
9ce91c72 EA |
1124 | ite = find_ite(its, device_id, event_id); |
1125 | if (!ite) | |
df9f58fb AP |
1126 | return E_ITS_INV_UNMAPPED_INTERRUPT; |
1127 | ||
6ce18e3a | 1128 | return update_lpi_config(kvm, ite->irq, NULL, true); |
df9f58fb AP |
1129 | } |
1130 | ||
1131 | /* | |
1132 | * The INVALL command requests flushing of all IRQ data in this collection. | |
1133 | * Find the VCPU mapped to that collection, then iterate over the VM's list | |
1134 | * of mapped LPIs and update the configuration for each IRQ which targets | |
1135 | * the specified vcpu. The configuration will be read from the in-memory | |
1136 | * configuration table. | |
1137 | * Must be called with the its_lock mutex held. | |
1138 | */ | |
1139 | static int vgic_its_cmd_handle_invall(struct kvm *kvm, struct vgic_its *its, | |
1140 | u64 *its_cmd) | |
1141 | { | |
1142 | u32 coll_id = its_cmd_get_collection(its_cmd); | |
1143 | struct its_collection *collection; | |
1144 | struct kvm_vcpu *vcpu; | |
1145 | struct vgic_irq *irq; | |
1146 | u32 *intids; | |
1147 | int irq_count, i; | |
1148 | ||
1149 | collection = find_collection(its, coll_id); | |
1150 | if (!its_is_collection_mapped(collection)) | |
1151 | return E_ITS_INVALL_UNMAPPED_COLLECTION; | |
1152 | ||
1153 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1154 | ||
ccb1d791 | 1155 | irq_count = vgic_copy_lpi_list(vcpu, &intids); |
df9f58fb AP |
1156 | if (irq_count < 0) |
1157 | return irq_count; | |
1158 | ||
1159 | for (i = 0; i < irq_count; i++) { | |
1160 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
1161 | if (!irq) | |
1162 | continue; | |
6ce18e3a | 1163 | update_lpi_config(kvm, irq, vcpu, false); |
df9f58fb AP |
1164 | vgic_put_irq(kvm, irq); |
1165 | } | |
1166 | ||
1167 | kfree(intids); | |
1168 | ||
6ce18e3a MZ |
1169 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.its_vm) |
1170 | its_invall_vpe(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe); | |
1171 | ||
df9f58fb AP |
1172 | return 0; |
1173 | } | |
1174 | ||
1175 | /* | |
1176 | * The MOVALL command moves the pending state of all IRQs targeting one | |
1177 | * redistributor to another. We don't hold the pending state in the VCPUs, | |
1178 | * but in the IRQs instead, so there is really not much to do for us here. | |
1179 | * However the spec says that no IRQ must target the old redistributor | |
1180 | * afterwards, so we make sure that no LPI is using the associated target_vcpu. | |
1181 | * This command affects all LPIs in the system that target that redistributor. | |
1182 | */ | |
1183 | static int vgic_its_cmd_handle_movall(struct kvm *kvm, struct vgic_its *its, | |
1184 | u64 *its_cmd) | |
1185 | { | |
df9f58fb AP |
1186 | u32 target1_addr = its_cmd_get_target_addr(its_cmd); |
1187 | u32 target2_addr = its_cmd_mask_field(its_cmd, 3, 16, 32); | |
1188 | struct kvm_vcpu *vcpu1, *vcpu2; | |
1189 | struct vgic_irq *irq; | |
ff9c1143 MZ |
1190 | u32 *intids; |
1191 | int irq_count, i; | |
df9f58fb AP |
1192 | |
1193 | if (target1_addr >= atomic_read(&kvm->online_vcpus) || | |
1194 | target2_addr >= atomic_read(&kvm->online_vcpus)) | |
1195 | return E_ITS_MOVALL_PROCNUM_OOR; | |
1196 | ||
1197 | if (target1_addr == target2_addr) | |
1198 | return 0; | |
1199 | ||
1200 | vcpu1 = kvm_get_vcpu(kvm, target1_addr); | |
1201 | vcpu2 = kvm_get_vcpu(kvm, target2_addr); | |
1202 | ||
ff9c1143 MZ |
1203 | irq_count = vgic_copy_lpi_list(vcpu1, &intids); |
1204 | if (irq_count < 0) | |
1205 | return irq_count; | |
df9f58fb | 1206 | |
ff9c1143 MZ |
1207 | for (i = 0; i < irq_count; i++) { |
1208 | irq = vgic_get_irq(kvm, NULL, intids[i]); | |
df9f58fb | 1209 | |
ff9c1143 | 1210 | update_affinity(irq, vcpu2); |
df9f58fb | 1211 | |
ff9c1143 | 1212 | vgic_put_irq(kvm, irq); |
df9f58fb AP |
1213 | } |
1214 | ||
ff9c1143 | 1215 | kfree(intids); |
df9f58fb AP |
1216 | return 0; |
1217 | } | |
1218 | ||
2891a7df AP |
1219 | /* |
1220 | * The INT command injects the LPI associated with that DevID/EvID pair. | |
1221 | * Must be called with the its_lock mutex held. | |
1222 | */ | |
1223 | static int vgic_its_cmd_handle_int(struct kvm *kvm, struct vgic_its *its, | |
1224 | u64 *its_cmd) | |
1225 | { | |
1226 | u32 msi_data = its_cmd_get_id(its_cmd); | |
1227 | u64 msi_devid = its_cmd_get_deviceid(its_cmd); | |
1228 | ||
fd837b08 | 1229 | return vgic_its_trigger_msi(kvm, its, msi_devid, msi_data); |
2891a7df AP |
1230 | } |
1231 | ||
df9f58fb AP |
1232 | /* |
1233 | * This function is called with the its_cmd lock held, but the ITS data | |
1234 | * structure lock dropped. | |
1235 | */ | |
424c3383 AP |
1236 | static int vgic_its_handle_command(struct kvm *kvm, struct vgic_its *its, |
1237 | u64 *its_cmd) | |
1238 | { | |
df9f58fb AP |
1239 | int ret = -ENODEV; |
1240 | ||
1241 | mutex_lock(&its->its_lock); | |
a3e7aa27 | 1242 | switch (its_cmd_get_command(its_cmd)) { |
df9f58fb AP |
1243 | case GITS_CMD_MAPD: |
1244 | ret = vgic_its_cmd_handle_mapd(kvm, its, its_cmd); | |
1245 | break; | |
1246 | case GITS_CMD_MAPC: | |
1247 | ret = vgic_its_cmd_handle_mapc(kvm, its, its_cmd); | |
1248 | break; | |
1249 | case GITS_CMD_MAPI: | |
a3e7aa27 | 1250 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1251 | break; |
1252 | case GITS_CMD_MAPTI: | |
a3e7aa27 | 1253 | ret = vgic_its_cmd_handle_mapi(kvm, its, its_cmd); |
df9f58fb AP |
1254 | break; |
1255 | case GITS_CMD_MOVI: | |
1256 | ret = vgic_its_cmd_handle_movi(kvm, its, its_cmd); | |
1257 | break; | |
1258 | case GITS_CMD_DISCARD: | |
1259 | ret = vgic_its_cmd_handle_discard(kvm, its, its_cmd); | |
1260 | break; | |
1261 | case GITS_CMD_CLEAR: | |
1262 | ret = vgic_its_cmd_handle_clear(kvm, its, its_cmd); | |
1263 | break; | |
1264 | case GITS_CMD_MOVALL: | |
1265 | ret = vgic_its_cmd_handle_movall(kvm, its, its_cmd); | |
1266 | break; | |
2891a7df AP |
1267 | case GITS_CMD_INT: |
1268 | ret = vgic_its_cmd_handle_int(kvm, its, its_cmd); | |
1269 | break; | |
df9f58fb AP |
1270 | case GITS_CMD_INV: |
1271 | ret = vgic_its_cmd_handle_inv(kvm, its, its_cmd); | |
1272 | break; | |
1273 | case GITS_CMD_INVALL: | |
1274 | ret = vgic_its_cmd_handle_invall(kvm, its, its_cmd); | |
1275 | break; | |
1276 | case GITS_CMD_SYNC: | |
1277 | /* we ignore this command: we are in sync all of the time */ | |
1278 | ret = 0; | |
1279 | break; | |
1280 | } | |
1281 | mutex_unlock(&its->its_lock); | |
1282 | ||
1283 | return ret; | |
424c3383 AP |
1284 | } |
1285 | ||
1286 | static u64 vgic_sanitise_its_baser(u64 reg) | |
1287 | { | |
1288 | reg = vgic_sanitise_field(reg, GITS_BASER_SHAREABILITY_MASK, | |
1289 | GITS_BASER_SHAREABILITY_SHIFT, | |
1290 | vgic_sanitise_shareability); | |
1291 | reg = vgic_sanitise_field(reg, GITS_BASER_INNER_CACHEABILITY_MASK, | |
1292 | GITS_BASER_INNER_CACHEABILITY_SHIFT, | |
1293 | vgic_sanitise_inner_cacheability); | |
1294 | reg = vgic_sanitise_field(reg, GITS_BASER_OUTER_CACHEABILITY_MASK, | |
1295 | GITS_BASER_OUTER_CACHEABILITY_SHIFT, | |
1296 | vgic_sanitise_outer_cacheability); | |
1297 | ||
1298 | /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */ | |
1299 | reg &= ~GENMASK_ULL(15, 12); | |
1300 | ||
1301 | /* We support only one (ITS) page size: 64K */ | |
1302 | reg = (reg & ~GITS_BASER_PAGE_SIZE_MASK) | GITS_BASER_PAGE_SIZE_64K; | |
1303 | ||
1304 | return reg; | |
1305 | } | |
1306 | ||
1307 | static u64 vgic_sanitise_its_cbaser(u64 reg) | |
1308 | { | |
1309 | reg = vgic_sanitise_field(reg, GITS_CBASER_SHAREABILITY_MASK, | |
1310 | GITS_CBASER_SHAREABILITY_SHIFT, | |
1311 | vgic_sanitise_shareability); | |
1312 | reg = vgic_sanitise_field(reg, GITS_CBASER_INNER_CACHEABILITY_MASK, | |
1313 | GITS_CBASER_INNER_CACHEABILITY_SHIFT, | |
1314 | vgic_sanitise_inner_cacheability); | |
1315 | reg = vgic_sanitise_field(reg, GITS_CBASER_OUTER_CACHEABILITY_MASK, | |
1316 | GITS_CBASER_OUTER_CACHEABILITY_SHIFT, | |
1317 | vgic_sanitise_outer_cacheability); | |
1318 | ||
1319 | /* | |
1320 | * Sanitise the physical address to be 64k aligned. | |
1321 | * Also limit the physical addresses to 48 bits. | |
1322 | */ | |
1323 | reg &= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12)); | |
1324 | ||
1325 | return reg; | |
1326 | } | |
1327 | ||
1328 | static unsigned long vgic_mmio_read_its_cbaser(struct kvm *kvm, | |
1329 | struct vgic_its *its, | |
1330 | gpa_t addr, unsigned int len) | |
1331 | { | |
1332 | return extract_bytes(its->cbaser, addr & 7, len); | |
1333 | } | |
1334 | ||
1335 | static void vgic_mmio_write_its_cbaser(struct kvm *kvm, struct vgic_its *its, | |
1336 | gpa_t addr, unsigned int len, | |
1337 | unsigned long val) | |
1338 | { | |
1339 | /* When GITS_CTLR.Enable is 1, this register is RO. */ | |
1340 | if (its->enabled) | |
1341 | return; | |
1342 | ||
1343 | mutex_lock(&its->cmd_lock); | |
1344 | its->cbaser = update_64bit_reg(its->cbaser, addr & 7, len, val); | |
1345 | its->cbaser = vgic_sanitise_its_cbaser(its->cbaser); | |
1346 | its->creadr = 0; | |
1347 | /* | |
1348 | * CWRITER is architecturally UNKNOWN on reset, but we need to reset | |
1349 | * it to CREADR to make sure we start with an empty command buffer. | |
1350 | */ | |
1351 | its->cwriter = its->creadr; | |
1352 | mutex_unlock(&its->cmd_lock); | |
1353 | } | |
1354 | ||
1355 | #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12) | |
1356 | #define ITS_CMD_SIZE 32 | |
1357 | #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5)) | |
1358 | ||
a5e1e6ca AP |
1359 | /* Must be called with the cmd_lock held. */ |
1360 | static void vgic_its_process_commands(struct kvm *kvm, struct vgic_its *its) | |
424c3383 AP |
1361 | { |
1362 | gpa_t cbaser; | |
1363 | u64 cmd_buf[4]; | |
424c3383 | 1364 | |
a5e1e6ca AP |
1365 | /* Commands are only processed when the ITS is enabled. */ |
1366 | if (!its->enabled) | |
424c3383 | 1367 | return; |
424c3383 | 1368 | |
424c3383 AP |
1369 | cbaser = CBASER_ADDRESS(its->cbaser); |
1370 | ||
1371 | while (its->cwriter != its->creadr) { | |
1372 | int ret = kvm_read_guest(kvm, cbaser + its->creadr, | |
1373 | cmd_buf, ITS_CMD_SIZE); | |
1374 | /* | |
1375 | * If kvm_read_guest() fails, this could be due to the guest | |
1376 | * programming a bogus value in CBASER or something else going | |
1377 | * wrong from which we cannot easily recover. | |
1378 | * According to section 6.3.2 in the GICv3 spec we can just | |
1379 | * ignore that command then. | |
1380 | */ | |
1381 | if (!ret) | |
1382 | vgic_its_handle_command(kvm, its, cmd_buf); | |
1383 | ||
1384 | its->creadr += ITS_CMD_SIZE; | |
1385 | if (its->creadr == ITS_CMD_BUFFER_SIZE(its->cbaser)) | |
1386 | its->creadr = 0; | |
1387 | } | |
a5e1e6ca AP |
1388 | } |
1389 | ||
1390 | /* | |
1391 | * By writing to CWRITER the guest announces new commands to be processed. | |
1392 | * To avoid any races in the first place, we take the its_cmd lock, which | |
1393 | * protects our ring buffer variables, so that there is only one user | |
1394 | * per ITS handling commands at a given time. | |
1395 | */ | |
1396 | static void vgic_mmio_write_its_cwriter(struct kvm *kvm, struct vgic_its *its, | |
1397 | gpa_t addr, unsigned int len, | |
1398 | unsigned long val) | |
1399 | { | |
1400 | u64 reg; | |
1401 | ||
1402 | if (!its) | |
1403 | return; | |
1404 | ||
1405 | mutex_lock(&its->cmd_lock); | |
1406 | ||
1407 | reg = update_64bit_reg(its->cwriter, addr & 7, len, val); | |
1408 | reg = ITS_CMD_OFFSET(reg); | |
1409 | if (reg >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1410 | mutex_unlock(&its->cmd_lock); | |
1411 | return; | |
1412 | } | |
1413 | its->cwriter = reg; | |
1414 | ||
1415 | vgic_its_process_commands(kvm, its); | |
424c3383 AP |
1416 | |
1417 | mutex_unlock(&its->cmd_lock); | |
1418 | } | |
1419 | ||
1420 | static unsigned long vgic_mmio_read_its_cwriter(struct kvm *kvm, | |
1421 | struct vgic_its *its, | |
1422 | gpa_t addr, unsigned int len) | |
1423 | { | |
1424 | return extract_bytes(its->cwriter, addr & 0x7, len); | |
1425 | } | |
1426 | ||
1427 | static unsigned long vgic_mmio_read_its_creadr(struct kvm *kvm, | |
1428 | struct vgic_its *its, | |
1429 | gpa_t addr, unsigned int len) | |
1430 | { | |
1431 | return extract_bytes(its->creadr, addr & 0x7, len); | |
1432 | } | |
1433 | ||
0979bfa6 EA |
1434 | static int vgic_mmio_uaccess_write_its_creadr(struct kvm *kvm, |
1435 | struct vgic_its *its, | |
1436 | gpa_t addr, unsigned int len, | |
1437 | unsigned long val) | |
1438 | { | |
1439 | u32 cmd_offset; | |
1440 | int ret = 0; | |
1441 | ||
1442 | mutex_lock(&its->cmd_lock); | |
1443 | ||
1444 | if (its->enabled) { | |
1445 | ret = -EBUSY; | |
1446 | goto out; | |
1447 | } | |
1448 | ||
1449 | cmd_offset = ITS_CMD_OFFSET(val); | |
1450 | if (cmd_offset >= ITS_CMD_BUFFER_SIZE(its->cbaser)) { | |
1451 | ret = -EINVAL; | |
1452 | goto out; | |
1453 | } | |
1454 | ||
1455 | its->creadr = cmd_offset; | |
1456 | out: | |
1457 | mutex_unlock(&its->cmd_lock); | |
1458 | return ret; | |
1459 | } | |
1460 | ||
424c3383 AP |
1461 | #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7) |
1462 | static unsigned long vgic_mmio_read_its_baser(struct kvm *kvm, | |
1463 | struct vgic_its *its, | |
1464 | gpa_t addr, unsigned int len) | |
1465 | { | |
1466 | u64 reg; | |
1467 | ||
1468 | switch (BASER_INDEX(addr)) { | |
1469 | case 0: | |
1470 | reg = its->baser_device_table; | |
1471 | break; | |
1472 | case 1: | |
1473 | reg = its->baser_coll_table; | |
1474 | break; | |
1475 | default: | |
1476 | reg = 0; | |
1477 | break; | |
1478 | } | |
1479 | ||
1480 | return extract_bytes(reg, addr & 7, len); | |
1481 | } | |
1482 | ||
1483 | #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56)) | |
1484 | static void vgic_mmio_write_its_baser(struct kvm *kvm, | |
1485 | struct vgic_its *its, | |
1486 | gpa_t addr, unsigned int len, | |
1487 | unsigned long val) | |
1488 | { | |
71afe470 | 1489 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
36d6961c | 1490 | u64 entry_size, table_type; |
424c3383 AP |
1491 | u64 reg, *regptr, clearbits = 0; |
1492 | ||
1493 | /* When GITS_CTLR.Enable is 1, we ignore write accesses. */ | |
1494 | if (its->enabled) | |
1495 | return; | |
1496 | ||
1497 | switch (BASER_INDEX(addr)) { | |
1498 | case 0: | |
1499 | regptr = &its->baser_device_table; | |
71afe470 | 1500 | entry_size = abi->dte_esz; |
36d6961c | 1501 | table_type = GITS_BASER_TYPE_DEVICE; |
424c3383 AP |
1502 | break; |
1503 | case 1: | |
1504 | regptr = &its->baser_coll_table; | |
71afe470 | 1505 | entry_size = abi->cte_esz; |
36d6961c | 1506 | table_type = GITS_BASER_TYPE_COLLECTION; |
424c3383 AP |
1507 | clearbits = GITS_BASER_INDIRECT; |
1508 | break; | |
1509 | default: | |
1510 | return; | |
1511 | } | |
1512 | ||
1513 | reg = update_64bit_reg(*regptr, addr & 7, len, val); | |
1514 | reg &= ~GITS_BASER_RO_MASK; | |
1515 | reg &= ~clearbits; | |
1516 | ||
1517 | reg |= (entry_size - 1) << GITS_BASER_ENTRY_SIZE_SHIFT; | |
36d6961c | 1518 | reg |= table_type << GITS_BASER_TYPE_SHIFT; |
424c3383 AP |
1519 | reg = vgic_sanitise_its_baser(reg); |
1520 | ||
1521 | *regptr = reg; | |
36d6961c EA |
1522 | |
1523 | if (!(reg & GITS_BASER_VALID)) { | |
1524 | /* Take the its_lock to prevent a race with a save/restore */ | |
1525 | mutex_lock(&its->its_lock); | |
1526 | switch (table_type) { | |
1527 | case GITS_BASER_TYPE_DEVICE: | |
1528 | vgic_its_free_device_list(kvm, its); | |
1529 | break; | |
1530 | case GITS_BASER_TYPE_COLLECTION: | |
1531 | vgic_its_free_collection_list(kvm, its); | |
1532 | break; | |
1533 | } | |
1534 | mutex_unlock(&its->its_lock); | |
1535 | } | |
424c3383 AP |
1536 | } |
1537 | ||
a5e1e6ca AP |
1538 | static unsigned long vgic_mmio_read_its_ctlr(struct kvm *vcpu, |
1539 | struct vgic_its *its, | |
1540 | gpa_t addr, unsigned int len) | |
1541 | { | |
1542 | u32 reg = 0; | |
1543 | ||
1544 | mutex_lock(&its->cmd_lock); | |
1545 | if (its->creadr == its->cwriter) | |
1546 | reg |= GITS_CTLR_QUIESCENT; | |
1547 | if (its->enabled) | |
1548 | reg |= GITS_CTLR_ENABLE; | |
1549 | mutex_unlock(&its->cmd_lock); | |
1550 | ||
1551 | return reg; | |
1552 | } | |
1553 | ||
1554 | static void vgic_mmio_write_its_ctlr(struct kvm *kvm, struct vgic_its *its, | |
1555 | gpa_t addr, unsigned int len, | |
1556 | unsigned long val) | |
1557 | { | |
1558 | mutex_lock(&its->cmd_lock); | |
1559 | ||
c9b51bb6 EA |
1560 | /* |
1561 | * It is UNPREDICTABLE to enable the ITS if any of the CBASER or | |
1562 | * device/collection BASER are invalid | |
1563 | */ | |
1564 | if (!its->enabled && (val & GITS_CTLR_ENABLE) && | |
1565 | (!(its->baser_device_table & GITS_BASER_VALID) || | |
1566 | !(its->baser_coll_table & GITS_BASER_VALID) || | |
1567 | !(its->cbaser & GITS_CBASER_VALID))) | |
1568 | goto out; | |
1569 | ||
a5e1e6ca AP |
1570 | its->enabled = !!(val & GITS_CTLR_ENABLE); |
1571 | ||
1572 | /* | |
1573 | * Try to process any pending commands. This function bails out early | |
1574 | * if the ITS is disabled or no commands have been queued. | |
1575 | */ | |
1576 | vgic_its_process_commands(kvm, its); | |
1577 | ||
c9b51bb6 | 1578 | out: |
a5e1e6ca AP |
1579 | mutex_unlock(&its->cmd_lock); |
1580 | } | |
1581 | ||
59c5ab40 AP |
1582 | #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \ |
1583 | { \ | |
1584 | .reg_offset = off, \ | |
1585 | .len = length, \ | |
1586 | .access_flags = acc, \ | |
1587 | .its_read = rd, \ | |
1588 | .its_write = wr, \ | |
1589 | } | |
1590 | ||
0979bfa6 EA |
1591 | #define REGISTER_ITS_DESC_UACCESS(off, rd, wr, uwr, length, acc)\ |
1592 | { \ | |
1593 | .reg_offset = off, \ | |
1594 | .len = length, \ | |
1595 | .access_flags = acc, \ | |
1596 | .its_read = rd, \ | |
1597 | .its_write = wr, \ | |
1598 | .uaccess_its_write = uwr, \ | |
1599 | } | |
1600 | ||
59c5ab40 AP |
1601 | static void its_mmio_write_wi(struct kvm *kvm, struct vgic_its *its, |
1602 | gpa_t addr, unsigned int len, unsigned long val) | |
1603 | { | |
1604 | /* Ignore */ | |
1605 | } | |
1606 | ||
1607 | static struct vgic_register_region its_registers[] = { | |
1608 | REGISTER_ITS_DESC(GITS_CTLR, | |
424c3383 | 1609 | vgic_mmio_read_its_ctlr, vgic_mmio_write_its_ctlr, 4, |
59c5ab40 | 1610 | VGIC_ACCESS_32bit), |
ab01c6bd EA |
1611 | REGISTER_ITS_DESC_UACCESS(GITS_IIDR, |
1612 | vgic_mmio_read_its_iidr, its_mmio_write_wi, | |
1613 | vgic_mmio_uaccess_write_its_iidr, 4, | |
59c5ab40 AP |
1614 | VGIC_ACCESS_32bit), |
1615 | REGISTER_ITS_DESC(GITS_TYPER, | |
424c3383 | 1616 | vgic_mmio_read_its_typer, its_mmio_write_wi, 8, |
59c5ab40 AP |
1617 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1618 | REGISTER_ITS_DESC(GITS_CBASER, | |
424c3383 | 1619 | vgic_mmio_read_its_cbaser, vgic_mmio_write_its_cbaser, 8, |
59c5ab40 AP |
1620 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1621 | REGISTER_ITS_DESC(GITS_CWRITER, | |
424c3383 | 1622 | vgic_mmio_read_its_cwriter, vgic_mmio_write_its_cwriter, 8, |
59c5ab40 | 1623 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
0979bfa6 EA |
1624 | REGISTER_ITS_DESC_UACCESS(GITS_CREADR, |
1625 | vgic_mmio_read_its_creadr, its_mmio_write_wi, | |
1626 | vgic_mmio_uaccess_write_its_creadr, 8, | |
59c5ab40 AP |
1627 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1628 | REGISTER_ITS_DESC(GITS_BASER, | |
424c3383 | 1629 | vgic_mmio_read_its_baser, vgic_mmio_write_its_baser, 0x40, |
59c5ab40 AP |
1630 | VGIC_ACCESS_64bit | VGIC_ACCESS_32bit), |
1631 | REGISTER_ITS_DESC(GITS_IDREGS_BASE, | |
424c3383 | 1632 | vgic_mmio_read_its_idregs, its_mmio_write_wi, 0x30, |
59c5ab40 AP |
1633 | VGIC_ACCESS_32bit), |
1634 | }; | |
1635 | ||
33d3bc95 AP |
1636 | /* This is called on setting the LPI enable bit in the redistributor. */ |
1637 | void vgic_enable_lpis(struct kvm_vcpu *vcpu) | |
1638 | { | |
1639 | if (!(vcpu->arch.vgic_cpu.pendbaser & GICR_PENDBASER_PTZ)) | |
1640 | its_sync_lpi_pending_table(vcpu); | |
1641 | } | |
1642 | ||
30e1b684 CD |
1643 | static int vgic_register_its_iodev(struct kvm *kvm, struct vgic_its *its, |
1644 | u64 addr) | |
59c5ab40 AP |
1645 | { |
1646 | struct vgic_io_device *iodev = &its->iodev; | |
1647 | int ret; | |
1648 | ||
30e1b684 CD |
1649 | mutex_lock(&kvm->slots_lock); |
1650 | if (!IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1651 | ret = -EBUSY; | |
1652 | goto out; | |
1653 | } | |
59c5ab40 | 1654 | |
30e1b684 | 1655 | its->vgic_its_base = addr; |
59c5ab40 AP |
1656 | iodev->regions = its_registers; |
1657 | iodev->nr_regions = ARRAY_SIZE(its_registers); | |
1658 | kvm_iodevice_init(&iodev->dev, &kvm_io_gic_ops); | |
1659 | ||
1660 | iodev->base_addr = its->vgic_its_base; | |
1661 | iodev->iodev_type = IODEV_ITS; | |
1662 | iodev->its = its; | |
59c5ab40 AP |
1663 | ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, iodev->base_addr, |
1664 | KVM_VGIC_V3_ITS_SIZE, &iodev->dev); | |
30e1b684 | 1665 | out: |
59c5ab40 AP |
1666 | mutex_unlock(&kvm->slots_lock); |
1667 | ||
1668 | return ret; | |
1669 | } | |
1085fdc6 | 1670 | |
424c3383 AP |
1671 | #define INITIAL_BASER_VALUE \ |
1672 | (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \ | |
1673 | GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \ | |
1674 | GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \ | |
424c3383 AP |
1675 | GITS_BASER_PAGE_SIZE_64K) |
1676 | ||
1677 | #define INITIAL_PROPBASER_VALUE \ | |
1678 | (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \ | |
1679 | GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \ | |
1680 | GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable)) | |
1681 | ||
1085fdc6 AP |
1682 | static int vgic_its_create(struct kvm_device *dev, u32 type) |
1683 | { | |
1684 | struct vgic_its *its; | |
1685 | ||
1686 | if (type != KVM_DEV_TYPE_ARM_VGIC_ITS) | |
1687 | return -ENODEV; | |
1688 | ||
1689 | its = kzalloc(sizeof(struct vgic_its), GFP_KERNEL); | |
1690 | if (!its) | |
1691 | return -ENOMEM; | |
1692 | ||
74fe55dc MZ |
1693 | if (vgic_initialized(dev->kvm)) { |
1694 | int ret = vgic_v4_init(dev->kvm); | |
3d1ad640 | 1695 | if (ret < 0) { |
74fe55dc MZ |
1696 | kfree(its); |
1697 | return ret; | |
1698 | } | |
1699 | } | |
1700 | ||
424c3383 AP |
1701 | mutex_init(&its->its_lock); |
1702 | mutex_init(&its->cmd_lock); | |
1703 | ||
1085fdc6 AP |
1704 | its->vgic_its_base = VGIC_ADDR_UNDEF; |
1705 | ||
424c3383 AP |
1706 | INIT_LIST_HEAD(&its->device_list); |
1707 | INIT_LIST_HEAD(&its->collection_list); | |
1708 | ||
79962a5c | 1709 | dev->kvm->arch.vgic.msis_require_devid = true; |
1085fdc6 | 1710 | dev->kvm->arch.vgic.has_its = true; |
1085fdc6 | 1711 | its->enabled = false; |
bb717644 | 1712 | its->dev = dev; |
1085fdc6 | 1713 | |
424c3383 AP |
1714 | its->baser_device_table = INITIAL_BASER_VALUE | |
1715 | ((u64)GITS_BASER_TYPE_DEVICE << GITS_BASER_TYPE_SHIFT); | |
1716 | its->baser_coll_table = INITIAL_BASER_VALUE | | |
1717 | ((u64)GITS_BASER_TYPE_COLLECTION << GITS_BASER_TYPE_SHIFT); | |
1718 | dev->kvm->arch.vgic.propbaser = INITIAL_PROPBASER_VALUE; | |
1719 | ||
1085fdc6 AP |
1720 | dev->private = its; |
1721 | ||
71afe470 | 1722 | return vgic_its_set_abi(its, NR_ITS_ABIS - 1); |
1085fdc6 AP |
1723 | } |
1724 | ||
1725 | static void vgic_its_destroy(struct kvm_device *kvm_dev) | |
1726 | { | |
424c3383 | 1727 | struct kvm *kvm = kvm_dev->kvm; |
1085fdc6 | 1728 | struct vgic_its *its = kvm_dev->private; |
424c3383 AP |
1729 | |
1730 | mutex_lock(&its->its_lock); | |
a2b19e6e | 1731 | |
2f609a03 | 1732 | vgic_its_free_device_list(kvm, its); |
1733 | vgic_its_free_collection_list(kvm, its); | |
424c3383 | 1734 | |
424c3383 | 1735 | mutex_unlock(&its->its_lock); |
1085fdc6 AP |
1736 | kfree(its); |
1737 | } | |
1738 | ||
876ae234 EA |
1739 | int vgic_its_has_attr_regs(struct kvm_device *dev, |
1740 | struct kvm_device_attr *attr) | |
1741 | { | |
8331c23c EA |
1742 | const struct vgic_register_region *region; |
1743 | gpa_t offset = attr->attr; | |
1744 | int align; | |
1745 | ||
1746 | align = (offset < GITS_TYPER) || (offset >= GITS_PIDR4) ? 0x3 : 0x7; | |
1747 | ||
1748 | if (offset & align) | |
1749 | return -EINVAL; | |
1750 | ||
1751 | region = vgic_find_mmio_region(its_registers, | |
1752 | ARRAY_SIZE(its_registers), | |
1753 | offset); | |
1754 | if (!region) | |
1755 | return -ENXIO; | |
1756 | ||
1757 | return 0; | |
876ae234 EA |
1758 | } |
1759 | ||
1760 | int vgic_its_attr_regs_access(struct kvm_device *dev, | |
1761 | struct kvm_device_attr *attr, | |
1762 | u64 *reg, bool is_write) | |
1763 | { | |
8331c23c EA |
1764 | const struct vgic_register_region *region; |
1765 | struct vgic_its *its; | |
1766 | gpa_t addr, offset; | |
1767 | unsigned int len; | |
1768 | int align, ret = 0; | |
1769 | ||
1770 | its = dev->private; | |
1771 | offset = attr->attr; | |
1772 | ||
1773 | /* | |
1774 | * Although the spec supports upper/lower 32-bit accesses to | |
1775 | * 64-bit ITS registers, the userspace ABI requires 64-bit | |
1776 | * accesses to all 64-bit wide registers. We therefore only | |
1777 | * support 32-bit accesses to GITS_CTLR, GITS_IIDR and GITS ID | |
1778 | * registers | |
1779 | */ | |
1780 | if ((offset < GITS_TYPER) || (offset >= GITS_PIDR4)) | |
1781 | align = 0x3; | |
1782 | else | |
1783 | align = 0x7; | |
1784 | ||
1785 | if (offset & align) | |
1786 | return -EINVAL; | |
1787 | ||
1788 | mutex_lock(&dev->kvm->lock); | |
1789 | ||
1790 | if (IS_VGIC_ADDR_UNDEF(its->vgic_its_base)) { | |
1791 | ret = -ENXIO; | |
1792 | goto out; | |
1793 | } | |
1794 | ||
1795 | region = vgic_find_mmio_region(its_registers, | |
1796 | ARRAY_SIZE(its_registers), | |
1797 | offset); | |
1798 | if (!region) { | |
1799 | ret = -ENXIO; | |
1800 | goto out; | |
1801 | } | |
1802 | ||
1803 | if (!lock_all_vcpus(dev->kvm)) { | |
1804 | ret = -EBUSY; | |
1805 | goto out; | |
1806 | } | |
1807 | ||
1808 | addr = its->vgic_its_base + offset; | |
1809 | ||
1810 | len = region->access_flags & VGIC_ACCESS_64bit ? 8 : 4; | |
1811 | ||
1812 | if (is_write) { | |
1813 | if (region->uaccess_its_write) | |
1814 | ret = region->uaccess_its_write(dev->kvm, its, addr, | |
1815 | len, *reg); | |
1816 | else | |
1817 | region->its_write(dev->kvm, its, addr, len, *reg); | |
1818 | } else { | |
1819 | *reg = region->its_read(dev->kvm, its, addr, len); | |
1820 | } | |
1821 | unlock_all_vcpus(dev->kvm); | |
1822 | out: | |
1823 | mutex_unlock(&dev->kvm->lock); | |
1824 | return ret; | |
876ae234 EA |
1825 | } |
1826 | ||
57a9a117 EA |
1827 | static u32 compute_next_devid_offset(struct list_head *h, |
1828 | struct its_device *dev) | |
920a7a8f EA |
1829 | { |
1830 | struct its_device *next; | |
1831 | u32 next_offset; | |
1832 | ||
1833 | if (list_is_last(&dev->dev_list, h)) | |
1834 | return 0; | |
1835 | next = list_next_entry(dev, dev_list); | |
1836 | next_offset = next->device_id - dev->device_id; | |
1837 | ||
1838 | return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET); | |
1839 | } | |
1840 | ||
eff484e0 | 1841 | static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite) |
920a7a8f EA |
1842 | { |
1843 | struct its_ite *next; | |
1844 | u32 next_offset; | |
1845 | ||
1846 | if (list_is_last(&ite->ite_list, h)) | |
1847 | return 0; | |
1848 | next = list_next_entry(ite, ite_list); | |
1849 | next_offset = next->event_id - ite->event_id; | |
1850 | ||
1851 | return min_t(u32, next_offset, VITS_ITE_MAX_EVENTID_OFFSET); | |
1852 | } | |
1853 | ||
1854 | /** | |
1855 | * entry_fn_t - Callback called on a table entry restore path | |
1856 | * @its: its handle | |
1857 | * @id: id of the entry | |
1858 | * @entry: pointer to the entry | |
1859 | * @opaque: pointer to an opaque data | |
1860 | * | |
1861 | * Return: < 0 on error, 0 if last element was identified, id offset to next | |
1862 | * element otherwise | |
1863 | */ | |
1864 | typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, | |
1865 | void *opaque); | |
1866 | ||
1867 | /** | |
1868 | * scan_its_table - Scan a contiguous table in guest RAM and applies a function | |
1869 | * to each entry | |
1870 | * | |
1871 | * @its: its handle | |
1872 | * @base: base gpa of the table | |
1873 | * @size: size of the table in bytes | |
1874 | * @esz: entry size in bytes | |
1875 | * @start_id: the ID of the first entry in the table | |
1876 | * (non zero for 2d level tables) | |
1877 | * @fn: function to apply on each entry | |
1878 | * | |
1879 | * Return: < 0 on error, 0 if last element was identified, 1 otherwise | |
1880 | * (the last element may not be found on second level tables) | |
1881 | */ | |
57a9a117 EA |
1882 | static int scan_its_table(struct vgic_its *its, gpa_t base, int size, int esz, |
1883 | int start_id, entry_fn_t fn, void *opaque) | |
920a7a8f | 1884 | { |
920a7a8f EA |
1885 | struct kvm *kvm = its->dev->kvm; |
1886 | unsigned long len = size; | |
1887 | int id = start_id; | |
1888 | gpa_t gpa = base; | |
8c1a8a32 | 1889 | char entry[esz]; |
920a7a8f EA |
1890 | int ret; |
1891 | ||
8c1a8a32 CD |
1892 | memset(entry, 0, esz); |
1893 | ||
920a7a8f EA |
1894 | while (len > 0) { |
1895 | int next_offset; | |
1896 | size_t byte_offset; | |
1897 | ||
bd065cd2 | 1898 | ret = kvm_read_guest_lock(kvm, gpa, entry, esz); |
920a7a8f | 1899 | if (ret) |
8c1a8a32 | 1900 | return ret; |
920a7a8f EA |
1901 | |
1902 | next_offset = fn(its, id, entry, opaque); | |
8c1a8a32 CD |
1903 | if (next_offset <= 0) |
1904 | return next_offset; | |
920a7a8f EA |
1905 | |
1906 | byte_offset = next_offset * esz; | |
1907 | id += next_offset; | |
1908 | gpa += byte_offset; | |
1909 | len -= byte_offset; | |
1910 | } | |
8c1a8a32 | 1911 | return 1; |
920a7a8f EA |
1912 | } |
1913 | ||
eff484e0 EA |
1914 | /** |
1915 | * vgic_its_save_ite - Save an interrupt translation entry at @gpa | |
1916 | */ | |
1917 | static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, | |
1918 | struct its_ite *ite, gpa_t gpa, int ite_esz) | |
1919 | { | |
1920 | struct kvm *kvm = its->dev->kvm; | |
1921 | u32 next_offset; | |
1922 | u64 val; | |
1923 | ||
1924 | next_offset = compute_next_eventid_offset(&dev->itt_head, ite); | |
1925 | val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) | | |
7c7d2fa1 | 1926 | ((u64)ite->irq->intid << KVM_ITS_ITE_PINTID_SHIFT) | |
eff484e0 EA |
1927 | ite->collection->collection_id; |
1928 | val = cpu_to_le64(val); | |
1929 | return kvm_write_guest(kvm, gpa, &val, ite_esz); | |
1930 | } | |
1931 | ||
1932 | /** | |
1933 | * vgic_its_restore_ite - restore an interrupt translation entry | |
1934 | * @event_id: id used for indexing | |
1935 | * @ptr: pointer to the ITE entry | |
1936 | * @opaque: pointer to the its_device | |
1937 | */ | |
1938 | static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id, | |
1939 | void *ptr, void *opaque) | |
1940 | { | |
1941 | struct its_device *dev = (struct its_device *)opaque; | |
1942 | struct its_collection *collection; | |
1943 | struct kvm *kvm = its->dev->kvm; | |
1944 | struct kvm_vcpu *vcpu = NULL; | |
1945 | u64 val; | |
1946 | u64 *p = (u64 *)ptr; | |
1947 | struct vgic_irq *irq; | |
1948 | u32 coll_id, lpi_id; | |
1949 | struct its_ite *ite; | |
1950 | u32 offset; | |
1951 | ||
1952 | val = *p; | |
1953 | ||
1954 | val = le64_to_cpu(val); | |
1955 | ||
1956 | coll_id = val & KVM_ITS_ITE_ICID_MASK; | |
1957 | lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT; | |
1958 | ||
1959 | if (!lpi_id) | |
1960 | return 1; /* invalid entry, no choice but to scan next entry */ | |
1961 | ||
1962 | if (lpi_id < VGIC_MIN_LPI) | |
1963 | return -EINVAL; | |
1964 | ||
1965 | offset = val >> KVM_ITS_ITE_NEXT_SHIFT; | |
1966 | if (event_id + offset >= BIT_ULL(dev->num_eventid_bits)) | |
1967 | return -EINVAL; | |
1968 | ||
1969 | collection = find_collection(its, coll_id); | |
1970 | if (!collection) | |
1971 | return -EINVAL; | |
1972 | ||
7c7d2fa1 | 1973 | ite = vgic_its_alloc_ite(dev, collection, event_id); |
eff484e0 EA |
1974 | if (IS_ERR(ite)) |
1975 | return PTR_ERR(ite); | |
1976 | ||
1977 | if (its_is_collection_mapped(collection)) | |
1978 | vcpu = kvm_get_vcpu(kvm, collection->target_addr); | |
1979 | ||
1980 | irq = vgic_add_lpi(kvm, lpi_id, vcpu); | |
1981 | if (IS_ERR(irq)) | |
1982 | return PTR_ERR(irq); | |
1983 | ite->irq = irq; | |
1984 | ||
1985 | return offset; | |
1986 | } | |
1987 | ||
1988 | static int vgic_its_ite_cmp(void *priv, struct list_head *a, | |
1989 | struct list_head *b) | |
1990 | { | |
1991 | struct its_ite *itea = container_of(a, struct its_ite, ite_list); | |
1992 | struct its_ite *iteb = container_of(b, struct its_ite, ite_list); | |
1993 | ||
1994 | if (itea->event_id < iteb->event_id) | |
1995 | return -1; | |
1996 | else | |
1997 | return 1; | |
1998 | } | |
1999 | ||
57a9a117 EA |
2000 | static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device) |
2001 | { | |
eff484e0 EA |
2002 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2003 | gpa_t base = device->itt_addr; | |
2004 | struct its_ite *ite; | |
2005 | int ret; | |
2006 | int ite_esz = abi->ite_esz; | |
2007 | ||
2008 | list_sort(NULL, &device->itt_head, vgic_its_ite_cmp); | |
2009 | ||
2010 | list_for_each_entry(ite, &device->itt_head, ite_list) { | |
2011 | gpa_t gpa = base + ite->event_id * ite_esz; | |
2012 | ||
bd94e7ae MZ |
2013 | /* |
2014 | * If an LPI carries the HW bit, this means that this | |
2015 | * interrupt is controlled by GICv4, and we do not | |
2016 | * have direct access to that state. Let's simply fail | |
2017 | * the save operation... | |
2018 | */ | |
2019 | if (ite->irq->hw) | |
2020 | return -EACCES; | |
2021 | ||
eff484e0 EA |
2022 | ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz); |
2023 | if (ret) | |
2024 | return ret; | |
2025 | } | |
2026 | return 0; | |
57a9a117 EA |
2027 | } |
2028 | ||
b9238262 | 2029 | /** |
2030 | * vgic_its_restore_itt - restore the ITT of a device | |
2031 | * | |
2032 | * @its: its handle | |
2033 | * @dev: device handle | |
2034 | * | |
2035 | * Return 0 on success, < 0 on error | |
2036 | */ | |
57a9a117 EA |
2037 | static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) |
2038 | { | |
eff484e0 EA |
2039 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2040 | gpa_t base = dev->itt_addr; | |
2041 | int ret; | |
2042 | int ite_esz = abi->ite_esz; | |
2043 | size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz; | |
2044 | ||
2045 | ret = scan_its_table(its, base, max_size, ite_esz, 0, | |
2046 | vgic_its_restore_ite, dev); | |
2047 | ||
b9238262 | 2048 | /* scan_its_table returns +1 if all ITEs are invalid */ |
2049 | if (ret > 0) | |
2050 | ret = 0; | |
2051 | ||
eff484e0 | 2052 | return ret; |
57a9a117 EA |
2053 | } |
2054 | ||
2055 | /** | |
2056 | * vgic_its_save_dte - Save a device table entry at a given GPA | |
2057 | * | |
2058 | * @its: ITS handle | |
2059 | * @dev: ITS device | |
2060 | * @ptr: GPA | |
2061 | */ | |
2062 | static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev, | |
2063 | gpa_t ptr, int dte_esz) | |
2064 | { | |
2065 | struct kvm *kvm = its->dev->kvm; | |
2066 | u64 val, itt_addr_field; | |
2067 | u32 next_offset; | |
2068 | ||
2069 | itt_addr_field = dev->itt_addr >> 8; | |
2070 | next_offset = compute_next_devid_offset(&its->device_list, dev); | |
2071 | val = (1ULL << KVM_ITS_DTE_VALID_SHIFT | | |
2072 | ((u64)next_offset << KVM_ITS_DTE_NEXT_SHIFT) | | |
2073 | (itt_addr_field << KVM_ITS_DTE_ITTADDR_SHIFT) | | |
2074 | (dev->num_eventid_bits - 1)); | |
2075 | val = cpu_to_le64(val); | |
2076 | return kvm_write_guest(kvm, ptr, &val, dte_esz); | |
2077 | } | |
2078 | ||
2079 | /** | |
2080 | * vgic_its_restore_dte - restore a device table entry | |
2081 | * | |
2082 | * @its: its handle | |
2083 | * @id: device id the DTE corresponds to | |
2084 | * @ptr: kernel VA where the 8 byte DTE is located | |
2085 | * @opaque: unused | |
2086 | * | |
2087 | * Return: < 0 on error, 0 if the dte is the last one, id offset to the | |
2088 | * next dte otherwise | |
2089 | */ | |
2090 | static int vgic_its_restore_dte(struct vgic_its *its, u32 id, | |
2091 | void *ptr, void *opaque) | |
2092 | { | |
2093 | struct its_device *dev; | |
2094 | gpa_t itt_addr; | |
2095 | u8 num_eventid_bits; | |
2096 | u64 entry = *(u64 *)ptr; | |
2097 | bool valid; | |
2098 | u32 offset; | |
2099 | int ret; | |
2100 | ||
2101 | entry = le64_to_cpu(entry); | |
2102 | ||
2103 | valid = entry >> KVM_ITS_DTE_VALID_SHIFT; | |
2104 | num_eventid_bits = (entry & KVM_ITS_DTE_SIZE_MASK) + 1; | |
2105 | itt_addr = ((entry & KVM_ITS_DTE_ITTADDR_MASK) | |
2106 | >> KVM_ITS_DTE_ITTADDR_SHIFT) << 8; | |
2107 | ||
2108 | if (!valid) | |
2109 | return 1; | |
2110 | ||
2111 | /* dte entry is valid */ | |
2112 | offset = (entry & KVM_ITS_DTE_NEXT_MASK) >> KVM_ITS_DTE_NEXT_SHIFT; | |
2113 | ||
2114 | dev = vgic_its_alloc_device(its, id, itt_addr, num_eventid_bits); | |
2115 | if (IS_ERR(dev)) | |
2116 | return PTR_ERR(dev); | |
2117 | ||
2118 | ret = vgic_its_restore_itt(its, dev); | |
a2b19e6e CD |
2119 | if (ret) { |
2120 | vgic_its_free_device(its->dev->kvm, dev); | |
57a9a117 | 2121 | return ret; |
a2b19e6e | 2122 | } |
57a9a117 EA |
2123 | |
2124 | return offset; | |
2125 | } | |
2126 | ||
2127 | static int vgic_its_device_cmp(void *priv, struct list_head *a, | |
2128 | struct list_head *b) | |
2129 | { | |
2130 | struct its_device *deva = container_of(a, struct its_device, dev_list); | |
2131 | struct its_device *devb = container_of(b, struct its_device, dev_list); | |
2132 | ||
2133 | if (deva->device_id < devb->device_id) | |
2134 | return -1; | |
2135 | else | |
2136 | return 1; | |
2137 | } | |
2138 | ||
3b65808f EA |
2139 | /** |
2140 | * vgic_its_save_device_tables - Save the device table and all ITT | |
2141 | * into guest RAM | |
57a9a117 EA |
2142 | * |
2143 | * L1/L2 handling is hidden by vgic_its_check_id() helper which directly | |
2144 | * returns the GPA of the device entry | |
3b65808f EA |
2145 | */ |
2146 | static int vgic_its_save_device_tables(struct vgic_its *its) | |
2147 | { | |
57a9a117 | 2148 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2149 | u64 baser = its->baser_device_table; |
57a9a117 EA |
2150 | struct its_device *dev; |
2151 | int dte_esz = abi->dte_esz; | |
57a9a117 | 2152 | |
c2385eaa EA |
2153 | if (!(baser & GITS_BASER_VALID)) |
2154 | return 0; | |
57a9a117 EA |
2155 | |
2156 | list_sort(NULL, &its->device_list, vgic_its_device_cmp); | |
2157 | ||
2158 | list_for_each_entry(dev, &its->device_list, dev_list) { | |
2159 | int ret; | |
2160 | gpa_t eaddr; | |
2161 | ||
2162 | if (!vgic_its_check_id(its, baser, | |
2163 | dev->device_id, &eaddr)) | |
2164 | return -EINVAL; | |
2165 | ||
2166 | ret = vgic_its_save_itt(its, dev); | |
2167 | if (ret) | |
2168 | return ret; | |
2169 | ||
2170 | ret = vgic_its_save_dte(its, dev, eaddr, dte_esz); | |
2171 | if (ret) | |
2172 | return ret; | |
2173 | } | |
2174 | return 0; | |
2175 | } | |
2176 | ||
2177 | /** | |
2178 | * handle_l1_dte - callback used for L1 device table entries (2 stage case) | |
2179 | * | |
2180 | * @its: its handle | |
2181 | * @id: index of the entry in the L1 table | |
2182 | * @addr: kernel VA | |
2183 | * @opaque: unused | |
2184 | * | |
2185 | * L1 table entries are scanned by steps of 1 entry | |
2186 | * Return < 0 if error, 0 if last dte was found when scanning the L2 | |
2187 | * table, +1 otherwise (meaning next L1 entry must be scanned) | |
2188 | */ | |
2189 | static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, | |
2190 | void *opaque) | |
2191 | { | |
2192 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2193 | int l2_start_id = id * (SZ_64K / abi->dte_esz); | |
2194 | u64 entry = *(u64 *)addr; | |
2195 | int dte_esz = abi->dte_esz; | |
2196 | gpa_t gpa; | |
2197 | int ret; | |
2198 | ||
2199 | entry = le64_to_cpu(entry); | |
2200 | ||
2201 | if (!(entry & KVM_ITS_L1E_VALID_MASK)) | |
2202 | return 1; | |
2203 | ||
2204 | gpa = entry & KVM_ITS_L1E_ADDR_MASK; | |
2205 | ||
2206 | ret = scan_its_table(its, gpa, SZ_64K, dte_esz, | |
2207 | l2_start_id, vgic_its_restore_dte, NULL); | |
2208 | ||
b9238262 | 2209 | return ret; |
3b65808f EA |
2210 | } |
2211 | ||
2212 | /** | |
2213 | * vgic_its_restore_device_tables - Restore the device table and all ITT | |
2214 | * from guest RAM to internal data structs | |
2215 | */ | |
2216 | static int vgic_its_restore_device_tables(struct vgic_its *its) | |
2217 | { | |
57a9a117 EA |
2218 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
2219 | u64 baser = its->baser_device_table; | |
2220 | int l1_esz, ret; | |
2221 | int l1_tbl_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; | |
2222 | gpa_t l1_gpa; | |
2223 | ||
2224 | if (!(baser & GITS_BASER_VALID)) | |
2225 | return 0; | |
2226 | ||
2227 | l1_gpa = BASER_ADDRESS(baser); | |
2228 | ||
2229 | if (baser & GITS_BASER_INDIRECT) { | |
2230 | l1_esz = GITS_LVL1_ENTRY_SIZE; | |
2231 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2232 | handle_l1_dte, NULL); | |
2233 | } else { | |
2234 | l1_esz = abi->dte_esz; | |
2235 | ret = scan_its_table(its, l1_gpa, l1_tbl_size, l1_esz, 0, | |
2236 | vgic_its_restore_dte, NULL); | |
2237 | } | |
2238 | ||
b9238262 | 2239 | /* scan_its_table returns +1 if all entries are invalid */ |
57a9a117 | 2240 | if (ret > 0) |
b9238262 | 2241 | ret = 0; |
57a9a117 EA |
2242 | |
2243 | return ret; | |
3b65808f EA |
2244 | } |
2245 | ||
ea1ad53e EA |
2246 | static int vgic_its_save_cte(struct vgic_its *its, |
2247 | struct its_collection *collection, | |
2248 | gpa_t gpa, int esz) | |
2249 | { | |
2250 | u64 val; | |
2251 | ||
2252 | val = (1ULL << KVM_ITS_CTE_VALID_SHIFT | | |
2253 | ((u64)collection->target_addr << KVM_ITS_CTE_RDBASE_SHIFT) | | |
2254 | collection->collection_id); | |
2255 | val = cpu_to_le64(val); | |
2256 | return kvm_write_guest(its->dev->kvm, gpa, &val, esz); | |
2257 | } | |
2258 | ||
2259 | static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) | |
2260 | { | |
2261 | struct its_collection *collection; | |
2262 | struct kvm *kvm = its->dev->kvm; | |
2263 | u32 target_addr, coll_id; | |
2264 | u64 val; | |
2265 | int ret; | |
2266 | ||
2267 | BUG_ON(esz > sizeof(val)); | |
bd065cd2 | 2268 | ret = kvm_read_guest_lock(kvm, gpa, &val, esz); |
ea1ad53e EA |
2269 | if (ret) |
2270 | return ret; | |
2271 | val = le64_to_cpu(val); | |
2272 | if (!(val & KVM_ITS_CTE_VALID_MASK)) | |
2273 | return 0; | |
2274 | ||
2275 | target_addr = (u32)(val >> KVM_ITS_CTE_RDBASE_SHIFT); | |
2276 | coll_id = val & KVM_ITS_CTE_ICID_MASK; | |
2277 | ||
2278 | if (target_addr >= atomic_read(&kvm->online_vcpus)) | |
2279 | return -EINVAL; | |
2280 | ||
2281 | collection = find_collection(its, coll_id); | |
2282 | if (collection) | |
2283 | return -EEXIST; | |
2284 | ret = vgic_its_alloc_collection(its, &collection, coll_id); | |
2285 | if (ret) | |
2286 | return ret; | |
2287 | collection->target_addr = target_addr; | |
2288 | return 1; | |
2289 | } | |
2290 | ||
3b65808f EA |
2291 | /** |
2292 | * vgic_its_save_collection_table - Save the collection table into | |
2293 | * guest RAM | |
2294 | */ | |
2295 | static int vgic_its_save_collection_table(struct vgic_its *its) | |
2296 | { | |
ea1ad53e | 2297 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa EA |
2298 | u64 baser = its->baser_coll_table; |
2299 | gpa_t gpa = BASER_ADDRESS(baser); | |
ea1ad53e EA |
2300 | struct its_collection *collection; |
2301 | u64 val; | |
ea1ad53e EA |
2302 | size_t max_size, filled = 0; |
2303 | int ret, cte_esz = abi->cte_esz; | |
2304 | ||
c2385eaa | 2305 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2306 | return 0; |
2307 | ||
c2385eaa | 2308 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2309 | |
2310 | list_for_each_entry(collection, &its->collection_list, coll_list) { | |
2311 | ret = vgic_its_save_cte(its, collection, gpa, cte_esz); | |
2312 | if (ret) | |
2313 | return ret; | |
2314 | gpa += cte_esz; | |
2315 | filled += cte_esz; | |
2316 | } | |
2317 | ||
2318 | if (filled == max_size) | |
2319 | return 0; | |
2320 | ||
2321 | /* | |
2322 | * table is not fully filled, add a last dummy element | |
2323 | * with valid bit unset | |
2324 | */ | |
2325 | val = 0; | |
2326 | BUG_ON(cte_esz > sizeof(val)); | |
2327 | ret = kvm_write_guest(its->dev->kvm, gpa, &val, cte_esz); | |
2328 | return ret; | |
3b65808f EA |
2329 | } |
2330 | ||
2331 | /** | |
2332 | * vgic_its_restore_collection_table - reads the collection table | |
2333 | * in guest memory and restores the ITS internal state. Requires the | |
2334 | * BASER registers to be restored before. | |
2335 | */ | |
2336 | static int vgic_its_restore_collection_table(struct vgic_its *its) | |
2337 | { | |
ea1ad53e | 2338 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); |
c2385eaa | 2339 | u64 baser = its->baser_coll_table; |
ea1ad53e EA |
2340 | int cte_esz = abi->cte_esz; |
2341 | size_t max_size, read = 0; | |
2342 | gpa_t gpa; | |
2343 | int ret; | |
2344 | ||
c2385eaa | 2345 | if (!(baser & GITS_BASER_VALID)) |
ea1ad53e EA |
2346 | return 0; |
2347 | ||
c2385eaa | 2348 | gpa = BASER_ADDRESS(baser); |
ea1ad53e | 2349 | |
c2385eaa | 2350 | max_size = GITS_BASER_NR_PAGES(baser) * SZ_64K; |
ea1ad53e EA |
2351 | |
2352 | while (read < max_size) { | |
2353 | ret = vgic_its_restore_cte(its, gpa, cte_esz); | |
2354 | if (ret <= 0) | |
2355 | break; | |
2356 | gpa += cte_esz; | |
2357 | read += cte_esz; | |
2358 | } | |
f31b98b5 EA |
2359 | |
2360 | if (ret > 0) | |
2361 | return 0; | |
2362 | ||
ea1ad53e | 2363 | return ret; |
3b65808f EA |
2364 | } |
2365 | ||
71afe470 EA |
2366 | /** |
2367 | * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM | |
2368 | * according to v0 ABI | |
2369 | */ | |
2370 | static int vgic_its_save_tables_v0(struct vgic_its *its) | |
2371 | { | |
3b65808f EA |
2372 | int ret; |
2373 | ||
3b65808f EA |
2374 | ret = vgic_its_save_device_tables(its); |
2375 | if (ret) | |
3eb4271b | 2376 | return ret; |
3b65808f | 2377 | |
3eb4271b | 2378 | return vgic_its_save_collection_table(its); |
71afe470 EA |
2379 | } |
2380 | ||
2381 | /** | |
2382 | * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM | |
2383 | * to internal data structs according to V0 ABI | |
2384 | * | |
2385 | */ | |
2386 | static int vgic_its_restore_tables_v0(struct vgic_its *its) | |
2387 | { | |
3b65808f EA |
2388 | int ret; |
2389 | ||
3b65808f EA |
2390 | ret = vgic_its_restore_collection_table(its); |
2391 | if (ret) | |
3eb4271b | 2392 | return ret; |
3b65808f | 2393 | |
3eb4271b | 2394 | return vgic_its_restore_device_tables(its); |
71afe470 EA |
2395 | } |
2396 | ||
2397 | static int vgic_its_commit_v0(struct vgic_its *its) | |
2398 | { | |
2399 | const struct vgic_its_abi *abi; | |
2400 | ||
2401 | abi = vgic_its_get_abi(its); | |
2402 | its->baser_coll_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2403 | its->baser_device_table &= ~GITS_BASER_ENTRY_SIZE_MASK; | |
2404 | ||
2405 | its->baser_coll_table |= (GIC_ENCODE_SZ(abi->cte_esz, 5) | |
2406 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2407 | ||
2408 | its->baser_device_table |= (GIC_ENCODE_SZ(abi->dte_esz, 5) | |
2409 | << GITS_BASER_ENTRY_SIZE_SHIFT); | |
2410 | return 0; | |
2411 | } | |
2412 | ||
3eb4271b EA |
2413 | static void vgic_its_reset(struct kvm *kvm, struct vgic_its *its) |
2414 | { | |
2415 | /* We need to keep the ABI specific field values */ | |
2416 | its->baser_coll_table &= ~GITS_BASER_VALID; | |
2417 | its->baser_device_table &= ~GITS_BASER_VALID; | |
2418 | its->cbaser = 0; | |
2419 | its->creadr = 0; | |
2420 | its->cwriter = 0; | |
2421 | its->enabled = 0; | |
2422 | vgic_its_free_device_list(kvm, its); | |
2423 | vgic_its_free_collection_list(kvm, its); | |
2424 | } | |
2425 | ||
1085fdc6 AP |
2426 | static int vgic_its_has_attr(struct kvm_device *dev, |
2427 | struct kvm_device_attr *attr) | |
2428 | { | |
2429 | switch (attr->group) { | |
2430 | case KVM_DEV_ARM_VGIC_GRP_ADDR: | |
2431 | switch (attr->attr) { | |
2432 | case KVM_VGIC_ITS_ADDR_TYPE: | |
2433 | return 0; | |
2434 | } | |
2435 | break; | |
2436 | case KVM_DEV_ARM_VGIC_GRP_CTRL: | |
2437 | switch (attr->attr) { | |
2438 | case KVM_DEV_ARM_VGIC_CTRL_INIT: | |
2439 | return 0; | |
3eb4271b EA |
2440 | case KVM_DEV_ARM_ITS_CTRL_RESET: |
2441 | return 0; | |
3b65808f EA |
2442 | case KVM_DEV_ARM_ITS_SAVE_TABLES: |
2443 | return 0; | |
2444 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2445 | return 0; | |
1085fdc6 AP |
2446 | } |
2447 | break; | |
876ae234 EA |
2448 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: |
2449 | return vgic_its_has_attr_regs(dev, attr); | |
1085fdc6 AP |
2450 | } |
2451 | return -ENXIO; | |
2452 | } | |
2453 | ||
3eb4271b EA |
2454 | static int vgic_its_ctrl(struct kvm *kvm, struct vgic_its *its, u64 attr) |
2455 | { | |
2456 | const struct vgic_its_abi *abi = vgic_its_get_abi(its); | |
2457 | int ret = 0; | |
2458 | ||
2459 | if (attr == KVM_DEV_ARM_VGIC_CTRL_INIT) /* Nothing to do */ | |
2460 | return 0; | |
2461 | ||
2462 | mutex_lock(&kvm->lock); | |
2463 | mutex_lock(&its->its_lock); | |
2464 | ||
2465 | if (!lock_all_vcpus(kvm)) { | |
2466 | mutex_unlock(&its->its_lock); | |
2467 | mutex_unlock(&kvm->lock); | |
2468 | return -EBUSY; | |
2469 | } | |
2470 | ||
2471 | switch (attr) { | |
2472 | case KVM_DEV_ARM_ITS_CTRL_RESET: | |
2473 | vgic_its_reset(kvm, its); | |
2474 | break; | |
2475 | case KVM_DEV_ARM_ITS_SAVE_TABLES: | |
2476 | ret = abi->save_tables(its); | |
2477 | break; | |
2478 | case KVM_DEV_ARM_ITS_RESTORE_TABLES: | |
2479 | ret = abi->restore_tables(its); | |
2480 | break; | |
2481 | } | |
2482 | ||
2483 | unlock_all_vcpus(kvm); | |
2484 | mutex_unlock(&its->its_lock); | |
2485 | mutex_unlock(&kvm->lock); | |
2486 | return ret; | |
2487 | } | |
2488 | ||
1085fdc6 AP |
2489 | static int vgic_its_set_attr(struct kvm_device *dev, |
2490 | struct kvm_device_attr *attr) | |
2491 | { | |
2492 | struct vgic_its *its = dev->private; | |
2493 | int ret; | |
2494 | ||
2495 | switch (attr->group) { | |
2496 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2497 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2498 | unsigned long type = (unsigned long)attr->attr; | |
2499 | u64 addr; | |
2500 | ||
2501 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2502 | return -ENODEV; | |
2503 | ||
1085fdc6 AP |
2504 | if (copy_from_user(&addr, uaddr, sizeof(addr))) |
2505 | return -EFAULT; | |
2506 | ||
2507 | ret = vgic_check_ioaddr(dev->kvm, &its->vgic_its_base, | |
2508 | addr, SZ_64K); | |
2509 | if (ret) | |
2510 | return ret; | |
2511 | ||
30e1b684 | 2512 | return vgic_register_its_iodev(dev->kvm, its, addr); |
1085fdc6 | 2513 | } |
3eb4271b EA |
2514 | case KVM_DEV_ARM_VGIC_GRP_CTRL: |
2515 | return vgic_its_ctrl(dev->kvm, its, attr->attr); | |
876ae234 EA |
2516 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { |
2517 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2518 | u64 reg; | |
2519 | ||
2520 | if (get_user(reg, uaddr)) | |
2521 | return -EFAULT; | |
2522 | ||
2523 | return vgic_its_attr_regs_access(dev, attr, ®, true); | |
2524 | } | |
1085fdc6 AP |
2525 | } |
2526 | return -ENXIO; | |
2527 | } | |
2528 | ||
2529 | static int vgic_its_get_attr(struct kvm_device *dev, | |
2530 | struct kvm_device_attr *attr) | |
2531 | { | |
2532 | switch (attr->group) { | |
2533 | case KVM_DEV_ARM_VGIC_GRP_ADDR: { | |
2534 | struct vgic_its *its = dev->private; | |
2535 | u64 addr = its->vgic_its_base; | |
2536 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2537 | unsigned long type = (unsigned long)attr->attr; | |
2538 | ||
2539 | if (type != KVM_VGIC_ITS_ADDR_TYPE) | |
2540 | return -ENODEV; | |
2541 | ||
2542 | if (copy_to_user(uaddr, &addr, sizeof(addr))) | |
2543 | return -EFAULT; | |
2544 | break; | |
876ae234 EA |
2545 | } |
2546 | case KVM_DEV_ARM_VGIC_GRP_ITS_REGS: { | |
2547 | u64 __user *uaddr = (u64 __user *)(long)attr->addr; | |
2548 | u64 reg; | |
2549 | int ret; | |
2550 | ||
2551 | ret = vgic_its_attr_regs_access(dev, attr, ®, false); | |
2552 | if (ret) | |
2553 | return ret; | |
2554 | return put_user(reg, uaddr); | |
2555 | } | |
1085fdc6 AP |
2556 | default: |
2557 | return -ENXIO; | |
2558 | } | |
1085fdc6 AP |
2559 | |
2560 | return 0; | |
2561 | } | |
2562 | ||
2563 | static struct kvm_device_ops kvm_arm_vgic_its_ops = { | |
2564 | .name = "kvm-arm-vgic-its", | |
2565 | .create = vgic_its_create, | |
2566 | .destroy = vgic_its_destroy, | |
2567 | .set_attr = vgic_its_set_attr, | |
2568 | .get_attr = vgic_its_get_attr, | |
2569 | .has_attr = vgic_its_has_attr, | |
2570 | }; | |
2571 | ||
2572 | int kvm_vgic_register_its_device(void) | |
2573 | { | |
2574 | return kvm_register_device_ops(&kvm_arm_vgic_its_ops, | |
2575 | KVM_DEV_TYPE_ARM_VGIC_ITS); | |
2576 | } |