[mirror_ubuntu-zesty-kernel.git] / virt / kvm / arm / vgic / vgic-kvm-device.c

/*
 * VGIC: KVM DEVICE API
 *
 * Copyright (C) 2015 ARM Ltd.
 * Author: Marc Zyngier <marc.zyngier@arm.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
#include <linux/kvm_host.h>
#include <kvm/arm_vgic.h>
#include <linux/uaccess.h>
#include <asm/kvm_mmu.h>
#include "vgic.h"

/* common helpers */

int vgic_check_ioaddr(struct kvm *kvm, phys_addr_t *ioaddr,
		      phys_addr_t addr, phys_addr_t alignment)
{
	if (addr & ~KVM_PHYS_MASK)
		return -E2BIG;

	if (!IS_ALIGNED(addr, alignment))
		return -EINVAL;

	if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
		return -EEXIST;

	return 0;
}

/**
 * kvm_vgic_addr - set or get vgic VM base addresses
 * @kvm:   pointer to the vm struct
 * @type:  the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
 * @addr:  pointer to address value
 * @write: if true set the address in the VM address space, if false read the
 *          address
 *
 * Set or get the vgic base addresses for the distributor and the virtual CPU
 * interface in the VM physical address space.  These addresses are properties
 * of the emulated core/SoC and therefore user space initially knows this
 * information.
 * Check them for sanity (alignment, double assignment). We can't check for
 * overlapping regions in case of a virtual GICv3 here, since we don't know
 * the number of VCPUs yet, so we defer this check to map_resources().
 */
int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
{
	int r = 0;
	struct vgic_dist *vgic = &kvm->arch.vgic;
	int type_needed;
	phys_addr_t *addr_ptr, alignment;

	mutex_lock(&kvm->lock);
	switch (type) {
	case KVM_VGIC_V2_ADDR_TYPE_DIST:
		type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
		addr_ptr = &vgic->vgic_dist_base;
		alignment = SZ_4K;
		break;
	case KVM_VGIC_V2_ADDR_TYPE_CPU:
		type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
		addr_ptr = &vgic->vgic_cpu_base;
		alignment = SZ_4K;
		break;
	case KVM_VGIC_V3_ADDR_TYPE_DIST:
		type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
		addr_ptr = &vgic->vgic_dist_base;
		alignment = SZ_64K;
		break;
	case KVM_VGIC_V3_ADDR_TYPE_REDIST:
		type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
		addr_ptr = &vgic->vgic_redist_base;
		alignment = SZ_64K;
		break;
	default:
		r = -ENODEV;
		goto out;
	}

	if (vgic->vgic_model != type_needed) {
		r = -ENODEV;
		goto out;
	}

	if (write) {
		r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment);
		if (!r)
			*addr_ptr = *addr;
	} else {
		*addr = *addr_ptr;
	}

out:
	mutex_unlock(&kvm->lock);
	return r;
}

static int vgic_set_common_attr(struct kvm_device *dev,
				struct kvm_device_attr *attr)
{
	int r;

	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
		u64 addr;
		unsigned long type = (unsigned long)attr->attr;

		if (copy_from_user(&addr, uaddr, sizeof(addr)))
			return -EFAULT;

		r = kvm_vgic_addr(dev->kvm, type, &addr, true);
		return (r == -ENODEV) ? -ENXIO : r;
	}
	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
		u32 __user *uaddr = (u32 __user *)(long)attr->addr;
		u32 val;
		int ret = 0;

		if (get_user(val, uaddr))
			return -EFAULT;

		/*
		 * We require:
		 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
		 * - at most 1024 interrupts
		 * - a multiple of 32 interrupts
		 */
		if (val < (VGIC_NR_PRIVATE_IRQS + 32) ||
		    val > VGIC_MAX_RESERVED ||
		    (val & 31))
			return -EINVAL;

		mutex_lock(&dev->kvm->lock);

		if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis)
			ret = -EBUSY;
		else
			dev->kvm->arch.vgic.nr_spis =
				val - VGIC_NR_PRIVATE_IRQS;

		mutex_unlock(&dev->kvm->lock);

		return ret;
	}
	case KVM_DEV_ARM_VGIC_GRP_CTRL: {
		switch (attr->attr) {
		case KVM_DEV_ARM_VGIC_CTRL_INIT:
			mutex_lock(&dev->kvm->lock);
			r = vgic_init(dev->kvm);
			mutex_unlock(&dev->kvm->lock);
			return r;
		}
		break;
	}
	}

	return -ENXIO;
}

static int vgic_get_common_attr(struct kvm_device *dev,
				struct kvm_device_attr *attr)
{
	int r = -ENXIO;

	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
		u64 __user *uaddr = (u64 __user *)(long)attr->addr;
		u64 addr;
		unsigned long type = (unsigned long)attr->attr;

		r = kvm_vgic_addr(dev->kvm, type, &addr, false);
		if (r)
			return (r == -ENODEV) ? -ENXIO : r;

		if (copy_to_user(uaddr, &addr, sizeof(addr)))
			return -EFAULT;
		break;
	}
	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
		u32 __user *uaddr = (u32 __user *)(long)attr->addr;

		r = put_user(dev->kvm->arch.vgic.nr_spis +
			     VGIC_NR_PRIVATE_IRQS, uaddr);
		break;
	}
	}

	return r;
}

static int vgic_create(struct kvm_device *dev, u32 type)
{
	return kvm_vgic_create(dev->kvm, type);
}

static void vgic_destroy(struct kvm_device *dev)
{
	kfree(dev);
}

int kvm_register_vgic_device(unsigned long type)
{
	int ret = -ENODEV;

	switch (type) {
	case KVM_DEV_TYPE_ARM_VGIC_V2:
		ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
					      KVM_DEV_TYPE_ARM_VGIC_V2);
		break;
	case KVM_DEV_TYPE_ARM_VGIC_V3:
		ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
					      KVM_DEV_TYPE_ARM_VGIC_V3);

		if (ret)
			break;
		ret = kvm_vgic_register_its_device();
		break;
	}

	return ret;
}

struct vgic_reg_attr {
	struct kvm_vcpu *vcpu;
	gpa_t addr;
};

static int parse_vgic_v2_attr(struct kvm_device *dev,
			      struct kvm_device_attr *attr,
			      struct vgic_reg_attr *reg_attr)
{
	int cpuid;

	cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
		 KVM_DEV_ARM_VGIC_CPUID_SHIFT;

	if (cpuid >= atomic_read(&dev->kvm->online_vcpus))
		return -EINVAL;

	reg_attr->vcpu = kvm_get_vcpu(dev->kvm, cpuid);
	reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;

	return 0;
}

/* unlocks vcpus from @vcpu_lock_idx and smaller */
static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)
{
	struct kvm_vcpu *tmp_vcpu;

	for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) {
		tmp_vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx);
		mutex_unlock(&tmp_vcpu->mutex);
	}
}

static void unlock_all_vcpus(struct kvm *kvm)
{
	unlock_vcpus(kvm, atomic_read(&kvm->online_vcpus) - 1);
}

/* Returns true if all vcpus were locked, false otherwise */
static bool lock_all_vcpus(struct kvm *kvm)
{
	struct kvm_vcpu *tmp_vcpu;
	int c;

	/*
	 * Any time a vcpu is run, vcpu_load is called which tries to grab the
	 * vcpu->mutex.  By grabbing the vcpu->mutex of all VCPUs we ensure
	 * that no other VCPUs are run and fiddle with the vgic state while we
	 * access it.
	 */
	kvm_for_each_vcpu(c, tmp_vcpu, kvm) {
		if (!mutex_trylock(&tmp_vcpu->mutex)) {
			unlock_vcpus(kvm, c - 1);
			return false;
		}
	}

	return true;
}

/**
 * vgic_attr_regs_access_v2 - allows user space to access VGIC v2 state
 *
 * @dev:      kvm device handle
 * @attr:     kvm device attribute
 * @reg:      address the value is read or written
 * @is_write: true if userspace is writing a register
 */
static int vgic_attr_regs_access_v2(struct kvm_device *dev,
				    struct kvm_device_attr *attr,
				    u32 *reg, bool is_write)
{
	struct vgic_reg_attr reg_attr;
	gpa_t addr;
	struct kvm_vcpu *vcpu;
	int ret;

	ret = parse_vgic_v2_attr(dev, attr, &reg_attr);
	if (ret)
		return ret;

	vcpu = reg_attr.vcpu;
	addr = reg_attr.addr;

	mutex_lock(&dev->kvm->lock);

	ret = vgic_init(dev->kvm);
	if (ret)
		goto out;

	if (!lock_all_vcpus(dev->kvm)) {
		ret = -EBUSY;
		goto out;
	}

	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
		ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, reg);
		break;
	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
		ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, reg);
		break;
	default:
		ret = -EINVAL;
		break;
	}

	unlock_all_vcpus(dev->kvm);
out:
	mutex_unlock(&dev->kvm->lock);
	return ret;
}

static int vgic_v2_set_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	int ret;

	ret = vgic_set_common_attr(dev, attr);
	if (ret != -ENXIO)
		return ret;

	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
		u32 __user *uaddr = (u32 __user *)(long)attr->addr;
		u32 reg;

		if (get_user(reg, uaddr))
			return -EFAULT;

		return vgic_attr_regs_access_v2(dev, attr, &reg, true);
	}
	}

	return -ENXIO;
}

static int vgic_v2_get_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	int ret;

	ret = vgic_get_common_attr(dev, attr);
	if (ret != -ENXIO)
		return ret;

	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
		u32 __user *uaddr = (u32 __user *)(long)attr->addr;
		u32 reg = 0;

		ret = vgic_attr_regs_access_v2(dev, attr, &reg, false);
		if (ret)
			return ret;
		return put_user(reg, uaddr);
	}
	}

	return -ENXIO;
}

static int vgic_v2_has_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_ADDR:
		switch (attr->attr) {
		case KVM_VGIC_V2_ADDR_TYPE_DIST:
		case KVM_VGIC_V2_ADDR_TYPE_CPU:
			return 0;
		}
		break;
	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
		return vgic_v2_has_attr_regs(dev, attr);
	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
		return 0;
	case KVM_DEV_ARM_VGIC_GRP_CTRL:
		switch (attr->attr) {
		case KVM_DEV_ARM_VGIC_CTRL_INIT:
			return 0;
		}
	}
	return -ENXIO;
}

struct kvm_device_ops kvm_arm_vgic_v2_ops = {
	.name = "kvm-arm-vgic-v2",
	.create = vgic_create,
	.destroy = vgic_destroy,
	.set_attr = vgic_v2_set_attr,
	.get_attr = vgic_v2_get_attr,
	.has_attr = vgic_v2_has_attr,
};

static int vgic_v3_set_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	return vgic_set_common_attr(dev, attr);
}

static int vgic_v3_get_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	return vgic_get_common_attr(dev, attr);
}

static int vgic_v3_has_attr(struct kvm_device *dev,
			    struct kvm_device_attr *attr)
{
	switch (attr->group) {
	case KVM_DEV_ARM_VGIC_GRP_ADDR:
		switch (attr->attr) {
		case KVM_VGIC_V3_ADDR_TYPE_DIST:
		case KVM_VGIC_V3_ADDR_TYPE_REDIST:
			return 0;
		}
		break;
	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
		return 0;
	case KVM_DEV_ARM_VGIC_GRP_CTRL:
		switch (attr->attr) {
		case KVM_DEV_ARM_VGIC_CTRL_INIT:
			return 0;
		}
	}
	return -ENXIO;
}

struct kvm_device_ops kvm_arm_vgic_v3_ops = {
	.name = "kvm-arm-vgic-v3",
	.create = vgic_create,
	.destroy = vgic_destroy,
	.set_attr = vgic_v3_set_attr,
	.get_attr = vgic_v3_get_attr,
	.has_attr = vgic_v3_has_attr,
};
Commit	Line	Data
c86c7721 EA	1	/*
	2	* VGIC: KVM DEVICE API
	3	*
	4	* Copyright (C) 2015 ARM Ltd.
	5	* Author: Marc Zyngier <marc.zyngier@arm.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16	#include <linux/kvm_host.h>
	17	#include <kvm/arm_vgic.h>
fca25602	18	#include <linux/uaccess.h>
e2c1f9ab	19	#include <asm/kvm_mmu.h>
fca25602	20	#include "vgic.h"
c86c7721 EA	21
	22	/* common helpers */
	23
1085fdc6 AP	24	int vgic_check_ioaddr(struct kvm kvm, phys_addr_t ioaddr,
1085fdc6 AP	25	phys_addr_t addr, phys_addr_t alignment)
e2c1f9ab EA	26	{
	27	if (addr & ~KVM_PHYS_MASK)
	28	return -E2BIG;
	29
	30	if (!IS_ALIGNED(addr, alignment))
	31	return -EINVAL;
	32
	33	if (!IS_VGIC_ADDR_UNDEF(*ioaddr))
	34	return -EEXIST;
	35
	36	return 0;
	37	}
	38
	39	/**
	40	* kvm_vgic_addr - set or get vgic VM base addresses
	41	* @kvm: pointer to the vm struct
	42	* @type: the VGIC addr type, one of KVM_VGIC_V[23]_ADDR_TYPE_XXX
	43	* @addr: pointer to address value
	44	* @write: if true set the address in the VM address space, if false read the
	45	* address
	46	*
	47	* Set or get the vgic base addresses for the distributor and the virtual CPU
	48	* interface in the VM physical address space. These addresses are properties
	49	* of the emulated core/SoC and therefore user space initially knows this
	50	* information.
	51	* Check them for sanity (alignment, double assignment). We can't check for
	52	* overlapping regions in case of a virtual GICv3 here, since we don't know
	53	* the number of VCPUs yet, so we defer this check to map_resources().
	54	*/
	55	int kvm_vgic_addr(struct kvm kvm, unsigned long type, u64 addr, bool write)
	56	{
	57	int r = 0;
	58	struct vgic_dist *vgic = &kvm->arch.vgic;
	59	int type_needed;
	60	phys_addr_t *addr_ptr, alignment;
	61
	62	mutex_lock(&kvm->lock);
	63	switch (type) {
	64	case KVM_VGIC_V2_ADDR_TYPE_DIST:
	65	type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
	66	addr_ptr = &vgic->vgic_dist_base;
	67	alignment = SZ_4K;
	68	break;
	69	case KVM_VGIC_V2_ADDR_TYPE_CPU:
	70	type_needed = KVM_DEV_TYPE_ARM_VGIC_V2;
	71	addr_ptr = &vgic->vgic_cpu_base;
	72	alignment = SZ_4K;
	73	break;
e2c1f9ab EA	74	case KVM_VGIC_V3_ADDR_TYPE_DIST:
	75	type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
	76	addr_ptr = &vgic->vgic_dist_base;
	77	alignment = SZ_64K;
	78	break;
	79	case KVM_VGIC_V3_ADDR_TYPE_REDIST:
	80	type_needed = KVM_DEV_TYPE_ARM_VGIC_V3;
	81	addr_ptr = &vgic->vgic_redist_base;
	82	alignment = SZ_64K;
	83	break;
e2c1f9ab EA	84	default:
	85	r = -ENODEV;
	86	goto out;
	87	}
	88
	89	if (vgic->vgic_model != type_needed) {
	90	r = -ENODEV;
	91	goto out;
	92	}
	93
	94	if (write) {
	95	r = vgic_check_ioaddr(kvm, addr_ptr, *addr, alignment);
	96	if (!r)
	97	addr_ptr = addr;
	98	} else {
	99	addr = addr_ptr;
	100	}
	101
	102	out:
	103	mutex_unlock(&kvm->lock);
	104	return r;
	105	}
	106
fca25602 EA	107	static int vgic_set_common_attr(struct kvm_device *dev,
	108	struct kvm_device_attr *attr)
	109	{
afcc7c50 EA	110	int r;
afcc7c50 EA	111
fca25602	112	switch (attr->group) {
e5c30294 EA	113	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
	114	u64 __user uaddr = (u64 __user )(long)attr->addr;
	115	u64 addr;
	116	unsigned long type = (unsigned long)attr->attr;
	117
	118	if (copy_from_user(&addr, uaddr, sizeof(addr)))
	119	return -EFAULT;
	120
	121	r = kvm_vgic_addr(dev->kvm, type, &addr, true);
	122	return (r == -ENODEV) ? -ENXIO : r;
	123	}
fca25602 EA	124	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
	125	u32 __user uaddr = (u32 __user )(long)attr->addr;
	126	u32 val;
	127	int ret = 0;
	128
	129	if (get_user(val, uaddr))
	130	return -EFAULT;
	131
	132	/*
	133	* We require:
	134	* - at least 32 SPIs on top of the 16 SGIs and 16 PPIs
	135	* - at most 1024 interrupts
	136	* - a multiple of 32 interrupts
	137	*/
	138	if (val < (VGIC_NR_PRIVATE_IRQS + 32) \|\|
	139	val > VGIC_MAX_RESERVED \|\|
	140	(val & 31))
	141	return -EINVAL;
	142
	143	mutex_lock(&dev->kvm->lock);
	144
	145	if (vgic_ready(dev->kvm) \|\| dev->kvm->arch.vgic.nr_spis)
	146	ret = -EBUSY;
	147	else
	148	dev->kvm->arch.vgic.nr_spis =
	149	val - VGIC_NR_PRIVATE_IRQS;
	150
	151	mutex_unlock(&dev->kvm->lock);
	152
	153	return ret;
	154	}
afcc7c50 EA	155	case KVM_DEV_ARM_VGIC_GRP_CTRL: {
	156	switch (attr->attr) {
	157	case KVM_DEV_ARM_VGIC_CTRL_INIT:
	158	mutex_lock(&dev->kvm->lock);
	159	r = vgic_init(dev->kvm);
	160	mutex_unlock(&dev->kvm->lock);
	161	return r;
	162	}
	163	break;
	164	}
fca25602 EA	165	}
	166
	167	return -ENXIO;
	168	}
	169
	170	static int vgic_get_common_attr(struct kvm_device *dev,
	171	struct kvm_device_attr *attr)
	172	{
	173	int r = -ENXIO;
	174
	175	switch (attr->group) {
e5c30294 EA	176	case KVM_DEV_ARM_VGIC_GRP_ADDR: {
	177	u64 __user uaddr = (u64 __user )(long)attr->addr;
	178	u64 addr;
	179	unsigned long type = (unsigned long)attr->attr;
	180
	181	r = kvm_vgic_addr(dev->kvm, type, &addr, false);
	182	if (r)
	183	return (r == -ENODEV) ? -ENXIO : r;
	184
	185	if (copy_to_user(uaddr, &addr, sizeof(addr)))
	186	return -EFAULT;
	187	break;
	188	}
fca25602 EA	189	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS: {
	190	u32 __user uaddr = (u32 __user )(long)attr->addr;
	191
	192	r = put_user(dev->kvm->arch.vgic.nr_spis +
	193	VGIC_NR_PRIVATE_IRQS, uaddr);
	194	break;
	195	}
	196	}
	197
	198	return r;
	199	}
	200
c86c7721 EA	201	static int vgic_create(struct kvm_device *dev, u32 type)
	202	{
	203	return kvm_vgic_create(dev->kvm, type);
	204	}
	205
	206	static void vgic_destroy(struct kvm_device *dev)
	207	{
	208	kfree(dev);
	209	}
	210
42c8870f	211	int kvm_register_vgic_device(unsigned long type)
c86c7721	212	{
42c8870f AP	213	int ret = -ENODEV;
42c8870f AP	214
c86c7721 EA	215	switch (type) {
c86c7721 EA	216	case KVM_DEV_TYPE_ARM_VGIC_V2:
42c8870f AP	217	ret = kvm_register_device_ops(&kvm_arm_vgic_v2_ops,
42c8870f AP	218	KVM_DEV_TYPE_ARM_VGIC_V2);
c86c7721	219	break;
c86c7721	220	case KVM_DEV_TYPE_ARM_VGIC_V3:
42c8870f AP	221	ret = kvm_register_device_ops(&kvm_arm_vgic_v3_ops,
42c8870f AP	222	KVM_DEV_TYPE_ARM_VGIC_V3);
7a1ff708	223
0e4e82f1 AP	224	if (ret)
	225	break;
	226	ret = kvm_vgic_register_its_device();
c86c7721	227	break;
c86c7721	228	}
42c8870f AP	229
42c8870f AP	230	return ret;
c86c7721 EA	231	}
c86c7721 EA	232
ba7b9169 CD	233	struct vgic_reg_attr {
	234	struct kvm_vcpu *vcpu;
	235	gpa_t addr;
	236	};
	237
	238	static int parse_vgic_v2_attr(struct kvm_device *dev,
	239	struct kvm_device_attr *attr,
	240	struct vgic_reg_attr *reg_attr)
	241	{
	242	int cpuid;
	243
	244	cpuid = (attr->attr & KVM_DEV_ARM_VGIC_CPUID_MASK) >>
	245	KVM_DEV_ARM_VGIC_CPUID_SHIFT;
	246
	247	if (cpuid >= atomic_read(&dev->kvm->online_vcpus))
	248	return -EINVAL;
	249
	250	reg_attr->vcpu = kvm_get_vcpu(dev->kvm, cpuid);
	251	reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK;
	252
	253	return 0;
	254	}
	255
	256	/* unlocks vcpus from @vcpu_lock_idx and smaller */
	257	static void unlock_vcpus(struct kvm *kvm, int vcpu_lock_idx)
	258	{
	259	struct kvm_vcpu *tmp_vcpu;
	260
	261	for (; vcpu_lock_idx >= 0; vcpu_lock_idx--) {
	262	tmp_vcpu = kvm_get_vcpu(kvm, vcpu_lock_idx);
	263	mutex_unlock(&tmp_vcpu->mutex);
	264	}
	265	}
	266
	267	static void unlock_all_vcpus(struct kvm *kvm)
	268	{
	269	unlock_vcpus(kvm, atomic_read(&kvm->online_vcpus) - 1);
	270	}
	271
	272	/* Returns true if all vcpus were locked, false otherwise */
	273	static bool lock_all_vcpus(struct kvm *kvm)
	274	{
	275	struct kvm_vcpu *tmp_vcpu;
	276	int c;
	277
	278	/*
	279	* Any time a vcpu is run, vcpu_load is called which tries to grab the
	280	* vcpu->mutex. By grabbing the vcpu->mutex of all VCPUs we ensure
	281	* that no other VCPUs are run and fiddle with the vgic state while we
	282	* access it.
	283	*/
	284	kvm_for_each_vcpu(c, tmp_vcpu, kvm) {
	285	if (!mutex_trylock(&tmp_vcpu->mutex)) {
	286	unlock_vcpus(kvm, c - 1);
	287	return false;
	288	}
	289	}
	290
	291	return true;
	292	}
	293
1fe00098 CD	294	/**
1fe00098 CD	295	* vgic_attr_regs_access_v2 - allows user space to access VGIC v2 state
f94591e2	296	*
1fe00098 CD	297	* @dev: kvm device handle
	298	* @attr: kvm device attribute
	299	* @reg: address the value is read or written
	300	* @is_write: true if userspace is writing a register
f94591e2	301	*/
1fe00098 CD	302	static int vgic_attr_regs_access_v2(struct kvm_device *dev,
	303	struct kvm_device_attr *attr,
	304	u32 *reg, bool is_write)
f94591e2	305	{
ba7b9169	306	struct vgic_reg_attr reg_attr;
7d450e28	307	gpa_t addr;
ba7b9169 CD	308	struct kvm_vcpu *vcpu;
ba7b9169 CD	309	int ret;
7d450e28	310
ba7b9169 CD	311	ret = parse_vgic_v2_attr(dev, attr, &reg_attr);
	312	if (ret)
	313	return ret;
	314
	315	vcpu = reg_attr.vcpu;
	316	addr = reg_attr.addr;
7d450e28 AP	317
	318	mutex_lock(&dev->kvm->lock);
	319
	320	ret = vgic_init(dev->kvm);
	321	if (ret)
	322	goto out;
	323
ba7b9169 CD	324	if (!lock_all_vcpus(dev->kvm)) {
ba7b9169 CD	325	ret = -EBUSY;
7d450e28 AP	326	goto out;
	327	}
	328
7d450e28 AP	329	switch (attr->group) {
7d450e28 AP	330	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
878c569e	331	ret = vgic_v2_cpuif_uaccess(vcpu, is_write, addr, reg);
7d450e28 AP	332	break;
	333	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	334	ret = vgic_v2_dist_uaccess(vcpu, is_write, addr, reg);
	335	break;
	336	default:
	337	ret = -EINVAL;
	338	break;
	339	}
	340
ba7b9169	341	unlock_all_vcpus(dev->kvm);
7d450e28	342	out:
7d450e28 AP	343	mutex_unlock(&dev->kvm->lock);
7d450e28 AP	344	return ret;
f94591e2 EA	345	}
f94591e2 EA	346
c86c7721 EA	347	static int vgic_v2_set_attr(struct kvm_device *dev,
	348	struct kvm_device_attr *attr)
	349	{
fca25602 EA	350	int ret;
	351
	352	ret = vgic_set_common_attr(dev, attr);
f94591e2 EA	353	if (ret != -ENXIO)
	354	return ret;
	355
	356	switch (attr->group) {
	357	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	358	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
	359	u32 __user uaddr = (u32 __user )(long)attr->addr;
	360	u32 reg;
	361
	362	if (get_user(reg, uaddr))
	363	return -EFAULT;
fca25602	364
1fe00098	365	return vgic_attr_regs_access_v2(dev, attr, &reg, true);
f94591e2 EA	366	}
	367	}
	368
	369	return -ENXIO;
c86c7721 EA	370	}
	371
	372	static int vgic_v2_get_attr(struct kvm_device *dev,
	373	struct kvm_device_attr *attr)
	374	{
fca25602 EA	375	int ret;
	376
	377	ret = vgic_get_common_attr(dev, attr);
f94591e2 EA	378	if (ret != -ENXIO)
	379	return ret;
	380
	381	switch (attr->group) {
	382	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	383	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS: {
	384	u32 __user uaddr = (u32 __user )(long)attr->addr;
	385	u32 reg = 0;
	386
1fe00098	387	ret = vgic_attr_regs_access_v2(dev, attr, &reg, false);
f94591e2 EA	388	if (ret)
	389	return ret;
	390	return put_user(reg, uaddr);
	391	}
	392	}
	393
	394	return -ENXIO;
c86c7721 EA	395	}
	396
	397	static int vgic_v2_has_attr(struct kvm_device *dev,
	398	struct kvm_device_attr *attr)
	399	{
fca25602	400	switch (attr->group) {
e5c30294 EA	401	case KVM_DEV_ARM_VGIC_GRP_ADDR:
	402	switch (attr->attr) {
	403	case KVM_VGIC_V2_ADDR_TYPE_DIST:
	404	case KVM_VGIC_V2_ADDR_TYPE_CPU:
	405	return 0;
	406	}
	407	break;
f94591e2 EA	408	case KVM_DEV_ARM_VGIC_GRP_DIST_REGS:
	409	case KVM_DEV_ARM_VGIC_GRP_CPU_REGS:
	410	return vgic_v2_has_attr_regs(dev, attr);
fca25602 EA	411	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
fca25602 EA	412	return 0;
afcc7c50 EA	413	case KVM_DEV_ARM_VGIC_GRP_CTRL:
	414	switch (attr->attr) {
	415	case KVM_DEV_ARM_VGIC_CTRL_INIT:
	416	return 0;
	417	}
fca25602	418	}
c86c7721 EA	419	return -ENXIO;
	420	}
	421
	422	struct kvm_device_ops kvm_arm_vgic_v2_ops = {
	423	.name = "kvm-arm-vgic-v2",
	424	.create = vgic_create,
	425	.destroy = vgic_destroy,
	426	.set_attr = vgic_v2_set_attr,
	427	.get_attr = vgic_v2_get_attr,
	428	.has_attr = vgic_v2_has_attr,
	429	};
	430
c86c7721 EA	431	static int vgic_v3_set_attr(struct kvm_device *dev,
	432	struct kvm_device_attr *attr)
	433	{
fca25602	434	return vgic_set_common_attr(dev, attr);
c86c7721 EA	435	}
	436
	437	static int vgic_v3_get_attr(struct kvm_device *dev,
	438	struct kvm_device_attr *attr)
	439	{
fca25602	440	return vgic_get_common_attr(dev, attr);
c86c7721 EA	441	}
	442
	443	static int vgic_v3_has_attr(struct kvm_device *dev,
	444	struct kvm_device_attr *attr)
	445	{
fca25602	446	switch (attr->group) {
e5c30294 EA	447	case KVM_DEV_ARM_VGIC_GRP_ADDR:
	448	switch (attr->attr) {
	449	case KVM_VGIC_V3_ADDR_TYPE_DIST:
	450	case KVM_VGIC_V3_ADDR_TYPE_REDIST:
	451	return 0;
	452	}
	453	break;
fca25602 EA	454	case KVM_DEV_ARM_VGIC_GRP_NR_IRQS:
fca25602 EA	455	return 0;
afcc7c50 EA	456	case KVM_DEV_ARM_VGIC_GRP_CTRL:
	457	switch (attr->attr) {
	458	case KVM_DEV_ARM_VGIC_CTRL_INIT:
	459	return 0;
	460	}
fca25602	461	}
c86c7721 EA	462	return -ENXIO;
	463	}
	464
	465	struct kvm_device_ops kvm_arm_vgic_v3_ops = {
	466	.name = "kvm-arm-vgic-v3",
	467	.create = vgic_create,
	468	.destroy = vgic_destroy,
	469	.set_attr = vgic_v3_set_attr,
	470	.get_attr = vgic_v3_get_attr,
	471	.has_attr = vgic_v3_has_attr,
	472	};