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64a959d6 CD |
1 | /* |
2 | * Copyright (C) 2015, 2016 ARM Ltd. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
41b87599 MR |
17 | #include <linux/interrupt.h> |
18 | #include <linux/irq.h> | |
64a959d6 CD |
19 | #include <linux/kvm.h> |
20 | #include <linux/kvm_host.h> | |
8e444745 | 21 | #include <linux/list_sort.h> |
41b87599 MR |
22 | #include <linux/nospec.h> |
23 | ||
771621b0 | 24 | #include <asm/kvm_hyp.h> |
64a959d6 CD |
25 | |
26 | #include "vgic.h" | |
27 | ||
81eeb95d | 28 | #define CREATE_TRACE_POINTS |
35d2d5d4 | 29 | #include "trace.h" |
81eeb95d CD |
30 | |
31 | #ifdef CONFIG_DEBUG_SPINLOCK | |
32 | #define DEBUG_SPINLOCK_BUG_ON(p) BUG_ON(p) | |
33 | #else | |
34 | #define DEBUG_SPINLOCK_BUG_ON(p) | |
35 | #endif | |
36 | ||
63d7c6af AB |
37 | struct vgic_global kvm_vgic_global_state __ro_after_init = { |
38 | .gicv3_cpuif = STATIC_KEY_FALSE_INIT, | |
39 | }; | |
64a959d6 | 40 | |
81eeb95d CD |
41 | /* |
42 | * Locking order is always: | |
abd72296 CD |
43 | * kvm->lock (mutex) |
44 | * its->cmd_lock (mutex) | |
45 | * its->its_lock (mutex) | |
46 | * vgic_cpu->ap_list_lock | |
47 | * kvm->lpi_list_lock | |
48 | * vgic_irq->irq_lock | |
81eeb95d | 49 | * |
424c3383 AP |
50 | * If you need to take multiple locks, always take the upper lock first, |
51 | * then the lower ones, e.g. first take the its_lock, then the irq_lock. | |
52 | * If you are already holding a lock and need to take a higher one, you | |
53 | * have to drop the lower ranking lock first and re-aquire it after having | |
54 | * taken the upper one. | |
81eeb95d CD |
55 | * |
56 | * When taking more than one ap_list_lock at the same time, always take the | |
57 | * lowest numbered VCPU's ap_list_lock first, so: | |
58 | * vcpuX->vcpu_id < vcpuY->vcpu_id: | |
59 | * spin_lock(vcpuX->arch.vgic_cpu.ap_list_lock); | |
60 | * spin_lock(vcpuY->arch.vgic_cpu.ap_list_lock); | |
006df0f3 CD |
61 | * |
62 | * Since the VGIC must support injecting virtual interrupts from ISRs, we have | |
63 | * to use the spin_lock_irqsave/spin_unlock_irqrestore versions of outer | |
64 | * spinlocks for any lock that may be taken while injecting an interrupt. | |
81eeb95d CD |
65 | */ |
66 | ||
3802411d AP |
67 | /* |
68 | * Iterate over the VM's list of mapped LPIs to find the one with a | |
69 | * matching interrupt ID and return a reference to the IRQ structure. | |
70 | */ | |
71 | static struct vgic_irq *vgic_get_lpi(struct kvm *kvm, u32 intid) | |
72 | { | |
73 | struct vgic_dist *dist = &kvm->arch.vgic; | |
74 | struct vgic_irq *irq = NULL; | |
75 | ||
76 | spin_lock(&dist->lpi_list_lock); | |
77 | ||
78 | list_for_each_entry(irq, &dist->lpi_list_head, lpi_list) { | |
79 | if (irq->intid != intid) | |
80 | continue; | |
81 | ||
82 | /* | |
83 | * This increases the refcount, the caller is expected to | |
84 | * call vgic_put_irq() later once it's finished with the IRQ. | |
85 | */ | |
d97594e6 | 86 | vgic_get_irq_kref(irq); |
3802411d AP |
87 | goto out_unlock; |
88 | } | |
89 | irq = NULL; | |
90 | ||
91 | out_unlock: | |
92 | spin_unlock(&dist->lpi_list_lock); | |
93 | ||
94 | return irq; | |
95 | } | |
96 | ||
97 | /* | |
98 | * This looks up the virtual interrupt ID to get the corresponding | |
99 | * struct vgic_irq. It also increases the refcount, so any caller is expected | |
100 | * to call vgic_put_irq() once it's finished with this IRQ. | |
101 | */ | |
64a959d6 CD |
102 | struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, |
103 | u32 intid) | |
104 | { | |
105 | /* SGIs and PPIs */ | |
41b87599 MR |
106 | if (intid <= VGIC_MAX_PRIVATE) { |
107 | intid = array_index_nospec(intid, VGIC_MAX_PRIVATE); | |
64a959d6 | 108 | return &vcpu->arch.vgic_cpu.private_irqs[intid]; |
41b87599 | 109 | } |
64a959d6 CD |
110 | |
111 | /* SPIs */ | |
41b87599 MR |
112 | if (intid <= VGIC_MAX_SPI) { |
113 | intid = array_index_nospec(intid, VGIC_MAX_SPI); | |
64a959d6 | 114 | return &kvm->arch.vgic.spis[intid - VGIC_NR_PRIVATE_IRQS]; |
41b87599 | 115 | } |
64a959d6 | 116 | |
3802411d | 117 | /* LPIs */ |
64a959d6 | 118 | if (intid >= VGIC_MIN_LPI) |
3802411d | 119 | return vgic_get_lpi(kvm, intid); |
64a959d6 CD |
120 | |
121 | WARN(1, "Looking up struct vgic_irq for reserved INTID"); | |
122 | return NULL; | |
123 | } | |
81eeb95d | 124 | |
3802411d AP |
125 | /* |
126 | * We can't do anything in here, because we lack the kvm pointer to | |
127 | * lock and remove the item from the lpi_list. So we keep this function | |
128 | * empty and use the return value of kref_put() to trigger the freeing. | |
129 | */ | |
5dd4b924 AP |
130 | static void vgic_irq_release(struct kref *ref) |
131 | { | |
5dd4b924 AP |
132 | } |
133 | ||
134 | void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq) | |
135 | { | |
2cccbb36 | 136 | struct vgic_dist *dist = &kvm->arch.vgic; |
3802411d | 137 | |
5dd4b924 AP |
138 | if (irq->intid < VGIC_MIN_LPI) |
139 | return; | |
140 | ||
2cccbb36 CD |
141 | spin_lock(&dist->lpi_list_lock); |
142 | if (!kref_put(&irq->refcount, vgic_irq_release)) { | |
143 | spin_unlock(&dist->lpi_list_lock); | |
3802411d | 144 | return; |
2cccbb36 | 145 | }; |
3802411d | 146 | |
3802411d AP |
147 | list_del(&irq->lpi_list); |
148 | dist->lpi_list_count--; | |
149 | spin_unlock(&dist->lpi_list_lock); | |
150 | ||
151 | kfree(irq); | |
5dd4b924 AP |
152 | } |
153 | ||
df635c5b CD |
154 | void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending) |
155 | { | |
156 | WARN_ON(irq_set_irqchip_state(irq->host_irq, | |
157 | IRQCHIP_STATE_PENDING, | |
158 | pending)); | |
159 | } | |
160 | ||
e40cc57b CD |
161 | bool vgic_get_phys_line_level(struct vgic_irq *irq) |
162 | { | |
163 | bool line_level; | |
164 | ||
165 | BUG_ON(!irq->hw); | |
166 | ||
b6909a65 CD |
167 | if (irq->get_input_level) |
168 | return irq->get_input_level(irq->intid); | |
169 | ||
e40cc57b CD |
170 | WARN_ON(irq_get_irqchip_state(irq->host_irq, |
171 | IRQCHIP_STATE_PENDING, | |
172 | &line_level)); | |
173 | return line_level; | |
174 | } | |
175 | ||
176 | /* Set/Clear the physical active state */ | |
177 | void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active) | |
178 | { | |
179 | ||
180 | BUG_ON(!irq->hw); | |
181 | WARN_ON(irq_set_irqchip_state(irq->host_irq, | |
182 | IRQCHIP_STATE_ACTIVE, | |
183 | active)); | |
184 | } | |
185 | ||
81eeb95d CD |
186 | /** |
187 | * kvm_vgic_target_oracle - compute the target vcpu for an irq | |
188 | * | |
189 | * @irq: The irq to route. Must be already locked. | |
190 | * | |
191 | * Based on the current state of the interrupt (enabled, pending, | |
192 | * active, vcpu and target_vcpu), compute the next vcpu this should be | |
193 | * given to. Return NULL if this shouldn't be injected at all. | |
194 | * | |
195 | * Requires the IRQ lock to be held. | |
196 | */ | |
197 | static struct kvm_vcpu *vgic_target_oracle(struct vgic_irq *irq) | |
198 | { | |
199 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
200 | ||
201 | /* If the interrupt is active, it must stay on the current vcpu */ | |
202 | if (irq->active) | |
203 | return irq->vcpu ? : irq->target_vcpu; | |
204 | ||
205 | /* | |
206 | * If the IRQ is not active but enabled and pending, we should direct | |
207 | * it to its configured target VCPU. | |
208 | * If the distributor is disabled, pending interrupts shouldn't be | |
209 | * forwarded. | |
210 | */ | |
8694e4da | 211 | if (irq->enabled && irq_is_pending(irq)) { |
81eeb95d CD |
212 | if (unlikely(irq->target_vcpu && |
213 | !irq->target_vcpu->kvm->arch.vgic.enabled)) | |
214 | return NULL; | |
215 | ||
216 | return irq->target_vcpu; | |
217 | } | |
218 | ||
219 | /* If neither active nor pending and enabled, then this IRQ should not | |
220 | * be queued to any VCPU. | |
221 | */ | |
222 | return NULL; | |
223 | } | |
224 | ||
8e444745 CD |
225 | /* |
226 | * The order of items in the ap_lists defines how we'll pack things in LRs as | |
227 | * well, the first items in the list being the first things populated in the | |
228 | * LRs. | |
229 | * | |
230 | * A hard rule is that active interrupts can never be pushed out of the LRs | |
231 | * (and therefore take priority) since we cannot reliably trap on deactivation | |
232 | * of IRQs and therefore they have to be present in the LRs. | |
233 | * | |
234 | * Otherwise things should be sorted by the priority field and the GIC | |
235 | * hardware support will take care of preemption of priority groups etc. | |
236 | * | |
237 | * Return negative if "a" sorts before "b", 0 to preserve order, and positive | |
238 | * to sort "b" before "a". | |
239 | */ | |
240 | static int vgic_irq_cmp(void *priv, struct list_head *a, struct list_head *b) | |
241 | { | |
242 | struct vgic_irq *irqa = container_of(a, struct vgic_irq, ap_list); | |
243 | struct vgic_irq *irqb = container_of(b, struct vgic_irq, ap_list); | |
244 | bool penda, pendb; | |
245 | int ret; | |
246 | ||
247 | spin_lock(&irqa->irq_lock); | |
248 | spin_lock_nested(&irqb->irq_lock, SINGLE_DEPTH_NESTING); | |
249 | ||
250 | if (irqa->active || irqb->active) { | |
251 | ret = (int)irqb->active - (int)irqa->active; | |
252 | goto out; | |
253 | } | |
254 | ||
8694e4da CD |
255 | penda = irqa->enabled && irq_is_pending(irqa); |
256 | pendb = irqb->enabled && irq_is_pending(irqb); | |
8e444745 CD |
257 | |
258 | if (!penda || !pendb) { | |
259 | ret = (int)pendb - (int)penda; | |
260 | goto out; | |
261 | } | |
262 | ||
263 | /* Both pending and enabled, sort by priority */ | |
264 | ret = irqa->priority - irqb->priority; | |
265 | out: | |
266 | spin_unlock(&irqb->irq_lock); | |
267 | spin_unlock(&irqa->irq_lock); | |
268 | return ret; | |
269 | } | |
270 | ||
271 | /* Must be called with the ap_list_lock held */ | |
272 | static void vgic_sort_ap_list(struct kvm_vcpu *vcpu) | |
273 | { | |
274 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
275 | ||
276 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); | |
277 | ||
278 | list_sort(NULL, &vgic_cpu->ap_list_head, vgic_irq_cmp); | |
279 | } | |
280 | ||
81eeb95d CD |
281 | /* |
282 | * Only valid injection if changing level for level-triggered IRQs or for a | |
cb3f0ad8 CD |
283 | * rising edge, and in-kernel connected IRQ lines can only be controlled by |
284 | * their owner. | |
81eeb95d | 285 | */ |
cb3f0ad8 | 286 | static bool vgic_validate_injection(struct vgic_irq *irq, bool level, void *owner) |
81eeb95d | 287 | { |
cb3f0ad8 CD |
288 | if (irq->owner != owner) |
289 | return false; | |
290 | ||
81eeb95d CD |
291 | switch (irq->config) { |
292 | case VGIC_CONFIG_LEVEL: | |
293 | return irq->line_level != level; | |
294 | case VGIC_CONFIG_EDGE: | |
295 | return level; | |
296 | } | |
297 | ||
298 | return false; | |
299 | } | |
300 | ||
301 | /* | |
302 | * Check whether an IRQ needs to (and can) be queued to a VCPU's ap list. | |
303 | * Do the queuing if necessary, taking the right locks in the right order. | |
304 | * Returns true when the IRQ was queued, false otherwise. | |
305 | * | |
306 | * Needs to be entered with the IRQ lock already held, but will return | |
307 | * with all locks dropped. | |
308 | */ | |
006df0f3 CD |
309 | bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, |
310 | unsigned long flags) | |
81eeb95d CD |
311 | { |
312 | struct kvm_vcpu *vcpu; | |
313 | ||
314 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
315 | ||
316 | retry: | |
317 | vcpu = vgic_target_oracle(irq); | |
318 | if (irq->vcpu || !vcpu) { | |
319 | /* | |
320 | * If this IRQ is already on a VCPU's ap_list, then it | |
321 | * cannot be moved or modified and there is no more work for | |
322 | * us to do. | |
323 | * | |
324 | * Otherwise, if the irq is not pending and enabled, it does | |
325 | * not need to be inserted into an ap_list and there is also | |
326 | * no more work for us to do. | |
327 | */ | |
006df0f3 | 328 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
d42c7970 SWL |
329 | |
330 | /* | |
331 | * We have to kick the VCPU here, because we could be | |
332 | * queueing an edge-triggered interrupt for which we | |
333 | * get no EOI maintenance interrupt. In that case, | |
334 | * while the IRQ is already on the VCPU's AP list, the | |
335 | * VCPU could have EOI'ed the original interrupt and | |
336 | * won't see this one until it exits for some other | |
337 | * reason. | |
338 | */ | |
325f9c64 AJ |
339 | if (vcpu) { |
340 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); | |
d42c7970 | 341 | kvm_vcpu_kick(vcpu); |
325f9c64 | 342 | } |
81eeb95d CD |
343 | return false; |
344 | } | |
345 | ||
346 | /* | |
347 | * We must unlock the irq lock to take the ap_list_lock where | |
348 | * we are going to insert this new pending interrupt. | |
349 | */ | |
006df0f3 | 350 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
81eeb95d CD |
351 | |
352 | /* someone can do stuff here, which we re-check below */ | |
353 | ||
006df0f3 | 354 | spin_lock_irqsave(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d CD |
355 | spin_lock(&irq->irq_lock); |
356 | ||
357 | /* | |
358 | * Did something change behind our backs? | |
359 | * | |
360 | * There are two cases: | |
361 | * 1) The irq lost its pending state or was disabled behind our | |
362 | * backs and/or it was queued to another VCPU's ap_list. | |
363 | * 2) Someone changed the affinity on this irq behind our | |
364 | * backs and we are now holding the wrong ap_list_lock. | |
365 | * | |
366 | * In both cases, drop the locks and retry. | |
367 | */ | |
368 | ||
369 | if (unlikely(irq->vcpu || vcpu != vgic_target_oracle(irq))) { | |
370 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 371 | spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d | 372 | |
006df0f3 | 373 | spin_lock_irqsave(&irq->irq_lock, flags); |
81eeb95d CD |
374 | goto retry; |
375 | } | |
376 | ||
5dd4b924 AP |
377 | /* |
378 | * Grab a reference to the irq to reflect the fact that it is | |
379 | * now in the ap_list. | |
380 | */ | |
381 | vgic_get_irq_kref(irq); | |
81eeb95d CD |
382 | list_add_tail(&irq->ap_list, &vcpu->arch.vgic_cpu.ap_list_head); |
383 | irq->vcpu = vcpu; | |
384 | ||
385 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 386 | spin_unlock_irqrestore(&vcpu->arch.vgic_cpu.ap_list_lock, flags); |
81eeb95d | 387 | |
325f9c64 | 388 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); |
81eeb95d CD |
389 | kvm_vcpu_kick(vcpu); |
390 | ||
391 | return true; | |
392 | } | |
393 | ||
11710dec CD |
394 | /** |
395 | * kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic | |
396 | * @kvm: The VM structure pointer | |
397 | * @cpuid: The CPU for PPIs | |
398 | * @intid: The INTID to inject a new state to. | |
399 | * @level: Edge-triggered: true: to trigger the interrupt | |
400 | * false: to ignore the call | |
401 | * Level-sensitive true: raise the input signal | |
402 | * false: lower the input signal | |
cb3f0ad8 CD |
403 | * @owner: The opaque pointer to the owner of the IRQ being raised to verify |
404 | * that the caller is allowed to inject this IRQ. Userspace | |
405 | * injections will have owner == NULL. | |
11710dec CD |
406 | * |
407 | * The VGIC is not concerned with devices being active-LOW or active-HIGH for | |
408 | * level-sensitive interrupts. You can think of the level parameter as 1 | |
409 | * being HIGH and 0 being LOW and all devices being active-HIGH. | |
410 | */ | |
411 | int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid, | |
cb3f0ad8 | 412 | bool level, void *owner) |
81eeb95d CD |
413 | { |
414 | struct kvm_vcpu *vcpu; | |
415 | struct vgic_irq *irq; | |
006df0f3 | 416 | unsigned long flags; |
81eeb95d CD |
417 | int ret; |
418 | ||
419 | trace_vgic_update_irq_pending(cpuid, intid, level); | |
420 | ||
ad275b8b EA |
421 | ret = vgic_lazy_init(kvm); |
422 | if (ret) | |
423 | return ret; | |
424 | ||
81eeb95d CD |
425 | vcpu = kvm_get_vcpu(kvm, cpuid); |
426 | if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS) | |
427 | return -EINVAL; | |
428 | ||
429 | irq = vgic_get_irq(kvm, vcpu, intid); | |
430 | if (!irq) | |
431 | return -EINVAL; | |
432 | ||
006df0f3 | 433 | spin_lock_irqsave(&irq->irq_lock, flags); |
81eeb95d | 434 | |
cb3f0ad8 | 435 | if (!vgic_validate_injection(irq, level, owner)) { |
81eeb95d | 436 | /* Nothing to see here, move along... */ |
006df0f3 | 437 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 438 | vgic_put_irq(kvm, irq); |
81eeb95d CD |
439 | return 0; |
440 | } | |
441 | ||
8694e4da | 442 | if (irq->config == VGIC_CONFIG_LEVEL) |
81eeb95d | 443 | irq->line_level = level; |
8694e4da CD |
444 | else |
445 | irq->pending_latch = true; | |
81eeb95d | 446 | |
006df0f3 | 447 | vgic_queue_irq_unlock(kvm, irq, flags); |
5dd4b924 | 448 | vgic_put_irq(kvm, irq); |
81eeb95d CD |
449 | |
450 | return 0; | |
451 | } | |
452 | ||
47bbd31f EA |
453 | /* @irq->irq_lock must be held */ |
454 | static int kvm_vgic_map_irq(struct kvm_vcpu *vcpu, struct vgic_irq *irq, | |
b6909a65 CD |
455 | unsigned int host_irq, |
456 | bool (*get_input_level)(int vindid)) | |
568e8c90 | 457 | { |
47bbd31f EA |
458 | struct irq_desc *desc; |
459 | struct irq_data *data; | |
460 | ||
461 | /* | |
462 | * Find the physical IRQ number corresponding to @host_irq | |
463 | */ | |
464 | desc = irq_to_desc(host_irq); | |
465 | if (!desc) { | |
466 | kvm_err("%s: no interrupt descriptor\n", __func__); | |
467 | return -EINVAL; | |
468 | } | |
469 | data = irq_desc_get_irq_data(desc); | |
470 | while (data->parent_data) | |
471 | data = data->parent_data; | |
472 | ||
473 | irq->hw = true; | |
474 | irq->host_irq = host_irq; | |
475 | irq->hwintid = data->hwirq; | |
b6909a65 | 476 | irq->get_input_level = get_input_level; |
47bbd31f EA |
477 | return 0; |
478 | } | |
479 | ||
480 | /* @irq->irq_lock must be held */ | |
481 | static inline void kvm_vgic_unmap_irq(struct vgic_irq *irq) | |
482 | { | |
483 | irq->hw = false; | |
484 | irq->hwintid = 0; | |
b6909a65 | 485 | irq->get_input_level = NULL; |
47bbd31f EA |
486 | } |
487 | ||
488 | int kvm_vgic_map_phys_irq(struct kvm_vcpu *vcpu, unsigned int host_irq, | |
b6909a65 | 489 | u32 vintid, bool (*get_input_level)(int vindid)) |
47bbd31f EA |
490 | { |
491 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
006df0f3 | 492 | unsigned long flags; |
47bbd31f | 493 | int ret; |
568e8c90 AP |
494 | |
495 | BUG_ON(!irq); | |
496 | ||
006df0f3 | 497 | spin_lock_irqsave(&irq->irq_lock, flags); |
b6909a65 | 498 | ret = kvm_vgic_map_irq(vcpu, irq, host_irq, get_input_level); |
006df0f3 | 499 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 500 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 | 501 | |
47bbd31f | 502 | return ret; |
568e8c90 AP |
503 | } |
504 | ||
413aa807 CD |
505 | /** |
506 | * kvm_vgic_reset_mapped_irq - Reset a mapped IRQ | |
507 | * @vcpu: The VCPU pointer | |
508 | * @vintid: The INTID of the interrupt | |
509 | * | |
510 | * Reset the active and pending states of a mapped interrupt. Kernel | |
511 | * subsystems injecting mapped interrupts should reset their interrupt lines | |
512 | * when we are doing a reset of the VM. | |
513 | */ | |
514 | void kvm_vgic_reset_mapped_irq(struct kvm_vcpu *vcpu, u32 vintid) | |
515 | { | |
516 | struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); | |
517 | unsigned long flags; | |
518 | ||
519 | if (!irq->hw) | |
520 | goto out; | |
521 | ||
522 | spin_lock_irqsave(&irq->irq_lock, flags); | |
523 | irq->active = false; | |
524 | irq->pending_latch = false; | |
525 | irq->line_level = false; | |
526 | spin_unlock_irqrestore(&irq->irq_lock, flags); | |
527 | out: | |
528 | vgic_put_irq(vcpu->kvm, irq); | |
529 | } | |
530 | ||
47bbd31f | 531 | int kvm_vgic_unmap_phys_irq(struct kvm_vcpu *vcpu, unsigned int vintid) |
568e8c90 | 532 | { |
5dd4b924 | 533 | struct vgic_irq *irq; |
006df0f3 | 534 | unsigned long flags; |
568e8c90 AP |
535 | |
536 | if (!vgic_initialized(vcpu->kvm)) | |
537 | return -EAGAIN; | |
538 | ||
47bbd31f | 539 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
5dd4b924 AP |
540 | BUG_ON(!irq); |
541 | ||
006df0f3 | 542 | spin_lock_irqsave(&irq->irq_lock, flags); |
47bbd31f | 543 | kvm_vgic_unmap_irq(irq); |
006df0f3 | 544 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 545 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 AP |
546 | |
547 | return 0; | |
548 | } | |
549 | ||
c6ccd30e CD |
550 | /** |
551 | * kvm_vgic_set_owner - Set the owner of an interrupt for a VM | |
552 | * | |
553 | * @vcpu: Pointer to the VCPU (used for PPIs) | |
554 | * @intid: The virtual INTID identifying the interrupt (PPI or SPI) | |
555 | * @owner: Opaque pointer to the owner | |
556 | * | |
557 | * Returns 0 if intid is not already used by another in-kernel device and the | |
558 | * owner is set, otherwise returns an error code. | |
559 | */ | |
560 | int kvm_vgic_set_owner(struct kvm_vcpu *vcpu, unsigned int intid, void *owner) | |
561 | { | |
562 | struct vgic_irq *irq; | |
7465894e | 563 | unsigned long flags; |
c6ccd30e CD |
564 | int ret = 0; |
565 | ||
566 | if (!vgic_initialized(vcpu->kvm)) | |
567 | return -EAGAIN; | |
568 | ||
569 | /* SGIs and LPIs cannot be wired up to any device */ | |
570 | if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid)) | |
571 | return -EINVAL; | |
572 | ||
573 | irq = vgic_get_irq(vcpu->kvm, vcpu, intid); | |
7465894e | 574 | spin_lock_irqsave(&irq->irq_lock, flags); |
c6ccd30e CD |
575 | if (irq->owner && irq->owner != owner) |
576 | ret = -EEXIST; | |
577 | else | |
578 | irq->owner = owner; | |
7465894e | 579 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
c6ccd30e CD |
580 | |
581 | return ret; | |
582 | } | |
583 | ||
0919e84c MZ |
584 | /** |
585 | * vgic_prune_ap_list - Remove non-relevant interrupts from the list | |
586 | * | |
587 | * @vcpu: The VCPU pointer | |
588 | * | |
589 | * Go over the list of "interesting" interrupts, and prune those that we | |
590 | * won't have to consider in the near future. | |
591 | */ | |
592 | static void vgic_prune_ap_list(struct kvm_vcpu *vcpu) | |
593 | { | |
594 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
595 | struct vgic_irq *irq, *tmp; | |
006df0f3 | 596 | unsigned long flags; |
0919e84c MZ |
597 | |
598 | retry: | |
006df0f3 | 599 | spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
600 | |
601 | list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) { | |
602 | struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB; | |
bf9a4137 | 603 | bool target_vcpu_needs_kick = false; |
0919e84c MZ |
604 | |
605 | spin_lock(&irq->irq_lock); | |
606 | ||
607 | BUG_ON(vcpu != irq->vcpu); | |
608 | ||
609 | target_vcpu = vgic_target_oracle(irq); | |
610 | ||
611 | if (!target_vcpu) { | |
612 | /* | |
613 | * We don't need to process this interrupt any | |
614 | * further, move it off the list. | |
615 | */ | |
616 | list_del(&irq->ap_list); | |
617 | irq->vcpu = NULL; | |
618 | spin_unlock(&irq->irq_lock); | |
5dd4b924 AP |
619 | |
620 | /* | |
621 | * This vgic_put_irq call matches the | |
622 | * vgic_get_irq_kref in vgic_queue_irq_unlock, | |
623 | * where we added the LPI to the ap_list. As | |
624 | * we remove the irq from the list, we drop | |
625 | * also drop the refcount. | |
626 | */ | |
627 | vgic_put_irq(vcpu->kvm, irq); | |
0919e84c MZ |
628 | continue; |
629 | } | |
630 | ||
631 | if (target_vcpu == vcpu) { | |
632 | /* We're on the right CPU */ | |
633 | spin_unlock(&irq->irq_lock); | |
634 | continue; | |
635 | } | |
636 | ||
637 | /* This interrupt looks like it has to be migrated. */ | |
638 | ||
639 | spin_unlock(&irq->irq_lock); | |
006df0f3 | 640 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
641 | |
642 | /* | |
643 | * Ensure locking order by always locking the smallest | |
644 | * ID first. | |
645 | */ | |
646 | if (vcpu->vcpu_id < target_vcpu->vcpu_id) { | |
647 | vcpuA = vcpu; | |
648 | vcpuB = target_vcpu; | |
649 | } else { | |
650 | vcpuA = target_vcpu; | |
651 | vcpuB = vcpu; | |
652 | } | |
653 | ||
006df0f3 | 654 | spin_lock_irqsave(&vcpuA->arch.vgic_cpu.ap_list_lock, flags); |
0919e84c MZ |
655 | spin_lock_nested(&vcpuB->arch.vgic_cpu.ap_list_lock, |
656 | SINGLE_DEPTH_NESTING); | |
657 | spin_lock(&irq->irq_lock); | |
658 | ||
659 | /* | |
660 | * If the affinity has been preserved, move the | |
661 | * interrupt around. Otherwise, it means things have | |
662 | * changed while the interrupt was unlocked, and we | |
663 | * need to replay this. | |
664 | * | |
665 | * In all cases, we cannot trust the list not to have | |
666 | * changed, so we restart from the beginning. | |
667 | */ | |
668 | if (target_vcpu == vgic_target_oracle(irq)) { | |
669 | struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu; | |
670 | ||
671 | list_del(&irq->ap_list); | |
672 | irq->vcpu = target_vcpu; | |
673 | list_add_tail(&irq->ap_list, &new_cpu->ap_list_head); | |
bf9a4137 | 674 | target_vcpu_needs_kick = true; |
0919e84c MZ |
675 | } |
676 | ||
677 | spin_unlock(&irq->irq_lock); | |
678 | spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock); | |
006df0f3 | 679 | spin_unlock_irqrestore(&vcpuA->arch.vgic_cpu.ap_list_lock, flags); |
bf9a4137 AP |
680 | |
681 | if (target_vcpu_needs_kick) { | |
682 | kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu); | |
683 | kvm_vcpu_kick(target_vcpu); | |
684 | } | |
685 | ||
0919e84c MZ |
686 | goto retry; |
687 | } | |
688 | ||
006df0f3 | 689 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
0919e84c MZ |
690 | } |
691 | ||
0919e84c MZ |
692 | static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu) |
693 | { | |
59529f69 MZ |
694 | if (kvm_vgic_global_state.type == VGIC_V2) |
695 | vgic_v2_fold_lr_state(vcpu); | |
696 | else | |
697 | vgic_v3_fold_lr_state(vcpu); | |
0919e84c MZ |
698 | } |
699 | ||
700 | /* Requires the irq_lock to be held. */ | |
701 | static inline void vgic_populate_lr(struct kvm_vcpu *vcpu, | |
702 | struct vgic_irq *irq, int lr) | |
703 | { | |
704 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock)); | |
140b086d | 705 | |
59529f69 MZ |
706 | if (kvm_vgic_global_state.type == VGIC_V2) |
707 | vgic_v2_populate_lr(vcpu, irq, lr); | |
708 | else | |
709 | vgic_v3_populate_lr(vcpu, irq, lr); | |
0919e84c MZ |
710 | } |
711 | ||
712 | static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr) | |
713 | { | |
59529f69 MZ |
714 | if (kvm_vgic_global_state.type == VGIC_V2) |
715 | vgic_v2_clear_lr(vcpu, lr); | |
716 | else | |
717 | vgic_v3_clear_lr(vcpu, lr); | |
0919e84c MZ |
718 | } |
719 | ||
720 | static inline void vgic_set_underflow(struct kvm_vcpu *vcpu) | |
721 | { | |
59529f69 MZ |
722 | if (kvm_vgic_global_state.type == VGIC_V2) |
723 | vgic_v2_set_underflow(vcpu); | |
724 | else | |
725 | vgic_v3_set_underflow(vcpu); | |
0919e84c MZ |
726 | } |
727 | ||
728 | /* Requires the ap_list_lock to be held. */ | |
16ca6a60 MZ |
729 | static int compute_ap_list_depth(struct kvm_vcpu *vcpu, |
730 | bool *multi_sgi) | |
0919e84c MZ |
731 | { |
732 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
733 | struct vgic_irq *irq; | |
734 | int count = 0; | |
735 | ||
16ca6a60 MZ |
736 | *multi_sgi = false; |
737 | ||
0919e84c MZ |
738 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); |
739 | ||
740 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { | |
53692908 MZ |
741 | int w; |
742 | ||
0919e84c MZ |
743 | spin_lock(&irq->irq_lock); |
744 | /* GICv2 SGIs can count for more than one... */ | |
53692908 | 745 | w = vgic_irq_get_lr_count(irq); |
0919e84c | 746 | spin_unlock(&irq->irq_lock); |
53692908 MZ |
747 | |
748 | count += w; | |
749 | *multi_sgi |= (w > 1); | |
0919e84c MZ |
750 | } |
751 | return count; | |
752 | } | |
753 | ||
754 | /* Requires the VCPU's ap_list_lock to be held. */ | |
755 | static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) | |
756 | { | |
757 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
758 | struct vgic_irq *irq; | |
16ca6a60 | 759 | int count; |
16ca6a60 MZ |
760 | bool multi_sgi; |
761 | u8 prio = 0xff; | |
0919e84c MZ |
762 | |
763 | DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock)); | |
764 | ||
16ca6a60 MZ |
765 | count = compute_ap_list_depth(vcpu, &multi_sgi); |
766 | if (count > kvm_vgic_global_state.nr_lr || multi_sgi) | |
0919e84c | 767 | vgic_sort_ap_list(vcpu); |
0919e84c | 768 | |
16ca6a60 MZ |
769 | count = 0; |
770 | ||
0919e84c MZ |
771 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { |
772 | spin_lock(&irq->irq_lock); | |
773 | ||
0919e84c | 774 | /* |
16ca6a60 MZ |
775 | * If we have multi-SGIs in the pipeline, we need to |
776 | * guarantee that they are all seen before any IRQ of | |
777 | * lower priority. In that case, we need to filter out | |
778 | * these interrupts by exiting early. This is easy as | |
779 | * the AP list has been sorted already. | |
0919e84c | 780 | */ |
16ca6a60 MZ |
781 | if (multi_sgi && irq->priority > prio) { |
782 | spin_unlock(&irq->irq_lock); | |
783 | break; | |
784 | } | |
785 | ||
786 | if (likely(vgic_target_oracle(irq) == vcpu)) { | |
0919e84c | 787 | vgic_populate_lr(vcpu, irq, count++); |
0919e84c | 788 | |
53692908 | 789 | if (irq->source) |
16ca6a60 | 790 | prio = irq->priority; |
16ca6a60 MZ |
791 | } |
792 | ||
0919e84c MZ |
793 | spin_unlock(&irq->irq_lock); |
794 | ||
90cac1f5 CD |
795 | if (count == kvm_vgic_global_state.nr_lr) { |
796 | if (!list_is_last(&irq->ap_list, | |
797 | &vgic_cpu->ap_list_head)) | |
798 | vgic_set_underflow(vcpu); | |
0919e84c | 799 | break; |
90cac1f5 | 800 | } |
0919e84c MZ |
801 | } |
802 | ||
803 | vcpu->arch.vgic_cpu.used_lrs = count; | |
804 | ||
805 | /* Nuke remaining LRs */ | |
806 | for ( ; count < kvm_vgic_global_state.nr_lr; count++) | |
807 | vgic_clear_lr(vcpu, count); | |
808 | } | |
809 | ||
771621b0 CD |
810 | static inline bool can_access_vgic_from_kernel(void) |
811 | { | |
812 | /* | |
813 | * GICv2 can always be accessed from the kernel because it is | |
814 | * memory-mapped, and VHE systems can access GICv3 EL2 system | |
815 | * registers. | |
816 | */ | |
817 | return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has_vhe(); | |
818 | } | |
819 | ||
75174ba6 CD |
820 | static inline void vgic_save_state(struct kvm_vcpu *vcpu) |
821 | { | |
822 | if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) | |
823 | vgic_v2_save_state(vcpu); | |
771621b0 CD |
824 | else |
825 | __vgic_v3_save_state(vcpu); | |
75174ba6 CD |
826 | } |
827 | ||
0919e84c MZ |
828 | /* Sync back the hardware VGIC state into our emulation after a guest's run. */ |
829 | void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) | |
830 | { | |
f6769581 SWL |
831 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; |
832 | ||
62775797 MZ |
833 | WARN_ON(vgic_v4_sync_hwstate(vcpu)); |
834 | ||
8ac76ef4 CD |
835 | /* An empty ap_list_head implies used_lrs == 0 */ |
836 | if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) | |
0099b770 CD |
837 | return; |
838 | ||
2d0e63e0 CD |
839 | if (can_access_vgic_from_kernel()) |
840 | vgic_save_state(vcpu); | |
841 | ||
8ac76ef4 CD |
842 | if (vgic_cpu->used_lrs) |
843 | vgic_fold_lr_state(vcpu); | |
0919e84c MZ |
844 | vgic_prune_ap_list(vcpu); |
845 | } | |
846 | ||
75174ba6 CD |
847 | static inline void vgic_restore_state(struct kvm_vcpu *vcpu) |
848 | { | |
849 | if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) | |
850 | vgic_v2_restore_state(vcpu); | |
771621b0 CD |
851 | else |
852 | __vgic_v3_restore_state(vcpu); | |
75174ba6 CD |
853 | } |
854 | ||
0919e84c MZ |
855 | /* Flush our emulation state into the GIC hardware before entering the guest. */ |
856 | void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) | |
857 | { | |
62775797 MZ |
858 | WARN_ON(vgic_v4_flush_hwstate(vcpu)); |
859 | ||
f6769581 SWL |
860 | /* |
861 | * If there are no virtual interrupts active or pending for this | |
862 | * VCPU, then there is no work to do and we can bail out without | |
863 | * taking any lock. There is a potential race with someone injecting | |
864 | * interrupts to the VCPU, but it is a benign race as the VCPU will | |
865 | * either observe the new interrupt before or after doing this check, | |
866 | * and introducing additional synchronization mechanism doesn't change | |
867 | * this. | |
868 | */ | |
869 | if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) | |
2d0e63e0 | 870 | return; |
0099b770 | 871 | |
006df0f3 CD |
872 | DEBUG_SPINLOCK_BUG_ON(!irqs_disabled()); |
873 | ||
0919e84c MZ |
874 | spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock); |
875 | vgic_flush_lr_state(vcpu); | |
876 | spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock); | |
75174ba6 | 877 | |
771621b0 CD |
878 | if (can_access_vgic_from_kernel()) |
879 | vgic_restore_state(vcpu); | |
0919e84c | 880 | } |
90eee56c | 881 | |
328e5664 CD |
882 | void kvm_vgic_load(struct kvm_vcpu *vcpu) |
883 | { | |
884 | if (unlikely(!vgic_initialized(vcpu->kvm))) | |
885 | return; | |
886 | ||
887 | if (kvm_vgic_global_state.type == VGIC_V2) | |
888 | vgic_v2_load(vcpu); | |
889 | else | |
890 | vgic_v3_load(vcpu); | |
891 | } | |
892 | ||
893 | void kvm_vgic_put(struct kvm_vcpu *vcpu) | |
894 | { | |
895 | if (unlikely(!vgic_initialized(vcpu->kvm))) | |
896 | return; | |
897 | ||
898 | if (kvm_vgic_global_state.type == VGIC_V2) | |
899 | vgic_v2_put(vcpu); | |
900 | else | |
901 | vgic_v3_put(vcpu); | |
902 | } | |
903 | ||
90eee56c EA |
904 | int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu) |
905 | { | |
906 | struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; | |
907 | struct vgic_irq *irq; | |
908 | bool pending = false; | |
006df0f3 | 909 | unsigned long flags; |
90eee56c EA |
910 | |
911 | if (!vcpu->kvm->arch.vgic.enabled) | |
912 | return false; | |
913 | ||
c9719680 MZ |
914 | if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last) |
915 | return true; | |
916 | ||
006df0f3 | 917 | spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags); |
90eee56c EA |
918 | |
919 | list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) { | |
920 | spin_lock(&irq->irq_lock); | |
8694e4da | 921 | pending = irq_is_pending(irq) && irq->enabled; |
90eee56c EA |
922 | spin_unlock(&irq->irq_lock); |
923 | ||
924 | if (pending) | |
925 | break; | |
926 | } | |
927 | ||
006df0f3 | 928 | spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags); |
90eee56c EA |
929 | |
930 | return pending; | |
931 | } | |
2b0cda87 MZ |
932 | |
933 | void vgic_kick_vcpus(struct kvm *kvm) | |
934 | { | |
935 | struct kvm_vcpu *vcpu; | |
936 | int c; | |
937 | ||
938 | /* | |
939 | * We've injected an interrupt, time to find out who deserves | |
940 | * a good kick... | |
941 | */ | |
942 | kvm_for_each_vcpu(c, vcpu, kvm) { | |
325f9c64 AJ |
943 | if (kvm_vgic_vcpu_pending_irq(vcpu)) { |
944 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); | |
2b0cda87 | 945 | kvm_vcpu_kick(vcpu); |
325f9c64 | 946 | } |
2b0cda87 MZ |
947 | } |
948 | } | |
568e8c90 | 949 | |
47bbd31f | 950 | bool kvm_vgic_map_is_active(struct kvm_vcpu *vcpu, unsigned int vintid) |
568e8c90 | 951 | { |
285a90e3 | 952 | struct vgic_irq *irq; |
568e8c90 | 953 | bool map_is_active; |
006df0f3 | 954 | unsigned long flags; |
568e8c90 | 955 | |
f39d16cb CD |
956 | if (!vgic_initialized(vcpu->kvm)) |
957 | return false; | |
958 | ||
285a90e3 | 959 | irq = vgic_get_irq(vcpu->kvm, vcpu, vintid); |
006df0f3 | 960 | spin_lock_irqsave(&irq->irq_lock, flags); |
568e8c90 | 961 | map_is_active = irq->hw && irq->active; |
006df0f3 | 962 | spin_unlock_irqrestore(&irq->irq_lock, flags); |
5dd4b924 | 963 | vgic_put_irq(vcpu->kvm, irq); |
568e8c90 AP |
964 | |
965 | return map_is_active; | |
966 | } | |
0e4e82f1 | 967 |