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62c476c7 BAY |
1 | /* |
2 | * Copyright (c) 2006, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
15 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
16 | * | |
17 | * Copyright (C) 2006-2008 Intel Corporation | |
18 | * Copyright IBM Corporation, 2008 | |
221d059d AK |
19 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. |
20 | * | |
62c476c7 BAY |
21 | * Author: Allen M. Kay <allen.m.kay@intel.com> |
22 | * Author: Weidong Han <weidong.han@intel.com> | |
23 | * Author: Ben-Ami Yassour <benami@il.ibm.com> | |
24 | */ | |
25 | ||
26 | #include <linux/list.h> | |
27 | #include <linux/kvm_host.h> | |
51441d43 | 28 | #include <linux/module.h> |
62c476c7 | 29 | #include <linux/pci.h> |
799fd8b2 | 30 | #include <linux/stat.h> |
62c476c7 | 31 | #include <linux/dmar.h> |
19de40a8 | 32 | #include <linux/iommu.h> |
62c476c7 BAY |
33 | #include <linux/intel-iommu.h> |
34 | ||
90ab5ee9 | 35 | static bool allow_unsafe_assigned_interrupts; |
3f68b031 AW |
36 | module_param_named(allow_unsafe_assigned_interrupts, |
37 | allow_unsafe_assigned_interrupts, bool, S_IRUGO | S_IWUSR); | |
38 | MODULE_PARM_DESC(allow_unsafe_assigned_interrupts, | |
39 | "Enable device assignment on platforms without interrupt remapping support."); | |
40 | ||
62c476c7 BAY |
41 | static int kvm_iommu_unmap_memslots(struct kvm *kvm); |
42 | static void kvm_iommu_put_pages(struct kvm *kvm, | |
43 | gfn_t base_gfn, unsigned long npages); | |
44 | ||
d5661048 XG |
45 | static pfn_t kvm_pin_pages(struct kvm_memory_slot *slot, gfn_t gfn, |
46 | unsigned long size) | |
fcd95807 JR |
47 | { |
48 | gfn_t end_gfn; | |
49 | pfn_t pfn; | |
50 | ||
d5661048 | 51 | pfn = gfn_to_pfn_memslot(slot, gfn); |
fcd95807 JR |
52 | end_gfn = gfn + (size >> PAGE_SHIFT); |
53 | gfn += 1; | |
54 | ||
81c52c56 | 55 | if (is_error_noslot_pfn(pfn)) |
fcd95807 JR |
56 | return pfn; |
57 | ||
58 | while (gfn < end_gfn) | |
d5661048 | 59 | gfn_to_pfn_memslot(slot, gfn++); |
fcd95807 JR |
60 | |
61 | return pfn; | |
62 | } | |
63 | ||
3ad26d81 | 64 | int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot) |
62c476c7 | 65 | { |
fcd95807 | 66 | gfn_t gfn, end_gfn; |
62c476c7 | 67 | pfn_t pfn; |
fcd95807 | 68 | int r = 0; |
19de40a8 | 69 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
522c68c4 | 70 | int flags; |
62c476c7 BAY |
71 | |
72 | /* check if iommu exists and in use */ | |
73 | if (!domain) | |
74 | return 0; | |
75 | ||
fcd95807 JR |
76 | gfn = slot->base_gfn; |
77 | end_gfn = gfn + slot->npages; | |
78 | ||
d47510e2 AW |
79 | flags = IOMMU_READ; |
80 | if (!(slot->flags & KVM_MEM_READONLY)) | |
81 | flags |= IOMMU_WRITE; | |
d96eb2c6 | 82 | if (!kvm->arch.iommu_noncoherent) |
522c68c4 SY |
83 | flags |= IOMMU_CACHE; |
84 | ||
fcd95807 JR |
85 | |
86 | while (gfn < end_gfn) { | |
87 | unsigned long page_size; | |
88 | ||
89 | /* Check if already mapped */ | |
90 | if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) { | |
91 | gfn += 1; | |
92 | continue; | |
93 | } | |
94 | ||
95 | /* Get the page size we could use to map */ | |
96 | page_size = kvm_host_page_size(kvm, gfn); | |
97 | ||
98 | /* Make sure the page_size does not exceed the memslot */ | |
99 | while ((gfn + (page_size >> PAGE_SHIFT)) > end_gfn) | |
100 | page_size >>= 1; | |
101 | ||
102 | /* Make sure gfn is aligned to the page size we want to map */ | |
103 | while ((gfn << PAGE_SHIFT) & (page_size - 1)) | |
104 | page_size >>= 1; | |
105 | ||
27ef63c7 GE |
106 | /* Make sure hva is aligned to the page size we want to map */ |
107 | while (__gfn_to_hva_memslot(slot, gfn) & (page_size - 1)) | |
108 | page_size >>= 1; | |
109 | ||
fcd95807 JR |
110 | /* |
111 | * Pin all pages we are about to map in memory. This is | |
112 | * important because we unmap and unpin in 4kb steps later. | |
113 | */ | |
d5661048 | 114 | pfn = kvm_pin_pages(slot, gfn, page_size); |
81c52c56 | 115 | if (is_error_noslot_pfn(pfn)) { |
fcd95807 | 116 | gfn += 1; |
62c476c7 | 117 | continue; |
fcd95807 | 118 | } |
62c476c7 | 119 | |
fcd95807 JR |
120 | /* Map into IO address space */ |
121 | r = iommu_map(domain, gfn_to_gpa(gfn), pfn_to_hpa(pfn), | |
7d3002cc | 122 | page_size, flags); |
e5fcfc82 | 123 | if (r) { |
260782bc | 124 | printk(KERN_ERR "kvm_iommu_map_address:" |
5689cc53 | 125 | "iommu failed to map pfn=%llx\n", pfn); |
62c476c7 BAY |
126 | goto unmap_pages; |
127 | } | |
fcd95807 JR |
128 | |
129 | gfn += page_size >> PAGE_SHIFT; | |
130 | ||
131 | ||
62c476c7 | 132 | } |
fcd95807 | 133 | |
62c476c7 BAY |
134 | return 0; |
135 | ||
136 | unmap_pages: | |
fcd95807 | 137 | kvm_iommu_put_pages(kvm, slot->base_gfn, gfn); |
62c476c7 BAY |
138 | return r; |
139 | } | |
140 | ||
141 | static int kvm_iommu_map_memslots(struct kvm *kvm) | |
142 | { | |
be6ba0f0 | 143 | int idx, r = 0; |
46a26bf5 | 144 | struct kvm_memslots *slots; |
be6ba0f0 | 145 | struct kvm_memory_slot *memslot; |
62c476c7 | 146 | |
e0f0bbc5 AW |
147 | if (kvm->arch.iommu_noncoherent) |
148 | kvm_arch_register_noncoherent_dma(kvm); | |
149 | ||
95c87e2b | 150 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 151 | slots = kvm_memslots(kvm); |
46a26bf5 | 152 | |
be6ba0f0 XG |
153 | kvm_for_each_memslot(memslot, slots) { |
154 | r = kvm_iommu_map_pages(kvm, memslot); | |
62c476c7 BAY |
155 | if (r) |
156 | break; | |
157 | } | |
95c87e2b | 158 | srcu_read_unlock(&kvm->srcu, idx); |
682edb4c | 159 | |
62c476c7 BAY |
160 | return r; |
161 | } | |
162 | ||
260782bc WH |
163 | int kvm_assign_device(struct kvm *kvm, |
164 | struct kvm_assigned_dev_kernel *assigned_dev) | |
62c476c7 BAY |
165 | { |
166 | struct pci_dev *pdev = NULL; | |
19de40a8 | 167 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
d96eb2c6 AW |
168 | int r; |
169 | bool noncoherent; | |
62c476c7 | 170 | |
260782bc WH |
171 | /* check if iommu exists and in use */ |
172 | if (!domain) | |
173 | return 0; | |
174 | ||
175 | pdev = assigned_dev->dev; | |
176 | if (pdev == NULL) | |
62c476c7 | 177 | return -ENODEV; |
260782bc | 178 | |
19de40a8 | 179 | r = iommu_attach_device(domain, &pdev->dev); |
260782bc | 180 | if (r) { |
d151f63f | 181 | dev_err(&pdev->dev, "kvm assign device failed ret %d", r); |
260782bc | 182 | return r; |
62c476c7 BAY |
183 | } |
184 | ||
d96eb2c6 AW |
185 | noncoherent = !iommu_domain_has_cap(kvm->arch.iommu_domain, |
186 | IOMMU_CAP_CACHE_COHERENCY); | |
522c68c4 SY |
187 | |
188 | /* Check if need to update IOMMU page table for guest memory */ | |
d96eb2c6 | 189 | if (noncoherent != kvm->arch.iommu_noncoherent) { |
522c68c4 | 190 | kvm_iommu_unmap_memslots(kvm); |
d96eb2c6 | 191 | kvm->arch.iommu_noncoherent = noncoherent; |
522c68c4 SY |
192 | r = kvm_iommu_map_memslots(kvm); |
193 | if (r) | |
194 | goto out_unmap; | |
195 | } | |
196 | ||
6777829c GR |
197 | pdev->dev_flags |= PCI_DEV_FLAGS_ASSIGNED; |
198 | ||
29242cb5 | 199 | dev_info(&pdev->dev, "kvm assign device\n"); |
62c476c7 | 200 | |
260782bc | 201 | return 0; |
522c68c4 SY |
202 | out_unmap: |
203 | kvm_iommu_unmap_memslots(kvm); | |
204 | return r; | |
260782bc | 205 | } |
62c476c7 | 206 | |
0a920356 WH |
207 | int kvm_deassign_device(struct kvm *kvm, |
208 | struct kvm_assigned_dev_kernel *assigned_dev) | |
209 | { | |
19de40a8 | 210 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
0a920356 WH |
211 | struct pci_dev *pdev = NULL; |
212 | ||
213 | /* check if iommu exists and in use */ | |
214 | if (!domain) | |
215 | return 0; | |
216 | ||
217 | pdev = assigned_dev->dev; | |
218 | if (pdev == NULL) | |
219 | return -ENODEV; | |
220 | ||
19de40a8 | 221 | iommu_detach_device(domain, &pdev->dev); |
0a920356 | 222 | |
6777829c GR |
223 | pdev->dev_flags &= ~PCI_DEV_FLAGS_ASSIGNED; |
224 | ||
29242cb5 | 225 | dev_info(&pdev->dev, "kvm deassign device\n"); |
0a920356 WH |
226 | |
227 | return 0; | |
228 | } | |
229 | ||
260782bc WH |
230 | int kvm_iommu_map_guest(struct kvm *kvm) |
231 | { | |
232 | int r; | |
233 | ||
a1b60c1c | 234 | if (!iommu_present(&pci_bus_type)) { |
19de40a8 | 235 | printk(KERN_ERR "%s: iommu not found\n", __func__); |
62c476c7 BAY |
236 | return -ENODEV; |
237 | } | |
238 | ||
21a1416a AW |
239 | mutex_lock(&kvm->slots_lock); |
240 | ||
905d66c1 | 241 | kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type); |
21a1416a AW |
242 | if (!kvm->arch.iommu_domain) { |
243 | r = -ENOMEM; | |
244 | goto out_unlock; | |
245 | } | |
62c476c7 | 246 | |
3f68b031 AW |
247 | if (!allow_unsafe_assigned_interrupts && |
248 | !iommu_domain_has_cap(kvm->arch.iommu_domain, | |
249 | IOMMU_CAP_INTR_REMAP)) { | |
250 | printk(KERN_WARNING "%s: No interrupt remapping support," | |
251 | " disallowing device assignment." | |
252 | " Re-enble with \"allow_unsafe_assigned_interrupts=1\"" | |
253 | " module option.\n", __func__); | |
254 | iommu_domain_free(kvm->arch.iommu_domain); | |
255 | kvm->arch.iommu_domain = NULL; | |
21a1416a AW |
256 | r = -EPERM; |
257 | goto out_unlock; | |
3f68b031 AW |
258 | } |
259 | ||
62c476c7 BAY |
260 | r = kvm_iommu_map_memslots(kvm); |
261 | if (r) | |
21a1416a | 262 | kvm_iommu_unmap_memslots(kvm); |
62c476c7 | 263 | |
21a1416a AW |
264 | out_unlock: |
265 | mutex_unlock(&kvm->slots_lock); | |
62c476c7 BAY |
266 | return r; |
267 | } | |
268 | ||
fcd95807 JR |
269 | static void kvm_unpin_pages(struct kvm *kvm, pfn_t pfn, unsigned long npages) |
270 | { | |
271 | unsigned long i; | |
272 | ||
273 | for (i = 0; i < npages; ++i) | |
274 | kvm_release_pfn_clean(pfn + i); | |
275 | } | |
276 | ||
62c476c7 | 277 | static void kvm_iommu_put_pages(struct kvm *kvm, |
260782bc | 278 | gfn_t base_gfn, unsigned long npages) |
62c476c7 | 279 | { |
fcd95807 JR |
280 | struct iommu_domain *domain; |
281 | gfn_t end_gfn, gfn; | |
62c476c7 | 282 | pfn_t pfn; |
260782bc WH |
283 | u64 phys; |
284 | ||
fcd95807 JR |
285 | domain = kvm->arch.iommu_domain; |
286 | end_gfn = base_gfn + npages; | |
287 | gfn = base_gfn; | |
288 | ||
260782bc WH |
289 | /* check if iommu exists and in use */ |
290 | if (!domain) | |
291 | return; | |
62c476c7 | 292 | |
fcd95807 JR |
293 | while (gfn < end_gfn) { |
294 | unsigned long unmap_pages; | |
7d3002cc | 295 | size_t size; |
fcd95807 JR |
296 | |
297 | /* Get physical address */ | |
19de40a8 | 298 | phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn)); |
16b854c8 XG |
299 | |
300 | if (!phys) { | |
301 | gfn++; | |
302 | continue; | |
303 | } | |
304 | ||
fcd95807 JR |
305 | pfn = phys >> PAGE_SHIFT; |
306 | ||
307 | /* Unmap address from IO address space */ | |
7d3002cc OBC |
308 | size = iommu_unmap(domain, gfn_to_gpa(gfn), PAGE_SIZE); |
309 | unmap_pages = 1ULL << get_order(size); | |
260782bc | 310 | |
fcd95807 JR |
311 | /* Unpin all pages we just unmapped to not leak any memory */ |
312 | kvm_unpin_pages(kvm, pfn, unmap_pages); | |
313 | ||
314 | gfn += unmap_pages; | |
315 | } | |
62c476c7 BAY |
316 | } |
317 | ||
32f6daad AW |
318 | void kvm_iommu_unmap_pages(struct kvm *kvm, struct kvm_memory_slot *slot) |
319 | { | |
320 | kvm_iommu_put_pages(kvm, slot->base_gfn, slot->npages); | |
321 | } | |
322 | ||
62c476c7 BAY |
323 | static int kvm_iommu_unmap_memslots(struct kvm *kvm) |
324 | { | |
be6ba0f0 | 325 | int idx; |
46a26bf5 | 326 | struct kvm_memslots *slots; |
be6ba0f0 | 327 | struct kvm_memory_slot *memslot; |
46a26bf5 | 328 | |
95c87e2b | 329 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 330 | slots = kvm_memslots(kvm); |
682edb4c | 331 | |
be6ba0f0 | 332 | kvm_for_each_memslot(memslot, slots) |
32f6daad | 333 | kvm_iommu_unmap_pages(kvm, memslot); |
be6ba0f0 | 334 | |
95c87e2b | 335 | srcu_read_unlock(&kvm->srcu, idx); |
62c476c7 | 336 | |
e0f0bbc5 AW |
337 | if (kvm->arch.iommu_noncoherent) |
338 | kvm_arch_unregister_noncoherent_dma(kvm); | |
339 | ||
62c476c7 BAY |
340 | return 0; |
341 | } | |
342 | ||
343 | int kvm_iommu_unmap_guest(struct kvm *kvm) | |
344 | { | |
19de40a8 | 345 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
62c476c7 BAY |
346 | |
347 | /* check if iommu exists and in use */ | |
348 | if (!domain) | |
349 | return 0; | |
350 | ||
21a1416a | 351 | mutex_lock(&kvm->slots_lock); |
62c476c7 | 352 | kvm_iommu_unmap_memslots(kvm); |
21a1416a | 353 | kvm->arch.iommu_domain = NULL; |
d96eb2c6 | 354 | kvm->arch.iommu_noncoherent = false; |
21a1416a AW |
355 | mutex_unlock(&kvm->slots_lock); |
356 | ||
19de40a8 | 357 | iommu_domain_free(domain); |
62c476c7 BAY |
358 | return 0; |
359 | } |