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62c476c7 BAY |
1 | /* |
2 | * Copyright (c) 2006, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
15 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
16 | * | |
17 | * Copyright (C) 2006-2008 Intel Corporation | |
18 | * Copyright IBM Corporation, 2008 | |
221d059d AK |
19 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. |
20 | * | |
62c476c7 BAY |
21 | * Author: Allen M. Kay <allen.m.kay@intel.com> |
22 | * Author: Weidong Han <weidong.han@intel.com> | |
23 | * Author: Ben-Ami Yassour <benami@il.ibm.com> | |
24 | */ | |
25 | ||
26 | #include <linux/list.h> | |
27 | #include <linux/kvm_host.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/dmar.h> | |
19de40a8 | 30 | #include <linux/iommu.h> |
62c476c7 BAY |
31 | #include <linux/intel-iommu.h> |
32 | ||
3f68b031 AW |
33 | static int allow_unsafe_assigned_interrupts; |
34 | module_param_named(allow_unsafe_assigned_interrupts, | |
35 | allow_unsafe_assigned_interrupts, bool, S_IRUGO | S_IWUSR); | |
36 | MODULE_PARM_DESC(allow_unsafe_assigned_interrupts, | |
37 | "Enable device assignment on platforms without interrupt remapping support."); | |
38 | ||
62c476c7 BAY |
39 | static int kvm_iommu_unmap_memslots(struct kvm *kvm); |
40 | static void kvm_iommu_put_pages(struct kvm *kvm, | |
41 | gfn_t base_gfn, unsigned long npages); | |
42 | ||
fcd95807 JR |
43 | static pfn_t kvm_pin_pages(struct kvm *kvm, struct kvm_memory_slot *slot, |
44 | gfn_t gfn, unsigned long size) | |
45 | { | |
46 | gfn_t end_gfn; | |
47 | pfn_t pfn; | |
48 | ||
49 | pfn = gfn_to_pfn_memslot(kvm, slot, gfn); | |
50 | end_gfn = gfn + (size >> PAGE_SHIFT); | |
51 | gfn += 1; | |
52 | ||
53 | if (is_error_pfn(pfn)) | |
54 | return pfn; | |
55 | ||
56 | while (gfn < end_gfn) | |
57 | gfn_to_pfn_memslot(kvm, slot, gfn++); | |
58 | ||
59 | return pfn; | |
60 | } | |
61 | ||
3ad26d81 | 62 | int kvm_iommu_map_pages(struct kvm *kvm, struct kvm_memory_slot *slot) |
62c476c7 | 63 | { |
fcd95807 | 64 | gfn_t gfn, end_gfn; |
62c476c7 | 65 | pfn_t pfn; |
fcd95807 | 66 | int r = 0; |
19de40a8 | 67 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
522c68c4 | 68 | int flags; |
62c476c7 BAY |
69 | |
70 | /* check if iommu exists and in use */ | |
71 | if (!domain) | |
72 | return 0; | |
73 | ||
fcd95807 JR |
74 | gfn = slot->base_gfn; |
75 | end_gfn = gfn + slot->npages; | |
76 | ||
522c68c4 SY |
77 | flags = IOMMU_READ | IOMMU_WRITE; |
78 | if (kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY) | |
79 | flags |= IOMMU_CACHE; | |
80 | ||
fcd95807 JR |
81 | |
82 | while (gfn < end_gfn) { | |
83 | unsigned long page_size; | |
84 | ||
85 | /* Check if already mapped */ | |
86 | if (iommu_iova_to_phys(domain, gfn_to_gpa(gfn))) { | |
87 | gfn += 1; | |
88 | continue; | |
89 | } | |
90 | ||
91 | /* Get the page size we could use to map */ | |
92 | page_size = kvm_host_page_size(kvm, gfn); | |
93 | ||
94 | /* Make sure the page_size does not exceed the memslot */ | |
95 | while ((gfn + (page_size >> PAGE_SHIFT)) > end_gfn) | |
96 | page_size >>= 1; | |
97 | ||
98 | /* Make sure gfn is aligned to the page size we want to map */ | |
99 | while ((gfn << PAGE_SHIFT) & (page_size - 1)) | |
100 | page_size >>= 1; | |
101 | ||
102 | /* | |
103 | * Pin all pages we are about to map in memory. This is | |
104 | * important because we unmap and unpin in 4kb steps later. | |
105 | */ | |
106 | pfn = kvm_pin_pages(kvm, slot, gfn, page_size); | |
107 | if (is_error_pfn(pfn)) { | |
108 | gfn += 1; | |
62c476c7 | 109 | continue; |
fcd95807 | 110 | } |
62c476c7 | 111 | |
fcd95807 JR |
112 | /* Map into IO address space */ |
113 | r = iommu_map(domain, gfn_to_gpa(gfn), pfn_to_hpa(pfn), | |
114 | get_order(page_size), flags); | |
e5fcfc82 | 115 | if (r) { |
260782bc | 116 | printk(KERN_ERR "kvm_iommu_map_address:" |
5689cc53 | 117 | "iommu failed to map pfn=%llx\n", pfn); |
62c476c7 BAY |
118 | goto unmap_pages; |
119 | } | |
fcd95807 JR |
120 | |
121 | gfn += page_size >> PAGE_SHIFT; | |
122 | ||
123 | ||
62c476c7 | 124 | } |
fcd95807 | 125 | |
62c476c7 BAY |
126 | return 0; |
127 | ||
128 | unmap_pages: | |
fcd95807 | 129 | kvm_iommu_put_pages(kvm, slot->base_gfn, gfn); |
62c476c7 BAY |
130 | return r; |
131 | } | |
132 | ||
133 | static int kvm_iommu_map_memslots(struct kvm *kvm) | |
134 | { | |
95c87e2b | 135 | int i, idx, r = 0; |
46a26bf5 | 136 | struct kvm_memslots *slots; |
62c476c7 | 137 | |
95c87e2b | 138 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 139 | slots = kvm_memslots(kvm); |
46a26bf5 MT |
140 | |
141 | for (i = 0; i < slots->nmemslots; i++) { | |
3ad26d81 | 142 | r = kvm_iommu_map_pages(kvm, &slots->memslots[i]); |
62c476c7 BAY |
143 | if (r) |
144 | break; | |
145 | } | |
95c87e2b | 146 | srcu_read_unlock(&kvm->srcu, idx); |
682edb4c | 147 | |
62c476c7 BAY |
148 | return r; |
149 | } | |
150 | ||
260782bc WH |
151 | int kvm_assign_device(struct kvm *kvm, |
152 | struct kvm_assigned_dev_kernel *assigned_dev) | |
62c476c7 BAY |
153 | { |
154 | struct pci_dev *pdev = NULL; | |
19de40a8 | 155 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
522c68c4 | 156 | int r, last_flags; |
62c476c7 | 157 | |
260782bc WH |
158 | /* check if iommu exists and in use */ |
159 | if (!domain) | |
160 | return 0; | |
161 | ||
162 | pdev = assigned_dev->dev; | |
163 | if (pdev == NULL) | |
62c476c7 | 164 | return -ENODEV; |
260782bc | 165 | |
19de40a8 | 166 | r = iommu_attach_device(domain, &pdev->dev); |
260782bc | 167 | if (r) { |
ab9f4ecb ZE |
168 | printk(KERN_ERR "assign device %x:%x:%x.%x failed", |
169 | pci_domain_nr(pdev->bus), | |
260782bc WH |
170 | pdev->bus->number, |
171 | PCI_SLOT(pdev->devfn), | |
172 | PCI_FUNC(pdev->devfn)); | |
173 | return r; | |
62c476c7 BAY |
174 | } |
175 | ||
522c68c4 SY |
176 | last_flags = kvm->arch.iommu_flags; |
177 | if (iommu_domain_has_cap(kvm->arch.iommu_domain, | |
178 | IOMMU_CAP_CACHE_COHERENCY)) | |
179 | kvm->arch.iommu_flags |= KVM_IOMMU_CACHE_COHERENCY; | |
180 | ||
181 | /* Check if need to update IOMMU page table for guest memory */ | |
182 | if ((last_flags ^ kvm->arch.iommu_flags) == | |
183 | KVM_IOMMU_CACHE_COHERENCY) { | |
184 | kvm_iommu_unmap_memslots(kvm); | |
185 | r = kvm_iommu_map_memslots(kvm); | |
186 | if (r) | |
187 | goto out_unmap; | |
188 | } | |
189 | ||
ab9f4ecb ZE |
190 | printk(KERN_DEBUG "assign device %x:%x:%x.%x\n", |
191 | assigned_dev->host_segnr, | |
260782bc WH |
192 | assigned_dev->host_busnr, |
193 | PCI_SLOT(assigned_dev->host_devfn), | |
194 | PCI_FUNC(assigned_dev->host_devfn)); | |
62c476c7 | 195 | |
260782bc | 196 | return 0; |
522c68c4 SY |
197 | out_unmap: |
198 | kvm_iommu_unmap_memslots(kvm); | |
199 | return r; | |
260782bc | 200 | } |
62c476c7 | 201 | |
0a920356 WH |
202 | int kvm_deassign_device(struct kvm *kvm, |
203 | struct kvm_assigned_dev_kernel *assigned_dev) | |
204 | { | |
19de40a8 | 205 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
0a920356 WH |
206 | struct pci_dev *pdev = NULL; |
207 | ||
208 | /* check if iommu exists and in use */ | |
209 | if (!domain) | |
210 | return 0; | |
211 | ||
212 | pdev = assigned_dev->dev; | |
213 | if (pdev == NULL) | |
214 | return -ENODEV; | |
215 | ||
19de40a8 | 216 | iommu_detach_device(domain, &pdev->dev); |
0a920356 | 217 | |
ab9f4ecb ZE |
218 | printk(KERN_DEBUG "deassign device %x:%x:%x.%x\n", |
219 | assigned_dev->host_segnr, | |
0a920356 WH |
220 | assigned_dev->host_busnr, |
221 | PCI_SLOT(assigned_dev->host_devfn), | |
222 | PCI_FUNC(assigned_dev->host_devfn)); | |
223 | ||
224 | return 0; | |
225 | } | |
226 | ||
260782bc WH |
227 | int kvm_iommu_map_guest(struct kvm *kvm) |
228 | { | |
229 | int r; | |
230 | ||
a1b60c1c | 231 | if (!iommu_present(&pci_bus_type)) { |
19de40a8 | 232 | printk(KERN_ERR "%s: iommu not found\n", __func__); |
62c476c7 BAY |
233 | return -ENODEV; |
234 | } | |
235 | ||
905d66c1 | 236 | kvm->arch.iommu_domain = iommu_domain_alloc(&pci_bus_type); |
19de40a8 | 237 | if (!kvm->arch.iommu_domain) |
260782bc | 238 | return -ENOMEM; |
62c476c7 | 239 | |
3f68b031 AW |
240 | if (!allow_unsafe_assigned_interrupts && |
241 | !iommu_domain_has_cap(kvm->arch.iommu_domain, | |
242 | IOMMU_CAP_INTR_REMAP)) { | |
243 | printk(KERN_WARNING "%s: No interrupt remapping support," | |
244 | " disallowing device assignment." | |
245 | " Re-enble with \"allow_unsafe_assigned_interrupts=1\"" | |
246 | " module option.\n", __func__); | |
247 | iommu_domain_free(kvm->arch.iommu_domain); | |
248 | kvm->arch.iommu_domain = NULL; | |
249 | return -EPERM; | |
250 | } | |
251 | ||
62c476c7 BAY |
252 | r = kvm_iommu_map_memslots(kvm); |
253 | if (r) | |
254 | goto out_unmap; | |
255 | ||
62c476c7 BAY |
256 | return 0; |
257 | ||
258 | out_unmap: | |
259 | kvm_iommu_unmap_memslots(kvm); | |
260 | return r; | |
261 | } | |
262 | ||
fcd95807 JR |
263 | static void kvm_unpin_pages(struct kvm *kvm, pfn_t pfn, unsigned long npages) |
264 | { | |
265 | unsigned long i; | |
266 | ||
267 | for (i = 0; i < npages; ++i) | |
268 | kvm_release_pfn_clean(pfn + i); | |
269 | } | |
270 | ||
62c476c7 | 271 | static void kvm_iommu_put_pages(struct kvm *kvm, |
260782bc | 272 | gfn_t base_gfn, unsigned long npages) |
62c476c7 | 273 | { |
fcd95807 JR |
274 | struct iommu_domain *domain; |
275 | gfn_t end_gfn, gfn; | |
62c476c7 | 276 | pfn_t pfn; |
260782bc WH |
277 | u64 phys; |
278 | ||
fcd95807 JR |
279 | domain = kvm->arch.iommu_domain; |
280 | end_gfn = base_gfn + npages; | |
281 | gfn = base_gfn; | |
282 | ||
260782bc WH |
283 | /* check if iommu exists and in use */ |
284 | if (!domain) | |
285 | return; | |
62c476c7 | 286 | |
fcd95807 JR |
287 | while (gfn < end_gfn) { |
288 | unsigned long unmap_pages; | |
289 | int order; | |
290 | ||
291 | /* Get physical address */ | |
19de40a8 | 292 | phys = iommu_iova_to_phys(domain, gfn_to_gpa(gfn)); |
fcd95807 JR |
293 | pfn = phys >> PAGE_SHIFT; |
294 | ||
295 | /* Unmap address from IO address space */ | |
05b782ab | 296 | order = iommu_unmap(domain, gfn_to_gpa(gfn), 0); |
fcd95807 | 297 | unmap_pages = 1ULL << order; |
260782bc | 298 | |
fcd95807 JR |
299 | /* Unpin all pages we just unmapped to not leak any memory */ |
300 | kvm_unpin_pages(kvm, pfn, unmap_pages); | |
301 | ||
302 | gfn += unmap_pages; | |
303 | } | |
62c476c7 BAY |
304 | } |
305 | ||
306 | static int kvm_iommu_unmap_memslots(struct kvm *kvm) | |
307 | { | |
95c87e2b | 308 | int i, idx; |
46a26bf5 MT |
309 | struct kvm_memslots *slots; |
310 | ||
95c87e2b | 311 | idx = srcu_read_lock(&kvm->srcu); |
90d83dc3 | 312 | slots = kvm_memslots(kvm); |
682edb4c | 313 | |
46a26bf5 MT |
314 | for (i = 0; i < slots->nmemslots; i++) { |
315 | kvm_iommu_put_pages(kvm, slots->memslots[i].base_gfn, | |
316 | slots->memslots[i].npages); | |
62c476c7 | 317 | } |
95c87e2b | 318 | srcu_read_unlock(&kvm->srcu, idx); |
62c476c7 BAY |
319 | |
320 | return 0; | |
321 | } | |
322 | ||
323 | int kvm_iommu_unmap_guest(struct kvm *kvm) | |
324 | { | |
19de40a8 | 325 | struct iommu_domain *domain = kvm->arch.iommu_domain; |
62c476c7 BAY |
326 | |
327 | /* check if iommu exists and in use */ | |
328 | if (!domain) | |
329 | return 0; | |
330 | ||
62c476c7 | 331 | kvm_iommu_unmap_memslots(kvm); |
19de40a8 | 332 | iommu_domain_free(domain); |
62c476c7 BAY |
333 | return 0; |
334 | } |