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Commit | Line | Data |
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3de42dc0 XZ |
1 | /* |
2 | * irq_comm.c: Common API for in kernel interrupt controller | |
3 | * Copyright (c) 2007, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
17 | * Authors: | |
18 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> | |
19 | * | |
9611c187 | 20 | * Copyright 2010 Red Hat, Inc. and/or its affiliates. |
3de42dc0 XZ |
21 | */ |
22 | ||
23 | #include <linux/kvm_host.h> | |
5a0e3ad6 | 24 | #include <linux/slab.h> |
229456fc | 25 | #include <trace/events/kvm.h> |
79950e10 | 26 | |
79950e10 | 27 | #include <asm/msidef.h> |
58c2dde1 GN |
28 | #ifdef CONFIG_IA64 |
29 | #include <asm/iosapic.h> | |
30 | #endif | |
79950e10 | 31 | |
3de42dc0 XZ |
32 | #include "irq.h" |
33 | ||
34 | #include "ioapic.h" | |
35 | ||
4925663a | 36 | static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 37 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 AK |
38 | { |
39 | #ifdef CONFIG_X86 | |
1a6e4a8c | 40 | struct kvm_pic *pic = pic_irqchip(kvm); |
1a577b72 | 41 | return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level); |
4925663a GN |
42 | #else |
43 | return -1; | |
399ec807 AK |
44 | #endif |
45 | } | |
46 | ||
4925663a | 47 | static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 48 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 | 49 | { |
1a6e4a8c | 50 | struct kvm_ioapic *ioapic = kvm->arch.vioapic; |
1a577b72 | 51 | return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level); |
399ec807 AK |
52 | } |
53 | ||
58c2dde1 | 54 | inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) |
116191b6 | 55 | { |
58c2dde1 GN |
56 | #ifdef CONFIG_IA64 |
57 | return irq->delivery_mode == | |
58 | (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); | |
59 | #else | |
60 | return irq->delivery_mode == APIC_DM_LOWEST; | |
61 | #endif | |
62 | } | |
116191b6 | 63 | |
58c2dde1 GN |
64 | int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, |
65 | struct kvm_lapic_irq *irq) | |
66 | { | |
67 | int i, r = -1; | |
68 | struct kvm_vcpu *vcpu, *lowest = NULL; | |
69 | ||
70 | if (irq->dest_mode == 0 && irq->dest_id == 0xff && | |
1e08ec4a | 71 | kvm_is_dm_lowest_prio(irq)) { |
343f94fe | 72 | printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); |
1e08ec4a GN |
73 | irq->delivery_mode = APIC_DM_FIXED; |
74 | } | |
75 | ||
76 | if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r)) | |
77 | return r; | |
343f94fe | 78 | |
988a2cae GN |
79 | kvm_for_each_vcpu(i, vcpu, kvm) { |
80 | if (!kvm_apic_present(vcpu)) | |
343f94fe GN |
81 | continue; |
82 | ||
58c2dde1 GN |
83 | if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, |
84 | irq->dest_id, irq->dest_mode)) | |
343f94fe GN |
85 | continue; |
86 | ||
58c2dde1 GN |
87 | if (!kvm_is_dm_lowest_prio(irq)) { |
88 | if (r < 0) | |
89 | r = 0; | |
90 | r += kvm_apic_set_irq(vcpu, irq); | |
aefd18f0 | 91 | } else if (kvm_lapic_enabled(vcpu)) { |
58c2dde1 GN |
92 | if (!lowest) |
93 | lowest = vcpu; | |
94 | else if (kvm_apic_compare_prio(vcpu, lowest) < 0) | |
95 | lowest = vcpu; | |
e1035715 | 96 | } |
343f94fe GN |
97 | } |
98 | ||
58c2dde1 GN |
99 | if (lowest) |
100 | r = kvm_apic_set_irq(lowest, irq); | |
101 | ||
102 | return r; | |
116191b6 SY |
103 | } |
104 | ||
01f21880 MT |
105 | static inline void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, |
106 | struct kvm_lapic_irq *irq) | |
107 | { | |
108 | trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data); | |
109 | ||
110 | irq->dest_id = (e->msi.address_lo & | |
111 | MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; | |
112 | irq->vector = (e->msi.data & | |
113 | MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; | |
114 | irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; | |
115 | irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; | |
116 | irq->delivery_mode = e->msi.data & 0x700; | |
117 | irq->level = 1; | |
118 | irq->shorthand = 0; | |
119 | /* TODO Deal with RH bit of MSI message address */ | |
120 | } | |
121 | ||
bd2b53b2 MT |
122 | int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, |
123 | struct kvm *kvm, int irq_source_id, int level) | |
79950e10 | 124 | { |
58c2dde1 | 125 | struct kvm_lapic_irq irq; |
79950e10 | 126 | |
1a6e4a8c GN |
127 | if (!level) |
128 | return -1; | |
129 | ||
01f21880 | 130 | kvm_set_msi_irq(e, &irq); |
116191b6 | 131 | |
58c2dde1 | 132 | return kvm_irq_delivery_to_apic(kvm, NULL, &irq); |
79950e10 SY |
133 | } |
134 | ||
01f21880 MT |
135 | |
136 | static int kvm_set_msi_inatomic(struct kvm_kernel_irq_routing_entry *e, | |
137 | struct kvm *kvm) | |
138 | { | |
139 | struct kvm_lapic_irq irq; | |
140 | int r; | |
141 | ||
142 | kvm_set_msi_irq(e, &irq); | |
143 | ||
144 | if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r)) | |
145 | return r; | |
146 | else | |
147 | return -EWOULDBLOCK; | |
148 | } | |
149 | ||
07975ad3 JK |
150 | int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi) |
151 | { | |
152 | struct kvm_kernel_irq_routing_entry route; | |
153 | ||
154 | if (!irqchip_in_kernel(kvm) || msi->flags != 0) | |
155 | return -EINVAL; | |
156 | ||
157 | route.msi.address_lo = msi->address_lo; | |
158 | route.msi.address_hi = msi->address_hi; | |
159 | route.msi.data = msi->data; | |
160 | ||
161 | return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1); | |
162 | } | |
163 | ||
680b3648 | 164 | /* |
4925663a GN |
165 | * Return value: |
166 | * < 0 Interrupt was ignored (masked or not delivered for other reasons) | |
167 | * = 0 Interrupt was coalesced (previous irq is still pending) | |
168 | * > 0 Number of CPUs interrupt was delivered to | |
169 | */ | |
46e624b9 | 170 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level) |
3de42dc0 | 171 | { |
eba0226b GN |
172 | struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS]; |
173 | int ret = -1, i = 0; | |
46e624b9 GN |
174 | struct kvm_irq_routing_table *irq_rt; |
175 | struct hlist_node *n; | |
79950e10 | 176 | |
ae8c1c40 | 177 | trace_kvm_set_irq(irq, level, irq_source_id); |
229456fc | 178 | |
3de42dc0 XZ |
179 | /* Not possible to detect if the guest uses the PIC or the |
180 | * IOAPIC. So set the bit in both. The guest will ignore | |
181 | * writes to the unused one. | |
182 | */ | |
e42bba90 GN |
183 | rcu_read_lock(); |
184 | irq_rt = rcu_dereference(kvm->irq_routing); | |
46e624b9 | 185 | if (irq < irq_rt->nr_rt_entries) |
eba0226b GN |
186 | hlist_for_each_entry(e, n, &irq_rt->map[irq], link) |
187 | irq_set[i++] = *e; | |
e42bba90 | 188 | rcu_read_unlock(); |
eba0226b GN |
189 | |
190 | while(i--) { | |
191 | int r; | |
192 | r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level); | |
193 | if (r < 0) | |
194 | continue; | |
195 | ||
196 | ret = r + ((ret < 0) ? 0 : ret); | |
197 | } | |
198 | ||
4925663a | 199 | return ret; |
3de42dc0 XZ |
200 | } |
201 | ||
01f21880 MT |
202 | /* |
203 | * Deliver an IRQ in an atomic context if we can, or return a failure, | |
204 | * user can retry in a process context. | |
205 | * Return value: | |
206 | * -EWOULDBLOCK - Can't deliver in atomic context: retry in a process context. | |
207 | * Other values - No need to retry. | |
208 | */ | |
209 | int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level) | |
210 | { | |
211 | struct kvm_kernel_irq_routing_entry *e; | |
212 | int ret = -EINVAL; | |
213 | struct kvm_irq_routing_table *irq_rt; | |
214 | struct hlist_node *n; | |
215 | ||
216 | trace_kvm_set_irq(irq, level, irq_source_id); | |
217 | ||
218 | /* | |
219 | * Injection into either PIC or IOAPIC might need to scan all CPUs, | |
220 | * which would need to be retried from thread context; when same GSI | |
221 | * is connected to both PIC and IOAPIC, we'd have to report a | |
222 | * partial failure here. | |
223 | * Since there's no easy way to do this, we only support injecting MSI | |
224 | * which is limited to 1:1 GSI mapping. | |
225 | */ | |
226 | rcu_read_lock(); | |
227 | irq_rt = rcu_dereference(kvm->irq_routing); | |
228 | if (irq < irq_rt->nr_rt_entries) | |
229 | hlist_for_each_entry(e, n, &irq_rt->map[irq], link) { | |
230 | if (likely(e->type == KVM_IRQ_ROUTING_MSI)) | |
231 | ret = kvm_set_msi_inatomic(e, kvm); | |
232 | else | |
233 | ret = -EWOULDBLOCK; | |
234 | break; | |
235 | } | |
236 | rcu_read_unlock(); | |
237 | return ret; | |
238 | } | |
239 | ||
44882eed | 240 | void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin) |
3de42dc0 XZ |
241 | { |
242 | struct kvm_irq_ack_notifier *kian; | |
243 | struct hlist_node *n; | |
3e71f88b | 244 | int gsi; |
44882eed | 245 | |
229456fc MT |
246 | trace_kvm_ack_irq(irqchip, pin); |
247 | ||
e42bba90 GN |
248 | rcu_read_lock(); |
249 | gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; | |
3e71f88b | 250 | if (gsi != -1) |
280aa177 GN |
251 | hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list, |
252 | link) | |
3e71f88b GN |
253 | if (kian->gsi == gsi) |
254 | kian->irq_acked(kian); | |
280aa177 | 255 | rcu_read_unlock(); |
3de42dc0 XZ |
256 | } |
257 | ||
258 | void kvm_register_irq_ack_notifier(struct kvm *kvm, | |
259 | struct kvm_irq_ack_notifier *kian) | |
260 | { | |
fa40a821 | 261 | mutex_lock(&kvm->irq_lock); |
280aa177 | 262 | hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list); |
fa40a821 | 263 | mutex_unlock(&kvm->irq_lock); |
3de42dc0 XZ |
264 | } |
265 | ||
fa40a821 MT |
266 | void kvm_unregister_irq_ack_notifier(struct kvm *kvm, |
267 | struct kvm_irq_ack_notifier *kian) | |
3de42dc0 | 268 | { |
fa40a821 | 269 | mutex_lock(&kvm->irq_lock); |
280aa177 | 270 | hlist_del_init_rcu(&kian->link); |
fa40a821 | 271 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 272 | synchronize_rcu(); |
3de42dc0 | 273 | } |
5550af4d | 274 | |
5550af4d SY |
275 | int kvm_request_irq_source_id(struct kvm *kvm) |
276 | { | |
277 | unsigned long *bitmap = &kvm->arch.irq_sources_bitmap; | |
fa40a821 MT |
278 | int irq_source_id; |
279 | ||
280 | mutex_lock(&kvm->irq_lock); | |
cd5a2685 | 281 | irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG); |
61552367 | 282 | |
cd5a2685 | 283 | if (irq_source_id >= BITS_PER_LONG) { |
5550af4d | 284 | printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n"); |
0c6ddceb JS |
285 | irq_source_id = -EFAULT; |
286 | goto unlock; | |
61552367 MM |
287 | } |
288 | ||
289 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); | |
7a84428a AW |
290 | #ifdef CONFIG_X86 |
291 | ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID); | |
292 | #endif | |
61552367 | 293 | set_bit(irq_source_id, bitmap); |
0c6ddceb | 294 | unlock: |
fa40a821 | 295 | mutex_unlock(&kvm->irq_lock); |
61552367 | 296 | |
5550af4d SY |
297 | return irq_source_id; |
298 | } | |
299 | ||
300 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id) | |
301 | { | |
61552367 | 302 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); |
7a84428a AW |
303 | #ifdef CONFIG_X86 |
304 | ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID); | |
305 | #endif | |
61552367 | 306 | |
fa40a821 | 307 | mutex_lock(&kvm->irq_lock); |
61552367 | 308 | if (irq_source_id < 0 || |
cd5a2685 | 309 | irq_source_id >= BITS_PER_LONG) { |
5550af4d | 310 | printk(KERN_ERR "kvm: IRQ source ID out of range!\n"); |
0c6ddceb | 311 | goto unlock; |
5550af4d | 312 | } |
e50212bb MT |
313 | clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap); |
314 | if (!irqchip_in_kernel(kvm)) | |
315 | goto unlock; | |
316 | ||
1a577b72 | 317 | kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id); |
1a6e4a8c | 318 | #ifdef CONFIG_X86 |
1a577b72 | 319 | kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id); |
1a6e4a8c | 320 | #endif |
0c6ddceb | 321 | unlock: |
fa40a821 | 322 | mutex_unlock(&kvm->irq_lock); |
5550af4d | 323 | } |
75858a84 AK |
324 | |
325 | void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, | |
326 | struct kvm_irq_mask_notifier *kimn) | |
327 | { | |
fa40a821 | 328 | mutex_lock(&kvm->irq_lock); |
75858a84 | 329 | kimn->irq = irq; |
280aa177 | 330 | hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list); |
fa40a821 | 331 | mutex_unlock(&kvm->irq_lock); |
75858a84 AK |
332 | } |
333 | ||
334 | void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, | |
335 | struct kvm_irq_mask_notifier *kimn) | |
336 | { | |
fa40a821 | 337 | mutex_lock(&kvm->irq_lock); |
280aa177 | 338 | hlist_del_rcu(&kimn->link); |
fa40a821 | 339 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 340 | synchronize_rcu(); |
75858a84 AK |
341 | } |
342 | ||
4a994358 GN |
343 | void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, |
344 | bool mask) | |
75858a84 AK |
345 | { |
346 | struct kvm_irq_mask_notifier *kimn; | |
347 | struct hlist_node *n; | |
4a994358 | 348 | int gsi; |
75858a84 | 349 | |
280aa177 | 350 | rcu_read_lock(); |
4a994358 GN |
351 | gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; |
352 | if (gsi != -1) | |
353 | hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link) | |
354 | if (kimn->irq == gsi) | |
355 | kimn->func(kimn, mask); | |
280aa177 | 356 | rcu_read_unlock(); |
75858a84 AK |
357 | } |
358 | ||
399ec807 AK |
359 | void kvm_free_irq_routing(struct kvm *kvm) |
360 | { | |
e42bba90 GN |
361 | /* Called only during vm destruction. Nobody can use the pointer |
362 | at this stage */ | |
46e624b9 | 363 | kfree(kvm->irq_routing); |
399ec807 AK |
364 | } |
365 | ||
46e624b9 GN |
366 | static int setup_routing_entry(struct kvm_irq_routing_table *rt, |
367 | struct kvm_kernel_irq_routing_entry *e, | |
cded19f3 | 368 | const struct kvm_irq_routing_entry *ue) |
399ec807 AK |
369 | { |
370 | int r = -EINVAL; | |
371 | int delta; | |
d72118ce | 372 | unsigned max_pin; |
46e624b9 GN |
373 | struct kvm_kernel_irq_routing_entry *ei; |
374 | struct hlist_node *n; | |
375 | ||
376 | /* | |
377 | * Do not allow GSI to be mapped to the same irqchip more than once. | |
378 | * Allow only one to one mapping between GSI and MSI. | |
379 | */ | |
380 | hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link) | |
381 | if (ei->type == KVM_IRQ_ROUTING_MSI || | |
f2ebd422 | 382 | ue->type == KVM_IRQ_ROUTING_MSI || |
46e624b9 GN |
383 | ue->u.irqchip.irqchip == ei->irqchip.irqchip) |
384 | return r; | |
399ec807 AK |
385 | |
386 | e->gsi = ue->gsi; | |
5116d8f6 | 387 | e->type = ue->type; |
399ec807 AK |
388 | switch (ue->type) { |
389 | case KVM_IRQ_ROUTING_IRQCHIP: | |
390 | delta = 0; | |
391 | switch (ue->u.irqchip.irqchip) { | |
392 | case KVM_IRQCHIP_PIC_MASTER: | |
393 | e->set = kvm_set_pic_irq; | |
93b6547e | 394 | max_pin = PIC_NUM_PINS; |
399ec807 AK |
395 | break; |
396 | case KVM_IRQCHIP_PIC_SLAVE: | |
4925663a | 397 | e->set = kvm_set_pic_irq; |
93b6547e | 398 | max_pin = PIC_NUM_PINS; |
399ec807 AK |
399 | delta = 8; |
400 | break; | |
401 | case KVM_IRQCHIP_IOAPIC: | |
d72118ce | 402 | max_pin = KVM_IOAPIC_NUM_PINS; |
efbc100c | 403 | e->set = kvm_set_ioapic_irq; |
399ec807 AK |
404 | break; |
405 | default: | |
406 | goto out; | |
407 | } | |
408 | e->irqchip.irqchip = ue->u.irqchip.irqchip; | |
409 | e->irqchip.pin = ue->u.irqchip.pin + delta; | |
d72118ce | 410 | if (e->irqchip.pin >= max_pin) |
3e71f88b GN |
411 | goto out; |
412 | rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi; | |
399ec807 | 413 | break; |
79950e10 SY |
414 | case KVM_IRQ_ROUTING_MSI: |
415 | e->set = kvm_set_msi; | |
416 | e->msi.address_lo = ue->u.msi.address_lo; | |
417 | e->msi.address_hi = ue->u.msi.address_hi; | |
418 | e->msi.data = ue->u.msi.data; | |
419 | break; | |
399ec807 AK |
420 | default: |
421 | goto out; | |
422 | } | |
46e624b9 GN |
423 | |
424 | hlist_add_head(&e->link, &rt->map[e->gsi]); | |
399ec807 AK |
425 | r = 0; |
426 | out: | |
427 | return r; | |
428 | } | |
429 | ||
430 | ||
431 | int kvm_set_irq_routing(struct kvm *kvm, | |
432 | const struct kvm_irq_routing_entry *ue, | |
433 | unsigned nr, | |
434 | unsigned flags) | |
435 | { | |
46e624b9 | 436 | struct kvm_irq_routing_table *new, *old; |
3e71f88b | 437 | u32 i, j, nr_rt_entries = 0; |
399ec807 AK |
438 | int r; |
439 | ||
46e624b9 GN |
440 | for (i = 0; i < nr; ++i) { |
441 | if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES) | |
442 | return -EINVAL; | |
443 | nr_rt_entries = max(nr_rt_entries, ue[i].gsi); | |
444 | } | |
445 | ||
446 | nr_rt_entries += 1; | |
447 | ||
448 | new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head)) | |
449 | + (nr * sizeof(struct kvm_kernel_irq_routing_entry)), | |
450 | GFP_KERNEL); | |
451 | ||
452 | if (!new) | |
453 | return -ENOMEM; | |
454 | ||
455 | new->rt_entries = (void *)&new->map[nr_rt_entries]; | |
456 | ||
457 | new->nr_rt_entries = nr_rt_entries; | |
3e71f88b GN |
458 | for (i = 0; i < 3; i++) |
459 | for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++) | |
460 | new->chip[i][j] = -1; | |
46e624b9 | 461 | |
399ec807 AK |
462 | for (i = 0; i < nr; ++i) { |
463 | r = -EINVAL; | |
399ec807 AK |
464 | if (ue->flags) |
465 | goto out; | |
46e624b9 | 466 | r = setup_routing_entry(new, &new->rt_entries[i], ue); |
399ec807 AK |
467 | if (r) |
468 | goto out; | |
469 | ++ue; | |
399ec807 AK |
470 | } |
471 | ||
fa40a821 | 472 | mutex_lock(&kvm->irq_lock); |
46e624b9 | 473 | old = kvm->irq_routing; |
bd2b53b2 | 474 | kvm_irq_routing_update(kvm, new); |
fa40a821 | 475 | mutex_unlock(&kvm->irq_lock); |
bd2b53b2 | 476 | |
e42bba90 | 477 | synchronize_rcu(); |
399ec807 | 478 | |
46e624b9 | 479 | new = old; |
399ec807 AK |
480 | r = 0; |
481 | ||
482 | out: | |
46e624b9 | 483 | kfree(new); |
399ec807 AK |
484 | return r; |
485 | } | |
486 | ||
487 | #define IOAPIC_ROUTING_ENTRY(irq) \ | |
488 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
489 | .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) } | |
490 | #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq) | |
491 | ||
492 | #ifdef CONFIG_X86 | |
399ec807 AK |
493 | # define PIC_ROUTING_ENTRY(irq) \ |
494 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
495 | .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 } | |
496 | # define ROUTING_ENTRY2(irq) \ | |
497 | IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq) | |
498 | #else | |
499 | # define ROUTING_ENTRY2(irq) \ | |
500 | IOAPIC_ROUTING_ENTRY(irq) | |
501 | #endif | |
502 | ||
503 | static const struct kvm_irq_routing_entry default_routing[] = { | |
504 | ROUTING_ENTRY2(0), ROUTING_ENTRY2(1), | |
505 | ROUTING_ENTRY2(2), ROUTING_ENTRY2(3), | |
506 | ROUTING_ENTRY2(4), ROUTING_ENTRY2(5), | |
507 | ROUTING_ENTRY2(6), ROUTING_ENTRY2(7), | |
508 | ROUTING_ENTRY2(8), ROUTING_ENTRY2(9), | |
509 | ROUTING_ENTRY2(10), ROUTING_ENTRY2(11), | |
510 | ROUTING_ENTRY2(12), ROUTING_ENTRY2(13), | |
511 | ROUTING_ENTRY2(14), ROUTING_ENTRY2(15), | |
512 | ROUTING_ENTRY1(16), ROUTING_ENTRY1(17), | |
513 | ROUTING_ENTRY1(18), ROUTING_ENTRY1(19), | |
514 | ROUTING_ENTRY1(20), ROUTING_ENTRY1(21), | |
515 | ROUTING_ENTRY1(22), ROUTING_ENTRY1(23), | |
516 | #ifdef CONFIG_IA64 | |
517 | ROUTING_ENTRY1(24), ROUTING_ENTRY1(25), | |
518 | ROUTING_ENTRY1(26), ROUTING_ENTRY1(27), | |
519 | ROUTING_ENTRY1(28), ROUTING_ENTRY1(29), | |
520 | ROUTING_ENTRY1(30), ROUTING_ENTRY1(31), | |
521 | ROUTING_ENTRY1(32), ROUTING_ENTRY1(33), | |
522 | ROUTING_ENTRY1(34), ROUTING_ENTRY1(35), | |
523 | ROUTING_ENTRY1(36), ROUTING_ENTRY1(37), | |
524 | ROUTING_ENTRY1(38), ROUTING_ENTRY1(39), | |
525 | ROUTING_ENTRY1(40), ROUTING_ENTRY1(41), | |
526 | ROUTING_ENTRY1(42), ROUTING_ENTRY1(43), | |
527 | ROUTING_ENTRY1(44), ROUTING_ENTRY1(45), | |
528 | ROUTING_ENTRY1(46), ROUTING_ENTRY1(47), | |
529 | #endif | |
530 | }; | |
531 | ||
532 | int kvm_setup_default_irq_routing(struct kvm *kvm) | |
533 | { | |
534 | return kvm_set_irq_routing(kvm, default_routing, | |
535 | ARRAY_SIZE(default_routing), 0); | |
536 | } |