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Commit | Line | Data |
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3de42dc0 XZ |
1 | /* |
2 | * irq_comm.c: Common API for in kernel interrupt controller | |
3 | * Copyright (c) 2007, Intel Corporation. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms and conditions of the GNU General Public License, | |
7 | * version 2, as published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope it will be useful, but WITHOUT | |
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
12 | * more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License along with | |
15 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | |
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | |
17 | * Authors: | |
18 | * Yaozu (Eddie) Dong <Eddie.dong@intel.com> | |
19 | * | |
20 | */ | |
21 | ||
22 | #include <linux/kvm_host.h> | |
229456fc | 23 | #include <trace/events/kvm.h> |
79950e10 | 24 | |
79950e10 | 25 | #include <asm/msidef.h> |
58c2dde1 GN |
26 | #ifdef CONFIG_IA64 |
27 | #include <asm/iosapic.h> | |
28 | #endif | |
79950e10 | 29 | |
3de42dc0 XZ |
30 | #include "irq.h" |
31 | ||
32 | #include "ioapic.h" | |
33 | ||
1a6e4a8c GN |
34 | static inline int kvm_irq_line_state(unsigned long *irq_state, |
35 | int irq_source_id, int level) | |
36 | { | |
37 | /* Logical OR for level trig interrupt */ | |
38 | if (level) | |
39 | set_bit(irq_source_id, irq_state); | |
40 | else | |
41 | clear_bit(irq_source_id, irq_state); | |
42 | ||
43 | return !!(*irq_state); | |
44 | } | |
45 | ||
4925663a | 46 | static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 47 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 AK |
48 | { |
49 | #ifdef CONFIG_X86 | |
1a6e4a8c GN |
50 | struct kvm_pic *pic = pic_irqchip(kvm); |
51 | level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin], | |
52 | irq_source_id, level); | |
53 | return kvm_pic_set_irq(pic, e->irqchip.pin, level); | |
4925663a GN |
54 | #else |
55 | return -1; | |
399ec807 AK |
56 | #endif |
57 | } | |
58 | ||
4925663a | 59 | static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 60 | struct kvm *kvm, int irq_source_id, int level) |
399ec807 | 61 | { |
1a6e4a8c GN |
62 | struct kvm_ioapic *ioapic = kvm->arch.vioapic; |
63 | level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin], | |
64 | irq_source_id, level); | |
65 | ||
66 | return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level); | |
399ec807 AK |
67 | } |
68 | ||
58c2dde1 | 69 | inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) |
116191b6 | 70 | { |
58c2dde1 GN |
71 | #ifdef CONFIG_IA64 |
72 | return irq->delivery_mode == | |
73 | (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); | |
74 | #else | |
75 | return irq->delivery_mode == APIC_DM_LOWEST; | |
76 | #endif | |
77 | } | |
116191b6 | 78 | |
58c2dde1 GN |
79 | int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, |
80 | struct kvm_lapic_irq *irq) | |
81 | { | |
82 | int i, r = -1; | |
83 | struct kvm_vcpu *vcpu, *lowest = NULL; | |
84 | ||
85 | if (irq->dest_mode == 0 && irq->dest_id == 0xff && | |
86 | kvm_is_dm_lowest_prio(irq)) | |
343f94fe GN |
87 | printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); |
88 | ||
988a2cae GN |
89 | kvm_for_each_vcpu(i, vcpu, kvm) { |
90 | if (!kvm_apic_present(vcpu)) | |
343f94fe GN |
91 | continue; |
92 | ||
58c2dde1 GN |
93 | if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, |
94 | irq->dest_id, irq->dest_mode)) | |
343f94fe GN |
95 | continue; |
96 | ||
58c2dde1 GN |
97 | if (!kvm_is_dm_lowest_prio(irq)) { |
98 | if (r < 0) | |
99 | r = 0; | |
100 | r += kvm_apic_set_irq(vcpu, irq); | |
e1035715 | 101 | } else { |
58c2dde1 GN |
102 | if (!lowest) |
103 | lowest = vcpu; | |
104 | else if (kvm_apic_compare_prio(vcpu, lowest) < 0) | |
105 | lowest = vcpu; | |
e1035715 | 106 | } |
343f94fe GN |
107 | } |
108 | ||
58c2dde1 GN |
109 | if (lowest) |
110 | r = kvm_apic_set_irq(lowest, irq); | |
111 | ||
112 | return r; | |
116191b6 SY |
113 | } |
114 | ||
4925663a | 115 | static int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, |
1a6e4a8c | 116 | struct kvm *kvm, int irq_source_id, int level) |
79950e10 | 117 | { |
58c2dde1 | 118 | struct kvm_lapic_irq irq; |
79950e10 | 119 | |
1a6e4a8c GN |
120 | if (!level) |
121 | return -1; | |
122 | ||
1000ff8d GN |
123 | trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data); |
124 | ||
58c2dde1 | 125 | irq.dest_id = (e->msi.address_lo & |
116191b6 | 126 | MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
58c2dde1 | 127 | irq.vector = (e->msi.data & |
116191b6 | 128 | MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
58c2dde1 GN |
129 | irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; |
130 | irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; | |
131 | irq.delivery_mode = e->msi.data & 0x700; | |
132 | irq.level = 1; | |
133 | irq.shorthand = 0; | |
116191b6 SY |
134 | |
135 | /* TODO Deal with RH bit of MSI message address */ | |
58c2dde1 | 136 | return kvm_irq_delivery_to_apic(kvm, NULL, &irq); |
79950e10 SY |
137 | } |
138 | ||
680b3648 | 139 | /* |
4925663a GN |
140 | * Return value: |
141 | * < 0 Interrupt was ignored (masked or not delivered for other reasons) | |
142 | * = 0 Interrupt was coalesced (previous irq is still pending) | |
143 | * > 0 Number of CPUs interrupt was delivered to | |
144 | */ | |
46e624b9 | 145 | int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level) |
3de42dc0 | 146 | { |
eba0226b GN |
147 | struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS]; |
148 | int ret = -1, i = 0; | |
46e624b9 GN |
149 | struct kvm_irq_routing_table *irq_rt; |
150 | struct hlist_node *n; | |
79950e10 | 151 | |
ae8c1c40 | 152 | trace_kvm_set_irq(irq, level, irq_source_id); |
229456fc | 153 | |
3de42dc0 XZ |
154 | /* Not possible to detect if the guest uses the PIC or the |
155 | * IOAPIC. So set the bit in both. The guest will ignore | |
156 | * writes to the unused one. | |
157 | */ | |
e42bba90 GN |
158 | rcu_read_lock(); |
159 | irq_rt = rcu_dereference(kvm->irq_routing); | |
46e624b9 | 160 | if (irq < irq_rt->nr_rt_entries) |
eba0226b GN |
161 | hlist_for_each_entry(e, n, &irq_rt->map[irq], link) |
162 | irq_set[i++] = *e; | |
e42bba90 | 163 | rcu_read_unlock(); |
eba0226b GN |
164 | |
165 | while(i--) { | |
166 | int r; | |
167 | r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level); | |
168 | if (r < 0) | |
169 | continue; | |
170 | ||
171 | ret = r + ((ret < 0) ? 0 : ret); | |
172 | } | |
173 | ||
4925663a | 174 | return ret; |
3de42dc0 XZ |
175 | } |
176 | ||
44882eed | 177 | void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin) |
3de42dc0 XZ |
178 | { |
179 | struct kvm_irq_ack_notifier *kian; | |
180 | struct hlist_node *n; | |
3e71f88b | 181 | int gsi; |
44882eed | 182 | |
229456fc MT |
183 | trace_kvm_ack_irq(irqchip, pin); |
184 | ||
e42bba90 GN |
185 | rcu_read_lock(); |
186 | gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; | |
3e71f88b | 187 | if (gsi != -1) |
280aa177 GN |
188 | hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list, |
189 | link) | |
3e71f88b GN |
190 | if (kian->gsi == gsi) |
191 | kian->irq_acked(kian); | |
280aa177 | 192 | rcu_read_unlock(); |
3de42dc0 XZ |
193 | } |
194 | ||
195 | void kvm_register_irq_ack_notifier(struct kvm *kvm, | |
196 | struct kvm_irq_ack_notifier *kian) | |
197 | { | |
fa40a821 | 198 | mutex_lock(&kvm->irq_lock); |
280aa177 | 199 | hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list); |
fa40a821 | 200 | mutex_unlock(&kvm->irq_lock); |
3de42dc0 XZ |
201 | } |
202 | ||
fa40a821 MT |
203 | void kvm_unregister_irq_ack_notifier(struct kvm *kvm, |
204 | struct kvm_irq_ack_notifier *kian) | |
3de42dc0 | 205 | { |
fa40a821 | 206 | mutex_lock(&kvm->irq_lock); |
280aa177 | 207 | hlist_del_init_rcu(&kian->link); |
fa40a821 | 208 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 209 | synchronize_rcu(); |
3de42dc0 | 210 | } |
5550af4d | 211 | |
5550af4d SY |
212 | int kvm_request_irq_source_id(struct kvm *kvm) |
213 | { | |
214 | unsigned long *bitmap = &kvm->arch.irq_sources_bitmap; | |
fa40a821 MT |
215 | int irq_source_id; |
216 | ||
217 | mutex_lock(&kvm->irq_lock); | |
cd5a2685 | 218 | irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG); |
61552367 | 219 | |
cd5a2685 | 220 | if (irq_source_id >= BITS_PER_LONG) { |
5550af4d | 221 | printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n"); |
0c6ddceb JS |
222 | irq_source_id = -EFAULT; |
223 | goto unlock; | |
61552367 MM |
224 | } |
225 | ||
226 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); | |
227 | set_bit(irq_source_id, bitmap); | |
0c6ddceb | 228 | unlock: |
fa40a821 | 229 | mutex_unlock(&kvm->irq_lock); |
61552367 | 230 | |
5550af4d SY |
231 | return irq_source_id; |
232 | } | |
233 | ||
234 | void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id) | |
235 | { | |
236 | int i; | |
237 | ||
61552367 MM |
238 | ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); |
239 | ||
fa40a821 | 240 | mutex_lock(&kvm->irq_lock); |
61552367 | 241 | if (irq_source_id < 0 || |
cd5a2685 | 242 | irq_source_id >= BITS_PER_LONG) { |
5550af4d | 243 | printk(KERN_ERR "kvm: IRQ source ID out of range!\n"); |
0c6ddceb | 244 | goto unlock; |
5550af4d | 245 | } |
e50212bb MT |
246 | clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap); |
247 | if (!irqchip_in_kernel(kvm)) | |
248 | goto unlock; | |
249 | ||
1a6e4a8c GN |
250 | for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) { |
251 | clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]); | |
252 | if (i >= 16) | |
253 | continue; | |
254 | #ifdef CONFIG_X86 | |
255 | clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]); | |
256 | #endif | |
257 | } | |
0c6ddceb | 258 | unlock: |
fa40a821 | 259 | mutex_unlock(&kvm->irq_lock); |
5550af4d | 260 | } |
75858a84 AK |
261 | |
262 | void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, | |
263 | struct kvm_irq_mask_notifier *kimn) | |
264 | { | |
fa40a821 | 265 | mutex_lock(&kvm->irq_lock); |
75858a84 | 266 | kimn->irq = irq; |
280aa177 | 267 | hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list); |
fa40a821 | 268 | mutex_unlock(&kvm->irq_lock); |
75858a84 AK |
269 | } |
270 | ||
271 | void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, | |
272 | struct kvm_irq_mask_notifier *kimn) | |
273 | { | |
fa40a821 | 274 | mutex_lock(&kvm->irq_lock); |
280aa177 | 275 | hlist_del_rcu(&kimn->link); |
fa40a821 | 276 | mutex_unlock(&kvm->irq_lock); |
280aa177 | 277 | synchronize_rcu(); |
75858a84 AK |
278 | } |
279 | ||
280 | void kvm_fire_mask_notifiers(struct kvm *kvm, int irq, bool mask) | |
281 | { | |
282 | struct kvm_irq_mask_notifier *kimn; | |
283 | struct hlist_node *n; | |
284 | ||
280aa177 GN |
285 | rcu_read_lock(); |
286 | hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link) | |
75858a84 AK |
287 | if (kimn->irq == irq) |
288 | kimn->func(kimn, mask); | |
280aa177 | 289 | rcu_read_unlock(); |
75858a84 AK |
290 | } |
291 | ||
399ec807 AK |
292 | void kvm_free_irq_routing(struct kvm *kvm) |
293 | { | |
e42bba90 GN |
294 | /* Called only during vm destruction. Nobody can use the pointer |
295 | at this stage */ | |
46e624b9 | 296 | kfree(kvm->irq_routing); |
399ec807 AK |
297 | } |
298 | ||
46e624b9 GN |
299 | static int setup_routing_entry(struct kvm_irq_routing_table *rt, |
300 | struct kvm_kernel_irq_routing_entry *e, | |
cded19f3 | 301 | const struct kvm_irq_routing_entry *ue) |
399ec807 AK |
302 | { |
303 | int r = -EINVAL; | |
304 | int delta; | |
46e624b9 GN |
305 | struct kvm_kernel_irq_routing_entry *ei; |
306 | struct hlist_node *n; | |
307 | ||
308 | /* | |
309 | * Do not allow GSI to be mapped to the same irqchip more than once. | |
310 | * Allow only one to one mapping between GSI and MSI. | |
311 | */ | |
312 | hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link) | |
313 | if (ei->type == KVM_IRQ_ROUTING_MSI || | |
314 | ue->u.irqchip.irqchip == ei->irqchip.irqchip) | |
315 | return r; | |
399ec807 AK |
316 | |
317 | e->gsi = ue->gsi; | |
5116d8f6 | 318 | e->type = ue->type; |
399ec807 AK |
319 | switch (ue->type) { |
320 | case KVM_IRQ_ROUTING_IRQCHIP: | |
321 | delta = 0; | |
322 | switch (ue->u.irqchip.irqchip) { | |
323 | case KVM_IRQCHIP_PIC_MASTER: | |
324 | e->set = kvm_set_pic_irq; | |
325 | break; | |
326 | case KVM_IRQCHIP_PIC_SLAVE: | |
4925663a | 327 | e->set = kvm_set_pic_irq; |
399ec807 AK |
328 | delta = 8; |
329 | break; | |
330 | case KVM_IRQCHIP_IOAPIC: | |
efbc100c | 331 | e->set = kvm_set_ioapic_irq; |
399ec807 AK |
332 | break; |
333 | default: | |
334 | goto out; | |
335 | } | |
336 | e->irqchip.irqchip = ue->u.irqchip.irqchip; | |
337 | e->irqchip.pin = ue->u.irqchip.pin + delta; | |
3e71f88b GN |
338 | if (e->irqchip.pin >= KVM_IOAPIC_NUM_PINS) |
339 | goto out; | |
340 | rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi; | |
399ec807 | 341 | break; |
79950e10 SY |
342 | case KVM_IRQ_ROUTING_MSI: |
343 | e->set = kvm_set_msi; | |
344 | e->msi.address_lo = ue->u.msi.address_lo; | |
345 | e->msi.address_hi = ue->u.msi.address_hi; | |
346 | e->msi.data = ue->u.msi.data; | |
347 | break; | |
399ec807 AK |
348 | default: |
349 | goto out; | |
350 | } | |
46e624b9 GN |
351 | |
352 | hlist_add_head(&e->link, &rt->map[e->gsi]); | |
399ec807 AK |
353 | r = 0; |
354 | out: | |
355 | return r; | |
356 | } | |
357 | ||
358 | ||
359 | int kvm_set_irq_routing(struct kvm *kvm, | |
360 | const struct kvm_irq_routing_entry *ue, | |
361 | unsigned nr, | |
362 | unsigned flags) | |
363 | { | |
46e624b9 | 364 | struct kvm_irq_routing_table *new, *old; |
3e71f88b | 365 | u32 i, j, nr_rt_entries = 0; |
399ec807 AK |
366 | int r; |
367 | ||
46e624b9 GN |
368 | for (i = 0; i < nr; ++i) { |
369 | if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES) | |
370 | return -EINVAL; | |
371 | nr_rt_entries = max(nr_rt_entries, ue[i].gsi); | |
372 | } | |
373 | ||
374 | nr_rt_entries += 1; | |
375 | ||
376 | new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head)) | |
377 | + (nr * sizeof(struct kvm_kernel_irq_routing_entry)), | |
378 | GFP_KERNEL); | |
379 | ||
380 | if (!new) | |
381 | return -ENOMEM; | |
382 | ||
383 | new->rt_entries = (void *)&new->map[nr_rt_entries]; | |
384 | ||
385 | new->nr_rt_entries = nr_rt_entries; | |
3e71f88b GN |
386 | for (i = 0; i < 3; i++) |
387 | for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++) | |
388 | new->chip[i][j] = -1; | |
46e624b9 | 389 | |
399ec807 AK |
390 | for (i = 0; i < nr; ++i) { |
391 | r = -EINVAL; | |
399ec807 AK |
392 | if (ue->flags) |
393 | goto out; | |
46e624b9 | 394 | r = setup_routing_entry(new, &new->rt_entries[i], ue); |
399ec807 AK |
395 | if (r) |
396 | goto out; | |
397 | ++ue; | |
399ec807 AK |
398 | } |
399 | ||
fa40a821 | 400 | mutex_lock(&kvm->irq_lock); |
46e624b9 | 401 | old = kvm->irq_routing; |
e42bba90 | 402 | rcu_assign_pointer(kvm->irq_routing, new); |
fa40a821 | 403 | mutex_unlock(&kvm->irq_lock); |
e42bba90 | 404 | synchronize_rcu(); |
399ec807 | 405 | |
46e624b9 | 406 | new = old; |
399ec807 AK |
407 | r = 0; |
408 | ||
409 | out: | |
46e624b9 | 410 | kfree(new); |
399ec807 AK |
411 | return r; |
412 | } | |
413 | ||
414 | #define IOAPIC_ROUTING_ENTRY(irq) \ | |
415 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
416 | .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) } | |
417 | #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq) | |
418 | ||
419 | #ifdef CONFIG_X86 | |
399ec807 AK |
420 | # define PIC_ROUTING_ENTRY(irq) \ |
421 | { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ | |
422 | .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 } | |
423 | # define ROUTING_ENTRY2(irq) \ | |
424 | IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq) | |
425 | #else | |
426 | # define ROUTING_ENTRY2(irq) \ | |
427 | IOAPIC_ROUTING_ENTRY(irq) | |
428 | #endif | |
429 | ||
430 | static const struct kvm_irq_routing_entry default_routing[] = { | |
431 | ROUTING_ENTRY2(0), ROUTING_ENTRY2(1), | |
432 | ROUTING_ENTRY2(2), ROUTING_ENTRY2(3), | |
433 | ROUTING_ENTRY2(4), ROUTING_ENTRY2(5), | |
434 | ROUTING_ENTRY2(6), ROUTING_ENTRY2(7), | |
435 | ROUTING_ENTRY2(8), ROUTING_ENTRY2(9), | |
436 | ROUTING_ENTRY2(10), ROUTING_ENTRY2(11), | |
437 | ROUTING_ENTRY2(12), ROUTING_ENTRY2(13), | |
438 | ROUTING_ENTRY2(14), ROUTING_ENTRY2(15), | |
439 | ROUTING_ENTRY1(16), ROUTING_ENTRY1(17), | |
440 | ROUTING_ENTRY1(18), ROUTING_ENTRY1(19), | |
441 | ROUTING_ENTRY1(20), ROUTING_ENTRY1(21), | |
442 | ROUTING_ENTRY1(22), ROUTING_ENTRY1(23), | |
443 | #ifdef CONFIG_IA64 | |
444 | ROUTING_ENTRY1(24), ROUTING_ENTRY1(25), | |
445 | ROUTING_ENTRY1(26), ROUTING_ENTRY1(27), | |
446 | ROUTING_ENTRY1(28), ROUTING_ENTRY1(29), | |
447 | ROUTING_ENTRY1(30), ROUTING_ENTRY1(31), | |
448 | ROUTING_ENTRY1(32), ROUTING_ENTRY1(33), | |
449 | ROUTING_ENTRY1(34), ROUTING_ENTRY1(35), | |
450 | ROUTING_ENTRY1(36), ROUTING_ENTRY1(37), | |
451 | ROUTING_ENTRY1(38), ROUTING_ENTRY1(39), | |
452 | ROUTING_ENTRY1(40), ROUTING_ENTRY1(41), | |
453 | ROUTING_ENTRY1(42), ROUTING_ENTRY1(43), | |
454 | ROUTING_ENTRY1(44), ROUTING_ENTRY1(45), | |
455 | ROUTING_ENTRY1(46), ROUTING_ENTRY1(47), | |
456 | #endif | |
457 | }; | |
458 | ||
459 | int kvm_setup_default_irq_routing(struct kvm *kvm) | |
460 | { | |
461 | return kvm_set_irq_routing(kvm, default_routing, | |
462 | ARRAY_SIZE(default_routing), 0); | |
463 | } |