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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
fb065187 | 40 | #include "audio/audio.h" |
67b915a5 FB |
41 | |
42 | #ifndef O_LARGEFILE | |
43 | #define O_LARGEFILE 0 | |
44 | #endif | |
40c3bac3 FB |
45 | #ifndef O_BINARY |
46 | #define O_BINARY 0 | |
47 | #endif | |
67b915a5 FB |
48 | |
49 | #ifdef _WIN32 | |
57d1a2b6 FB |
50 | #define lseek _lseeki64 |
51 | #define ENOTSUP 4096 | |
52 | /* XXX: find 64 bit version */ | |
53 | #define ftruncate chsize | |
54 | ||
55 | static inline char *realpath(const char *path, char *resolved_path) | |
56 | { | |
57 | _fullpath(resolved_path, path, _MAX_PATH); | |
58 | return resolved_path; | |
59 | } | |
67b915a5 | 60 | #endif |
8a7ddc38 | 61 | |
ea2384d3 FB |
62 | #ifdef QEMU_TOOL |
63 | ||
64 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
65 | the target CPU type */ | |
66 | #include "config-host.h" | |
67 | #include <setjmp.h> | |
68 | #include "osdep.h" | |
69 | #include "bswap.h" | |
70 | ||
71 | #else | |
72 | ||
16f62432 | 73 | #include "cpu.h" |
1fddef4b | 74 | #include "gdbstub.h" |
16f62432 | 75 | |
ea2384d3 FB |
76 | #endif /* !defined(QEMU_TOOL) */ |
77 | ||
67b915a5 FB |
78 | #ifndef glue |
79 | #define xglue(x, y) x ## y | |
80 | #define glue(x, y) xglue(x, y) | |
81 | #define stringify(s) tostring(s) | |
82 | #define tostring(s) #s | |
83 | #endif | |
84 | ||
33e3963e | 85 | /* vl.c */ |
80cabfad | 86 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 87 | |
80cabfad FB |
88 | void hw_error(const char *fmt, ...); |
89 | ||
7587cf44 | 90 | int get_image_size(const char *filename); |
80cabfad FB |
91 | int load_image(const char *filename, uint8_t *addr); |
92 | extern const char *bios_dir; | |
93 | ||
94 | void pstrcpy(char *buf, int buf_size, const char *str); | |
95 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 96 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 97 | |
8a7ddc38 FB |
98 | extern int vm_running; |
99 | ||
0bd48850 FB |
100 | typedef struct vm_change_state_entry VMChangeStateEntry; |
101 | typedef void VMChangeStateHandler(void *opaque, int running); | |
8a7ddc38 FB |
102 | typedef void VMStopHandler(void *opaque, int reason); |
103 | ||
0bd48850 FB |
104 | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
105 | void *opaque); | |
106 | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); | |
107 | ||
8a7ddc38 FB |
108 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
109 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
110 | ||
111 | void vm_start(void); | |
112 | void vm_stop(int reason); | |
113 | ||
bb0c6722 FB |
114 | typedef void QEMUResetHandler(void *opaque); |
115 | ||
116 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
117 | void qemu_system_reset_request(void); | |
118 | void qemu_system_shutdown_request(void); | |
3475187d FB |
119 | void qemu_system_powerdown_request(void); |
120 | #if !defined(TARGET_SPARC) | |
121 | // Please implement a power failure function to signal the OS | |
122 | #define qemu_system_powerdown() do{}while(0) | |
123 | #else | |
124 | void qemu_system_powerdown(void); | |
125 | #endif | |
bb0c6722 | 126 | |
ea2384d3 FB |
127 | void main_loop_wait(int timeout); |
128 | ||
0ced6589 FB |
129 | extern int ram_size; |
130 | extern int bios_size; | |
ee22c2f7 | 131 | extern int rtc_utc; |
1f04275e | 132 | extern int cirrus_vga_enabled; |
28b9b5af FB |
133 | extern int graphic_width; |
134 | extern int graphic_height; | |
135 | extern int graphic_depth; | |
3d11d0eb | 136 | extern const char *keyboard_layout; |
d993e026 | 137 | extern int kqemu_allowed; |
a09db21f | 138 | extern int win2k_install_hack; |
bb36d470 | 139 | extern int usb_enabled; |
6a00d601 | 140 | extern int smp_cpus; |
0ced6589 FB |
141 | |
142 | /* XXX: make it dynamic */ | |
143 | #if defined (TARGET_PPC) | |
d5295253 | 144 | #define BIOS_SIZE ((512 + 32) * 1024) |
6af0bf9c FB |
145 | #elif defined(TARGET_MIPS) |
146 | #define BIOS_SIZE (128 * 1024) | |
0ced6589 | 147 | #else |
7587cf44 | 148 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 149 | #endif |
aaaa7df6 | 150 | |
63066f4f FB |
151 | /* keyboard/mouse support */ |
152 | ||
153 | #define MOUSE_EVENT_LBUTTON 0x01 | |
154 | #define MOUSE_EVENT_RBUTTON 0x02 | |
155 | #define MOUSE_EVENT_MBUTTON 0x04 | |
156 | ||
157 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
158 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
159 | ||
160 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
161 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); | |
162 | ||
163 | void kbd_put_keycode(int keycode); | |
164 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
165 | ||
82c643ff FB |
166 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
167 | constants) */ | |
168 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
169 | #define QEMU_KEY_BACKSPACE 0x007f | |
170 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
171 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
172 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
173 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
174 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
175 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
176 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
177 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
178 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
179 | ||
180 | #define QEMU_KEY_CTRL_UP 0xe400 | |
181 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
182 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
183 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
184 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
185 | #define QEMU_KEY_CTRL_END 0xe405 | |
186 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
187 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
188 | ||
189 | void kbd_put_keysym(int keysym); | |
190 | ||
c20709aa FB |
191 | /* async I/O support */ |
192 | ||
193 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
194 | typedef int IOCanRWHandler(void *opaque); | |
7c9d8e07 | 195 | typedef void IOHandler(void *opaque); |
c20709aa | 196 | |
7c9d8e07 FB |
197 | int qemu_set_fd_handler2(int fd, |
198 | IOCanRWHandler *fd_read_poll, | |
199 | IOHandler *fd_read, | |
200 | IOHandler *fd_write, | |
201 | void *opaque); | |
202 | int qemu_set_fd_handler(int fd, | |
203 | IOHandler *fd_read, | |
204 | IOHandler *fd_write, | |
205 | void *opaque); | |
c20709aa | 206 | |
82c643ff FB |
207 | /* character device */ |
208 | ||
209 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 210 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
82c643ff | 211 | |
2122c51a FB |
212 | |
213 | ||
214 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
215 | typedef struct { | |
216 | int speed; | |
217 | int parity; | |
218 | int data_bits; | |
219 | int stop_bits; | |
220 | } QEMUSerialSetParams; | |
221 | ||
222 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
223 | ||
224 | #define CHR_IOCTL_PP_READ_DATA 3 | |
225 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
226 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
227 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
228 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
229 | ||
82c643ff FB |
230 | typedef void IOEventHandler(void *opaque, int event); |
231 | ||
232 | typedef struct CharDriverState { | |
233 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
234 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
235 | IOCanRWHandler *fd_can_read, | |
236 | IOReadHandler *fd_read, void *opaque); | |
2122c51a | 237 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
82c643ff | 238 | IOEventHandler *chr_event; |
eb45f5fe | 239 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
82c643ff FB |
240 | void *opaque; |
241 | } CharDriverState; | |
242 | ||
243 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
244 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 245 | void qemu_chr_send_event(CharDriverState *s, int event); |
82c643ff FB |
246 | void qemu_chr_add_read_handler(CharDriverState *s, |
247 | IOCanRWHandler *fd_can_read, | |
248 | IOReadHandler *fd_read, void *opaque); | |
249 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
2122c51a | 250 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
f8d179e3 | 251 | |
82c643ff FB |
252 | /* consoles */ |
253 | ||
254 | typedef struct DisplayState DisplayState; | |
255 | typedef struct TextConsole TextConsole; | |
256 | ||
257 | extern TextConsole *vga_console; | |
258 | ||
259 | TextConsole *graphic_console_init(DisplayState *ds); | |
260 | int is_active_console(TextConsole *s); | |
261 | CharDriverState *text_console_init(DisplayState *ds); | |
262 | void console_select(unsigned int index); | |
263 | ||
8d11df9e FB |
264 | /* serial ports */ |
265 | ||
266 | #define MAX_SERIAL_PORTS 4 | |
267 | ||
268 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
269 | ||
6508fe59 FB |
270 | /* parallel ports */ |
271 | ||
272 | #define MAX_PARALLEL_PORTS 3 | |
273 | ||
274 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
275 | ||
7c9d8e07 FB |
276 | /* VLANs support */ |
277 | ||
278 | typedef struct VLANClientState VLANClientState; | |
279 | ||
280 | struct VLANClientState { | |
281 | IOReadHandler *fd_read; | |
d861b05e PB |
282 | /* Packets may still be sent if this returns zero. It's used to |
283 | rate-limit the slirp code. */ | |
284 | IOCanRWHandler *fd_can_read; | |
7c9d8e07 FB |
285 | void *opaque; |
286 | struct VLANClientState *next; | |
287 | struct VLANState *vlan; | |
288 | char info_str[256]; | |
289 | }; | |
290 | ||
291 | typedef struct VLANState { | |
292 | int id; | |
293 | VLANClientState *first_client; | |
294 | struct VLANState *next; | |
295 | } VLANState; | |
296 | ||
297 | VLANState *qemu_find_vlan(int id); | |
298 | VLANClientState *qemu_new_vlan_client(VLANState *vlan, | |
d861b05e PB |
299 | IOReadHandler *fd_read, |
300 | IOCanRWHandler *fd_can_read, | |
301 | void *opaque); | |
302 | int qemu_can_send_packet(VLANClientState *vc); | |
7c9d8e07 | 303 | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
d861b05e | 304 | void qemu_handler_true(void *opaque); |
7c9d8e07 FB |
305 | |
306 | void do_info_network(void); | |
307 | ||
7fb843f8 FB |
308 | /* TAP win32 */ |
309 | int tap_win32_init(VLANState *vlan, const char *ifname); | |
310 | void tap_win32_poll(void); | |
311 | ||
7c9d8e07 | 312 | /* NIC info */ |
c4b1fcc0 FB |
313 | |
314 | #define MAX_NICS 8 | |
315 | ||
7c9d8e07 | 316 | typedef struct NICInfo { |
c4b1fcc0 | 317 | uint8_t macaddr[6]; |
a41b2ff2 | 318 | const char *model; |
7c9d8e07 FB |
319 | VLANState *vlan; |
320 | } NICInfo; | |
c4b1fcc0 FB |
321 | |
322 | extern int nb_nics; | |
7c9d8e07 | 323 | extern NICInfo nd_table[MAX_NICS]; |
8a7ddc38 FB |
324 | |
325 | /* timers */ | |
326 | ||
327 | typedef struct QEMUClock QEMUClock; | |
328 | typedef struct QEMUTimer QEMUTimer; | |
329 | typedef void QEMUTimerCB(void *opaque); | |
330 | ||
331 | /* The real time clock should be used only for stuff which does not | |
332 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 333 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
334 | Hz. */ |
335 | extern QEMUClock *rt_clock; | |
336 | ||
e80cfcfc | 337 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
338 | when the virtual machine is stopped. Virtual timers use a high |
339 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
340 | extern QEMUClock *vm_clock; | |
341 | ||
342 | int64_t qemu_get_clock(QEMUClock *clock); | |
343 | ||
344 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
345 | void qemu_free_timer(QEMUTimer *ts); | |
346 | void qemu_del_timer(QEMUTimer *ts); | |
347 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
348 | int qemu_timer_pending(QEMUTimer *ts); | |
349 | ||
350 | extern int64_t ticks_per_sec; | |
351 | extern int pit_min_timer_count; | |
352 | ||
353 | void cpu_enable_ticks(void); | |
354 | void cpu_disable_ticks(void); | |
355 | ||
356 | /* VM Load/Save */ | |
357 | ||
358 | typedef FILE QEMUFile; | |
359 | ||
360 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
361 | void qemu_put_byte(QEMUFile *f, int v); | |
362 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
363 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
364 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
365 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
366 | int qemu_get_byte(QEMUFile *f); | |
367 | unsigned int qemu_get_be16(QEMUFile *f); | |
368 | unsigned int qemu_get_be32(QEMUFile *f); | |
369 | uint64_t qemu_get_be64(QEMUFile *f); | |
370 | ||
371 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
372 | { | |
373 | qemu_put_be64(f, *pv); | |
374 | } | |
375 | ||
376 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
377 | { | |
378 | qemu_put_be32(f, *pv); | |
379 | } | |
380 | ||
381 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
382 | { | |
383 | qemu_put_be16(f, *pv); | |
384 | } | |
385 | ||
386 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
387 | { | |
388 | qemu_put_byte(f, *pv); | |
389 | } | |
390 | ||
391 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
392 | { | |
393 | *pv = qemu_get_be64(f); | |
394 | } | |
395 | ||
396 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
397 | { | |
398 | *pv = qemu_get_be32(f); | |
399 | } | |
400 | ||
401 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
402 | { | |
403 | *pv = qemu_get_be16(f); | |
404 | } | |
405 | ||
406 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
407 | { | |
408 | *pv = qemu_get_byte(f); | |
409 | } | |
410 | ||
c27004ec FB |
411 | #if TARGET_LONG_BITS == 64 |
412 | #define qemu_put_betl qemu_put_be64 | |
413 | #define qemu_get_betl qemu_get_be64 | |
414 | #define qemu_put_betls qemu_put_be64s | |
415 | #define qemu_get_betls qemu_get_be64s | |
416 | #else | |
417 | #define qemu_put_betl qemu_put_be32 | |
418 | #define qemu_get_betl qemu_get_be32 | |
419 | #define qemu_put_betls qemu_put_be32s | |
420 | #define qemu_get_betls qemu_get_be32s | |
421 | #endif | |
422 | ||
8a7ddc38 FB |
423 | int64_t qemu_ftell(QEMUFile *f); |
424 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
425 | ||
426 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
427 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
428 | ||
429 | int qemu_loadvm(const char *filename); | |
430 | int qemu_savevm(const char *filename); | |
431 | int register_savevm(const char *idstr, | |
432 | int instance_id, | |
433 | int version_id, | |
434 | SaveStateHandler *save_state, | |
435 | LoadStateHandler *load_state, | |
436 | void *opaque); | |
437 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
438 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 439 | |
6a00d601 FB |
440 | void cpu_save(QEMUFile *f, void *opaque); |
441 | int cpu_load(QEMUFile *f, void *opaque, int version_id); | |
442 | ||
fc01f7e7 FB |
443 | /* block.c */ |
444 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
445 | typedef struct BlockDriver BlockDriver; |
446 | ||
447 | extern BlockDriver bdrv_raw; | |
448 | extern BlockDriver bdrv_cow; | |
449 | extern BlockDriver bdrv_qcow; | |
450 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 451 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 452 | extern BlockDriver bdrv_dmg; |
a8753c34 | 453 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 454 | extern BlockDriver bdrv_vpc; |
de167e41 | 455 | extern BlockDriver bdrv_vvfat; |
ea2384d3 FB |
456 | |
457 | void bdrv_init(void); | |
458 | BlockDriver *bdrv_find_format(const char *format_name); | |
459 | int bdrv_create(BlockDriver *drv, | |
460 | const char *filename, int64_t size_in_sectors, | |
461 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
462 | BlockDriverState *bdrv_new(const char *device_name); |
463 | void bdrv_delete(BlockDriverState *bs); | |
464 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
ea2384d3 FB |
465 | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
466 | BlockDriver *drv); | |
fc01f7e7 FB |
467 | void bdrv_close(BlockDriverState *bs); |
468 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
469 | uint8_t *buf, int nb_sectors); | |
470 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
471 | const uint8_t *buf, int nb_sectors); | |
472 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 473 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 474 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
33e3963e | 475 | |
c4b1fcc0 FB |
476 | #define BDRV_TYPE_HD 0 |
477 | #define BDRV_TYPE_CDROM 1 | |
478 | #define BDRV_TYPE_FLOPPY 2 | |
46d4767d FB |
479 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
480 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
481 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
c4b1fcc0 FB |
482 | |
483 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
484 | int cyls, int heads, int secs); | |
485 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 486 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
487 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
488 | int *pcyls, int *pheads, int *psecs); | |
489 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 490 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
491 | int bdrv_is_removable(BlockDriverState *bs); |
492 | int bdrv_is_read_only(BlockDriverState *bs); | |
493 | int bdrv_is_inserted(BlockDriverState *bs); | |
494 | int bdrv_is_locked(BlockDriverState *bs); | |
495 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
496 | void bdrv_set_change_cb(BlockDriverState *bs, | |
497 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 498 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
499 | void bdrv_info(void); |
500 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 501 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
502 | int bdrv_is_encrypted(BlockDriverState *bs); |
503 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
504 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
505 | void *opaque); | |
506 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
c4b1fcc0 | 507 | |
ea2384d3 FB |
508 | int qcow_get_cluster_size(BlockDriverState *bs); |
509 | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num, | |
510 | const uint8_t *buf); | |
511 | ||
512 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
513 | |
514 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
515 | int boot_device, | |
516 | DisplayState *ds, const char **fd_filename, int snapshot, | |
517 | const char *kernel_filename, const char *kernel_cmdline, | |
518 | const char *initrd_filename); | |
519 | ||
520 | typedef struct QEMUMachine { | |
521 | const char *name; | |
522 | const char *desc; | |
523 | QEMUMachineInitFunc *init; | |
524 | struct QEMUMachine *next; | |
525 | } QEMUMachine; | |
526 | ||
527 | int qemu_register_machine(QEMUMachine *m); | |
528 | ||
529 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
3de388f6 | 530 | typedef void IRQRequestFunc(void *opaque, int level); |
54fa5af5 | 531 | |
26aa7d72 FB |
532 | /* ISA bus */ |
533 | ||
534 | extern target_phys_addr_t isa_mem_base; | |
535 | ||
536 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
537 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
538 | ||
539 | int register_ioport_read(int start, int length, int size, | |
540 | IOPortReadFunc *func, void *opaque); | |
541 | int register_ioport_write(int start, int length, int size, | |
542 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
543 | void isa_unassign_ioport(int start, int length); |
544 | ||
545 | /* PCI bus */ | |
546 | ||
69b91039 FB |
547 | extern target_phys_addr_t pci_mem_base; |
548 | ||
46e50e9d | 549 | typedef struct PCIBus PCIBus; |
69b91039 FB |
550 | typedef struct PCIDevice PCIDevice; |
551 | ||
552 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
553 | uint32_t address, uint32_t data, int len); | |
554 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
555 | uint32_t address, int len); | |
556 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
557 | uint32_t addr, uint32_t size, int type); | |
558 | ||
559 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
560 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
561 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
562 | ||
563 | typedef struct PCIIORegion { | |
5768f5ac | 564 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
565 | uint32_t size; |
566 | uint8_t type; | |
567 | PCIMapIORegionFunc *map_func; | |
568 | } PCIIORegion; | |
569 | ||
8a8696a3 FB |
570 | #define PCI_ROM_SLOT 6 |
571 | #define PCI_NUM_REGIONS 7 | |
69b91039 FB |
572 | struct PCIDevice { |
573 | /* PCI config space */ | |
574 | uint8_t config[256]; | |
575 | ||
576 | /* the following fields are read only */ | |
46e50e9d | 577 | PCIBus *bus; |
69b91039 FB |
578 | int devfn; |
579 | char name[64]; | |
8a8696a3 | 580 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
581 | |
582 | /* do not access the following fields */ | |
583 | PCIConfigReadFunc *config_read; | |
584 | PCIConfigWriteFunc *config_write; | |
5768f5ac | 585 | int irq_index; |
69b91039 FB |
586 | }; |
587 | ||
46e50e9d FB |
588 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
589 | int instance_size, int devfn, | |
69b91039 FB |
590 | PCIConfigReadFunc *config_read, |
591 | PCIConfigWriteFunc *config_write); | |
592 | ||
593 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
594 | uint32_t size, int type, | |
595 | PCIMapIORegionFunc *map_func); | |
596 | ||
5768f5ac FB |
597 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
598 | ||
599 | uint32_t pci_default_read_config(PCIDevice *d, | |
600 | uint32_t address, int len); | |
601 | void pci_default_write_config(PCIDevice *d, | |
602 | uint32_t address, uint32_t val, int len); | |
30ca2aab FB |
603 | void generic_pci_save(QEMUFile* f, void *opaque); |
604 | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); | |
5768f5ac | 605 | |
9995c51f FB |
606 | extern struct PIIX3State *piix3_state; |
607 | ||
46e50e9d FB |
608 | PCIBus *i440fx_init(void); |
609 | void piix3_init(PCIBus *bus); | |
69b91039 | 610 | void pci_bios_init(void); |
5768f5ac | 611 | void pci_info(void); |
26aa7d72 | 612 | |
77d4bc34 | 613 | /* temporary: will be moved in platform specific file */ |
54fa5af5 | 614 | void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
46e50e9d | 615 | PCIBus *pci_prep_init(void); |
54fa5af5 | 616 | PCIBus *pci_grackle_init(uint32_t base); |
46e50e9d | 617 | PCIBus *pci_pmac_init(void); |
83469015 | 618 | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); |
77d4bc34 | 619 | |
a41b2ff2 PB |
620 | void pci_nic_init(PCIBus *bus, NICInfo *nd); |
621 | ||
28b9b5af FB |
622 | /* openpic.c */ |
623 | typedef struct openpic_t openpic_t; | |
54fa5af5 | 624 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
7668a27f FB |
625 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
626 | CPUState **envp); | |
28b9b5af | 627 | |
54fa5af5 FB |
628 | /* heathrow_pic.c */ |
629 | typedef struct HeathrowPICS HeathrowPICS; | |
630 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
631 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
632 | ||
6a36d84e FB |
633 | #ifdef HAS_AUDIO |
634 | struct soundhw { | |
635 | const char *name; | |
636 | const char *descr; | |
637 | int enabled; | |
638 | int isa; | |
639 | union { | |
640 | int (*init_isa) (AudioState *s); | |
641 | int (*init_pci) (PCIBus *bus, AudioState *s); | |
642 | } init; | |
643 | }; | |
644 | ||
645 | extern struct soundhw soundhw[]; | |
646 | #endif | |
647 | ||
313aa567 FB |
648 | /* vga.c */ |
649 | ||
4fa0f5d2 | 650 | #define VGA_RAM_SIZE (4096 * 1024) |
313aa567 | 651 | |
82c643ff | 652 | struct DisplayState { |
313aa567 FB |
653 | uint8_t *data; |
654 | int linesize; | |
655 | int depth; | |
82c643ff FB |
656 | int width; |
657 | int height; | |
313aa567 FB |
658 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
659 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
660 | void (*dpy_refresh)(struct DisplayState *s); | |
82c643ff | 661 | }; |
313aa567 FB |
662 | |
663 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
664 | { | |
665 | s->dpy_update(s, x, y, w, h); | |
666 | } | |
667 | ||
668 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
669 | { | |
670 | s->dpy_resize(s, w, h); | |
671 | } | |
672 | ||
46e50e9d | 673 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d5295253 FB |
674 | unsigned long vga_ram_offset, int vga_ram_size, |
675 | unsigned long vga_bios_offset, int vga_bios_size); | |
313aa567 | 676 | void vga_update_display(void); |
ee38b4c8 | 677 | void vga_invalidate_display(void); |
59a983b9 | 678 | void vga_screen_dump(const char *filename); |
313aa567 | 679 | |
d6bfa22f | 680 | /* cirrus_vga.c */ |
46e50e9d | 681 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 682 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
683 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
684 | unsigned long vga_ram_offset, int vga_ram_size); | |
685 | ||
313aa567 | 686 | /* sdl.c */ |
d63d307f | 687 | void sdl_display_init(DisplayState *ds, int full_screen); |
313aa567 | 688 | |
da4dbf74 FB |
689 | /* cocoa.m */ |
690 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
691 | ||
5391d806 FB |
692 | /* ide.c */ |
693 | #define MAX_DISKS 4 | |
694 | ||
695 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
696 | ||
69b91039 FB |
697 | void isa_ide_init(int iobase, int iobase2, int irq, |
698 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
699 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
700 | int secondary_ide_enabled); | |
46e50e9d | 701 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table); |
28b9b5af | 702 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 703 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 704 | |
1d14ffa9 | 705 | /* es1370.c */ |
c0fe3827 | 706 | int es1370_init (PCIBus *bus, AudioState *s); |
1d14ffa9 | 707 | |
fb065187 | 708 | /* sb16.c */ |
c0fe3827 | 709 | int SB16_init (AudioState *s); |
fb065187 FB |
710 | |
711 | /* adlib.c */ | |
c0fe3827 | 712 | int Adlib_init (AudioState *s); |
fb065187 FB |
713 | |
714 | /* gus.c */ | |
c0fe3827 | 715 | int GUS_init (AudioState *s); |
27503323 FB |
716 | |
717 | /* dma.c */ | |
85571bc7 | 718 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 719 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
720 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
721 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
722 | void DMA_hold_DREQ (int nchan); |
723 | void DMA_release_DREQ (int nchan); | |
16f62432 | 724 | void DMA_schedule(int nchan); |
27503323 | 725 | void DMA_run (void); |
28b9b5af | 726 | void DMA_init (int high_page_enable); |
27503323 | 727 | void DMA_register_channel (int nchan, |
85571bc7 FB |
728 | DMA_transfer_handler transfer_handler, |
729 | void *opaque); | |
7138fcfb FB |
730 | /* fdc.c */ |
731 | #define MAX_FD 2 | |
732 | extern BlockDriverState *fd_table[MAX_FD]; | |
733 | ||
baca51fa FB |
734 | typedef struct fdctrl_t fdctrl_t; |
735 | ||
736 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
737 | uint32_t io_base, | |
738 | BlockDriverState **fds); | |
739 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 740 | |
80cabfad FB |
741 | /* ne2000.c */ |
742 | ||
7c9d8e07 FB |
743 | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
744 | void pci_ne2000_init(PCIBus *bus, NICInfo *nd); | |
80cabfad | 745 | |
a41b2ff2 PB |
746 | /* rtl8139.c */ |
747 | ||
748 | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd); | |
749 | ||
80cabfad FB |
750 | /* pckbd.c */ |
751 | ||
80cabfad FB |
752 | void kbd_init(void); |
753 | ||
754 | /* mc146818rtc.c */ | |
755 | ||
8a7ddc38 | 756 | typedef struct RTCState RTCState; |
80cabfad | 757 | |
8a7ddc38 FB |
758 | RTCState *rtc_init(int base, int irq); |
759 | void rtc_set_memory(RTCState *s, int addr, int val); | |
760 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
761 | |
762 | /* serial.c */ | |
763 | ||
c4b1fcc0 | 764 | typedef struct SerialState SerialState; |
e5d13e2f FB |
765 | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, |
766 | int base, int irq, CharDriverState *chr); | |
767 | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, | |
768 | target_ulong base, int it_shift, | |
769 | int irq, CharDriverState *chr); | |
80cabfad | 770 | |
6508fe59 FB |
771 | /* parallel.c */ |
772 | ||
773 | typedef struct ParallelState ParallelState; | |
774 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
775 | ||
80cabfad FB |
776 | /* i8259.c */ |
777 | ||
3de388f6 FB |
778 | typedef struct PicState2 PicState2; |
779 | extern PicState2 *isa_pic; | |
80cabfad | 780 | void pic_set_irq(int irq, int level); |
54fa5af5 | 781 | void pic_set_irq_new(void *opaque, int irq, int level); |
3de388f6 | 782 | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); |
d592d303 FB |
783 | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, |
784 | void *alt_irq_opaque); | |
3de388f6 FB |
785 | int pic_read_irq(PicState2 *s); |
786 | void pic_update_irq(PicState2 *s); | |
787 | uint32_t pic_intack_read(PicState2 *s); | |
c20709aa | 788 | void pic_info(void); |
4a0fb71e | 789 | void irq_info(void); |
80cabfad | 790 | |
c27004ec | 791 | /* APIC */ |
d592d303 FB |
792 | typedef struct IOAPICState IOAPICState; |
793 | ||
c27004ec FB |
794 | int apic_init(CPUState *env); |
795 | int apic_get_interrupt(CPUState *env); | |
d592d303 FB |
796 | IOAPICState *ioapic_init(void); |
797 | void ioapic_set_irq(void *opaque, int vector, int level); | |
c27004ec | 798 | |
80cabfad FB |
799 | /* i8254.c */ |
800 | ||
801 | #define PIT_FREQ 1193182 | |
802 | ||
ec844b96 FB |
803 | typedef struct PITState PITState; |
804 | ||
805 | PITState *pit_init(int base, int irq); | |
806 | void pit_set_gate(PITState *pit, int channel, int val); | |
807 | int pit_get_gate(PITState *pit, int channel); | |
808 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
80cabfad FB |
809 | |
810 | /* pc.c */ | |
54fa5af5 | 811 | extern QEMUMachine pc_machine; |
3dbbdc25 | 812 | extern QEMUMachine isapc_machine; |
80cabfad | 813 | |
6a00d601 FB |
814 | void ioport_set_a20(int enable); |
815 | int ioport_get_a20(void); | |
816 | ||
26aa7d72 | 817 | /* ppc.c */ |
54fa5af5 FB |
818 | extern QEMUMachine prep_machine; |
819 | extern QEMUMachine core99_machine; | |
820 | extern QEMUMachine heathrow_machine; | |
821 | ||
6af0bf9c FB |
822 | /* mips_r4k.c */ |
823 | extern QEMUMachine mips_machine; | |
824 | ||
8cc43fef FB |
825 | #ifdef TARGET_PPC |
826 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
827 | #endif | |
64201201 | 828 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
829 | |
830 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
831 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
54fa5af5 | 832 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 833 | |
e95c8d51 | 834 | /* sun4m.c */ |
54fa5af5 | 835 | extern QEMUMachine sun4m_machine; |
e80cfcfc | 836 | uint32_t iommu_translate(uint32_t addr); |
ba3c64fb | 837 | void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
e95c8d51 FB |
838 | |
839 | /* iommu.c */ | |
e80cfcfc FB |
840 | void *iommu_init(uint32_t addr); |
841 | uint32_t iommu_translate_local(void *opaque, uint32_t addr); | |
e95c8d51 FB |
842 | |
843 | /* lance.c */ | |
7c9d8e07 | 844 | void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
e95c8d51 FB |
845 | |
846 | /* tcx.c */ | |
e80cfcfc | 847 | void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 848 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
849 | void tcx_update_display(void *opaque); |
850 | void tcx_invalidate_display(void *opaque); | |
851 | void tcx_screen_dump(void *opaque, const char *filename); | |
852 | ||
853 | /* slavio_intctl.c */ | |
854 | void *slavio_intctl_init(); | |
ba3c64fb | 855 | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
e80cfcfc FB |
856 | void slavio_pic_info(void *opaque); |
857 | void slavio_irq_info(void *opaque); | |
858 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
ba3c64fb | 859 | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
e95c8d51 FB |
860 | |
861 | /* magic-load.c */ | |
e80cfcfc FB |
862 | int load_elf(const char *filename, uint8_t *addr); |
863 | int load_aout(const char *filename, uint8_t *addr); | |
864 | ||
865 | /* slavio_timer.c */ | |
ba3c64fb | 866 | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
8d5f07fa | 867 | |
e80cfcfc FB |
868 | /* slavio_serial.c */ |
869 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); | |
870 | void slavio_serial_ms_kbd_init(int base, int irq); | |
e95c8d51 | 871 | |
3475187d FB |
872 | /* slavio_misc.c */ |
873 | void *slavio_misc_init(uint32_t base, int irq); | |
874 | void slavio_set_power_fail(void *opaque, int power_failing); | |
875 | ||
6f7e9aec FB |
876 | /* esp.c */ |
877 | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); | |
878 | ||
3475187d FB |
879 | /* sun4u.c */ |
880 | extern QEMUMachine sun4u_machine; | |
881 | ||
64201201 FB |
882 | /* NVRAM helpers */ |
883 | #include "hw/m48t59.h" | |
884 | ||
885 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
886 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
887 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
888 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
889 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
890 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
891 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
892 | const unsigned char *str, uint32_t max); | |
893 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
894 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
895 | uint32_t start, uint32_t count); | |
896 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
897 | const unsigned char *arch, | |
898 | uint32_t RAM_size, int boot_device, | |
899 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 900 | const char *cmdline, |
64201201 | 901 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
902 | uint32_t NVRAM_image, |
903 | int width, int height, int depth); | |
64201201 | 904 | |
63066f4f FB |
905 | /* adb.c */ |
906 | ||
907 | #define MAX_ADB_DEVICES 16 | |
908 | ||
e2733d20 | 909 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 910 | |
e2733d20 | 911 | typedef struct ADBDevice ADBDevice; |
63066f4f | 912 | |
e2733d20 FB |
913 | /* buf = NULL means polling */ |
914 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
915 | const uint8_t *buf, int len); | |
12c28fed FB |
916 | typedef int ADBDeviceReset(ADBDevice *d); |
917 | ||
63066f4f FB |
918 | struct ADBDevice { |
919 | struct ADBBusState *bus; | |
920 | int devaddr; | |
921 | int handler; | |
e2733d20 | 922 | ADBDeviceRequest *devreq; |
12c28fed | 923 | ADBDeviceReset *devreset; |
63066f4f FB |
924 | void *opaque; |
925 | }; | |
926 | ||
927 | typedef struct ADBBusState { | |
928 | ADBDevice devices[MAX_ADB_DEVICES]; | |
929 | int nb_devices; | |
e2733d20 | 930 | int poll_index; |
63066f4f FB |
931 | } ADBBusState; |
932 | ||
e2733d20 FB |
933 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
934 | const uint8_t *buf, int len); | |
935 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
936 | |
937 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 938 | ADBDeviceRequest *devreq, |
12c28fed | 939 | ADBDeviceReset *devreset, |
63066f4f FB |
940 | void *opaque); |
941 | void adb_kbd_init(ADBBusState *bus); | |
942 | void adb_mouse_init(ADBBusState *bus); | |
943 | ||
944 | /* cuda.c */ | |
945 | ||
946 | extern ADBBusState adb_bus; | |
54fa5af5 | 947 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 948 | |
bb36d470 FB |
949 | #include "hw/usb.h" |
950 | ||
a594cfbf FB |
951 | /* usb ports of the VM */ |
952 | ||
953 | #define MAX_VM_USB_PORTS 8 | |
954 | ||
955 | extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS]; | |
956 | extern USBDevice *vm_usb_hub; | |
957 | ||
958 | void do_usb_add(const char *devname); | |
959 | void do_usb_del(const char *devname); | |
960 | void usb_info(void); | |
961 | ||
b5ff1b31 FB |
962 | /* integratorcp.c */ |
963 | extern QEMUMachine integratorcp_machine; | |
964 | ||
daa57963 FB |
965 | /* ps2.c */ |
966 | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); | |
967 | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); | |
968 | void ps2_write_mouse(void *, int val); | |
969 | void ps2_write_keyboard(void *, int val); | |
970 | uint32_t ps2_read_data(void *); | |
971 | void ps2_queue(void *, int b); | |
f94f5d71 | 972 | void ps2_keyboard_set_translation(void *opaque, int mode); |
daa57963 | 973 | |
80337b66 FB |
974 | /* smc91c111.c */ |
975 | void smc91c111_init(NICInfo *, uint32_t, void *, int); | |
976 | ||
bdd5003a PB |
977 | /* pl110.c */ |
978 | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq); | |
979 | void pl110_update_display(void *opaque); | |
980 | void pl110_invalidate_display(void *opaque); | |
981 | ||
ea2384d3 FB |
982 | #endif /* defined(QEMU_TOOL) */ |
983 | ||
c4b1fcc0 | 984 | /* monitor.c */ |
82c643ff | 985 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
986 | void term_puts(const char *str); |
987 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 988 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
989 | void term_flush(void); |
990 | void term_print_help(void); | |
ea2384d3 FB |
991 | void monitor_readline(const char *prompt, int is_password, |
992 | char *buf, int buf_size); | |
993 | ||
994 | /* readline.c */ | |
995 | typedef void ReadLineFunc(void *opaque, const char *str); | |
996 | ||
997 | extern int completion_index; | |
998 | void add_completion(const char *str); | |
999 | void readline_handle_byte(int ch); | |
1000 | void readline_find_completion(const char *cmdline); | |
1001 | const char *readline_get_history(unsigned int index); | |
1002 | void readline_start(const char *prompt, int is_password, | |
1003 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 1004 | |
5e6ad6f9 FB |
1005 | void kqemu_record_dump(void); |
1006 | ||
fc01f7e7 | 1007 | #endif /* VL_H */ |