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WIn32 compile fix.
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
fb065187 40#include "audio/audio.h"
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41
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
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45#ifndef O_BINARY
46#define O_BINARY 0
47#endif
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48
49#ifdef _WIN32
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50#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
67b915a5 60#endif
8a7ddc38 61
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62#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
16f62432 73#include "cpu.h"
1fddef4b 74#include "gdbstub.h"
16f62432 75
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76#endif /* !defined(QEMU_TOOL) */
77
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78#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
33e3963e 85/* vl.c */
80cabfad 86uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 87
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88void hw_error(const char *fmt, ...);
89
7587cf44 90int get_image_size(const char *filename);
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91int load_image(const char *filename, uint8_t *addr);
92extern const char *bios_dir;
93
94void pstrcpy(char *buf, int buf_size, const char *str);
95char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 96int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 97
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98extern int vm_running;
99
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100typedef struct vm_change_state_entry VMChangeStateEntry;
101typedef void VMChangeStateHandler(void *opaque, int running);
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102typedef void VMStopHandler(void *opaque, int reason);
103
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104VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
105 void *opaque);
106void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
107
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108int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
109void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
110
111void vm_start(void);
112void vm_stop(int reason);
113
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114typedef void QEMUResetHandler(void *opaque);
115
116void qemu_register_reset(QEMUResetHandler *func, void *opaque);
117void qemu_system_reset_request(void);
118void qemu_system_shutdown_request(void);
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119void qemu_system_powerdown_request(void);
120#if !defined(TARGET_SPARC)
121// Please implement a power failure function to signal the OS
122#define qemu_system_powerdown() do{}while(0)
123#else
124void qemu_system_powerdown(void);
125#endif
bb0c6722 126
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127void main_loop_wait(int timeout);
128
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129extern int ram_size;
130extern int bios_size;
ee22c2f7 131extern int rtc_utc;
1f04275e 132extern int cirrus_vga_enabled;
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133extern int graphic_width;
134extern int graphic_height;
135extern int graphic_depth;
3d11d0eb 136extern const char *keyboard_layout;
d993e026 137extern int kqemu_allowed;
a09db21f 138extern int win2k_install_hack;
bb36d470 139extern int usb_enabled;
6a00d601 140extern int smp_cpus;
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141
142/* XXX: make it dynamic */
143#if defined (TARGET_PPC)
d5295253 144#define BIOS_SIZE ((512 + 32) * 1024)
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145#elif defined(TARGET_MIPS)
146#define BIOS_SIZE (128 * 1024)
0ced6589 147#else
7587cf44 148#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 149#endif
aaaa7df6 150
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151/* keyboard/mouse support */
152
153#define MOUSE_EVENT_LBUTTON 0x01
154#define MOUSE_EVENT_RBUTTON 0x02
155#define MOUSE_EVENT_MBUTTON 0x04
156
157typedef void QEMUPutKBDEvent(void *opaque, int keycode);
158typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
159
160void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
161void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
162
163void kbd_put_keycode(int keycode);
164void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
165
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166/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
167 constants) */
168#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
169#define QEMU_KEY_BACKSPACE 0x007f
170#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
171#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
172#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
173#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
174#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
175#define QEMU_KEY_END QEMU_KEY_ESC1(4)
176#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
177#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
178#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
179
180#define QEMU_KEY_CTRL_UP 0xe400
181#define QEMU_KEY_CTRL_DOWN 0xe401
182#define QEMU_KEY_CTRL_LEFT 0xe402
183#define QEMU_KEY_CTRL_RIGHT 0xe403
184#define QEMU_KEY_CTRL_HOME 0xe404
185#define QEMU_KEY_CTRL_END 0xe405
186#define QEMU_KEY_CTRL_PAGEUP 0xe406
187#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
188
189void kbd_put_keysym(int keysym);
190
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191/* async I/O support */
192
193typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
194typedef int IOCanRWHandler(void *opaque);
7c9d8e07 195typedef void IOHandler(void *opaque);
c20709aa 196
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197int qemu_set_fd_handler2(int fd,
198 IOCanRWHandler *fd_read_poll,
199 IOHandler *fd_read,
200 IOHandler *fd_write,
201 void *opaque);
202int qemu_set_fd_handler(int fd,
203 IOHandler *fd_read,
204 IOHandler *fd_write,
205 void *opaque);
c20709aa 206
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207/* character device */
208
209#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 210#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 211
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212
213
214#define CHR_IOCTL_SERIAL_SET_PARAMS 1
215typedef struct {
216 int speed;
217 int parity;
218 int data_bits;
219 int stop_bits;
220} QEMUSerialSetParams;
221
222#define CHR_IOCTL_SERIAL_SET_BREAK 2
223
224#define CHR_IOCTL_PP_READ_DATA 3
225#define CHR_IOCTL_PP_WRITE_DATA 4
226#define CHR_IOCTL_PP_READ_CONTROL 5
227#define CHR_IOCTL_PP_WRITE_CONTROL 6
228#define CHR_IOCTL_PP_READ_STATUS 7
229
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230typedef void IOEventHandler(void *opaque, int event);
231
232typedef struct CharDriverState {
233 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
234 void (*chr_add_read_handler)(struct CharDriverState *s,
235 IOCanRWHandler *fd_can_read,
236 IOReadHandler *fd_read, void *opaque);
2122c51a 237 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 238 IOEventHandler *chr_event;
eb45f5fe 239 void (*chr_send_event)(struct CharDriverState *chr, int event);
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240 void *opaque;
241} CharDriverState;
242
243void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
244int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 245void qemu_chr_send_event(CharDriverState *s, int event);
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246void qemu_chr_add_read_handler(CharDriverState *s,
247 IOCanRWHandler *fd_can_read,
248 IOReadHandler *fd_read, void *opaque);
249void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 250int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 251
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252/* consoles */
253
254typedef struct DisplayState DisplayState;
255typedef struct TextConsole TextConsole;
256
257extern TextConsole *vga_console;
258
259TextConsole *graphic_console_init(DisplayState *ds);
260int is_active_console(TextConsole *s);
261CharDriverState *text_console_init(DisplayState *ds);
262void console_select(unsigned int index);
263
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264/* serial ports */
265
266#define MAX_SERIAL_PORTS 4
267
268extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
269
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270/* parallel ports */
271
272#define MAX_PARALLEL_PORTS 3
273
274extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
275
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276/* VLANs support */
277
278typedef struct VLANClientState VLANClientState;
279
280struct VLANClientState {
281 IOReadHandler *fd_read;
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282 /* Packets may still be sent if this returns zero. It's used to
283 rate-limit the slirp code. */
284 IOCanRWHandler *fd_can_read;
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285 void *opaque;
286 struct VLANClientState *next;
287 struct VLANState *vlan;
288 char info_str[256];
289};
290
291typedef struct VLANState {
292 int id;
293 VLANClientState *first_client;
294 struct VLANState *next;
295} VLANState;
296
297VLANState *qemu_find_vlan(int id);
298VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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299 IOReadHandler *fd_read,
300 IOCanRWHandler *fd_can_read,
301 void *opaque);
302int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 303void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 304void qemu_handler_true(void *opaque);
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305
306void do_info_network(void);
307
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308/* TAP win32 */
309int tap_win32_init(VLANState *vlan, const char *ifname);
310void tap_win32_poll(void);
311
7c9d8e07 312/* NIC info */
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313
314#define MAX_NICS 8
315
7c9d8e07 316typedef struct NICInfo {
c4b1fcc0 317 uint8_t macaddr[6];
a41b2ff2 318 const char *model;
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319 VLANState *vlan;
320} NICInfo;
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321
322extern int nb_nics;
7c9d8e07 323extern NICInfo nd_table[MAX_NICS];
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324
325/* timers */
326
327typedef struct QEMUClock QEMUClock;
328typedef struct QEMUTimer QEMUTimer;
329typedef void QEMUTimerCB(void *opaque);
330
331/* The real time clock should be used only for stuff which does not
332 change the virtual machine state, as it is run even if the virtual
69b91039 333 machine is stopped. The real time clock has a frequency of 1000
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334 Hz. */
335extern QEMUClock *rt_clock;
336
e80cfcfc 337/* The virtual clock is only run during the emulation. It is stopped
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338 when the virtual machine is stopped. Virtual timers use a high
339 precision clock, usually cpu cycles (use ticks_per_sec). */
340extern QEMUClock *vm_clock;
341
342int64_t qemu_get_clock(QEMUClock *clock);
343
344QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
345void qemu_free_timer(QEMUTimer *ts);
346void qemu_del_timer(QEMUTimer *ts);
347void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
348int qemu_timer_pending(QEMUTimer *ts);
349
350extern int64_t ticks_per_sec;
351extern int pit_min_timer_count;
352
353void cpu_enable_ticks(void);
354void cpu_disable_ticks(void);
355
356/* VM Load/Save */
357
358typedef FILE QEMUFile;
359
360void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
361void qemu_put_byte(QEMUFile *f, int v);
362void qemu_put_be16(QEMUFile *f, unsigned int v);
363void qemu_put_be32(QEMUFile *f, unsigned int v);
364void qemu_put_be64(QEMUFile *f, uint64_t v);
365int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
366int qemu_get_byte(QEMUFile *f);
367unsigned int qemu_get_be16(QEMUFile *f);
368unsigned int qemu_get_be32(QEMUFile *f);
369uint64_t qemu_get_be64(QEMUFile *f);
370
371static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
372{
373 qemu_put_be64(f, *pv);
374}
375
376static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
377{
378 qemu_put_be32(f, *pv);
379}
380
381static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
382{
383 qemu_put_be16(f, *pv);
384}
385
386static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
387{
388 qemu_put_byte(f, *pv);
389}
390
391static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
392{
393 *pv = qemu_get_be64(f);
394}
395
396static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
397{
398 *pv = qemu_get_be32(f);
399}
400
401static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
402{
403 *pv = qemu_get_be16(f);
404}
405
406static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
407{
408 *pv = qemu_get_byte(f);
409}
410
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411#if TARGET_LONG_BITS == 64
412#define qemu_put_betl qemu_put_be64
413#define qemu_get_betl qemu_get_be64
414#define qemu_put_betls qemu_put_be64s
415#define qemu_get_betls qemu_get_be64s
416#else
417#define qemu_put_betl qemu_put_be32
418#define qemu_get_betl qemu_get_be32
419#define qemu_put_betls qemu_put_be32s
420#define qemu_get_betls qemu_get_be32s
421#endif
422
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423int64_t qemu_ftell(QEMUFile *f);
424int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
425
426typedef void SaveStateHandler(QEMUFile *f, void *opaque);
427typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
428
429int qemu_loadvm(const char *filename);
430int qemu_savevm(const char *filename);
431int register_savevm(const char *idstr,
432 int instance_id,
433 int version_id,
434 SaveStateHandler *save_state,
435 LoadStateHandler *load_state,
436 void *opaque);
437void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
438void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 439
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440void cpu_save(QEMUFile *f, void *opaque);
441int cpu_load(QEMUFile *f, void *opaque, int version_id);
442
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443/* block.c */
444typedef struct BlockDriverState BlockDriverState;
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445typedef struct BlockDriver BlockDriver;
446
447extern BlockDriver bdrv_raw;
448extern BlockDriver bdrv_cow;
449extern BlockDriver bdrv_qcow;
450extern BlockDriver bdrv_vmdk;
3c56521b 451extern BlockDriver bdrv_cloop;
585d0ed9 452extern BlockDriver bdrv_dmg;
a8753c34 453extern BlockDriver bdrv_bochs;
6a0f9e82 454extern BlockDriver bdrv_vpc;
de167e41 455extern BlockDriver bdrv_vvfat;
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456
457void bdrv_init(void);
458BlockDriver *bdrv_find_format(const char *format_name);
459int bdrv_create(BlockDriver *drv,
460 const char *filename, int64_t size_in_sectors,
461 const char *backing_file, int flags);
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462BlockDriverState *bdrv_new(const char *device_name);
463void bdrv_delete(BlockDriverState *bs);
464int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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465int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
466 BlockDriver *drv);
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467void bdrv_close(BlockDriverState *bs);
468int bdrv_read(BlockDriverState *bs, int64_t sector_num,
469 uint8_t *buf, int nb_sectors);
470int bdrv_write(BlockDriverState *bs, int64_t sector_num,
471 const uint8_t *buf, int nb_sectors);
472void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 473int bdrv_commit(BlockDriverState *bs);
77fef8c1 474void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 475
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476#define BDRV_TYPE_HD 0
477#define BDRV_TYPE_CDROM 1
478#define BDRV_TYPE_FLOPPY 2
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479#define BIOS_ATA_TRANSLATION_AUTO 0
480#define BIOS_ATA_TRANSLATION_NONE 1
481#define BIOS_ATA_TRANSLATION_LBA 2
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482
483void bdrv_set_geometry_hint(BlockDriverState *bs,
484 int cyls, int heads, int secs);
485void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 486void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
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487void bdrv_get_geometry_hint(BlockDriverState *bs,
488 int *pcyls, int *pheads, int *psecs);
489int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 490int bdrv_get_translation_hint(BlockDriverState *bs);
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491int bdrv_is_removable(BlockDriverState *bs);
492int bdrv_is_read_only(BlockDriverState *bs);
493int bdrv_is_inserted(BlockDriverState *bs);
494int bdrv_is_locked(BlockDriverState *bs);
495void bdrv_set_locked(BlockDriverState *bs, int locked);
496void bdrv_set_change_cb(BlockDriverState *bs,
497 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 498void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
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499void bdrv_info(void);
500BlockDriverState *bdrv_find(const char *name);
82c643ff 501void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
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502int bdrv_is_encrypted(BlockDriverState *bs);
503int bdrv_set_key(BlockDriverState *bs, const char *key);
504void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
505 void *opaque);
506const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 507
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508int qcow_get_cluster_size(BlockDriverState *bs);
509int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
510 const uint8_t *buf);
511
512#ifndef QEMU_TOOL
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513
514typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
515 int boot_device,
516 DisplayState *ds, const char **fd_filename, int snapshot,
517 const char *kernel_filename, const char *kernel_cmdline,
518 const char *initrd_filename);
519
520typedef struct QEMUMachine {
521 const char *name;
522 const char *desc;
523 QEMUMachineInitFunc *init;
524 struct QEMUMachine *next;
525} QEMUMachine;
526
527int qemu_register_machine(QEMUMachine *m);
528
529typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 530typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 531
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532/* ISA bus */
533
534extern target_phys_addr_t isa_mem_base;
535
536typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
537typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
538
539int register_ioport_read(int start, int length, int size,
540 IOPortReadFunc *func, void *opaque);
541int register_ioport_write(int start, int length, int size,
542 IOPortWriteFunc *func, void *opaque);
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543void isa_unassign_ioport(int start, int length);
544
545/* PCI bus */
546
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547extern target_phys_addr_t pci_mem_base;
548
46e50e9d 549typedef struct PCIBus PCIBus;
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550typedef struct PCIDevice PCIDevice;
551
552typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
553 uint32_t address, uint32_t data, int len);
554typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
555 uint32_t address, int len);
556typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
557 uint32_t addr, uint32_t size, int type);
558
559#define PCI_ADDRESS_SPACE_MEM 0x00
560#define PCI_ADDRESS_SPACE_IO 0x01
561#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
562
563typedef struct PCIIORegion {
5768f5ac 564 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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565 uint32_t size;
566 uint8_t type;
567 PCIMapIORegionFunc *map_func;
568} PCIIORegion;
569
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570#define PCI_ROM_SLOT 6
571#define PCI_NUM_REGIONS 7
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572struct PCIDevice {
573 /* PCI config space */
574 uint8_t config[256];
575
576 /* the following fields are read only */
46e50e9d 577 PCIBus *bus;
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578 int devfn;
579 char name[64];
8a8696a3 580 PCIIORegion io_regions[PCI_NUM_REGIONS];
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581
582 /* do not access the following fields */
583 PCIConfigReadFunc *config_read;
584 PCIConfigWriteFunc *config_write;
5768f5ac 585 int irq_index;
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586};
587
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588PCIDevice *pci_register_device(PCIBus *bus, const char *name,
589 int instance_size, int devfn,
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590 PCIConfigReadFunc *config_read,
591 PCIConfigWriteFunc *config_write);
592
593void pci_register_io_region(PCIDevice *pci_dev, int region_num,
594 uint32_t size, int type,
595 PCIMapIORegionFunc *map_func);
596
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597void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
598
599uint32_t pci_default_read_config(PCIDevice *d,
600 uint32_t address, int len);
601void pci_default_write_config(PCIDevice *d,
602 uint32_t address, uint32_t val, int len);
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603void generic_pci_save(QEMUFile* f, void *opaque);
604int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 605
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606extern struct PIIX3State *piix3_state;
607
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608PCIBus *i440fx_init(void);
609void piix3_init(PCIBus *bus);
69b91039 610void pci_bios_init(void);
5768f5ac 611void pci_info(void);
26aa7d72 612
77d4bc34 613/* temporary: will be moved in platform specific file */
54fa5af5 614void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
46e50e9d 615PCIBus *pci_prep_init(void);
54fa5af5 616PCIBus *pci_grackle_init(uint32_t base);
46e50e9d 617PCIBus *pci_pmac_init(void);
83469015 618PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
77d4bc34 619
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620void pci_nic_init(PCIBus *bus, NICInfo *nd);
621
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622/* openpic.c */
623typedef struct openpic_t openpic_t;
54fa5af5 624void openpic_set_irq(void *opaque, int n_IRQ, int level);
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625openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
626 CPUState **envp);
28b9b5af 627
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628/* heathrow_pic.c */
629typedef struct HeathrowPICS HeathrowPICS;
630void heathrow_pic_set_irq(void *opaque, int num, int level);
631HeathrowPICS *heathrow_pic_init(int *pmem_index);
632
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633#ifdef HAS_AUDIO
634struct soundhw {
635 const char *name;
636 const char *descr;
637 int enabled;
638 int isa;
639 union {
640 int (*init_isa) (AudioState *s);
641 int (*init_pci) (PCIBus *bus, AudioState *s);
642 } init;
643};
644
645extern struct soundhw soundhw[];
646#endif
647
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648/* vga.c */
649
4fa0f5d2 650#define VGA_RAM_SIZE (4096 * 1024)
313aa567 651
82c643ff 652struct DisplayState {
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653 uint8_t *data;
654 int linesize;
655 int depth;
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656 int width;
657 int height;
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658 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
659 void (*dpy_resize)(struct DisplayState *s, int w, int h);
660 void (*dpy_refresh)(struct DisplayState *s);
82c643ff 661};
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662
663static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
664{
665 s->dpy_update(s, x, y, w, h);
666}
667
668static inline void dpy_resize(DisplayState *s, int w, int h)
669{
670 s->dpy_resize(s, w, h);
671}
672
46e50e9d 673int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
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674 unsigned long vga_ram_offset, int vga_ram_size,
675 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 676void vga_update_display(void);
ee38b4c8 677void vga_invalidate_display(void);
59a983b9 678void vga_screen_dump(const char *filename);
313aa567 679
d6bfa22f 680/* cirrus_vga.c */
46e50e9d 681void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 682 unsigned long vga_ram_offset, int vga_ram_size);
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683void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
684 unsigned long vga_ram_offset, int vga_ram_size);
685
313aa567 686/* sdl.c */
d63d307f 687void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 688
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689/* cocoa.m */
690void cocoa_display_init(DisplayState *ds, int full_screen);
691
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692/* ide.c */
693#define MAX_DISKS 4
694
695extern BlockDriverState *bs_table[MAX_DISKS];
696
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697void isa_ide_init(int iobase, int iobase2, int irq,
698 BlockDriverState *hd0, BlockDriverState *hd1);
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699void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
700 int secondary_ide_enabled);
46e50e9d 701void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
28b9b5af 702int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 703 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 704
1d14ffa9 705/* es1370.c */
c0fe3827 706int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 707
fb065187 708/* sb16.c */
c0fe3827 709int SB16_init (AudioState *s);
fb065187
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710
711/* adlib.c */
c0fe3827 712int Adlib_init (AudioState *s);
fb065187
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713
714/* gus.c */
c0fe3827 715int GUS_init (AudioState *s);
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716
717/* dma.c */
85571bc7 718typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 719int DMA_get_channel_mode (int nchan);
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720int DMA_read_memory (int nchan, void *buf, int pos, int size);
721int DMA_write_memory (int nchan, void *buf, int pos, int size);
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722void DMA_hold_DREQ (int nchan);
723void DMA_release_DREQ (int nchan);
16f62432 724void DMA_schedule(int nchan);
27503323 725void DMA_run (void);
28b9b5af 726void DMA_init (int high_page_enable);
27503323 727void DMA_register_channel (int nchan,
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728 DMA_transfer_handler transfer_handler,
729 void *opaque);
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730/* fdc.c */
731#define MAX_FD 2
732extern BlockDriverState *fd_table[MAX_FD];
733
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734typedef struct fdctrl_t fdctrl_t;
735
736fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
737 uint32_t io_base,
738 BlockDriverState **fds);
739int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 740
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741/* ne2000.c */
742
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743void isa_ne2000_init(int base, int irq, NICInfo *nd);
744void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 745
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746/* rtl8139.c */
747
748void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
749
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750/* pckbd.c */
751
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752void kbd_init(void);
753
754/* mc146818rtc.c */
755
8a7ddc38 756typedef struct RTCState RTCState;
80cabfad 757
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758RTCState *rtc_init(int base, int irq);
759void rtc_set_memory(RTCState *s, int addr, int val);
760void rtc_set_date(RTCState *s, const struct tm *tm);
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761
762/* serial.c */
763
c4b1fcc0 764typedef struct SerialState SerialState;
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765SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
766 int base, int irq, CharDriverState *chr);
767SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
768 target_ulong base, int it_shift,
769 int irq, CharDriverState *chr);
80cabfad 770
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771/* parallel.c */
772
773typedef struct ParallelState ParallelState;
774ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
775
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776/* i8259.c */
777
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778typedef struct PicState2 PicState2;
779extern PicState2 *isa_pic;
80cabfad 780void pic_set_irq(int irq, int level);
54fa5af5 781void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 782PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
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783void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
784 void *alt_irq_opaque);
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785int pic_read_irq(PicState2 *s);
786void pic_update_irq(PicState2 *s);
787uint32_t pic_intack_read(PicState2 *s);
c20709aa 788void pic_info(void);
4a0fb71e 789void irq_info(void);
80cabfad 790
c27004ec 791/* APIC */
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792typedef struct IOAPICState IOAPICState;
793
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794int apic_init(CPUState *env);
795int apic_get_interrupt(CPUState *env);
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796IOAPICState *ioapic_init(void);
797void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 798
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799/* i8254.c */
800
801#define PIT_FREQ 1193182
802
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803typedef struct PITState PITState;
804
805PITState *pit_init(int base, int irq);
806void pit_set_gate(PITState *pit, int channel, int val);
807int pit_get_gate(PITState *pit, int channel);
808int pit_get_out(PITState *pit, int channel, int64_t current_time);
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809
810/* pc.c */
54fa5af5 811extern QEMUMachine pc_machine;
3dbbdc25 812extern QEMUMachine isapc_machine;
80cabfad 813
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814void ioport_set_a20(int enable);
815int ioport_get_a20(void);
816
26aa7d72 817/* ppc.c */
54fa5af5
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818extern QEMUMachine prep_machine;
819extern QEMUMachine core99_machine;
820extern QEMUMachine heathrow_machine;
821
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FB
822/* mips_r4k.c */
823extern QEMUMachine mips_machine;
824
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825#ifdef TARGET_PPC
826ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
827#endif
64201201 828void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
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829
830extern CPUWriteMemoryFunc *PPC_io_write[];
831extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 832void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 833
e95c8d51 834/* sun4m.c */
54fa5af5 835extern QEMUMachine sun4m_machine;
e80cfcfc 836uint32_t iommu_translate(uint32_t addr);
ba3c64fb 837void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
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FB
838
839/* iommu.c */
e80cfcfc
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840void *iommu_init(uint32_t addr);
841uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
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842
843/* lance.c */
7c9d8e07 844void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
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845
846/* tcx.c */
e80cfcfc 847void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 848 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
849void tcx_update_display(void *opaque);
850void tcx_invalidate_display(void *opaque);
851void tcx_screen_dump(void *opaque, const char *filename);
852
853/* slavio_intctl.c */
854void *slavio_intctl_init();
ba3c64fb 855void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
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856void slavio_pic_info(void *opaque);
857void slavio_irq_info(void *opaque);
858void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 859void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51
FB
860
861/* magic-load.c */
e80cfcfc
FB
862int load_elf(const char *filename, uint8_t *addr);
863int load_aout(const char *filename, uint8_t *addr);
864
865/* slavio_timer.c */
ba3c64fb 866void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 867
e80cfcfc
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868/* slavio_serial.c */
869SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
870void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 871
3475187d
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872/* slavio_misc.c */
873void *slavio_misc_init(uint32_t base, int irq);
874void slavio_set_power_fail(void *opaque, int power_failing);
875
6f7e9aec
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876/* esp.c */
877void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
878
3475187d
FB
879/* sun4u.c */
880extern QEMUMachine sun4u_machine;
881
64201201
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882/* NVRAM helpers */
883#include "hw/m48t59.h"
884
885void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
886uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
887void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
888uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
889void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
890uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
891void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
892 const unsigned char *str, uint32_t max);
893int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
894void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
895 uint32_t start, uint32_t count);
896int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
897 const unsigned char *arch,
898 uint32_t RAM_size, int boot_device,
899 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 900 const char *cmdline,
64201201 901 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
902 uint32_t NVRAM_image,
903 int width, int height, int depth);
64201201 904
63066f4f
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905/* adb.c */
906
907#define MAX_ADB_DEVICES 16
908
e2733d20 909#define ADB_MAX_OUT_LEN 16
63066f4f 910
e2733d20 911typedef struct ADBDevice ADBDevice;
63066f4f 912
e2733d20
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913/* buf = NULL means polling */
914typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
915 const uint8_t *buf, int len);
12c28fed
FB
916typedef int ADBDeviceReset(ADBDevice *d);
917
63066f4f
FB
918struct ADBDevice {
919 struct ADBBusState *bus;
920 int devaddr;
921 int handler;
e2733d20 922 ADBDeviceRequest *devreq;
12c28fed 923 ADBDeviceReset *devreset;
63066f4f
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924 void *opaque;
925};
926
927typedef struct ADBBusState {
928 ADBDevice devices[MAX_ADB_DEVICES];
929 int nb_devices;
e2733d20 930 int poll_index;
63066f4f
FB
931} ADBBusState;
932
e2733d20
FB
933int adb_request(ADBBusState *s, uint8_t *buf_out,
934 const uint8_t *buf, int len);
935int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
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936
937ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 938 ADBDeviceRequest *devreq,
12c28fed 939 ADBDeviceReset *devreset,
63066f4f
FB
940 void *opaque);
941void adb_kbd_init(ADBBusState *bus);
942void adb_mouse_init(ADBBusState *bus);
943
944/* cuda.c */
945
946extern ADBBusState adb_bus;
54fa5af5 947int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 948
bb36d470
FB
949#include "hw/usb.h"
950
a594cfbf
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951/* usb ports of the VM */
952
953#define MAX_VM_USB_PORTS 8
954
955extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
956extern USBDevice *vm_usb_hub;
957
958void do_usb_add(const char *devname);
959void do_usb_del(const char *devname);
960void usb_info(void);
961
b5ff1b31
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962/* integratorcp.c */
963extern QEMUMachine integratorcp_machine;
964
daa57963
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965/* ps2.c */
966void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
967void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
968void ps2_write_mouse(void *, int val);
969void ps2_write_keyboard(void *, int val);
970uint32_t ps2_read_data(void *);
971void ps2_queue(void *, int b);
f94f5d71 972void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 973
80337b66
FB
974/* smc91c111.c */
975void smc91c111_init(NICInfo *, uint32_t, void *, int);
976
bdd5003a
PB
977/* pl110.c */
978void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq);
979void pl110_update_display(void *opaque);
980void pl110_invalidate_display(void *opaque);
981
ea2384d3
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982#endif /* defined(QEMU_TOOL) */
983
c4b1fcc0 984/* monitor.c */
82c643ff 985void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
986void term_puts(const char *str);
987void term_vprintf(const char *fmt, va_list ap);
40c3bac3 988void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
989void term_flush(void);
990void term_print_help(void);
ea2384d3
FB
991void monitor_readline(const char *prompt, int is_password,
992 char *buf, int buf_size);
993
994/* readline.c */
995typedef void ReadLineFunc(void *opaque, const char *str);
996
997extern int completion_index;
998void add_completion(const char *str);
999void readline_handle_byte(int ch);
1000void readline_find_completion(const char *cmdline);
1001const char *readline_get_history(unsigned int index);
1002void readline_start(const char *prompt, int is_password,
1003 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1004
5e6ad6f9
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1005void kqemu_record_dump(void);
1006
fc01f7e7 1007#endif /* VL_H */