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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
8a7ddc38 33#include <time.h>
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34#include <ctype.h>
35#include <errno.h>
36#include <unistd.h>
37#include <fcntl.h>
7d3505c5 38#include <sys/stat.h>
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39
40#ifndef O_LARGEFILE
41#define O_LARGEFILE 0
42#endif
40c3bac3
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43#ifndef O_BINARY
44#define O_BINARY 0
45#endif
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46
47#ifdef _WIN32
bfbc9133 48#define lseek64 _lseeki64
67b915a5 49#endif
8a7ddc38 50
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51#include "cpu.h"
52
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53#ifndef glue
54#define xglue(x, y) x ## y
55#define glue(x, y) xglue(x, y)
56#define stringify(s) tostring(s)
57#define tostring(s) #s
58#endif
59
60#if defined(WORDS_BIGENDIAN)
61static inline uint32_t be32_to_cpu(uint32_t v)
62{
63 return v;
64}
65
66static inline uint16_t be16_to_cpu(uint16_t v)
67{
68 return v;
69}
70
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71static inline uint32_t cpu_to_be32(uint32_t v)
72{
73 return v;
74}
75
76static inline uint16_t cpu_to_be16(uint16_t v)
77{
78 return v;
79}
80
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81static inline uint32_t le32_to_cpu(uint32_t v)
82{
83 return bswap32(v);
84}
85
86static inline uint16_t le16_to_cpu(uint16_t v)
87{
88 return bswap16(v);
89}
90
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91static inline uint32_t cpu_to_le32(uint32_t v)
92{
93 return bswap32(v);
94}
95
96static inline uint16_t cpu_to_le16(uint16_t v)
97{
98 return bswap16(v);
99}
100
67b915a5 101#else
165c6fc8 102
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103static inline uint32_t be32_to_cpu(uint32_t v)
104{
105 return bswap32(v);
106}
107
108static inline uint16_t be16_to_cpu(uint16_t v)
109{
110 return bswap16(v);
111}
112
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113static inline uint32_t cpu_to_be32(uint32_t v)
114{
115 return bswap32(v);
116}
117
118static inline uint16_t cpu_to_be16(uint16_t v)
119{
120 return bswap16(v);
121}
122
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123static inline uint32_t le32_to_cpu(uint32_t v)
124{
125 return v;
126}
127
128static inline uint16_t le16_to_cpu(uint16_t v)
129{
130 return v;
131}
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132
133static inline uint32_t cpu_to_le32(uint32_t v)
134{
135 return v;
136}
137
138static inline uint16_t cpu_to_le16(uint16_t v)
139{
140 return v;
141}
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142#endif
143
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144static inline void cpu_to_le16w(uint16_t *p, uint16_t v)
145{
146 *p = cpu_to_le16(v);
147}
148
149static inline void cpu_to_le32w(uint32_t *p, uint32_t v)
150{
151 *p = cpu_to_le32(v);
152}
153
154static inline uint16_t le16_to_cpup(const uint16_t *p)
155{
156 return le16_to_cpu(*p);
157}
158
159static inline uint32_t le32_to_cpup(const uint32_t *p)
160{
161 return le32_to_cpu(*p);
162}
163
164/* unaligned versions (optimized for frequent unaligned accesses)*/
165
166#if defined(__i386__) || defined(__powerpc__)
167
168#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
169#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
170#define le16_to_cpupu(p) le16_to_cpup(p)
171#define le32_to_cpupu(p) le32_to_cpup(p)
172
173#else
174
175static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
176{
177 uint8_t *p1 = (uint8_t *)p;
178
179 p1[0] = v;
180 p1[1] = v >> 8;
181}
182
183static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
184{
185 uint8_t *p1 = (uint8_t *)p;
186
187 p1[0] = v;
188 p1[1] = v >> 8;
189 p1[2] = v >> 16;
190 p1[3] = v >> 24;
191}
192
193static inline uint16_t le16_to_cpupu(const uint16_t *p)
194{
195 const uint8_t *p1 = (const uint8_t *)p;
196 return p1[0] | (p1[1] << 8);
197}
198
199static inline uint32_t le32_to_cpupu(const uint32_t *p)
200{
201 const uint8_t *p1 = (const uint8_t *)p;
202 return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
203}
204
205#endif
67b915a5 206
33e3963e 207/* vl.c */
80cabfad 208uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 209
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210void hw_error(const char *fmt, ...);
211
7587cf44 212int get_image_size(const char *filename);
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213int load_image(const char *filename, uint8_t *addr);
214extern const char *bios_dir;
215
216void pstrcpy(char *buf, int buf_size, const char *str);
217char *pstrcat(char *buf, int buf_size, const char *s);
33e3963e 218
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219int serial_open_device(void);
220
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221extern int vm_running;
222
223typedef void VMStopHandler(void *opaque, int reason);
224
225int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
226void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
227
228void vm_start(void);
229void vm_stop(int reason);
230
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231typedef void QEMUResetHandler(void *opaque);
232
233void qemu_register_reset(QEMUResetHandler *func, void *opaque);
234void qemu_system_reset_request(void);
235void qemu_system_shutdown_request(void);
236
aaaa7df6 237extern int audio_enabled;
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238extern int ram_size;
239extern int bios_size;
ee22c2f7 240extern int rtc_utc;
1f04275e 241extern int cirrus_vga_enabled;
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242extern int graphic_width;
243extern int graphic_height;
244extern int graphic_depth;
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245
246/* XXX: make it dynamic */
247#if defined (TARGET_PPC)
248#define BIOS_SIZE (512 * 1024)
249#else
7587cf44 250#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 251#endif
aaaa7df6 252
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253/* keyboard/mouse support */
254
255#define MOUSE_EVENT_LBUTTON 0x01
256#define MOUSE_EVENT_RBUTTON 0x02
257#define MOUSE_EVENT_MBUTTON 0x04
258
259typedef void QEMUPutKBDEvent(void *opaque, int keycode);
260typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
261
262void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
263void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
264
265void kbd_put_keycode(int keycode);
266void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
267
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268/* async I/O support */
269
270typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
271typedef int IOCanRWHandler(void *opaque);
272
273int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read,
274 IOReadHandler *fd_read, void *opaque);
275void qemu_del_fd_read_handler(int fd);
276
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277/* network redirectors support */
278
279#define MAX_NICS 8
280
281typedef struct NetDriverState {
c20709aa 282 int index; /* index number in QEMU */
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283 uint8_t macaddr[6];
284 char ifname[16];
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285 void (*send_packet)(struct NetDriverState *nd,
286 const uint8_t *buf, int size);
287 void (*add_read_packet)(struct NetDriverState *nd,
288 IOCanRWHandler *fd_can_read,
289 IOReadHandler *fd_read, void *opaque);
290 /* tun specific data */
291 int fd;
292 /* slirp specific data */
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293} NetDriverState;
294
295extern int nb_nics;
296extern NetDriverState nd_table[MAX_NICS];
297
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298void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
299void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
300 IOReadHandler *fd_read, void *opaque);
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301
302/* timers */
303
304typedef struct QEMUClock QEMUClock;
305typedef struct QEMUTimer QEMUTimer;
306typedef void QEMUTimerCB(void *opaque);
307
308/* The real time clock should be used only for stuff which does not
309 change the virtual machine state, as it is run even if the virtual
69b91039 310 machine is stopped. The real time clock has a frequency of 1000
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311 Hz. */
312extern QEMUClock *rt_clock;
313
314/* Rge virtual clock is only run during the emulation. It is stopped
315 when the virtual machine is stopped. Virtual timers use a high
316 precision clock, usually cpu cycles (use ticks_per_sec). */
317extern QEMUClock *vm_clock;
318
319int64_t qemu_get_clock(QEMUClock *clock);
320
321QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
322void qemu_free_timer(QEMUTimer *ts);
323void qemu_del_timer(QEMUTimer *ts);
324void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
325int qemu_timer_pending(QEMUTimer *ts);
326
327extern int64_t ticks_per_sec;
328extern int pit_min_timer_count;
329
330void cpu_enable_ticks(void);
331void cpu_disable_ticks(void);
332
333/* VM Load/Save */
334
335typedef FILE QEMUFile;
336
337void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
338void qemu_put_byte(QEMUFile *f, int v);
339void qemu_put_be16(QEMUFile *f, unsigned int v);
340void qemu_put_be32(QEMUFile *f, unsigned int v);
341void qemu_put_be64(QEMUFile *f, uint64_t v);
342int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
343int qemu_get_byte(QEMUFile *f);
344unsigned int qemu_get_be16(QEMUFile *f);
345unsigned int qemu_get_be32(QEMUFile *f);
346uint64_t qemu_get_be64(QEMUFile *f);
347
348static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
349{
350 qemu_put_be64(f, *pv);
351}
352
353static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
354{
355 qemu_put_be32(f, *pv);
356}
357
358static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
359{
360 qemu_put_be16(f, *pv);
361}
362
363static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
364{
365 qemu_put_byte(f, *pv);
366}
367
368static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
369{
370 *pv = qemu_get_be64(f);
371}
372
373static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
374{
375 *pv = qemu_get_be32(f);
376}
377
378static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
379{
380 *pv = qemu_get_be16(f);
381}
382
383static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
384{
385 *pv = qemu_get_byte(f);
386}
387
388int64_t qemu_ftell(QEMUFile *f);
389int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
390
391typedef void SaveStateHandler(QEMUFile *f, void *opaque);
392typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
393
394int qemu_loadvm(const char *filename);
395int qemu_savevm(const char *filename);
396int register_savevm(const char *idstr,
397 int instance_id,
398 int version_id,
399 SaveStateHandler *save_state,
400 LoadStateHandler *load_state,
401 void *opaque);
402void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
403void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 404
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405/* block.c */
406typedef struct BlockDriverState BlockDriverState;
407
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408BlockDriverState *bdrv_new(const char *device_name);
409void bdrv_delete(BlockDriverState *bs);
410int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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411void bdrv_close(BlockDriverState *bs);
412int bdrv_read(BlockDriverState *bs, int64_t sector_num,
413 uint8_t *buf, int nb_sectors);
414int bdrv_write(BlockDriverState *bs, int64_t sector_num,
415 const uint8_t *buf, int nb_sectors);
416void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 417int bdrv_commit(BlockDriverState *bs);
77fef8c1 418void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 419
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420#define BDRV_TYPE_HD 0
421#define BDRV_TYPE_CDROM 1
422#define BDRV_TYPE_FLOPPY 2
423
424void bdrv_set_geometry_hint(BlockDriverState *bs,
425 int cyls, int heads, int secs);
426void bdrv_set_type_hint(BlockDriverState *bs, int type);
427void bdrv_get_geometry_hint(BlockDriverState *bs,
428 int *pcyls, int *pheads, int *psecs);
429int bdrv_get_type_hint(BlockDriverState *bs);
430int bdrv_is_removable(BlockDriverState *bs);
431int bdrv_is_read_only(BlockDriverState *bs);
432int bdrv_is_inserted(BlockDriverState *bs);
433int bdrv_is_locked(BlockDriverState *bs);
434void bdrv_set_locked(BlockDriverState *bs, int locked);
435void bdrv_set_change_cb(BlockDriverState *bs,
436 void (*change_cb)(void *opaque), void *opaque);
437
438void bdrv_info(void);
439BlockDriverState *bdrv_find(const char *name);
440
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441/* ISA bus */
442
443extern target_phys_addr_t isa_mem_base;
444
445typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
446typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
447
448int register_ioport_read(int start, int length, int size,
449 IOPortReadFunc *func, void *opaque);
450int register_ioport_write(int start, int length, int size,
451 IOPortWriteFunc *func, void *opaque);
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452void isa_unassign_ioport(int start, int length);
453
454/* PCI bus */
455
456extern int pci_enabled;
457
458extern target_phys_addr_t pci_mem_base;
459
46e50e9d 460typedef struct PCIBus PCIBus;
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461typedef struct PCIDevice PCIDevice;
462
463typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
464 uint32_t address, uint32_t data, int len);
465typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
466 uint32_t address, int len);
467typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
468 uint32_t addr, uint32_t size, int type);
469
470#define PCI_ADDRESS_SPACE_MEM 0x00
471#define PCI_ADDRESS_SPACE_IO 0x01
472#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
473
474typedef struct PCIIORegion {
5768f5ac 475 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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476 uint32_t size;
477 uint8_t type;
478 PCIMapIORegionFunc *map_func;
479} PCIIORegion;
480
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481#define PCI_ROM_SLOT 6
482#define PCI_NUM_REGIONS 7
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483struct PCIDevice {
484 /* PCI config space */
485 uint8_t config[256];
486
487 /* the following fields are read only */
46e50e9d 488 PCIBus *bus;
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489 int devfn;
490 char name[64];
8a8696a3 491 PCIIORegion io_regions[PCI_NUM_REGIONS];
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492
493 /* do not access the following fields */
494 PCIConfigReadFunc *config_read;
495 PCIConfigWriteFunc *config_write;
5768f5ac 496 int irq_index;
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497};
498
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499PCIDevice *pci_register_device(PCIBus *bus, const char *name,
500 int instance_size, int devfn,
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501 PCIConfigReadFunc *config_read,
502 PCIConfigWriteFunc *config_write);
503
504void pci_register_io_region(PCIDevice *pci_dev, int region_num,
505 uint32_t size, int type,
506 PCIMapIORegionFunc *map_func);
507
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508void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
509
510uint32_t pci_default_read_config(PCIDevice *d,
511 uint32_t address, int len);
512void pci_default_write_config(PCIDevice *d,
513 uint32_t address, uint32_t val, int len);
514
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515extern struct PIIX3State *piix3_state;
516
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517PCIBus *i440fx_init(void);
518void piix3_init(PCIBus *bus);
69b91039 519void pci_bios_init(void);
5768f5ac 520void pci_info(void);
26aa7d72 521
77d4bc34 522/* temporary: will be moved in platform specific file */
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523PCIBus *pci_prep_init(void);
524struct openpic_t;
525void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic);
526PCIBus *pci_pmac_init(void);
77d4bc34 527
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528/* openpic.c */
529typedef struct openpic_t openpic_t;
530void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
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531openpic_t *openpic_init (PCIBus *bus,
532 uint32_t isu_base, uint32_t idu_base, int nb_cpus);
28b9b5af 533
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534/* vga.c */
535
4fa0f5d2 536#define VGA_RAM_SIZE (4096 * 1024)
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537
538typedef struct DisplayState {
539 uint8_t *data;
540 int linesize;
541 int depth;
542 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
543 void (*dpy_resize)(struct DisplayState *s, int w, int h);
544 void (*dpy_refresh)(struct DisplayState *s);
545} DisplayState;
546
547static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
548{
549 s->dpy_update(s, x, y, w, h);
550}
551
552static inline void dpy_resize(DisplayState *s, int w, int h)
553{
554 s->dpy_resize(s, w, h);
555}
556
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557int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
558 unsigned long vga_ram_offset, int vga_ram_size);
313aa567 559void vga_update_display(void);
ee38b4c8 560void vga_invalidate_display(void);
59a983b9 561void vga_screen_dump(const char *filename);
313aa567 562
d6bfa22f 563/* cirrus_vga.c */
46e50e9d 564void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 565 unsigned long vga_ram_offset, int vga_ram_size);
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566void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
567 unsigned long vga_ram_offset, int vga_ram_size);
568
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569/* sdl.c */
570void sdl_display_init(DisplayState *ds);
571
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572/* ide.c */
573#define MAX_DISKS 4
574
575extern BlockDriverState *bs_table[MAX_DISKS];
576
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577void isa_ide_init(int iobase, int iobase2, int irq,
578 BlockDriverState *hd0, BlockDriverState *hd1);
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579void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
580void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
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581int pmac_ide_init (BlockDriverState **hd_table,
582 openpic_t *openpic, int irq);
5391d806 583
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584/* oss.c */
585typedef enum {
586 AUD_FMT_U8,
587 AUD_FMT_S8,
588 AUD_FMT_U16,
589 AUD_FMT_S16
590} audfmt_e;
591
592void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
593void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
594int AUD_write (void *in_buf, int size);
595void AUD_run (void);
596void AUD_adjust_estimate (int _leftover);
597int AUD_get_free (void);
598int AUD_get_live (void);
599int AUD_get_buffer_size (void);
600void AUD_init (void);
601
602/* dma.c */
16f62432 603typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size);
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604int DMA_get_channel_mode (int nchan);
605void DMA_hold_DREQ (int nchan);
606void DMA_release_DREQ (int nchan);
16f62432 607void DMA_schedule(int nchan);
27503323 608void DMA_run (void);
28b9b5af 609void DMA_init (int high_page_enable);
27503323 610void DMA_register_channel (int nchan,
16f62432 611 DMA_transfer_handler transfer_handler, void *opaque);
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612
613/* sb16.c */
614void SB16_run (void);
615void SB16_init (void);
616
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617/* fdc.c */
618#define MAX_FD 2
619extern BlockDriverState *fd_table[MAX_FD];
620
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621typedef struct fdctrl_t fdctrl_t;
622
623fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
624 uint32_t io_base,
625 BlockDriverState **fds);
626int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 627
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628/* ne2000.c */
629
69b91039 630void isa_ne2000_init(int base, int irq, NetDriverState *nd);
46e50e9d 631void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
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632
633/* pckbd.c */
634
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635void kbd_init(void);
636
637/* mc146818rtc.c */
638
8a7ddc38 639typedef struct RTCState RTCState;
80cabfad 640
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641RTCState *rtc_init(int base, int irq);
642void rtc_set_memory(RTCState *s, int addr, int val);
643void rtc_set_date(RTCState *s, const struct tm *tm);
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644
645/* serial.c */
646
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647typedef struct SerialState SerialState;
648
649extern SerialState *serial_console;
650
651SerialState *serial_init(int base, int irq, int fd);
652int serial_can_receive(SerialState *s);
653void serial_receive_byte(SerialState *s, int ch);
654void serial_receive_break(SerialState *s);
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655
656/* i8259.c */
657
658void pic_set_irq(int irq, int level);
659void pic_init(void);
c5df018e 660uint32_t pic_intack_read(CPUState *env);
c20709aa 661void pic_info(void);
4a0fb71e 662void irq_info(void);
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663
664/* i8254.c */
665
666#define PIT_FREQ 1193182
667
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668typedef struct PITState PITState;
669
670PITState *pit_init(int base, int irq);
671void pit_set_gate(PITState *pit, int channel, int val);
672int pit_get_gate(PITState *pit, int channel);
673int pit_get_out(PITState *pit, int channel, int64_t current_time);
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674
675/* pc.c */
676void pc_init(int ram_size, int vga_ram_size, int boot_device,
677 DisplayState *ds, const char **fd_filename, int snapshot,
678 const char *kernel_filename, const char *kernel_cmdline,
679 const char *initrd_filename);
680
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681/* ppc.c */
682void ppc_init (int ram_size, int vga_ram_size, int boot_device,
683 DisplayState *ds, const char **fd_filename, int snapshot,
684 const char *kernel_filename, const char *kernel_cmdline,
685 const char *initrd_filename);
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686void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
687 DisplayState *ds, const char **fd_filename, int snapshot,
688 const char *kernel_filename, const char *kernel_cmdline,
689 const char *initrd_filename);
690void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
691 DisplayState *ds, const char **fd_filename, int snapshot,
692 const char *kernel_filename, const char *kernel_cmdline,
693 const char *initrd_filename);
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694#ifdef TARGET_PPC
695ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
696#endif
64201201 697void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
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698
699extern CPUWriteMemoryFunc *PPC_io_write[];
700extern CPUReadMemoryFunc *PPC_io_read[];
701extern int prep_enabled;
26aa7d72 702
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703/* NVRAM helpers */
704#include "hw/m48t59.h"
705
706void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
707uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
708void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
709uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
710void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
711uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
712void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
713 const unsigned char *str, uint32_t max);
714int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
715void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
716 uint32_t start, uint32_t count);
717int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
718 const unsigned char *arch,
719 uint32_t RAM_size, int boot_device,
720 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 721 const char *cmdline,
64201201 722 uint32_t initrd_image, uint32_t initrd_size,
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723 uint32_t NVRAM_image,
724 int width, int height, int depth);
64201201 725
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726/* adb.c */
727
728#define MAX_ADB_DEVICES 16
729
730typedef struct ADBDevice ADBDevice;
731
732typedef void ADBDeviceReceivePacket(ADBDevice *d, const uint8_t *buf, int len);
733
734struct ADBDevice {
735 struct ADBBusState *bus;
736 int devaddr;
737 int handler;
738 ADBDeviceReceivePacket *receive_packet;
739 void *opaque;
740};
741
742typedef struct ADBBusState {
743 ADBDevice devices[MAX_ADB_DEVICES];
744 int nb_devices;
745} ADBBusState;
746
747void adb_receive_packet(ADBBusState *s, const uint8_t *buf, int len);
748void adb_send_packet(ADBBusState *s, const uint8_t *buf, int len);
749
750ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
751 ADBDeviceReceivePacket *receive_packet,
752 void *opaque);
753void adb_kbd_init(ADBBusState *bus);
754void adb_mouse_init(ADBBusState *bus);
755
756/* cuda.c */
757
758extern ADBBusState adb_bus;
28b9b5af 759int cuda_init(openpic_t *openpic, int irq);
63066f4f 760
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761/* monitor.c */
762void monitor_init(void);
40c3bac3 763void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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764void term_flush(void);
765void term_print_help(void);
766
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767/* gdbstub.c */
768
769#define DEFAULT_GDBSTUB_PORT 1234
770
771int gdbserver_start(int port);
772
fc01f7e7 773#endif /* VL_H */