]>
Commit | Line | Data |
---|---|---|
fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
fb065187 | 40 | #include "audio/audio.h" |
67b915a5 FB |
41 | |
42 | #ifndef O_LARGEFILE | |
43 | #define O_LARGEFILE 0 | |
44 | #endif | |
40c3bac3 FB |
45 | #ifndef O_BINARY |
46 | #define O_BINARY 0 | |
47 | #endif | |
67b915a5 FB |
48 | |
49 | #ifdef _WIN32 | |
57d1a2b6 FB |
50 | #define lseek _lseeki64 |
51 | #define ENOTSUP 4096 | |
52 | /* XXX: find 64 bit version */ | |
53 | #define ftruncate chsize | |
54 | ||
55 | static inline char *realpath(const char *path, char *resolved_path) | |
56 | { | |
57 | _fullpath(resolved_path, path, _MAX_PATH); | |
58 | return resolved_path; | |
59 | } | |
67b915a5 | 60 | #endif |
8a7ddc38 | 61 | |
ea2384d3 FB |
62 | #ifdef QEMU_TOOL |
63 | ||
64 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
65 | the target CPU type */ | |
66 | #include "config-host.h" | |
67 | #include <setjmp.h> | |
68 | #include "osdep.h" | |
69 | #include "bswap.h" | |
70 | ||
71 | #else | |
72 | ||
16f62432 | 73 | #include "cpu.h" |
1fddef4b | 74 | #include "gdbstub.h" |
16f62432 | 75 | |
ea2384d3 FB |
76 | #endif /* !defined(QEMU_TOOL) */ |
77 | ||
67b915a5 FB |
78 | #ifndef glue |
79 | #define xglue(x, y) x ## y | |
80 | #define glue(x, y) xglue(x, y) | |
81 | #define stringify(s) tostring(s) | |
82 | #define tostring(s) #s | |
83 | #endif | |
84 | ||
33e3963e | 85 | /* vl.c */ |
80cabfad | 86 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 87 | |
80cabfad FB |
88 | void hw_error(const char *fmt, ...); |
89 | ||
7587cf44 | 90 | int get_image_size(const char *filename); |
80cabfad FB |
91 | int load_image(const char *filename, uint8_t *addr); |
92 | extern const char *bios_dir; | |
93 | ||
94 | void pstrcpy(char *buf, int buf_size, const char *str); | |
95 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 96 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 97 | |
8a7ddc38 FB |
98 | extern int vm_running; |
99 | ||
100 | typedef void VMStopHandler(void *opaque, int reason); | |
101 | ||
102 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
103 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
104 | ||
105 | void vm_start(void); | |
106 | void vm_stop(int reason); | |
107 | ||
bb0c6722 FB |
108 | typedef void QEMUResetHandler(void *opaque); |
109 | ||
110 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
111 | void qemu_system_reset_request(void); | |
112 | void qemu_system_shutdown_request(void); | |
3475187d FB |
113 | void qemu_system_powerdown_request(void); |
114 | #if !defined(TARGET_SPARC) | |
115 | // Please implement a power failure function to signal the OS | |
116 | #define qemu_system_powerdown() do{}while(0) | |
117 | #else | |
118 | void qemu_system_powerdown(void); | |
119 | #endif | |
bb0c6722 | 120 | |
ea2384d3 FB |
121 | void main_loop_wait(int timeout); |
122 | ||
aaaa7df6 | 123 | extern int audio_enabled; |
fb065187 FB |
124 | extern int sb16_enabled; |
125 | extern int adlib_enabled; | |
126 | extern int gus_enabled; | |
0ced6589 FB |
127 | extern int ram_size; |
128 | extern int bios_size; | |
ee22c2f7 | 129 | extern int rtc_utc; |
1f04275e | 130 | extern int cirrus_vga_enabled; |
28b9b5af FB |
131 | extern int graphic_width; |
132 | extern int graphic_height; | |
133 | extern int graphic_depth; | |
3d11d0eb | 134 | extern const char *keyboard_layout; |
d993e026 | 135 | extern int kqemu_allowed; |
a09db21f | 136 | extern int win2k_install_hack; |
0ced6589 FB |
137 | |
138 | /* XXX: make it dynamic */ | |
139 | #if defined (TARGET_PPC) | |
140 | #define BIOS_SIZE (512 * 1024) | |
6af0bf9c FB |
141 | #elif defined(TARGET_MIPS) |
142 | #define BIOS_SIZE (128 * 1024) | |
0ced6589 | 143 | #else |
7587cf44 | 144 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 145 | #endif |
aaaa7df6 | 146 | |
63066f4f FB |
147 | /* keyboard/mouse support */ |
148 | ||
149 | #define MOUSE_EVENT_LBUTTON 0x01 | |
150 | #define MOUSE_EVENT_RBUTTON 0x02 | |
151 | #define MOUSE_EVENT_MBUTTON 0x04 | |
152 | ||
153 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
154 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
155 | ||
156 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
157 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); | |
158 | ||
159 | void kbd_put_keycode(int keycode); | |
160 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
161 | ||
82c643ff FB |
162 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
163 | constants) */ | |
164 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
165 | #define QEMU_KEY_BACKSPACE 0x007f | |
166 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
167 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
168 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
169 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
170 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
171 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
172 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
173 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
174 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
175 | ||
176 | #define QEMU_KEY_CTRL_UP 0xe400 | |
177 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
178 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
179 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
180 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
181 | #define QEMU_KEY_CTRL_END 0xe405 | |
182 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
183 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
184 | ||
185 | void kbd_put_keysym(int keysym); | |
186 | ||
c20709aa FB |
187 | /* async I/O support */ |
188 | ||
189 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
190 | typedef int IOCanRWHandler(void *opaque); | |
191 | ||
192 | int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, | |
193 | IOReadHandler *fd_read, void *opaque); | |
194 | void qemu_del_fd_read_handler(int fd); | |
195 | ||
82c643ff FB |
196 | /* character device */ |
197 | ||
198 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 199 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
82c643ff FB |
200 | |
201 | typedef void IOEventHandler(void *opaque, int event); | |
202 | ||
203 | typedef struct CharDriverState { | |
204 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
205 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
206 | IOCanRWHandler *fd_can_read, | |
207 | IOReadHandler *fd_read, void *opaque); | |
208 | IOEventHandler *chr_event; | |
eb45f5fe | 209 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
82c643ff FB |
210 | void *opaque; |
211 | } CharDriverState; | |
212 | ||
213 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
214 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 215 | void qemu_chr_send_event(CharDriverState *s, int event); |
82c643ff FB |
216 | void qemu_chr_add_read_handler(CharDriverState *s, |
217 | IOCanRWHandler *fd_can_read, | |
218 | IOReadHandler *fd_read, void *opaque); | |
219 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
220 | ||
82c643ff FB |
221 | /* consoles */ |
222 | ||
223 | typedef struct DisplayState DisplayState; | |
224 | typedef struct TextConsole TextConsole; | |
225 | ||
226 | extern TextConsole *vga_console; | |
227 | ||
228 | TextConsole *graphic_console_init(DisplayState *ds); | |
229 | int is_active_console(TextConsole *s); | |
230 | CharDriverState *text_console_init(DisplayState *ds); | |
231 | void console_select(unsigned int index); | |
232 | ||
8d11df9e FB |
233 | /* serial ports */ |
234 | ||
235 | #define MAX_SERIAL_PORTS 4 | |
236 | ||
237 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
238 | ||
6508fe59 FB |
239 | /* parallel ports */ |
240 | ||
241 | #define MAX_PARALLEL_PORTS 3 | |
242 | ||
243 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
244 | ||
c4b1fcc0 FB |
245 | /* network redirectors support */ |
246 | ||
247 | #define MAX_NICS 8 | |
248 | ||
249 | typedef struct NetDriverState { | |
c20709aa | 250 | int index; /* index number in QEMU */ |
c4b1fcc0 FB |
251 | uint8_t macaddr[6]; |
252 | char ifname[16]; | |
c20709aa FB |
253 | void (*send_packet)(struct NetDriverState *nd, |
254 | const uint8_t *buf, int size); | |
255 | void (*add_read_packet)(struct NetDriverState *nd, | |
256 | IOCanRWHandler *fd_can_read, | |
257 | IOReadHandler *fd_read, void *opaque); | |
258 | /* tun specific data */ | |
259 | int fd; | |
260 | /* slirp specific data */ | |
c4b1fcc0 FB |
261 | } NetDriverState; |
262 | ||
263 | extern int nb_nics; | |
264 | extern NetDriverState nd_table[MAX_NICS]; | |
265 | ||
c20709aa FB |
266 | void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size); |
267 | void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read, | |
268 | IOReadHandler *fd_read, void *opaque); | |
8a7ddc38 FB |
269 | |
270 | /* timers */ | |
271 | ||
272 | typedef struct QEMUClock QEMUClock; | |
273 | typedef struct QEMUTimer QEMUTimer; | |
274 | typedef void QEMUTimerCB(void *opaque); | |
275 | ||
276 | /* The real time clock should be used only for stuff which does not | |
277 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 278 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
279 | Hz. */ |
280 | extern QEMUClock *rt_clock; | |
281 | ||
e80cfcfc | 282 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
283 | when the virtual machine is stopped. Virtual timers use a high |
284 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
285 | extern QEMUClock *vm_clock; | |
286 | ||
287 | int64_t qemu_get_clock(QEMUClock *clock); | |
288 | ||
289 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
290 | void qemu_free_timer(QEMUTimer *ts); | |
291 | void qemu_del_timer(QEMUTimer *ts); | |
292 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
293 | int qemu_timer_pending(QEMUTimer *ts); | |
294 | ||
295 | extern int64_t ticks_per_sec; | |
296 | extern int pit_min_timer_count; | |
297 | ||
298 | void cpu_enable_ticks(void); | |
299 | void cpu_disable_ticks(void); | |
300 | ||
301 | /* VM Load/Save */ | |
302 | ||
303 | typedef FILE QEMUFile; | |
304 | ||
305 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
306 | void qemu_put_byte(QEMUFile *f, int v); | |
307 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
308 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
309 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
310 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
311 | int qemu_get_byte(QEMUFile *f); | |
312 | unsigned int qemu_get_be16(QEMUFile *f); | |
313 | unsigned int qemu_get_be32(QEMUFile *f); | |
314 | uint64_t qemu_get_be64(QEMUFile *f); | |
315 | ||
316 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
317 | { | |
318 | qemu_put_be64(f, *pv); | |
319 | } | |
320 | ||
321 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
322 | { | |
323 | qemu_put_be32(f, *pv); | |
324 | } | |
325 | ||
326 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
327 | { | |
328 | qemu_put_be16(f, *pv); | |
329 | } | |
330 | ||
331 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
332 | { | |
333 | qemu_put_byte(f, *pv); | |
334 | } | |
335 | ||
336 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
337 | { | |
338 | *pv = qemu_get_be64(f); | |
339 | } | |
340 | ||
341 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
342 | { | |
343 | *pv = qemu_get_be32(f); | |
344 | } | |
345 | ||
346 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
347 | { | |
348 | *pv = qemu_get_be16(f); | |
349 | } | |
350 | ||
351 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
352 | { | |
353 | *pv = qemu_get_byte(f); | |
354 | } | |
355 | ||
c27004ec FB |
356 | #if TARGET_LONG_BITS == 64 |
357 | #define qemu_put_betl qemu_put_be64 | |
358 | #define qemu_get_betl qemu_get_be64 | |
359 | #define qemu_put_betls qemu_put_be64s | |
360 | #define qemu_get_betls qemu_get_be64s | |
361 | #else | |
362 | #define qemu_put_betl qemu_put_be32 | |
363 | #define qemu_get_betl qemu_get_be32 | |
364 | #define qemu_put_betls qemu_put_be32s | |
365 | #define qemu_get_betls qemu_get_be32s | |
366 | #endif | |
367 | ||
8a7ddc38 FB |
368 | int64_t qemu_ftell(QEMUFile *f); |
369 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
370 | ||
371 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
372 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
373 | ||
374 | int qemu_loadvm(const char *filename); | |
375 | int qemu_savevm(const char *filename); | |
376 | int register_savevm(const char *idstr, | |
377 | int instance_id, | |
378 | int version_id, | |
379 | SaveStateHandler *save_state, | |
380 | LoadStateHandler *load_state, | |
381 | void *opaque); | |
382 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
383 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 384 | |
fc01f7e7 FB |
385 | /* block.c */ |
386 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
387 | typedef struct BlockDriver BlockDriver; |
388 | ||
389 | extern BlockDriver bdrv_raw; | |
390 | extern BlockDriver bdrv_cow; | |
391 | extern BlockDriver bdrv_qcow; | |
392 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 393 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 394 | extern BlockDriver bdrv_dmg; |
a8753c34 | 395 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 396 | extern BlockDriver bdrv_vpc; |
de167e41 | 397 | extern BlockDriver bdrv_vvfat; |
ea2384d3 FB |
398 | |
399 | void bdrv_init(void); | |
400 | BlockDriver *bdrv_find_format(const char *format_name); | |
401 | int bdrv_create(BlockDriver *drv, | |
402 | const char *filename, int64_t size_in_sectors, | |
403 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
404 | BlockDriverState *bdrv_new(const char *device_name); |
405 | void bdrv_delete(BlockDriverState *bs); | |
406 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
ea2384d3 FB |
407 | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
408 | BlockDriver *drv); | |
fc01f7e7 FB |
409 | void bdrv_close(BlockDriverState *bs); |
410 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
411 | uint8_t *buf, int nb_sectors); | |
412 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
413 | const uint8_t *buf, int nb_sectors); | |
414 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 415 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 416 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
33e3963e | 417 | |
c4b1fcc0 FB |
418 | #define BDRV_TYPE_HD 0 |
419 | #define BDRV_TYPE_CDROM 1 | |
420 | #define BDRV_TYPE_FLOPPY 2 | |
46d4767d FB |
421 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
422 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
423 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
c4b1fcc0 FB |
424 | |
425 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
426 | int cyls, int heads, int secs); | |
427 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 428 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
429 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
430 | int *pcyls, int *pheads, int *psecs); | |
431 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 432 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
433 | int bdrv_is_removable(BlockDriverState *bs); |
434 | int bdrv_is_read_only(BlockDriverState *bs); | |
435 | int bdrv_is_inserted(BlockDriverState *bs); | |
436 | int bdrv_is_locked(BlockDriverState *bs); | |
437 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
438 | void bdrv_set_change_cb(BlockDriverState *bs, | |
439 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 440 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
441 | void bdrv_info(void); |
442 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 443 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
444 | int bdrv_is_encrypted(BlockDriverState *bs); |
445 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
446 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
447 | void *opaque); | |
448 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
c4b1fcc0 | 449 | |
ea2384d3 FB |
450 | int qcow_get_cluster_size(BlockDriverState *bs); |
451 | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num, | |
452 | const uint8_t *buf); | |
453 | ||
454 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
455 | |
456 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
457 | int boot_device, | |
458 | DisplayState *ds, const char **fd_filename, int snapshot, | |
459 | const char *kernel_filename, const char *kernel_cmdline, | |
460 | const char *initrd_filename); | |
461 | ||
462 | typedef struct QEMUMachine { | |
463 | const char *name; | |
464 | const char *desc; | |
465 | QEMUMachineInitFunc *init; | |
466 | struct QEMUMachine *next; | |
467 | } QEMUMachine; | |
468 | ||
469 | int qemu_register_machine(QEMUMachine *m); | |
470 | ||
471 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
472 | ||
26aa7d72 FB |
473 | /* ISA bus */ |
474 | ||
475 | extern target_phys_addr_t isa_mem_base; | |
476 | ||
477 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
478 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
479 | ||
480 | int register_ioport_read(int start, int length, int size, | |
481 | IOPortReadFunc *func, void *opaque); | |
482 | int register_ioport_write(int start, int length, int size, | |
483 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
484 | void isa_unassign_ioport(int start, int length); |
485 | ||
486 | /* PCI bus */ | |
487 | ||
488 | extern int pci_enabled; | |
489 | ||
490 | extern target_phys_addr_t pci_mem_base; | |
491 | ||
46e50e9d | 492 | typedef struct PCIBus PCIBus; |
69b91039 FB |
493 | typedef struct PCIDevice PCIDevice; |
494 | ||
495 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
496 | uint32_t address, uint32_t data, int len); | |
497 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
498 | uint32_t address, int len); | |
499 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
500 | uint32_t addr, uint32_t size, int type); | |
501 | ||
502 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
503 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
504 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
505 | ||
506 | typedef struct PCIIORegion { | |
5768f5ac | 507 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
508 | uint32_t size; |
509 | uint8_t type; | |
510 | PCIMapIORegionFunc *map_func; | |
511 | } PCIIORegion; | |
512 | ||
8a8696a3 FB |
513 | #define PCI_ROM_SLOT 6 |
514 | #define PCI_NUM_REGIONS 7 | |
69b91039 FB |
515 | struct PCIDevice { |
516 | /* PCI config space */ | |
517 | uint8_t config[256]; | |
518 | ||
519 | /* the following fields are read only */ | |
46e50e9d | 520 | PCIBus *bus; |
69b91039 FB |
521 | int devfn; |
522 | char name[64]; | |
8a8696a3 | 523 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
524 | |
525 | /* do not access the following fields */ | |
526 | PCIConfigReadFunc *config_read; | |
527 | PCIConfigWriteFunc *config_write; | |
5768f5ac | 528 | int irq_index; |
69b91039 FB |
529 | }; |
530 | ||
46e50e9d FB |
531 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
532 | int instance_size, int devfn, | |
69b91039 FB |
533 | PCIConfigReadFunc *config_read, |
534 | PCIConfigWriteFunc *config_write); | |
535 | ||
536 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
537 | uint32_t size, int type, | |
538 | PCIMapIORegionFunc *map_func); | |
539 | ||
5768f5ac FB |
540 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
541 | ||
542 | uint32_t pci_default_read_config(PCIDevice *d, | |
543 | uint32_t address, int len); | |
544 | void pci_default_write_config(PCIDevice *d, | |
545 | uint32_t address, uint32_t val, int len); | |
30ca2aab FB |
546 | void generic_pci_save(QEMUFile* f, void *opaque); |
547 | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); | |
5768f5ac | 548 | |
9995c51f FB |
549 | extern struct PIIX3State *piix3_state; |
550 | ||
46e50e9d FB |
551 | PCIBus *i440fx_init(void); |
552 | void piix3_init(PCIBus *bus); | |
69b91039 | 553 | void pci_bios_init(void); |
5768f5ac | 554 | void pci_info(void); |
26aa7d72 | 555 | |
77d4bc34 | 556 | /* temporary: will be moved in platform specific file */ |
54fa5af5 | 557 | void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
46e50e9d | 558 | PCIBus *pci_prep_init(void); |
54fa5af5 | 559 | PCIBus *pci_grackle_init(uint32_t base); |
46e50e9d | 560 | PCIBus *pci_pmac_init(void); |
77d4bc34 | 561 | |
28b9b5af FB |
562 | /* openpic.c */ |
563 | typedef struct openpic_t openpic_t; | |
54fa5af5 | 564 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
e2733d20 | 565 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus); |
28b9b5af | 566 | |
54fa5af5 FB |
567 | /* heathrow_pic.c */ |
568 | typedef struct HeathrowPICS HeathrowPICS; | |
569 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
570 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
571 | ||
313aa567 FB |
572 | /* vga.c */ |
573 | ||
4fa0f5d2 | 574 | #define VGA_RAM_SIZE (4096 * 1024) |
313aa567 | 575 | |
82c643ff | 576 | struct DisplayState { |
313aa567 FB |
577 | uint8_t *data; |
578 | int linesize; | |
579 | int depth; | |
82c643ff FB |
580 | int width; |
581 | int height; | |
313aa567 FB |
582 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
583 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
584 | void (*dpy_refresh)(struct DisplayState *s); | |
82c643ff | 585 | }; |
313aa567 FB |
586 | |
587 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
588 | { | |
589 | s->dpy_update(s, x, y, w, h); | |
590 | } | |
591 | ||
592 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
593 | { | |
594 | s->dpy_resize(s, w, h); | |
595 | } | |
596 | ||
46e50e9d FB |
597 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
598 | unsigned long vga_ram_offset, int vga_ram_size); | |
313aa567 | 599 | void vga_update_display(void); |
ee38b4c8 | 600 | void vga_invalidate_display(void); |
59a983b9 | 601 | void vga_screen_dump(const char *filename); |
313aa567 | 602 | |
d6bfa22f | 603 | /* cirrus_vga.c */ |
46e50e9d | 604 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 605 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
606 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
607 | unsigned long vga_ram_offset, int vga_ram_size); | |
608 | ||
313aa567 | 609 | /* sdl.c */ |
d63d307f | 610 | void sdl_display_init(DisplayState *ds, int full_screen); |
313aa567 | 611 | |
da4dbf74 FB |
612 | /* cocoa.m */ |
613 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
614 | ||
5391d806 FB |
615 | /* ide.c */ |
616 | #define MAX_DISKS 4 | |
617 | ||
618 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
619 | ||
69b91039 FB |
620 | void isa_ide_init(int iobase, int iobase2, int irq, |
621 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
622 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
623 | int secondary_ide_enabled); | |
46e50e9d | 624 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table); |
28b9b5af | 625 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 626 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 627 | |
fb065187 FB |
628 | /* sb16.c */ |
629 | void SB16_init (void); | |
630 | ||
631 | /* adlib.c */ | |
632 | void Adlib_init (void); | |
633 | ||
634 | /* gus.c */ | |
635 | void GUS_init (void); | |
27503323 FB |
636 | |
637 | /* dma.c */ | |
85571bc7 | 638 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 639 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
640 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
641 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
642 | void DMA_hold_DREQ (int nchan); |
643 | void DMA_release_DREQ (int nchan); | |
16f62432 | 644 | void DMA_schedule(int nchan); |
27503323 | 645 | void DMA_run (void); |
28b9b5af | 646 | void DMA_init (int high_page_enable); |
27503323 | 647 | void DMA_register_channel (int nchan, |
85571bc7 FB |
648 | DMA_transfer_handler transfer_handler, |
649 | void *opaque); | |
7138fcfb FB |
650 | /* fdc.c */ |
651 | #define MAX_FD 2 | |
652 | extern BlockDriverState *fd_table[MAX_FD]; | |
653 | ||
baca51fa FB |
654 | typedef struct fdctrl_t fdctrl_t; |
655 | ||
656 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
657 | uint32_t io_base, | |
658 | BlockDriverState **fds); | |
659 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 660 | |
80cabfad FB |
661 | /* ne2000.c */ |
662 | ||
69b91039 | 663 | void isa_ne2000_init(int base, int irq, NetDriverState *nd); |
46e50e9d | 664 | void pci_ne2000_init(PCIBus *bus, NetDriverState *nd); |
80cabfad FB |
665 | |
666 | /* pckbd.c */ | |
667 | ||
80cabfad FB |
668 | void kbd_init(void); |
669 | ||
670 | /* mc146818rtc.c */ | |
671 | ||
8a7ddc38 | 672 | typedef struct RTCState RTCState; |
80cabfad | 673 | |
8a7ddc38 FB |
674 | RTCState *rtc_init(int base, int irq); |
675 | void rtc_set_memory(RTCState *s, int addr, int val); | |
676 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
677 | |
678 | /* serial.c */ | |
679 | ||
c4b1fcc0 | 680 | typedef struct SerialState SerialState; |
82c643ff | 681 | SerialState *serial_init(int base, int irq, CharDriverState *chr); |
80cabfad | 682 | |
6508fe59 FB |
683 | /* parallel.c */ |
684 | ||
685 | typedef struct ParallelState ParallelState; | |
686 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
687 | ||
80cabfad FB |
688 | /* i8259.c */ |
689 | ||
690 | void pic_set_irq(int irq, int level); | |
54fa5af5 | 691 | void pic_set_irq_new(void *opaque, int irq, int level); |
80cabfad | 692 | void pic_init(void); |
c5df018e | 693 | uint32_t pic_intack_read(CPUState *env); |
c20709aa | 694 | void pic_info(void); |
4a0fb71e | 695 | void irq_info(void); |
80cabfad | 696 | |
c27004ec FB |
697 | /* APIC */ |
698 | int apic_init(CPUState *env); | |
699 | int apic_get_interrupt(CPUState *env); | |
700 | ||
80cabfad FB |
701 | /* i8254.c */ |
702 | ||
703 | #define PIT_FREQ 1193182 | |
704 | ||
ec844b96 FB |
705 | typedef struct PITState PITState; |
706 | ||
707 | PITState *pit_init(int base, int irq); | |
708 | void pit_set_gate(PITState *pit, int channel, int val); | |
709 | int pit_get_gate(PITState *pit, int channel); | |
710 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
80cabfad FB |
711 | |
712 | /* pc.c */ | |
54fa5af5 | 713 | extern QEMUMachine pc_machine; |
80cabfad | 714 | |
26aa7d72 | 715 | /* ppc.c */ |
54fa5af5 FB |
716 | extern QEMUMachine prep_machine; |
717 | extern QEMUMachine core99_machine; | |
718 | extern QEMUMachine heathrow_machine; | |
719 | ||
6af0bf9c FB |
720 | /* mips_r4k.c */ |
721 | extern QEMUMachine mips_machine; | |
722 | ||
8cc43fef FB |
723 | #ifdef TARGET_PPC |
724 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
725 | #endif | |
64201201 | 726 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
727 | |
728 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
729 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
730 | extern int prep_enabled; | |
54fa5af5 | 731 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 732 | |
e95c8d51 | 733 | /* sun4m.c */ |
54fa5af5 | 734 | extern QEMUMachine sun4m_machine; |
e80cfcfc | 735 | uint32_t iommu_translate(uint32_t addr); |
e95c8d51 FB |
736 | |
737 | /* iommu.c */ | |
e80cfcfc FB |
738 | void *iommu_init(uint32_t addr); |
739 | uint32_t iommu_translate_local(void *opaque, uint32_t addr); | |
e95c8d51 FB |
740 | |
741 | /* lance.c */ | |
8d5f07fa | 742 | void lance_init(NetDriverState *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
e95c8d51 FB |
743 | |
744 | /* tcx.c */ | |
e80cfcfc | 745 | void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 746 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
747 | void tcx_update_display(void *opaque); |
748 | void tcx_invalidate_display(void *opaque); | |
749 | void tcx_screen_dump(void *opaque, const char *filename); | |
750 | ||
751 | /* slavio_intctl.c */ | |
752 | void *slavio_intctl_init(); | |
753 | void slavio_pic_info(void *opaque); | |
754 | void slavio_irq_info(void *opaque); | |
755 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
e95c8d51 FB |
756 | |
757 | /* magic-load.c */ | |
e80cfcfc FB |
758 | int load_elf(const char *filename, uint8_t *addr); |
759 | int load_aout(const char *filename, uint8_t *addr); | |
760 | ||
761 | /* slavio_timer.c */ | |
762 | void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2); | |
8d5f07fa | 763 | |
e80cfcfc FB |
764 | /* slavio_serial.c */ |
765 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); | |
766 | void slavio_serial_ms_kbd_init(int base, int irq); | |
e95c8d51 | 767 | |
3475187d FB |
768 | /* slavio_misc.c */ |
769 | void *slavio_misc_init(uint32_t base, int irq); | |
770 | void slavio_set_power_fail(void *opaque, int power_failing); | |
771 | ||
6f7e9aec FB |
772 | /* esp.c */ |
773 | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); | |
774 | ||
3475187d FB |
775 | /* sun4u.c */ |
776 | extern QEMUMachine sun4u_machine; | |
777 | ||
64201201 FB |
778 | /* NVRAM helpers */ |
779 | #include "hw/m48t59.h" | |
780 | ||
781 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
782 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
783 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
784 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
785 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
786 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
787 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
788 | const unsigned char *str, uint32_t max); | |
789 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
790 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
791 | uint32_t start, uint32_t count); | |
792 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
793 | const unsigned char *arch, | |
794 | uint32_t RAM_size, int boot_device, | |
795 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 796 | const char *cmdline, |
64201201 | 797 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
798 | uint32_t NVRAM_image, |
799 | int width, int height, int depth); | |
64201201 | 800 | |
63066f4f FB |
801 | /* adb.c */ |
802 | ||
803 | #define MAX_ADB_DEVICES 16 | |
804 | ||
e2733d20 | 805 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 806 | |
e2733d20 | 807 | typedef struct ADBDevice ADBDevice; |
63066f4f | 808 | |
e2733d20 FB |
809 | /* buf = NULL means polling */ |
810 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
811 | const uint8_t *buf, int len); | |
12c28fed FB |
812 | typedef int ADBDeviceReset(ADBDevice *d); |
813 | ||
63066f4f FB |
814 | struct ADBDevice { |
815 | struct ADBBusState *bus; | |
816 | int devaddr; | |
817 | int handler; | |
e2733d20 | 818 | ADBDeviceRequest *devreq; |
12c28fed | 819 | ADBDeviceReset *devreset; |
63066f4f FB |
820 | void *opaque; |
821 | }; | |
822 | ||
823 | typedef struct ADBBusState { | |
824 | ADBDevice devices[MAX_ADB_DEVICES]; | |
825 | int nb_devices; | |
e2733d20 | 826 | int poll_index; |
63066f4f FB |
827 | } ADBBusState; |
828 | ||
e2733d20 FB |
829 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
830 | const uint8_t *buf, int len); | |
831 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
832 | |
833 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 834 | ADBDeviceRequest *devreq, |
12c28fed | 835 | ADBDeviceReset *devreset, |
63066f4f FB |
836 | void *opaque); |
837 | void adb_kbd_init(ADBBusState *bus); | |
838 | void adb_mouse_init(ADBBusState *bus); | |
839 | ||
840 | /* cuda.c */ | |
841 | ||
842 | extern ADBBusState adb_bus; | |
54fa5af5 | 843 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 844 | |
ea2384d3 FB |
845 | #endif /* defined(QEMU_TOOL) */ |
846 | ||
c4b1fcc0 | 847 | /* monitor.c */ |
82c643ff | 848 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
849 | void term_puts(const char *str); |
850 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 851 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
852 | void term_flush(void); |
853 | void term_print_help(void); | |
ea2384d3 FB |
854 | void monitor_readline(const char *prompt, int is_password, |
855 | char *buf, int buf_size); | |
856 | ||
857 | /* readline.c */ | |
858 | typedef void ReadLineFunc(void *opaque, const char *str); | |
859 | ||
860 | extern int completion_index; | |
861 | void add_completion(const char *str); | |
862 | void readline_handle_byte(int ch); | |
863 | void readline_find_completion(const char *cmdline); | |
864 | const char *readline_get_history(unsigned int index); | |
865 | void readline_start(const char *prompt, int is_password, | |
866 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 867 | |
fc01f7e7 | 868 | #endif /* VL_H */ |