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Add -option-rom option to allow loading of PCI option ROMs, by Anthony Liguori.
[mirror_qemu.git] / vl.h
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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
40c3bac3
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
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47
48#ifdef _WIN32
a18e524a 49#include <windows.h>
ac62f715 50#define fsync _commit
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51#define lseek _lseeki64
52#define ENOTSUP 4096
19cb3738 53#define ENOMEDIUM 4097
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54extern int qemu_ftruncate64(int, int64_t);
55#define ftruncate qemu_ftruncate64
56
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57
58static inline char *realpath(const char *path, char *resolved_path)
59{
60 _fullpath(resolved_path, path, _MAX_PATH);
61 return resolved_path;
62}
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63
64#define PRId64 "I64d"
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65#define PRIx64 "I64x"
66#define PRIu64 "I64u"
67#define PRIo64 "I64o"
67b915a5 68#endif
8a7ddc38 69
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70#ifdef QEMU_TOOL
71
72/* we use QEMU_TOOL in the command line tools which do not depend on
73 the target CPU type */
74#include "config-host.h"
75#include <setjmp.h>
76#include "osdep.h"
77#include "bswap.h"
78
79#else
80
4f209290 81#include "audio/audio.h"
16f62432 82#include "cpu.h"
1fddef4b 83#include "gdbstub.h"
16f62432 84
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85#endif /* !defined(QEMU_TOOL) */
86
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87#ifndef glue
88#define xglue(x, y) x ## y
89#define glue(x, y) xglue(x, y)
90#define stringify(s) tostring(s)
91#define tostring(s) #s
92#endif
93
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94#ifndef MIN
95#define MIN(a, b) (((a) < (b)) ? (a) : (b))
96#endif
97#ifndef MAX
98#define MAX(a, b) (((a) > (b)) ? (a) : (b))
99#endif
100
33e3963e 101/* vl.c */
80cabfad 102uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 103
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104void hw_error(const char *fmt, ...);
105
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106extern const char *bios_dir;
107
108void pstrcpy(char *buf, int buf_size, const char *str);
109char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 110int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 111
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112extern int vm_running;
113
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114typedef struct vm_change_state_entry VMChangeStateEntry;
115typedef void VMChangeStateHandler(void *opaque, int running);
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116typedef void VMStopHandler(void *opaque, int reason);
117
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118VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
119 void *opaque);
120void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
121
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122int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
123void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
124
125void vm_start(void);
126void vm_stop(int reason);
127
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128typedef void QEMUResetHandler(void *opaque);
129
130void qemu_register_reset(QEMUResetHandler *func, void *opaque);
131void qemu_system_reset_request(void);
132void qemu_system_shutdown_request(void);
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133void qemu_system_powerdown_request(void);
134#if !defined(TARGET_SPARC)
135// Please implement a power failure function to signal the OS
136#define qemu_system_powerdown() do{}while(0)
137#else
138void qemu_system_powerdown(void);
139#endif
bb0c6722 140
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141void main_loop_wait(int timeout);
142
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143extern int ram_size;
144extern int bios_size;
ee22c2f7 145extern int rtc_utc;
1f04275e 146extern int cirrus_vga_enabled;
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147extern int graphic_width;
148extern int graphic_height;
149extern int graphic_depth;
3d11d0eb 150extern const char *keyboard_layout;
d993e026 151extern int kqemu_allowed;
a09db21f 152extern int win2k_install_hack;
bb36d470 153extern int usb_enabled;
6a00d601 154extern int smp_cpus;
667accab 155extern int no_quit;
0ced6589 156
9ae02555
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157#define MAX_OPTION_ROMS 16
158extern const char *option_rom[MAX_OPTION_ROMS];
159extern int nb_option_roms;
160
0ced6589 161/* XXX: make it dynamic */
75956cf0 162#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 163#define BIOS_SIZE ((512 + 32) * 1024)
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164#elif defined(TARGET_MIPS)
165#define BIOS_SIZE (128 * 1024)
0ced6589 166#else
7587cf44 167#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 168#endif
aaaa7df6 169
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170/* keyboard/mouse support */
171
172#define MOUSE_EVENT_LBUTTON 0x01
173#define MOUSE_EVENT_RBUTTON 0x02
174#define MOUSE_EVENT_MBUTTON 0x04
175
176typedef void QEMUPutKBDEvent(void *opaque, int keycode);
177typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
178
455204eb
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179typedef struct QEMUPutMouseEntry {
180 QEMUPutMouseEvent *qemu_put_mouse_event;
181 void *qemu_put_mouse_event_opaque;
182 int qemu_put_mouse_event_absolute;
183 char *qemu_put_mouse_event_name;
184
185 /* used internally by qemu for handling mice */
186 struct QEMUPutMouseEntry *next;
187} QEMUPutMouseEntry;
188
63066f4f 189void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
455204eb
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190QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
191 void *opaque, int absolute,
192 const char *name);
193void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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194
195void kbd_put_keycode(int keycode);
196void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 197int kbd_mouse_is_absolute(void);
63066f4f 198
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199void do_info_mice(void);
200void do_mouse_set(int index);
201
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202/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
203 constants) */
204#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
205#define QEMU_KEY_BACKSPACE 0x007f
206#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
207#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
208#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
209#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
210#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
211#define QEMU_KEY_END QEMU_KEY_ESC1(4)
212#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
213#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
214#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
215
216#define QEMU_KEY_CTRL_UP 0xe400
217#define QEMU_KEY_CTRL_DOWN 0xe401
218#define QEMU_KEY_CTRL_LEFT 0xe402
219#define QEMU_KEY_CTRL_RIGHT 0xe403
220#define QEMU_KEY_CTRL_HOME 0xe404
221#define QEMU_KEY_CTRL_END 0xe405
222#define QEMU_KEY_CTRL_PAGEUP 0xe406
223#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
224
225void kbd_put_keysym(int keysym);
226
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227/* async I/O support */
228
229typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
230typedef int IOCanRWHandler(void *opaque);
7c9d8e07 231typedef void IOHandler(void *opaque);
c20709aa 232
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233int qemu_set_fd_handler2(int fd,
234 IOCanRWHandler *fd_read_poll,
235 IOHandler *fd_read,
236 IOHandler *fd_write,
237 void *opaque);
238int qemu_set_fd_handler(int fd,
239 IOHandler *fd_read,
240 IOHandler *fd_write,
241 void *opaque);
c20709aa 242
f331110f
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243/* Polling handling */
244
245/* return TRUE if no sleep should be done afterwards */
246typedef int PollingFunc(void *opaque);
247
248int qemu_add_polling_cb(PollingFunc *func, void *opaque);
249void qemu_del_polling_cb(PollingFunc *func, void *opaque);
250
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251#ifdef _WIN32
252/* Wait objects handling */
253typedef void WaitObjectFunc(void *opaque);
254
255int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
256void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
257#endif
258
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259/* character device */
260
261#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 262#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 263
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264
265
266#define CHR_IOCTL_SERIAL_SET_PARAMS 1
267typedef struct {
268 int speed;
269 int parity;
270 int data_bits;
271 int stop_bits;
272} QEMUSerialSetParams;
273
274#define CHR_IOCTL_SERIAL_SET_BREAK 2
275
276#define CHR_IOCTL_PP_READ_DATA 3
277#define CHR_IOCTL_PP_WRITE_DATA 4
278#define CHR_IOCTL_PP_READ_CONTROL 5
279#define CHR_IOCTL_PP_WRITE_CONTROL 6
280#define CHR_IOCTL_PP_READ_STATUS 7
281
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282typedef void IOEventHandler(void *opaque, int event);
283
284typedef struct CharDriverState {
285 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
286 void (*chr_add_read_handler)(struct CharDriverState *s,
287 IOCanRWHandler *fd_can_read,
288 IOReadHandler *fd_read, void *opaque);
2122c51a 289 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 290 IOEventHandler *chr_event;
eb45f5fe 291 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 292 void (*chr_close)(struct CharDriverState *chr);
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293 void *opaque;
294} CharDriverState;
295
296void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
297int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 298void qemu_chr_send_event(CharDriverState *s, int event);
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299void qemu_chr_add_read_handler(CharDriverState *s,
300 IOCanRWHandler *fd_can_read,
301 IOReadHandler *fd_read, void *opaque);
302void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 303int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 304
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305/* consoles */
306
307typedef struct DisplayState DisplayState;
308typedef struct TextConsole TextConsole;
309
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310typedef void (*vga_hw_update_ptr)(void *);
311typedef void (*vga_hw_invalidate_ptr)(void *);
312typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
313
314TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
315 vga_hw_invalidate_ptr invalidate,
316 vga_hw_screen_dump_ptr screen_dump,
317 void *opaque);
318void vga_hw_update(void);
319void vga_hw_invalidate(void);
320void vga_hw_screen_dump(const char *filename);
321
322int is_graphic_console(void);
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323CharDriverState *text_console_init(DisplayState *ds);
324void console_select(unsigned int index);
325
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326/* serial ports */
327
328#define MAX_SERIAL_PORTS 4
329
330extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
331
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332/* parallel ports */
333
334#define MAX_PARALLEL_PORTS 3
335
336extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
337
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338/* VLANs support */
339
340typedef struct VLANClientState VLANClientState;
341
342struct VLANClientState {
343 IOReadHandler *fd_read;
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344 /* Packets may still be sent if this returns zero. It's used to
345 rate-limit the slirp code. */
346 IOCanRWHandler *fd_can_read;
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347 void *opaque;
348 struct VLANClientState *next;
349 struct VLANState *vlan;
350 char info_str[256];
351};
352
353typedef struct VLANState {
354 int id;
355 VLANClientState *first_client;
356 struct VLANState *next;
357} VLANState;
358
359VLANState *qemu_find_vlan(int id);
360VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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361 IOReadHandler *fd_read,
362 IOCanRWHandler *fd_can_read,
363 void *opaque);
364int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 365void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 366void qemu_handler_true(void *opaque);
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367
368void do_info_network(void);
369
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370/* TAP win32 */
371int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 372
7c9d8e07 373/* NIC info */
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374
375#define MAX_NICS 8
376
7c9d8e07 377typedef struct NICInfo {
c4b1fcc0 378 uint8_t macaddr[6];
a41b2ff2 379 const char *model;
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380 VLANState *vlan;
381} NICInfo;
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382
383extern int nb_nics;
7c9d8e07 384extern NICInfo nd_table[MAX_NICS];
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385
386/* timers */
387
388typedef struct QEMUClock QEMUClock;
389typedef struct QEMUTimer QEMUTimer;
390typedef void QEMUTimerCB(void *opaque);
391
392/* The real time clock should be used only for stuff which does not
393 change the virtual machine state, as it is run even if the virtual
69b91039 394 machine is stopped. The real time clock has a frequency of 1000
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395 Hz. */
396extern QEMUClock *rt_clock;
397
e80cfcfc 398/* The virtual clock is only run during the emulation. It is stopped
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399 when the virtual machine is stopped. Virtual timers use a high
400 precision clock, usually cpu cycles (use ticks_per_sec). */
401extern QEMUClock *vm_clock;
402
403int64_t qemu_get_clock(QEMUClock *clock);
404
405QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
406void qemu_free_timer(QEMUTimer *ts);
407void qemu_del_timer(QEMUTimer *ts);
408void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
409int qemu_timer_pending(QEMUTimer *ts);
410
411extern int64_t ticks_per_sec;
412extern int pit_min_timer_count;
413
1dce7c3c 414int64_t cpu_get_ticks(void);
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415void cpu_enable_ticks(void);
416void cpu_disable_ticks(void);
417
418/* VM Load/Save */
419
faea38e7 420typedef struct QEMUFile QEMUFile;
8a7ddc38 421
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422QEMUFile *qemu_fopen(const char *filename, const char *mode);
423void qemu_fflush(QEMUFile *f);
424void qemu_fclose(QEMUFile *f);
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425void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
426void qemu_put_byte(QEMUFile *f, int v);
427void qemu_put_be16(QEMUFile *f, unsigned int v);
428void qemu_put_be32(QEMUFile *f, unsigned int v);
429void qemu_put_be64(QEMUFile *f, uint64_t v);
430int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
431int qemu_get_byte(QEMUFile *f);
432unsigned int qemu_get_be16(QEMUFile *f);
433unsigned int qemu_get_be32(QEMUFile *f);
434uint64_t qemu_get_be64(QEMUFile *f);
435
436static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
437{
438 qemu_put_be64(f, *pv);
439}
440
441static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
442{
443 qemu_put_be32(f, *pv);
444}
445
446static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
447{
448 qemu_put_be16(f, *pv);
449}
450
451static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
452{
453 qemu_put_byte(f, *pv);
454}
455
456static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
457{
458 *pv = qemu_get_be64(f);
459}
460
461static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
462{
463 *pv = qemu_get_be32(f);
464}
465
466static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
467{
468 *pv = qemu_get_be16(f);
469}
470
471static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
472{
473 *pv = qemu_get_byte(f);
474}
475
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476#if TARGET_LONG_BITS == 64
477#define qemu_put_betl qemu_put_be64
478#define qemu_get_betl qemu_get_be64
479#define qemu_put_betls qemu_put_be64s
480#define qemu_get_betls qemu_get_be64s
481#else
482#define qemu_put_betl qemu_put_be32
483#define qemu_get_betl qemu_get_be32
484#define qemu_put_betls qemu_put_be32s
485#define qemu_get_betls qemu_get_be32s
486#endif
487
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488int64_t qemu_ftell(QEMUFile *f);
489int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
490
491typedef void SaveStateHandler(QEMUFile *f, void *opaque);
492typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
493
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494int register_savevm(const char *idstr,
495 int instance_id,
496 int version_id,
497 SaveStateHandler *save_state,
498 LoadStateHandler *load_state,
499 void *opaque);
500void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
501void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 502
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503void cpu_save(QEMUFile *f, void *opaque);
504int cpu_load(QEMUFile *f, void *opaque, int version_id);
505
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506void do_savevm(const char *name);
507void do_loadvm(const char *name);
508void do_delvm(const char *name);
509void do_info_snapshots(void);
510
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511/* bottom halves */
512typedef struct QEMUBH QEMUBH;
513typedef void QEMUBHFunc(void *opaque);
514
515QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
516void qemu_bh_schedule(QEMUBH *bh);
517void qemu_bh_cancel(QEMUBH *bh);
518void qemu_bh_delete(QEMUBH *bh);
6eb5733a 519int qemu_bh_poll(void);
83f64091 520
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521/* block.c */
522typedef struct BlockDriverState BlockDriverState;
ea2384d3
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523typedef struct BlockDriver BlockDriver;
524
525extern BlockDriver bdrv_raw;
19cb3738 526extern BlockDriver bdrv_host_device;
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527extern BlockDriver bdrv_cow;
528extern BlockDriver bdrv_qcow;
529extern BlockDriver bdrv_vmdk;
3c56521b 530extern BlockDriver bdrv_cloop;
585d0ed9 531extern BlockDriver bdrv_dmg;
a8753c34 532extern BlockDriver bdrv_bochs;
6a0f9e82 533extern BlockDriver bdrv_vpc;
de167e41 534extern BlockDriver bdrv_vvfat;
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535extern BlockDriver bdrv_qcow2;
536
537typedef struct BlockDriverInfo {
538 /* in bytes, 0 if irrelevant */
539 int cluster_size;
540 /* offset at which the VM state can be saved (0 if not possible) */
541 int64_t vm_state_offset;
542} BlockDriverInfo;
543
544typedef struct QEMUSnapshotInfo {
545 char id_str[128]; /* unique snapshot id */
546 /* the following fields are informative. They are not needed for
547 the consistency of the snapshot */
548 char name[256]; /* user choosen name */
549 uint32_t vm_state_size; /* VM state info size */
550 uint32_t date_sec; /* UTC date of the snapshot */
551 uint32_t date_nsec;
552 uint64_t vm_clock_nsec; /* VM clock relative to boot */
553} QEMUSnapshotInfo;
ea2384d3 554
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555#define BDRV_O_RDONLY 0x0000
556#define BDRV_O_RDWR 0x0002
557#define BDRV_O_ACCESS 0x0003
558#define BDRV_O_CREAT 0x0004 /* create an empty file */
559#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
560#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
561 use a disk image format on top of
562 it (default for
563 bdrv_file_open()) */
564
ea2384d3
FB
565void bdrv_init(void);
566BlockDriver *bdrv_find_format(const char *format_name);
567int bdrv_create(BlockDriver *drv,
568 const char *filename, int64_t size_in_sectors,
569 const char *backing_file, int flags);
c4b1fcc0
FB
570BlockDriverState *bdrv_new(const char *device_name);
571void bdrv_delete(BlockDriverState *bs);
83f64091
FB
572int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
573int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
574int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 575 BlockDriver *drv);
fc01f7e7
FB
576void bdrv_close(BlockDriverState *bs);
577int bdrv_read(BlockDriverState *bs, int64_t sector_num,
578 uint8_t *buf, int nb_sectors);
579int bdrv_write(BlockDriverState *bs, int64_t sector_num,
580 const uint8_t *buf, int nb_sectors);
83f64091
FB
581int bdrv_pread(BlockDriverState *bs, int64_t offset,
582 void *buf, int count);
583int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
584 const void *buf, int count);
585int bdrv_truncate(BlockDriverState *bs, int64_t offset);
586int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 587void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 588int bdrv_commit(BlockDriverState *bs);
77fef8c1 589void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
590/* async block I/O */
591typedef struct BlockDriverAIOCB BlockDriverAIOCB;
592typedef void BlockDriverCompletionFunc(void *opaque, int ret);
593
ce1a14dc
PB
594BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
595 uint8_t *buf, int nb_sectors,
596 BlockDriverCompletionFunc *cb, void *opaque);
597BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
598 const uint8_t *buf, int nb_sectors,
599 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 600void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
601
602void qemu_aio_init(void);
603void qemu_aio_poll(void);
6192bc37 604void qemu_aio_flush(void);
83f64091
FB
605void qemu_aio_wait_start(void);
606void qemu_aio_wait(void);
607void qemu_aio_wait_end(void);
608
7a6cba61
PB
609/* Ensure contents are flushed to disk. */
610void bdrv_flush(BlockDriverState *bs);
33e3963e 611
c4b1fcc0
FB
612#define BDRV_TYPE_HD 0
613#define BDRV_TYPE_CDROM 1
614#define BDRV_TYPE_FLOPPY 2
46d4767d
FB
615#define BIOS_ATA_TRANSLATION_AUTO 0
616#define BIOS_ATA_TRANSLATION_NONE 1
617#define BIOS_ATA_TRANSLATION_LBA 2
c4b1fcc0
FB
618
619void bdrv_set_geometry_hint(BlockDriverState *bs,
620 int cyls, int heads, int secs);
621void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 622void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
623void bdrv_get_geometry_hint(BlockDriverState *bs,
624 int *pcyls, int *pheads, int *psecs);
625int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 626int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
627int bdrv_is_removable(BlockDriverState *bs);
628int bdrv_is_read_only(BlockDriverState *bs);
629int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 630int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
631int bdrv_is_locked(BlockDriverState *bs);
632void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 633void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
634void bdrv_set_change_cb(BlockDriverState *bs,
635 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 636void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
637void bdrv_info(void);
638BlockDriverState *bdrv_find(const char *name);
82c643ff 639void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
640int bdrv_is_encrypted(BlockDriverState *bs);
641int bdrv_set_key(BlockDriverState *bs, const char *key);
642void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
643 void *opaque);
644const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
645int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
646 const uint8_t *buf, int nb_sectors);
647int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 648
83f64091
FB
649void bdrv_get_backing_filename(BlockDriverState *bs,
650 char *filename, int filename_size);
faea38e7
FB
651int bdrv_snapshot_create(BlockDriverState *bs,
652 QEMUSnapshotInfo *sn_info);
653int bdrv_snapshot_goto(BlockDriverState *bs,
654 const char *snapshot_id);
655int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
656int bdrv_snapshot_list(BlockDriverState *bs,
657 QEMUSnapshotInfo **psn_info);
658char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
659
660char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
661int path_is_absolute(const char *path);
662void path_combine(char *dest, int dest_size,
663 const char *base_path,
664 const char *filename);
ea2384d3
FB
665
666#ifndef QEMU_TOOL
54fa5af5
FB
667
668typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
669 int boot_device,
670 DisplayState *ds, const char **fd_filename, int snapshot,
671 const char *kernel_filename, const char *kernel_cmdline,
672 const char *initrd_filename);
673
674typedef struct QEMUMachine {
675 const char *name;
676 const char *desc;
677 QEMUMachineInitFunc *init;
678 struct QEMUMachine *next;
679} QEMUMachine;
680
681int qemu_register_machine(QEMUMachine *m);
682
683typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 684typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 685
26aa7d72
FB
686/* ISA bus */
687
688extern target_phys_addr_t isa_mem_base;
689
690typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
691typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
692
693int register_ioport_read(int start, int length, int size,
694 IOPortReadFunc *func, void *opaque);
695int register_ioport_write(int start, int length, int size,
696 IOPortWriteFunc *func, void *opaque);
69b91039
FB
697void isa_unassign_ioport(int start, int length);
698
aef445bd
PB
699void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
700
69b91039
FB
701/* PCI bus */
702
69b91039
FB
703extern target_phys_addr_t pci_mem_base;
704
46e50e9d 705typedef struct PCIBus PCIBus;
69b91039
FB
706typedef struct PCIDevice PCIDevice;
707
708typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
709 uint32_t address, uint32_t data, int len);
710typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
711 uint32_t address, int len);
712typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
713 uint32_t addr, uint32_t size, int type);
714
715#define PCI_ADDRESS_SPACE_MEM 0x00
716#define PCI_ADDRESS_SPACE_IO 0x01
717#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
718
719typedef struct PCIIORegion {
5768f5ac 720 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
721 uint32_t size;
722 uint8_t type;
723 PCIMapIORegionFunc *map_func;
724} PCIIORegion;
725
8a8696a3
FB
726#define PCI_ROM_SLOT 6
727#define PCI_NUM_REGIONS 7
502a5395
PB
728
729#define PCI_DEVICES_MAX 64
730
731#define PCI_VENDOR_ID 0x00 /* 16 bits */
732#define PCI_DEVICE_ID 0x02 /* 16 bits */
733#define PCI_COMMAND 0x04 /* 16 bits */
734#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
735#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
736#define PCI_CLASS_DEVICE 0x0a /* Device class */
737#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
738#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
739#define PCI_MIN_GNT 0x3e /* 8 bits */
740#define PCI_MAX_LAT 0x3f /* 8 bits */
741
69b91039
FB
742struct PCIDevice {
743 /* PCI config space */
744 uint8_t config[256];
745
746 /* the following fields are read only */
46e50e9d 747 PCIBus *bus;
69b91039
FB
748 int devfn;
749 char name[64];
8a8696a3 750 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
751
752 /* do not access the following fields */
753 PCIConfigReadFunc *config_read;
754 PCIConfigWriteFunc *config_write;
502a5395 755 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 756 int irq_index;
d2b59317
PB
757
758 /* Current IRQ levels. Used internally by the generic PCI code. */
759 int irq_state[4];
69b91039
FB
760};
761
46e50e9d
FB
762PCIDevice *pci_register_device(PCIBus *bus, const char *name,
763 int instance_size, int devfn,
69b91039
FB
764 PCIConfigReadFunc *config_read,
765 PCIConfigWriteFunc *config_write);
766
767void pci_register_io_region(PCIDevice *pci_dev, int region_num,
768 uint32_t size, int type,
769 PCIMapIORegionFunc *map_func);
770
5768f5ac
FB
771void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
772
773uint32_t pci_default_read_config(PCIDevice *d,
774 uint32_t address, int len);
775void pci_default_write_config(PCIDevice *d,
776 uint32_t address, uint32_t val, int len);
89b6b508
FB
777void pci_device_save(PCIDevice *s, QEMUFile *f);
778int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 779
d2b59317
PB
780typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
781typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
782PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 783 void *pic, int devfn_min, int nirq);
502a5395
PB
784
785void pci_nic_init(PCIBus *bus, NICInfo *nd);
786void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
787uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
788int pci_bus_num(PCIBus *s);
80b3ada7 789void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 790
5768f5ac 791void pci_info(void);
80b3ada7
PB
792PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
793 pci_map_irq_fn map_irq, const char *name);
26aa7d72 794
502a5395 795/* prep_pci.c */
46e50e9d 796PCIBus *pci_prep_init(void);
77d4bc34 797
502a5395
PB
798/* grackle_pci.c */
799PCIBus *pci_grackle_init(uint32_t base, void *pic);
800
801/* unin_pci.c */
802PCIBus *pci_pmac_init(void *pic);
803
804/* apb_pci.c */
805PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
806 void *pic);
807
e69954b9 808PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
809
810/* piix_pci.c */
f00fc47c
FB
811PCIBus *i440fx_init(PCIDevice **pi440fx_state);
812void i440fx_set_smm(PCIDevice *d, int val);
502a5395 813int piix3_init(PCIBus *bus);
f00fc47c 814void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 815
28b9b5af
FB
816/* openpic.c */
817typedef struct openpic_t openpic_t;
54fa5af5 818void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
819openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
820 CPUState **envp);
28b9b5af 821
54fa5af5
FB
822/* heathrow_pic.c */
823typedef struct HeathrowPICS HeathrowPICS;
824void heathrow_pic_set_irq(void *opaque, int num, int level);
825HeathrowPICS *heathrow_pic_init(int *pmem_index);
826
6a36d84e
FB
827#ifdef HAS_AUDIO
828struct soundhw {
829 const char *name;
830 const char *descr;
831 int enabled;
832 int isa;
833 union {
834 int (*init_isa) (AudioState *s);
835 int (*init_pci) (PCIBus *bus, AudioState *s);
836 } init;
837};
838
839extern struct soundhw soundhw[];
840#endif
841
313aa567
FB
842/* vga.c */
843
74a14f22 844#define VGA_RAM_SIZE (8192 * 1024)
313aa567 845
82c643ff 846struct DisplayState {
313aa567
FB
847 uint8_t *data;
848 int linesize;
849 int depth;
d3079cd2 850 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
851 int width;
852 int height;
24236869
FB
853 void *opaque;
854
313aa567
FB
855 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
856 void (*dpy_resize)(struct DisplayState *s, int w, int h);
857 void (*dpy_refresh)(struct DisplayState *s);
24236869 858 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 859};
313aa567
FB
860
861static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
862{
863 s->dpy_update(s, x, y, w, h);
864}
865
866static inline void dpy_resize(DisplayState *s, int w, int h)
867{
868 s->dpy_resize(s, w, h);
869}
870
89b6b508
FB
871int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
872 unsigned long vga_ram_offset, int vga_ram_size);
873int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
874 unsigned long vga_ram_offset, int vga_ram_size,
875 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 876
d6bfa22f 877/* cirrus_vga.c */
46e50e9d 878void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 879 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
880void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
881 unsigned long vga_ram_offset, int vga_ram_size);
882
313aa567 883/* sdl.c */
d63d307f 884void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 885
da4dbf74
FB
886/* cocoa.m */
887void cocoa_display_init(DisplayState *ds, int full_screen);
888
24236869 889/* vnc.c */
73fc9742 890void vnc_display_init(DisplayState *ds, const char *display);
24236869 891
5391d806
FB
892/* ide.c */
893#define MAX_DISKS 4
894
faea38e7 895extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 896
69b91039
FB
897void isa_ide_init(int iobase, int iobase2, int irq,
898 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
899void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
900 int secondary_ide_enabled);
502a5395 901void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 902int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 903 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 904
2e5d83bb
PB
905/* cdrom.c */
906int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
907int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
908
1d14ffa9 909/* es1370.c */
c0fe3827 910int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 911
fb065187 912/* sb16.c */
c0fe3827 913int SB16_init (AudioState *s);
fb065187
FB
914
915/* adlib.c */
c0fe3827 916int Adlib_init (AudioState *s);
fb065187
FB
917
918/* gus.c */
c0fe3827 919int GUS_init (AudioState *s);
27503323
FB
920
921/* dma.c */
85571bc7 922typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 923int DMA_get_channel_mode (int nchan);
85571bc7
FB
924int DMA_read_memory (int nchan, void *buf, int pos, int size);
925int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
926void DMA_hold_DREQ (int nchan);
927void DMA_release_DREQ (int nchan);
16f62432 928void DMA_schedule(int nchan);
27503323 929void DMA_run (void);
28b9b5af 930void DMA_init (int high_page_enable);
27503323 931void DMA_register_channel (int nchan,
85571bc7
FB
932 DMA_transfer_handler transfer_handler,
933 void *opaque);
7138fcfb
FB
934/* fdc.c */
935#define MAX_FD 2
936extern BlockDriverState *fd_table[MAX_FD];
937
baca51fa
FB
938typedef struct fdctrl_t fdctrl_t;
939
940fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
941 uint32_t io_base,
942 BlockDriverState **fds);
943int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 944
80cabfad
FB
945/* ne2000.c */
946
7c9d8e07
FB
947void isa_ne2000_init(int base, int irq, NICInfo *nd);
948void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 949
a41b2ff2
PB
950/* rtl8139.c */
951
952void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
953
e3c2613f
FB
954/* pcnet.c */
955
956void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
67e999be
FB
957void pcnet_h_reset(void *opaque);
958void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
959
e3c2613f 960
80cabfad
FB
961/* pckbd.c */
962
80cabfad
FB
963void kbd_init(void);
964
965/* mc146818rtc.c */
966
8a7ddc38 967typedef struct RTCState RTCState;
80cabfad 968
8a7ddc38
FB
969RTCState *rtc_init(int base, int irq);
970void rtc_set_memory(RTCState *s, int addr, int val);
971void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
972
973/* serial.c */
974
c4b1fcc0 975typedef struct SerialState SerialState;
e5d13e2f
FB
976SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
977 int base, int irq, CharDriverState *chr);
978SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
979 target_ulong base, int it_shift,
980 int irq, CharDriverState *chr);
80cabfad 981
6508fe59
FB
982/* parallel.c */
983
984typedef struct ParallelState ParallelState;
985ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
986
80cabfad
FB
987/* i8259.c */
988
3de388f6
FB
989typedef struct PicState2 PicState2;
990extern PicState2 *isa_pic;
80cabfad 991void pic_set_irq(int irq, int level);
54fa5af5 992void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 993PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
994void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
995 void *alt_irq_opaque);
3de388f6
FB
996int pic_read_irq(PicState2 *s);
997void pic_update_irq(PicState2 *s);
998uint32_t pic_intack_read(PicState2 *s);
c20709aa 999void pic_info(void);
4a0fb71e 1000void irq_info(void);
80cabfad 1001
c27004ec 1002/* APIC */
d592d303
FB
1003typedef struct IOAPICState IOAPICState;
1004
c27004ec
FB
1005int apic_init(CPUState *env);
1006int apic_get_interrupt(CPUState *env);
d592d303
FB
1007IOAPICState *ioapic_init(void);
1008void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 1009
80cabfad
FB
1010/* i8254.c */
1011
1012#define PIT_FREQ 1193182
1013
ec844b96
FB
1014typedef struct PITState PITState;
1015
1016PITState *pit_init(int base, int irq);
1017void pit_set_gate(PITState *pit, int channel, int val);
1018int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
1019int pit_get_initial_count(PITState *pit, int channel);
1020int pit_get_mode(PITState *pit, int channel);
ec844b96 1021int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1022
fd06c375
FB
1023/* pcspk.c */
1024void pcspk_init(PITState *);
1025int pcspk_audio_init(AudioState *);
1026
6515b203
FB
1027/* acpi.c */
1028extern int acpi_enabled;
502a5395 1029void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
1030void acpi_bios_init(void);
1031
80cabfad 1032/* pc.c */
54fa5af5 1033extern QEMUMachine pc_machine;
3dbbdc25 1034extern QEMUMachine isapc_machine;
52ca8d6a 1035extern int fd_bootchk;
80cabfad 1036
6a00d601
FB
1037void ioport_set_a20(int enable);
1038int ioport_get_a20(void);
1039
26aa7d72 1040/* ppc.c */
54fa5af5
FB
1041extern QEMUMachine prep_machine;
1042extern QEMUMachine core99_machine;
1043extern QEMUMachine heathrow_machine;
1044
6af0bf9c
FB
1045/* mips_r4k.c */
1046extern QEMUMachine mips_machine;
1047
e16fe40c
TS
1048/* mips_timer.c */
1049extern void cpu_mips_clock_init(CPUState *);
1050extern void cpu_mips_irqctrl_init (void);
1051
27c7ca7e
FB
1052/* shix.c */
1053extern QEMUMachine shix_machine;
1054
8cc43fef
FB
1055#ifdef TARGET_PPC
1056ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1057#endif
64201201 1058void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1059
1060extern CPUWriteMemoryFunc *PPC_io_write[];
1061extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1062void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1063
e95c8d51 1064/* sun4m.c */
54fa5af5 1065extern QEMUMachine sun4m_machine;
ba3c64fb 1066void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1067
1068/* iommu.c */
e80cfcfc 1069void *iommu_init(uint32_t addr);
67e999be 1070void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1071 uint8_t *buf, int len, int is_write);
67e999be
FB
1072static inline void sparc_iommu_memory_read(void *opaque,
1073 target_phys_addr_t addr,
1074 uint8_t *buf, int len)
1075{
1076 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1077}
e95c8d51 1078
67e999be
FB
1079static inline void sparc_iommu_memory_write(void *opaque,
1080 target_phys_addr_t addr,
1081 uint8_t *buf, int len)
1082{
1083 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1084}
e95c8d51
FB
1085
1086/* tcx.c */
95219897 1087void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1088 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1089
1090/* slavio_intctl.c */
1091void *slavio_intctl_init();
ba3c64fb 1092void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1093void slavio_pic_info(void *opaque);
1094void slavio_irq_info(void *opaque);
1095void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1096void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1097
5fe141fd
FB
1098/* loader.c */
1099int get_image_size(const char *filename);
1100int load_image(const char *filename, uint8_t *addr);
9ee3c029 1101int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1102int load_aout(const char *filename, uint8_t *addr);
1103
1104/* slavio_timer.c */
ba3c64fb 1105void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1106
e80cfcfc
FB
1107/* slavio_serial.c */
1108SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1109void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1110
3475187d
FB
1111/* slavio_misc.c */
1112void *slavio_misc_init(uint32_t base, int irq);
1113void slavio_set_power_fail(void *opaque, int power_failing);
1114
6f7e9aec 1115/* esp.c */
fa1fb14c 1116void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
67e999be
FB
1117void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1118void esp_reset(void *opaque);
1119
1120/* sparc32_dma.c */
1121void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1122 void *intctl);
1123void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1124void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1125 uint8_t *buf, int len, int do_bswap);
1126void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1127 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1128void espdma_raise_irq(void *opaque);
1129void espdma_clear_irq(void *opaque);
1130void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1131void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1132void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1133 void *lance_opaque);
6f7e9aec 1134
b8174937
FB
1135/* cs4231.c */
1136void cs_init(target_phys_addr_t base, int irq, void *intctl);
1137
3475187d
FB
1138/* sun4u.c */
1139extern QEMUMachine sun4u_machine;
1140
64201201
FB
1141/* NVRAM helpers */
1142#include "hw/m48t59.h"
1143
1144void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1145uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1146void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1147uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1148void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1149uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1150void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1151 const unsigned char *str, uint32_t max);
1152int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1153void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1154 uint32_t start, uint32_t count);
1155int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1156 const unsigned char *arch,
1157 uint32_t RAM_size, int boot_device,
1158 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1159 const char *cmdline,
64201201 1160 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1161 uint32_t NVRAM_image,
1162 int width, int height, int depth);
64201201 1163
63066f4f
FB
1164/* adb.c */
1165
1166#define MAX_ADB_DEVICES 16
1167
e2733d20 1168#define ADB_MAX_OUT_LEN 16
63066f4f 1169
e2733d20 1170typedef struct ADBDevice ADBDevice;
63066f4f 1171
e2733d20
FB
1172/* buf = NULL means polling */
1173typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1174 const uint8_t *buf, int len);
12c28fed
FB
1175typedef int ADBDeviceReset(ADBDevice *d);
1176
63066f4f
FB
1177struct ADBDevice {
1178 struct ADBBusState *bus;
1179 int devaddr;
1180 int handler;
e2733d20 1181 ADBDeviceRequest *devreq;
12c28fed 1182 ADBDeviceReset *devreset;
63066f4f
FB
1183 void *opaque;
1184};
1185
1186typedef struct ADBBusState {
1187 ADBDevice devices[MAX_ADB_DEVICES];
1188 int nb_devices;
e2733d20 1189 int poll_index;
63066f4f
FB
1190} ADBBusState;
1191
e2733d20
FB
1192int adb_request(ADBBusState *s, uint8_t *buf_out,
1193 const uint8_t *buf, int len);
1194int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1195
1196ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1197 ADBDeviceRequest *devreq,
12c28fed 1198 ADBDeviceReset *devreset,
63066f4f
FB
1199 void *opaque);
1200void adb_kbd_init(ADBBusState *bus);
1201void adb_mouse_init(ADBBusState *bus);
1202
1203/* cuda.c */
1204
1205extern ADBBusState adb_bus;
54fa5af5 1206int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1207
bb36d470
FB
1208#include "hw/usb.h"
1209
a594cfbf
FB
1210/* usb ports of the VM */
1211
0d92ed30
PB
1212void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1213 usb_attachfn attach);
a594cfbf 1214
0d92ed30 1215#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1216
1217void do_usb_add(const char *devname);
1218void do_usb_del(const char *devname);
1219void usb_info(void);
1220
2e5d83bb 1221/* scsi-disk.c */
4d611c9a
PB
1222enum scsi_reason {
1223 SCSI_REASON_DONE, /* Command complete. */
1224 SCSI_REASON_DATA /* Transfer complete, more data required. */
1225};
1226
2e5d83bb 1227typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1228typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1229 uint32_t arg);
2e5d83bb
PB
1230
1231SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1232 int tcq,
2e5d83bb
PB
1233 scsi_completionfn completion,
1234 void *opaque);
1235void scsi_disk_destroy(SCSIDevice *s);
1236
0fc5c15a 1237int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1238/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1239 layer the completion routine may be called directly by
1240 scsi_{read,write}_data. */
a917d384
PB
1241void scsi_read_data(SCSIDevice *s, uint32_t tag);
1242int scsi_write_data(SCSIDevice *s, uint32_t tag);
1243void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1244uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1245
42550fde 1246enum scsi_host_adapters {
fa1fb14c
TS
1247 SCSI_LSI_53C895A,
1248 SCSI_ESP
42550fde
TS
1249};
1250enum scsi_devices {
1251 SCSI_CDROM,
1252 SCSI_DISK,
1253 SCSI_NONE
1254};
1255typedef enum scsi_host_adapters scsi_host_adapters;
1256typedef enum scsi_devices scsi_devices;
1257typedef struct SCSIDiskInfo {
1258 scsi_host_adapters adapter;
1259 int id;
1260 scsi_devices device_type;
1261} SCSIDiskInfo;
1262
1263#define MAX_SCSI_DISKS 7
1264extern BlockDriverState *bs_scsi_table[MAX_SCSI_DISKS];
1265extern SCSIDiskInfo scsi_disks_info[MAX_SCSI_DISKS];
1266
7d8406be
PB
1267/* lsi53c895a.c */
1268void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1269void *lsi_scsi_init(PCIBus *bus, int devfn);
42550fde 1270extern int scsi_hba_lsi; // Count of scsi disks/cdrom using this lsi adapter
7d8406be 1271
b5ff1b31 1272/* integratorcp.c */
40f137e1
PB
1273extern QEMUMachine integratorcp926_machine;
1274extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1275
cdbdb648
PB
1276/* versatilepb.c */
1277extern QEMUMachine versatilepb_machine;
16406950 1278extern QEMUMachine versatileab_machine;
cdbdb648 1279
e69954b9
PB
1280/* realview.c */
1281extern QEMUMachine realview_machine;
1282
daa57963
FB
1283/* ps2.c */
1284void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1285void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1286void ps2_write_mouse(void *, int val);
1287void ps2_write_keyboard(void *, int val);
1288uint32_t ps2_read_data(void *);
1289void ps2_queue(void *, int b);
f94f5d71 1290void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1291
80337b66
FB
1292/* smc91c111.c */
1293void smc91c111_init(NICInfo *, uint32_t, void *, int);
1294
bdd5003a 1295/* pl110.c */
95219897 1296void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1297
cdbdb648
PB
1298/* pl011.c */
1299void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1300
1301/* pl050.c */
1302void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1303
1304/* pl080.c */
e69954b9 1305void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1306
1307/* pl190.c */
1308void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1309
1310/* arm-timer.c */
1311void sp804_init(uint32_t base, void *pic, int irq);
1312void icp_pit_init(uint32_t base, void *pic, int irq);
1313
e69954b9
PB
1314/* arm_sysctl.c */
1315void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1316
1317/* arm_gic.c */
1318void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1319
16406950
PB
1320/* arm_boot.c */
1321
1322void arm_load_kernel(int ram_size, const char *kernel_filename,
1323 const char *kernel_cmdline, const char *initrd_filename,
1324 int board_id);
1325
27c7ca7e
FB
1326/* sh7750.c */
1327struct SH7750State;
1328
008a8818 1329struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1330
1331typedef struct {
1332 /* The callback will be triggered if any of the designated lines change */
1333 uint16_t portamask_trigger;
1334 uint16_t portbmask_trigger;
1335 /* Return 0 if no action was taken */
1336 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1337 uint16_t * periph_pdtra,
1338 uint16_t * periph_portdira,
1339 uint16_t * periph_pdtrb,
1340 uint16_t * periph_portdirb);
1341} sh7750_io_device;
1342
1343int sh7750_register_io_device(struct SH7750State *s,
1344 sh7750_io_device * device);
1345/* tc58128.c */
1346int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1347
29133e9a
FB
1348/* NOR flash devices */
1349typedef struct pflash_t pflash_t;
1350
1351pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1352 BlockDriverState *bs,
1353 target_ulong sector_len, int nb_blocs, int width,
1354 uint16_t id0, uint16_t id1,
1355 uint16_t id2, uint16_t id3);
1356
ea2384d3
FB
1357#endif /* defined(QEMU_TOOL) */
1358
c4b1fcc0 1359/* monitor.c */
82c643ff 1360void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1361void term_puts(const char *str);
1362void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1363void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
fef30743 1364void term_print_filename(const char *filename);
c4b1fcc0
FB
1365void term_flush(void);
1366void term_print_help(void);
ea2384d3
FB
1367void monitor_readline(const char *prompt, int is_password,
1368 char *buf, int buf_size);
1369
1370/* readline.c */
1371typedef void ReadLineFunc(void *opaque, const char *str);
1372
1373extern int completion_index;
1374void add_completion(const char *str);
1375void readline_handle_byte(int ch);
1376void readline_find_completion(const char *cmdline);
1377const char *readline_get_history(unsigned int index);
1378void readline_start(const char *prompt, int is_password,
1379 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1380
5e6ad6f9
FB
1381void kqemu_record_dump(void);
1382
fc01f7e7 1383#endif /* VL_H */