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Fix non-portable use of expr.
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
fb065187 40#include "audio/audio.h"
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41
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
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45#ifndef O_BINARY
46#define O_BINARY 0
47#endif
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48
49#ifdef _WIN32
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50#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
67b915a5 60#endif
8a7ddc38 61
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62#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
16f62432 73#include "cpu.h"
1fddef4b 74#include "gdbstub.h"
16f62432 75
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76#endif /* !defined(QEMU_TOOL) */
77
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78#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
33e3963e 85/* vl.c */
80cabfad 86uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 87
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88void hw_error(const char *fmt, ...);
89
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90extern const char *bios_dir;
91
92void pstrcpy(char *buf, int buf_size, const char *str);
93char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 94int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 95
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96extern int vm_running;
97
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98typedef struct vm_change_state_entry VMChangeStateEntry;
99typedef void VMChangeStateHandler(void *opaque, int running);
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100typedef void VMStopHandler(void *opaque, int reason);
101
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102VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
103 void *opaque);
104void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
105
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106int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
107void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
108
109void vm_start(void);
110void vm_stop(int reason);
111
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112typedef void QEMUResetHandler(void *opaque);
113
114void qemu_register_reset(QEMUResetHandler *func, void *opaque);
115void qemu_system_reset_request(void);
116void qemu_system_shutdown_request(void);
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117void qemu_system_powerdown_request(void);
118#if !defined(TARGET_SPARC)
119// Please implement a power failure function to signal the OS
120#define qemu_system_powerdown() do{}while(0)
121#else
122void qemu_system_powerdown(void);
123#endif
bb0c6722 124
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125void main_loop_wait(int timeout);
126
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127extern int ram_size;
128extern int bios_size;
ee22c2f7 129extern int rtc_utc;
1f04275e 130extern int cirrus_vga_enabled;
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131extern int graphic_width;
132extern int graphic_height;
133extern int graphic_depth;
3d11d0eb 134extern const char *keyboard_layout;
d993e026 135extern int kqemu_allowed;
a09db21f 136extern int win2k_install_hack;
bb36d470 137extern int usb_enabled;
6a00d601 138extern int smp_cpus;
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139
140/* XXX: make it dynamic */
141#if defined (TARGET_PPC)
d5295253 142#define BIOS_SIZE ((512 + 32) * 1024)
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143#elif defined(TARGET_MIPS)
144#define BIOS_SIZE (128 * 1024)
0ced6589 145#else
7587cf44 146#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 147#endif
aaaa7df6 148
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149/* keyboard/mouse support */
150
151#define MOUSE_EVENT_LBUTTON 0x01
152#define MOUSE_EVENT_RBUTTON 0x02
153#define MOUSE_EVENT_MBUTTON 0x04
154
155typedef void QEMUPutKBDEvent(void *opaque, int keycode);
156typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
157
158void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 159void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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160
161void kbd_put_keycode(int keycode);
162void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 163int kbd_mouse_is_absolute(void);
63066f4f 164
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165/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
166 constants) */
167#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
168#define QEMU_KEY_BACKSPACE 0x007f
169#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
170#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
171#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
172#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
173#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
174#define QEMU_KEY_END QEMU_KEY_ESC1(4)
175#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
176#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
177#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
178
179#define QEMU_KEY_CTRL_UP 0xe400
180#define QEMU_KEY_CTRL_DOWN 0xe401
181#define QEMU_KEY_CTRL_LEFT 0xe402
182#define QEMU_KEY_CTRL_RIGHT 0xe403
183#define QEMU_KEY_CTRL_HOME 0xe404
184#define QEMU_KEY_CTRL_END 0xe405
185#define QEMU_KEY_CTRL_PAGEUP 0xe406
186#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
187
188void kbd_put_keysym(int keysym);
189
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190/* async I/O support */
191
192typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
193typedef int IOCanRWHandler(void *opaque);
7c9d8e07 194typedef void IOHandler(void *opaque);
c20709aa 195
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196int qemu_set_fd_handler2(int fd,
197 IOCanRWHandler *fd_read_poll,
198 IOHandler *fd_read,
199 IOHandler *fd_write,
200 void *opaque);
201int qemu_set_fd_handler(int fd,
202 IOHandler *fd_read,
203 IOHandler *fd_write,
204 void *opaque);
c20709aa 205
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206/* Polling handling */
207
208/* return TRUE if no sleep should be done afterwards */
209typedef int PollingFunc(void *opaque);
210
211int qemu_add_polling_cb(PollingFunc *func, void *opaque);
212void qemu_del_polling_cb(PollingFunc *func, void *opaque);
213
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214/* character device */
215
216#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 217#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 218
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219
220
221#define CHR_IOCTL_SERIAL_SET_PARAMS 1
222typedef struct {
223 int speed;
224 int parity;
225 int data_bits;
226 int stop_bits;
227} QEMUSerialSetParams;
228
229#define CHR_IOCTL_SERIAL_SET_BREAK 2
230
231#define CHR_IOCTL_PP_READ_DATA 3
232#define CHR_IOCTL_PP_WRITE_DATA 4
233#define CHR_IOCTL_PP_READ_CONTROL 5
234#define CHR_IOCTL_PP_WRITE_CONTROL 6
235#define CHR_IOCTL_PP_READ_STATUS 7
236
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237typedef void IOEventHandler(void *opaque, int event);
238
239typedef struct CharDriverState {
240 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
241 void (*chr_add_read_handler)(struct CharDriverState *s,
242 IOCanRWHandler *fd_can_read,
243 IOReadHandler *fd_read, void *opaque);
2122c51a 244 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 245 IOEventHandler *chr_event;
eb45f5fe 246 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 247 void (*chr_close)(struct CharDriverState *chr);
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248 void *opaque;
249} CharDriverState;
250
251void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
252int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 253void qemu_chr_send_event(CharDriverState *s, int event);
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254void qemu_chr_add_read_handler(CharDriverState *s,
255 IOCanRWHandler *fd_can_read,
256 IOReadHandler *fd_read, void *opaque);
257void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 258int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 259
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260/* consoles */
261
262typedef struct DisplayState DisplayState;
263typedef struct TextConsole TextConsole;
264
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265typedef void (*vga_hw_update_ptr)(void *);
266typedef void (*vga_hw_invalidate_ptr)(void *);
267typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
268
269TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
270 vga_hw_invalidate_ptr invalidate,
271 vga_hw_screen_dump_ptr screen_dump,
272 void *opaque);
273void vga_hw_update(void);
274void vga_hw_invalidate(void);
275void vga_hw_screen_dump(const char *filename);
276
277int is_graphic_console(void);
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278CharDriverState *text_console_init(DisplayState *ds);
279void console_select(unsigned int index);
280
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281/* serial ports */
282
283#define MAX_SERIAL_PORTS 4
284
285extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
286
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287/* parallel ports */
288
289#define MAX_PARALLEL_PORTS 3
290
291extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
292
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293/* VLANs support */
294
295typedef struct VLANClientState VLANClientState;
296
297struct VLANClientState {
298 IOReadHandler *fd_read;
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299 /* Packets may still be sent if this returns zero. It's used to
300 rate-limit the slirp code. */
301 IOCanRWHandler *fd_can_read;
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302 void *opaque;
303 struct VLANClientState *next;
304 struct VLANState *vlan;
305 char info_str[256];
306};
307
308typedef struct VLANState {
309 int id;
310 VLANClientState *first_client;
311 struct VLANState *next;
312} VLANState;
313
314VLANState *qemu_find_vlan(int id);
315VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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316 IOReadHandler *fd_read,
317 IOCanRWHandler *fd_can_read,
318 void *opaque);
319int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 320void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 321void qemu_handler_true(void *opaque);
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322
323void do_info_network(void);
324
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325/* TAP win32 */
326int tap_win32_init(VLANState *vlan, const char *ifname);
327void tap_win32_poll(void);
328
7c9d8e07 329/* NIC info */
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330
331#define MAX_NICS 8
332
7c9d8e07 333typedef struct NICInfo {
c4b1fcc0 334 uint8_t macaddr[6];
a41b2ff2 335 const char *model;
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336 VLANState *vlan;
337} NICInfo;
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338
339extern int nb_nics;
7c9d8e07 340extern NICInfo nd_table[MAX_NICS];
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341
342/* timers */
343
344typedef struct QEMUClock QEMUClock;
345typedef struct QEMUTimer QEMUTimer;
346typedef void QEMUTimerCB(void *opaque);
347
348/* The real time clock should be used only for stuff which does not
349 change the virtual machine state, as it is run even if the virtual
69b91039 350 machine is stopped. The real time clock has a frequency of 1000
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351 Hz. */
352extern QEMUClock *rt_clock;
353
e80cfcfc 354/* The virtual clock is only run during the emulation. It is stopped
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355 when the virtual machine is stopped. Virtual timers use a high
356 precision clock, usually cpu cycles (use ticks_per_sec). */
357extern QEMUClock *vm_clock;
358
359int64_t qemu_get_clock(QEMUClock *clock);
360
361QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
362void qemu_free_timer(QEMUTimer *ts);
363void qemu_del_timer(QEMUTimer *ts);
364void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
365int qemu_timer_pending(QEMUTimer *ts);
366
367extern int64_t ticks_per_sec;
368extern int pit_min_timer_count;
369
370void cpu_enable_ticks(void);
371void cpu_disable_ticks(void);
372
373/* VM Load/Save */
374
375typedef FILE QEMUFile;
376
377void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
378void qemu_put_byte(QEMUFile *f, int v);
379void qemu_put_be16(QEMUFile *f, unsigned int v);
380void qemu_put_be32(QEMUFile *f, unsigned int v);
381void qemu_put_be64(QEMUFile *f, uint64_t v);
382int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
383int qemu_get_byte(QEMUFile *f);
384unsigned int qemu_get_be16(QEMUFile *f);
385unsigned int qemu_get_be32(QEMUFile *f);
386uint64_t qemu_get_be64(QEMUFile *f);
387
388static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
389{
390 qemu_put_be64(f, *pv);
391}
392
393static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
394{
395 qemu_put_be32(f, *pv);
396}
397
398static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
399{
400 qemu_put_be16(f, *pv);
401}
402
403static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
404{
405 qemu_put_byte(f, *pv);
406}
407
408static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
409{
410 *pv = qemu_get_be64(f);
411}
412
413static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
414{
415 *pv = qemu_get_be32(f);
416}
417
418static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
419{
420 *pv = qemu_get_be16(f);
421}
422
423static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
424{
425 *pv = qemu_get_byte(f);
426}
427
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428#if TARGET_LONG_BITS == 64
429#define qemu_put_betl qemu_put_be64
430#define qemu_get_betl qemu_get_be64
431#define qemu_put_betls qemu_put_be64s
432#define qemu_get_betls qemu_get_be64s
433#else
434#define qemu_put_betl qemu_put_be32
435#define qemu_get_betl qemu_get_be32
436#define qemu_put_betls qemu_put_be32s
437#define qemu_get_betls qemu_get_be32s
438#endif
439
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440int64_t qemu_ftell(QEMUFile *f);
441int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
442
443typedef void SaveStateHandler(QEMUFile *f, void *opaque);
444typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
445
446int qemu_loadvm(const char *filename);
447int qemu_savevm(const char *filename);
448int register_savevm(const char *idstr,
449 int instance_id,
450 int version_id,
451 SaveStateHandler *save_state,
452 LoadStateHandler *load_state,
453 void *opaque);
454void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
455void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 456
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457void cpu_save(QEMUFile *f, void *opaque);
458int cpu_load(QEMUFile *f, void *opaque, int version_id);
459
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460/* block.c */
461typedef struct BlockDriverState BlockDriverState;
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462typedef struct BlockDriver BlockDriver;
463
464extern BlockDriver bdrv_raw;
465extern BlockDriver bdrv_cow;
466extern BlockDriver bdrv_qcow;
467extern BlockDriver bdrv_vmdk;
3c56521b 468extern BlockDriver bdrv_cloop;
585d0ed9 469extern BlockDriver bdrv_dmg;
a8753c34 470extern BlockDriver bdrv_bochs;
6a0f9e82 471extern BlockDriver bdrv_vpc;
de167e41 472extern BlockDriver bdrv_vvfat;
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473
474void bdrv_init(void);
475BlockDriver *bdrv_find_format(const char *format_name);
476int bdrv_create(BlockDriver *drv,
477 const char *filename, int64_t size_in_sectors,
478 const char *backing_file, int flags);
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479BlockDriverState *bdrv_new(const char *device_name);
480void bdrv_delete(BlockDriverState *bs);
481int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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482int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
483 BlockDriver *drv);
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484void bdrv_close(BlockDriverState *bs);
485int bdrv_read(BlockDriverState *bs, int64_t sector_num,
486 uint8_t *buf, int nb_sectors);
487int bdrv_write(BlockDriverState *bs, int64_t sector_num,
488 const uint8_t *buf, int nb_sectors);
489void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 490int bdrv_commit(BlockDriverState *bs);
77fef8c1 491void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 492
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493#define BDRV_TYPE_HD 0
494#define BDRV_TYPE_CDROM 1
495#define BDRV_TYPE_FLOPPY 2
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496#define BIOS_ATA_TRANSLATION_AUTO 0
497#define BIOS_ATA_TRANSLATION_NONE 1
498#define BIOS_ATA_TRANSLATION_LBA 2
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499
500void bdrv_set_geometry_hint(BlockDriverState *bs,
501 int cyls, int heads, int secs);
502void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 503void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
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504void bdrv_get_geometry_hint(BlockDriverState *bs,
505 int *pcyls, int *pheads, int *psecs);
506int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 507int bdrv_get_translation_hint(BlockDriverState *bs);
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508int bdrv_is_removable(BlockDriverState *bs);
509int bdrv_is_read_only(BlockDriverState *bs);
510int bdrv_is_inserted(BlockDriverState *bs);
511int bdrv_is_locked(BlockDriverState *bs);
512void bdrv_set_locked(BlockDriverState *bs, int locked);
513void bdrv_set_change_cb(BlockDriverState *bs,
514 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 515void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
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516void bdrv_info(void);
517BlockDriverState *bdrv_find(const char *name);
82c643ff 518void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
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519int bdrv_is_encrypted(BlockDriverState *bs);
520int bdrv_set_key(BlockDriverState *bs, const char *key);
521void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
522 void *opaque);
523const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 524
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525int qcow_get_cluster_size(BlockDriverState *bs);
526int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
527 const uint8_t *buf);
528
529#ifndef QEMU_TOOL
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530
531typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
532 int boot_device,
533 DisplayState *ds, const char **fd_filename, int snapshot,
534 const char *kernel_filename, const char *kernel_cmdline,
535 const char *initrd_filename);
536
537typedef struct QEMUMachine {
538 const char *name;
539 const char *desc;
540 QEMUMachineInitFunc *init;
541 struct QEMUMachine *next;
542} QEMUMachine;
543
544int qemu_register_machine(QEMUMachine *m);
545
546typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 547typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 548
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549/* ISA bus */
550
551extern target_phys_addr_t isa_mem_base;
552
553typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
554typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
555
556int register_ioport_read(int start, int length, int size,
557 IOPortReadFunc *func, void *opaque);
558int register_ioport_write(int start, int length, int size,
559 IOPortWriteFunc *func, void *opaque);
69b91039
FB
560void isa_unassign_ioport(int start, int length);
561
562/* PCI bus */
563
69b91039
FB
564extern target_phys_addr_t pci_mem_base;
565
46e50e9d 566typedef struct PCIBus PCIBus;
69b91039
FB
567typedef struct PCIDevice PCIDevice;
568
569typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
570 uint32_t address, uint32_t data, int len);
571typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
572 uint32_t address, int len);
573typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
574 uint32_t addr, uint32_t size, int type);
575
576#define PCI_ADDRESS_SPACE_MEM 0x00
577#define PCI_ADDRESS_SPACE_IO 0x01
578#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
579
580typedef struct PCIIORegion {
5768f5ac 581 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
582 uint32_t size;
583 uint8_t type;
584 PCIMapIORegionFunc *map_func;
585} PCIIORegion;
586
8a8696a3
FB
587#define PCI_ROM_SLOT 6
588#define PCI_NUM_REGIONS 7
69b91039
FB
589struct PCIDevice {
590 /* PCI config space */
591 uint8_t config[256];
592
593 /* the following fields are read only */
46e50e9d 594 PCIBus *bus;
69b91039
FB
595 int devfn;
596 char name[64];
8a8696a3 597 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
598
599 /* do not access the following fields */
600 PCIConfigReadFunc *config_read;
601 PCIConfigWriteFunc *config_write;
5768f5ac 602 int irq_index;
69b91039
FB
603};
604
46e50e9d
FB
605PCIDevice *pci_register_device(PCIBus *bus, const char *name,
606 int instance_size, int devfn,
69b91039
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607 PCIConfigReadFunc *config_read,
608 PCIConfigWriteFunc *config_write);
609
610void pci_register_io_region(PCIDevice *pci_dev, int region_num,
611 uint32_t size, int type,
612 PCIMapIORegionFunc *map_func);
613
5768f5ac
FB
614void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
615
616uint32_t pci_default_read_config(PCIDevice *d,
617 uint32_t address, int len);
618void pci_default_write_config(PCIDevice *d,
619 uint32_t address, uint32_t val, int len);
30ca2aab
FB
620void generic_pci_save(QEMUFile* f, void *opaque);
621int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 622
9995c51f
FB
623extern struct PIIX3State *piix3_state;
624
46e50e9d
FB
625PCIBus *i440fx_init(void);
626void piix3_init(PCIBus *bus);
69b91039 627void pci_bios_init(void);
5768f5ac 628void pci_info(void);
26aa7d72 629
77d4bc34 630/* temporary: will be moved in platform specific file */
54fa5af5 631void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
46e50e9d 632PCIBus *pci_prep_init(void);
54fa5af5 633PCIBus *pci_grackle_init(uint32_t base);
46e50e9d 634PCIBus *pci_pmac_init(void);
83469015 635PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
77d4bc34 636
a41b2ff2
PB
637void pci_nic_init(PCIBus *bus, NICInfo *nd);
638
28b9b5af
FB
639/* openpic.c */
640typedef struct openpic_t openpic_t;
54fa5af5 641void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
642openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
643 CPUState **envp);
28b9b5af 644
54fa5af5
FB
645/* heathrow_pic.c */
646typedef struct HeathrowPICS HeathrowPICS;
647void heathrow_pic_set_irq(void *opaque, int num, int level);
648HeathrowPICS *heathrow_pic_init(int *pmem_index);
649
6a36d84e
FB
650#ifdef HAS_AUDIO
651struct soundhw {
652 const char *name;
653 const char *descr;
654 int enabled;
655 int isa;
656 union {
657 int (*init_isa) (AudioState *s);
658 int (*init_pci) (PCIBus *bus, AudioState *s);
659 } init;
660};
661
662extern struct soundhw soundhw[];
663#endif
664
313aa567
FB
665/* vga.c */
666
4fa0f5d2 667#define VGA_RAM_SIZE (4096 * 1024)
313aa567 668
82c643ff 669struct DisplayState {
313aa567
FB
670 uint8_t *data;
671 int linesize;
672 int depth;
82c643ff
FB
673 int width;
674 int height;
313aa567
FB
675 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
676 void (*dpy_resize)(struct DisplayState *s, int w, int h);
677 void (*dpy_refresh)(struct DisplayState *s);
82c643ff 678};
313aa567
FB
679
680static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
681{
682 s->dpy_update(s, x, y, w, h);
683}
684
685static inline void dpy_resize(DisplayState *s, int w, int h)
686{
687 s->dpy_resize(s, w, h);
688}
689
46e50e9d 690int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d5295253
FB
691 unsigned long vga_ram_offset, int vga_ram_size,
692 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 693
d6bfa22f 694/* cirrus_vga.c */
46e50e9d 695void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 696 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
697void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
698 unsigned long vga_ram_offset, int vga_ram_size);
699
313aa567 700/* sdl.c */
d63d307f 701void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 702
da4dbf74
FB
703/* cocoa.m */
704void cocoa_display_init(DisplayState *ds, int full_screen);
705
5391d806
FB
706/* ide.c */
707#define MAX_DISKS 4
708
709extern BlockDriverState *bs_table[MAX_DISKS];
710
69b91039
FB
711void isa_ide_init(int iobase, int iobase2, int irq,
712 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
713void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
714 int secondary_ide_enabled);
46e50e9d 715void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
28b9b5af 716int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 717 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 718
1d14ffa9 719/* es1370.c */
c0fe3827 720int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 721
fb065187 722/* sb16.c */
c0fe3827 723int SB16_init (AudioState *s);
fb065187
FB
724
725/* adlib.c */
c0fe3827 726int Adlib_init (AudioState *s);
fb065187
FB
727
728/* gus.c */
c0fe3827 729int GUS_init (AudioState *s);
27503323
FB
730
731/* dma.c */
85571bc7 732typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 733int DMA_get_channel_mode (int nchan);
85571bc7
FB
734int DMA_read_memory (int nchan, void *buf, int pos, int size);
735int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
736void DMA_hold_DREQ (int nchan);
737void DMA_release_DREQ (int nchan);
16f62432 738void DMA_schedule(int nchan);
27503323 739void DMA_run (void);
28b9b5af 740void DMA_init (int high_page_enable);
27503323 741void DMA_register_channel (int nchan,
85571bc7
FB
742 DMA_transfer_handler transfer_handler,
743 void *opaque);
7138fcfb
FB
744/* fdc.c */
745#define MAX_FD 2
746extern BlockDriverState *fd_table[MAX_FD];
747
baca51fa
FB
748typedef struct fdctrl_t fdctrl_t;
749
750fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
751 uint32_t io_base,
752 BlockDriverState **fds);
753int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 754
80cabfad
FB
755/* ne2000.c */
756
7c9d8e07
FB
757void isa_ne2000_init(int base, int irq, NICInfo *nd);
758void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 759
a41b2ff2
PB
760/* rtl8139.c */
761
762void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
763
80cabfad
FB
764/* pckbd.c */
765
80cabfad
FB
766void kbd_init(void);
767
768/* mc146818rtc.c */
769
8a7ddc38 770typedef struct RTCState RTCState;
80cabfad 771
8a7ddc38
FB
772RTCState *rtc_init(int base, int irq);
773void rtc_set_memory(RTCState *s, int addr, int val);
774void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
775
776/* serial.c */
777
c4b1fcc0 778typedef struct SerialState SerialState;
e5d13e2f
FB
779SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
780 int base, int irq, CharDriverState *chr);
781SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
782 target_ulong base, int it_shift,
783 int irq, CharDriverState *chr);
80cabfad 784
6508fe59
FB
785/* parallel.c */
786
787typedef struct ParallelState ParallelState;
788ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
789
80cabfad
FB
790/* i8259.c */
791
3de388f6
FB
792typedef struct PicState2 PicState2;
793extern PicState2 *isa_pic;
80cabfad 794void pic_set_irq(int irq, int level);
54fa5af5 795void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 796PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
797void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
798 void *alt_irq_opaque);
3de388f6
FB
799int pic_read_irq(PicState2 *s);
800void pic_update_irq(PicState2 *s);
801uint32_t pic_intack_read(PicState2 *s);
c20709aa 802void pic_info(void);
4a0fb71e 803void irq_info(void);
80cabfad 804
c27004ec 805/* APIC */
d592d303
FB
806typedef struct IOAPICState IOAPICState;
807
c27004ec
FB
808int apic_init(CPUState *env);
809int apic_get_interrupt(CPUState *env);
d592d303
FB
810IOAPICState *ioapic_init(void);
811void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 812
80cabfad
FB
813/* i8254.c */
814
815#define PIT_FREQ 1193182
816
ec844b96
FB
817typedef struct PITState PITState;
818
819PITState *pit_init(int base, int irq);
820void pit_set_gate(PITState *pit, int channel, int val);
821int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
822int pit_get_initial_count(PITState *pit, int channel);
823int pit_get_mode(PITState *pit, int channel);
ec844b96 824int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 825
fd06c375
FB
826/* pcspk.c */
827void pcspk_init(PITState *);
828int pcspk_audio_init(AudioState *);
829
80cabfad 830/* pc.c */
54fa5af5 831extern QEMUMachine pc_machine;
3dbbdc25 832extern QEMUMachine isapc_machine;
80cabfad 833
6a00d601
FB
834void ioport_set_a20(int enable);
835int ioport_get_a20(void);
836
26aa7d72 837/* ppc.c */
54fa5af5
FB
838extern QEMUMachine prep_machine;
839extern QEMUMachine core99_machine;
840extern QEMUMachine heathrow_machine;
841
6af0bf9c
FB
842/* mips_r4k.c */
843extern QEMUMachine mips_machine;
844
27c7ca7e
FB
845/* shix.c */
846extern QEMUMachine shix_machine;
847
8cc43fef
FB
848#ifdef TARGET_PPC
849ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
850#endif
64201201 851void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
852
853extern CPUWriteMemoryFunc *PPC_io_write[];
854extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 855void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 856
e95c8d51 857/* sun4m.c */
54fa5af5 858extern QEMUMachine sun4m_machine;
e80cfcfc 859uint32_t iommu_translate(uint32_t addr);
ba3c64fb 860void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
861
862/* iommu.c */
e80cfcfc
FB
863void *iommu_init(uint32_t addr);
864uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
FB
865
866/* lance.c */
7c9d8e07 867void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
FB
868
869/* tcx.c */
95219897 870void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 871 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
872
873/* slavio_intctl.c */
874void *slavio_intctl_init();
ba3c64fb 875void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
876void slavio_pic_info(void *opaque);
877void slavio_irq_info(void *opaque);
878void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 879void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 880
5fe141fd
FB
881/* loader.c */
882int get_image_size(const char *filename);
883int load_image(const char *filename, uint8_t *addr);
9ee3c029 884int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
885int load_aout(const char *filename, uint8_t *addr);
886
887/* slavio_timer.c */
ba3c64fb 888void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 889
e80cfcfc
FB
890/* slavio_serial.c */
891SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
892void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 893
3475187d
FB
894/* slavio_misc.c */
895void *slavio_misc_init(uint32_t base, int irq);
896void slavio_set_power_fail(void *opaque, int power_failing);
897
6f7e9aec
FB
898/* esp.c */
899void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
900
3475187d
FB
901/* sun4u.c */
902extern QEMUMachine sun4u_machine;
903
64201201
FB
904/* NVRAM helpers */
905#include "hw/m48t59.h"
906
907void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
908uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
909void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
910uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
911void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
912uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
913void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
914 const unsigned char *str, uint32_t max);
915int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
916void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
917 uint32_t start, uint32_t count);
918int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
919 const unsigned char *arch,
920 uint32_t RAM_size, int boot_device,
921 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 922 const char *cmdline,
64201201 923 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
924 uint32_t NVRAM_image,
925 int width, int height, int depth);
64201201 926
63066f4f
FB
927/* adb.c */
928
929#define MAX_ADB_DEVICES 16
930
e2733d20 931#define ADB_MAX_OUT_LEN 16
63066f4f 932
e2733d20 933typedef struct ADBDevice ADBDevice;
63066f4f 934
e2733d20
FB
935/* buf = NULL means polling */
936typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
937 const uint8_t *buf, int len);
12c28fed
FB
938typedef int ADBDeviceReset(ADBDevice *d);
939
63066f4f
FB
940struct ADBDevice {
941 struct ADBBusState *bus;
942 int devaddr;
943 int handler;
e2733d20 944 ADBDeviceRequest *devreq;
12c28fed 945 ADBDeviceReset *devreset;
63066f4f
FB
946 void *opaque;
947};
948
949typedef struct ADBBusState {
950 ADBDevice devices[MAX_ADB_DEVICES];
951 int nb_devices;
e2733d20 952 int poll_index;
63066f4f
FB
953} ADBBusState;
954
e2733d20
FB
955int adb_request(ADBBusState *s, uint8_t *buf_out,
956 const uint8_t *buf, int len);
957int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
958
959ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 960 ADBDeviceRequest *devreq,
12c28fed 961 ADBDeviceReset *devreset,
63066f4f
FB
962 void *opaque);
963void adb_kbd_init(ADBBusState *bus);
964void adb_mouse_init(ADBBusState *bus);
965
966/* cuda.c */
967
968extern ADBBusState adb_bus;
54fa5af5 969int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 970
bb36d470
FB
971#include "hw/usb.h"
972
a594cfbf
FB
973/* usb ports of the VM */
974
975#define MAX_VM_USB_PORTS 8
976
977extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS];
978extern USBDevice *vm_usb_hub;
979
980void do_usb_add(const char *devname);
981void do_usb_del(const char *devname);
982void usb_info(void);
983
b5ff1b31 984/* integratorcp.c */
40f137e1
PB
985extern QEMUMachine integratorcp926_machine;
986extern QEMUMachine integratorcp1026_machine;
b5ff1b31 987
cdbdb648
PB
988/* versatilepb.c */
989extern QEMUMachine versatilepb_machine;
16406950 990extern QEMUMachine versatileab_machine;
cdbdb648 991
daa57963
FB
992/* ps2.c */
993void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
994void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
995void ps2_write_mouse(void *, int val);
996void ps2_write_keyboard(void *, int val);
997uint32_t ps2_read_data(void *);
998void ps2_queue(void *, int b);
f94f5d71 999void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1000
80337b66
FB
1001/* smc91c111.c */
1002void smc91c111_init(NICInfo *, uint32_t, void *, int);
1003
bdd5003a 1004/* pl110.c */
95219897 1005void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1006
cdbdb648
PB
1007/* pl011.c */
1008void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1009
1010/* pl050.c */
1011void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1012
1013/* pl080.c */
1014void *pl080_init(uint32_t base, void *pic, int irq);
1015
1016/* pl190.c */
1017void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1018
1019/* arm-timer.c */
1020void sp804_init(uint32_t base, void *pic, int irq);
1021void icp_pit_init(uint32_t base, void *pic, int irq);
1022
16406950
PB
1023/* arm_boot.c */
1024
1025void arm_load_kernel(int ram_size, const char *kernel_filename,
1026 const char *kernel_cmdline, const char *initrd_filename,
1027 int board_id);
1028
27c7ca7e
FB
1029/* sh7750.c */
1030struct SH7750State;
1031
008a8818 1032struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1033
1034typedef struct {
1035 /* The callback will be triggered if any of the designated lines change */
1036 uint16_t portamask_trigger;
1037 uint16_t portbmask_trigger;
1038 /* Return 0 if no action was taken */
1039 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1040 uint16_t * periph_pdtra,
1041 uint16_t * periph_portdira,
1042 uint16_t * periph_pdtrb,
1043 uint16_t * periph_portdirb);
1044} sh7750_io_device;
1045
1046int sh7750_register_io_device(struct SH7750State *s,
1047 sh7750_io_device * device);
1048/* tc58128.c */
1049int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1050
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1051#endif /* defined(QEMU_TOOL) */
1052
c4b1fcc0 1053/* monitor.c */
82c643ff 1054void monitor_init(CharDriverState *hd, int show_banner);
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1055void term_puts(const char *str);
1056void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1057void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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1058void term_flush(void);
1059void term_print_help(void);
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1060void monitor_readline(const char *prompt, int is_password,
1061 char *buf, int buf_size);
1062
1063/* readline.c */
1064typedef void ReadLineFunc(void *opaque, const char *str);
1065
1066extern int completion_index;
1067void add_completion(const char *str);
1068void readline_handle_byte(int ch);
1069void readline_find_completion(const char *cmdline);
1070const char *readline_get_history(unsigned int index);
1071void readline_start(const char *prompt, int is_password,
1072 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1073
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1074void kqemu_record_dump(void);
1075
fc01f7e7 1076#endif /* VL_H */