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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
8a7ddc38 33#include <time.h>
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34#include <ctype.h>
35#include <errno.h>
36#include <unistd.h>
37#include <fcntl.h>
7d3505c5 38#include <sys/stat.h>
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39
40#ifndef O_LARGEFILE
41#define O_LARGEFILE 0
42#endif
40c3bac3
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43#ifndef O_BINARY
44#define O_BINARY 0
45#endif
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46
47#ifdef _WIN32
bfbc9133 48#define lseek64 _lseeki64
67b915a5 49#endif
8a7ddc38 50
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51#include "cpu.h"
52
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53#ifndef glue
54#define xglue(x, y) x ## y
55#define glue(x, y) xglue(x, y)
56#define stringify(s) tostring(s)
57#define tostring(s) #s
58#endif
59
60#if defined(WORDS_BIGENDIAN)
61static inline uint32_t be32_to_cpu(uint32_t v)
62{
63 return v;
64}
65
66static inline uint16_t be16_to_cpu(uint16_t v)
67{
68 return v;
69}
70
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71static inline uint32_t cpu_to_be32(uint32_t v)
72{
73 return v;
74}
75
76static inline uint16_t cpu_to_be16(uint16_t v)
77{
78 return v;
79}
80
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81static inline uint32_t le32_to_cpu(uint32_t v)
82{
83 return bswap32(v);
84}
85
86static inline uint16_t le16_to_cpu(uint16_t v)
87{
88 return bswap16(v);
89}
90
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91static inline uint32_t cpu_to_le32(uint32_t v)
92{
93 return bswap32(v);
94}
95
96static inline uint16_t cpu_to_le16(uint16_t v)
97{
98 return bswap16(v);
99}
100
67b915a5 101#else
165c6fc8 102
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103static inline uint32_t be32_to_cpu(uint32_t v)
104{
105 return bswap32(v);
106}
107
108static inline uint16_t be16_to_cpu(uint16_t v)
109{
110 return bswap16(v);
111}
112
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113static inline uint32_t cpu_to_be32(uint32_t v)
114{
115 return bswap32(v);
116}
117
118static inline uint16_t cpu_to_be16(uint16_t v)
119{
120 return bswap16(v);
121}
122
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123static inline uint32_t le32_to_cpu(uint32_t v)
124{
125 return v;
126}
127
128static inline uint16_t le16_to_cpu(uint16_t v)
129{
130 return v;
131}
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132
133static inline uint32_t cpu_to_le32(uint32_t v)
134{
135 return v;
136}
137
138static inline uint16_t cpu_to_le16(uint16_t v)
139{
140 return v;
141}
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142#endif
143
144
33e3963e 145/* vl.c */
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146extern int reset_requested;
147
80cabfad 148uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 149
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150void hw_error(const char *fmt, ...);
151
152int load_image(const char *filename, uint8_t *addr);
153extern const char *bios_dir;
154
155void pstrcpy(char *buf, int buf_size, const char *str);
156char *pstrcat(char *buf, int buf_size, const char *s);
33e3963e 157
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158int serial_open_device(void);
159
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160extern int vm_running;
161
162typedef void VMStopHandler(void *opaque, int reason);
163
164int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
165void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
166
167void vm_start(void);
168void vm_stop(int reason);
169
aaaa7df6 170extern int audio_enabled;
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171extern int ram_size;
172extern int bios_size;
ee22c2f7 173extern int rtc_utc;
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174
175/* XXX: make it dynamic */
176#if defined (TARGET_PPC)
177#define BIOS_SIZE (512 * 1024)
178#else
179#define BIOS_SIZE 0
180#endif
aaaa7df6 181
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182/* async I/O support */
183
184typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
185typedef int IOCanRWHandler(void *opaque);
186
187int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read,
188 IOReadHandler *fd_read, void *opaque);
189void qemu_del_fd_read_handler(int fd);
190
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191/* network redirectors support */
192
193#define MAX_NICS 8
194
195typedef struct NetDriverState {
c20709aa 196 int index; /* index number in QEMU */
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197 uint8_t macaddr[6];
198 char ifname[16];
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199 void (*send_packet)(struct NetDriverState *nd,
200 const uint8_t *buf, int size);
201 void (*add_read_packet)(struct NetDriverState *nd,
202 IOCanRWHandler *fd_can_read,
203 IOReadHandler *fd_read, void *opaque);
204 /* tun specific data */
205 int fd;
206 /* slirp specific data */
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207} NetDriverState;
208
209extern int nb_nics;
210extern NetDriverState nd_table[MAX_NICS];
211
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212void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
213void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read,
214 IOReadHandler *fd_read, void *opaque);
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215
216/* timers */
217
218typedef struct QEMUClock QEMUClock;
219typedef struct QEMUTimer QEMUTimer;
220typedef void QEMUTimerCB(void *opaque);
221
222/* The real time clock should be used only for stuff which does not
223 change the virtual machine state, as it is run even if the virtual
69b91039 224 machine is stopped. The real time clock has a frequency of 1000
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225 Hz. */
226extern QEMUClock *rt_clock;
227
228/* Rge virtual clock is only run during the emulation. It is stopped
229 when the virtual machine is stopped. Virtual timers use a high
230 precision clock, usually cpu cycles (use ticks_per_sec). */
231extern QEMUClock *vm_clock;
232
233int64_t qemu_get_clock(QEMUClock *clock);
234
235QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
236void qemu_free_timer(QEMUTimer *ts);
237void qemu_del_timer(QEMUTimer *ts);
238void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
239int qemu_timer_pending(QEMUTimer *ts);
240
241extern int64_t ticks_per_sec;
242extern int pit_min_timer_count;
243
244void cpu_enable_ticks(void);
245void cpu_disable_ticks(void);
246
247/* VM Load/Save */
248
249typedef FILE QEMUFile;
250
251void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
252void qemu_put_byte(QEMUFile *f, int v);
253void qemu_put_be16(QEMUFile *f, unsigned int v);
254void qemu_put_be32(QEMUFile *f, unsigned int v);
255void qemu_put_be64(QEMUFile *f, uint64_t v);
256int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
257int qemu_get_byte(QEMUFile *f);
258unsigned int qemu_get_be16(QEMUFile *f);
259unsigned int qemu_get_be32(QEMUFile *f);
260uint64_t qemu_get_be64(QEMUFile *f);
261
262static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
263{
264 qemu_put_be64(f, *pv);
265}
266
267static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
268{
269 qemu_put_be32(f, *pv);
270}
271
272static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
273{
274 qemu_put_be16(f, *pv);
275}
276
277static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
278{
279 qemu_put_byte(f, *pv);
280}
281
282static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
283{
284 *pv = qemu_get_be64(f);
285}
286
287static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
288{
289 *pv = qemu_get_be32(f);
290}
291
292static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
293{
294 *pv = qemu_get_be16(f);
295}
296
297static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
298{
299 *pv = qemu_get_byte(f);
300}
301
302int64_t qemu_ftell(QEMUFile *f);
303int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
304
305typedef void SaveStateHandler(QEMUFile *f, void *opaque);
306typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
307
308int qemu_loadvm(const char *filename);
309int qemu_savevm(const char *filename);
310int register_savevm(const char *idstr,
311 int instance_id,
312 int version_id,
313 SaveStateHandler *save_state,
314 LoadStateHandler *load_state,
315 void *opaque);
316void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
317void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 318
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319/* block.c */
320typedef struct BlockDriverState BlockDriverState;
321
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322BlockDriverState *bdrv_new(const char *device_name);
323void bdrv_delete(BlockDriverState *bs);
324int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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325void bdrv_close(BlockDriverState *bs);
326int bdrv_read(BlockDriverState *bs, int64_t sector_num,
327 uint8_t *buf, int nb_sectors);
328int bdrv_write(BlockDriverState *bs, int64_t sector_num,
329 const uint8_t *buf, int nb_sectors);
330void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 331int bdrv_commit(BlockDriverState *bs);
77fef8c1 332void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 333
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334#define BDRV_TYPE_HD 0
335#define BDRV_TYPE_CDROM 1
336#define BDRV_TYPE_FLOPPY 2
337
338void bdrv_set_geometry_hint(BlockDriverState *bs,
339 int cyls, int heads, int secs);
340void bdrv_set_type_hint(BlockDriverState *bs, int type);
341void bdrv_get_geometry_hint(BlockDriverState *bs,
342 int *pcyls, int *pheads, int *psecs);
343int bdrv_get_type_hint(BlockDriverState *bs);
344int bdrv_is_removable(BlockDriverState *bs);
345int bdrv_is_read_only(BlockDriverState *bs);
346int bdrv_is_inserted(BlockDriverState *bs);
347int bdrv_is_locked(BlockDriverState *bs);
348void bdrv_set_locked(BlockDriverState *bs, int locked);
349void bdrv_set_change_cb(BlockDriverState *bs,
350 void (*change_cb)(void *opaque), void *opaque);
351
352void bdrv_info(void);
353BlockDriverState *bdrv_find(const char *name);
354
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355/* ISA bus */
356
357extern target_phys_addr_t isa_mem_base;
358
359typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
360typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
361
362int register_ioport_read(int start, int length, int size,
363 IOPortReadFunc *func, void *opaque);
364int register_ioport_write(int start, int length, int size,
365 IOPortWriteFunc *func, void *opaque);
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366void isa_unassign_ioport(int start, int length);
367
368/* PCI bus */
369
370extern int pci_enabled;
371
372extern target_phys_addr_t pci_mem_base;
373
374typedef struct PCIDevice PCIDevice;
375
376typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
377 uint32_t address, uint32_t data, int len);
378typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
379 uint32_t address, int len);
380typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
381 uint32_t addr, uint32_t size, int type);
382
383#define PCI_ADDRESS_SPACE_MEM 0x00
384#define PCI_ADDRESS_SPACE_IO 0x01
385#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
386
387typedef struct PCIIORegion {
5768f5ac 388 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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389 uint32_t size;
390 uint8_t type;
391 PCIMapIORegionFunc *map_func;
392} PCIIORegion;
393
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394#define PCI_ROM_SLOT 6
395#define PCI_NUM_REGIONS 7
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396struct PCIDevice {
397 /* PCI config space */
398 uint8_t config[256];
399
400 /* the following fields are read only */
401 int bus_num;
402 int devfn;
403 char name[64];
8a8696a3 404 PCIIORegion io_regions[PCI_NUM_REGIONS];
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405
406 /* do not access the following fields */
407 PCIConfigReadFunc *config_read;
408 PCIConfigWriteFunc *config_write;
5768f5ac 409 int irq_index;
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410};
411
412PCIDevice *pci_register_device(const char *name, int instance_size,
413 int bus_num, int devfn,
414 PCIConfigReadFunc *config_read,
415 PCIConfigWriteFunc *config_write);
416
417void pci_register_io_region(PCIDevice *pci_dev, int region_num,
418 uint32_t size, int type,
419 PCIMapIORegionFunc *map_func);
420
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421void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
422
423uint32_t pci_default_read_config(PCIDevice *d,
424 uint32_t address, int len);
425void pci_default_write_config(PCIDevice *d,
426 uint32_t address, uint32_t val, int len);
427
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428extern struct PIIX3State *piix3_state;
429
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430void i440fx_init(void);
431void piix3_init(void);
432void pci_bios_init(void);
5768f5ac 433void pci_info(void);
26aa7d72 434
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435/* temporary: will be moved in platform specific file */
436void pci_prep_init(void);
437void pci_pmac_init(void);
438void pci_ppc_bios_init(void);
439
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440/* vga.c */
441
4fa0f5d2 442#define VGA_RAM_SIZE (4096 * 1024)
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443
444typedef struct DisplayState {
445 uint8_t *data;
446 int linesize;
447 int depth;
448 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
449 void (*dpy_resize)(struct DisplayState *s, int w, int h);
450 void (*dpy_refresh)(struct DisplayState *s);
451} DisplayState;
452
453static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
454{
455 s->dpy_update(s, x, y, w, h);
456}
457
458static inline void dpy_resize(DisplayState *s, int w, int h)
459{
460 s->dpy_resize(s, w, h);
461}
462
7138fcfb 463int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
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464 unsigned long vga_ram_offset, int vga_ram_size,
465 int is_pci);
313aa567 466void vga_update_display(void);
59a983b9 467void vga_screen_dump(const char *filename);
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468
469/* sdl.c */
470void sdl_display_init(DisplayState *ds);
471
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472/* ide.c */
473#define MAX_DISKS 4
474
475extern BlockDriverState *bs_table[MAX_DISKS];
476
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477void isa_ide_init(int iobase, int iobase2, int irq,
478 BlockDriverState *hd0, BlockDriverState *hd1);
479void pci_ide_init(BlockDriverState **hd_table);
9995c51f 480void pci_piix3_ide_init(BlockDriverState **hd_table);
5391d806 481
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482/* oss.c */
483typedef enum {
484 AUD_FMT_U8,
485 AUD_FMT_S8,
486 AUD_FMT_U16,
487 AUD_FMT_S16
488} audfmt_e;
489
490void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt);
491void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt);
492int AUD_write (void *in_buf, int size);
493void AUD_run (void);
494void AUD_adjust_estimate (int _leftover);
495int AUD_get_free (void);
496int AUD_get_live (void);
497int AUD_get_buffer_size (void);
498void AUD_init (void);
499
500/* dma.c */
16f62432 501typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size);
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502int DMA_get_channel_mode (int nchan);
503void DMA_hold_DREQ (int nchan);
504void DMA_release_DREQ (int nchan);
16f62432 505void DMA_schedule(int nchan);
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506void DMA_run (void);
507void DMA_init (void);
508void DMA_register_channel (int nchan,
16f62432 509 DMA_transfer_handler transfer_handler, void *opaque);
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510
511/* sb16.c */
512void SB16_run (void);
513void SB16_init (void);
514
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515/* fdc.c */
516#define MAX_FD 2
517extern BlockDriverState *fd_table[MAX_FD];
518
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519typedef struct fdctrl_t fdctrl_t;
520
521fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
522 uint32_t io_base,
523 BlockDriverState **fds);
524int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 525
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526/* ne2000.c */
527
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528void isa_ne2000_init(int base, int irq, NetDriverState *nd);
529void pci_ne2000_init(NetDriverState *nd);
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530
531/* pckbd.c */
532
533void kbd_put_keycode(int keycode);
534
535#define MOUSE_EVENT_LBUTTON 0x01
536#define MOUSE_EVENT_RBUTTON 0x02
537#define MOUSE_EVENT_MBUTTON 0x04
538void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
539
540void kbd_init(void);
541
542/* mc146818rtc.c */
543
8a7ddc38 544typedef struct RTCState RTCState;
80cabfad 545
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546RTCState *rtc_init(int base, int irq);
547void rtc_set_memory(RTCState *s, int addr, int val);
548void rtc_set_date(RTCState *s, const struct tm *tm);
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549
550/* serial.c */
551
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552typedef struct SerialState SerialState;
553
554extern SerialState *serial_console;
555
556SerialState *serial_init(int base, int irq, int fd);
557int serial_can_receive(SerialState *s);
558void serial_receive_byte(SerialState *s, int ch);
559void serial_receive_break(SerialState *s);
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560
561/* i8259.c */
562
563void pic_set_irq(int irq, int level);
564void pic_init(void);
c5df018e 565uint32_t pic_intack_read(CPUState *env);
c20709aa 566void pic_info(void);
4a0fb71e 567void irq_info(void);
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568
569/* i8254.c */
570
571#define PIT_FREQ 1193182
572
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573typedef struct PITState PITState;
574
575PITState *pit_init(int base, int irq);
576void pit_set_gate(PITState *pit, int channel, int val);
577int pit_get_gate(PITState *pit, int channel);
578int pit_get_out(PITState *pit, int channel, int64_t current_time);
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579
580/* pc.c */
581void pc_init(int ram_size, int vga_ram_size, int boot_device,
582 DisplayState *ds, const char **fd_filename, int snapshot,
583 const char *kernel_filename, const char *kernel_cmdline,
584 const char *initrd_filename);
585
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586/* ppc.c */
587void ppc_init (int ram_size, int vga_ram_size, int boot_device,
588 DisplayState *ds, const char **fd_filename, int snapshot,
589 const char *kernel_filename, const char *kernel_cmdline,
590 const char *initrd_filename);
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591void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
592 DisplayState *ds, const char **fd_filename, int snapshot,
593 const char *kernel_filename, const char *kernel_cmdline,
594 const char *initrd_filename);
595void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device,
596 DisplayState *ds, const char **fd_filename, int snapshot,
597 const char *kernel_filename, const char *kernel_cmdline,
598 const char *initrd_filename);
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599#ifdef TARGET_PPC
600ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
601#endif
64201201 602void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
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603
604extern CPUWriteMemoryFunc *PPC_io_write[];
605extern CPUReadMemoryFunc *PPC_io_read[];
606extern int prep_enabled;
26aa7d72 607
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608/* NVRAM helpers */
609#include "hw/m48t59.h"
610
611void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
612uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
613void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
614uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
615void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
616uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
617void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
618 const unsigned char *str, uint32_t max);
619int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
620void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
621 uint32_t start, uint32_t count);
622int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
623 const unsigned char *arch,
624 uint32_t RAM_size, int boot_device,
625 uint32_t kernel_image, uint32_t kernel_size,
626 uint32_t cmdline, uint32_t cmdline_size,
627 uint32_t initrd_image, uint32_t initrd_size,
628 uint32_t NVRAM_image);
629
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630/* monitor.c */
631void monitor_init(void);
40c3bac3 632void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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633void term_flush(void);
634void term_print_help(void);
635
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636/* gdbstub.c */
637
638#define DEFAULT_GDBSTUB_PORT 1234
639
640int gdbserver_start(int port);
641
fc01f7e7 642#endif /* VL_H */