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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
8a7ddc38 | 33 | #include <time.h> |
67b915a5 FB |
34 | #include <ctype.h> |
35 | #include <errno.h> | |
36 | #include <unistd.h> | |
37 | #include <fcntl.h> | |
7d3505c5 | 38 | #include <sys/stat.h> |
67b915a5 FB |
39 | |
40 | #ifndef O_LARGEFILE | |
41 | #define O_LARGEFILE 0 | |
42 | #endif | |
40c3bac3 FB |
43 | #ifndef O_BINARY |
44 | #define O_BINARY 0 | |
45 | #endif | |
67b915a5 FB |
46 | |
47 | #ifdef _WIN32 | |
bfbc9133 | 48 | #define lseek64 _lseeki64 |
67b915a5 | 49 | #endif |
8a7ddc38 | 50 | |
16f62432 FB |
51 | #include "cpu.h" |
52 | ||
67b915a5 FB |
53 | #ifndef glue |
54 | #define xglue(x, y) x ## y | |
55 | #define glue(x, y) xglue(x, y) | |
56 | #define stringify(s) tostring(s) | |
57 | #define tostring(s) #s | |
58 | #endif | |
59 | ||
60 | #if defined(WORDS_BIGENDIAN) | |
61 | static inline uint32_t be32_to_cpu(uint32_t v) | |
62 | { | |
63 | return v; | |
64 | } | |
65 | ||
66 | static inline uint16_t be16_to_cpu(uint16_t v) | |
67 | { | |
68 | return v; | |
69 | } | |
70 | ||
165c6fc8 FB |
71 | static inline uint32_t cpu_to_be32(uint32_t v) |
72 | { | |
73 | return v; | |
74 | } | |
75 | ||
76 | static inline uint16_t cpu_to_be16(uint16_t v) | |
77 | { | |
78 | return v; | |
79 | } | |
80 | ||
67b915a5 FB |
81 | static inline uint32_t le32_to_cpu(uint32_t v) |
82 | { | |
83 | return bswap32(v); | |
84 | } | |
85 | ||
86 | static inline uint16_t le16_to_cpu(uint16_t v) | |
87 | { | |
88 | return bswap16(v); | |
89 | } | |
90 | ||
165c6fc8 FB |
91 | static inline uint32_t cpu_to_le32(uint32_t v) |
92 | { | |
93 | return bswap32(v); | |
94 | } | |
95 | ||
96 | static inline uint16_t cpu_to_le16(uint16_t v) | |
97 | { | |
98 | return bswap16(v); | |
99 | } | |
100 | ||
67b915a5 | 101 | #else |
165c6fc8 | 102 | |
67b915a5 FB |
103 | static inline uint32_t be32_to_cpu(uint32_t v) |
104 | { | |
105 | return bswap32(v); | |
106 | } | |
107 | ||
108 | static inline uint16_t be16_to_cpu(uint16_t v) | |
109 | { | |
110 | return bswap16(v); | |
111 | } | |
112 | ||
165c6fc8 FB |
113 | static inline uint32_t cpu_to_be32(uint32_t v) |
114 | { | |
115 | return bswap32(v); | |
116 | } | |
117 | ||
118 | static inline uint16_t cpu_to_be16(uint16_t v) | |
119 | { | |
120 | return bswap16(v); | |
121 | } | |
122 | ||
67b915a5 FB |
123 | static inline uint32_t le32_to_cpu(uint32_t v) |
124 | { | |
125 | return v; | |
126 | } | |
127 | ||
128 | static inline uint16_t le16_to_cpu(uint16_t v) | |
129 | { | |
130 | return v; | |
131 | } | |
165c6fc8 FB |
132 | |
133 | static inline uint32_t cpu_to_le32(uint32_t v) | |
134 | { | |
135 | return v; | |
136 | } | |
137 | ||
138 | static inline uint16_t cpu_to_le16(uint16_t v) | |
139 | { | |
140 | return v; | |
141 | } | |
67b915a5 FB |
142 | #endif |
143 | ||
144 | ||
33e3963e | 145 | /* vl.c */ |
313aa567 FB |
146 | extern int reset_requested; |
147 | ||
80cabfad | 148 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 149 | |
80cabfad FB |
150 | void hw_error(const char *fmt, ...); |
151 | ||
152 | int load_image(const char *filename, uint8_t *addr); | |
153 | extern const char *bios_dir; | |
154 | ||
155 | void pstrcpy(char *buf, int buf_size, const char *str); | |
156 | char *pstrcat(char *buf, int buf_size, const char *s); | |
33e3963e | 157 | |
c4b1fcc0 FB |
158 | int serial_open_device(void); |
159 | ||
8a7ddc38 FB |
160 | extern int vm_running; |
161 | ||
162 | typedef void VMStopHandler(void *opaque, int reason); | |
163 | ||
164 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
165 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
166 | ||
167 | void vm_start(void); | |
168 | void vm_stop(int reason); | |
169 | ||
aaaa7df6 | 170 | extern int audio_enabled; |
0ced6589 FB |
171 | extern int ram_size; |
172 | extern int bios_size; | |
ee22c2f7 | 173 | extern int rtc_utc; |
0ced6589 FB |
174 | |
175 | /* XXX: make it dynamic */ | |
176 | #if defined (TARGET_PPC) | |
177 | #define BIOS_SIZE (512 * 1024) | |
178 | #else | |
179 | #define BIOS_SIZE 0 | |
180 | #endif | |
aaaa7df6 | 181 | |
c20709aa FB |
182 | /* async I/O support */ |
183 | ||
184 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
185 | typedef int IOCanRWHandler(void *opaque); | |
186 | ||
187 | int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, | |
188 | IOReadHandler *fd_read, void *opaque); | |
189 | void qemu_del_fd_read_handler(int fd); | |
190 | ||
c4b1fcc0 FB |
191 | /* network redirectors support */ |
192 | ||
193 | #define MAX_NICS 8 | |
194 | ||
195 | typedef struct NetDriverState { | |
c20709aa | 196 | int index; /* index number in QEMU */ |
c4b1fcc0 FB |
197 | uint8_t macaddr[6]; |
198 | char ifname[16]; | |
c20709aa FB |
199 | void (*send_packet)(struct NetDriverState *nd, |
200 | const uint8_t *buf, int size); | |
201 | void (*add_read_packet)(struct NetDriverState *nd, | |
202 | IOCanRWHandler *fd_can_read, | |
203 | IOReadHandler *fd_read, void *opaque); | |
204 | /* tun specific data */ | |
205 | int fd; | |
206 | /* slirp specific data */ | |
c4b1fcc0 FB |
207 | } NetDriverState; |
208 | ||
209 | extern int nb_nics; | |
210 | extern NetDriverState nd_table[MAX_NICS]; | |
211 | ||
c20709aa FB |
212 | void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size); |
213 | void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read, | |
214 | IOReadHandler *fd_read, void *opaque); | |
8a7ddc38 FB |
215 | |
216 | /* timers */ | |
217 | ||
218 | typedef struct QEMUClock QEMUClock; | |
219 | typedef struct QEMUTimer QEMUTimer; | |
220 | typedef void QEMUTimerCB(void *opaque); | |
221 | ||
222 | /* The real time clock should be used only for stuff which does not | |
223 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 224 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
225 | Hz. */ |
226 | extern QEMUClock *rt_clock; | |
227 | ||
228 | /* Rge virtual clock is only run during the emulation. It is stopped | |
229 | when the virtual machine is stopped. Virtual timers use a high | |
230 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
231 | extern QEMUClock *vm_clock; | |
232 | ||
233 | int64_t qemu_get_clock(QEMUClock *clock); | |
234 | ||
235 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
236 | void qemu_free_timer(QEMUTimer *ts); | |
237 | void qemu_del_timer(QEMUTimer *ts); | |
238 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
239 | int qemu_timer_pending(QEMUTimer *ts); | |
240 | ||
241 | extern int64_t ticks_per_sec; | |
242 | extern int pit_min_timer_count; | |
243 | ||
244 | void cpu_enable_ticks(void); | |
245 | void cpu_disable_ticks(void); | |
246 | ||
247 | /* VM Load/Save */ | |
248 | ||
249 | typedef FILE QEMUFile; | |
250 | ||
251 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
252 | void qemu_put_byte(QEMUFile *f, int v); | |
253 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
254 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
255 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
256 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
257 | int qemu_get_byte(QEMUFile *f); | |
258 | unsigned int qemu_get_be16(QEMUFile *f); | |
259 | unsigned int qemu_get_be32(QEMUFile *f); | |
260 | uint64_t qemu_get_be64(QEMUFile *f); | |
261 | ||
262 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
263 | { | |
264 | qemu_put_be64(f, *pv); | |
265 | } | |
266 | ||
267 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
268 | { | |
269 | qemu_put_be32(f, *pv); | |
270 | } | |
271 | ||
272 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
273 | { | |
274 | qemu_put_be16(f, *pv); | |
275 | } | |
276 | ||
277 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
278 | { | |
279 | qemu_put_byte(f, *pv); | |
280 | } | |
281 | ||
282 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
283 | { | |
284 | *pv = qemu_get_be64(f); | |
285 | } | |
286 | ||
287 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
288 | { | |
289 | *pv = qemu_get_be32(f); | |
290 | } | |
291 | ||
292 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
293 | { | |
294 | *pv = qemu_get_be16(f); | |
295 | } | |
296 | ||
297 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
298 | { | |
299 | *pv = qemu_get_byte(f); | |
300 | } | |
301 | ||
302 | int64_t qemu_ftell(QEMUFile *f); | |
303 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
304 | ||
305 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
306 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
307 | ||
308 | int qemu_loadvm(const char *filename); | |
309 | int qemu_savevm(const char *filename); | |
310 | int register_savevm(const char *idstr, | |
311 | int instance_id, | |
312 | int version_id, | |
313 | SaveStateHandler *save_state, | |
314 | LoadStateHandler *load_state, | |
315 | void *opaque); | |
316 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
317 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 318 | |
fc01f7e7 FB |
319 | /* block.c */ |
320 | typedef struct BlockDriverState BlockDriverState; | |
321 | ||
c4b1fcc0 FB |
322 | BlockDriverState *bdrv_new(const char *device_name); |
323 | void bdrv_delete(BlockDriverState *bs); | |
324 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
fc01f7e7 FB |
325 | void bdrv_close(BlockDriverState *bs); |
326 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
327 | uint8_t *buf, int nb_sectors); | |
328 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
329 | const uint8_t *buf, int nb_sectors); | |
330 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 331 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 332 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
33e3963e | 333 | |
c4b1fcc0 FB |
334 | #define BDRV_TYPE_HD 0 |
335 | #define BDRV_TYPE_CDROM 1 | |
336 | #define BDRV_TYPE_FLOPPY 2 | |
337 | ||
338 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
339 | int cyls, int heads, int secs); | |
340 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
341 | void bdrv_get_geometry_hint(BlockDriverState *bs, | |
342 | int *pcyls, int *pheads, int *psecs); | |
343 | int bdrv_get_type_hint(BlockDriverState *bs); | |
344 | int bdrv_is_removable(BlockDriverState *bs); | |
345 | int bdrv_is_read_only(BlockDriverState *bs); | |
346 | int bdrv_is_inserted(BlockDriverState *bs); | |
347 | int bdrv_is_locked(BlockDriverState *bs); | |
348 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
349 | void bdrv_set_change_cb(BlockDriverState *bs, | |
350 | void (*change_cb)(void *opaque), void *opaque); | |
351 | ||
352 | void bdrv_info(void); | |
353 | BlockDriverState *bdrv_find(const char *name); | |
354 | ||
26aa7d72 FB |
355 | /* ISA bus */ |
356 | ||
357 | extern target_phys_addr_t isa_mem_base; | |
358 | ||
359 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
360 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
361 | ||
362 | int register_ioport_read(int start, int length, int size, | |
363 | IOPortReadFunc *func, void *opaque); | |
364 | int register_ioport_write(int start, int length, int size, | |
365 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
366 | void isa_unassign_ioport(int start, int length); |
367 | ||
368 | /* PCI bus */ | |
369 | ||
370 | extern int pci_enabled; | |
371 | ||
372 | extern target_phys_addr_t pci_mem_base; | |
373 | ||
374 | typedef struct PCIDevice PCIDevice; | |
375 | ||
376 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
377 | uint32_t address, uint32_t data, int len); | |
378 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
379 | uint32_t address, int len); | |
380 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
381 | uint32_t addr, uint32_t size, int type); | |
382 | ||
383 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
384 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
385 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
386 | ||
387 | typedef struct PCIIORegion { | |
5768f5ac | 388 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
389 | uint32_t size; |
390 | uint8_t type; | |
391 | PCIMapIORegionFunc *map_func; | |
392 | } PCIIORegion; | |
393 | ||
8a8696a3 FB |
394 | #define PCI_ROM_SLOT 6 |
395 | #define PCI_NUM_REGIONS 7 | |
69b91039 FB |
396 | struct PCIDevice { |
397 | /* PCI config space */ | |
398 | uint8_t config[256]; | |
399 | ||
400 | /* the following fields are read only */ | |
401 | int bus_num; | |
402 | int devfn; | |
403 | char name[64]; | |
8a8696a3 | 404 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
405 | |
406 | /* do not access the following fields */ | |
407 | PCIConfigReadFunc *config_read; | |
408 | PCIConfigWriteFunc *config_write; | |
5768f5ac | 409 | int irq_index; |
69b91039 FB |
410 | }; |
411 | ||
412 | PCIDevice *pci_register_device(const char *name, int instance_size, | |
413 | int bus_num, int devfn, | |
414 | PCIConfigReadFunc *config_read, | |
415 | PCIConfigWriteFunc *config_write); | |
416 | ||
417 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
418 | uint32_t size, int type, | |
419 | PCIMapIORegionFunc *map_func); | |
420 | ||
5768f5ac FB |
421 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
422 | ||
423 | uint32_t pci_default_read_config(PCIDevice *d, | |
424 | uint32_t address, int len); | |
425 | void pci_default_write_config(PCIDevice *d, | |
426 | uint32_t address, uint32_t val, int len); | |
427 | ||
9995c51f FB |
428 | extern struct PIIX3State *piix3_state; |
429 | ||
69b91039 FB |
430 | void i440fx_init(void); |
431 | void piix3_init(void); | |
432 | void pci_bios_init(void); | |
5768f5ac | 433 | void pci_info(void); |
26aa7d72 | 434 | |
77d4bc34 FB |
435 | /* temporary: will be moved in platform specific file */ |
436 | void pci_prep_init(void); | |
437 | void pci_pmac_init(void); | |
438 | void pci_ppc_bios_init(void); | |
439 | ||
313aa567 FB |
440 | /* vga.c */ |
441 | ||
4fa0f5d2 | 442 | #define VGA_RAM_SIZE (4096 * 1024) |
313aa567 FB |
443 | |
444 | typedef struct DisplayState { | |
445 | uint8_t *data; | |
446 | int linesize; | |
447 | int depth; | |
448 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); | |
449 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
450 | void (*dpy_refresh)(struct DisplayState *s); | |
451 | } DisplayState; | |
452 | ||
453 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
454 | { | |
455 | s->dpy_update(s, x, y, w, h); | |
456 | } | |
457 | ||
458 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
459 | { | |
460 | s->dpy_resize(s, w, h); | |
461 | } | |
462 | ||
7138fcfb | 463 | int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base, |
5768f5ac FB |
464 | unsigned long vga_ram_offset, int vga_ram_size, |
465 | int is_pci); | |
313aa567 | 466 | void vga_update_display(void); |
59a983b9 | 467 | void vga_screen_dump(const char *filename); |
313aa567 FB |
468 | |
469 | /* sdl.c */ | |
470 | void sdl_display_init(DisplayState *ds); | |
471 | ||
5391d806 FB |
472 | /* ide.c */ |
473 | #define MAX_DISKS 4 | |
474 | ||
475 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
476 | ||
69b91039 FB |
477 | void isa_ide_init(int iobase, int iobase2, int irq, |
478 | BlockDriverState *hd0, BlockDriverState *hd1); | |
479 | void pci_ide_init(BlockDriverState **hd_table); | |
9995c51f | 480 | void pci_piix3_ide_init(BlockDriverState **hd_table); |
5391d806 | 481 | |
27503323 FB |
482 | /* oss.c */ |
483 | typedef enum { | |
484 | AUD_FMT_U8, | |
485 | AUD_FMT_S8, | |
486 | AUD_FMT_U16, | |
487 | AUD_FMT_S16 | |
488 | } audfmt_e; | |
489 | ||
490 | void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt); | |
491 | void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt); | |
492 | int AUD_write (void *in_buf, int size); | |
493 | void AUD_run (void); | |
494 | void AUD_adjust_estimate (int _leftover); | |
495 | int AUD_get_free (void); | |
496 | int AUD_get_live (void); | |
497 | int AUD_get_buffer_size (void); | |
498 | void AUD_init (void); | |
499 | ||
500 | /* dma.c */ | |
16f62432 | 501 | typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size); |
27503323 FB |
502 | int DMA_get_channel_mode (int nchan); |
503 | void DMA_hold_DREQ (int nchan); | |
504 | void DMA_release_DREQ (int nchan); | |
16f62432 | 505 | void DMA_schedule(int nchan); |
27503323 FB |
506 | void DMA_run (void); |
507 | void DMA_init (void); | |
508 | void DMA_register_channel (int nchan, | |
16f62432 | 509 | DMA_transfer_handler transfer_handler, void *opaque); |
27503323 FB |
510 | |
511 | /* sb16.c */ | |
512 | void SB16_run (void); | |
513 | void SB16_init (void); | |
514 | ||
7138fcfb FB |
515 | /* fdc.c */ |
516 | #define MAX_FD 2 | |
517 | extern BlockDriverState *fd_table[MAX_FD]; | |
518 | ||
baca51fa FB |
519 | typedef struct fdctrl_t fdctrl_t; |
520 | ||
521 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
522 | uint32_t io_base, | |
523 | BlockDriverState **fds); | |
524 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 525 | |
80cabfad FB |
526 | /* ne2000.c */ |
527 | ||
69b91039 FB |
528 | void isa_ne2000_init(int base, int irq, NetDriverState *nd); |
529 | void pci_ne2000_init(NetDriverState *nd); | |
80cabfad FB |
530 | |
531 | /* pckbd.c */ | |
532 | ||
533 | void kbd_put_keycode(int keycode); | |
534 | ||
535 | #define MOUSE_EVENT_LBUTTON 0x01 | |
536 | #define MOUSE_EVENT_RBUTTON 0x02 | |
537 | #define MOUSE_EVENT_MBUTTON 0x04 | |
538 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
539 | ||
540 | void kbd_init(void); | |
541 | ||
542 | /* mc146818rtc.c */ | |
543 | ||
8a7ddc38 | 544 | typedef struct RTCState RTCState; |
80cabfad | 545 | |
8a7ddc38 FB |
546 | RTCState *rtc_init(int base, int irq); |
547 | void rtc_set_memory(RTCState *s, int addr, int val); | |
548 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
549 | |
550 | /* serial.c */ | |
551 | ||
c4b1fcc0 FB |
552 | typedef struct SerialState SerialState; |
553 | ||
554 | extern SerialState *serial_console; | |
555 | ||
556 | SerialState *serial_init(int base, int irq, int fd); | |
557 | int serial_can_receive(SerialState *s); | |
558 | void serial_receive_byte(SerialState *s, int ch); | |
559 | void serial_receive_break(SerialState *s); | |
80cabfad FB |
560 | |
561 | /* i8259.c */ | |
562 | ||
563 | void pic_set_irq(int irq, int level); | |
564 | void pic_init(void); | |
c5df018e | 565 | uint32_t pic_intack_read(CPUState *env); |
c20709aa | 566 | void pic_info(void); |
4a0fb71e | 567 | void irq_info(void); |
80cabfad FB |
568 | |
569 | /* i8254.c */ | |
570 | ||
571 | #define PIT_FREQ 1193182 | |
572 | ||
ec844b96 FB |
573 | typedef struct PITState PITState; |
574 | ||
575 | PITState *pit_init(int base, int irq); | |
576 | void pit_set_gate(PITState *pit, int channel, int val); | |
577 | int pit_get_gate(PITState *pit, int channel); | |
578 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
80cabfad FB |
579 | |
580 | /* pc.c */ | |
581 | void pc_init(int ram_size, int vga_ram_size, int boot_device, | |
582 | DisplayState *ds, const char **fd_filename, int snapshot, | |
583 | const char *kernel_filename, const char *kernel_cmdline, | |
584 | const char *initrd_filename); | |
585 | ||
26aa7d72 FB |
586 | /* ppc.c */ |
587 | void ppc_init (int ram_size, int vga_ram_size, int boot_device, | |
588 | DisplayState *ds, const char **fd_filename, int snapshot, | |
589 | const char *kernel_filename, const char *kernel_cmdline, | |
590 | const char *initrd_filename); | |
77d4bc34 FB |
591 | void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, |
592 | DisplayState *ds, const char **fd_filename, int snapshot, | |
593 | const char *kernel_filename, const char *kernel_cmdline, | |
594 | const char *initrd_filename); | |
595 | void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, | |
596 | DisplayState *ds, const char **fd_filename, int snapshot, | |
597 | const char *kernel_filename, const char *kernel_cmdline, | |
598 | const char *initrd_filename); | |
8cc43fef FB |
599 | #ifdef TARGET_PPC |
600 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
601 | #endif | |
64201201 | 602 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
603 | |
604 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
605 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
606 | extern int prep_enabled; | |
26aa7d72 | 607 | |
64201201 FB |
608 | /* NVRAM helpers */ |
609 | #include "hw/m48t59.h" | |
610 | ||
611 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
612 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
613 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
614 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
615 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
616 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
617 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
618 | const unsigned char *str, uint32_t max); | |
619 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
620 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
621 | uint32_t start, uint32_t count); | |
622 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
623 | const unsigned char *arch, | |
624 | uint32_t RAM_size, int boot_device, | |
625 | uint32_t kernel_image, uint32_t kernel_size, | |
626 | uint32_t cmdline, uint32_t cmdline_size, | |
627 | uint32_t initrd_image, uint32_t initrd_size, | |
628 | uint32_t NVRAM_image); | |
629 | ||
c4b1fcc0 FB |
630 | /* monitor.c */ |
631 | void monitor_init(void); | |
40c3bac3 | 632 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
633 | void term_flush(void); |
634 | void term_print_help(void); | |
635 | ||
8a7ddc38 FB |
636 | /* gdbstub.c */ |
637 | ||
638 | #define DEFAULT_GDBSTUB_PORT 1234 | |
639 | ||
640 | int gdbserver_start(int port); | |
641 | ||
fc01f7e7 | 642 | #endif /* VL_H */ |