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SCSI fixes, by Wang Cheng Yeh.
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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
40c3bac3
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5 47
71c2fd5c
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48#ifndef ENOMEDIUM
49#define ENOMEDIUM ENODEV
50#endif
2e9671da 51
67b915a5 52#ifdef _WIN32
a18e524a 53#include <windows.h>
ac62f715 54#define fsync _commit
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55#define lseek _lseeki64
56#define ENOTSUP 4096
beac80cd
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57extern int qemu_ftruncate64(int, int64_t);
58#define ftruncate qemu_ftruncate64
59
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60
61static inline char *realpath(const char *path, char *resolved_path)
62{
63 _fullpath(resolved_path, path, _MAX_PATH);
64 return resolved_path;
65}
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66
67#define PRId64 "I64d"
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68#define PRIx64 "I64x"
69#define PRIu64 "I64u"
70#define PRIo64 "I64o"
67b915a5 71#endif
8a7ddc38 72
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73#ifdef QEMU_TOOL
74
75/* we use QEMU_TOOL in the command line tools which do not depend on
76 the target CPU type */
77#include "config-host.h"
78#include <setjmp.h>
79#include "osdep.h"
80#include "bswap.h"
81
82#else
83
4f209290 84#include "audio/audio.h"
16f62432
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85#include "cpu.h"
86
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87#endif /* !defined(QEMU_TOOL) */
88
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89#ifndef glue
90#define xglue(x, y) x ## y
91#define glue(x, y) xglue(x, y)
92#define stringify(s) tostring(s)
93#define tostring(s) #s
94#endif
95
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96#ifndef MIN
97#define MIN(a, b) (((a) < (b)) ? (a) : (b))
98#endif
99#ifndef MAX
100#define MAX(a, b) (((a) > (b)) ? (a) : (b))
101#endif
102
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103/* cutils.c */
104void pstrcpy(char *buf, int buf_size, const char *str);
105char *pstrcat(char *buf, int buf_size, const char *s);
106int strstart(const char *str, const char *val, const char **ptr);
107int stristart(const char *str, const char *val, const char **ptr);
108
33e3963e 109/* vl.c */
80cabfad 110uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 111
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112void hw_error(const char *fmt, ...);
113
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114extern const char *bios_dir;
115
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116extern int vm_running;
117
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118typedef struct vm_change_state_entry VMChangeStateEntry;
119typedef void VMChangeStateHandler(void *opaque, int running);
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120typedef void VMStopHandler(void *opaque, int reason);
121
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122VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
123 void *opaque);
124void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
125
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126int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
127void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
128
129void vm_start(void);
130void vm_stop(int reason);
131
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132typedef void QEMUResetHandler(void *opaque);
133
134void qemu_register_reset(QEMUResetHandler *func, void *opaque);
135void qemu_system_reset_request(void);
136void qemu_system_shutdown_request(void);
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137void qemu_system_powerdown_request(void);
138#if !defined(TARGET_SPARC)
139// Please implement a power failure function to signal the OS
140#define qemu_system_powerdown() do{}while(0)
141#else
142void qemu_system_powerdown(void);
143#endif
bb0c6722 144
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145void main_loop_wait(int timeout);
146
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147extern int ram_size;
148extern int bios_size;
ee22c2f7 149extern int rtc_utc;
1f04275e 150extern int cirrus_vga_enabled;
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151extern int graphic_width;
152extern int graphic_height;
153extern int graphic_depth;
3d11d0eb 154extern const char *keyboard_layout;
d993e026 155extern int kqemu_allowed;
a09db21f 156extern int win2k_install_hack;
bb36d470 157extern int usb_enabled;
6a00d601 158extern int smp_cpus;
667accab 159extern int no_quit;
8e71621f 160extern int semihosting_enabled;
3c07f8e8 161extern int autostart;
47d5d01a 162extern const char *bootp_filename;
0ced6589 163
9ae02555
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164#define MAX_OPTION_ROMS 16
165extern const char *option_rom[MAX_OPTION_ROMS];
166extern int nb_option_roms;
167
0ced6589 168/* XXX: make it dynamic */
970ac5a3 169#define MAX_BIOS_SIZE (4 * 1024 * 1024)
75956cf0 170#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 171#define BIOS_SIZE ((512 + 32) * 1024)
6af0bf9c 172#elif defined(TARGET_MIPS)
567daa49 173#define BIOS_SIZE (4 * 1024 * 1024)
0ced6589 174#endif
aaaa7df6 175
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176/* keyboard/mouse support */
177
178#define MOUSE_EVENT_LBUTTON 0x01
179#define MOUSE_EVENT_RBUTTON 0x02
180#define MOUSE_EVENT_MBUTTON 0x04
181
182typedef void QEMUPutKBDEvent(void *opaque, int keycode);
183typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
184
455204eb
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185typedef struct QEMUPutMouseEntry {
186 QEMUPutMouseEvent *qemu_put_mouse_event;
187 void *qemu_put_mouse_event_opaque;
188 int qemu_put_mouse_event_absolute;
189 char *qemu_put_mouse_event_name;
190
191 /* used internally by qemu for handling mice */
192 struct QEMUPutMouseEntry *next;
193} QEMUPutMouseEntry;
194
63066f4f 195void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
455204eb
TS
196QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func,
197 void *opaque, int absolute,
198 const char *name);
199void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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200
201void kbd_put_keycode(int keycode);
202void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 203int kbd_mouse_is_absolute(void);
63066f4f 204
455204eb
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205void do_info_mice(void);
206void do_mouse_set(int index);
207
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208/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
209 constants) */
210#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
211#define QEMU_KEY_BACKSPACE 0x007f
212#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
213#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
214#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
215#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
216#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
217#define QEMU_KEY_END QEMU_KEY_ESC1(4)
218#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
219#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
220#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
221
222#define QEMU_KEY_CTRL_UP 0xe400
223#define QEMU_KEY_CTRL_DOWN 0xe401
224#define QEMU_KEY_CTRL_LEFT 0xe402
225#define QEMU_KEY_CTRL_RIGHT 0xe403
226#define QEMU_KEY_CTRL_HOME 0xe404
227#define QEMU_KEY_CTRL_END 0xe405
228#define QEMU_KEY_CTRL_PAGEUP 0xe406
229#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
230
231void kbd_put_keysym(int keysym);
232
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233/* async I/O support */
234
235typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
236typedef int IOCanRWHandler(void *opaque);
7c9d8e07 237typedef void IOHandler(void *opaque);
c20709aa 238
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239int qemu_set_fd_handler2(int fd,
240 IOCanRWHandler *fd_read_poll,
241 IOHandler *fd_read,
242 IOHandler *fd_write,
243 void *opaque);
244int qemu_set_fd_handler(int fd,
245 IOHandler *fd_read,
246 IOHandler *fd_write,
247 void *opaque);
c20709aa 248
f331110f
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249/* Polling handling */
250
251/* return TRUE if no sleep should be done afterwards */
252typedef int PollingFunc(void *opaque);
253
254int qemu_add_polling_cb(PollingFunc *func, void *opaque);
255void qemu_del_polling_cb(PollingFunc *func, void *opaque);
256
a18e524a
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257#ifdef _WIN32
258/* Wait objects handling */
259typedef void WaitObjectFunc(void *opaque);
260
261int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
262void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
263#endif
264
86e94dea
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265typedef struct QEMUBH QEMUBH;
266
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267/* character device */
268
269#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 270#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
86e94dea 271#define CHR_EVENT_RESET 2 /* new connection established */
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272
273
274#define CHR_IOCTL_SERIAL_SET_PARAMS 1
275typedef struct {
276 int speed;
277 int parity;
278 int data_bits;
279 int stop_bits;
280} QEMUSerialSetParams;
281
282#define CHR_IOCTL_SERIAL_SET_BREAK 2
283
284#define CHR_IOCTL_PP_READ_DATA 3
285#define CHR_IOCTL_PP_WRITE_DATA 4
286#define CHR_IOCTL_PP_READ_CONTROL 5
287#define CHR_IOCTL_PP_WRITE_CONTROL 6
288#define CHR_IOCTL_PP_READ_STATUS 7
5867c88a
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289#define CHR_IOCTL_PP_EPP_READ_ADDR 8
290#define CHR_IOCTL_PP_EPP_READ 9
291#define CHR_IOCTL_PP_EPP_WRITE_ADDR 10
292#define CHR_IOCTL_PP_EPP_WRITE 11
2122c51a 293
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294typedef void IOEventHandler(void *opaque, int event);
295
296typedef struct CharDriverState {
297 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
e5b0bc44 298 void (*chr_update_read_handler)(struct CharDriverState *s);
2122c51a 299 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 300 IOEventHandler *chr_event;
e5b0bc44
PB
301 IOCanRWHandler *chr_can_read;
302 IOReadHandler *chr_read;
303 void *handler_opaque;
eb45f5fe 304 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 305 void (*chr_close)(struct CharDriverState *chr);
82c643ff 306 void *opaque;
20d8a3ed 307 int focus;
86e94dea 308 QEMUBH *bh;
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309} CharDriverState;
310
5856de80 311CharDriverState *qemu_chr_open(const char *filename);
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312void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
313int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 314void qemu_chr_send_event(CharDriverState *s, int event);
e5b0bc44
PB
315void qemu_chr_add_handlers(CharDriverState *s,
316 IOCanRWHandler *fd_can_read,
317 IOReadHandler *fd_read,
318 IOEventHandler *fd_event,
319 void *opaque);
2122c51a 320int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
86e94dea 321void qemu_chr_reset(CharDriverState *s);
e5b0bc44
PB
322int qemu_chr_can_read(CharDriverState *s);
323void qemu_chr_read(CharDriverState *s, uint8_t *buf, int len);
f8d179e3 324
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325/* consoles */
326
327typedef struct DisplayState DisplayState;
328typedef struct TextConsole TextConsole;
329
95219897
PB
330typedef void (*vga_hw_update_ptr)(void *);
331typedef void (*vga_hw_invalidate_ptr)(void *);
332typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
333
334TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
335 vga_hw_invalidate_ptr invalidate,
336 vga_hw_screen_dump_ptr screen_dump,
337 void *opaque);
338void vga_hw_update(void);
339void vga_hw_invalidate(void);
340void vga_hw_screen_dump(const char *filename);
341
342int is_graphic_console(void);
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343CharDriverState *text_console_init(DisplayState *ds);
344void console_select(unsigned int index);
345
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346/* serial ports */
347
348#define MAX_SERIAL_PORTS 4
349
350extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
351
6508fe59
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352/* parallel ports */
353
354#define MAX_PARALLEL_PORTS 3
355
356extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
357
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358struct ParallelIOArg {
359 void *buffer;
360 int count;
361};
362
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FB
363/* VLANs support */
364
365typedef struct VLANClientState VLANClientState;
366
367struct VLANClientState {
368 IOReadHandler *fd_read;
d861b05e
PB
369 /* Packets may still be sent if this returns zero. It's used to
370 rate-limit the slirp code. */
371 IOCanRWHandler *fd_can_read;
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372 void *opaque;
373 struct VLANClientState *next;
374 struct VLANState *vlan;
375 char info_str[256];
376};
377
378typedef struct VLANState {
379 int id;
380 VLANClientState *first_client;
381 struct VLANState *next;
382} VLANState;
383
384VLANState *qemu_find_vlan(int id);
385VLANClientState *qemu_new_vlan_client(VLANState *vlan,
d861b05e
PB
386 IOReadHandler *fd_read,
387 IOCanRWHandler *fd_can_read,
388 void *opaque);
389int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 390void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 391void qemu_handler_true(void *opaque);
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392
393void do_info_network(void);
394
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395/* TAP win32 */
396int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 397
7c9d8e07 398/* NIC info */
c4b1fcc0
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399
400#define MAX_NICS 8
401
7c9d8e07 402typedef struct NICInfo {
c4b1fcc0 403 uint8_t macaddr[6];
a41b2ff2 404 const char *model;
7c9d8e07
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405 VLANState *vlan;
406} NICInfo;
c4b1fcc0
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407
408extern int nb_nics;
7c9d8e07 409extern NICInfo nd_table[MAX_NICS];
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410
411/* timers */
412
413typedef struct QEMUClock QEMUClock;
414typedef struct QEMUTimer QEMUTimer;
415typedef void QEMUTimerCB(void *opaque);
416
417/* The real time clock should be used only for stuff which does not
418 change the virtual machine state, as it is run even if the virtual
69b91039 419 machine is stopped. The real time clock has a frequency of 1000
8a7ddc38
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420 Hz. */
421extern QEMUClock *rt_clock;
422
e80cfcfc 423/* The virtual clock is only run during the emulation. It is stopped
8a7ddc38
FB
424 when the virtual machine is stopped. Virtual timers use a high
425 precision clock, usually cpu cycles (use ticks_per_sec). */
426extern QEMUClock *vm_clock;
427
428int64_t qemu_get_clock(QEMUClock *clock);
429
430QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
431void qemu_free_timer(QEMUTimer *ts);
432void qemu_del_timer(QEMUTimer *ts);
433void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
434int qemu_timer_pending(QEMUTimer *ts);
435
436extern int64_t ticks_per_sec;
437extern int pit_min_timer_count;
438
1dce7c3c 439int64_t cpu_get_ticks(void);
8a7ddc38
FB
440void cpu_enable_ticks(void);
441void cpu_disable_ticks(void);
442
443/* VM Load/Save */
444
faea38e7 445typedef struct QEMUFile QEMUFile;
8a7ddc38 446
faea38e7
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447QEMUFile *qemu_fopen(const char *filename, const char *mode);
448void qemu_fflush(QEMUFile *f);
449void qemu_fclose(QEMUFile *f);
8a7ddc38
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450void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
451void qemu_put_byte(QEMUFile *f, int v);
452void qemu_put_be16(QEMUFile *f, unsigned int v);
453void qemu_put_be32(QEMUFile *f, unsigned int v);
454void qemu_put_be64(QEMUFile *f, uint64_t v);
455int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
456int qemu_get_byte(QEMUFile *f);
457unsigned int qemu_get_be16(QEMUFile *f);
458unsigned int qemu_get_be32(QEMUFile *f);
459uint64_t qemu_get_be64(QEMUFile *f);
460
461static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
462{
463 qemu_put_be64(f, *pv);
464}
465
466static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
467{
468 qemu_put_be32(f, *pv);
469}
470
471static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
472{
473 qemu_put_be16(f, *pv);
474}
475
476static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
477{
478 qemu_put_byte(f, *pv);
479}
480
481static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
482{
483 *pv = qemu_get_be64(f);
484}
485
486static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
487{
488 *pv = qemu_get_be32(f);
489}
490
491static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
492{
493 *pv = qemu_get_be16(f);
494}
495
496static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
497{
498 *pv = qemu_get_byte(f);
499}
500
c27004ec
FB
501#if TARGET_LONG_BITS == 64
502#define qemu_put_betl qemu_put_be64
503#define qemu_get_betl qemu_get_be64
504#define qemu_put_betls qemu_put_be64s
505#define qemu_get_betls qemu_get_be64s
506#else
507#define qemu_put_betl qemu_put_be32
508#define qemu_get_betl qemu_get_be32
509#define qemu_put_betls qemu_put_be32s
510#define qemu_get_betls qemu_get_be32s
511#endif
512
8a7ddc38
FB
513int64_t qemu_ftell(QEMUFile *f);
514int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
515
516typedef void SaveStateHandler(QEMUFile *f, void *opaque);
517typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
518
8a7ddc38
FB
519int register_savevm(const char *idstr,
520 int instance_id,
521 int version_id,
522 SaveStateHandler *save_state,
523 LoadStateHandler *load_state,
524 void *opaque);
525void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
526void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 527
6a00d601
FB
528void cpu_save(QEMUFile *f, void *opaque);
529int cpu_load(QEMUFile *f, void *opaque, int version_id);
530
faea38e7
FB
531void do_savevm(const char *name);
532void do_loadvm(const char *name);
533void do_delvm(const char *name);
534void do_info_snapshots(void);
535
83f64091 536/* bottom halves */
83f64091
FB
537typedef void QEMUBHFunc(void *opaque);
538
539QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
540void qemu_bh_schedule(QEMUBH *bh);
541void qemu_bh_cancel(QEMUBH *bh);
542void qemu_bh_delete(QEMUBH *bh);
6eb5733a 543int qemu_bh_poll(void);
83f64091 544
fc01f7e7
FB
545/* block.c */
546typedef struct BlockDriverState BlockDriverState;
ea2384d3
FB
547typedef struct BlockDriver BlockDriver;
548
549extern BlockDriver bdrv_raw;
19cb3738 550extern BlockDriver bdrv_host_device;
ea2384d3
FB
551extern BlockDriver bdrv_cow;
552extern BlockDriver bdrv_qcow;
553extern BlockDriver bdrv_vmdk;
3c56521b 554extern BlockDriver bdrv_cloop;
585d0ed9 555extern BlockDriver bdrv_dmg;
a8753c34 556extern BlockDriver bdrv_bochs;
6a0f9e82 557extern BlockDriver bdrv_vpc;
de167e41 558extern BlockDriver bdrv_vvfat;
faea38e7
FB
559extern BlockDriver bdrv_qcow2;
560
561typedef struct BlockDriverInfo {
562 /* in bytes, 0 if irrelevant */
563 int cluster_size;
564 /* offset at which the VM state can be saved (0 if not possible) */
565 int64_t vm_state_offset;
566} BlockDriverInfo;
567
568typedef struct QEMUSnapshotInfo {
569 char id_str[128]; /* unique snapshot id */
570 /* the following fields are informative. They are not needed for
571 the consistency of the snapshot */
572 char name[256]; /* user choosen name */
573 uint32_t vm_state_size; /* VM state info size */
574 uint32_t date_sec; /* UTC date of the snapshot */
575 uint32_t date_nsec;
576 uint64_t vm_clock_nsec; /* VM clock relative to boot */
577} QEMUSnapshotInfo;
ea2384d3 578
83f64091
FB
579#define BDRV_O_RDONLY 0x0000
580#define BDRV_O_RDWR 0x0002
581#define BDRV_O_ACCESS 0x0003
582#define BDRV_O_CREAT 0x0004 /* create an empty file */
583#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
584#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
585 use a disk image format on top of
586 it (default for
587 bdrv_file_open()) */
588
ea2384d3
FB
589void bdrv_init(void);
590BlockDriver *bdrv_find_format(const char *format_name);
591int bdrv_create(BlockDriver *drv,
592 const char *filename, int64_t size_in_sectors,
593 const char *backing_file, int flags);
c4b1fcc0
FB
594BlockDriverState *bdrv_new(const char *device_name);
595void bdrv_delete(BlockDriverState *bs);
83f64091
FB
596int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
597int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
598int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 599 BlockDriver *drv);
fc01f7e7
FB
600void bdrv_close(BlockDriverState *bs);
601int bdrv_read(BlockDriverState *bs, int64_t sector_num,
602 uint8_t *buf, int nb_sectors);
603int bdrv_write(BlockDriverState *bs, int64_t sector_num,
604 const uint8_t *buf, int nb_sectors);
83f64091
FB
605int bdrv_pread(BlockDriverState *bs, int64_t offset,
606 void *buf, int count);
607int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
608 const void *buf, int count);
609int bdrv_truncate(BlockDriverState *bs, int64_t offset);
610int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 611void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 612int bdrv_commit(BlockDriverState *bs);
77fef8c1 613void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
614/* async block I/O */
615typedef struct BlockDriverAIOCB BlockDriverAIOCB;
616typedef void BlockDriverCompletionFunc(void *opaque, int ret);
617
ce1a14dc
PB
618BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
619 uint8_t *buf, int nb_sectors,
620 BlockDriverCompletionFunc *cb, void *opaque);
621BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
622 const uint8_t *buf, int nb_sectors,
623 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 624void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
625
626void qemu_aio_init(void);
627void qemu_aio_poll(void);
6192bc37 628void qemu_aio_flush(void);
83f64091
FB
629void qemu_aio_wait_start(void);
630void qemu_aio_wait(void);
631void qemu_aio_wait_end(void);
632
7a6cba61
PB
633/* Ensure contents are flushed to disk. */
634void bdrv_flush(BlockDriverState *bs);
33e3963e 635
c4b1fcc0
FB
636#define BDRV_TYPE_HD 0
637#define BDRV_TYPE_CDROM 1
638#define BDRV_TYPE_FLOPPY 2
4dbb0f50
TS
639#define BIOS_ATA_TRANSLATION_AUTO 0
640#define BIOS_ATA_TRANSLATION_NONE 1
641#define BIOS_ATA_TRANSLATION_LBA 2
642#define BIOS_ATA_TRANSLATION_LARGE 3
643#define BIOS_ATA_TRANSLATION_RECHS 4
c4b1fcc0
FB
644
645void bdrv_set_geometry_hint(BlockDriverState *bs,
646 int cyls, int heads, int secs);
647void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 648void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
649void bdrv_get_geometry_hint(BlockDriverState *bs,
650 int *pcyls, int *pheads, int *psecs);
651int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 652int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
653int bdrv_is_removable(BlockDriverState *bs);
654int bdrv_is_read_only(BlockDriverState *bs);
655int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 656int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
657int bdrv_is_locked(BlockDriverState *bs);
658void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 659void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
660void bdrv_set_change_cb(BlockDriverState *bs,
661 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 662void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
663void bdrv_info(void);
664BlockDriverState *bdrv_find(const char *name);
82c643ff 665void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
666int bdrv_is_encrypted(BlockDriverState *bs);
667int bdrv_set_key(BlockDriverState *bs, const char *key);
668void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
669 void *opaque);
670const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
671int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
672 const uint8_t *buf, int nb_sectors);
673int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 674
83f64091
FB
675void bdrv_get_backing_filename(BlockDriverState *bs,
676 char *filename, int filename_size);
faea38e7
FB
677int bdrv_snapshot_create(BlockDriverState *bs,
678 QEMUSnapshotInfo *sn_info);
679int bdrv_snapshot_goto(BlockDriverState *bs,
680 const char *snapshot_id);
681int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
682int bdrv_snapshot_list(BlockDriverState *bs,
683 QEMUSnapshotInfo **psn_info);
684char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
685
686char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
687int path_is_absolute(const char *path);
688void path_combine(char *dest, int dest_size,
689 const char *base_path,
690 const char *filename);
ea2384d3
FB
691
692#ifndef QEMU_TOOL
54fa5af5
FB
693
694typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
695 int boot_device,
696 DisplayState *ds, const char **fd_filename, int snapshot,
697 const char *kernel_filename, const char *kernel_cmdline,
94fc95cd 698 const char *initrd_filename, const char *cpu_model);
54fa5af5
FB
699
700typedef struct QEMUMachine {
701 const char *name;
702 const char *desc;
703 QEMUMachineInitFunc *init;
704 struct QEMUMachine *next;
705} QEMUMachine;
706
707int qemu_register_machine(QEMUMachine *m);
708
709typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 710typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 711
94fc95cd
JM
712#if defined(TARGET_PPC)
713void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
714#endif
715
33d68b5f
TS
716#if defined(TARGET_MIPS)
717void mips_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
718#endif
719
26aa7d72
FB
720/* ISA bus */
721
722extern target_phys_addr_t isa_mem_base;
723
724typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
725typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
726
727int register_ioport_read(int start, int length, int size,
728 IOPortReadFunc *func, void *opaque);
729int register_ioport_write(int start, int length, int size,
730 IOPortWriteFunc *func, void *opaque);
69b91039
FB
731void isa_unassign_ioport(int start, int length);
732
aef445bd
PB
733void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
734
69b91039
FB
735/* PCI bus */
736
69b91039
FB
737extern target_phys_addr_t pci_mem_base;
738
46e50e9d 739typedef struct PCIBus PCIBus;
69b91039
FB
740typedef struct PCIDevice PCIDevice;
741
742typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
743 uint32_t address, uint32_t data, int len);
744typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
745 uint32_t address, int len);
746typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
747 uint32_t addr, uint32_t size, int type);
748
749#define PCI_ADDRESS_SPACE_MEM 0x00
750#define PCI_ADDRESS_SPACE_IO 0x01
751#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
752
753typedef struct PCIIORegion {
5768f5ac 754 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
755 uint32_t size;
756 uint8_t type;
757 PCIMapIORegionFunc *map_func;
758} PCIIORegion;
759
8a8696a3
FB
760#define PCI_ROM_SLOT 6
761#define PCI_NUM_REGIONS 7
502a5395
PB
762
763#define PCI_DEVICES_MAX 64
764
765#define PCI_VENDOR_ID 0x00 /* 16 bits */
766#define PCI_DEVICE_ID 0x02 /* 16 bits */
767#define PCI_COMMAND 0x04 /* 16 bits */
768#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
769#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
770#define PCI_CLASS_DEVICE 0x0a /* Device class */
771#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
772#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
773#define PCI_MIN_GNT 0x3e /* 8 bits */
774#define PCI_MAX_LAT 0x3f /* 8 bits */
775
69b91039
FB
776struct PCIDevice {
777 /* PCI config space */
778 uint8_t config[256];
779
780 /* the following fields are read only */
46e50e9d 781 PCIBus *bus;
69b91039
FB
782 int devfn;
783 char name[64];
8a8696a3 784 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
785
786 /* do not access the following fields */
787 PCIConfigReadFunc *config_read;
788 PCIConfigWriteFunc *config_write;
502a5395 789 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 790 int irq_index;
d2b59317
PB
791
792 /* Current IRQ levels. Used internally by the generic PCI code. */
793 int irq_state[4];
69b91039
FB
794};
795
46e50e9d
FB
796PCIDevice *pci_register_device(PCIBus *bus, const char *name,
797 int instance_size, int devfn,
69b91039
FB
798 PCIConfigReadFunc *config_read,
799 PCIConfigWriteFunc *config_write);
800
801void pci_register_io_region(PCIDevice *pci_dev, int region_num,
802 uint32_t size, int type,
803 PCIMapIORegionFunc *map_func);
804
5768f5ac
FB
805void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
806
807uint32_t pci_default_read_config(PCIDevice *d,
808 uint32_t address, int len);
809void pci_default_write_config(PCIDevice *d,
810 uint32_t address, uint32_t val, int len);
89b6b508
FB
811void pci_device_save(PCIDevice *s, QEMUFile *f);
812int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 813
d2b59317
PB
814typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
815typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
816PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 817 void *pic, int devfn_min, int nirq);
502a5395 818
abcebc7e 819void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn);
502a5395
PB
820void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
821uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
822int pci_bus_num(PCIBus *s);
80b3ada7 823void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 824
5768f5ac 825void pci_info(void);
80b3ada7
PB
826PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
827 pci_map_irq_fn map_irq, const char *name);
26aa7d72 828
502a5395 829/* prep_pci.c */
46e50e9d 830PCIBus *pci_prep_init(void);
77d4bc34 831
502a5395
PB
832/* grackle_pci.c */
833PCIBus *pci_grackle_init(uint32_t base, void *pic);
834
835/* unin_pci.c */
836PCIBus *pci_pmac_init(void *pic);
837
838/* apb_pci.c */
839PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
840 void *pic);
841
e69954b9 842PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
843
844/* piix_pci.c */
f00fc47c
FB
845PCIBus *i440fx_init(PCIDevice **pi440fx_state);
846void i440fx_set_smm(PCIDevice *d, int val);
8f1c91d8 847int piix3_init(PCIBus *bus, int devfn);
f00fc47c 848void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 849
5856de80
TS
850int piix4_init(PCIBus *bus, int devfn);
851
28b9b5af
FB
852/* openpic.c */
853typedef struct openpic_t openpic_t;
54fa5af5 854void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
855openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
856 CPUState **envp);
28b9b5af 857
54fa5af5
FB
858/* heathrow_pic.c */
859typedef struct HeathrowPICS HeathrowPICS;
860void heathrow_pic_set_irq(void *opaque, int num, int level);
861HeathrowPICS *heathrow_pic_init(int *pmem_index);
862
fde7d5bd
TS
863/* gt64xxx.c */
864PCIBus *pci_gt64120_init(void *pic);
865
6a36d84e
FB
866#ifdef HAS_AUDIO
867struct soundhw {
868 const char *name;
869 const char *descr;
870 int enabled;
871 int isa;
872 union {
873 int (*init_isa) (AudioState *s);
874 int (*init_pci) (PCIBus *bus, AudioState *s);
875 } init;
876};
877
878extern struct soundhw soundhw[];
879#endif
880
313aa567
FB
881/* vga.c */
882
74a14f22 883#define VGA_RAM_SIZE (8192 * 1024)
313aa567 884
82c643ff 885struct DisplayState {
313aa567
FB
886 uint8_t *data;
887 int linesize;
888 int depth;
d3079cd2 889 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
890 int width;
891 int height;
24236869
FB
892 void *opaque;
893
313aa567
FB
894 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
895 void (*dpy_resize)(struct DisplayState *s, int w, int h);
896 void (*dpy_refresh)(struct DisplayState *s);
24236869 897 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 898};
313aa567
FB
899
900static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
901{
902 s->dpy_update(s, x, y, w, h);
903}
904
905static inline void dpy_resize(DisplayState *s, int w, int h)
906{
907 s->dpy_resize(s, w, h);
908}
909
89b6b508
FB
910int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
911 unsigned long vga_ram_offset, int vga_ram_size);
912int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
913 unsigned long vga_ram_offset, int vga_ram_size,
914 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 915
d6bfa22f 916/* cirrus_vga.c */
46e50e9d 917void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 918 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
919void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
920 unsigned long vga_ram_offset, int vga_ram_size);
921
313aa567 922/* sdl.c */
43523e93 923void sdl_display_init(DisplayState *ds, int full_screen, int no_frame);
313aa567 924
da4dbf74
FB
925/* cocoa.m */
926void cocoa_display_init(DisplayState *ds, int full_screen);
927
24236869 928/* vnc.c */
73fc9742 929void vnc_display_init(DisplayState *ds, const char *display);
a9ce8590 930void do_info_vnc(void);
24236869 931
6070dd07
TS
932/* x_keymap.c */
933extern uint8_t _translate_keycode(const int key);
934
5391d806
FB
935/* ide.c */
936#define MAX_DISKS 4
937
faea38e7 938extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 939
69b91039
FB
940void isa_ide_init(int iobase, int iobase2, int irq,
941 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
942void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
943 int secondary_ide_enabled);
502a5395 944void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 945int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 946 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 947
2e5d83bb
PB
948/* cdrom.c */
949int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
950int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
951
9542611a
TS
952/* ds1225y.c */
953typedef struct ds1225y_t ds1225y_t;
954ds1225y_t *ds1225y_init(target_ulong mem_base, const char *filename);
955
1d14ffa9 956/* es1370.c */
c0fe3827 957int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 958
fb065187 959/* sb16.c */
c0fe3827 960int SB16_init (AudioState *s);
fb065187
FB
961
962/* adlib.c */
c0fe3827 963int Adlib_init (AudioState *s);
fb065187
FB
964
965/* gus.c */
c0fe3827 966int GUS_init (AudioState *s);
27503323
FB
967
968/* dma.c */
85571bc7 969typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 970int DMA_get_channel_mode (int nchan);
85571bc7
FB
971int DMA_read_memory (int nchan, void *buf, int pos, int size);
972int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
973void DMA_hold_DREQ (int nchan);
974void DMA_release_DREQ (int nchan);
16f62432 975void DMA_schedule(int nchan);
27503323 976void DMA_run (void);
28b9b5af 977void DMA_init (int high_page_enable);
27503323 978void DMA_register_channel (int nchan,
85571bc7
FB
979 DMA_transfer_handler transfer_handler,
980 void *opaque);
7138fcfb
FB
981/* fdc.c */
982#define MAX_FD 2
983extern BlockDriverState *fd_table[MAX_FD];
984
baca51fa
FB
985typedef struct fdctrl_t fdctrl_t;
986
987fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
988 uint32_t io_base,
989 BlockDriverState **fds);
990int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 991
80cabfad
FB
992/* ne2000.c */
993
7c9d8e07 994void isa_ne2000_init(int base, int irq, NICInfo *nd);
abcebc7e 995void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn);
80cabfad 996
a41b2ff2
PB
997/* rtl8139.c */
998
abcebc7e 999void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn);
a41b2ff2 1000
e3c2613f
FB
1001/* pcnet.c */
1002
abcebc7e 1003void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn);
67e999be
FB
1004void pcnet_h_reset(void *opaque);
1005void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
1006
e3c2613f 1007
80cabfad
FB
1008/* pckbd.c */
1009
80cabfad
FB
1010void kbd_init(void);
1011
1012/* mc146818rtc.c */
1013
8a7ddc38 1014typedef struct RTCState RTCState;
80cabfad 1015
8a7ddc38
FB
1016RTCState *rtc_init(int base, int irq);
1017void rtc_set_memory(RTCState *s, int addr, int val);
1018void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
1019
1020/* serial.c */
1021
c4b1fcc0 1022typedef struct SerialState SerialState;
e5d13e2f
FB
1023SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
1024 int base, int irq, CharDriverState *chr);
1025SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
1026 target_ulong base, int it_shift,
1027 int irq, CharDriverState *chr);
80cabfad 1028
6508fe59
FB
1029/* parallel.c */
1030
1031typedef struct ParallelState ParallelState;
1032ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
1033
80cabfad
FB
1034/* i8259.c */
1035
3de388f6
FB
1036typedef struct PicState2 PicState2;
1037extern PicState2 *isa_pic;
80cabfad 1038void pic_set_irq(int irq, int level);
54fa5af5 1039void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 1040PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
1041void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
1042 void *alt_irq_opaque);
3de388f6
FB
1043int pic_read_irq(PicState2 *s);
1044void pic_update_irq(PicState2 *s);
1045uint32_t pic_intack_read(PicState2 *s);
c20709aa 1046void pic_info(void);
4a0fb71e 1047void irq_info(void);
80cabfad 1048
c27004ec 1049/* APIC */
d592d303
FB
1050typedef struct IOAPICState IOAPICState;
1051
c27004ec
FB
1052int apic_init(CPUState *env);
1053int apic_get_interrupt(CPUState *env);
d592d303
FB
1054IOAPICState *ioapic_init(void);
1055void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 1056
80cabfad
FB
1057/* i8254.c */
1058
1059#define PIT_FREQ 1193182
1060
ec844b96
FB
1061typedef struct PITState PITState;
1062
1063PITState *pit_init(int base, int irq);
1064void pit_set_gate(PITState *pit, int channel, int val);
1065int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
1066int pit_get_initial_count(PITState *pit, int channel);
1067int pit_get_mode(PITState *pit, int channel);
ec844b96 1068int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1069
fd06c375
FB
1070/* pcspk.c */
1071void pcspk_init(PITState *);
1072int pcspk_audio_init(AudioState *);
1073
3fffc223
TS
1074#include "hw/smbus.h"
1075
6515b203
FB
1076/* acpi.c */
1077extern int acpi_enabled;
502a5395 1078void piix4_pm_init(PCIBus *bus, int devfn);
3fffc223 1079void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
6515b203
FB
1080void acpi_bios_init(void);
1081
3fffc223
TS
1082/* smbus_eeprom.c */
1083SMBusDevice *smbus_eeprom_device_init(uint8_t addr, uint8_t *buf);
1084
80cabfad 1085/* pc.c */
54fa5af5 1086extern QEMUMachine pc_machine;
3dbbdc25 1087extern QEMUMachine isapc_machine;
52ca8d6a 1088extern int fd_bootchk;
80cabfad 1089
6a00d601
FB
1090void ioport_set_a20(int enable);
1091int ioport_get_a20(void);
1092
26aa7d72 1093/* ppc.c */
54fa5af5
FB
1094extern QEMUMachine prep_machine;
1095extern QEMUMachine core99_machine;
1096extern QEMUMachine heathrow_machine;
1097
6af0bf9c
FB
1098/* mips_r4k.c */
1099extern QEMUMachine mips_machine;
1100
5856de80
TS
1101/* mips_malta.c */
1102extern QEMUMachine mips_malta_machine;
1103
4de9b249
TS
1104/* mips_int */
1105extern void cpu_mips_irq_request(void *opaque, int irq, int level);
1106
e16fe40c
TS
1107/* mips_timer.c */
1108extern void cpu_mips_clock_init(CPUState *);
1109extern void cpu_mips_irqctrl_init (void);
1110
27c7ca7e
FB
1111/* shix.c */
1112extern QEMUMachine shix_machine;
1113
8cc43fef
FB
1114#ifdef TARGET_PPC
1115ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1116#endif
64201201 1117void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1118
1119extern CPUWriteMemoryFunc *PPC_io_write[];
1120extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1121void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1122
e95c8d51 1123/* sun4m.c */
54fa5af5 1124extern QEMUMachine sun4m_machine;
ba3c64fb 1125void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1126
1127/* iommu.c */
e80cfcfc 1128void *iommu_init(uint32_t addr);
67e999be 1129void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1130 uint8_t *buf, int len, int is_write);
67e999be
FB
1131static inline void sparc_iommu_memory_read(void *opaque,
1132 target_phys_addr_t addr,
1133 uint8_t *buf, int len)
1134{
1135 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1136}
e95c8d51 1137
67e999be
FB
1138static inline void sparc_iommu_memory_write(void *opaque,
1139 target_phys_addr_t addr,
1140 uint8_t *buf, int len)
1141{
1142 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1143}
e95c8d51
FB
1144
1145/* tcx.c */
95219897 1146void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1147 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1148
1149/* slavio_intctl.c */
1150void *slavio_intctl_init();
ba3c64fb 1151void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1152void slavio_pic_info(void *opaque);
1153void slavio_irq_info(void *opaque);
1154void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1155void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1156
5fe141fd
FB
1157/* loader.c */
1158int get_image_size(const char *filename);
1159int load_image(const char *filename, uint8_t *addr);
9ee3c029 1160int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc 1161int load_aout(const char *filename, uint8_t *addr);
1c7b3754 1162int load_uboot(const char *filename, target_ulong *ep, int *is_linux);
e80cfcfc
FB
1163
1164/* slavio_timer.c */
ba3c64fb 1165void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1166
e80cfcfc
FB
1167/* slavio_serial.c */
1168SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1169void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1170
3475187d
FB
1171/* slavio_misc.c */
1172void *slavio_misc_init(uint32_t base, int irq);
1173void slavio_set_power_fail(void *opaque, int power_failing);
1174
6f7e9aec 1175/* esp.c */
fa1fb14c 1176void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id);
67e999be
FB
1177void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1178void esp_reset(void *opaque);
1179
1180/* sparc32_dma.c */
1181void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1182 void *intctl);
1183void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1184void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1185 uint8_t *buf, int len, int do_bswap);
1186void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1187 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1188void espdma_raise_irq(void *opaque);
1189void espdma_clear_irq(void *opaque);
1190void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1191void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1192void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1193 void *lance_opaque);
6f7e9aec 1194
b8174937
FB
1195/* cs4231.c */
1196void cs_init(target_phys_addr_t base, int irq, void *intctl);
1197
3475187d
FB
1198/* sun4u.c */
1199extern QEMUMachine sun4u_machine;
1200
64201201
FB
1201/* NVRAM helpers */
1202#include "hw/m48t59.h"
1203
1204void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1205uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1206void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1207uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1208void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1209uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1210void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1211 const unsigned char *str, uint32_t max);
1212int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1213void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1214 uint32_t start, uint32_t count);
1215int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1216 const unsigned char *arch,
1217 uint32_t RAM_size, int boot_device,
1218 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1219 const char *cmdline,
64201201 1220 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1221 uint32_t NVRAM_image,
1222 int width, int height, int depth);
64201201 1223
63066f4f
FB
1224/* adb.c */
1225
1226#define MAX_ADB_DEVICES 16
1227
e2733d20 1228#define ADB_MAX_OUT_LEN 16
63066f4f 1229
e2733d20 1230typedef struct ADBDevice ADBDevice;
63066f4f 1231
e2733d20
FB
1232/* buf = NULL means polling */
1233typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1234 const uint8_t *buf, int len);
12c28fed
FB
1235typedef int ADBDeviceReset(ADBDevice *d);
1236
63066f4f
FB
1237struct ADBDevice {
1238 struct ADBBusState *bus;
1239 int devaddr;
1240 int handler;
e2733d20 1241 ADBDeviceRequest *devreq;
12c28fed 1242 ADBDeviceReset *devreset;
63066f4f
FB
1243 void *opaque;
1244};
1245
1246typedef struct ADBBusState {
1247 ADBDevice devices[MAX_ADB_DEVICES];
1248 int nb_devices;
e2733d20 1249 int poll_index;
63066f4f
FB
1250} ADBBusState;
1251
e2733d20
FB
1252int adb_request(ADBBusState *s, uint8_t *buf_out,
1253 const uint8_t *buf, int len);
1254int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1255
1256ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1257 ADBDeviceRequest *devreq,
12c28fed 1258 ADBDeviceReset *devreset,
63066f4f
FB
1259 void *opaque);
1260void adb_kbd_init(ADBBusState *bus);
1261void adb_mouse_init(ADBBusState *bus);
1262
1263/* cuda.c */
1264
1265extern ADBBusState adb_bus;
54fa5af5 1266int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1267
bb36d470
FB
1268#include "hw/usb.h"
1269
a594cfbf
FB
1270/* usb ports of the VM */
1271
0d92ed30
PB
1272void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1273 usb_attachfn attach);
a594cfbf 1274
0d92ed30 1275#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1276
1277void do_usb_add(const char *devname);
1278void do_usb_del(const char *devname);
1279void usb_info(void);
1280
2e5d83bb 1281/* scsi-disk.c */
4d611c9a
PB
1282enum scsi_reason {
1283 SCSI_REASON_DONE, /* Command complete. */
1284 SCSI_REASON_DATA /* Transfer complete, more data required. */
1285};
1286
2e5d83bb 1287typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1288typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1289 uint32_t arg);
2e5d83bb
PB
1290
1291SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1292 int tcq,
2e5d83bb
PB
1293 scsi_completionfn completion,
1294 void *opaque);
1295void scsi_disk_destroy(SCSIDevice *s);
1296
0fc5c15a 1297int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1298/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1299 layer the completion routine may be called directly by
1300 scsi_{read,write}_data. */
a917d384
PB
1301void scsi_read_data(SCSIDevice *s, uint32_t tag);
1302int scsi_write_data(SCSIDevice *s, uint32_t tag);
1303void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1304uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1305
7d8406be
PB
1306/* lsi53c895a.c */
1307void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1308void *lsi_scsi_init(PCIBus *bus, int devfn);
1309
b5ff1b31 1310/* integratorcp.c */
3371d272 1311extern QEMUMachine integratorcp_machine;
b5ff1b31 1312
cdbdb648
PB
1313/* versatilepb.c */
1314extern QEMUMachine versatilepb_machine;
16406950 1315extern QEMUMachine versatileab_machine;
cdbdb648 1316
e69954b9
PB
1317/* realview.c */
1318extern QEMUMachine realview_machine;
1319
daa57963
FB
1320/* ps2.c */
1321void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1322void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1323void ps2_write_mouse(void *, int val);
1324void ps2_write_keyboard(void *, int val);
1325uint32_t ps2_read_data(void *);
1326void ps2_queue(void *, int b);
f94f5d71 1327void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1328
80337b66
FB
1329/* smc91c111.c */
1330void smc91c111_init(NICInfo *, uint32_t, void *, int);
1331
bdd5003a 1332/* pl110.c */
95219897 1333void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1334
cdbdb648
PB
1335/* pl011.c */
1336void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1337
1338/* pl050.c */
1339void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1340
1341/* pl080.c */
e69954b9 1342void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1343
1344/* pl190.c */
1345void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1346
1347/* arm-timer.c */
1348void sp804_init(uint32_t base, void *pic, int irq);
1349void icp_pit_init(uint32_t base, void *pic, int irq);
1350
e69954b9
PB
1351/* arm_sysctl.c */
1352void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1353
1354/* arm_gic.c */
1355void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1356
16406950
PB
1357/* arm_boot.c */
1358
daf90626 1359void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename,
16406950
PB
1360 const char *kernel_cmdline, const char *initrd_filename,
1361 int board_id);
1362
27c7ca7e
FB
1363/* sh7750.c */
1364struct SH7750State;
1365
008a8818 1366struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1367
1368typedef struct {
1369 /* The callback will be triggered if any of the designated lines change */
1370 uint16_t portamask_trigger;
1371 uint16_t portbmask_trigger;
1372 /* Return 0 if no action was taken */
1373 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1374 uint16_t * periph_pdtra,
1375 uint16_t * periph_portdira,
1376 uint16_t * periph_pdtrb,
1377 uint16_t * periph_portdirb);
1378} sh7750_io_device;
1379
1380int sh7750_register_io_device(struct SH7750State *s,
1381 sh7750_io_device * device);
1382/* tc58128.c */
1383int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1384
29133e9a
FB
1385/* NOR flash devices */
1386typedef struct pflash_t pflash_t;
1387
1388pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1389 BlockDriverState *bs,
1390 target_ulong sector_len, int nb_blocs, int width,
1391 uint16_t id0, uint16_t id1,
1392 uint16_t id2, uint16_t id3);
1393
4046d913
PB
1394#include "gdbstub.h"
1395
ea2384d3
FB
1396#endif /* defined(QEMU_TOOL) */
1397
c4b1fcc0 1398/* monitor.c */
82c643ff 1399void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1400void term_puts(const char *str);
1401void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1402void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
fef30743 1403void term_print_filename(const char *filename);
c4b1fcc0
FB
1404void term_flush(void);
1405void term_print_help(void);
ea2384d3
FB
1406void monitor_readline(const char *prompt, int is_password,
1407 char *buf, int buf_size);
1408
1409/* readline.c */
1410typedef void ReadLineFunc(void *opaque, const char *str);
1411
1412extern int completion_index;
1413void add_completion(const char *str);
1414void readline_handle_byte(int ch);
1415void readline_find_completion(const char *cmdline);
1416const char *readline_get_history(unsigned int index);
1417void readline_start(const char *prompt, int is_password,
1418 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1419
5e6ad6f9
FB
1420void kqemu_record_dump(void);
1421
fc01f7e7 1422#endif /* VL_H */