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3285cf4f AP |
1 | /* |
2 | * Copyright (C) 2010 Citrix Ltd. | |
3 | * | |
4 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
5 | * the COPYING file in the top-level directory. | |
6 | * | |
6b620ca3 PB |
7 | * Contributions after 2012-01-13 are licensed under the terms of the |
8 | * GNU GPL, version 2 or (at your option) any later version. | |
3285cf4f AP |
9 | */ |
10 | ||
21cbfe5f | 11 | #include "qemu/osdep.h" |
9ce94e7c AS |
12 | #include <sys/mman.h> |
13 | ||
a2cb15b0 | 14 | #include "hw/pci/pci.h" |
0d09e41a | 15 | #include "hw/i386/pc.h" |
428c3ece | 16 | #include "hw/i386/apic-msidef.h" |
0d09e41a PB |
17 | #include "hw/xen/xen_common.h" |
18 | #include "hw/xen/xen_backend.h" | |
39f42439 | 19 | #include "qmp-commands.h" |
3285cf4f | 20 | |
dccfcd0e | 21 | #include "sysemu/char.h" |
dced4d2f | 22 | #include "qemu/error-report.h" |
1de7afc9 | 23 | #include "qemu/range.h" |
9c17d615 | 24 | #include "sysemu/xen-mapcache.h" |
432d268c | 25 | #include "trace.h" |
022c62cb | 26 | #include "exec/address-spaces.h" |
432d268c | 27 | |
9ce94e7c AS |
28 | #include <xen/hvm/ioreq.h> |
29 | #include <xen/hvm/params.h> | |
8a369e20 | 30 | #include <xen/hvm/e820.h> |
9ce94e7c | 31 | |
04b0de0e | 32 | //#define DEBUG_XEN_HVM |
9ce94e7c | 33 | |
04b0de0e | 34 | #ifdef DEBUG_XEN_HVM |
9ce94e7c AS |
35 | #define DPRINTF(fmt, ...) \ |
36 | do { fprintf(stderr, "xen: " fmt, ## __VA_ARGS__); } while (0) | |
37 | #else | |
38 | #define DPRINTF(fmt, ...) \ | |
39 | do { } while (0) | |
40 | #endif | |
41 | ||
ce76b8a8 | 42 | static MemoryRegion ram_memory, ram_640k, ram_lo, ram_hi; |
c65adf9b | 43 | static MemoryRegion *framebuffer; |
39f42439 | 44 | static bool xen_in_migration; |
ce76b8a8 | 45 | |
9ce94e7c | 46 | /* Compatibility with older version */ |
37f9e258 DS |
47 | |
48 | /* This allows QEMU to build on a system that has Xen 4.5 or earlier | |
49 | * installed. This here (not in hw/xen/xen_common.h) because xen/hvm/ioreq.h | |
50 | * needs to be included before this block and hw/xen/xen_common.h needs to | |
51 | * be included before xen/hvm/ioreq.h | |
52 | */ | |
53 | #ifndef IOREQ_TYPE_VMWARE_PORT | |
54 | #define IOREQ_TYPE_VMWARE_PORT 3 | |
55 | struct vmware_regs { | |
56 | uint32_t esi; | |
57 | uint32_t edi; | |
58 | uint32_t ebx; | |
59 | uint32_t ecx; | |
60 | uint32_t edx; | |
61 | }; | |
62 | typedef struct vmware_regs vmware_regs_t; | |
63 | ||
64 | struct shared_vmport_iopage { | |
65 | struct vmware_regs vcpu_vmport_regs[1]; | |
66 | }; | |
67 | typedef struct shared_vmport_iopage shared_vmport_iopage_t; | |
68 | #endif | |
69 | ||
9ce94e7c AS |
70 | #if __XEN_LATEST_INTERFACE_VERSION__ < 0x0003020a |
71 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
72 | { | |
73 | return shared_page->vcpu_iodata[i].vp_eport; | |
74 | } | |
75 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
76 | { | |
77 | return &shared_page->vcpu_iodata[vcpu].vp_ioreq; | |
78 | } | |
79 | # define FMT_ioreq_size PRIx64 | |
80 | #else | |
81 | static inline uint32_t xen_vcpu_eport(shared_iopage_t *shared_page, int i) | |
82 | { | |
83 | return shared_page->vcpu_ioreq[i].vp_eport; | |
84 | } | |
85 | static inline ioreq_t *xen_vcpu_ioreq(shared_iopage_t *shared_page, int vcpu) | |
86 | { | |
87 | return &shared_page->vcpu_ioreq[vcpu]; | |
88 | } | |
89 | # define FMT_ioreq_size "u" | |
90 | #endif | |
91 | ||
92 | #define BUFFER_IO_MAX_DELAY 100 | |
93 | ||
b4dd7802 | 94 | typedef struct XenPhysmap { |
a8170e5e | 95 | hwaddr start_addr; |
b4dd7802 | 96 | ram_addr_t size; |
dc6c4fe8 | 97 | const char *name; |
a8170e5e | 98 | hwaddr phys_offset; |
b4dd7802 AP |
99 | |
100 | QLIST_ENTRY(XenPhysmap) list; | |
101 | } XenPhysmap; | |
102 | ||
9ce94e7c | 103 | typedef struct XenIOState { |
3996e85c | 104 | ioservid_t ioservid; |
9ce94e7c | 105 | shared_iopage_t *shared_page; |
37f9e258 | 106 | shared_vmport_iopage_t *shared_vmport_page; |
9ce94e7c AS |
107 | buffered_iopage_t *buffered_io_page; |
108 | QEMUTimer *buffered_io_timer; | |
37f9e258 | 109 | CPUState **cpu_by_vcpu_id; |
9ce94e7c AS |
110 | /* the evtchn port for polling the notification, */ |
111 | evtchn_port_t *ioreq_local_port; | |
fda1f768 SS |
112 | /* evtchn local port for buffered io */ |
113 | evtchn_port_t bufioreq_local_port; | |
9ce94e7c | 114 | /* the evtchn fd for polling */ |
a2db2a1e | 115 | xenevtchn_handle *xce_handle; |
9ce94e7c AS |
116 | /* which vcpu we are serving */ |
117 | int send_vcpu; | |
118 | ||
29321335 | 119 | struct xs_handle *xenstore; |
20581d20 | 120 | MemoryListener memory_listener; |
3996e85c PD |
121 | MemoryListener io_listener; |
122 | DeviceListener device_listener; | |
b4dd7802 | 123 | QLIST_HEAD(, XenPhysmap) physmap; |
a8170e5e | 124 | hwaddr free_phys_offset; |
b4dd7802 | 125 | const XenPhysmap *log_for_dirtybit; |
29321335 | 126 | |
9ce94e7c | 127 | Notifier exit; |
da98c8eb | 128 | Notifier suspend; |
11addd0a | 129 | Notifier wakeup; |
9ce94e7c AS |
130 | } XenIOState; |
131 | ||
41445300 AP |
132 | /* Xen specific function for piix pci */ |
133 | ||
134 | int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num) | |
135 | { | |
136 | return irq_num + ((pci_dev->devfn >> 3) << 2); | |
137 | } | |
138 | ||
139 | void xen_piix3_set_irq(void *opaque, int irq_num, int level) | |
140 | { | |
141 | xc_hvm_set_pci_intx_level(xen_xc, xen_domid, 0, 0, irq_num >> 2, | |
142 | irq_num & 3, level); | |
143 | } | |
144 | ||
145 | void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len) | |
146 | { | |
147 | int i; | |
148 | ||
149 | /* Scan for updates to PCI link routes (0x60-0x63). */ | |
150 | for (i = 0; i < len; i++) { | |
151 | uint8_t v = (val >> (8 * i)) & 0xff; | |
152 | if (v & 0x80) { | |
153 | v = 0; | |
154 | } | |
155 | v &= 0xf; | |
156 | if (((address + i) >= 0x60) && ((address + i) <= 0x63)) { | |
157 | xc_hvm_set_pci_link_route(xen_xc, xen_domid, address + i - 0x60, v); | |
158 | } | |
159 | } | |
160 | } | |
161 | ||
428c3ece SS |
162 | int xen_is_pirq_msi(uint32_t msi_data) |
163 | { | |
164 | /* If vector is 0, the msi is remapped into a pirq, passed as | |
165 | * dest_id. | |
166 | */ | |
167 | return ((msi_data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT) == 0; | |
168 | } | |
169 | ||
f1dbf015 WL |
170 | void xen_hvm_inject_msi(uint64_t addr, uint32_t data) |
171 | { | |
4c9f8d1b | 172 | xen_xc_hvm_inject_msi(xen_xc, xen_domid, addr, data); |
f1dbf015 WL |
173 | } |
174 | ||
da98c8eb | 175 | static void xen_suspend_notifier(Notifier *notifier, void *data) |
c9622478 | 176 | { |
da98c8eb | 177 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 3); |
c9622478 AP |
178 | } |
179 | ||
9c11a8ac AP |
180 | /* Xen Interrupt Controller */ |
181 | ||
182 | static void xen_set_irq(void *opaque, int irq, int level) | |
183 | { | |
184 | xc_hvm_set_isa_irq_level(xen_xc, xen_domid, irq, level); | |
185 | } | |
186 | ||
187 | qemu_irq *xen_interrupt_controller_init(void) | |
188 | { | |
189 | return qemu_allocate_irqs(xen_set_irq, NULL, 16); | |
190 | } | |
191 | ||
432d268c JN |
192 | /* Memory Ops */ |
193 | ||
91176e31 | 194 | static void xen_ram_init(PCMachineState *pcms, |
3c2a9669 | 195 | ram_addr_t ram_size, MemoryRegion **ram_memory_p) |
432d268c | 196 | { |
ce76b8a8 | 197 | MemoryRegion *sysmem = get_system_memory(); |
ce76b8a8 | 198 | ram_addr_t block_len; |
c4f5cdc5 DS |
199 | uint64_t user_lowmem = object_property_get_int(qdev_get_machine(), |
200 | PC_MACHINE_MAX_RAM_BELOW_4G, | |
201 | &error_abort); | |
432d268c | 202 | |
a9dd38db | 203 | /* Handle the machine opt max-ram-below-4g. It is basically doing |
c4f5cdc5 DS |
204 | * min(xen limit, user limit). |
205 | */ | |
206 | if (HVM_BELOW_4G_RAM_END <= user_lowmem) { | |
207 | user_lowmem = HVM_BELOW_4G_RAM_END; | |
8a369e20 | 208 | } |
432d268c | 209 | |
c4f5cdc5 | 210 | if (ram_size >= user_lowmem) { |
91176e31 EH |
211 | pcms->above_4g_mem_size = ram_size - user_lowmem; |
212 | pcms->below_4g_mem_size = user_lowmem; | |
432d268c | 213 | } else { |
91176e31 EH |
214 | pcms->above_4g_mem_size = 0; |
215 | pcms->below_4g_mem_size = ram_size; | |
432d268c | 216 | } |
91176e31 | 217 | if (!pcms->above_4g_mem_size) { |
c4f5cdc5 DS |
218 | block_len = ram_size; |
219 | } else { | |
220 | /* | |
221 | * Xen does not allocate the memory continuously, it keeps a | |
222 | * hole of the size computed above or passed in. | |
223 | */ | |
91176e31 | 224 | block_len = (1ULL << 32) + pcms->above_4g_mem_size; |
c4f5cdc5 | 225 | } |
49946538 | 226 | memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len, |
f8ed85ac | 227 | &error_fatal); |
c4f5cdc5 DS |
228 | *ram_memory_p = &ram_memory; |
229 | vmstate_register_ram_global(&ram_memory); | |
432d268c | 230 | |
2c9b15ca | 231 | memory_region_init_alias(&ram_640k, NULL, "xen.ram.640k", |
ce76b8a8 AK |
232 | &ram_memory, 0, 0xa0000); |
233 | memory_region_add_subregion(sysmem, 0, &ram_640k); | |
8a369e20 AP |
234 | /* Skip of the VGA IO memory space, it will be registered later by the VGA |
235 | * emulated device. | |
236 | * | |
237 | * The area between 0xc0000 and 0x100000 will be used by SeaBIOS to load | |
238 | * the Options ROM, so it is registered here as RAM. | |
239 | */ | |
2c9b15ca | 240 | memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo", |
3c2a9669 | 241 | &ram_memory, 0xc0000, |
91176e31 | 242 | pcms->below_4g_mem_size - 0xc0000); |
ce76b8a8 | 243 | memory_region_add_subregion(sysmem, 0xc0000, &ram_lo); |
91176e31 | 244 | if (pcms->above_4g_mem_size > 0) { |
2c9b15ca | 245 | memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi", |
ce76b8a8 | 246 | &ram_memory, 0x100000000ULL, |
91176e31 | 247 | pcms->above_4g_mem_size); |
ce76b8a8 | 248 | memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi); |
432d268c | 249 | } |
432d268c JN |
250 | } |
251 | ||
37aa7a0e MA |
252 | void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size, MemoryRegion *mr, |
253 | Error **errp) | |
432d268c JN |
254 | { |
255 | unsigned long nr_pfn; | |
256 | xen_pfn_t *pfn_list; | |
257 | int i; | |
258 | ||
c234572d AP |
259 | if (runstate_check(RUN_STATE_INMIGRATE)) { |
260 | /* RAM already populated in Xen */ | |
261 | fprintf(stderr, "%s: do not alloc "RAM_ADDR_FMT | |
262 | " bytes of ram at "RAM_ADDR_FMT" when runstate is INMIGRATE\n", | |
263 | __func__, size, ram_addr); | |
264 | return; | |
265 | } | |
266 | ||
ce76b8a8 AK |
267 | if (mr == &ram_memory) { |
268 | return; | |
269 | } | |
270 | ||
432d268c JN |
271 | trace_xen_ram_alloc(ram_addr, size); |
272 | ||
273 | nr_pfn = size >> TARGET_PAGE_BITS; | |
7267c094 | 274 | pfn_list = g_malloc(sizeof (*pfn_list) * nr_pfn); |
432d268c JN |
275 | |
276 | for (i = 0; i < nr_pfn; i++) { | |
277 | pfn_list[i] = (ram_addr >> TARGET_PAGE_BITS) + i; | |
278 | } | |
279 | ||
280 | if (xc_domain_populate_physmap_exact(xen_xc, xen_domid, nr_pfn, 0, 0, pfn_list)) { | |
37aa7a0e MA |
281 | error_setg(errp, "xen: failed to populate ram at " RAM_ADDR_FMT, |
282 | ram_addr); | |
432d268c JN |
283 | } |
284 | ||
7267c094 | 285 | g_free(pfn_list); |
432d268c JN |
286 | } |
287 | ||
b4dd7802 | 288 | static XenPhysmap *get_physmapping(XenIOState *state, |
a8170e5e | 289 | hwaddr start_addr, ram_addr_t size) |
b4dd7802 AP |
290 | { |
291 | XenPhysmap *physmap = NULL; | |
292 | ||
293 | start_addr &= TARGET_PAGE_MASK; | |
294 | ||
295 | QLIST_FOREACH(physmap, &state->physmap, list) { | |
296 | if (range_covers_byte(physmap->start_addr, physmap->size, start_addr)) { | |
297 | return physmap; | |
298 | } | |
299 | } | |
300 | return NULL; | |
301 | } | |
302 | ||
a8170e5e | 303 | static hwaddr xen_phys_offset_to_gaddr(hwaddr start_addr, |
cd1ba7de AP |
304 | ram_addr_t size, void *opaque) |
305 | { | |
a8170e5e | 306 | hwaddr addr = start_addr & TARGET_PAGE_MASK; |
cd1ba7de AP |
307 | XenIOState *xen_io_state = opaque; |
308 | XenPhysmap *physmap = NULL; | |
309 | ||
310 | QLIST_FOREACH(physmap, &xen_io_state->physmap, list) { | |
311 | if (range_covers_byte(physmap->phys_offset, physmap->size, addr)) { | |
312 | return physmap->start_addr; | |
313 | } | |
314 | } | |
315 | ||
316 | return start_addr; | |
317 | } | |
318 | ||
b4dd7802 AP |
319 | #if CONFIG_XEN_CTRL_INTERFACE_VERSION >= 340 |
320 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 321 | hwaddr start_addr, |
b4dd7802 | 322 | ram_addr_t size, |
20581d20 | 323 | MemoryRegion *mr, |
a8170e5e | 324 | hwaddr offset_within_region) |
b4dd7802 AP |
325 | { |
326 | unsigned long i = 0; | |
327 | int rc = 0; | |
328 | XenPhysmap *physmap = NULL; | |
a8170e5e AK |
329 | hwaddr pfn, start_gpfn; |
330 | hwaddr phys_offset = memory_region_get_ram_addr(mr); | |
d1814e08 | 331 | char path[80], value[17]; |
3e1f5086 | 332 | const char *mr_name; |
b4dd7802 AP |
333 | |
334 | if (get_physmapping(state, start_addr, size)) { | |
335 | return 0; | |
336 | } | |
337 | if (size <= 0) { | |
338 | return -1; | |
339 | } | |
340 | ||
ebed8505 SS |
341 | /* Xen can only handle a single dirty log region for now and we want |
342 | * the linear framebuffer to be that region. | |
343 | * Avoid tracking any regions that is not videoram and avoid tracking | |
344 | * the legacy vga region. */ | |
20581d20 AK |
345 | if (mr == framebuffer && start_addr > 0xbffff) { |
346 | goto go_physmap; | |
ebed8505 SS |
347 | } |
348 | return -1; | |
349 | ||
350 | go_physmap: | |
f1b8caf1 SE |
351 | DPRINTF("mapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx"\n", |
352 | start_addr, start_addr + size); | |
b4dd7802 AP |
353 | |
354 | pfn = phys_offset >> TARGET_PAGE_BITS; | |
355 | start_gpfn = start_addr >> TARGET_PAGE_BITS; | |
356 | for (i = 0; i < size >> TARGET_PAGE_BITS; i++) { | |
357 | unsigned long idx = pfn + i; | |
358 | xen_pfn_t gpfn = start_gpfn + i; | |
359 | ||
20a544c7 | 360 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
361 | if (rc) { |
362 | DPRINTF("add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 363 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
364 | return -rc; |
365 | } | |
366 | } | |
367 | ||
3e1f5086 PC |
368 | mr_name = memory_region_name(mr); |
369 | ||
7267c094 | 370 | physmap = g_malloc(sizeof (XenPhysmap)); |
b4dd7802 AP |
371 | |
372 | physmap->start_addr = start_addr; | |
373 | physmap->size = size; | |
3e1f5086 | 374 | physmap->name = mr_name; |
b4dd7802 AP |
375 | physmap->phys_offset = phys_offset; |
376 | ||
377 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
378 | ||
379 | xc_domain_pin_memory_cacheattr(xen_xc, xen_domid, | |
380 | start_addr >> TARGET_PAGE_BITS, | |
8b6bb0ad | 381 | (start_addr + size - 1) >> TARGET_PAGE_BITS, |
b4dd7802 | 382 | XEN_DOMCTL_MEM_CACHEATTR_WB); |
d1814e08 SS |
383 | |
384 | snprintf(path, sizeof(path), | |
385 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/start_addr", | |
386 | xen_domid, (uint64_t)phys_offset); | |
387 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)start_addr); | |
388 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
389 | return -1; | |
390 | } | |
391 | snprintf(path, sizeof(path), | |
392 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/size", | |
393 | xen_domid, (uint64_t)phys_offset); | |
394 | snprintf(value, sizeof(value), "%"PRIx64, (uint64_t)size); | |
395 | if (!xs_write(state->xenstore, 0, path, value, strlen(value))) { | |
396 | return -1; | |
397 | } | |
3e1f5086 | 398 | if (mr_name) { |
d1814e08 SS |
399 | snprintf(path, sizeof(path), |
400 | "/local/domain/0/device-model/%d/physmap/%"PRIx64"/name", | |
401 | xen_domid, (uint64_t)phys_offset); | |
3e1f5086 | 402 | if (!xs_write(state->xenstore, 0, path, mr_name, strlen(mr_name))) { |
d1814e08 SS |
403 | return -1; |
404 | } | |
405 | } | |
406 | ||
b4dd7802 AP |
407 | return 0; |
408 | } | |
409 | ||
410 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 411 | hwaddr start_addr, |
b4dd7802 AP |
412 | ram_addr_t size) |
413 | { | |
414 | unsigned long i = 0; | |
415 | int rc = 0; | |
416 | XenPhysmap *physmap = NULL; | |
a8170e5e | 417 | hwaddr phys_offset = 0; |
b4dd7802 AP |
418 | |
419 | physmap = get_physmapping(state, start_addr, size); | |
420 | if (physmap == NULL) { | |
421 | return -1; | |
422 | } | |
423 | ||
424 | phys_offset = physmap->phys_offset; | |
425 | size = physmap->size; | |
426 | ||
d18e173a WL |
427 | DPRINTF("unmapping vram to %"HWADDR_PRIx" - %"HWADDR_PRIx", at " |
428 | "%"HWADDR_PRIx"\n", start_addr, start_addr + size, phys_offset); | |
b4dd7802 AP |
429 | |
430 | size >>= TARGET_PAGE_BITS; | |
431 | start_addr >>= TARGET_PAGE_BITS; | |
432 | phys_offset >>= TARGET_PAGE_BITS; | |
433 | for (i = 0; i < size; i++) { | |
643f5932 | 434 | xen_pfn_t idx = start_addr + i; |
b4dd7802 AP |
435 | xen_pfn_t gpfn = phys_offset + i; |
436 | ||
20a544c7 | 437 | rc = xen_xc_domain_add_to_physmap(xen_xc, xen_domid, XENMAPSPACE_gmfn, idx, gpfn); |
b4dd7802 AP |
438 | if (rc) { |
439 | fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %" | |
e763addd | 440 | PRI_xen_pfn" failed: %d (errno: %d)\n", idx, gpfn, rc, errno); |
b4dd7802 AP |
441 | return -rc; |
442 | } | |
443 | } | |
444 | ||
445 | QLIST_REMOVE(physmap, list); | |
446 | if (state->log_for_dirtybit == physmap) { | |
447 | state->log_for_dirtybit = NULL; | |
448 | } | |
c5633d99 | 449 | g_free(physmap); |
b4dd7802 AP |
450 | |
451 | return 0; | |
452 | } | |
453 | ||
454 | #else | |
455 | static int xen_add_to_physmap(XenIOState *state, | |
a8170e5e | 456 | hwaddr start_addr, |
b4dd7802 | 457 | ram_addr_t size, |
20581d20 | 458 | MemoryRegion *mr, |
a8170e5e | 459 | hwaddr offset_within_region) |
b4dd7802 AP |
460 | { |
461 | return -ENOSYS; | |
462 | } | |
463 | ||
464 | static int xen_remove_from_physmap(XenIOState *state, | |
a8170e5e | 465 | hwaddr start_addr, |
b4dd7802 AP |
466 | ram_addr_t size) |
467 | { | |
468 | return -ENOSYS; | |
469 | } | |
470 | #endif | |
471 | ||
20581d20 AK |
472 | static void xen_set_memory(struct MemoryListener *listener, |
473 | MemoryRegionSection *section, | |
474 | bool add) | |
b4dd7802 | 475 | { |
20581d20 | 476 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
a8170e5e | 477 | hwaddr start_addr = section->offset_within_address_space; |
052e87b0 | 478 | ram_addr_t size = int128_get64(section->size); |
2d1a35be | 479 | bool log_dirty = memory_region_is_logging(section->mr, DIRTY_MEMORY_VGA); |
b4dd7802 AP |
480 | hvmmem_type_t mem_type; |
481 | ||
3996e85c PD |
482 | if (section->mr == &ram_memory) { |
483 | return; | |
484 | } else { | |
485 | if (add) { | |
486 | xen_map_memory_section(xen_xc, xen_domid, state->ioservid, | |
487 | section); | |
488 | } else { | |
489 | xen_unmap_memory_section(xen_xc, xen_domid, state->ioservid, | |
490 | section); | |
491 | } | |
492 | } | |
493 | ||
20581d20 | 494 | if (!memory_region_is_ram(section->mr)) { |
b4dd7802 AP |
495 | return; |
496 | } | |
497 | ||
3996e85c | 498 | if (log_dirty != add) { |
20581d20 AK |
499 | return; |
500 | } | |
501 | ||
502 | trace_xen_client_set_memory(start_addr, size, log_dirty); | |
b4dd7802 AP |
503 | |
504 | start_addr &= TARGET_PAGE_MASK; | |
505 | size = TARGET_PAGE_ALIGN(size); | |
20581d20 AK |
506 | |
507 | if (add) { | |
508 | if (!memory_region_is_rom(section->mr)) { | |
509 | xen_add_to_physmap(state, start_addr, size, | |
510 | section->mr, section->offset_within_region); | |
511 | } else { | |
512 | mem_type = HVMMEM_ram_ro; | |
513 | if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, | |
514 | start_addr >> TARGET_PAGE_BITS, | |
515 | size >> TARGET_PAGE_BITS)) { | |
516 | DPRINTF("xc_hvm_set_mem_type error, addr: "TARGET_FMT_plx"\n", | |
517 | start_addr); | |
518 | } | |
b4dd7802 | 519 | } |
20581d20 | 520 | } else { |
b4dd7802 AP |
521 | if (xen_remove_from_physmap(state, start_addr, size) < 0) { |
522 | DPRINTF("physmapping does not exist at "TARGET_FMT_plx"\n", start_addr); | |
523 | } | |
b4dd7802 AP |
524 | } |
525 | } | |
526 | ||
20581d20 AK |
527 | static void xen_region_add(MemoryListener *listener, |
528 | MemoryRegionSection *section) | |
529 | { | |
dfde4e6e | 530 | memory_region_ref(section->mr); |
20581d20 AK |
531 | xen_set_memory(listener, section, true); |
532 | } | |
533 | ||
534 | static void xen_region_del(MemoryListener *listener, | |
535 | MemoryRegionSection *section) | |
536 | { | |
537 | xen_set_memory(listener, section, false); | |
dfde4e6e | 538 | memory_region_unref(section->mr); |
20581d20 AK |
539 | } |
540 | ||
3996e85c PD |
541 | static void xen_io_add(MemoryListener *listener, |
542 | MemoryRegionSection *section) | |
543 | { | |
544 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
545 | ||
546 | memory_region_ref(section->mr); | |
547 | ||
548 | xen_map_io_section(xen_xc, xen_domid, state->ioservid, section); | |
549 | } | |
550 | ||
551 | static void xen_io_del(MemoryListener *listener, | |
552 | MemoryRegionSection *section) | |
553 | { | |
554 | XenIOState *state = container_of(listener, XenIOState, io_listener); | |
555 | ||
556 | xen_unmap_io_section(xen_xc, xen_domid, state->ioservid, section); | |
557 | ||
558 | memory_region_unref(section->mr); | |
559 | } | |
560 | ||
561 | static void xen_device_realize(DeviceListener *listener, | |
562 | DeviceState *dev) | |
563 | { | |
564 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
565 | ||
566 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
567 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
568 | ||
569 | xen_map_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
570 | } | |
571 | } | |
572 | ||
573 | static void xen_device_unrealize(DeviceListener *listener, | |
574 | DeviceState *dev) | |
575 | { | |
576 | XenIOState *state = container_of(listener, XenIOState, device_listener); | |
577 | ||
578 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
579 | PCIDevice *pci_dev = PCI_DEVICE(dev); | |
580 | ||
581 | xen_unmap_pcidev(xen_xc, xen_domid, state->ioservid, pci_dev); | |
582 | } | |
583 | } | |
584 | ||
b18620cf | 585 | static void xen_sync_dirty_bitmap(XenIOState *state, |
a8170e5e | 586 | hwaddr start_addr, |
b18620cf | 587 | ram_addr_t size) |
b4dd7802 | 588 | { |
a8170e5e | 589 | hwaddr npages = size >> TARGET_PAGE_BITS; |
b4dd7802 AP |
590 | const int width = sizeof(unsigned long) * 8; |
591 | unsigned long bitmap[(npages + width - 1) / width]; | |
592 | int rc, i, j; | |
593 | const XenPhysmap *physmap = NULL; | |
594 | ||
595 | physmap = get_physmapping(state, start_addr, size); | |
596 | if (physmap == NULL) { | |
597 | /* not handled */ | |
b18620cf | 598 | return; |
b4dd7802 AP |
599 | } |
600 | ||
601 | if (state->log_for_dirtybit == NULL) { | |
602 | state->log_for_dirtybit = physmap; | |
603 | } else if (state->log_for_dirtybit != physmap) { | |
b18620cf AP |
604 | /* Only one range for dirty bitmap can be tracked. */ |
605 | return; | |
b4dd7802 | 606 | } |
b4dd7802 AP |
607 | |
608 | rc = xc_hvm_track_dirty_vram(xen_xc, xen_domid, | |
609 | start_addr >> TARGET_PAGE_BITS, npages, | |
610 | bitmap); | |
b18620cf | 611 | if (rc < 0) { |
74bc4151 RPM |
612 | #ifndef ENODATA |
613 | #define ENODATA ENOENT | |
614 | #endif | |
615 | if (errno == ENODATA) { | |
8aba7dc0 AP |
616 | memory_region_set_dirty(framebuffer, 0, size); |
617 | DPRINTF("xen: track_dirty_vram failed (0x" TARGET_FMT_plx | |
b18620cf | 618 | ", 0x" TARGET_FMT_plx "): %s\n", |
74bc4151 | 619 | start_addr, start_addr + size, strerror(errno)); |
b18620cf AP |
620 | } |
621 | return; | |
b4dd7802 AP |
622 | } |
623 | ||
624 | for (i = 0; i < ARRAY_SIZE(bitmap); i++) { | |
625 | unsigned long map = bitmap[i]; | |
626 | while (map != 0) { | |
adf9d70b | 627 | j = ctzl(map); |
b4dd7802 | 628 | map &= ~(1ul << j); |
5a97065b | 629 | memory_region_set_dirty(framebuffer, |
fd4aa979 BS |
630 | (i * width + j) * TARGET_PAGE_SIZE, |
631 | TARGET_PAGE_SIZE); | |
b4dd7802 AP |
632 | }; |
633 | } | |
b4dd7802 AP |
634 | } |
635 | ||
20581d20 | 636 | static void xen_log_start(MemoryListener *listener, |
b2dfd71c PB |
637 | MemoryRegionSection *section, |
638 | int old, int new) | |
b4dd7802 | 639 | { |
20581d20 | 640 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 641 | |
b2dfd71c PB |
642 | if (new & ~old & (1 << DIRTY_MEMORY_VGA)) { |
643 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, | |
644 | int128_get64(section->size)); | |
645 | } | |
b4dd7802 AP |
646 | } |
647 | ||
b2dfd71c PB |
648 | static void xen_log_stop(MemoryListener *listener, MemoryRegionSection *section, |
649 | int old, int new) | |
b4dd7802 | 650 | { |
20581d20 | 651 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 652 | |
b2dfd71c PB |
653 | if (old & ~new & (1 << DIRTY_MEMORY_VGA)) { |
654 | state->log_for_dirtybit = NULL; | |
655 | /* Disable dirty bit tracking */ | |
656 | xc_hvm_track_dirty_vram(xen_xc, xen_domid, 0, 0, NULL); | |
657 | } | |
b4dd7802 AP |
658 | } |
659 | ||
20581d20 | 660 | static void xen_log_sync(MemoryListener *listener, MemoryRegionSection *section) |
b4dd7802 | 661 | { |
20581d20 | 662 | XenIOState *state = container_of(listener, XenIOState, memory_listener); |
b4dd7802 | 663 | |
b18620cf | 664 | xen_sync_dirty_bitmap(state, section->offset_within_address_space, |
052e87b0 | 665 | int128_get64(section->size)); |
b4dd7802 AP |
666 | } |
667 | ||
20581d20 AK |
668 | static void xen_log_global_start(MemoryListener *listener) |
669 | { | |
39f42439 AP |
670 | if (xen_enabled()) { |
671 | xen_in_migration = true; | |
672 | } | |
20581d20 AK |
673 | } |
674 | ||
675 | static void xen_log_global_stop(MemoryListener *listener) | |
b4dd7802 | 676 | { |
39f42439 | 677 | xen_in_migration = false; |
b4dd7802 AP |
678 | } |
679 | ||
20581d20 AK |
680 | static MemoryListener xen_memory_listener = { |
681 | .region_add = xen_region_add, | |
682 | .region_del = xen_region_del, | |
b4dd7802 AP |
683 | .log_start = xen_log_start, |
684 | .log_stop = xen_log_stop, | |
20581d20 AK |
685 | .log_sync = xen_log_sync, |
686 | .log_global_start = xen_log_global_start, | |
687 | .log_global_stop = xen_log_global_stop, | |
72e22d2f | 688 | .priority = 10, |
b4dd7802 | 689 | }; |
432d268c | 690 | |
3996e85c PD |
691 | static MemoryListener xen_io_listener = { |
692 | .region_add = xen_io_add, | |
693 | .region_del = xen_io_del, | |
694 | .priority = 10, | |
695 | }; | |
696 | ||
697 | static DeviceListener xen_device_listener = { | |
698 | .realize = xen_device_realize, | |
699 | .unrealize = xen_device_unrealize, | |
700 | }; | |
701 | ||
9ce94e7c AS |
702 | /* get the ioreq packets from share mem */ |
703 | static ioreq_t *cpu_get_ioreq_from_shared_memory(XenIOState *state, int vcpu) | |
704 | { | |
705 | ioreq_t *req = xen_vcpu_ioreq(state->shared_page, vcpu); | |
706 | ||
707 | if (req->state != STATE_IOREQ_READY) { | |
708 | DPRINTF("I/O request not ready: " | |
709 | "%x, ptr: %x, port: %"PRIx64", " | |
710 | "data: %"PRIx64", count: %" FMT_ioreq_size ", size: %" FMT_ioreq_size "\n", | |
711 | req->state, req->data_is_ptr, req->addr, | |
712 | req->data, req->count, req->size); | |
713 | return NULL; | |
714 | } | |
715 | ||
716 | xen_rmb(); /* see IOREQ_READY /then/ read contents of ioreq */ | |
717 | ||
718 | req->state = STATE_IOREQ_INPROCESS; | |
719 | return req; | |
720 | } | |
721 | ||
722 | /* use poll to get the port notification */ | |
723 | /* ioreq_vec--out,the */ | |
724 | /* retval--the number of ioreq packet */ | |
725 | static ioreq_t *cpu_get_ioreq(XenIOState *state) | |
726 | { | |
727 | int i; | |
728 | evtchn_port_t port; | |
729 | ||
a2db2a1e | 730 | port = xenevtchn_pending(state->xce_handle); |
fda1f768 | 731 | if (port == state->bufioreq_local_port) { |
bc72ad67 AB |
732 | timer_mod(state->buffered_io_timer, |
733 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 SS |
734 | return NULL; |
735 | } | |
736 | ||
9ce94e7c | 737 | if (port != -1) { |
1cd25a88 | 738 | for (i = 0; i < max_cpus; i++) { |
9ce94e7c AS |
739 | if (state->ioreq_local_port[i] == port) { |
740 | break; | |
741 | } | |
742 | } | |
743 | ||
1cd25a88 | 744 | if (i == max_cpus) { |
9ce94e7c AS |
745 | hw_error("Fatal error while trying to get io event!\n"); |
746 | } | |
747 | ||
748 | /* unmask the wanted port again */ | |
a2db2a1e | 749 | xenevtchn_unmask(state->xce_handle, port); |
9ce94e7c AS |
750 | |
751 | /* get the io packet from shared memory */ | |
752 | state->send_vcpu = i; | |
753 | return cpu_get_ioreq_from_shared_memory(state, i); | |
754 | } | |
755 | ||
756 | /* read error or read nothing */ | |
757 | return NULL; | |
758 | } | |
759 | ||
760 | static uint32_t do_inp(pio_addr_t addr, unsigned long size) | |
761 | { | |
762 | switch (size) { | |
763 | case 1: | |
764 | return cpu_inb(addr); | |
765 | case 2: | |
766 | return cpu_inw(addr); | |
767 | case 4: | |
768 | return cpu_inl(addr); | |
769 | default: | |
770 | hw_error("inp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
771 | } | |
772 | } | |
773 | ||
774 | static void do_outp(pio_addr_t addr, | |
775 | unsigned long size, uint32_t val) | |
776 | { | |
777 | switch (size) { | |
778 | case 1: | |
779 | return cpu_outb(addr, val); | |
780 | case 2: | |
781 | return cpu_outw(addr, val); | |
782 | case 4: | |
783 | return cpu_outl(addr, val); | |
784 | default: | |
785 | hw_error("outp: bad size: %04"FMT_pioaddr" %lx", addr, size); | |
786 | } | |
787 | } | |
788 | ||
a3864829 IJ |
789 | /* |
790 | * Helper functions which read/write an object from/to physical guest | |
791 | * memory, as part of the implementation of an ioreq. | |
792 | * | |
793 | * Equivalent to | |
794 | * cpu_physical_memory_rw(addr + (req->df ? -1 : +1) * req->size * i, | |
795 | * val, req->size, 0/1) | |
796 | * except without the integer overflow problems. | |
797 | */ | |
798 | static void rw_phys_req_item(hwaddr addr, | |
799 | ioreq_t *req, uint32_t i, void *val, int rw) | |
800 | { | |
801 | /* Do everything unsigned so overflow just results in a truncated result | |
802 | * and accesses to undesired parts of guest memory, which is up | |
803 | * to the guest */ | |
804 | hwaddr offset = (hwaddr)req->size * i; | |
805 | if (req->df) { | |
806 | addr -= offset; | |
807 | } else { | |
808 | addr += offset; | |
809 | } | |
810 | cpu_physical_memory_rw(addr, val, req->size, rw); | |
811 | } | |
812 | ||
813 | static inline void read_phys_req_item(hwaddr addr, | |
814 | ioreq_t *req, uint32_t i, void *val) | |
9ce94e7c | 815 | { |
a3864829 IJ |
816 | rw_phys_req_item(addr, req, i, val, 0); |
817 | } | |
818 | static inline void write_phys_req_item(hwaddr addr, | |
819 | ioreq_t *req, uint32_t i, void *val) | |
820 | { | |
821 | rw_phys_req_item(addr, req, i, val, 1); | |
822 | } | |
9ce94e7c | 823 | |
a3864829 IJ |
824 | |
825 | static void cpu_ioreq_pio(ioreq_t *req) | |
826 | { | |
249e7e0f | 827 | uint32_t i; |
9ce94e7c | 828 | |
eeb6b13a DS |
829 | trace_cpu_ioreq_pio(req, req->dir, req->df, req->data_is_ptr, req->addr, |
830 | req->data, req->count, req->size); | |
831 | ||
9ce94e7c AS |
832 | if (req->dir == IOREQ_READ) { |
833 | if (!req->data_is_ptr) { | |
834 | req->data = do_inp(req->addr, req->size); | |
eeb6b13a DS |
835 | trace_cpu_ioreq_pio_read_reg(req, req->data, req->addr, |
836 | req->size); | |
9ce94e7c AS |
837 | } else { |
838 | uint32_t tmp; | |
839 | ||
840 | for (i = 0; i < req->count; i++) { | |
841 | tmp = do_inp(req->addr, req->size); | |
a3864829 | 842 | write_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
843 | } |
844 | } | |
845 | } else if (req->dir == IOREQ_WRITE) { | |
846 | if (!req->data_is_ptr) { | |
eeb6b13a DS |
847 | trace_cpu_ioreq_pio_write_reg(req, req->data, req->addr, |
848 | req->size); | |
9ce94e7c AS |
849 | do_outp(req->addr, req->size, req->data); |
850 | } else { | |
851 | for (i = 0; i < req->count; i++) { | |
852 | uint32_t tmp = 0; | |
853 | ||
a3864829 | 854 | read_phys_req_item(req->data, req, i, &tmp); |
9ce94e7c AS |
855 | do_outp(req->addr, req->size, tmp); |
856 | } | |
857 | } | |
858 | } | |
859 | } | |
860 | ||
861 | static void cpu_ioreq_move(ioreq_t *req) | |
862 | { | |
249e7e0f | 863 | uint32_t i; |
9ce94e7c | 864 | |
eeb6b13a DS |
865 | trace_cpu_ioreq_move(req, req->dir, req->df, req->data_is_ptr, req->addr, |
866 | req->data, req->count, req->size); | |
867 | ||
9ce94e7c AS |
868 | if (!req->data_is_ptr) { |
869 | if (req->dir == IOREQ_READ) { | |
870 | for (i = 0; i < req->count; i++) { | |
a3864829 | 871 | read_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
872 | } |
873 | } else if (req->dir == IOREQ_WRITE) { | |
874 | for (i = 0; i < req->count; i++) { | |
a3864829 | 875 | write_phys_req_item(req->addr, req, i, &req->data); |
9ce94e7c AS |
876 | } |
877 | } | |
878 | } else { | |
2b734340 | 879 | uint64_t tmp; |
9ce94e7c AS |
880 | |
881 | if (req->dir == IOREQ_READ) { | |
882 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
883 | read_phys_req_item(req->addr, req, i, &tmp); |
884 | write_phys_req_item(req->data, req, i, &tmp); | |
9ce94e7c AS |
885 | } |
886 | } else if (req->dir == IOREQ_WRITE) { | |
887 | for (i = 0; i < req->count; i++) { | |
a3864829 IJ |
888 | read_phys_req_item(req->data, req, i, &tmp); |
889 | write_phys_req_item(req->addr, req, i, &tmp); | |
9ce94e7c AS |
890 | } |
891 | } | |
892 | } | |
893 | } | |
894 | ||
37f9e258 DS |
895 | static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t *req) |
896 | { | |
897 | X86CPU *cpu; | |
898 | CPUX86State *env; | |
899 | ||
900 | cpu = X86_CPU(current_cpu); | |
901 | env = &cpu->env; | |
902 | env->regs[R_EAX] = req->data; | |
903 | env->regs[R_EBX] = vmport_regs->ebx; | |
904 | env->regs[R_ECX] = vmport_regs->ecx; | |
905 | env->regs[R_EDX] = vmport_regs->edx; | |
906 | env->regs[R_ESI] = vmport_regs->esi; | |
907 | env->regs[R_EDI] = vmport_regs->edi; | |
908 | } | |
909 | ||
910 | static void regs_from_cpu(vmware_regs_t *vmport_regs) | |
911 | { | |
912 | X86CPU *cpu = X86_CPU(current_cpu); | |
913 | CPUX86State *env = &cpu->env; | |
914 | ||
915 | vmport_regs->ebx = env->regs[R_EBX]; | |
916 | vmport_regs->ecx = env->regs[R_ECX]; | |
917 | vmport_regs->edx = env->regs[R_EDX]; | |
918 | vmport_regs->esi = env->regs[R_ESI]; | |
919 | vmport_regs->edi = env->regs[R_EDI]; | |
920 | } | |
921 | ||
922 | static void handle_vmport_ioreq(XenIOState *state, ioreq_t *req) | |
923 | { | |
924 | vmware_regs_t *vmport_regs; | |
925 | ||
926 | assert(state->shared_vmport_page); | |
927 | vmport_regs = | |
928 | &state->shared_vmport_page->vcpu_vmport_regs[state->send_vcpu]; | |
929 | QEMU_BUILD_BUG_ON(sizeof(*req) < sizeof(*vmport_regs)); | |
930 | ||
931 | current_cpu = state->cpu_by_vcpu_id[state->send_vcpu]; | |
932 | regs_to_cpu(vmport_regs, req); | |
933 | cpu_ioreq_pio(req); | |
934 | regs_from_cpu(vmport_regs); | |
935 | current_cpu = NULL; | |
936 | } | |
937 | ||
938 | static void handle_ioreq(XenIOState *state, ioreq_t *req) | |
9ce94e7c | 939 | { |
eeb6b13a DS |
940 | trace_handle_ioreq(req, req->type, req->dir, req->df, req->data_is_ptr, |
941 | req->addr, req->data, req->count, req->size); | |
942 | ||
9ce94e7c AS |
943 | if (!req->data_is_ptr && (req->dir == IOREQ_WRITE) && |
944 | (req->size < sizeof (target_ulong))) { | |
945 | req->data &= ((target_ulong) 1 << (8 * req->size)) - 1; | |
946 | } | |
947 | ||
eeb6b13a DS |
948 | if (req->dir == IOREQ_WRITE) |
949 | trace_handle_ioreq_write(req, req->type, req->df, req->data_is_ptr, | |
950 | req->addr, req->data, req->count, req->size); | |
951 | ||
9ce94e7c AS |
952 | switch (req->type) { |
953 | case IOREQ_TYPE_PIO: | |
954 | cpu_ioreq_pio(req); | |
955 | break; | |
956 | case IOREQ_TYPE_COPY: | |
957 | cpu_ioreq_move(req); | |
958 | break; | |
37f9e258 DS |
959 | case IOREQ_TYPE_VMWARE_PORT: |
960 | handle_vmport_ioreq(state, req); | |
961 | break; | |
9ce94e7c AS |
962 | case IOREQ_TYPE_TIMEOFFSET: |
963 | break; | |
964 | case IOREQ_TYPE_INVALIDATE: | |
e41d7c69 | 965 | xen_invalidate_map_cache(); |
9ce94e7c | 966 | break; |
3996e85c PD |
967 | case IOREQ_TYPE_PCI_CONFIG: { |
968 | uint32_t sbdf = req->addr >> 32; | |
969 | uint32_t val; | |
970 | ||
971 | /* Fake a write to port 0xCF8 so that | |
972 | * the config space access will target the | |
973 | * correct device model. | |
974 | */ | |
975 | val = (1u << 31) | | |
976 | ((req->addr & 0x0f00) << 16) | | |
977 | ((sbdf & 0xffff) << 8) | | |
978 | (req->addr & 0xfc); | |
979 | do_outp(0xcf8, 4, val); | |
980 | ||
981 | /* Now issue the config space access via | |
982 | * port 0xCFC | |
983 | */ | |
984 | req->addr = 0xcfc | (req->addr & 0x03); | |
985 | cpu_ioreq_pio(req); | |
986 | break; | |
987 | } | |
9ce94e7c AS |
988 | default: |
989 | hw_error("Invalid ioreq type 0x%x\n", req->type); | |
990 | } | |
eeb6b13a DS |
991 | if (req->dir == IOREQ_READ) { |
992 | trace_handle_ioreq_read(req, req->type, req->df, req->data_is_ptr, | |
993 | req->addr, req->data, req->count, req->size); | |
994 | } | |
9ce94e7c AS |
995 | } |
996 | ||
fda1f768 | 997 | static int handle_buffered_iopage(XenIOState *state) |
9ce94e7c | 998 | { |
d8b441a3 | 999 | buffered_iopage_t *buf_page = state->buffered_io_page; |
9ce94e7c AS |
1000 | buf_ioreq_t *buf_req = NULL; |
1001 | ioreq_t req; | |
1002 | int qw; | |
1003 | ||
d8b441a3 | 1004 | if (!buf_page) { |
fda1f768 | 1005 | return 0; |
9ce94e7c AS |
1006 | } |
1007 | ||
fda1f768 SS |
1008 | memset(&req, 0x00, sizeof(req)); |
1009 | ||
d8b441a3 JB |
1010 | for (;;) { |
1011 | uint32_t rdptr = buf_page->read_pointer, wrptr; | |
1012 | ||
1013 | xen_rmb(); | |
1014 | wrptr = buf_page->write_pointer; | |
1015 | xen_rmb(); | |
1016 | if (rdptr != buf_page->read_pointer) { | |
1017 | continue; | |
1018 | } | |
1019 | if (rdptr == wrptr) { | |
1020 | break; | |
1021 | } | |
1022 | buf_req = &buf_page->buf_ioreq[rdptr % IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1023 | req.size = 1UL << buf_req->size; |
1024 | req.count = 1; | |
1025 | req.addr = buf_req->addr; | |
1026 | req.data = buf_req->data; | |
1027 | req.state = STATE_IOREQ_READY; | |
1028 | req.dir = buf_req->dir; | |
1029 | req.df = 1; | |
1030 | req.type = buf_req->type; | |
1031 | req.data_is_ptr = 0; | |
1032 | qw = (req.size == 8); | |
1033 | if (qw) { | |
d8b441a3 JB |
1034 | buf_req = &buf_page->buf_ioreq[(rdptr + 1) % |
1035 | IOREQ_BUFFER_SLOT_NUM]; | |
9ce94e7c AS |
1036 | req.data |= ((uint64_t)buf_req->data) << 32; |
1037 | } | |
1038 | ||
37f9e258 | 1039 | handle_ioreq(state, &req); |
9ce94e7c | 1040 | |
d8b441a3 | 1041 | atomic_add(&buf_page->read_pointer, qw + 1); |
9ce94e7c | 1042 | } |
fda1f768 SS |
1043 | |
1044 | return req.count; | |
9ce94e7c AS |
1045 | } |
1046 | ||
1047 | static void handle_buffered_io(void *opaque) | |
1048 | { | |
1049 | XenIOState *state = opaque; | |
1050 | ||
fda1f768 | 1051 | if (handle_buffered_iopage(state)) { |
bc72ad67 AB |
1052 | timer_mod(state->buffered_io_timer, |
1053 | BUFFER_IO_MAX_DELAY + qemu_clock_get_ms(QEMU_CLOCK_REALTIME)); | |
fda1f768 | 1054 | } else { |
bc72ad67 | 1055 | timer_del(state->buffered_io_timer); |
a2db2a1e | 1056 | xenevtchn_unmask(state->xce_handle, state->bufioreq_local_port); |
fda1f768 | 1057 | } |
9ce94e7c AS |
1058 | } |
1059 | ||
1060 | static void cpu_handle_ioreq(void *opaque) | |
1061 | { | |
1062 | XenIOState *state = opaque; | |
1063 | ioreq_t *req = cpu_get_ioreq(state); | |
1064 | ||
1065 | handle_buffered_iopage(state); | |
1066 | if (req) { | |
37f9e258 | 1067 | handle_ioreq(state, req); |
9ce94e7c AS |
1068 | |
1069 | if (req->state != STATE_IOREQ_INPROCESS) { | |
1070 | fprintf(stderr, "Badness in I/O request ... not in service?!: " | |
1071 | "%x, ptr: %x, port: %"PRIx64", " | |
37f9e258 DS |
1072 | "data: %"PRIx64", count: %" FMT_ioreq_size |
1073 | ", size: %" FMT_ioreq_size | |
1074 | ", type: %"FMT_ioreq_size"\n", | |
9ce94e7c | 1075 | req->state, req->data_is_ptr, req->addr, |
37f9e258 | 1076 | req->data, req->count, req->size, req->type); |
180640ea | 1077 | destroy_hvm_domain(false); |
9ce94e7c AS |
1078 | return; |
1079 | } | |
1080 | ||
1081 | xen_wmb(); /* Update ioreq contents /then/ update state. */ | |
1082 | ||
1083 | /* | |
1084 | * We do this before we send the response so that the tools | |
1085 | * have the opportunity to pick up on the reset before the | |
1086 | * guest resumes and does a hlt with interrupts disabled which | |
1087 | * causes Xen to powerdown the domain. | |
1088 | */ | |
1354869c | 1089 | if (runstate_is_running()) { |
9ce94e7c | 1090 | if (qemu_shutdown_requested_get()) { |
180640ea | 1091 | destroy_hvm_domain(false); |
9ce94e7c AS |
1092 | } |
1093 | if (qemu_reset_requested_get()) { | |
e063eb1f | 1094 | qemu_system_reset(VMRESET_REPORT); |
180640ea | 1095 | destroy_hvm_domain(true); |
9ce94e7c AS |
1096 | } |
1097 | } | |
1098 | ||
1099 | req->state = STATE_IORESP_READY; | |
a2db2a1e IC |
1100 | xenevtchn_notify(state->xce_handle, |
1101 | state->ioreq_local_port[state->send_vcpu]); | |
9ce94e7c AS |
1102 | } |
1103 | } | |
1104 | ||
1105 | static void xen_main_loop_prepare(XenIOState *state) | |
1106 | { | |
1107 | int evtchn_fd = -1; | |
1108 | ||
a2db2a1e IC |
1109 | if (state->xce_handle != NULL) { |
1110 | evtchn_fd = xenevtchn_fd(state->xce_handle); | |
9ce94e7c AS |
1111 | } |
1112 | ||
bc72ad67 | 1113 | state->buffered_io_timer = timer_new_ms(QEMU_CLOCK_REALTIME, handle_buffered_io, |
9ce94e7c | 1114 | state); |
9ce94e7c AS |
1115 | |
1116 | if (evtchn_fd != -1) { | |
37f9e258 DS |
1117 | CPUState *cpu_state; |
1118 | ||
1119 | DPRINTF("%s: Init cpu_by_vcpu_id\n", __func__); | |
1120 | CPU_FOREACH(cpu_state) { | |
1121 | DPRINTF("%s: cpu_by_vcpu_id[%d]=%p\n", | |
1122 | __func__, cpu_state->cpu_index, cpu_state); | |
1123 | state->cpu_by_vcpu_id[cpu_state->cpu_index] = cpu_state; | |
1124 | } | |
9ce94e7c AS |
1125 | qemu_set_fd_handler(evtchn_fd, cpu_handle_ioreq, NULL, state); |
1126 | } | |
1127 | } | |
1128 | ||
1129 | ||
1dfb4dd9 LC |
1130 | static void xen_hvm_change_state_handler(void *opaque, int running, |
1131 | RunState rstate) | |
9ce94e7c | 1132 | { |
3996e85c PD |
1133 | XenIOState *state = opaque; |
1134 | ||
9ce94e7c | 1135 | if (running) { |
3996e85c | 1136 | xen_main_loop_prepare(state); |
9ce94e7c | 1137 | } |
3996e85c PD |
1138 | |
1139 | xen_set_ioreq_server_state(xen_xc, xen_domid, | |
1140 | state->ioservid, | |
1141 | (rstate == RUN_STATE_RUNNING)); | |
9ce94e7c AS |
1142 | } |
1143 | ||
9e8dd451 | 1144 | static void xen_exit_notifier(Notifier *n, void *data) |
9ce94e7c AS |
1145 | { |
1146 | XenIOState *state = container_of(n, XenIOState, exit); | |
1147 | ||
a2db2a1e | 1148 | xenevtchn_close(state->xce_handle); |
29321335 | 1149 | xs_daemon_close(state->xenstore); |
9ce94e7c AS |
1150 | } |
1151 | ||
d1814e08 SS |
1152 | static void xen_read_physmap(XenIOState *state) |
1153 | { | |
1154 | XenPhysmap *physmap = NULL; | |
1155 | unsigned int len, num, i; | |
1156 | char path[80], *value = NULL; | |
1157 | char **entries = NULL; | |
1158 | ||
1159 | snprintf(path, sizeof(path), | |
1160 | "/local/domain/0/device-model/%d/physmap", xen_domid); | |
1161 | entries = xs_directory(state->xenstore, 0, path, &num); | |
1162 | if (entries == NULL) | |
1163 | return; | |
1164 | ||
1165 | for (i = 0; i < num; i++) { | |
1166 | physmap = g_malloc(sizeof (XenPhysmap)); | |
1167 | physmap->phys_offset = strtoull(entries[i], NULL, 16); | |
1168 | snprintf(path, sizeof(path), | |
1169 | "/local/domain/0/device-model/%d/physmap/%s/start_addr", | |
1170 | xen_domid, entries[i]); | |
1171 | value = xs_read(state->xenstore, 0, path, &len); | |
1172 | if (value == NULL) { | |
c5633d99 | 1173 | g_free(physmap); |
d1814e08 SS |
1174 | continue; |
1175 | } | |
1176 | physmap->start_addr = strtoull(value, NULL, 16); | |
1177 | free(value); | |
1178 | ||
1179 | snprintf(path, sizeof(path), | |
1180 | "/local/domain/0/device-model/%d/physmap/%s/size", | |
1181 | xen_domid, entries[i]); | |
1182 | value = xs_read(state->xenstore, 0, path, &len); | |
1183 | if (value == NULL) { | |
c5633d99 | 1184 | g_free(physmap); |
d1814e08 SS |
1185 | continue; |
1186 | } | |
1187 | physmap->size = strtoull(value, NULL, 16); | |
1188 | free(value); | |
1189 | ||
1190 | snprintf(path, sizeof(path), | |
1191 | "/local/domain/0/device-model/%d/physmap/%s/name", | |
1192 | xen_domid, entries[i]); | |
1193 | physmap->name = xs_read(state->xenstore, 0, path, &len); | |
1194 | ||
1195 | QLIST_INSERT_HEAD(&state->physmap, physmap, list); | |
1196 | } | |
1197 | free(entries); | |
d1814e08 SS |
1198 | } |
1199 | ||
11addd0a LJ |
1200 | static void xen_wakeup_notifier(Notifier *notifier, void *data) |
1201 | { | |
1202 | xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 0); | |
1203 | } | |
1204 | ||
dced4d2f | 1205 | void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory) |
29d3ccde | 1206 | { |
9ce94e7c | 1207 | int i, rc; |
3996e85c PD |
1208 | xen_pfn_t ioreq_pfn; |
1209 | xen_pfn_t bufioreq_pfn; | |
1210 | evtchn_port_t bufioreq_evtchn; | |
9ce94e7c AS |
1211 | XenIOState *state; |
1212 | ||
7267c094 | 1213 | state = g_malloc0(sizeof (XenIOState)); |
9ce94e7c | 1214 | |
a2db2a1e IC |
1215 | state->xce_handle = xenevtchn_open(NULL, 0); |
1216 | if (state->xce_handle == NULL) { | |
9ce94e7c | 1217 | perror("xen: event channel open"); |
dced4d2f | 1218 | goto err; |
9ce94e7c AS |
1219 | } |
1220 | ||
29321335 AP |
1221 | state->xenstore = xs_daemon_open(); |
1222 | if (state->xenstore == NULL) { | |
1223 | perror("xen: xenstore open"); | |
dced4d2f | 1224 | goto err; |
29321335 AP |
1225 | } |
1226 | ||
3996e85c PD |
1227 | rc = xen_create_ioreq_server(xen_xc, xen_domid, &state->ioservid); |
1228 | if (rc < 0) { | |
1229 | perror("xen: ioreq server create"); | |
dced4d2f | 1230 | goto err; |
3996e85c PD |
1231 | } |
1232 | ||
9ce94e7c AS |
1233 | state->exit.notify = xen_exit_notifier; |
1234 | qemu_add_exit_notifier(&state->exit); | |
1235 | ||
da98c8eb GH |
1236 | state->suspend.notify = xen_suspend_notifier; |
1237 | qemu_register_suspend_notifier(&state->suspend); | |
1238 | ||
11addd0a LJ |
1239 | state->wakeup.notify = xen_wakeup_notifier; |
1240 | qemu_register_wakeup_notifier(&state->wakeup); | |
1241 | ||
3996e85c PD |
1242 | rc = xen_get_ioreq_server_info(xen_xc, xen_domid, state->ioservid, |
1243 | &ioreq_pfn, &bufioreq_pfn, | |
1244 | &bufioreq_evtchn); | |
1245 | if (rc < 0) { | |
dced4d2f MA |
1246 | error_report("failed to get ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1247 | errno, xen_xc); | |
1248 | goto err; | |
3996e85c PD |
1249 | } |
1250 | ||
9ce94e7c | 1251 | DPRINTF("shared page at pfn %lx\n", ioreq_pfn); |
3996e85c PD |
1252 | DPRINTF("buffered io page at pfn %lx\n", bufioreq_pfn); |
1253 | DPRINTF("buffered io evtchn is %x\n", bufioreq_evtchn); | |
1254 | ||
e0cb42ae | 1255 | state->shared_page = xenforeignmemory_map(xen_fmem, xen_domid, |
9ed257d1 | 1256 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1257 | 1, &ioreq_pfn, NULL); |
9ce94e7c | 1258 | if (state->shared_page == NULL) { |
dced4d2f MA |
1259 | error_report("map shared IO page returned error %d handle=" XC_INTERFACE_FMT, |
1260 | errno, xen_xc); | |
1261 | goto err; | |
9ce94e7c AS |
1262 | } |
1263 | ||
37f9e258 DS |
1264 | rc = xen_get_vmport_regs_pfn(xen_xc, xen_domid, &ioreq_pfn); |
1265 | if (!rc) { | |
1266 | DPRINTF("shared vmport page at pfn %lx\n", ioreq_pfn); | |
1267 | state->shared_vmport_page = | |
e0cb42ae IC |
1268 | xenforeignmemory_map(xen_fmem, xen_domid, PROT_READ|PROT_WRITE, |
1269 | 1, &ioreq_pfn, NULL); | |
37f9e258 | 1270 | if (state->shared_vmport_page == NULL) { |
dced4d2f MA |
1271 | error_report("map shared vmport IO page returned error %d handle=" |
1272 | XC_INTERFACE_FMT, errno, xen_xc); | |
1273 | goto err; | |
37f9e258 DS |
1274 | } |
1275 | } else if (rc != -ENOSYS) { | |
dced4d2f MA |
1276 | error_report("get vmport regs pfn returned error %d, rc=%d", |
1277 | errno, rc); | |
1278 | goto err; | |
37f9e258 DS |
1279 | } |
1280 | ||
e0cb42ae | 1281 | state->buffered_io_page = xenforeignmemory_map(xen_fmem, xen_domid, |
3996e85c | 1282 | PROT_READ|PROT_WRITE, |
e0cb42ae | 1283 | 1, &bufioreq_pfn, NULL); |
9ce94e7c | 1284 | if (state->buffered_io_page == NULL) { |
dced4d2f MA |
1285 | error_report("map buffered IO page returned error %d", errno); |
1286 | goto err; | |
9ce94e7c AS |
1287 | } |
1288 | ||
37f9e258 DS |
1289 | /* Note: cpus is empty at this point in init */ |
1290 | state->cpu_by_vcpu_id = g_malloc0(max_cpus * sizeof(CPUState *)); | |
1291 | ||
3996e85c PD |
1292 | rc = xen_set_ioreq_server_state(xen_xc, xen_domid, state->ioservid, true); |
1293 | if (rc < 0) { | |
dced4d2f MA |
1294 | error_report("failed to enable ioreq server info: error %d handle=" XC_INTERFACE_FMT, |
1295 | errno, xen_xc); | |
1296 | goto err; | |
3996e85c PD |
1297 | } |
1298 | ||
1cd25a88 | 1299 | state->ioreq_local_port = g_malloc0(max_cpus * sizeof (evtchn_port_t)); |
9ce94e7c AS |
1300 | |
1301 | /* FIXME: how about if we overflow the page here? */ | |
1cd25a88 | 1302 | for (i = 0; i < max_cpus; i++) { |
a2db2a1e | 1303 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
9ce94e7c AS |
1304 | xen_vcpu_eport(state->shared_page, i)); |
1305 | if (rc == -1) { | |
dced4d2f MA |
1306 | error_report("shared evtchn %d bind error %d", i, errno); |
1307 | goto err; | |
9ce94e7c AS |
1308 | } |
1309 | state->ioreq_local_port[i] = rc; | |
1310 | } | |
1311 | ||
a2db2a1e | 1312 | rc = xenevtchn_bind_interdomain(state->xce_handle, xen_domid, |
3996e85c | 1313 | bufioreq_evtchn); |
fda1f768 | 1314 | if (rc == -1) { |
dced4d2f MA |
1315 | error_report("buffered evtchn bind error %d", errno); |
1316 | goto err; | |
fda1f768 SS |
1317 | } |
1318 | state->bufioreq_local_port = rc; | |
1319 | ||
432d268c | 1320 | /* Init RAM management */ |
cd1ba7de | 1321 | xen_map_cache_init(xen_phys_offset_to_gaddr, state); |
91176e31 | 1322 | xen_ram_init(pcms, ram_size, ram_memory); |
432d268c | 1323 | |
fb4bb2b5 | 1324 | qemu_add_vm_change_state_handler(xen_hvm_change_state_handler, state); |
9ce94e7c | 1325 | |
20581d20 | 1326 | state->memory_listener = xen_memory_listener; |
b4dd7802 | 1327 | QLIST_INIT(&state->physmap); |
f6790af6 | 1328 | memory_listener_register(&state->memory_listener, &address_space_memory); |
b4dd7802 AP |
1329 | state->log_for_dirtybit = NULL; |
1330 | ||
3996e85c PD |
1331 | state->io_listener = xen_io_listener; |
1332 | memory_listener_register(&state->io_listener, &address_space_io); | |
1333 | ||
1334 | state->device_listener = xen_device_listener; | |
1335 | device_listener_register(&state->device_listener); | |
1336 | ||
ad35a7da SS |
1337 | /* Initialize backend core & drivers */ |
1338 | if (xen_be_init() != 0) { | |
dced4d2f MA |
1339 | error_report("xen backend core setup failed"); |
1340 | goto err; | |
ad35a7da SS |
1341 | } |
1342 | xen_be_register("console", &xen_console_ops); | |
37cdfcf1 | 1343 | xen_be_register("vkbd", &xen_kbdmouse_ops); |
ad35a7da | 1344 | xen_be_register("qdisk", &xen_blkdev_ops); |
d1814e08 | 1345 | xen_read_physmap(state); |
dced4d2f | 1346 | return; |
ad35a7da | 1347 | |
dced4d2f MA |
1348 | err: |
1349 | error_report("xen hardware virtual machine initialisation failed"); | |
1350 | exit(1); | |
29d3ccde | 1351 | } |
9ce94e7c | 1352 | |
180640ea | 1353 | void destroy_hvm_domain(bool reboot) |
9ce94e7c AS |
1354 | { |
1355 | XenXC xc_handle; | |
1356 | int sts; | |
1357 | ||
1358 | xc_handle = xen_xc_interface_open(0, 0, 0); | |
1359 | if (xc_handle == XC_HANDLER_INITIAL_VALUE) { | |
1360 | fprintf(stderr, "Cannot acquire xenctrl handle\n"); | |
1361 | } else { | |
180640ea JB |
1362 | sts = xc_domain_shutdown(xc_handle, xen_domid, |
1363 | reboot ? SHUTDOWN_reboot : SHUTDOWN_poweroff); | |
9ce94e7c | 1364 | if (sts != 0) { |
180640ea JB |
1365 | fprintf(stderr, "xc_domain_shutdown failed to issue %s, " |
1366 | "sts %d, %s\n", reboot ? "reboot" : "poweroff", | |
1367 | sts, strerror(errno)); | |
9ce94e7c | 1368 | } else { |
180640ea JB |
1369 | fprintf(stderr, "Issued domain %d %s\n", xen_domid, |
1370 | reboot ? "reboot" : "poweroff"); | |
9ce94e7c AS |
1371 | } |
1372 | xc_interface_close(xc_handle); | |
1373 | } | |
1374 | } | |
c65adf9b AK |
1375 | |
1376 | void xen_register_framebuffer(MemoryRegion *mr) | |
1377 | { | |
1378 | framebuffer = mr; | |
1379 | } | |
eaab4d60 AK |
1380 | |
1381 | void xen_shutdown_fatal_error(const char *fmt, ...) | |
1382 | { | |
1383 | va_list ap; | |
1384 | ||
1385 | va_start(ap, fmt); | |
1386 | vfprintf(stderr, fmt, ap); | |
1387 | va_end(ap); | |
1388 | fprintf(stderr, "Will destroy the domain.\n"); | |
1389 | /* destroy the domain */ | |
1390 | qemu_system_shutdown_request(); | |
1391 | } | |
910b38e4 AP |
1392 | |
1393 | void xen_modified_memory(ram_addr_t start, ram_addr_t length) | |
1394 | { | |
1395 | if (unlikely(xen_in_migration)) { | |
1396 | int rc; | |
1397 | ram_addr_t start_pfn, nb_pages; | |
1398 | ||
1399 | if (length == 0) { | |
1400 | length = TARGET_PAGE_SIZE; | |
1401 | } | |
1402 | start_pfn = start >> TARGET_PAGE_BITS; | |
1403 | nb_pages = ((start + length + TARGET_PAGE_SIZE - 1) >> TARGET_PAGE_BITS) | |
1404 | - start_pfn; | |
1405 | rc = xc_hvm_modified_memory(xen_xc, xen_domid, start_pfn, nb_pages); | |
1406 | if (rc) { | |
1407 | fprintf(stderr, | |
1408 | "%s failed for "RAM_ADDR_FMT" ("RAM_ADDR_FMT"): %i, %s\n", | |
1409 | __func__, start, nb_pages, rc, strerror(-rc)); | |
1410 | } | |
1411 | } | |
1412 | } | |
04b0de0e WL |
1413 | |
1414 | void qmp_xen_set_global_dirty_log(bool enable, Error **errp) | |
1415 | { | |
1416 | if (enable) { | |
1417 | memory_global_dirty_log_start(); | |
1418 | } else { | |
1419 | memory_global_dirty_log_stop(); | |
1420 | } | |
1421 | } |