| | 1 | ========================== |
| | 2 | CPU to ISA Version Mapping |
| | 3 | ========================== |
| | 4 | |
| | 5 | Mapping of some CPU versions to relevant ISA versions. |
| | 6 | |
| | 7 | ========= ==================================================================== |
| | 8 | CPU Architecture version |
| | 9 | ========= ==================================================================== |
| | 10 | Power10 Power ISA v3.1 |
| | 11 | Power9 Power ISA v3.0B |
| | 12 | Power8 Power ISA v2.07 |
| | 13 | Power7 Power ISA v2.06 |
| | 14 | Power6 Power ISA v2.05 |
| | 15 | PA6T Power ISA v2.04 |
| | 16 | Cell PPU - Power ISA v2.02 with some minor exceptions |
| | 17 | - Plus Altivec/VMX ~= 2.03 |
| | 18 | Power5++ Power ISA v2.04 (no VMX) |
| | 19 | Power5+ Power ISA v2.03 |
| | 20 | Power5 - PowerPC User Instruction Set Architecture Book I v2.02 |
| | 21 | - PowerPC Virtual Environment Architecture Book II v2.02 |
| | 22 | - PowerPC Operating Environment Architecture Book III v2.02 |
| | 23 | PPC970 - PowerPC User Instruction Set Architecture Book I v2.01 |
| | 24 | - PowerPC Virtual Environment Architecture Book II v2.01 |
| | 25 | - PowerPC Operating Environment Architecture Book III v2.01 |
| | 26 | - Plus Altivec/VMX ~= 2.03 |
| | 27 | ========= ==================================================================== |
| | 28 | |
| | 29 | |
| | 30 | Key Features |
| | 31 | ------------ |
| | 32 | |
| | 33 | ========== ================== |
| | 34 | CPU VMX (aka. Altivec) |
| | 35 | ========== ================== |
| | 36 | Power10 Yes |
| | 37 | Power9 Yes |
| | 38 | Power8 Yes |
| | 39 | Power7 Yes |
| | 40 | Power6 Yes |
| | 41 | PA6T Yes |
| | 42 | Cell PPU Yes |
| | 43 | Power5++ No |
| | 44 | Power5+ No |
| | 45 | Power5 No |
| | 46 | PPC970 Yes |
| | 47 | ========== ================== |
| | 48 | |
| | 49 | ========== ==== |
| | 50 | CPU VSX |
| | 51 | ========== ==== |
| | 52 | Power10 Yes |
| | 53 | Power9 Yes |
| | 54 | Power8 Yes |
| | 55 | Power7 Yes |
| | 56 | Power6 No |
| | 57 | PA6T No |
| | 58 | Cell PPU No |
| | 59 | Power5++ No |
| | 60 | Power5+ No |
| | 61 | Power5 No |
| | 62 | PPC970 No |
| | 63 | ========== ==== |
| | 64 | |
| | 65 | ========== ==================================== |
| | 66 | CPU Transactional Memory |
| | 67 | ========== ==================================== |
| | 68 | Power10 No (* see Power ISA v3.1, "Appendix A. Notes on the Removal of Transactional Memory from the Architecture") |
| | 69 | Power9 Yes (* see transactional_memory.txt) |
| | 70 | Power8 Yes |
| | 71 | Power7 No |
| | 72 | Power6 No |
| | 73 | PA6T No |
| | 74 | Cell PPU No |
| | 75 | Power5++ No |
| | 76 | Power5+ No |
| | 77 | Power5 No |
| | 78 | PPC970 No |
| | 79 | ========== ==================================== |
projects / mirror_ubuntu-hirsute-kernel.git / blame_incremental