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1 | /* | |
2 | * Copyright 2015 Timesys Corporation. | |
3 | * Copyright 2015 General Electric Company | |
4 | * | |
5 | * This file is dual-licensed: you can use it either under the terms | |
6 | * of the GPL or the X11 license, at your option. Note that this dual | |
7 | * licensing only applies to this file, and not this project as a | |
8 | * whole. | |
9 | * | |
10 | * a) This file is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License | |
12 | * version 2 as published by the Free Software Foundation. | |
13 | * | |
14 | * This file is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * Or, alternatively, | |
20 | * | |
21 | * b) Permission is hereby granted, free of charge, to any person | |
22 | * obtaining a copy of this software and associated documentation | |
23 | * files (the "Software"), to deal in the Software without | |
24 | * restriction, including without limitation the rights to use, | |
25 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
26 | * sell copies of the Software, and to permit persons to whom the | |
27 | * Software is furnished to do so, subject to the following | |
28 | * conditions: | |
29 | * | |
30 | * The above copyright notice and this permission notice shall be | |
31 | * included in all copies or substantial portions of the Software. | |
32 | * | |
33 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
40 | * OTHER DEALINGS IN THE SOFTWARE. | |
41 | */ | |
42 | ||
43 | /dts-v1/; | |
44 | ||
45 | #include "imx6q-bx50v3.dtsi" | |
46 | ||
47 | / { | |
48 | model = "General Electric B850v3"; | |
49 | compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q"; | |
50 | ||
51 | chosen { | |
52 | stdout-path = &uart3; | |
53 | }; | |
54 | }; | |
55 | ||
56 | &clks { | |
57 | assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, | |
58 | <&clks IMX6QDL_CLK_LDB_DI1_SEL>, | |
59 | <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, | |
60 | <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>; | |
61 | assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, | |
62 | <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, | |
63 | <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, | |
64 | <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; | |
65 | }; | |
66 | ||
67 | &ldb { | |
68 | fsl,dual-channel; | |
69 | status = "okay"; | |
70 | ||
71 | lvds0: lvds-channel@0 { | |
72 | fsl,data-mapping = "spwg"; | |
73 | fsl,data-width = <24>; | |
74 | status = "okay"; | |
75 | ||
76 | port@4 { | |
77 | reg = <4>; | |
78 | ||
79 | lvds0_out: endpoint { | |
80 | remote-endpoint = <&stdp4028_in>; | |
81 | }; | |
82 | }; | |
83 | }; | |
84 | }; | |
85 | ||
86 | &i2c2 { | |
87 | pca9547_ddc: mux@70 { | |
88 | compatible = "nxp,pca9547"; | |
89 | reg = <0x70>; | |
90 | #address-cells = <1>; | |
91 | #size-cells = <0>; | |
92 | ||
93 | mux2_i2c1: i2c@0 { | |
94 | #address-cells = <1>; | |
95 | #size-cells = <0>; | |
96 | reg = <0x0>; | |
97 | }; | |
98 | ||
99 | mux2_i2c2: i2c@1 { | |
100 | #address-cells = <1>; | |
101 | #size-cells = <0>; | |
102 | reg = <0x1>; | |
103 | }; | |
104 | ||
105 | mux2_i2c3: i2c@2 { | |
106 | #address-cells = <1>; | |
107 | #size-cells = <0>; | |
108 | reg = <0x2>; | |
109 | }; | |
110 | ||
111 | mux2_i2c4: i2c@3 { | |
112 | #address-cells = <1>; | |
113 | #size-cells = <0>; | |
114 | reg = <0x3>; | |
115 | }; | |
116 | ||
117 | mux2_i2c5: i2c@4 { | |
118 | #address-cells = <1>; | |
119 | #size-cells = <0>; | |
120 | reg = <0x4>; | |
121 | }; | |
122 | ||
123 | mux2_i2c6: i2c@5 { | |
124 | #address-cells = <1>; | |
125 | #size-cells = <0>; | |
126 | reg = <0x5>; | |
127 | }; | |
128 | ||
129 | mux2_i2c7: i2c@6 { | |
130 | #address-cells = <1>; | |
131 | #size-cells = <0>; | |
132 | reg = <0x6>; | |
133 | }; | |
134 | ||
135 | mux2_i2c8: i2c@7 { | |
136 | #address-cells = <1>; | |
137 | #size-cells = <0>; | |
138 | reg = <0x7>; | |
139 | }; | |
140 | }; | |
141 | }; | |
142 | ||
143 | &hdmi { | |
144 | ddc-i2c-bus = <&mux2_i2c1>; | |
145 | }; | |
146 | ||
147 | &mux1_i2c1 { | |
148 | ads7830@4a { | |
149 | compatible = "ti,ads7830"; | |
150 | reg = <0x4a>; | |
151 | }; | |
152 | }; | |
153 | ||
154 | &mux2_i2c2 { | |
155 | clock-frequency = <100000>; | |
156 | ||
157 | stdp2690@72 { | |
158 | compatible = "megachips,stdp2690-ge-b850v3-fw"; | |
159 | reg = <0x72>; | |
160 | ||
161 | ports { | |
162 | #address-cells = <1>; | |
163 | #size-cells = <0>; | |
164 | ||
165 | port@0 { | |
166 | reg = <0>; | |
167 | ||
168 | stdp2690_in: endpoint { | |
169 | remote-endpoint = <&stdp4028_out>; | |
170 | }; | |
171 | }; | |
172 | ||
173 | port@1 { | |
174 | reg = <1>; | |
175 | ||
176 | stdp2690_out: endpoint { | |
177 | /* Connector for external display */ | |
178 | }; | |
179 | }; | |
180 | }; | |
181 | }; | |
182 | ||
183 | stdp4028@73 { | |
184 | compatible = "megachips,stdp4028-ge-b850v3-fw"; | |
185 | reg = <0x73>; | |
186 | interrupt-parent = <&gpio2>; | |
187 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; | |
188 | ||
189 | ports { | |
190 | #address-cells = <1>; | |
191 | #size-cells = <0>; | |
192 | ||
193 | port@0 { | |
194 | reg = <0>; | |
195 | ||
196 | stdp4028_in: endpoint { | |
197 | remote-endpoint = <&lvds0_out>; | |
198 | }; | |
199 | }; | |
200 | ||
201 | port@1 { | |
202 | reg = <1>; | |
203 | ||
204 | stdp4028_out: endpoint { | |
205 | remote-endpoint = <&stdp2690_in>; | |
206 | }; | |
207 | }; | |
208 | }; | |
209 | }; | |
210 | }; | |
211 | ||
212 | &pci_root { | |
213 | /* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */ | |
214 | bridge@1,0 { | |
215 | compatible = "pci10b5,8605"; | |
216 | reg = <0x00010000 0 0 0 0>; | |
217 | ||
218 | #address-cells = <3>; | |
219 | #size-cells = <2>; | |
220 | #interrupt-cells = <1>; | |
221 | ||
222 | bridge@2,1 { | |
223 | compatible = "pci10b5,8605"; | |
224 | reg = <0x00020800 0 0 0 0>; | |
225 | ||
226 | #address-cells = <3>; | |
227 | #size-cells = <2>; | |
228 | #interrupt-cells = <1>; | |
229 | ||
230 | /* Intel Corporation I210 Gigabit Network Connection */ | |
231 | ethernet@3,0 { | |
232 | compatible = "pci8086,1533"; | |
233 | reg = <0x00030000 0 0 0 0>; | |
234 | }; | |
235 | }; | |
236 | ||
237 | bridge@2,2 { | |
238 | compatible = "pci10b5,8605"; | |
239 | reg = <0x00021000 0 0 0 0>; | |
240 | ||
241 | #address-cells = <3>; | |
242 | #size-cells = <2>; | |
243 | #interrupt-cells = <1>; | |
244 | ||
245 | /* Intel Corporation I210 Gigabit Network Connection */ | |
246 | switch_nic: ethernet@4,0 { | |
247 | compatible = "pci8086,1533"; | |
248 | reg = <0x00040000 0 0 0 0>; | |
249 | }; | |
250 | }; | |
251 | }; | |
252 | }; | |
253 | ||
254 | &switch_ports { | |
255 | port@0 { | |
256 | reg = <0>; | |
257 | label = "eneport1"; | |
258 | phy-handle = <&switchphy0>; | |
259 | }; | |
260 | ||
261 | port@1 { | |
262 | reg = <1>; | |
263 | label = "eneport2"; | |
264 | phy-handle = <&switchphy1>; | |
265 | }; | |
266 | ||
267 | port@2 { | |
268 | reg = <2>; | |
269 | label = "enix"; | |
270 | phy-handle = <&switchphy2>; | |
271 | }; | |
272 | ||
273 | port@3 { | |
274 | reg = <3>; | |
275 | label = "enid"; | |
276 | phy-handle = <&switchphy3>; | |
277 | }; | |
278 | ||
279 | port@4 { | |
280 | reg = <4>; | |
281 | label = "cpu"; | |
282 | ethernet = <&switch_nic>; | |
283 | phy-handle = <&switchphy4>; | |
284 | }; | |
285 | }; |