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1 | /* | |
2 | * Copyright 2013 Texas Instruments, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | */ | |
8 | ||
9 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
10 | #include <dt-bindings/gpio/gpio.h> | |
11 | ||
12 | #include "skeleton.dtsi" | |
13 | ||
14 | / { | |
15 | compatible = "ti,keystone"; | |
16 | model = "Texas Instruments Keystone 2 SoC"; | |
17 | #address-cells = <2>; | |
18 | #size-cells = <2>; | |
19 | interrupt-parent = <&gic>; | |
20 | ||
21 | aliases { | |
22 | serial0 = &uart0; | |
23 | spi0 = &spi0; | |
24 | spi1 = &spi1; | |
25 | spi2 = &spi2; | |
26 | }; | |
27 | ||
28 | memory { | |
29 | reg = <0x00000000 0x80000000 0x00000000 0x40000000>; | |
30 | }; | |
31 | ||
32 | gic: interrupt-controller { | |
33 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; | |
34 | #interrupt-cells = <3>; | |
35 | interrupt-controller; | |
36 | reg = <0x0 0x02561000 0x0 0x1000>, | |
37 | <0x0 0x02562000 0x0 0x2000>, | |
38 | <0x0 0x02564000 0x0 0x2000>, | |
39 | <0x0 0x02566000 0x0 0x2000>; | |
40 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | | |
41 | IRQ_TYPE_LEVEL_HIGH)>; | |
42 | }; | |
43 | ||
44 | timer { | |
45 | compatible = "arm,armv7-timer"; | |
46 | interrupts = | |
47 | <GIC_PPI 13 | |
48 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
49 | <GIC_PPI 14 | |
50 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
51 | <GIC_PPI 11 | |
52 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, | |
53 | <GIC_PPI 10 | |
54 | (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; | |
55 | }; | |
56 | ||
57 | pmu { | |
58 | compatible = "arm,cortex-a15-pmu"; | |
59 | interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>, | |
60 | <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>, | |
61 | <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>, | |
62 | <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>; | |
63 | }; | |
64 | ||
65 | psci { | |
66 | compatible = "arm,psci"; | |
67 | method = "smc"; | |
68 | cpu_suspend = <0x84000001>; | |
69 | cpu_off = <0x84000002>; | |
70 | cpu_on = <0x84000003>; | |
71 | }; | |
72 | ||
73 | soc { | |
74 | #address-cells = <1>; | |
75 | #size-cells = <1>; | |
76 | compatible = "ti,keystone","simple-bus"; | |
77 | interrupt-parent = <&gic>; | |
78 | ranges = <0x0 0x0 0x0 0xc0000000>; | |
79 | dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; | |
80 | ||
81 | pllctrl: pll-controller@02310000 { | |
82 | compatible = "ti,keystone-pllctrl", "syscon"; | |
83 | reg = <0x02310000 0x200>; | |
84 | }; | |
85 | ||
86 | psc: power-sleep-controller@02350000 { | |
87 | compatible = "syscon", "simple-mfd"; | |
88 | reg = <0x02350000 0x1000>; | |
89 | }; | |
90 | ||
91 | devctrl: device-state-control@02620000 { | |
92 | compatible = "ti,keystone-devctrl", "syscon"; | |
93 | reg = <0x02620000 0x1000>; | |
94 | }; | |
95 | ||
96 | rstctrl: reset-controller { | |
97 | compatible = "ti,keystone-reset"; | |
98 | ti,syscon-pll = <&pllctrl 0xe4>; | |
99 | ti,syscon-dev = <&devctrl 0x328>; | |
100 | ti,wdt-list = <0>; | |
101 | }; | |
102 | ||
103 | /include/ "keystone-clocks.dtsi" | |
104 | ||
105 | uart0: serial@02530c00 { | |
106 | compatible = "ti,da830-uart", "ns16550a"; | |
107 | current-speed = <115200>; | |
108 | reg-shift = <2>; | |
109 | reg-io-width = <4>; | |
110 | reg = <0x02530c00 0x100>; | |
111 | clocks = <&clkuart0>; | |
112 | interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; | |
113 | }; | |
114 | ||
115 | uart1: serial@02531000 { | |
116 | compatible = "ti,da830-uart", "ns16550a"; | |
117 | current-speed = <115200>; | |
118 | reg-shift = <2>; | |
119 | reg-io-width = <4>; | |
120 | reg = <0x02531000 0x100>; | |
121 | clocks = <&clkuart1>; | |
122 | interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; | |
123 | }; | |
124 | ||
125 | i2c0: i2c@2530000 { | |
126 | compatible = "ti,davinci-i2c"; | |
127 | reg = <0x02530000 0x400>; | |
128 | clock-frequency = <100000>; | |
129 | clocks = <&clki2c>; | |
130 | interrupts = <GIC_SPI 283 IRQ_TYPE_EDGE_RISING>; | |
131 | #address-cells = <1>; | |
132 | #size-cells = <0>; | |
133 | }; | |
134 | ||
135 | i2c1: i2c@2530400 { | |
136 | compatible = "ti,davinci-i2c"; | |
137 | reg = <0x02530400 0x400>; | |
138 | clock-frequency = <100000>; | |
139 | clocks = <&clki2c>; | |
140 | interrupts = <GIC_SPI 286 IRQ_TYPE_EDGE_RISING>; | |
141 | #address-cells = <1>; | |
142 | #size-cells = <0>; | |
143 | }; | |
144 | ||
145 | i2c2: i2c@2530800 { | |
146 | compatible = "ti,davinci-i2c"; | |
147 | reg = <0x02530800 0x400>; | |
148 | clock-frequency = <100000>; | |
149 | clocks = <&clki2c>; | |
150 | interrupts = <GIC_SPI 289 IRQ_TYPE_EDGE_RISING>; | |
151 | #address-cells = <1>; | |
152 | #size-cells = <0>; | |
153 | }; | |
154 | ||
155 | spi0: spi@21000400 { | |
156 | compatible = "ti,keystone-spi", "ti,dm6441-spi"; | |
157 | reg = <0x21000400 0x200>; | |
158 | num-cs = <4>; | |
159 | ti,davinci-spi-intr-line = <0>; | |
160 | interrupts = <GIC_SPI 292 IRQ_TYPE_EDGE_RISING>; | |
161 | clocks = <&clkspi>; | |
162 | #address-cells = <1>; | |
163 | #size-cells = <0>; | |
164 | }; | |
165 | ||
166 | spi1: spi@21000600 { | |
167 | compatible = "ti,keystone-spi", "ti,dm6441-spi"; | |
168 | reg = <0x21000600 0x200>; | |
169 | num-cs = <4>; | |
170 | ti,davinci-spi-intr-line = <0>; | |
171 | interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>; | |
172 | clocks = <&clkspi>; | |
173 | #address-cells = <1>; | |
174 | #size-cells = <0>; | |
175 | }; | |
176 | ||
177 | spi2: spi@21000800 { | |
178 | compatible = "ti,keystone-spi", "ti,dm6441-spi"; | |
179 | reg = <0x21000800 0x200>; | |
180 | num-cs = <4>; | |
181 | ti,davinci-spi-intr-line = <0>; | |
182 | interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>; | |
183 | clocks = <&clkspi>; | |
184 | #address-cells = <1>; | |
185 | #size-cells = <0>; | |
186 | }; | |
187 | ||
188 | usb_phy: usb_phy@2620738 { | |
189 | compatible = "ti,keystone-usbphy"; | |
190 | #address-cells = <1>; | |
191 | #size-cells = <1>; | |
192 | reg = <0x2620738 24>; | |
193 | status = "disabled"; | |
194 | }; | |
195 | ||
196 | keystone_usb0: usb@2680000 { | |
197 | compatible = "ti,keystone-dwc3"; | |
198 | #address-cells = <1>; | |
199 | #size-cells = <1>; | |
200 | reg = <0x2680000 0x10000>; | |
201 | clocks = <&clkusb>; | |
202 | clock-names = "usb"; | |
203 | interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
204 | ranges; | |
205 | dma-coherent; | |
206 | dma-ranges; | |
207 | status = "disabled"; | |
208 | ||
209 | usb0: dwc3@2690000 { | |
210 | compatible = "synopsys,dwc3"; | |
211 | reg = <0x2690000 0x70000>; | |
212 | interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; | |
213 | usb-phy = <&usb_phy>, <&usb_phy>; | |
214 | }; | |
215 | }; | |
216 | ||
217 | wdt: wdt@022f0080 { | |
218 | compatible = "ti,keystone-wdt","ti,davinci-wdt"; | |
219 | reg = <0x022f0080 0x80>; | |
220 | clocks = <&clkwdtimer0>; | |
221 | }; | |
222 | ||
223 | clock_event: timer@22f0000 { | |
224 | compatible = "ti,keystone-timer"; | |
225 | reg = <0x022f0000 0x80>; | |
226 | interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; | |
227 | clocks = <&clktimer15>; | |
228 | }; | |
229 | ||
230 | gpio0: gpio@260bf00 { | |
231 | compatible = "ti,keystone-gpio"; | |
232 | reg = <0x0260bf00 0x100>; | |
233 | gpio-controller; | |
234 | #gpio-cells = <2>; | |
235 | /* HW Interrupts mapped to GPIO pins */ | |
236 | interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>, | |
237 | <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>, | |
238 | <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>, | |
239 | <GIC_SPI 123 IRQ_TYPE_EDGE_RISING>, | |
240 | <GIC_SPI 124 IRQ_TYPE_EDGE_RISING>, | |
241 | <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, | |
242 | <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, | |
243 | <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, | |
244 | <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, | |
245 | <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, | |
246 | <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, | |
247 | <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, | |
248 | <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, | |
249 | <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, | |
250 | <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, | |
251 | <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, | |
252 | <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, | |
253 | <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, | |
254 | <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, | |
255 | <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, | |
256 | <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>, | |
257 | <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, | |
258 | <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>, | |
259 | <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>, | |
260 | <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>, | |
261 | <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>, | |
262 | <GIC_SPI 146 IRQ_TYPE_EDGE_RISING>, | |
263 | <GIC_SPI 147 IRQ_TYPE_EDGE_RISING>, | |
264 | <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>, | |
265 | <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>, | |
266 | <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>, | |
267 | <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>; | |
268 | clocks = <&clkgpio>; | |
269 | clock-names = "gpio"; | |
270 | ti,ngpio = <32>; | |
271 | ti,davinci-gpio-unbanked = <32>; | |
272 | }; | |
273 | ||
274 | aemif: aemif@21000A00 { | |
275 | compatible = "ti,keystone-aemif", "ti,davinci-aemif"; | |
276 | #address-cells = <2>; | |
277 | #size-cells = <1>; | |
278 | clocks = <&clkaemif>; | |
279 | clock-names = "aemif"; | |
280 | clock-ranges; | |
281 | ||
282 | reg = <0x21000A00 0x00000100>; | |
283 | ranges = <0 0 0x30000000 0x10000000 | |
284 | 1 0 0x21000A00 0x00000100>; | |
285 | }; | |
286 | ||
287 | kirq0: keystone_irq@26202a0 { | |
288 | compatible = "ti,keystone-irq"; | |
289 | interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>; | |
290 | interrupt-controller; | |
291 | #interrupt-cells = <1>; | |
292 | ti,syscon-dev = <&devctrl 0x2a0>; | |
293 | }; | |
294 | ||
295 | pcie0: pcie@21800000 { | |
296 | compatible = "ti,keystone-pcie", "snps,dw-pcie"; | |
297 | clocks = <&clkpcie>; | |
298 | clock-names = "pcie"; | |
299 | #address-cells = <3>; | |
300 | #size-cells = <2>; | |
301 | reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; | |
302 | ranges = <0x82000000 0 0x50000000 0x50000000 | |
303 | 0 0x10000000>; | |
304 | ||
305 | status = "disabled"; | |
306 | device_type = "pci"; | |
307 | num-lanes = <2>; | |
308 | bus-range = <0x00 0xff>; | |
309 | ||
310 | /* error interrupt */ | |
311 | interrupts = <GIC_SPI 38 IRQ_TYPE_EDGE_RISING>; | |
312 | #interrupt-cells = <1>; | |
313 | interrupt-map-mask = <0 0 0 7>; | |
314 | interrupt-map = <0 0 0 1 &pcie_intc0 0>, /* INT A */ | |
315 | <0 0 0 2 &pcie_intc0 1>, /* INT B */ | |
316 | <0 0 0 3 &pcie_intc0 2>, /* INT C */ | |
317 | <0 0 0 4 &pcie_intc0 3>; /* INT D */ | |
318 | ||
319 | pcie_msi_intc0: msi-interrupt-controller { | |
320 | interrupt-controller; | |
321 | #interrupt-cells = <1>; | |
322 | interrupt-parent = <&gic>; | |
323 | interrupts = <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>, | |
324 | <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>, | |
325 | <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>, | |
326 | <GIC_SPI 33 IRQ_TYPE_EDGE_RISING>, | |
327 | <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>, | |
328 | <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>, | |
329 | <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>, | |
330 | <GIC_SPI 37 IRQ_TYPE_EDGE_RISING>; | |
331 | }; | |
332 | ||
333 | pcie_intc0: legacy-interrupt-controller { | |
334 | interrupt-controller; | |
335 | #interrupt-cells = <1>; | |
336 | interrupt-parent = <&gic>; | |
337 | interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>, | |
338 | <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>, | |
339 | <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>, | |
340 | <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>; | |
341 | }; | |
342 | }; | |
343 | }; | |
344 | }; |