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1 | /* | |
2 | * linux/arch/i386/kernel/time.c | |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
5 | * | |
6 | * This file contains the PC-specific time handling details: | |
7 | * reading the RTC at bootup, etc.. | |
8 | * 1994-07-02 Alan Modra | |
9 | * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
10 | * 1995-03-26 Markus Kuhn | |
11 | * fixed 500 ms bug at call to set_rtc_mmss, fixed DS12887 | |
12 | * precision CMOS clock update | |
13 | * 1996-05-03 Ingo Molnar | |
14 | * fixed time warps in do_[slow|fast]_gettimeoffset() | |
15 | * 1997-09-10 Updated NTP code according to technical memorandum Jan '96 | |
16 | * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
17 | * 1998-09-05 (Various) | |
18 | * More robust do_fast_gettimeoffset() algorithm implemented | |
19 | * (works with APM, Cyrix 6x86MX and Centaur C6), | |
20 | * monotonic gettimeofday() with fast_get_timeoffset(), | |
21 | * drift-proof precision TSC calibration on boot | |
22 | * (C. Scott Ananian <cananian@alumni.princeton.edu>, Andrew D. | |
23 | * Balsa <andrebalsa@altern.org>, Philip Gladstone <philip@raptor.com>; | |
24 | * ported from 2.0.35 Jumbo-9 by Michael Krause <m.krause@tu-harburg.de>). | |
25 | * 1998-12-16 Andrea Arcangeli | |
26 | * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday was missing 1 jiffy | |
27 | * because was not accounting lost_ticks. | |
28 | * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli | |
29 | * Fixed a xtime SMP race (we need the xtime_lock rw spinlock to | |
30 | * serialize accesses to xtime/lost_ticks). | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/sched.h> | |
35 | #include <linux/kernel.h> | |
36 | #include <linux/param.h> | |
37 | #include <linux/string.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/interrupt.h> | |
40 | #include <linux/time.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/init.h> | |
43 | #include <linux/smp.h> | |
44 | #include <linux/module.h> | |
45 | #include <linux/sysdev.h> | |
46 | #include <linux/bcd.h> | |
47 | #include <linux/efi.h> | |
48 | #include <linux/mca.h> | |
49 | ||
50 | #include <asm/io.h> | |
51 | #include <asm/smp.h> | |
52 | #include <asm/irq.h> | |
53 | #include <asm/msr.h> | |
54 | #include <asm/delay.h> | |
55 | #include <asm/mpspec.h> | |
56 | #include <asm/uaccess.h> | |
57 | #include <asm/processor.h> | |
58 | #include <asm/timer.h> | |
59 | ||
60 | #include "mach_time.h" | |
61 | ||
62 | #include <linux/timex.h> | |
63 | ||
64 | #include <asm/hpet.h> | |
65 | ||
66 | #include <asm/arch_hooks.h> | |
67 | ||
68 | #include "io_ports.h" | |
69 | ||
70 | #include <asm/i8259.h> | |
71 | ||
72 | int pit_latch_buggy; /* extern */ | |
73 | ||
74 | #include "do_timer.h" | |
75 | ||
76 | unsigned int cpu_khz; /* Detected as we calibrate the TSC */ | |
77 | EXPORT_SYMBOL(cpu_khz); | |
78 | ||
79 | DEFINE_SPINLOCK(rtc_lock); | |
80 | EXPORT_SYMBOL(rtc_lock); | |
81 | ||
82 | /* | |
83 | * This is a special lock that is owned by the CPU and holds the index | |
84 | * register we are working with. It is required for NMI access to the | |
85 | * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details. | |
86 | */ | |
87 | volatile unsigned long cmos_lock = 0; | |
88 | EXPORT_SYMBOL(cmos_lock); | |
89 | ||
90 | /* Routines for accessing the CMOS RAM/RTC. */ | |
91 | unsigned char rtc_cmos_read(unsigned char addr) | |
92 | { | |
93 | unsigned char val; | |
94 | lock_cmos_prefix(addr); | |
95 | outb_p(addr, RTC_PORT(0)); | |
96 | val = inb_p(RTC_PORT(1)); | |
97 | lock_cmos_suffix(addr); | |
98 | return val; | |
99 | } | |
100 | EXPORT_SYMBOL(rtc_cmos_read); | |
101 | ||
102 | void rtc_cmos_write(unsigned char val, unsigned char addr) | |
103 | { | |
104 | lock_cmos_prefix(addr); | |
105 | outb_p(addr, RTC_PORT(0)); | |
106 | outb_p(val, RTC_PORT(1)); | |
107 | lock_cmos_suffix(addr); | |
108 | } | |
109 | EXPORT_SYMBOL(rtc_cmos_write); | |
110 | ||
111 | static int set_rtc_mmss(unsigned long nowtime) | |
112 | { | |
113 | int retval; | |
114 | unsigned long flags; | |
115 | ||
116 | /* gets recalled with irq locally disabled */ | |
117 | /* XXX - does irqsave resolve this? -johnstul */ | |
118 | spin_lock_irqsave(&rtc_lock, flags); | |
119 | if (efi_enabled) | |
120 | retval = efi_set_rtc_mmss(nowtime); | |
121 | else | |
122 | retval = mach_set_rtc_mmss(nowtime); | |
123 | spin_unlock_irqrestore(&rtc_lock, flags); | |
124 | ||
125 | return retval; | |
126 | } | |
127 | ||
128 | ||
129 | int timer_ack; | |
130 | ||
131 | unsigned long profile_pc(struct pt_regs *regs) | |
132 | { | |
133 | unsigned long pc = instruction_pointer(regs); | |
134 | ||
135 | #ifdef CONFIG_SMP | |
136 | if (!user_mode_vm(regs) && in_lock_functions(pc)) { | |
137 | #ifdef CONFIG_FRAME_POINTER | |
138 | return *(unsigned long *)(regs->ebp + 4); | |
139 | #else | |
140 | unsigned long *sp; | |
141 | if ((regs->xcs & 3) == 0) | |
142 | sp = (unsigned long *)®s->esp; | |
143 | else | |
144 | sp = (unsigned long *)regs->esp; | |
145 | /* Return address is either directly at stack pointer | |
146 | or above a saved eflags. Eflags has bits 22-31 zero, | |
147 | kernel addresses don't. */ | |
148 | if (sp[0] >> 22) | |
149 | return sp[0]; | |
150 | if (sp[1] >> 22) | |
151 | return sp[1]; | |
152 | #endif | |
153 | } | |
154 | #endif | |
155 | return pc; | |
156 | } | |
157 | EXPORT_SYMBOL(profile_pc); | |
158 | ||
159 | /* | |
160 | * This is the same as the above, except we _also_ save the current | |
161 | * Time Stamp Counter value at the time of the timer interrupt, so that | |
162 | * we later on can estimate the time of day more exactly. | |
163 | */ | |
164 | irqreturn_t timer_interrupt(int irq, void *dev_id) | |
165 | { | |
166 | /* | |
167 | * Here we are in the timer irq handler. We just have irqs locally | |
168 | * disabled but we don't know if the timer_bh is running on the other | |
169 | * CPU. We need to avoid to SMP race with it. NOTE: we don' t need | |
170 | * the irq version of write_lock because as just said we have irq | |
171 | * locally disabled. -arca | |
172 | */ | |
173 | write_seqlock(&xtime_lock); | |
174 | ||
175 | #ifdef CONFIG_X86_IO_APIC | |
176 | if (timer_ack) { | |
177 | /* | |
178 | * Subtle, when I/O APICs are used we have to ack timer IRQ | |
179 | * manually to reset the IRR bit for do_slow_gettimeoffset(). | |
180 | * This will also deassert NMI lines for the watchdog if run | |
181 | * on an 82489DX-based system. | |
182 | */ | |
183 | spin_lock(&i8259A_lock); | |
184 | outb(0x0c, PIC_MASTER_OCW3); | |
185 | /* Ack the IRQ; AEOI will end it automatically. */ | |
186 | inb(PIC_MASTER_POLL); | |
187 | spin_unlock(&i8259A_lock); | |
188 | } | |
189 | #endif | |
190 | ||
191 | do_timer_interrupt_hook(); | |
192 | ||
193 | ||
194 | if (MCA_bus) { | |
195 | /* The PS/2 uses level-triggered interrupts. You can't | |
196 | turn them off, nor would you want to (any attempt to | |
197 | enable edge-triggered interrupts usually gets intercepted by a | |
198 | special hardware circuit). Hence we have to acknowledge | |
199 | the timer interrupt. Through some incredibly stupid | |
200 | design idea, the reset for IRQ 0 is done by setting the | |
201 | high bit of the PPI port B (0x61). Note that some PS/2s, | |
202 | notably the 55SX, work fine if this is removed. */ | |
203 | ||
204 | u8 irq_v = inb_p( 0x61 ); /* read the current state */ | |
205 | outb_p( irq_v|0x80, 0x61 ); /* reset the IRQ */ | |
206 | } | |
207 | ||
208 | write_sequnlock(&xtime_lock); | |
209 | ||
210 | #ifdef CONFIG_X86_LOCAL_APIC | |
211 | if (using_apic_timer) | |
212 | smp_send_timer_broadcast_ipi(); | |
213 | #endif | |
214 | ||
215 | return IRQ_HANDLED; | |
216 | } | |
217 | ||
218 | /* not static: needed by APM */ | |
219 | unsigned long get_cmos_time(void) | |
220 | { | |
221 | unsigned long retval; | |
222 | unsigned long flags; | |
223 | ||
224 | spin_lock_irqsave(&rtc_lock, flags); | |
225 | ||
226 | if (efi_enabled) | |
227 | retval = efi_get_time(); | |
228 | else | |
229 | retval = mach_get_cmos_time(); | |
230 | ||
231 | spin_unlock_irqrestore(&rtc_lock, flags); | |
232 | ||
233 | return retval; | |
234 | } | |
235 | EXPORT_SYMBOL(get_cmos_time); | |
236 | ||
237 | static void sync_cmos_clock(unsigned long dummy); | |
238 | ||
239 | static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0); | |
240 | ||
241 | static void sync_cmos_clock(unsigned long dummy) | |
242 | { | |
243 | struct timeval now, next; | |
244 | int fail = 1; | |
245 | ||
246 | /* | |
247 | * If we have an externally synchronized Linux clock, then update | |
248 | * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be | |
249 | * called as close as possible to 500 ms before the new second starts. | |
250 | * This code is run on a timer. If the clock is set, that timer | |
251 | * may not expire at the correct time. Thus, we adjust... | |
252 | */ | |
253 | if (!ntp_synced()) | |
254 | /* | |
255 | * Not synced, exit, do not restart a timer (if one is | |
256 | * running, let it run out). | |
257 | */ | |
258 | return; | |
259 | ||
260 | do_gettimeofday(&now); | |
261 | if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 && | |
262 | now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2) | |
263 | fail = set_rtc_mmss(now.tv_sec); | |
264 | ||
265 | next.tv_usec = USEC_AFTER - now.tv_usec; | |
266 | if (next.tv_usec <= 0) | |
267 | next.tv_usec += USEC_PER_SEC; | |
268 | ||
269 | if (!fail) | |
270 | next.tv_sec = 659; | |
271 | else | |
272 | next.tv_sec = 0; | |
273 | ||
274 | if (next.tv_usec >= USEC_PER_SEC) { | |
275 | next.tv_sec++; | |
276 | next.tv_usec -= USEC_PER_SEC; | |
277 | } | |
278 | mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next)); | |
279 | } | |
280 | ||
281 | void notify_arch_cmos_timer(void) | |
282 | { | |
283 | mod_timer(&sync_cmos_timer, jiffies + 1); | |
284 | } | |
285 | ||
286 | static long clock_cmos_diff; | |
287 | static unsigned long sleep_start; | |
288 | ||
289 | static int timer_suspend(struct sys_device *dev, pm_message_t state) | |
290 | { | |
291 | /* | |
292 | * Estimate time zone so that set_time can update the clock | |
293 | */ | |
294 | unsigned long ctime = get_cmos_time(); | |
295 | ||
296 | clock_cmos_diff = -ctime; | |
297 | clock_cmos_diff += get_seconds(); | |
298 | sleep_start = ctime; | |
299 | return 0; | |
300 | } | |
301 | ||
302 | static int timer_resume(struct sys_device *dev) | |
303 | { | |
304 | unsigned long flags; | |
305 | unsigned long sec; | |
306 | unsigned long ctime = get_cmos_time(); | |
307 | long sleep_length = (ctime - sleep_start) * HZ; | |
308 | struct timespec ts; | |
309 | ||
310 | if (sleep_length < 0) { | |
311 | printk(KERN_WARNING "CMOS clock skew detected in timer resume!\n"); | |
312 | /* The time after the resume must not be earlier than the time | |
313 | * before the suspend or some nasty things will happen | |
314 | */ | |
315 | sleep_length = 0; | |
316 | ctime = sleep_start; | |
317 | } | |
318 | #ifdef CONFIG_HPET_TIMER | |
319 | if (is_hpet_enabled()) | |
320 | hpet_reenable(); | |
321 | #endif | |
322 | setup_pit_timer(); | |
323 | ||
324 | sec = ctime + clock_cmos_diff; | |
325 | ts.tv_sec = sec; | |
326 | ts.tv_nsec = 0; | |
327 | do_settimeofday(&ts); | |
328 | write_seqlock_irqsave(&xtime_lock, flags); | |
329 | jiffies_64 += sleep_length; | |
330 | write_sequnlock_irqrestore(&xtime_lock, flags); | |
331 | touch_softlockup_watchdog(); | |
332 | return 0; | |
333 | } | |
334 | ||
335 | static struct sysdev_class timer_sysclass = { | |
336 | .resume = timer_resume, | |
337 | .suspend = timer_suspend, | |
338 | set_kset_name("timer"), | |
339 | }; | |
340 | ||
341 | ||
342 | /* XXX this driverfs stuff should probably go elsewhere later -john */ | |
343 | static struct sys_device device_timer = { | |
344 | .id = 0, | |
345 | .cls = &timer_sysclass, | |
346 | }; | |
347 | ||
348 | static int time_init_device(void) | |
349 | { | |
350 | int error = sysdev_class_register(&timer_sysclass); | |
351 | if (!error) | |
352 | error = sysdev_register(&device_timer); | |
353 | return error; | |
354 | } | |
355 | ||
356 | device_initcall(time_init_device); | |
357 | ||
358 | #ifdef CONFIG_HPET_TIMER | |
359 | extern void (*late_time_init)(void); | |
360 | /* Duplicate of time_init() below, with hpet_enable part added */ | |
361 | static void __init hpet_time_init(void) | |
362 | { | |
363 | struct timespec ts; | |
364 | ts.tv_sec = get_cmos_time(); | |
365 | ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
366 | ||
367 | do_settimeofday(&ts); | |
368 | ||
369 | if ((hpet_enable() >= 0) && hpet_use_timer) { | |
370 | printk("Using HPET for base-timer\n"); | |
371 | } | |
372 | ||
373 | time_init_hook(); | |
374 | } | |
375 | #endif | |
376 | ||
377 | void __init time_init(void) | |
378 | { | |
379 | struct timespec ts; | |
380 | #ifdef CONFIG_HPET_TIMER | |
381 | if (is_hpet_capable()) { | |
382 | /* | |
383 | * HPET initialization needs to do memory-mapped io. So, let | |
384 | * us do a late initialization after mem_init(). | |
385 | */ | |
386 | late_time_init = hpet_time_init; | |
387 | return; | |
388 | } | |
389 | #endif | |
390 | ts.tv_sec = get_cmos_time(); | |
391 | ts.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | |
392 | ||
393 | do_settimeofday(&ts); | |
394 | ||
395 | time_init_hook(); | |
396 | } |