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1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ | |
2 | /* | |
3 | * | |
4 | * Copyright (C) 2004 IDT Inc. | |
5 | * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org> | |
6 | */ | |
7 | #ifndef __ASM_RC32434_RB_H | |
8 | #define __ASM_RC32434_RB_H | |
9 | ||
10 | #include <linux/genhd.h> | |
11 | ||
12 | #define REGBASE 0x18000000 | |
13 | #define IDT434_REG_BASE ((volatile void *) KSEG1ADDR(REGBASE)) | |
14 | #define UART0BASE 0x58000 | |
15 | #define RST (1 << 15) | |
16 | #define DEV0BASE 0x010000 | |
17 | #define DEV0MASK 0x010004 | |
18 | #define DEV0C 0x010008 | |
19 | #define DEV0T 0x01000C | |
20 | #define DEV1BASE 0x010010 | |
21 | #define DEV1MASK 0x010014 | |
22 | #define DEV1C 0x010018 | |
23 | #define DEV1TC 0x01001C | |
24 | #define DEV2BASE 0x010020 | |
25 | #define DEV2MASK 0x010024 | |
26 | #define DEV2C 0x010028 | |
27 | #define DEV2TC 0x01002C | |
28 | #define DEV3BASE 0x010030 | |
29 | #define DEV3MASK 0x010034 | |
30 | #define DEV3C 0x010038 | |
31 | #define DEV3TC 0x01003C | |
32 | #define BTCS 0x010040 | |
33 | #define BTCOMPARE 0x010044 | |
34 | #define GPIOBASE 0x050000 | |
35 | /* Offsets relative to GPIOBASE */ | |
36 | #define GPIOFUNC 0x00 | |
37 | #define GPIOCFG 0x04 | |
38 | #define GPIOD 0x08 | |
39 | #define GPIOILEVEL 0x0C | |
40 | #define GPIOISTAT 0x10 | |
41 | #define GPIONMIEN 0x14 | |
42 | #define IMASK6 0x38 | |
43 | #define LO_WPX (1 << 0) | |
44 | #define LO_ALE (1 << 1) | |
45 | #define LO_CLE (1 << 2) | |
46 | #define LO_CEX (1 << 3) | |
47 | #define LO_FOFF (1 << 5) | |
48 | #define LO_SPICS (1 << 6) | |
49 | #define LO_ULED (1 << 7) | |
50 | ||
51 | #define BIT_TO_MASK(x) (1 << x) | |
52 | ||
53 | struct dev_reg { | |
54 | u32 base; | |
55 | u32 mask; | |
56 | u32 ctl; | |
57 | u32 timing; | |
58 | }; | |
59 | ||
60 | struct korina_device { | |
61 | char *name; | |
62 | unsigned char mac[6]; | |
63 | struct net_device *dev; | |
64 | }; | |
65 | ||
66 | struct mpmc_device { | |
67 | unsigned char state; | |
68 | spinlock_t lock; | |
69 | void __iomem *base; | |
70 | }; | |
71 | ||
72 | extern void set_latch_u5(unsigned char or_mask, unsigned char nand_mask); | |
73 | extern unsigned char get_latch_u5(void); | |
74 | ||
75 | #endif /* __ASM_RC32434_RB_H */ |