| | 1 | /* thread_info.h: MIPS low-level thread information |
| | 2 | * |
| | 3 | * Copyright (C) 2002 David Howells (dhowells@redhat.com) |
| | 4 | * - Incorporating suggestions made by Linus Torvalds and Dave Miller |
| | 5 | */ |
| | 6 | |
| | 7 | #ifndef _ASM_THREAD_INFO_H |
| | 8 | #define _ASM_THREAD_INFO_H |
| | 9 | |
| | 10 | #ifdef __KERNEL__ |
| | 11 | |
| | 12 | |
| | 13 | #ifndef __ASSEMBLY__ |
| | 14 | |
| | 15 | #include <asm/processor.h> |
| | 16 | |
| | 17 | /* |
| | 18 | * low level task data that entry.S needs immediate access to |
| | 19 | * - this struct should fit entirely inside of one cache line |
| | 20 | * - this struct shares the supervisor stack pages |
| | 21 | * - if the contents of this structure are changed, the assembly constants |
| | 22 | * must also be changed |
| | 23 | */ |
| | 24 | struct thread_info { |
| | 25 | struct task_struct *task; /* main task structure */ |
| | 26 | unsigned long flags; /* low level flags */ |
| | 27 | unsigned long tp_value; /* thread pointer */ |
| | 28 | __u32 cpu; /* current CPU */ |
| | 29 | int preempt_count; /* 0 => preemptable, <0 => BUG */ |
| | 30 | mm_segment_t addr_limit; /* |
| | 31 | * thread address space limit: |
| | 32 | * 0x7fffffff for user-thead |
| | 33 | * 0xffffffff for kernel-thread |
| | 34 | */ |
| | 35 | struct pt_regs *regs; |
| | 36 | long syscall; /* syscall number */ |
| | 37 | }; |
| | 38 | |
| | 39 | /* |
| | 40 | * macros/functions for gaining access to the thread information structure |
| | 41 | */ |
| | 42 | #define INIT_THREAD_INFO(tsk) \ |
| | 43 | { \ |
| | 44 | .task = &tsk, \ |
| | 45 | .flags = _TIF_FIXADE, \ |
| | 46 | .cpu = 0, \ |
| | 47 | .preempt_count = INIT_PREEMPT_COUNT, \ |
| | 48 | .addr_limit = KERNEL_DS, \ |
| | 49 | } |
| | 50 | |
| | 51 | #define init_thread_info (init_thread_union.thread_info) |
| | 52 | #define init_stack (init_thread_union.stack) |
| | 53 | |
| | 54 | /* How to get the thread information struct from C. */ |
| | 55 | register struct thread_info *__current_thread_info __asm__("$28"); |
| | 56 | |
| | 57 | static inline struct thread_info *current_thread_info(void) |
| | 58 | { |
| | 59 | return __current_thread_info; |
| | 60 | } |
| | 61 | |
| | 62 | #endif /* !__ASSEMBLY__ */ |
| | 63 | |
| | 64 | /* thread information allocation */ |
| | 65 | #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT) |
| | 66 | #define THREAD_SIZE_ORDER (1) |
| | 67 | #endif |
| | 68 | #if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_64BIT) |
| | 69 | #define THREAD_SIZE_ORDER (2) |
| | 70 | #endif |
| | 71 | #ifdef CONFIG_PAGE_SIZE_8KB |
| | 72 | #define THREAD_SIZE_ORDER (1) |
| | 73 | #endif |
| | 74 | #ifdef CONFIG_PAGE_SIZE_16KB |
| | 75 | #define THREAD_SIZE_ORDER (0) |
| | 76 | #endif |
| | 77 | #ifdef CONFIG_PAGE_SIZE_32KB |
| | 78 | #define THREAD_SIZE_ORDER (0) |
| | 79 | #endif |
| | 80 | #ifdef CONFIG_PAGE_SIZE_64KB |
| | 81 | #define THREAD_SIZE_ORDER (0) |
| | 82 | #endif |
| | 83 | |
| | 84 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) |
| | 85 | #define THREAD_MASK (THREAD_SIZE - 1UL) |
| | 86 | |
| | 87 | #define STACK_WARN (THREAD_SIZE / 8) |
| | 88 | |
| | 89 | /* |
| | 90 | * thread information flags |
| | 91 | * - these are process state flags that various assembly files may need to |
| | 92 | * access |
| | 93 | * - pending work-to-be-done flags are in LSW |
| | 94 | * - other flags in MSW |
| | 95 | */ |
| | 96 | #define TIF_SIGPENDING 1 /* signal pending */ |
| | 97 | #define TIF_NEED_RESCHED 2 /* rescheduling necessary */ |
| | 98 | #define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */ |
| | 99 | #define TIF_SECCOMP 4 /* secure computing */ |
| | 100 | #define TIF_NOTIFY_RESUME 5 /* callback before returning to user */ |
| | 101 | #define TIF_UPROBE 6 /* breakpointed or singlestepping */ |
| | 102 | #define TIF_RESTORE_SIGMASK 9 /* restore signal mask in do_signal() */ |
| | 103 | #define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ |
| | 104 | #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ |
| | 105 | #define TIF_NOHZ 19 /* in adaptive nohz mode */ |
| | 106 | #define TIF_FIXADE 20 /* Fix address errors in software */ |
| | 107 | #define TIF_LOGADE 21 /* Log address errors to syslog */ |
| | 108 | #define TIF_32BIT_REGS 22 /* 32-bit general purpose registers */ |
| | 109 | #define TIF_32BIT_ADDR 23 /* 32-bit address space (o32/n32) */ |
| | 110 | #define TIF_FPUBOUND 24 /* thread bound to FPU-full CPU set */ |
| | 111 | #define TIF_LOAD_WATCH 25 /* If set, load watch registers */ |
| | 112 | #define TIF_SYSCALL_TRACEPOINT 26 /* syscall tracepoint instrumentation */ |
| | 113 | #define TIF_32BIT_FPREGS 27 /* 32-bit floating point registers */ |
| | 114 | #define TIF_HYBRID_FPREGS 28 /* 64b FP registers, odd singles in bits 63:32 of even doubles */ |
| | 115 | #define TIF_USEDMSA 29 /* MSA has been used this quantum */ |
| | 116 | #define TIF_MSA_CTX_LIVE 30 /* MSA context must be preserved */ |
| | 117 | #define TIF_SYSCALL_TRACE 31 /* syscall trace active */ |
| | 118 | |
| | 119 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
| | 120 | #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) |
| | 121 | #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) |
| | 122 | #define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) |
| | 123 | #define _TIF_SECCOMP (1<<TIF_SECCOMP) |
| | 124 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
| | 125 | #define _TIF_UPROBE (1<<TIF_UPROBE) |
| | 126 | #define _TIF_USEDFPU (1<<TIF_USEDFPU) |
| | 127 | #define _TIF_NOHZ (1<<TIF_NOHZ) |
| | 128 | #define _TIF_FIXADE (1<<TIF_FIXADE) |
| | 129 | #define _TIF_LOGADE (1<<TIF_LOGADE) |
| | 130 | #define _TIF_32BIT_REGS (1<<TIF_32BIT_REGS) |
| | 131 | #define _TIF_32BIT_ADDR (1<<TIF_32BIT_ADDR) |
| | 132 | #define _TIF_FPUBOUND (1<<TIF_FPUBOUND) |
| | 133 | #define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH) |
| | 134 | #define _TIF_32BIT_FPREGS (1<<TIF_32BIT_FPREGS) |
| | 135 | #define _TIF_HYBRID_FPREGS (1<<TIF_HYBRID_FPREGS) |
| | 136 | #define _TIF_USEDMSA (1<<TIF_USEDMSA) |
| | 137 | #define _TIF_MSA_CTX_LIVE (1<<TIF_MSA_CTX_LIVE) |
| | 138 | #define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT) |
| | 139 | |
| | 140 | #define _TIF_WORK_SYSCALL_ENTRY (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \ |
| | 141 | _TIF_SYSCALL_AUDIT | \ |
| | 142 | _TIF_SYSCALL_TRACEPOINT | _TIF_SECCOMP) |
| | 143 | |
| | 144 | /* work to do in syscall_trace_leave() */ |
| | 145 | #define _TIF_WORK_SYSCALL_EXIT (_TIF_NOHZ | _TIF_SYSCALL_TRACE | \ |
| | 146 | _TIF_SYSCALL_AUDIT | _TIF_SYSCALL_TRACEPOINT) |
| | 147 | |
| | 148 | /* work to do on interrupt/exception return */ |
| | 149 | #define _TIF_WORK_MASK \ |
| | 150 | (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_NOTIFY_RESUME | \ |
| | 151 | _TIF_UPROBE) |
| | 152 | /* work to do on any return to u-space */ |
| | 153 | #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \ |
| | 154 | _TIF_WORK_SYSCALL_EXIT | \ |
| | 155 | _TIF_SYSCALL_TRACEPOINT) |
| | 156 | |
| | 157 | /* |
| | 158 | * We stash processor id into a COP0 register to retrieve it fast |
| | 159 | * at kernel exception entry. |
| | 160 | */ |
| | 161 | #if defined(CONFIG_MIPS_PGD_C0_CONTEXT) |
| | 162 | #define SMP_CPUID_REG 20, 0 /* XCONTEXT */ |
| | 163 | #define ASM_SMP_CPUID_REG $20 |
| | 164 | #define SMP_CPUID_PTRSHIFT 48 |
| | 165 | #else |
| | 166 | #define SMP_CPUID_REG 4, 0 /* CONTEXT */ |
| | 167 | #define ASM_SMP_CPUID_REG $4 |
| | 168 | #define SMP_CPUID_PTRSHIFT 23 |
| | 169 | #endif |
| | 170 | |
| | 171 | #ifdef CONFIG_64BIT |
| | 172 | #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3) |
| | 173 | #else |
| | 174 | #define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2) |
| | 175 | #endif |
| | 176 | |
| | 177 | #define ASM_CPUID_MFC0 MFC0 |
| | 178 | #define UASM_i_CPUID_MFC0 UASM_i_MFC0 |
| | 179 | |
| | 180 | #endif /* __KERNEL__ */ |
| | 181 | #endif /* _ASM_THREAD_INFO_H */ |
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