]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * This program is free software; you can redistribute it and/or modify it | |
3 | * under the terms of the GNU General Public License as published by the | |
4 | * Free Software Foundation; either version 2 of the License, or (at your | |
5 | * option) any later version. | |
6 | * | |
7 | * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org) | |
8 | * Copyright (C) 2011 Wind River Systems, | |
9 | * written by Ralf Baechle (ralf@linux-mips.org) | |
10 | */ | |
11 | #include <linux/bug.h> | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/mm.h> | |
14 | #include <linux/bootmem.h> | |
15 | #include <linux/export.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/types.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/of_address.h> | |
20 | ||
21 | #include <asm/cpu-info.h> | |
22 | ||
23 | unsigned long PCIBIOS_MIN_IO; | |
24 | EXPORT_SYMBOL(PCIBIOS_MIN_IO); | |
25 | ||
26 | unsigned long PCIBIOS_MIN_MEM; | |
27 | EXPORT_SYMBOL(PCIBIOS_MIN_MEM); | |
28 | ||
29 | static int __init pcibios_set_cache_line_size(void) | |
30 | { | |
31 | struct cpuinfo_mips *c = ¤t_cpu_data; | |
32 | unsigned int lsize; | |
33 | ||
34 | /* | |
35 | * Set PCI cacheline size to that of the highest level in the | |
36 | * cache hierarchy. | |
37 | */ | |
38 | lsize = c->dcache.linesz; | |
39 | lsize = c->scache.linesz ? : lsize; | |
40 | lsize = c->tcache.linesz ? : lsize; | |
41 | ||
42 | BUG_ON(!lsize); | |
43 | ||
44 | pci_dfl_cache_line_size = lsize >> 2; | |
45 | ||
46 | pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize); | |
47 | return 0; | |
48 | } | |
49 | arch_initcall(pcibios_set_cache_line_size); | |
50 | ||
51 | void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
52 | const struct resource *rsrc, resource_size_t *start, | |
53 | resource_size_t *end) | |
54 | { | |
55 | phys_addr_t size = resource_size(rsrc); | |
56 | ||
57 | *start = fixup_bigphys_addr(rsrc->start, size); | |
58 | *end = rsrc->start + size; | |
59 | } | |
60 | ||
61 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
62 | enum pci_mmap_state mmap_state, int write_combine) | |
63 | { | |
64 | unsigned long prot; | |
65 | ||
66 | /* | |
67 | * I/O space can be accessed via normal processor loads and stores on | |
68 | * this platform but for now we elect not to do this and portable | |
69 | * drivers should not do this anyway. | |
70 | */ | |
71 | if (mmap_state == pci_mmap_io) | |
72 | return -EINVAL; | |
73 | ||
74 | /* | |
75 | * Ignore write-combine; for now only return uncached mappings. | |
76 | */ | |
77 | prot = pgprot_val(vma->vm_page_prot); | |
78 | prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; | |
79 | vma->vm_page_prot = __pgprot(prot); | |
80 | ||
81 | return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, | |
82 | vma->vm_end - vma->vm_start, vma->vm_page_prot); | |
83 | } |