[mirror_ubuntu-zesty-kernel.git] / arch / openrisc / Kconfig

#
# For a description of the syntax of this configuration file,
# see Documentation/kbuild/kconfig-language.txt.
#

config OPENRISC
	def_bool y
	select OF
	select OF_EARLY_FLATTREE
	select IRQ_DOMAIN
	select HANDLE_DOMAIN_IRQ
	select HAVE_MEMBLOCK
	select GPIOLIB
        select HAVE_ARCH_TRACEHOOK
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_PROBE
	select GENERIC_IRQ_SHOW
	select GENERIC_IOMAP
	select GENERIC_CPU_DEVICES
	select HAVE_UID16
	select GENERIC_ATOMIC64
	select GENERIC_CLOCKEVENTS
	select GENERIC_STRNCPY_FROM_USER
	select GENERIC_STRNLEN_USER
	select MODULES_USE_ELF_RELA
	select HAVE_DEBUG_STACKOVERFLOW
	select OR1K_PIC
	select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1

config MMU
	def_bool y

config RWSEM_GENERIC_SPINLOCK
	def_bool y

config RWSEM_XCHGADD_ALGORITHM
	def_bool n

config GENERIC_HWEIGHT
	def_bool y

config NO_IOPORT_MAP
	def_bool y

config TRACE_IRQFLAGS_SUPPORT
        def_bool y

# For now, use generic checksum functions
#These can be reimplemented in assembly later if so inclined
config GENERIC_CSUM
        def_bool y

source "init/Kconfig"

source "kernel/Kconfig.freezer"

menu "Processor type and features"

choice
	prompt "Subarchitecture"
	default OR1K_1200

config OR1K_1200
	bool "OR1200"
	help
	  Generic OpenRISC 1200 architecture

endchoice

config OPENRISC_BUILTIN_DTB
        string "Builtin DTB"
        default ""

menu "Class II Instructions"

config OPENRISC_HAVE_INST_FF1
	bool "Have instruction l.ff1"
	default y
	help
	  Select this if your implementation has the Class II instruction l.ff1

config OPENRISC_HAVE_INST_FL1
	bool "Have instruction l.fl1"
	default y
	help
	  Select this if your implementation has the Class II instruction l.fl1

config OPENRISC_HAVE_INST_MUL
	bool "Have instruction l.mul for hardware multiply"
	default y
	help
	  Select this if your implementation has a hardware multiply instruction

config OPENRISC_HAVE_INST_DIV
	bool "Have instruction l.div for hardware divide"
	default y
	help
	  Select this if your implementation has a hardware divide instruction
endmenu


source kernel/Kconfig.hz
source kernel/Kconfig.preempt
source "mm/Kconfig"

config OPENRISC_NO_SPR_SR_DSX
	bool "use SPR_SR_DSX software emulation" if OR1K_1200
	default y
	help
	  SPR_SR_DSX bit is status register bit indicating whether
	  the last exception has happened in delay slot.

	  OpenRISC architecture makes it optional to have it implemented
	  in hardware and the OR1200 does not have it.

	  Say N here if you know that your OpenRISC processor has
	  SPR_SR_DSX bit implemented. Say Y if you are unsure.

config CMDLINE
        string "Default kernel command string"
        default ""
        help
          On some architectures there is currently no way for the boot loader
          to pass arguments to the kernel. For these architectures, you should
          supply some command-line options at build time by entering them
          here.

menu "Debugging options"

config JUMP_UPON_UNHANDLED_EXCEPTION
	bool "Try to die gracefully"
	default y
	help
	  Now this puts kernel into infinite loop after first oops. Till
	  your kernel crashes this doesn't have any influence.

	  Say Y if you are unsure.

config OPENRISC_ESR_EXCEPTION_BUG_CHECK
	bool "Check for possible ESR exception bug"
	default n
	help
	  This option enables some checks that might expose some problems
          in kernel.

	  Say N if you are unsure.

endmenu

endmenu

menu "Executable file formats"

source "fs/Kconfig.binfmt"

endmenu

source "net/Kconfig"

source "drivers/Kconfig"

source "fs/Kconfig"

source "security/Kconfig"

source "crypto/Kconfig"

source "lib/Kconfig"

menu "Kernel hacking"

source "lib/Kconfig.debug"

endmenu
Commit	Line	Data
	1	#
	2	# For a description of the syntax of this configuration file,
	3	# see Documentation/kbuild/kconfig-language.txt.
	4	#
	5
	6	config OPENRISC
	7	def_bool y
	8	select OF
	9	select OF_EARLY_FLATTREE
	10	select IRQ_DOMAIN
	11	select HANDLE_DOMAIN_IRQ
	12	select HAVE_MEMBLOCK
	13	select GPIOLIB
	14	select HAVE_ARCH_TRACEHOOK
	15	select GENERIC_IRQ_CHIP
	16	select GENERIC_IRQ_PROBE
	17	select GENERIC_IRQ_SHOW
	18	select GENERIC_IOMAP
	19	select GENERIC_CPU_DEVICES
	20	select HAVE_UID16
	21	select GENERIC_ATOMIC64
	22	select GENERIC_CLOCKEVENTS
	23	select GENERIC_STRNCPY_FROM_USER
	24	select GENERIC_STRNLEN_USER
	25	select MODULES_USE_ELF_RELA
	26	select HAVE_DEBUG_STACKOVERFLOW
	27	select OR1K_PIC
	28	select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
	29
	30	config MMU
	31	def_bool y
	32
	33	config RWSEM_GENERIC_SPINLOCK
	34	def_bool y
	35
	36	config RWSEM_XCHGADD_ALGORITHM
	37	def_bool n
	38
	39	config GENERIC_HWEIGHT
	40	def_bool y
	41
	42	config NO_IOPORT_MAP
	43	def_bool y
	44
	45	config TRACE_IRQFLAGS_SUPPORT
	46	def_bool y
	47
	48	# For now, use generic checksum functions
	49	#These can be reimplemented in assembly later if so inclined
	50	config GENERIC_CSUM
	51	def_bool y
	52
	53	source "init/Kconfig"
	54
	55	source "kernel/Kconfig.freezer"
	56
	57	menu "Processor type and features"
	58
	59	choice
	60	prompt "Subarchitecture"
	61	default OR1K_1200
	62
	63	config OR1K_1200
	64	bool "OR1200"
	65	help
	66	Generic OpenRISC 1200 architecture
	67
	68	endchoice
	69
	70	config OPENRISC_BUILTIN_DTB
	71	string "Builtin DTB"
	72	default ""
	73
	74	menu "Class II Instructions"
	75
	76	config OPENRISC_HAVE_INST_FF1
	77	bool "Have instruction l.ff1"
	78	default y
	79	help
	80	Select this if your implementation has the Class II instruction l.ff1
	81
	82	config OPENRISC_HAVE_INST_FL1
	83	bool "Have instruction l.fl1"
	84	default y
	85	help
	86	Select this if your implementation has the Class II instruction l.fl1
	87
	88	config OPENRISC_HAVE_INST_MUL
	89	bool "Have instruction l.mul for hardware multiply"
	90	default y
	91	help
	92	Select this if your implementation has a hardware multiply instruction
	93
	94	config OPENRISC_HAVE_INST_DIV
	95	bool "Have instruction l.div for hardware divide"
	96	default y
	97	help
	98	Select this if your implementation has a hardware divide instruction
	99	endmenu
	100
	101
	102	source kernel/Kconfig.hz
	103	source kernel/Kconfig.preempt
	104	source "mm/Kconfig"
	105
	106	config OPENRISC_NO_SPR_SR_DSX
	107	bool "use SPR_SR_DSX software emulation" if OR1K_1200
	108	default y
	109	help
	110	SPR_SR_DSX bit is status register bit indicating whether
	111	the last exception has happened in delay slot.
	112
	113	OpenRISC architecture makes it optional to have it implemented
	114	in hardware and the OR1200 does not have it.
	115
	116	Say N here if you know that your OpenRISC processor has
	117	SPR_SR_DSX bit implemented. Say Y if you are unsure.
	118
	119	config CMDLINE
	120	string "Default kernel command string"
	121	default ""
	122	help
	123	On some architectures there is currently no way for the boot loader
	124	to pass arguments to the kernel. For these architectures, you should
	125	supply some command-line options at build time by entering them
	126	here.
	127
	128	menu "Debugging options"
	129
	130	config JUMP_UPON_UNHANDLED_EXCEPTION
	131	bool "Try to die gracefully"
	132	default y
	133	help
	134	Now this puts kernel into infinite loop after first oops. Till
	135	your kernel crashes this doesn't have any influence.
	136
	137	Say Y if you are unsure.
	138
	139	config OPENRISC_ESR_EXCEPTION_BUG_CHECK
	140	bool "Check for possible ESR exception bug"
	141	default n
	142	help
	143	This option enables some checks that might expose some problems
	144	in kernel.
	145
	146	Say N if you are unsure.
	147
	148	endmenu
	149
	150	endmenu
	151
	152	menu "Executable file formats"
	153
	154	source "fs/Kconfig.binfmt"
	155
	156	endmenu
	157
	158	source "net/Kconfig"
	159
	160	source "drivers/Kconfig"
	161
	162	source "fs/Kconfig"
	163
	164	source "security/Kconfig"
	165
	166	source "crypto/Kconfig"
	167
	168	source "lib/Kconfig"
	169
	170	menu "Kernel hacking"
	171
	172	source "lib/Kconfig.debug"
	173
	174	endmenu