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1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ | |
2 | /* | |
3 | * Copyright 2016-17 IBM Corp. | |
4 | */ | |
5 | ||
6 | #ifndef _ASM_POWERPC_VAS_H | |
7 | #define _ASM_POWERPC_VAS_H | |
8 | ||
9 | struct vas_window; | |
10 | ||
11 | /* | |
12 | * Min and max FIFO sizes are based on Version 1.05 Section 3.1.4.25 | |
13 | * (Local FIFO Size Register) of the VAS workbook. | |
14 | */ | |
15 | #define VAS_RX_FIFO_SIZE_MIN (1 << 10) /* 1KB */ | |
16 | #define VAS_RX_FIFO_SIZE_MAX (8 << 20) /* 8MB */ | |
17 | ||
18 | /* | |
19 | * Threshold Control Mode: Have paste operation fail if the number of | |
20 | * requests in receive FIFO exceeds a threshold. | |
21 | * | |
22 | * NOTE: No special error code yet if paste is rejected because of these | |
23 | * limits. So users can't distinguish between this and other errors. | |
24 | */ | |
25 | #define VAS_THRESH_DISABLED 0 | |
26 | #define VAS_THRESH_FIFO_GT_HALF_FULL 1 | |
27 | #define VAS_THRESH_FIFO_GT_QTR_FULL 2 | |
28 | #define VAS_THRESH_FIFO_GT_EIGHTH_FULL 3 | |
29 | ||
30 | /* | |
31 | * Get/Set bit fields | |
32 | */ | |
33 | #define GET_FIELD(m, v) (((v) & (m)) >> MASK_LSH(m)) | |
34 | #define MASK_LSH(m) (__builtin_ffsl(m) - 1) | |
35 | #define SET_FIELD(m, v, val) \ | |
36 | (((v) & ~(m)) | ((((typeof(v))(val)) << MASK_LSH(m)) & (m))) | |
37 | ||
38 | /* | |
39 | * Co-processor Engine type. | |
40 | */ | |
41 | enum vas_cop_type { | |
42 | VAS_COP_TYPE_FAULT, | |
43 | VAS_COP_TYPE_842, | |
44 | VAS_COP_TYPE_842_HIPRI, | |
45 | VAS_COP_TYPE_GZIP, | |
46 | VAS_COP_TYPE_GZIP_HIPRI, | |
47 | VAS_COP_TYPE_FTW, | |
48 | VAS_COP_TYPE_MAX, | |
49 | }; | |
50 | ||
51 | /* | |
52 | * Receive window attributes specified by the (in-kernel) owner of window. | |
53 | */ | |
54 | struct vas_rx_win_attr { | |
55 | void *rx_fifo; | |
56 | int rx_fifo_size; | |
57 | int wcreds_max; | |
58 | ||
59 | bool pin_win; | |
60 | bool rej_no_credit; | |
61 | bool tx_wcred_mode; | |
62 | bool rx_wcred_mode; | |
63 | bool tx_win_ord_mode; | |
64 | bool rx_win_ord_mode; | |
65 | bool data_stamp; | |
66 | bool nx_win; | |
67 | bool fault_win; | |
68 | bool user_win; | |
69 | bool notify_disable; | |
70 | bool intr_disable; | |
71 | bool notify_early; | |
72 | ||
73 | int lnotify_lpid; | |
74 | int lnotify_pid; | |
75 | int lnotify_tid; | |
76 | u32 pswid; | |
77 | ||
78 | int tc_mode; | |
79 | }; | |
80 | ||
81 | /* | |
82 | * Window attributes specified by the in-kernel owner of a send window. | |
83 | */ | |
84 | struct vas_tx_win_attr { | |
85 | enum vas_cop_type cop; | |
86 | int wcreds_max; | |
87 | int lpid; | |
88 | int pidr; /* hardware PID (from SPRN_PID) */ | |
89 | int pid; /* linux process id */ | |
90 | int pswid; | |
91 | int rsvd_txbuf_count; | |
92 | int tc_mode; | |
93 | ||
94 | bool user_win; | |
95 | bool pin_win; | |
96 | bool rej_no_credit; | |
97 | bool rsvd_txbuf_enable; | |
98 | bool tx_wcred_mode; | |
99 | bool rx_wcred_mode; | |
100 | bool tx_win_ord_mode; | |
101 | bool rx_win_ord_mode; | |
102 | }; | |
103 | ||
104 | /* | |
105 | * Helper to map a chip id to VAS id. | |
106 | * For POWER9, this is a 1:1 mapping. In the future this maybe a 1:N | |
107 | * mapping in which case, we will need to update this helper. | |
108 | * | |
109 | * Return the VAS id or -1 if no matching vasid is found. | |
110 | */ | |
111 | int chip_to_vas_id(int chipid); | |
112 | ||
113 | /* | |
114 | * Helper to initialize receive window attributes to defaults for an | |
115 | * NX window. | |
116 | */ | |
117 | void vas_init_rx_win_attr(struct vas_rx_win_attr *rxattr, enum vas_cop_type cop); | |
118 | ||
119 | /* | |
120 | * Open a VAS receive window for the instance of VAS identified by @vasid | |
121 | * Use @attr to initialize the attributes of the window. | |
122 | * | |
123 | * Return a handle to the window or ERR_PTR() on error. | |
124 | */ | |
125 | struct vas_window *vas_rx_win_open(int vasid, enum vas_cop_type cop, | |
126 | struct vas_rx_win_attr *attr); | |
127 | ||
128 | /* | |
129 | * Helper to initialize send window attributes to defaults for an NX window. | |
130 | */ | |
131 | extern void vas_init_tx_win_attr(struct vas_tx_win_attr *txattr, | |
132 | enum vas_cop_type cop); | |
133 | ||
134 | /* | |
135 | * Open a VAS send window for the instance of VAS identified by @vasid | |
136 | * and the co-processor type @cop. Use @attr to initialize attributes | |
137 | * of the window. | |
138 | * | |
139 | * Note: The instance of VAS must already have an open receive window for | |
140 | * the coprocessor type @cop. | |
141 | * | |
142 | * Return a handle to the send window or ERR_PTR() on error. | |
143 | */ | |
144 | struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, | |
145 | struct vas_tx_win_attr *attr); | |
146 | ||
147 | /* | |
148 | * Close the send or receive window identified by @win. For receive windows | |
149 | * return -EAGAIN if there are active send windows attached to this receive | |
150 | * window. | |
151 | */ | |
152 | int vas_win_close(struct vas_window *win); | |
153 | ||
154 | /* | |
155 | * Copy the co-processor request block (CRB) @crb into the local L2 cache. | |
156 | */ | |
157 | int vas_copy_crb(void *crb, int offset); | |
158 | ||
159 | /* | |
160 | * Paste a previously copied CRB (see vas_copy_crb()) from the L2 cache to | |
161 | * the hardware address associated with the window @win. @re is expected/ | |
162 | * assumed to be true for NX windows. | |
163 | */ | |
164 | int vas_paste_crb(struct vas_window *win, int offset, bool re); | |
165 | ||
166 | /* | |
167 | * Return a system-wide unique id for the VAS window @win. | |
168 | */ | |
169 | extern u32 vas_win_id(struct vas_window *win); | |
170 | ||
171 | /* | |
172 | * Return the power bus paste address associated with @win so the caller | |
173 | * can map that address into their address space. | |
174 | */ | |
175 | extern u64 vas_win_paste_addr(struct vas_window *win); | |
176 | #endif /* __ASM_POWERPC_VAS_H */ |