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1 | /* | |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
11 | #ifndef _ASM_X86_KVM_HOST_H | |
12 | #define _ASM_X86_KVM_HOST_H | |
13 | ||
14 | #include <linux/types.h> | |
15 | #include <linux/mm.h> | |
16 | #include <linux/mmu_notifier.h> | |
17 | #include <linux/tracepoint.h> | |
18 | #include <linux/cpumask.h> | |
19 | #include <linux/irq_work.h> | |
20 | ||
21 | #include <linux/kvm.h> | |
22 | #include <linux/kvm_para.h> | |
23 | #include <linux/kvm_types.h> | |
24 | #include <linux/perf_event.h> | |
25 | ||
26 | #include <asm/pvclock-abi.h> | |
27 | #include <asm/desc.h> | |
28 | #include <asm/mtrr.h> | |
29 | #include <asm/msr-index.h> | |
30 | ||
31 | #define KVM_MAX_VCPUS 254 | |
32 | #define KVM_SOFT_MAX_VCPUS 160 | |
33 | #define KVM_MEMORY_SLOTS 32 | |
34 | /* memory slots that does not exposed to userspace */ | |
35 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
36 | #define KVM_MEM_SLOTS_NUM (KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS) | |
37 | ||
38 | #define KVM_MMIO_SIZE 16 | |
39 | ||
40 | #define KVM_PIO_PAGE_OFFSET 1 | |
41 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 | |
42 | ||
43 | #define CR0_RESERVED_BITS \ | |
44 | (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ | |
45 | | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ | |
46 | | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) | |
47 | ||
48 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) | |
49 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
50 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ | |
51 | 0xFFFFFF0000000000ULL) | |
52 | #define CR4_RESERVED_BITS \ | |
53 | (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ | |
54 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ | |
55 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \ | |
56 | | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \ | |
57 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) | |
58 | ||
59 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) | |
60 | ||
61 | ||
62 | ||
63 | #define INVALID_PAGE (~(hpa_t)0) | |
64 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) | |
65 | ||
66 | #define UNMAPPED_GVA (~(gpa_t)0) | |
67 | ||
68 | /* KVM Hugepage definitions for x86 */ | |
69 | #define KVM_NR_PAGE_SIZES 3 | |
70 | #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) | |
71 | #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) | |
72 | #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) | |
73 | #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) | |
74 | #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) | |
75 | ||
76 | #define DE_VECTOR 0 | |
77 | #define DB_VECTOR 1 | |
78 | #define BP_VECTOR 3 | |
79 | #define OF_VECTOR 4 | |
80 | #define BR_VECTOR 5 | |
81 | #define UD_VECTOR 6 | |
82 | #define NM_VECTOR 7 | |
83 | #define DF_VECTOR 8 | |
84 | #define TS_VECTOR 10 | |
85 | #define NP_VECTOR 11 | |
86 | #define SS_VECTOR 12 | |
87 | #define GP_VECTOR 13 | |
88 | #define PF_VECTOR 14 | |
89 | #define MF_VECTOR 16 | |
90 | #define MC_VECTOR 18 | |
91 | ||
92 | #define SELECTOR_TI_MASK (1 << 2) | |
93 | #define SELECTOR_RPL_MASK 0x03 | |
94 | ||
95 | #define IOPL_SHIFT 12 | |
96 | ||
97 | #define KVM_PERMILLE_MMU_PAGES 20 | |
98 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
99 | #define KVM_MMU_HASH_SHIFT 10 | |
100 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
101 | #define KVM_MIN_FREE_MMU_PAGES 5 | |
102 | #define KVM_REFILL_PAGES 25 | |
103 | #define KVM_MAX_CPUID_ENTRIES 80 | |
104 | #define KVM_NR_FIXED_MTRR_REGION 88 | |
105 | #define KVM_NR_VAR_MTRR 8 | |
106 | ||
107 | #define ASYNC_PF_PER_VCPU 64 | |
108 | ||
109 | extern raw_spinlock_t kvm_lock; | |
110 | extern struct list_head vm_list; | |
111 | ||
112 | struct kvm_vcpu; | |
113 | struct kvm; | |
114 | struct kvm_async_pf; | |
115 | ||
116 | enum kvm_reg { | |
117 | VCPU_REGS_RAX = 0, | |
118 | VCPU_REGS_RCX = 1, | |
119 | VCPU_REGS_RDX = 2, | |
120 | VCPU_REGS_RBX = 3, | |
121 | VCPU_REGS_RSP = 4, | |
122 | VCPU_REGS_RBP = 5, | |
123 | VCPU_REGS_RSI = 6, | |
124 | VCPU_REGS_RDI = 7, | |
125 | #ifdef CONFIG_X86_64 | |
126 | VCPU_REGS_R8 = 8, | |
127 | VCPU_REGS_R9 = 9, | |
128 | VCPU_REGS_R10 = 10, | |
129 | VCPU_REGS_R11 = 11, | |
130 | VCPU_REGS_R12 = 12, | |
131 | VCPU_REGS_R13 = 13, | |
132 | VCPU_REGS_R14 = 14, | |
133 | VCPU_REGS_R15 = 15, | |
134 | #endif | |
135 | VCPU_REGS_RIP, | |
136 | NR_VCPU_REGS | |
137 | }; | |
138 | ||
139 | enum kvm_reg_ex { | |
140 | VCPU_EXREG_PDPTR = NR_VCPU_REGS, | |
141 | VCPU_EXREG_CR3, | |
142 | VCPU_EXREG_RFLAGS, | |
143 | VCPU_EXREG_CPL, | |
144 | VCPU_EXREG_SEGMENTS, | |
145 | }; | |
146 | ||
147 | enum { | |
148 | VCPU_SREG_ES, | |
149 | VCPU_SREG_CS, | |
150 | VCPU_SREG_SS, | |
151 | VCPU_SREG_DS, | |
152 | VCPU_SREG_FS, | |
153 | VCPU_SREG_GS, | |
154 | VCPU_SREG_TR, | |
155 | VCPU_SREG_LDTR, | |
156 | }; | |
157 | ||
158 | #include <asm/kvm_emulate.h> | |
159 | ||
160 | #define KVM_NR_MEM_OBJS 40 | |
161 | ||
162 | #define KVM_NR_DB_REGS 4 | |
163 | ||
164 | #define DR6_BD (1 << 13) | |
165 | #define DR6_BS (1 << 14) | |
166 | #define DR6_FIXED_1 0xffff0ff0 | |
167 | #define DR6_VOLATILE 0x0000e00f | |
168 | ||
169 | #define DR7_BP_EN_MASK 0x000000ff | |
170 | #define DR7_GE (1 << 9) | |
171 | #define DR7_GD (1 << 13) | |
172 | #define DR7_FIXED_1 0x00000400 | |
173 | #define DR7_VOLATILE 0xffff23ff | |
174 | ||
175 | /* | |
176 | * We don't want allocation failures within the mmu code, so we preallocate | |
177 | * enough memory for a single page fault in a cache. | |
178 | */ | |
179 | struct kvm_mmu_memory_cache { | |
180 | int nobjs; | |
181 | void *objects[KVM_NR_MEM_OBJS]; | |
182 | }; | |
183 | ||
184 | /* | |
185 | * kvm_mmu_page_role, below, is defined as: | |
186 | * | |
187 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
188 | * bits 4:7 - page table level for this shadow (1-4) | |
189 | * bits 8:9 - page table quadrant for 2-level guests | |
190 | * bit 16 - direct mapping of virtual to physical mapping at gfn | |
191 | * used for real mode and two-dimensional paging | |
192 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
193 | */ | |
194 | union kvm_mmu_page_role { | |
195 | unsigned word; | |
196 | struct { | |
197 | unsigned level:4; | |
198 | unsigned cr4_pae:1; | |
199 | unsigned quadrant:2; | |
200 | unsigned pad_for_nice_hex_output:6; | |
201 | unsigned direct:1; | |
202 | unsigned access:3; | |
203 | unsigned invalid:1; | |
204 | unsigned nxe:1; | |
205 | unsigned cr0_wp:1; | |
206 | unsigned smep_andnot_wp:1; | |
207 | }; | |
208 | }; | |
209 | ||
210 | struct kvm_mmu_page { | |
211 | struct list_head link; | |
212 | struct hlist_node hash_link; | |
213 | ||
214 | /* | |
215 | * The following two entries are used to key the shadow page in the | |
216 | * hash table. | |
217 | */ | |
218 | gfn_t gfn; | |
219 | union kvm_mmu_page_role role; | |
220 | ||
221 | u64 *spt; | |
222 | /* hold the gfn of each spte inside spt */ | |
223 | gfn_t *gfns; | |
224 | /* | |
225 | * One bit set per slot which has memory | |
226 | * in this shadow page. | |
227 | */ | |
228 | DECLARE_BITMAP(slot_bitmap, KVM_MEM_SLOTS_NUM); | |
229 | bool unsync; | |
230 | int root_count; /* Currently serving as active root */ | |
231 | unsigned int unsync_children; | |
232 | unsigned long parent_ptes; /* Reverse mapping for parent_pte */ | |
233 | DECLARE_BITMAP(unsync_child_bitmap, 512); | |
234 | ||
235 | #ifdef CONFIG_X86_32 | |
236 | int clear_spte_count; | |
237 | #endif | |
238 | ||
239 | int write_flooding_count; | |
240 | ||
241 | struct rcu_head rcu; | |
242 | }; | |
243 | ||
244 | struct kvm_pio_request { | |
245 | unsigned long count; | |
246 | int in; | |
247 | int port; | |
248 | int size; | |
249 | }; | |
250 | ||
251 | /* | |
252 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
253 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
254 | * mode. | |
255 | */ | |
256 | struct kvm_mmu { | |
257 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
258 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); | |
259 | unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); | |
260 | u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index); | |
261 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, | |
262 | bool prefault); | |
263 | void (*inject_page_fault)(struct kvm_vcpu *vcpu, | |
264 | struct x86_exception *fault); | |
265 | void (*free)(struct kvm_vcpu *vcpu); | |
266 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, | |
267 | struct x86_exception *exception); | |
268 | gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); | |
269 | int (*sync_page)(struct kvm_vcpu *vcpu, | |
270 | struct kvm_mmu_page *sp); | |
271 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); | |
272 | void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, | |
273 | u64 *spte, const void *pte); | |
274 | hpa_t root_hpa; | |
275 | int root_level; | |
276 | int shadow_root_level; | |
277 | union kvm_mmu_page_role base_role; | |
278 | bool direct_map; | |
279 | ||
280 | u64 *pae_root; | |
281 | u64 *lm_root; | |
282 | u64 rsvd_bits_mask[2][4]; | |
283 | ||
284 | bool nx; | |
285 | ||
286 | u64 pdptrs[4]; /* pae */ | |
287 | }; | |
288 | ||
289 | enum pmc_type { | |
290 | KVM_PMC_GP = 0, | |
291 | KVM_PMC_FIXED, | |
292 | }; | |
293 | ||
294 | struct kvm_pmc { | |
295 | enum pmc_type type; | |
296 | u8 idx; | |
297 | u64 counter; | |
298 | u64 eventsel; | |
299 | struct perf_event *perf_event; | |
300 | struct kvm_vcpu *vcpu; | |
301 | }; | |
302 | ||
303 | struct kvm_pmu { | |
304 | unsigned nr_arch_gp_counters; | |
305 | unsigned nr_arch_fixed_counters; | |
306 | unsigned available_event_types; | |
307 | u64 fixed_ctr_ctrl; | |
308 | u64 global_ctrl; | |
309 | u64 global_status; | |
310 | u64 global_ovf_ctrl; | |
311 | u64 counter_bitmask[2]; | |
312 | u64 global_ctrl_mask; | |
313 | u8 version; | |
314 | struct kvm_pmc gp_counters[X86_PMC_MAX_GENERIC]; | |
315 | struct kvm_pmc fixed_counters[X86_PMC_MAX_FIXED]; | |
316 | struct irq_work irq_work; | |
317 | u64 reprogram_pmi; | |
318 | }; | |
319 | ||
320 | struct kvm_vcpu_arch { | |
321 | /* | |
322 | * rip and regs accesses must go through | |
323 | * kvm_{register,rip}_{read,write} functions. | |
324 | */ | |
325 | unsigned long regs[NR_VCPU_REGS]; | |
326 | u32 regs_avail; | |
327 | u32 regs_dirty; | |
328 | ||
329 | unsigned long cr0; | |
330 | unsigned long cr0_guest_owned_bits; | |
331 | unsigned long cr2; | |
332 | unsigned long cr3; | |
333 | unsigned long cr4; | |
334 | unsigned long cr4_guest_owned_bits; | |
335 | unsigned long cr8; | |
336 | u32 hflags; | |
337 | u64 efer; | |
338 | u64 apic_base; | |
339 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
340 | int32_t apic_arb_prio; | |
341 | int mp_state; | |
342 | int sipi_vector; | |
343 | u64 ia32_misc_enable_msr; | |
344 | bool tpr_access_reporting; | |
345 | ||
346 | /* | |
347 | * Paging state of the vcpu | |
348 | * | |
349 | * If the vcpu runs in guest mode with two level paging this still saves | |
350 | * the paging mode of the l1 guest. This context is always used to | |
351 | * handle faults. | |
352 | */ | |
353 | struct kvm_mmu mmu; | |
354 | ||
355 | /* | |
356 | * Paging state of an L2 guest (used for nested npt) | |
357 | * | |
358 | * This context will save all necessary information to walk page tables | |
359 | * of the an L2 guest. This context is only initialized for page table | |
360 | * walking and not for faulting since we never handle l2 page faults on | |
361 | * the host. | |
362 | */ | |
363 | struct kvm_mmu nested_mmu; | |
364 | ||
365 | /* | |
366 | * Pointer to the mmu context currently used for | |
367 | * gva_to_gpa translations. | |
368 | */ | |
369 | struct kvm_mmu *walk_mmu; | |
370 | ||
371 | struct kvm_mmu_memory_cache mmu_pte_list_desc_cache; | |
372 | struct kvm_mmu_memory_cache mmu_page_cache; | |
373 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
374 | ||
375 | struct fpu guest_fpu; | |
376 | u64 xcr0; | |
377 | ||
378 | struct kvm_pio_request pio; | |
379 | void *pio_data; | |
380 | ||
381 | u8 event_exit_inst_len; | |
382 | ||
383 | struct kvm_queued_exception { | |
384 | bool pending; | |
385 | bool has_error_code; | |
386 | bool reinject; | |
387 | u8 nr; | |
388 | u32 error_code; | |
389 | } exception; | |
390 | ||
391 | struct kvm_queued_interrupt { | |
392 | bool pending; | |
393 | bool soft; | |
394 | u8 nr; | |
395 | } interrupt; | |
396 | ||
397 | int halt_request; /* real mode on Intel only */ | |
398 | ||
399 | int cpuid_nent; | |
400 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; | |
401 | /* emulate context */ | |
402 | ||
403 | struct x86_emulate_ctxt emulate_ctxt; | |
404 | bool emulate_regs_need_sync_to_vcpu; | |
405 | bool emulate_regs_need_sync_from_vcpu; | |
406 | ||
407 | gpa_t time; | |
408 | struct pvclock_vcpu_time_info hv_clock; | |
409 | unsigned int hw_tsc_khz; | |
410 | unsigned int time_offset; | |
411 | struct page *time_page; | |
412 | ||
413 | struct { | |
414 | u64 msr_val; | |
415 | u64 last_steal; | |
416 | u64 accum_steal; | |
417 | struct gfn_to_hva_cache stime; | |
418 | struct kvm_steal_time steal; | |
419 | } st; | |
420 | ||
421 | u64 last_guest_tsc; | |
422 | u64 last_kernel_ns; | |
423 | u64 last_host_tsc; | |
424 | u64 tsc_offset_adjustment; | |
425 | u64 this_tsc_nsec; | |
426 | u64 this_tsc_write; | |
427 | u8 this_tsc_generation; | |
428 | bool tsc_catchup; | |
429 | bool tsc_always_catchup; | |
430 | s8 virtual_tsc_shift; | |
431 | u32 virtual_tsc_mult; | |
432 | u32 virtual_tsc_khz; | |
433 | ||
434 | atomic_t nmi_queued; /* unprocessed asynchronous NMIs */ | |
435 | unsigned nmi_pending; /* NMI queued after currently running handler */ | |
436 | bool nmi_injected; /* Trying to inject an NMI this entry */ | |
437 | ||
438 | struct mtrr_state_type mtrr_state; | |
439 | u32 pat; | |
440 | ||
441 | int switch_db_regs; | |
442 | unsigned long db[KVM_NR_DB_REGS]; | |
443 | unsigned long dr6; | |
444 | unsigned long dr7; | |
445 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
446 | ||
447 | u64 mcg_cap; | |
448 | u64 mcg_status; | |
449 | u64 mcg_ctl; | |
450 | u64 *mce_banks; | |
451 | ||
452 | /* Cache MMIO info */ | |
453 | u64 mmio_gva; | |
454 | unsigned access; | |
455 | gfn_t mmio_gfn; | |
456 | ||
457 | struct kvm_pmu pmu; | |
458 | ||
459 | /* used for guest single stepping over the given code position */ | |
460 | unsigned long singlestep_rip; | |
461 | ||
462 | /* fields used by HYPER-V emulation */ | |
463 | u64 hv_vapic; | |
464 | ||
465 | cpumask_var_t wbinvd_dirty_mask; | |
466 | ||
467 | unsigned long last_retry_eip; | |
468 | unsigned long last_retry_addr; | |
469 | ||
470 | struct { | |
471 | bool halted; | |
472 | gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; | |
473 | struct gfn_to_hva_cache data; | |
474 | u64 msr_val; | |
475 | u32 id; | |
476 | bool send_user_only; | |
477 | } apf; | |
478 | ||
479 | /* OSVW MSRs (AMD only) */ | |
480 | struct { | |
481 | u64 length; | |
482 | u64 status; | |
483 | } osvw; | |
484 | }; | |
485 | ||
486 | struct kvm_arch { | |
487 | unsigned int n_used_mmu_pages; | |
488 | unsigned int n_requested_mmu_pages; | |
489 | unsigned int n_max_mmu_pages; | |
490 | unsigned int indirect_shadow_pages; | |
491 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
492 | /* | |
493 | * Hash table of struct kvm_mmu_page. | |
494 | */ | |
495 | struct list_head active_mmu_pages; | |
496 | struct list_head assigned_dev_head; | |
497 | struct iommu_domain *iommu_domain; | |
498 | int iommu_flags; | |
499 | struct kvm_pic *vpic; | |
500 | struct kvm_ioapic *vioapic; | |
501 | struct kvm_pit *vpit; | |
502 | int vapics_in_nmi_mode; | |
503 | ||
504 | unsigned int tss_addr; | |
505 | struct page *apic_access_page; | |
506 | ||
507 | gpa_t wall_clock; | |
508 | ||
509 | struct page *ept_identity_pagetable; | |
510 | bool ept_identity_pagetable_done; | |
511 | gpa_t ept_identity_map_addr; | |
512 | ||
513 | unsigned long irq_sources_bitmap; | |
514 | s64 kvmclock_offset; | |
515 | raw_spinlock_t tsc_write_lock; | |
516 | u64 last_tsc_nsec; | |
517 | u64 last_tsc_write; | |
518 | u32 last_tsc_khz; | |
519 | u64 cur_tsc_nsec; | |
520 | u64 cur_tsc_write; | |
521 | u64 cur_tsc_offset; | |
522 | u8 cur_tsc_generation; | |
523 | ||
524 | struct kvm_xen_hvm_config xen_hvm_config; | |
525 | ||
526 | /* fields used by HYPER-V emulation */ | |
527 | u64 hv_guest_os_id; | |
528 | u64 hv_hypercall; | |
529 | ||
530 | atomic_t reader_counter; | |
531 | ||
532 | #ifdef CONFIG_KVM_MMU_AUDIT | |
533 | int audit_point; | |
534 | #endif | |
535 | }; | |
536 | ||
537 | struct kvm_vm_stat { | |
538 | u32 mmu_shadow_zapped; | |
539 | u32 mmu_pte_write; | |
540 | u32 mmu_pte_updated; | |
541 | u32 mmu_pde_zapped; | |
542 | u32 mmu_flooded; | |
543 | u32 mmu_recycled; | |
544 | u32 mmu_cache_miss; | |
545 | u32 mmu_unsync; | |
546 | u32 remote_tlb_flush; | |
547 | u32 lpages; | |
548 | }; | |
549 | ||
550 | struct kvm_vcpu_stat { | |
551 | u32 pf_fixed; | |
552 | u32 pf_guest; | |
553 | u32 tlb_flush; | |
554 | u32 invlpg; | |
555 | ||
556 | u32 exits; | |
557 | u32 io_exits; | |
558 | u32 mmio_exits; | |
559 | u32 signal_exits; | |
560 | u32 irq_window_exits; | |
561 | u32 nmi_window_exits; | |
562 | u32 halt_exits; | |
563 | u32 halt_wakeup; | |
564 | u32 request_irq_exits; | |
565 | u32 irq_exits; | |
566 | u32 host_state_reload; | |
567 | u32 efer_reload; | |
568 | u32 fpu_reload; | |
569 | u32 insn_emulation; | |
570 | u32 insn_emulation_fail; | |
571 | u32 hypercalls; | |
572 | u32 irq_injections; | |
573 | u32 nmi_injections; | |
574 | }; | |
575 | ||
576 | struct x86_instruction_info; | |
577 | ||
578 | struct kvm_x86_ops { | |
579 | int (*cpu_has_kvm_support)(void); /* __init */ | |
580 | int (*disabled_by_bios)(void); /* __init */ | |
581 | int (*hardware_enable)(void *dummy); | |
582 | void (*hardware_disable)(void *dummy); | |
583 | void (*check_processor_compatibility)(void *rtn); | |
584 | int (*hardware_setup)(void); /* __init */ | |
585 | void (*hardware_unsetup)(void); /* __exit */ | |
586 | bool (*cpu_has_accelerated_tpr)(void); | |
587 | void (*cpuid_update)(struct kvm_vcpu *vcpu); | |
588 | ||
589 | /* Create, but do not attach this VCPU */ | |
590 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
591 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
592 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
593 | ||
594 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
595 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
596 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
597 | ||
598 | void (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
599 | struct kvm_guest_debug *dbg); | |
600 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
601 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
602 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
603 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
604 | struct kvm_segment *var, int seg); | |
605 | int (*get_cpl)(struct kvm_vcpu *vcpu); | |
606 | void (*set_segment)(struct kvm_vcpu *vcpu, | |
607 | struct kvm_segment *var, int seg); | |
608 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
609 | void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); | |
610 | void (*decache_cr3)(struct kvm_vcpu *vcpu); | |
611 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
612 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
613 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
614 | int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
615 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
616 | void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
617 | void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
618 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
619 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
620 | void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); | |
621 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); | |
622 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); | |
623 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
624 | void (*fpu_activate)(struct kvm_vcpu *vcpu); | |
625 | void (*fpu_deactivate)(struct kvm_vcpu *vcpu); | |
626 | ||
627 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
628 | ||
629 | void (*run)(struct kvm_vcpu *vcpu); | |
630 | int (*handle_exit)(struct kvm_vcpu *vcpu); | |
631 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
632 | void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
633 | u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
634 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
635 | unsigned char *hypercall_addr); | |
636 | void (*set_irq)(struct kvm_vcpu *vcpu); | |
637 | void (*set_nmi)(struct kvm_vcpu *vcpu); | |
638 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, | |
639 | bool has_error_code, u32 error_code, | |
640 | bool reinject); | |
641 | void (*cancel_injection)(struct kvm_vcpu *vcpu); | |
642 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); | |
643 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); | |
644 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); | |
645 | void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); | |
646 | void (*enable_nmi_window)(struct kvm_vcpu *vcpu); | |
647 | void (*enable_irq_window)(struct kvm_vcpu *vcpu); | |
648 | void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); | |
649 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
650 | int (*get_tdp_level)(void); | |
651 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); | |
652 | int (*get_lpage_level)(void); | |
653 | bool (*rdtscp_supported)(void); | |
654 | void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host); | |
655 | ||
656 | void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
657 | ||
658 | void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); | |
659 | ||
660 | bool (*has_wbinvd_exit)(void); | |
661 | ||
662 | void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale); | |
663 | void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); | |
664 | ||
665 | u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc); | |
666 | u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu); | |
667 | ||
668 | void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2); | |
669 | ||
670 | int (*check_intercept)(struct kvm_vcpu *vcpu, | |
671 | struct x86_instruction_info *info, | |
672 | enum x86_intercept_stage stage); | |
673 | }; | |
674 | ||
675 | struct kvm_arch_async_pf { | |
676 | u32 token; | |
677 | gfn_t gfn; | |
678 | unsigned long cr3; | |
679 | bool direct_map; | |
680 | }; | |
681 | ||
682 | extern struct kvm_x86_ops *kvm_x86_ops; | |
683 | ||
684 | static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, | |
685 | s64 adjustment) | |
686 | { | |
687 | kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false); | |
688 | } | |
689 | ||
690 | static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment) | |
691 | { | |
692 | kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true); | |
693 | } | |
694 | ||
695 | int kvm_mmu_module_init(void); | |
696 | void kvm_mmu_module_exit(void); | |
697 | ||
698 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
699 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
700 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
701 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
702 | u64 dirty_mask, u64 nx_mask, u64 x_mask); | |
703 | ||
704 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
705 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
706 | int kvm_mmu_rmap_write_protect(struct kvm *kvm, u64 gfn, | |
707 | struct kvm_memory_slot *slot); | |
708 | void kvm_mmu_zap_all(struct kvm *kvm); | |
709 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); | |
710 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); | |
711 | ||
712 | int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); | |
713 | ||
714 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, | |
715 | const void *val, int bytes); | |
716 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); | |
717 | ||
718 | extern bool tdp_enabled; | |
719 | ||
720 | u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu); | |
721 | ||
722 | /* control of guest tsc rate supported? */ | |
723 | extern bool kvm_has_tsc_control; | |
724 | /* minimum supported tsc_khz for guests */ | |
725 | extern u32 kvm_min_guest_tsc_khz; | |
726 | /* maximum supported tsc_khz for guests */ | |
727 | extern u32 kvm_max_guest_tsc_khz; | |
728 | ||
729 | enum emulation_result { | |
730 | EMULATE_DONE, /* no further processing */ | |
731 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
732 | EMULATE_FAIL, /* can't emulate this instruction */ | |
733 | }; | |
734 | ||
735 | #define EMULTYPE_NO_DECODE (1 << 0) | |
736 | #define EMULTYPE_TRAP_UD (1 << 1) | |
737 | #define EMULTYPE_SKIP (1 << 2) | |
738 | #define EMULTYPE_RETRY (1 << 3) | |
739 | int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2, | |
740 | int emulation_type, void *insn, int insn_len); | |
741 | ||
742 | static inline int emulate_instruction(struct kvm_vcpu *vcpu, | |
743 | int emulation_type) | |
744 | { | |
745 | return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0); | |
746 | } | |
747 | ||
748 | void kvm_enable_efer_bits(u64); | |
749 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); | |
750 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
751 | ||
752 | struct x86_emulate_ctxt; | |
753 | ||
754 | int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); | |
755 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
756 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
757 | int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); | |
758 | ||
759 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); | |
760 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); | |
761 | ||
762 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason, | |
763 | bool has_error_code, u32 error_code); | |
764 | ||
765 | int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); | |
766 | int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); | |
767 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
768 | int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
769 | int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); | |
770 | int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); | |
771 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); | |
772 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
773 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); | |
774 | int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); | |
775 | ||
776 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
777 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
778 | ||
779 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); | |
780 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); | |
781 | bool kvm_rdpmc(struct kvm_vcpu *vcpu); | |
782 | ||
783 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); | |
784 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
785 | void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); | |
786 | void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
787 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); | |
788 | int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, | |
789 | gfn_t gfn, void *data, int offset, int len, | |
790 | u32 access); | |
791 | void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault); | |
792 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); | |
793 | ||
794 | int kvm_pic_set_irq(void *opaque, int irq, int level); | |
795 | ||
796 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); | |
797 | ||
798 | int fx_init(struct kvm_vcpu *vcpu); | |
799 | ||
800 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); | |
801 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, | |
802 | const u8 *new, int bytes); | |
803 | int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn); | |
804 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
805 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
806 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
807 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
808 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); | |
809 | gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); | |
810 | gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, | |
811 | struct x86_exception *exception); | |
812 | gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, | |
813 | struct x86_exception *exception); | |
814 | gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, | |
815 | struct x86_exception *exception); | |
816 | gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, | |
817 | struct x86_exception *exception); | |
818 | ||
819 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
820 | ||
821 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code, | |
822 | void *insn, int insn_len); | |
823 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); | |
824 | ||
825 | void kvm_enable_tdp(void); | |
826 | void kvm_disable_tdp(void); | |
827 | ||
828 | int complete_pio(struct kvm_vcpu *vcpu); | |
829 | bool kvm_check_iopl(struct kvm_vcpu *vcpu); | |
830 | ||
831 | static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access) | |
832 | { | |
833 | return gpa; | |
834 | } | |
835 | ||
836 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
837 | { | |
838 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
839 | ||
840 | return (struct kvm_mmu_page *)page_private(page); | |
841 | } | |
842 | ||
843 | static inline u16 kvm_read_ldt(void) | |
844 | { | |
845 | u16 ldt; | |
846 | asm("sldt %0" : "=g"(ldt)); | |
847 | return ldt; | |
848 | } | |
849 | ||
850 | static inline void kvm_load_ldt(u16 sel) | |
851 | { | |
852 | asm("lldt %0" : : "rm"(sel)); | |
853 | } | |
854 | ||
855 | #ifdef CONFIG_X86_64 | |
856 | static inline unsigned long read_msr(unsigned long msr) | |
857 | { | |
858 | u64 value; | |
859 | ||
860 | rdmsrl(msr, value); | |
861 | return value; | |
862 | } | |
863 | #endif | |
864 | ||
865 | static inline u32 get_rdx_init_val(void) | |
866 | { | |
867 | return 0x600; /* P6 family */ | |
868 | } | |
869 | ||
870 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) | |
871 | { | |
872 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
873 | } | |
874 | ||
875 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
876 | #define TSS_BASE_SIZE 0x68 | |
877 | #define TSS_IOPB_SIZE (65536 / 8) | |
878 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
879 | #define RMODE_TSS_SIZE \ | |
880 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
881 | ||
882 | enum { | |
883 | TASK_SWITCH_CALL = 0, | |
884 | TASK_SWITCH_IRET = 1, | |
885 | TASK_SWITCH_JMP = 2, | |
886 | TASK_SWITCH_GATE = 3, | |
887 | }; | |
888 | ||
889 | #define HF_GIF_MASK (1 << 0) | |
890 | #define HF_HIF_MASK (1 << 1) | |
891 | #define HF_VINTR_MASK (1 << 2) | |
892 | #define HF_NMI_MASK (1 << 3) | |
893 | #define HF_IRET_MASK (1 << 4) | |
894 | #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */ | |
895 | ||
896 | /* | |
897 | * Hardware virtualization extension instructions may fault if a | |
898 | * reboot turns off virtualization while processes are running. | |
899 | * Trap the fault and ignore the instruction if that happens. | |
900 | */ | |
901 | asmlinkage void kvm_spurious_fault(void); | |
902 | extern bool kvm_rebooting; | |
903 | ||
904 | #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \ | |
905 | "666: " insn "\n\t" \ | |
906 | "668: \n\t" \ | |
907 | ".pushsection .fixup, \"ax\" \n" \ | |
908 | "667: \n\t" \ | |
909 | cleanup_insn "\n\t" \ | |
910 | "cmpb $0, kvm_rebooting \n\t" \ | |
911 | "jne 668b \n\t" \ | |
912 | __ASM_SIZE(push) " $666b \n\t" \ | |
913 | "call kvm_spurious_fault \n\t" \ | |
914 | ".popsection \n\t" \ | |
915 | ".pushsection __ex_table, \"a\" \n\t" \ | |
916 | _ASM_PTR " 666b, 667b \n\t" \ | |
917 | ".popsection" | |
918 | ||
919 | #define __kvm_handle_fault_on_reboot(insn) \ | |
920 | ____kvm_handle_fault_on_reboot(insn, "") | |
921 | ||
922 | #define KVM_ARCH_WANT_MMU_NOTIFIER | |
923 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
924 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
925 | int kvm_test_age_hva(struct kvm *kvm, unsigned long hva); | |
926 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); | |
927 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); | |
928 | int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); | |
929 | int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); | |
930 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); | |
931 | ||
932 | void kvm_define_shared_msr(unsigned index, u32 msr); | |
933 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); | |
934 | ||
935 | bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); | |
936 | ||
937 | void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, | |
938 | struct kvm_async_pf *work); | |
939 | void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, | |
940 | struct kvm_async_pf *work); | |
941 | void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, | |
942 | struct kvm_async_pf *work); | |
943 | bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu); | |
944 | extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); | |
945 | ||
946 | void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err); | |
947 | ||
948 | int kvm_is_in_guest(void); | |
949 | ||
950 | void kvm_pmu_init(struct kvm_vcpu *vcpu); | |
951 | void kvm_pmu_destroy(struct kvm_vcpu *vcpu); | |
952 | void kvm_pmu_reset(struct kvm_vcpu *vcpu); | |
953 | void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu); | |
954 | bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr); | |
955 | int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data); | |
956 | int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
957 | int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data); | |
958 | void kvm_handle_pmu_event(struct kvm_vcpu *vcpu); | |
959 | void kvm_deliver_pmi(struct kvm_vcpu *vcpu); | |
960 | ||
961 | #endif /* _ASM_X86_KVM_HOST_H */ |