]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * derived from drivers/kvm/kvm_main.c | |
5 | * | |
6 | * Copyright (C) 2006 Qumranet, Inc. | |
7 | * | |
8 | * Authors: | |
9 | * Avi Kivity <avi@qumranet.com> | |
10 | * Yaniv Kamay <yaniv@qumranet.com> | |
11 | * | |
12 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
13 | * the COPYING file in the top-level directory. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/kvm_host.h> | |
18 | #include "irq.h" | |
19 | #include "mmu.h" | |
20 | #include "i8254.h" | |
21 | ||
22 | #include <linux/clocksource.h> | |
23 | #include <linux/kvm.h> | |
24 | #include <linux/fs.h> | |
25 | #include <linux/vmalloc.h> | |
26 | #include <linux/module.h> | |
27 | #include <linux/mman.h> | |
28 | #include <linux/highmem.h> | |
29 | ||
30 | #include <asm/uaccess.h> | |
31 | #include <asm/msr.h> | |
32 | #include <asm/desc.h> | |
33 | ||
34 | #define MAX_IO_MSRS 256 | |
35 | #define CR0_RESERVED_BITS \ | |
36 | (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \ | |
37 | | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \ | |
38 | | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG)) | |
39 | #define CR4_RESERVED_BITS \ | |
40 | (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\ | |
41 | | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \ | |
42 | | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \ | |
43 | | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE)) | |
44 | ||
45 | #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR) | |
46 | /* EFER defaults: | |
47 | * - enable syscall per default because its emulated by KVM | |
48 | * - enable LME and LMA per default on 64 bit KVM | |
49 | */ | |
50 | #ifdef CONFIG_X86_64 | |
51 | static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL; | |
52 | #else | |
53 | static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL; | |
54 | #endif | |
55 | ||
56 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM | |
57 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | |
58 | ||
59 | static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid, | |
60 | struct kvm_cpuid_entry2 __user *entries); | |
61 | ||
62 | struct kvm_x86_ops *kvm_x86_ops; | |
63 | ||
64 | struct kvm_stats_debugfs_item debugfs_entries[] = { | |
65 | { "pf_fixed", VCPU_STAT(pf_fixed) }, | |
66 | { "pf_guest", VCPU_STAT(pf_guest) }, | |
67 | { "tlb_flush", VCPU_STAT(tlb_flush) }, | |
68 | { "invlpg", VCPU_STAT(invlpg) }, | |
69 | { "exits", VCPU_STAT(exits) }, | |
70 | { "io_exits", VCPU_STAT(io_exits) }, | |
71 | { "mmio_exits", VCPU_STAT(mmio_exits) }, | |
72 | { "signal_exits", VCPU_STAT(signal_exits) }, | |
73 | { "irq_window", VCPU_STAT(irq_window_exits) }, | |
74 | { "halt_exits", VCPU_STAT(halt_exits) }, | |
75 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, | |
76 | { "hypercalls", VCPU_STAT(hypercalls) }, | |
77 | { "request_irq", VCPU_STAT(request_irq_exits) }, | |
78 | { "irq_exits", VCPU_STAT(irq_exits) }, | |
79 | { "host_state_reload", VCPU_STAT(host_state_reload) }, | |
80 | { "efer_reload", VCPU_STAT(efer_reload) }, | |
81 | { "fpu_reload", VCPU_STAT(fpu_reload) }, | |
82 | { "insn_emulation", VCPU_STAT(insn_emulation) }, | |
83 | { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) }, | |
84 | { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) }, | |
85 | { "mmu_pte_write", VM_STAT(mmu_pte_write) }, | |
86 | { "mmu_pte_updated", VM_STAT(mmu_pte_updated) }, | |
87 | { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) }, | |
88 | { "mmu_flooded", VM_STAT(mmu_flooded) }, | |
89 | { "mmu_recycled", VM_STAT(mmu_recycled) }, | |
90 | { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, | |
91 | { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, | |
92 | { "largepages", VM_STAT(lpages) }, | |
93 | { NULL } | |
94 | }; | |
95 | ||
96 | ||
97 | unsigned long segment_base(u16 selector) | |
98 | { | |
99 | struct descriptor_table gdt; | |
100 | struct desc_struct *d; | |
101 | unsigned long table_base; | |
102 | unsigned long v; | |
103 | ||
104 | if (selector == 0) | |
105 | return 0; | |
106 | ||
107 | asm("sgdt %0" : "=m"(gdt)); | |
108 | table_base = gdt.base; | |
109 | ||
110 | if (selector & 4) { /* from ldt */ | |
111 | u16 ldt_selector; | |
112 | ||
113 | asm("sldt %0" : "=g"(ldt_selector)); | |
114 | table_base = segment_base(ldt_selector); | |
115 | } | |
116 | d = (struct desc_struct *)(table_base + (selector & ~7)); | |
117 | v = d->base0 | ((unsigned long)d->base1 << 16) | | |
118 | ((unsigned long)d->base2 << 24); | |
119 | #ifdef CONFIG_X86_64 | |
120 | if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11)) | |
121 | v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32; | |
122 | #endif | |
123 | return v; | |
124 | } | |
125 | EXPORT_SYMBOL_GPL(segment_base); | |
126 | ||
127 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu) | |
128 | { | |
129 | if (irqchip_in_kernel(vcpu->kvm)) | |
130 | return vcpu->arch.apic_base; | |
131 | else | |
132 | return vcpu->arch.apic_base; | |
133 | } | |
134 | EXPORT_SYMBOL_GPL(kvm_get_apic_base); | |
135 | ||
136 | void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data) | |
137 | { | |
138 | /* TODO: reserve bits check */ | |
139 | if (irqchip_in_kernel(vcpu->kvm)) | |
140 | kvm_lapic_set_base(vcpu, data); | |
141 | else | |
142 | vcpu->arch.apic_base = data; | |
143 | } | |
144 | EXPORT_SYMBOL_GPL(kvm_set_apic_base); | |
145 | ||
146 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr) | |
147 | { | |
148 | WARN_ON(vcpu->arch.exception.pending); | |
149 | vcpu->arch.exception.pending = true; | |
150 | vcpu->arch.exception.has_error_code = false; | |
151 | vcpu->arch.exception.nr = nr; | |
152 | } | |
153 | EXPORT_SYMBOL_GPL(kvm_queue_exception); | |
154 | ||
155 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr, | |
156 | u32 error_code) | |
157 | { | |
158 | ++vcpu->stat.pf_guest; | |
159 | if (vcpu->arch.exception.pending) { | |
160 | if (vcpu->arch.exception.nr == PF_VECTOR) { | |
161 | printk(KERN_DEBUG "kvm: inject_page_fault:" | |
162 | " double fault 0x%lx\n", addr); | |
163 | vcpu->arch.exception.nr = DF_VECTOR; | |
164 | vcpu->arch.exception.error_code = 0; | |
165 | } else if (vcpu->arch.exception.nr == DF_VECTOR) { | |
166 | /* triple fault -> shutdown */ | |
167 | set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests); | |
168 | } | |
169 | return; | |
170 | } | |
171 | vcpu->arch.cr2 = addr; | |
172 | kvm_queue_exception_e(vcpu, PF_VECTOR, error_code); | |
173 | } | |
174 | ||
175 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code) | |
176 | { | |
177 | WARN_ON(vcpu->arch.exception.pending); | |
178 | vcpu->arch.exception.pending = true; | |
179 | vcpu->arch.exception.has_error_code = true; | |
180 | vcpu->arch.exception.nr = nr; | |
181 | vcpu->arch.exception.error_code = error_code; | |
182 | } | |
183 | EXPORT_SYMBOL_GPL(kvm_queue_exception_e); | |
184 | ||
185 | static void __queue_exception(struct kvm_vcpu *vcpu) | |
186 | { | |
187 | kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr, | |
188 | vcpu->arch.exception.has_error_code, | |
189 | vcpu->arch.exception.error_code); | |
190 | } | |
191 | ||
192 | /* | |
193 | * Load the pae pdptrs. Return true is they are all valid. | |
194 | */ | |
195 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3) | |
196 | { | |
197 | gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT; | |
198 | unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2; | |
199 | int i; | |
200 | int ret; | |
201 | u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; | |
202 | ||
203 | down_read(&vcpu->kvm->slots_lock); | |
204 | ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte, | |
205 | offset * sizeof(u64), sizeof(pdpte)); | |
206 | if (ret < 0) { | |
207 | ret = 0; | |
208 | goto out; | |
209 | } | |
210 | for (i = 0; i < ARRAY_SIZE(pdpte); ++i) { | |
211 | if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) { | |
212 | ret = 0; | |
213 | goto out; | |
214 | } | |
215 | } | |
216 | ret = 1; | |
217 | ||
218 | memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs)); | |
219 | out: | |
220 | up_read(&vcpu->kvm->slots_lock); | |
221 | ||
222 | return ret; | |
223 | } | |
224 | EXPORT_SYMBOL_GPL(load_pdptrs); | |
225 | ||
226 | static bool pdptrs_changed(struct kvm_vcpu *vcpu) | |
227 | { | |
228 | u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)]; | |
229 | bool changed = true; | |
230 | int r; | |
231 | ||
232 | if (is_long_mode(vcpu) || !is_pae(vcpu)) | |
233 | return false; | |
234 | ||
235 | down_read(&vcpu->kvm->slots_lock); | |
236 | r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte)); | |
237 | if (r < 0) | |
238 | goto out; | |
239 | changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0; | |
240 | out: | |
241 | up_read(&vcpu->kvm->slots_lock); | |
242 | ||
243 | return changed; | |
244 | } | |
245 | ||
246 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |
247 | { | |
248 | if (cr0 & CR0_RESERVED_BITS) { | |
249 | printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n", | |
250 | cr0, vcpu->arch.cr0); | |
251 | kvm_inject_gp(vcpu, 0); | |
252 | return; | |
253 | } | |
254 | ||
255 | if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) { | |
256 | printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n"); | |
257 | kvm_inject_gp(vcpu, 0); | |
258 | return; | |
259 | } | |
260 | ||
261 | if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) { | |
262 | printk(KERN_DEBUG "set_cr0: #GP, set PG flag " | |
263 | "and a clear PE flag\n"); | |
264 | kvm_inject_gp(vcpu, 0); | |
265 | return; | |
266 | } | |
267 | ||
268 | if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { | |
269 | #ifdef CONFIG_X86_64 | |
270 | if ((vcpu->arch.shadow_efer & EFER_LME)) { | |
271 | int cs_db, cs_l; | |
272 | ||
273 | if (!is_pae(vcpu)) { | |
274 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
275 | "in long mode while PAE is disabled\n"); | |
276 | kvm_inject_gp(vcpu, 0); | |
277 | return; | |
278 | } | |
279 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
280 | if (cs_l) { | |
281 | printk(KERN_DEBUG "set_cr0: #GP, start paging " | |
282 | "in long mode while CS.L == 1\n"); | |
283 | kvm_inject_gp(vcpu, 0); | |
284 | return; | |
285 | ||
286 | } | |
287 | } else | |
288 | #endif | |
289 | if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) { | |
290 | printk(KERN_DEBUG "set_cr0: #GP, pdptrs " | |
291 | "reserved bits\n"); | |
292 | kvm_inject_gp(vcpu, 0); | |
293 | return; | |
294 | } | |
295 | ||
296 | } | |
297 | ||
298 | kvm_x86_ops->set_cr0(vcpu, cr0); | |
299 | vcpu->arch.cr0 = cr0; | |
300 | ||
301 | kvm_mmu_reset_context(vcpu); | |
302 | return; | |
303 | } | |
304 | EXPORT_SYMBOL_GPL(kvm_set_cr0); | |
305 | ||
306 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw) | |
307 | { | |
308 | kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)); | |
309 | } | |
310 | EXPORT_SYMBOL_GPL(kvm_lmsw); | |
311 | ||
312 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | |
313 | { | |
314 | if (cr4 & CR4_RESERVED_BITS) { | |
315 | printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n"); | |
316 | kvm_inject_gp(vcpu, 0); | |
317 | return; | |
318 | } | |
319 | ||
320 | if (is_long_mode(vcpu)) { | |
321 | if (!(cr4 & X86_CR4_PAE)) { | |
322 | printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while " | |
323 | "in long mode\n"); | |
324 | kvm_inject_gp(vcpu, 0); | |
325 | return; | |
326 | } | |
327 | } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE) | |
328 | && !load_pdptrs(vcpu, vcpu->arch.cr3)) { | |
329 | printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n"); | |
330 | kvm_inject_gp(vcpu, 0); | |
331 | return; | |
332 | } | |
333 | ||
334 | if (cr4 & X86_CR4_VMXE) { | |
335 | printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n"); | |
336 | kvm_inject_gp(vcpu, 0); | |
337 | return; | |
338 | } | |
339 | kvm_x86_ops->set_cr4(vcpu, cr4); | |
340 | vcpu->arch.cr4 = cr4; | |
341 | kvm_mmu_reset_context(vcpu); | |
342 | } | |
343 | EXPORT_SYMBOL_GPL(kvm_set_cr4); | |
344 | ||
345 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3) | |
346 | { | |
347 | if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) { | |
348 | kvm_mmu_flush_tlb(vcpu); | |
349 | return; | |
350 | } | |
351 | ||
352 | if (is_long_mode(vcpu)) { | |
353 | if (cr3 & CR3_L_MODE_RESERVED_BITS) { | |
354 | printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n"); | |
355 | kvm_inject_gp(vcpu, 0); | |
356 | return; | |
357 | } | |
358 | } else { | |
359 | if (is_pae(vcpu)) { | |
360 | if (cr3 & CR3_PAE_RESERVED_BITS) { | |
361 | printk(KERN_DEBUG | |
362 | "set_cr3: #GP, reserved bits\n"); | |
363 | kvm_inject_gp(vcpu, 0); | |
364 | return; | |
365 | } | |
366 | if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) { | |
367 | printk(KERN_DEBUG "set_cr3: #GP, pdptrs " | |
368 | "reserved bits\n"); | |
369 | kvm_inject_gp(vcpu, 0); | |
370 | return; | |
371 | } | |
372 | } | |
373 | /* | |
374 | * We don't check reserved bits in nonpae mode, because | |
375 | * this isn't enforced, and VMware depends on this. | |
376 | */ | |
377 | } | |
378 | ||
379 | down_read(&vcpu->kvm->slots_lock); | |
380 | /* | |
381 | * Does the new cr3 value map to physical memory? (Note, we | |
382 | * catch an invalid cr3 even in real-mode, because it would | |
383 | * cause trouble later on when we turn on paging anyway.) | |
384 | * | |
385 | * A real CPU would silently accept an invalid cr3 and would | |
386 | * attempt to use it - with largely undefined (and often hard | |
387 | * to debug) behavior on the guest side. | |
388 | */ | |
389 | if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT))) | |
390 | kvm_inject_gp(vcpu, 0); | |
391 | else { | |
392 | vcpu->arch.cr3 = cr3; | |
393 | vcpu->arch.mmu.new_cr3(vcpu); | |
394 | } | |
395 | up_read(&vcpu->kvm->slots_lock); | |
396 | } | |
397 | EXPORT_SYMBOL_GPL(kvm_set_cr3); | |
398 | ||
399 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8) | |
400 | { | |
401 | if (cr8 & CR8_RESERVED_BITS) { | |
402 | printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8); | |
403 | kvm_inject_gp(vcpu, 0); | |
404 | return; | |
405 | } | |
406 | if (irqchip_in_kernel(vcpu->kvm)) | |
407 | kvm_lapic_set_tpr(vcpu, cr8); | |
408 | else | |
409 | vcpu->arch.cr8 = cr8; | |
410 | } | |
411 | EXPORT_SYMBOL_GPL(kvm_set_cr8); | |
412 | ||
413 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu) | |
414 | { | |
415 | if (irqchip_in_kernel(vcpu->kvm)) | |
416 | return kvm_lapic_get_cr8(vcpu); | |
417 | else | |
418 | return vcpu->arch.cr8; | |
419 | } | |
420 | EXPORT_SYMBOL_GPL(kvm_get_cr8); | |
421 | ||
422 | /* | |
423 | * List of msr numbers which we expose to userspace through KVM_GET_MSRS | |
424 | * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. | |
425 | * | |
426 | * This list is modified at module load time to reflect the | |
427 | * capabilities of the host cpu. | |
428 | */ | |
429 | static u32 msrs_to_save[] = { | |
430 | MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP, | |
431 | MSR_K6_STAR, | |
432 | #ifdef CONFIG_X86_64 | |
433 | MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR, | |
434 | #endif | |
435 | MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK, | |
436 | MSR_IA32_PERF_STATUS, | |
437 | }; | |
438 | ||
439 | static unsigned num_msrs_to_save; | |
440 | ||
441 | static u32 emulated_msrs[] = { | |
442 | MSR_IA32_MISC_ENABLE, | |
443 | }; | |
444 | ||
445 | static void set_efer(struct kvm_vcpu *vcpu, u64 efer) | |
446 | { | |
447 | if (efer & efer_reserved_bits) { | |
448 | printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n", | |
449 | efer); | |
450 | kvm_inject_gp(vcpu, 0); | |
451 | return; | |
452 | } | |
453 | ||
454 | if (is_paging(vcpu) | |
455 | && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) { | |
456 | printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n"); | |
457 | kvm_inject_gp(vcpu, 0); | |
458 | return; | |
459 | } | |
460 | ||
461 | kvm_x86_ops->set_efer(vcpu, efer); | |
462 | ||
463 | efer &= ~EFER_LMA; | |
464 | efer |= vcpu->arch.shadow_efer & EFER_LMA; | |
465 | ||
466 | vcpu->arch.shadow_efer = efer; | |
467 | } | |
468 | ||
469 | void kvm_enable_efer_bits(u64 mask) | |
470 | { | |
471 | efer_reserved_bits &= ~mask; | |
472 | } | |
473 | EXPORT_SYMBOL_GPL(kvm_enable_efer_bits); | |
474 | ||
475 | ||
476 | /* | |
477 | * Writes msr value into into the appropriate "register". | |
478 | * Returns 0 on success, non-0 otherwise. | |
479 | * Assumes vcpu_load() was already called. | |
480 | */ | |
481 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data) | |
482 | { | |
483 | return kvm_x86_ops->set_msr(vcpu, msr_index, data); | |
484 | } | |
485 | ||
486 | /* | |
487 | * Adapt set_msr() to msr_io()'s calling convention | |
488 | */ | |
489 | static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) | |
490 | { | |
491 | return kvm_set_msr(vcpu, index, *data); | |
492 | } | |
493 | ||
494 | static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock) | |
495 | { | |
496 | static int version; | |
497 | struct kvm_wall_clock wc; | |
498 | struct timespec wc_ts; | |
499 | ||
500 | if (!wall_clock) | |
501 | return; | |
502 | ||
503 | version++; | |
504 | ||
505 | down_read(&kvm->slots_lock); | |
506 | kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); | |
507 | ||
508 | wc_ts = current_kernel_time(); | |
509 | wc.wc_sec = wc_ts.tv_sec; | |
510 | wc.wc_nsec = wc_ts.tv_nsec; | |
511 | wc.wc_version = version; | |
512 | ||
513 | kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc)); | |
514 | ||
515 | version++; | |
516 | kvm_write_guest(kvm, wall_clock, &version, sizeof(version)); | |
517 | up_read(&kvm->slots_lock); | |
518 | } | |
519 | ||
520 | static void kvm_write_guest_time(struct kvm_vcpu *v) | |
521 | { | |
522 | struct timespec ts; | |
523 | unsigned long flags; | |
524 | struct kvm_vcpu_arch *vcpu = &v->arch; | |
525 | void *shared_kaddr; | |
526 | ||
527 | if ((!vcpu->time_page)) | |
528 | return; | |
529 | ||
530 | /* Keep irq disabled to prevent changes to the clock */ | |
531 | local_irq_save(flags); | |
532 | kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER, | |
533 | &vcpu->hv_clock.tsc_timestamp); | |
534 | ktime_get_ts(&ts); | |
535 | local_irq_restore(flags); | |
536 | ||
537 | /* With all the info we got, fill in the values */ | |
538 | ||
539 | vcpu->hv_clock.system_time = ts.tv_nsec + | |
540 | (NSEC_PER_SEC * (u64)ts.tv_sec); | |
541 | /* | |
542 | * The interface expects us to write an even number signaling that the | |
543 | * update is finished. Since the guest won't see the intermediate | |
544 | * state, we just write "2" at the end | |
545 | */ | |
546 | vcpu->hv_clock.version = 2; | |
547 | ||
548 | shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0); | |
549 | ||
550 | memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock, | |
551 | sizeof(vcpu->hv_clock)); | |
552 | ||
553 | kunmap_atomic(shared_kaddr, KM_USER0); | |
554 | ||
555 | mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT); | |
556 | } | |
557 | ||
558 | ||
559 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data) | |
560 | { | |
561 | switch (msr) { | |
562 | case MSR_EFER: | |
563 | set_efer(vcpu, data); | |
564 | break; | |
565 | case MSR_IA32_MC0_STATUS: | |
566 | pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n", | |
567 | __func__, data); | |
568 | break; | |
569 | case MSR_IA32_MCG_STATUS: | |
570 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n", | |
571 | __func__, data); | |
572 | break; | |
573 | case MSR_IA32_MCG_CTL: | |
574 | pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n", | |
575 | __func__, data); | |
576 | break; | |
577 | case MSR_IA32_UCODE_REV: | |
578 | case MSR_IA32_UCODE_WRITE: | |
579 | case 0x200 ... 0x2ff: /* MTRRs */ | |
580 | break; | |
581 | case MSR_IA32_APICBASE: | |
582 | kvm_set_apic_base(vcpu, data); | |
583 | break; | |
584 | case MSR_IA32_MISC_ENABLE: | |
585 | vcpu->arch.ia32_misc_enable_msr = data; | |
586 | break; | |
587 | case MSR_KVM_WALL_CLOCK: | |
588 | vcpu->kvm->arch.wall_clock = data; | |
589 | kvm_write_wall_clock(vcpu->kvm, data); | |
590 | break; | |
591 | case MSR_KVM_SYSTEM_TIME: { | |
592 | if (vcpu->arch.time_page) { | |
593 | kvm_release_page_dirty(vcpu->arch.time_page); | |
594 | vcpu->arch.time_page = NULL; | |
595 | } | |
596 | ||
597 | vcpu->arch.time = data; | |
598 | ||
599 | /* we verify if the enable bit is set... */ | |
600 | if (!(data & 1)) | |
601 | break; | |
602 | ||
603 | /* ...but clean it before doing the actual write */ | |
604 | vcpu->arch.time_offset = data & ~(PAGE_MASK | 1); | |
605 | ||
606 | vcpu->arch.hv_clock.tsc_to_system_mul = | |
607 | clocksource_khz2mult(tsc_khz, 22); | |
608 | vcpu->arch.hv_clock.tsc_shift = 22; | |
609 | ||
610 | down_read(¤t->mm->mmap_sem); | |
611 | down_read(&vcpu->kvm->slots_lock); | |
612 | vcpu->arch.time_page = | |
613 | gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT); | |
614 | up_read(&vcpu->kvm->slots_lock); | |
615 | up_read(¤t->mm->mmap_sem); | |
616 | ||
617 | if (is_error_page(vcpu->arch.time_page)) { | |
618 | kvm_release_page_clean(vcpu->arch.time_page); | |
619 | vcpu->arch.time_page = NULL; | |
620 | } | |
621 | ||
622 | kvm_write_guest_time(vcpu); | |
623 | break; | |
624 | } | |
625 | default: | |
626 | pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data); | |
627 | return 1; | |
628 | } | |
629 | return 0; | |
630 | } | |
631 | EXPORT_SYMBOL_GPL(kvm_set_msr_common); | |
632 | ||
633 | ||
634 | /* | |
635 | * Reads an msr value (of 'msr_index') into 'pdata'. | |
636 | * Returns 0 on success, non-0 otherwise. | |
637 | * Assumes vcpu_load() was already called. | |
638 | */ | |
639 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | |
640 | { | |
641 | return kvm_x86_ops->get_msr(vcpu, msr_index, pdata); | |
642 | } | |
643 | ||
644 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata) | |
645 | { | |
646 | u64 data; | |
647 | ||
648 | switch (msr) { | |
649 | case 0xc0010010: /* SYSCFG */ | |
650 | case 0xc0010015: /* HWCR */ | |
651 | case MSR_IA32_PLATFORM_ID: | |
652 | case MSR_IA32_P5_MC_ADDR: | |
653 | case MSR_IA32_P5_MC_TYPE: | |
654 | case MSR_IA32_MC0_CTL: | |
655 | case MSR_IA32_MCG_STATUS: | |
656 | case MSR_IA32_MCG_CAP: | |
657 | case MSR_IA32_MCG_CTL: | |
658 | case MSR_IA32_MC0_MISC: | |
659 | case MSR_IA32_MC0_MISC+4: | |
660 | case MSR_IA32_MC0_MISC+8: | |
661 | case MSR_IA32_MC0_MISC+12: | |
662 | case MSR_IA32_MC0_MISC+16: | |
663 | case MSR_IA32_UCODE_REV: | |
664 | case MSR_IA32_EBL_CR_POWERON: | |
665 | /* MTRR registers */ | |
666 | case 0xfe: | |
667 | case 0x200 ... 0x2ff: | |
668 | data = 0; | |
669 | break; | |
670 | case 0xcd: /* fsb frequency */ | |
671 | data = 3; | |
672 | break; | |
673 | case MSR_IA32_APICBASE: | |
674 | data = kvm_get_apic_base(vcpu); | |
675 | break; | |
676 | case MSR_IA32_MISC_ENABLE: | |
677 | data = vcpu->arch.ia32_misc_enable_msr; | |
678 | break; | |
679 | case MSR_IA32_PERF_STATUS: | |
680 | /* TSC increment by tick */ | |
681 | data = 1000ULL; | |
682 | /* CPU multiplier */ | |
683 | data |= (((uint64_t)4ULL) << 40); | |
684 | break; | |
685 | case MSR_EFER: | |
686 | data = vcpu->arch.shadow_efer; | |
687 | break; | |
688 | case MSR_KVM_WALL_CLOCK: | |
689 | data = vcpu->kvm->arch.wall_clock; | |
690 | break; | |
691 | case MSR_KVM_SYSTEM_TIME: | |
692 | data = vcpu->arch.time; | |
693 | break; | |
694 | default: | |
695 | pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr); | |
696 | return 1; | |
697 | } | |
698 | *pdata = data; | |
699 | return 0; | |
700 | } | |
701 | EXPORT_SYMBOL_GPL(kvm_get_msr_common); | |
702 | ||
703 | /* | |
704 | * Read or write a bunch of msrs. All parameters are kernel addresses. | |
705 | * | |
706 | * @return number of msrs set successfully. | |
707 | */ | |
708 | static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs, | |
709 | struct kvm_msr_entry *entries, | |
710 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
711 | unsigned index, u64 *data)) | |
712 | { | |
713 | int i; | |
714 | ||
715 | vcpu_load(vcpu); | |
716 | ||
717 | for (i = 0; i < msrs->nmsrs; ++i) | |
718 | if (do_msr(vcpu, entries[i].index, &entries[i].data)) | |
719 | break; | |
720 | ||
721 | vcpu_put(vcpu); | |
722 | ||
723 | return i; | |
724 | } | |
725 | ||
726 | /* | |
727 | * Read or write a bunch of msrs. Parameters are user addresses. | |
728 | * | |
729 | * @return number of msrs set successfully. | |
730 | */ | |
731 | static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs, | |
732 | int (*do_msr)(struct kvm_vcpu *vcpu, | |
733 | unsigned index, u64 *data), | |
734 | int writeback) | |
735 | { | |
736 | struct kvm_msrs msrs; | |
737 | struct kvm_msr_entry *entries; | |
738 | int r, n; | |
739 | unsigned size; | |
740 | ||
741 | r = -EFAULT; | |
742 | if (copy_from_user(&msrs, user_msrs, sizeof msrs)) | |
743 | goto out; | |
744 | ||
745 | r = -E2BIG; | |
746 | if (msrs.nmsrs >= MAX_IO_MSRS) | |
747 | goto out; | |
748 | ||
749 | r = -ENOMEM; | |
750 | size = sizeof(struct kvm_msr_entry) * msrs.nmsrs; | |
751 | entries = vmalloc(size); | |
752 | if (!entries) | |
753 | goto out; | |
754 | ||
755 | r = -EFAULT; | |
756 | if (copy_from_user(entries, user_msrs->entries, size)) | |
757 | goto out_free; | |
758 | ||
759 | r = n = __msr_io(vcpu, &msrs, entries, do_msr); | |
760 | if (r < 0) | |
761 | goto out_free; | |
762 | ||
763 | r = -EFAULT; | |
764 | if (writeback && copy_to_user(user_msrs->entries, entries, size)) | |
765 | goto out_free; | |
766 | ||
767 | r = n; | |
768 | ||
769 | out_free: | |
770 | vfree(entries); | |
771 | out: | |
772 | return r; | |
773 | } | |
774 | ||
775 | /* | |
776 | * Make sure that a cpu that is being hot-unplugged does not have any vcpus | |
777 | * cached on it. | |
778 | */ | |
779 | void decache_vcpus_on_cpu(int cpu) | |
780 | { | |
781 | struct kvm *vm; | |
782 | struct kvm_vcpu *vcpu; | |
783 | int i; | |
784 | ||
785 | spin_lock(&kvm_lock); | |
786 | list_for_each_entry(vm, &vm_list, vm_list) | |
787 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
788 | vcpu = vm->vcpus[i]; | |
789 | if (!vcpu) | |
790 | continue; | |
791 | /* | |
792 | * If the vcpu is locked, then it is running on some | |
793 | * other cpu and therefore it is not cached on the | |
794 | * cpu in question. | |
795 | * | |
796 | * If it's not locked, check the last cpu it executed | |
797 | * on. | |
798 | */ | |
799 | if (mutex_trylock(&vcpu->mutex)) { | |
800 | if (vcpu->cpu == cpu) { | |
801 | kvm_x86_ops->vcpu_decache(vcpu); | |
802 | vcpu->cpu = -1; | |
803 | } | |
804 | mutex_unlock(&vcpu->mutex); | |
805 | } | |
806 | } | |
807 | spin_unlock(&kvm_lock); | |
808 | } | |
809 | ||
810 | int kvm_dev_ioctl_check_extension(long ext) | |
811 | { | |
812 | int r; | |
813 | ||
814 | switch (ext) { | |
815 | case KVM_CAP_IRQCHIP: | |
816 | case KVM_CAP_HLT: | |
817 | case KVM_CAP_MMU_SHADOW_CACHE_CONTROL: | |
818 | case KVM_CAP_USER_MEMORY: | |
819 | case KVM_CAP_SET_TSS_ADDR: | |
820 | case KVM_CAP_EXT_CPUID: | |
821 | case KVM_CAP_CLOCKSOURCE: | |
822 | case KVM_CAP_PIT: | |
823 | r = 1; | |
824 | break; | |
825 | case KVM_CAP_VAPIC: | |
826 | r = !kvm_x86_ops->cpu_has_accelerated_tpr(); | |
827 | break; | |
828 | case KVM_CAP_NR_VCPUS: | |
829 | r = KVM_MAX_VCPUS; | |
830 | break; | |
831 | case KVM_CAP_NR_MEMSLOTS: | |
832 | r = KVM_MEMORY_SLOTS; | |
833 | break; | |
834 | default: | |
835 | r = 0; | |
836 | break; | |
837 | } | |
838 | return r; | |
839 | ||
840 | } | |
841 | ||
842 | long kvm_arch_dev_ioctl(struct file *filp, | |
843 | unsigned int ioctl, unsigned long arg) | |
844 | { | |
845 | void __user *argp = (void __user *)arg; | |
846 | long r; | |
847 | ||
848 | switch (ioctl) { | |
849 | case KVM_GET_MSR_INDEX_LIST: { | |
850 | struct kvm_msr_list __user *user_msr_list = argp; | |
851 | struct kvm_msr_list msr_list; | |
852 | unsigned n; | |
853 | ||
854 | r = -EFAULT; | |
855 | if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list)) | |
856 | goto out; | |
857 | n = msr_list.nmsrs; | |
858 | msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs); | |
859 | if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list)) | |
860 | goto out; | |
861 | r = -E2BIG; | |
862 | if (n < num_msrs_to_save) | |
863 | goto out; | |
864 | r = -EFAULT; | |
865 | if (copy_to_user(user_msr_list->indices, &msrs_to_save, | |
866 | num_msrs_to_save * sizeof(u32))) | |
867 | goto out; | |
868 | if (copy_to_user(user_msr_list->indices | |
869 | + num_msrs_to_save * sizeof(u32), | |
870 | &emulated_msrs, | |
871 | ARRAY_SIZE(emulated_msrs) * sizeof(u32))) | |
872 | goto out; | |
873 | r = 0; | |
874 | break; | |
875 | } | |
876 | case KVM_GET_SUPPORTED_CPUID: { | |
877 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
878 | struct kvm_cpuid2 cpuid; | |
879 | ||
880 | r = -EFAULT; | |
881 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
882 | goto out; | |
883 | r = kvm_dev_ioctl_get_supported_cpuid(&cpuid, | |
884 | cpuid_arg->entries); | |
885 | if (r) | |
886 | goto out; | |
887 | ||
888 | r = -EFAULT; | |
889 | if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) | |
890 | goto out; | |
891 | r = 0; | |
892 | break; | |
893 | } | |
894 | default: | |
895 | r = -EINVAL; | |
896 | } | |
897 | out: | |
898 | return r; | |
899 | } | |
900 | ||
901 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) | |
902 | { | |
903 | kvm_x86_ops->vcpu_load(vcpu, cpu); | |
904 | kvm_write_guest_time(vcpu); | |
905 | } | |
906 | ||
907 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) | |
908 | { | |
909 | kvm_x86_ops->vcpu_put(vcpu); | |
910 | kvm_put_guest_fpu(vcpu); | |
911 | } | |
912 | ||
913 | static int is_efer_nx(void) | |
914 | { | |
915 | u64 efer; | |
916 | ||
917 | rdmsrl(MSR_EFER, efer); | |
918 | return efer & EFER_NX; | |
919 | } | |
920 | ||
921 | static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu) | |
922 | { | |
923 | int i; | |
924 | struct kvm_cpuid_entry2 *e, *entry; | |
925 | ||
926 | entry = NULL; | |
927 | for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { | |
928 | e = &vcpu->arch.cpuid_entries[i]; | |
929 | if (e->function == 0x80000001) { | |
930 | entry = e; | |
931 | break; | |
932 | } | |
933 | } | |
934 | if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) { | |
935 | entry->edx &= ~(1 << 20); | |
936 | printk(KERN_INFO "kvm: guest NX capability removed\n"); | |
937 | } | |
938 | } | |
939 | ||
940 | /* when an old userspace process fills a new kernel module */ | |
941 | static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu, | |
942 | struct kvm_cpuid *cpuid, | |
943 | struct kvm_cpuid_entry __user *entries) | |
944 | { | |
945 | int r, i; | |
946 | struct kvm_cpuid_entry *cpuid_entries; | |
947 | ||
948 | r = -E2BIG; | |
949 | if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) | |
950 | goto out; | |
951 | r = -ENOMEM; | |
952 | cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent); | |
953 | if (!cpuid_entries) | |
954 | goto out; | |
955 | r = -EFAULT; | |
956 | if (copy_from_user(cpuid_entries, entries, | |
957 | cpuid->nent * sizeof(struct kvm_cpuid_entry))) | |
958 | goto out_free; | |
959 | for (i = 0; i < cpuid->nent; i++) { | |
960 | vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function; | |
961 | vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax; | |
962 | vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx; | |
963 | vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx; | |
964 | vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx; | |
965 | vcpu->arch.cpuid_entries[i].index = 0; | |
966 | vcpu->arch.cpuid_entries[i].flags = 0; | |
967 | vcpu->arch.cpuid_entries[i].padding[0] = 0; | |
968 | vcpu->arch.cpuid_entries[i].padding[1] = 0; | |
969 | vcpu->arch.cpuid_entries[i].padding[2] = 0; | |
970 | } | |
971 | vcpu->arch.cpuid_nent = cpuid->nent; | |
972 | cpuid_fix_nx_cap(vcpu); | |
973 | r = 0; | |
974 | ||
975 | out_free: | |
976 | vfree(cpuid_entries); | |
977 | out: | |
978 | return r; | |
979 | } | |
980 | ||
981 | static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu, | |
982 | struct kvm_cpuid2 *cpuid, | |
983 | struct kvm_cpuid_entry2 __user *entries) | |
984 | { | |
985 | int r; | |
986 | ||
987 | r = -E2BIG; | |
988 | if (cpuid->nent > KVM_MAX_CPUID_ENTRIES) | |
989 | goto out; | |
990 | r = -EFAULT; | |
991 | if (copy_from_user(&vcpu->arch.cpuid_entries, entries, | |
992 | cpuid->nent * sizeof(struct kvm_cpuid_entry2))) | |
993 | goto out; | |
994 | vcpu->arch.cpuid_nent = cpuid->nent; | |
995 | return 0; | |
996 | ||
997 | out: | |
998 | return r; | |
999 | } | |
1000 | ||
1001 | static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu, | |
1002 | struct kvm_cpuid2 *cpuid, | |
1003 | struct kvm_cpuid_entry2 __user *entries) | |
1004 | { | |
1005 | int r; | |
1006 | ||
1007 | r = -E2BIG; | |
1008 | if (cpuid->nent < vcpu->arch.cpuid_nent) | |
1009 | goto out; | |
1010 | r = -EFAULT; | |
1011 | if (copy_to_user(entries, &vcpu->arch.cpuid_entries, | |
1012 | vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2))) | |
1013 | goto out; | |
1014 | return 0; | |
1015 | ||
1016 | out: | |
1017 | cpuid->nent = vcpu->arch.cpuid_nent; | |
1018 | return r; | |
1019 | } | |
1020 | ||
1021 | static inline u32 bit(int bitno) | |
1022 | { | |
1023 | return 1 << (bitno & 31); | |
1024 | } | |
1025 | ||
1026 | static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |
1027 | u32 index) | |
1028 | { | |
1029 | entry->function = function; | |
1030 | entry->index = index; | |
1031 | cpuid_count(entry->function, entry->index, | |
1032 | &entry->eax, &entry->ebx, &entry->ecx, &entry->edx); | |
1033 | entry->flags = 0; | |
1034 | } | |
1035 | ||
1036 | static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, | |
1037 | u32 index, int *nent, int maxnent) | |
1038 | { | |
1039 | const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) | | |
1040 | bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | | |
1041 | bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | | |
1042 | bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | | |
1043 | bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | | |
1044 | bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) | | |
1045 | bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | | |
1046 | bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) | | |
1047 | bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) | | |
1048 | bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP); | |
1049 | const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) | | |
1050 | bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) | | |
1051 | bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) | | |
1052 | bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) | | |
1053 | bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) | | |
1054 | bit(X86_FEATURE_PGE) | | |
1055 | bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) | | |
1056 | bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) | | |
1057 | bit(X86_FEATURE_SYSCALL) | | |
1058 | (bit(X86_FEATURE_NX) && is_efer_nx()) | | |
1059 | #ifdef CONFIG_X86_64 | |
1060 | bit(X86_FEATURE_LM) | | |
1061 | #endif | |
1062 | bit(X86_FEATURE_MMXEXT) | | |
1063 | bit(X86_FEATURE_3DNOWEXT) | | |
1064 | bit(X86_FEATURE_3DNOW); | |
1065 | const u32 kvm_supported_word3_x86_features = | |
1066 | bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16); | |
1067 | const u32 kvm_supported_word6_x86_features = | |
1068 | bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY); | |
1069 | ||
1070 | /* all func 2 cpuid_count() should be called on the same cpu */ | |
1071 | get_cpu(); | |
1072 | do_cpuid_1_ent(entry, function, index); | |
1073 | ++*nent; | |
1074 | ||
1075 | switch (function) { | |
1076 | case 0: | |
1077 | entry->eax = min(entry->eax, (u32)0xb); | |
1078 | break; | |
1079 | case 1: | |
1080 | entry->edx &= kvm_supported_word0_x86_features; | |
1081 | entry->ecx &= kvm_supported_word3_x86_features; | |
1082 | break; | |
1083 | /* function 2 entries are STATEFUL. That is, repeated cpuid commands | |
1084 | * may return different values. This forces us to get_cpu() before | |
1085 | * issuing the first command, and also to emulate this annoying behavior | |
1086 | * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */ | |
1087 | case 2: { | |
1088 | int t, times = entry->eax & 0xff; | |
1089 | ||
1090 | entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; | |
1091 | for (t = 1; t < times && *nent < maxnent; ++t) { | |
1092 | do_cpuid_1_ent(&entry[t], function, 0); | |
1093 | entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC; | |
1094 | ++*nent; | |
1095 | } | |
1096 | break; | |
1097 | } | |
1098 | /* function 4 and 0xb have additional index. */ | |
1099 | case 4: { | |
1100 | int i, cache_type; | |
1101 | ||
1102 | entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
1103 | /* read more entries until cache_type is zero */ | |
1104 | for (i = 1; *nent < maxnent; ++i) { | |
1105 | cache_type = entry[i - 1].eax & 0x1f; | |
1106 | if (!cache_type) | |
1107 | break; | |
1108 | do_cpuid_1_ent(&entry[i], function, i); | |
1109 | entry[i].flags |= | |
1110 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
1111 | ++*nent; | |
1112 | } | |
1113 | break; | |
1114 | } | |
1115 | case 0xb: { | |
1116 | int i, level_type; | |
1117 | ||
1118 | entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
1119 | /* read more entries until level_type is zero */ | |
1120 | for (i = 1; *nent < maxnent; ++i) { | |
1121 | level_type = entry[i - 1].ecx & 0xff; | |
1122 | if (!level_type) | |
1123 | break; | |
1124 | do_cpuid_1_ent(&entry[i], function, i); | |
1125 | entry[i].flags |= | |
1126 | KVM_CPUID_FLAG_SIGNIFCANT_INDEX; | |
1127 | ++*nent; | |
1128 | } | |
1129 | break; | |
1130 | } | |
1131 | case 0x80000000: | |
1132 | entry->eax = min(entry->eax, 0x8000001a); | |
1133 | break; | |
1134 | case 0x80000001: | |
1135 | entry->edx &= kvm_supported_word1_x86_features; | |
1136 | entry->ecx &= kvm_supported_word6_x86_features; | |
1137 | break; | |
1138 | } | |
1139 | put_cpu(); | |
1140 | } | |
1141 | ||
1142 | static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid, | |
1143 | struct kvm_cpuid_entry2 __user *entries) | |
1144 | { | |
1145 | struct kvm_cpuid_entry2 *cpuid_entries; | |
1146 | int limit, nent = 0, r = -E2BIG; | |
1147 | u32 func; | |
1148 | ||
1149 | if (cpuid->nent < 1) | |
1150 | goto out; | |
1151 | r = -ENOMEM; | |
1152 | cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent); | |
1153 | if (!cpuid_entries) | |
1154 | goto out; | |
1155 | ||
1156 | do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent); | |
1157 | limit = cpuid_entries[0].eax; | |
1158 | for (func = 1; func <= limit && nent < cpuid->nent; ++func) | |
1159 | do_cpuid_ent(&cpuid_entries[nent], func, 0, | |
1160 | &nent, cpuid->nent); | |
1161 | r = -E2BIG; | |
1162 | if (nent >= cpuid->nent) | |
1163 | goto out_free; | |
1164 | ||
1165 | do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent); | |
1166 | limit = cpuid_entries[nent - 1].eax; | |
1167 | for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func) | |
1168 | do_cpuid_ent(&cpuid_entries[nent], func, 0, | |
1169 | &nent, cpuid->nent); | |
1170 | r = -EFAULT; | |
1171 | if (copy_to_user(entries, cpuid_entries, | |
1172 | nent * sizeof(struct kvm_cpuid_entry2))) | |
1173 | goto out_free; | |
1174 | cpuid->nent = nent; | |
1175 | r = 0; | |
1176 | ||
1177 | out_free: | |
1178 | vfree(cpuid_entries); | |
1179 | out: | |
1180 | return r; | |
1181 | } | |
1182 | ||
1183 | static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu, | |
1184 | struct kvm_lapic_state *s) | |
1185 | { | |
1186 | vcpu_load(vcpu); | |
1187 | memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s); | |
1188 | vcpu_put(vcpu); | |
1189 | ||
1190 | return 0; | |
1191 | } | |
1192 | ||
1193 | static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu, | |
1194 | struct kvm_lapic_state *s) | |
1195 | { | |
1196 | vcpu_load(vcpu); | |
1197 | memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s); | |
1198 | kvm_apic_post_state_restore(vcpu); | |
1199 | vcpu_put(vcpu); | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | ||
1204 | static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, | |
1205 | struct kvm_interrupt *irq) | |
1206 | { | |
1207 | if (irq->irq < 0 || irq->irq >= 256) | |
1208 | return -EINVAL; | |
1209 | if (irqchip_in_kernel(vcpu->kvm)) | |
1210 | return -ENXIO; | |
1211 | vcpu_load(vcpu); | |
1212 | ||
1213 | set_bit(irq->irq, vcpu->arch.irq_pending); | |
1214 | set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary); | |
1215 | ||
1216 | vcpu_put(vcpu); | |
1217 | ||
1218 | return 0; | |
1219 | } | |
1220 | ||
1221 | static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu, | |
1222 | struct kvm_tpr_access_ctl *tac) | |
1223 | { | |
1224 | if (tac->flags) | |
1225 | return -EINVAL; | |
1226 | vcpu->arch.tpr_access_reporting = !!tac->enabled; | |
1227 | return 0; | |
1228 | } | |
1229 | ||
1230 | long kvm_arch_vcpu_ioctl(struct file *filp, | |
1231 | unsigned int ioctl, unsigned long arg) | |
1232 | { | |
1233 | struct kvm_vcpu *vcpu = filp->private_data; | |
1234 | void __user *argp = (void __user *)arg; | |
1235 | int r; | |
1236 | ||
1237 | switch (ioctl) { | |
1238 | case KVM_GET_LAPIC: { | |
1239 | struct kvm_lapic_state lapic; | |
1240 | ||
1241 | memset(&lapic, 0, sizeof lapic); | |
1242 | r = kvm_vcpu_ioctl_get_lapic(vcpu, &lapic); | |
1243 | if (r) | |
1244 | goto out; | |
1245 | r = -EFAULT; | |
1246 | if (copy_to_user(argp, &lapic, sizeof lapic)) | |
1247 | goto out; | |
1248 | r = 0; | |
1249 | break; | |
1250 | } | |
1251 | case KVM_SET_LAPIC: { | |
1252 | struct kvm_lapic_state lapic; | |
1253 | ||
1254 | r = -EFAULT; | |
1255 | if (copy_from_user(&lapic, argp, sizeof lapic)) | |
1256 | goto out; | |
1257 | r = kvm_vcpu_ioctl_set_lapic(vcpu, &lapic);; | |
1258 | if (r) | |
1259 | goto out; | |
1260 | r = 0; | |
1261 | break; | |
1262 | } | |
1263 | case KVM_INTERRUPT: { | |
1264 | struct kvm_interrupt irq; | |
1265 | ||
1266 | r = -EFAULT; | |
1267 | if (copy_from_user(&irq, argp, sizeof irq)) | |
1268 | goto out; | |
1269 | r = kvm_vcpu_ioctl_interrupt(vcpu, &irq); | |
1270 | if (r) | |
1271 | goto out; | |
1272 | r = 0; | |
1273 | break; | |
1274 | } | |
1275 | case KVM_SET_CPUID: { | |
1276 | struct kvm_cpuid __user *cpuid_arg = argp; | |
1277 | struct kvm_cpuid cpuid; | |
1278 | ||
1279 | r = -EFAULT; | |
1280 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1281 | goto out; | |
1282 | r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries); | |
1283 | if (r) | |
1284 | goto out; | |
1285 | break; | |
1286 | } | |
1287 | case KVM_SET_CPUID2: { | |
1288 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
1289 | struct kvm_cpuid2 cpuid; | |
1290 | ||
1291 | r = -EFAULT; | |
1292 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1293 | goto out; | |
1294 | r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid, | |
1295 | cpuid_arg->entries); | |
1296 | if (r) | |
1297 | goto out; | |
1298 | break; | |
1299 | } | |
1300 | case KVM_GET_CPUID2: { | |
1301 | struct kvm_cpuid2 __user *cpuid_arg = argp; | |
1302 | struct kvm_cpuid2 cpuid; | |
1303 | ||
1304 | r = -EFAULT; | |
1305 | if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid)) | |
1306 | goto out; | |
1307 | r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid, | |
1308 | cpuid_arg->entries); | |
1309 | if (r) | |
1310 | goto out; | |
1311 | r = -EFAULT; | |
1312 | if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid)) | |
1313 | goto out; | |
1314 | r = 0; | |
1315 | break; | |
1316 | } | |
1317 | case KVM_GET_MSRS: | |
1318 | r = msr_io(vcpu, argp, kvm_get_msr, 1); | |
1319 | break; | |
1320 | case KVM_SET_MSRS: | |
1321 | r = msr_io(vcpu, argp, do_set_msr, 0); | |
1322 | break; | |
1323 | case KVM_TPR_ACCESS_REPORTING: { | |
1324 | struct kvm_tpr_access_ctl tac; | |
1325 | ||
1326 | r = -EFAULT; | |
1327 | if (copy_from_user(&tac, argp, sizeof tac)) | |
1328 | goto out; | |
1329 | r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac); | |
1330 | if (r) | |
1331 | goto out; | |
1332 | r = -EFAULT; | |
1333 | if (copy_to_user(argp, &tac, sizeof tac)) | |
1334 | goto out; | |
1335 | r = 0; | |
1336 | break; | |
1337 | }; | |
1338 | case KVM_SET_VAPIC_ADDR: { | |
1339 | struct kvm_vapic_addr va; | |
1340 | ||
1341 | r = -EINVAL; | |
1342 | if (!irqchip_in_kernel(vcpu->kvm)) | |
1343 | goto out; | |
1344 | r = -EFAULT; | |
1345 | if (copy_from_user(&va, argp, sizeof va)) | |
1346 | goto out; | |
1347 | r = 0; | |
1348 | kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr); | |
1349 | break; | |
1350 | } | |
1351 | default: | |
1352 | r = -EINVAL; | |
1353 | } | |
1354 | out: | |
1355 | return r; | |
1356 | } | |
1357 | ||
1358 | static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr) | |
1359 | { | |
1360 | int ret; | |
1361 | ||
1362 | if (addr > (unsigned int)(-3 * PAGE_SIZE)) | |
1363 | return -1; | |
1364 | ret = kvm_x86_ops->set_tss_addr(kvm, addr); | |
1365 | return ret; | |
1366 | } | |
1367 | ||
1368 | static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm, | |
1369 | u32 kvm_nr_mmu_pages) | |
1370 | { | |
1371 | if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES) | |
1372 | return -EINVAL; | |
1373 | ||
1374 | down_write(&kvm->slots_lock); | |
1375 | ||
1376 | kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages); | |
1377 | kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages; | |
1378 | ||
1379 | up_write(&kvm->slots_lock); | |
1380 | return 0; | |
1381 | } | |
1382 | ||
1383 | static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm) | |
1384 | { | |
1385 | return kvm->arch.n_alloc_mmu_pages; | |
1386 | } | |
1387 | ||
1388 | gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn) | |
1389 | { | |
1390 | int i; | |
1391 | struct kvm_mem_alias *alias; | |
1392 | ||
1393 | for (i = 0; i < kvm->arch.naliases; ++i) { | |
1394 | alias = &kvm->arch.aliases[i]; | |
1395 | if (gfn >= alias->base_gfn | |
1396 | && gfn < alias->base_gfn + alias->npages) | |
1397 | return alias->target_gfn + gfn - alias->base_gfn; | |
1398 | } | |
1399 | return gfn; | |
1400 | } | |
1401 | ||
1402 | /* | |
1403 | * Set a new alias region. Aliases map a portion of physical memory into | |
1404 | * another portion. This is useful for memory windows, for example the PC | |
1405 | * VGA region. | |
1406 | */ | |
1407 | static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm, | |
1408 | struct kvm_memory_alias *alias) | |
1409 | { | |
1410 | int r, n; | |
1411 | struct kvm_mem_alias *p; | |
1412 | ||
1413 | r = -EINVAL; | |
1414 | /* General sanity checks */ | |
1415 | if (alias->memory_size & (PAGE_SIZE - 1)) | |
1416 | goto out; | |
1417 | if (alias->guest_phys_addr & (PAGE_SIZE - 1)) | |
1418 | goto out; | |
1419 | if (alias->slot >= KVM_ALIAS_SLOTS) | |
1420 | goto out; | |
1421 | if (alias->guest_phys_addr + alias->memory_size | |
1422 | < alias->guest_phys_addr) | |
1423 | goto out; | |
1424 | if (alias->target_phys_addr + alias->memory_size | |
1425 | < alias->target_phys_addr) | |
1426 | goto out; | |
1427 | ||
1428 | down_write(&kvm->slots_lock); | |
1429 | ||
1430 | p = &kvm->arch.aliases[alias->slot]; | |
1431 | p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT; | |
1432 | p->npages = alias->memory_size >> PAGE_SHIFT; | |
1433 | p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT; | |
1434 | ||
1435 | for (n = KVM_ALIAS_SLOTS; n > 0; --n) | |
1436 | if (kvm->arch.aliases[n - 1].npages) | |
1437 | break; | |
1438 | kvm->arch.naliases = n; | |
1439 | ||
1440 | kvm_mmu_zap_all(kvm); | |
1441 | ||
1442 | up_write(&kvm->slots_lock); | |
1443 | ||
1444 | return 0; | |
1445 | ||
1446 | out: | |
1447 | return r; | |
1448 | } | |
1449 | ||
1450 | static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
1451 | { | |
1452 | int r; | |
1453 | ||
1454 | r = 0; | |
1455 | switch (chip->chip_id) { | |
1456 | case KVM_IRQCHIP_PIC_MASTER: | |
1457 | memcpy(&chip->chip.pic, | |
1458 | &pic_irqchip(kvm)->pics[0], | |
1459 | sizeof(struct kvm_pic_state)); | |
1460 | break; | |
1461 | case KVM_IRQCHIP_PIC_SLAVE: | |
1462 | memcpy(&chip->chip.pic, | |
1463 | &pic_irqchip(kvm)->pics[1], | |
1464 | sizeof(struct kvm_pic_state)); | |
1465 | break; | |
1466 | case KVM_IRQCHIP_IOAPIC: | |
1467 | memcpy(&chip->chip.ioapic, | |
1468 | ioapic_irqchip(kvm), | |
1469 | sizeof(struct kvm_ioapic_state)); | |
1470 | break; | |
1471 | default: | |
1472 | r = -EINVAL; | |
1473 | break; | |
1474 | } | |
1475 | return r; | |
1476 | } | |
1477 | ||
1478 | static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip) | |
1479 | { | |
1480 | int r; | |
1481 | ||
1482 | r = 0; | |
1483 | switch (chip->chip_id) { | |
1484 | case KVM_IRQCHIP_PIC_MASTER: | |
1485 | memcpy(&pic_irqchip(kvm)->pics[0], | |
1486 | &chip->chip.pic, | |
1487 | sizeof(struct kvm_pic_state)); | |
1488 | break; | |
1489 | case KVM_IRQCHIP_PIC_SLAVE: | |
1490 | memcpy(&pic_irqchip(kvm)->pics[1], | |
1491 | &chip->chip.pic, | |
1492 | sizeof(struct kvm_pic_state)); | |
1493 | break; | |
1494 | case KVM_IRQCHIP_IOAPIC: | |
1495 | memcpy(ioapic_irqchip(kvm), | |
1496 | &chip->chip.ioapic, | |
1497 | sizeof(struct kvm_ioapic_state)); | |
1498 | break; | |
1499 | default: | |
1500 | r = -EINVAL; | |
1501 | break; | |
1502 | } | |
1503 | kvm_pic_update_irq(pic_irqchip(kvm)); | |
1504 | return r; | |
1505 | } | |
1506 | ||
1507 | /* | |
1508 | * Get (and clear) the dirty memory log for a memory slot. | |
1509 | */ | |
1510 | int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, | |
1511 | struct kvm_dirty_log *log) | |
1512 | { | |
1513 | int r; | |
1514 | int n; | |
1515 | struct kvm_memory_slot *memslot; | |
1516 | int is_dirty = 0; | |
1517 | ||
1518 | down_write(&kvm->slots_lock); | |
1519 | ||
1520 | r = kvm_get_dirty_log(kvm, log, &is_dirty); | |
1521 | if (r) | |
1522 | goto out; | |
1523 | ||
1524 | /* If nothing is dirty, don't bother messing with page tables. */ | |
1525 | if (is_dirty) { | |
1526 | kvm_mmu_slot_remove_write_access(kvm, log->slot); | |
1527 | kvm_flush_remote_tlbs(kvm); | |
1528 | memslot = &kvm->memslots[log->slot]; | |
1529 | n = ALIGN(memslot->npages, BITS_PER_LONG) / 8; | |
1530 | memset(memslot->dirty_bitmap, 0, n); | |
1531 | } | |
1532 | r = 0; | |
1533 | out: | |
1534 | up_write(&kvm->slots_lock); | |
1535 | return r; | |
1536 | } | |
1537 | ||
1538 | long kvm_arch_vm_ioctl(struct file *filp, | |
1539 | unsigned int ioctl, unsigned long arg) | |
1540 | { | |
1541 | struct kvm *kvm = filp->private_data; | |
1542 | void __user *argp = (void __user *)arg; | |
1543 | int r = -EINVAL; | |
1544 | ||
1545 | switch (ioctl) { | |
1546 | case KVM_SET_TSS_ADDR: | |
1547 | r = kvm_vm_ioctl_set_tss_addr(kvm, arg); | |
1548 | if (r < 0) | |
1549 | goto out; | |
1550 | break; | |
1551 | case KVM_SET_MEMORY_REGION: { | |
1552 | struct kvm_memory_region kvm_mem; | |
1553 | struct kvm_userspace_memory_region kvm_userspace_mem; | |
1554 | ||
1555 | r = -EFAULT; | |
1556 | if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem)) | |
1557 | goto out; | |
1558 | kvm_userspace_mem.slot = kvm_mem.slot; | |
1559 | kvm_userspace_mem.flags = kvm_mem.flags; | |
1560 | kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr; | |
1561 | kvm_userspace_mem.memory_size = kvm_mem.memory_size; | |
1562 | r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0); | |
1563 | if (r) | |
1564 | goto out; | |
1565 | break; | |
1566 | } | |
1567 | case KVM_SET_NR_MMU_PAGES: | |
1568 | r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg); | |
1569 | if (r) | |
1570 | goto out; | |
1571 | break; | |
1572 | case KVM_GET_NR_MMU_PAGES: | |
1573 | r = kvm_vm_ioctl_get_nr_mmu_pages(kvm); | |
1574 | break; | |
1575 | case KVM_SET_MEMORY_ALIAS: { | |
1576 | struct kvm_memory_alias alias; | |
1577 | ||
1578 | r = -EFAULT; | |
1579 | if (copy_from_user(&alias, argp, sizeof alias)) | |
1580 | goto out; | |
1581 | r = kvm_vm_ioctl_set_memory_alias(kvm, &alias); | |
1582 | if (r) | |
1583 | goto out; | |
1584 | break; | |
1585 | } | |
1586 | case KVM_CREATE_IRQCHIP: | |
1587 | r = -ENOMEM; | |
1588 | kvm->arch.vpic = kvm_create_pic(kvm); | |
1589 | if (kvm->arch.vpic) { | |
1590 | r = kvm_ioapic_init(kvm); | |
1591 | if (r) { | |
1592 | kfree(kvm->arch.vpic); | |
1593 | kvm->arch.vpic = NULL; | |
1594 | goto out; | |
1595 | } | |
1596 | } else | |
1597 | goto out; | |
1598 | break; | |
1599 | case KVM_CREATE_PIT: | |
1600 | r = -ENOMEM; | |
1601 | kvm->arch.vpit = kvm_create_pit(kvm); | |
1602 | if (kvm->arch.vpit) | |
1603 | r = 0; | |
1604 | break; | |
1605 | case KVM_IRQ_LINE: { | |
1606 | struct kvm_irq_level irq_event; | |
1607 | ||
1608 | r = -EFAULT; | |
1609 | if (copy_from_user(&irq_event, argp, sizeof irq_event)) | |
1610 | goto out; | |
1611 | if (irqchip_in_kernel(kvm)) { | |
1612 | mutex_lock(&kvm->lock); | |
1613 | if (irq_event.irq < 16) | |
1614 | kvm_pic_set_irq(pic_irqchip(kvm), | |
1615 | irq_event.irq, | |
1616 | irq_event.level); | |
1617 | kvm_ioapic_set_irq(kvm->arch.vioapic, | |
1618 | irq_event.irq, | |
1619 | irq_event.level); | |
1620 | mutex_unlock(&kvm->lock); | |
1621 | r = 0; | |
1622 | } | |
1623 | break; | |
1624 | } | |
1625 | case KVM_GET_IRQCHIP: { | |
1626 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1627 | struct kvm_irqchip chip; | |
1628 | ||
1629 | r = -EFAULT; | |
1630 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1631 | goto out; | |
1632 | r = -ENXIO; | |
1633 | if (!irqchip_in_kernel(kvm)) | |
1634 | goto out; | |
1635 | r = kvm_vm_ioctl_get_irqchip(kvm, &chip); | |
1636 | if (r) | |
1637 | goto out; | |
1638 | r = -EFAULT; | |
1639 | if (copy_to_user(argp, &chip, sizeof chip)) | |
1640 | goto out; | |
1641 | r = 0; | |
1642 | break; | |
1643 | } | |
1644 | case KVM_SET_IRQCHIP: { | |
1645 | /* 0: PIC master, 1: PIC slave, 2: IOAPIC */ | |
1646 | struct kvm_irqchip chip; | |
1647 | ||
1648 | r = -EFAULT; | |
1649 | if (copy_from_user(&chip, argp, sizeof chip)) | |
1650 | goto out; | |
1651 | r = -ENXIO; | |
1652 | if (!irqchip_in_kernel(kvm)) | |
1653 | goto out; | |
1654 | r = kvm_vm_ioctl_set_irqchip(kvm, &chip); | |
1655 | if (r) | |
1656 | goto out; | |
1657 | r = 0; | |
1658 | break; | |
1659 | } | |
1660 | default: | |
1661 | ; | |
1662 | } | |
1663 | out: | |
1664 | return r; | |
1665 | } | |
1666 | ||
1667 | static void kvm_init_msr_list(void) | |
1668 | { | |
1669 | u32 dummy[2]; | |
1670 | unsigned i, j; | |
1671 | ||
1672 | for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { | |
1673 | if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) | |
1674 | continue; | |
1675 | if (j < i) | |
1676 | msrs_to_save[j] = msrs_to_save[i]; | |
1677 | j++; | |
1678 | } | |
1679 | num_msrs_to_save = j; | |
1680 | } | |
1681 | ||
1682 | /* | |
1683 | * Only apic need an MMIO device hook, so shortcut now.. | |
1684 | */ | |
1685 | static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu, | |
1686 | gpa_t addr) | |
1687 | { | |
1688 | struct kvm_io_device *dev; | |
1689 | ||
1690 | if (vcpu->arch.apic) { | |
1691 | dev = &vcpu->arch.apic->dev; | |
1692 | if (dev->in_range(dev, addr)) | |
1693 | return dev; | |
1694 | } | |
1695 | return NULL; | |
1696 | } | |
1697 | ||
1698 | ||
1699 | static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu, | |
1700 | gpa_t addr) | |
1701 | { | |
1702 | struct kvm_io_device *dev; | |
1703 | ||
1704 | dev = vcpu_find_pervcpu_dev(vcpu, addr); | |
1705 | if (dev == NULL) | |
1706 | dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr); | |
1707 | return dev; | |
1708 | } | |
1709 | ||
1710 | int emulator_read_std(unsigned long addr, | |
1711 | void *val, | |
1712 | unsigned int bytes, | |
1713 | struct kvm_vcpu *vcpu) | |
1714 | { | |
1715 | void *data = val; | |
1716 | int r = X86EMUL_CONTINUE; | |
1717 | ||
1718 | down_read(&vcpu->kvm->slots_lock); | |
1719 | while (bytes) { | |
1720 | gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1721 | unsigned offset = addr & (PAGE_SIZE-1); | |
1722 | unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset); | |
1723 | int ret; | |
1724 | ||
1725 | if (gpa == UNMAPPED_GVA) { | |
1726 | r = X86EMUL_PROPAGATE_FAULT; | |
1727 | goto out; | |
1728 | } | |
1729 | ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy); | |
1730 | if (ret < 0) { | |
1731 | r = X86EMUL_UNHANDLEABLE; | |
1732 | goto out; | |
1733 | } | |
1734 | ||
1735 | bytes -= tocopy; | |
1736 | data += tocopy; | |
1737 | addr += tocopy; | |
1738 | } | |
1739 | out: | |
1740 | up_read(&vcpu->kvm->slots_lock); | |
1741 | return r; | |
1742 | } | |
1743 | EXPORT_SYMBOL_GPL(emulator_read_std); | |
1744 | ||
1745 | static int emulator_read_emulated(unsigned long addr, | |
1746 | void *val, | |
1747 | unsigned int bytes, | |
1748 | struct kvm_vcpu *vcpu) | |
1749 | { | |
1750 | struct kvm_io_device *mmio_dev; | |
1751 | gpa_t gpa; | |
1752 | ||
1753 | if (vcpu->mmio_read_completed) { | |
1754 | memcpy(val, vcpu->mmio_data, bytes); | |
1755 | vcpu->mmio_read_completed = 0; | |
1756 | return X86EMUL_CONTINUE; | |
1757 | } | |
1758 | ||
1759 | down_read(&vcpu->kvm->slots_lock); | |
1760 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1761 | up_read(&vcpu->kvm->slots_lock); | |
1762 | ||
1763 | /* For APIC access vmexit */ | |
1764 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1765 | goto mmio; | |
1766 | ||
1767 | if (emulator_read_std(addr, val, bytes, vcpu) | |
1768 | == X86EMUL_CONTINUE) | |
1769 | return X86EMUL_CONTINUE; | |
1770 | if (gpa == UNMAPPED_GVA) | |
1771 | return X86EMUL_PROPAGATE_FAULT; | |
1772 | ||
1773 | mmio: | |
1774 | /* | |
1775 | * Is this MMIO handled locally? | |
1776 | */ | |
1777 | mutex_lock(&vcpu->kvm->lock); | |
1778 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); | |
1779 | if (mmio_dev) { | |
1780 | kvm_iodevice_read(mmio_dev, gpa, bytes, val); | |
1781 | mutex_unlock(&vcpu->kvm->lock); | |
1782 | return X86EMUL_CONTINUE; | |
1783 | } | |
1784 | mutex_unlock(&vcpu->kvm->lock); | |
1785 | ||
1786 | vcpu->mmio_needed = 1; | |
1787 | vcpu->mmio_phys_addr = gpa; | |
1788 | vcpu->mmio_size = bytes; | |
1789 | vcpu->mmio_is_write = 0; | |
1790 | ||
1791 | return X86EMUL_UNHANDLEABLE; | |
1792 | } | |
1793 | ||
1794 | static int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, | |
1795 | const void *val, int bytes) | |
1796 | { | |
1797 | int ret; | |
1798 | ||
1799 | down_read(&vcpu->kvm->slots_lock); | |
1800 | ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes); | |
1801 | if (ret < 0) { | |
1802 | up_read(&vcpu->kvm->slots_lock); | |
1803 | return 0; | |
1804 | } | |
1805 | kvm_mmu_pte_write(vcpu, gpa, val, bytes); | |
1806 | up_read(&vcpu->kvm->slots_lock); | |
1807 | return 1; | |
1808 | } | |
1809 | ||
1810 | static int emulator_write_emulated_onepage(unsigned long addr, | |
1811 | const void *val, | |
1812 | unsigned int bytes, | |
1813 | struct kvm_vcpu *vcpu) | |
1814 | { | |
1815 | struct kvm_io_device *mmio_dev; | |
1816 | gpa_t gpa; | |
1817 | ||
1818 | down_read(&vcpu->kvm->slots_lock); | |
1819 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1820 | up_read(&vcpu->kvm->slots_lock); | |
1821 | ||
1822 | if (gpa == UNMAPPED_GVA) { | |
1823 | kvm_inject_page_fault(vcpu, addr, 2); | |
1824 | return X86EMUL_PROPAGATE_FAULT; | |
1825 | } | |
1826 | ||
1827 | /* For APIC access vmexit */ | |
1828 | if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1829 | goto mmio; | |
1830 | ||
1831 | if (emulator_write_phys(vcpu, gpa, val, bytes)) | |
1832 | return X86EMUL_CONTINUE; | |
1833 | ||
1834 | mmio: | |
1835 | /* | |
1836 | * Is this MMIO handled locally? | |
1837 | */ | |
1838 | mutex_lock(&vcpu->kvm->lock); | |
1839 | mmio_dev = vcpu_find_mmio_dev(vcpu, gpa); | |
1840 | if (mmio_dev) { | |
1841 | kvm_iodevice_write(mmio_dev, gpa, bytes, val); | |
1842 | mutex_unlock(&vcpu->kvm->lock); | |
1843 | return X86EMUL_CONTINUE; | |
1844 | } | |
1845 | mutex_unlock(&vcpu->kvm->lock); | |
1846 | ||
1847 | vcpu->mmio_needed = 1; | |
1848 | vcpu->mmio_phys_addr = gpa; | |
1849 | vcpu->mmio_size = bytes; | |
1850 | vcpu->mmio_is_write = 1; | |
1851 | memcpy(vcpu->mmio_data, val, bytes); | |
1852 | ||
1853 | return X86EMUL_CONTINUE; | |
1854 | } | |
1855 | ||
1856 | int emulator_write_emulated(unsigned long addr, | |
1857 | const void *val, | |
1858 | unsigned int bytes, | |
1859 | struct kvm_vcpu *vcpu) | |
1860 | { | |
1861 | /* Crossing a page boundary? */ | |
1862 | if (((addr + bytes - 1) ^ addr) & PAGE_MASK) { | |
1863 | int rc, now; | |
1864 | ||
1865 | now = -addr & ~PAGE_MASK; | |
1866 | rc = emulator_write_emulated_onepage(addr, val, now, vcpu); | |
1867 | if (rc != X86EMUL_CONTINUE) | |
1868 | return rc; | |
1869 | addr += now; | |
1870 | val += now; | |
1871 | bytes -= now; | |
1872 | } | |
1873 | return emulator_write_emulated_onepage(addr, val, bytes, vcpu); | |
1874 | } | |
1875 | EXPORT_SYMBOL_GPL(emulator_write_emulated); | |
1876 | ||
1877 | static int emulator_cmpxchg_emulated(unsigned long addr, | |
1878 | const void *old, | |
1879 | const void *new, | |
1880 | unsigned int bytes, | |
1881 | struct kvm_vcpu *vcpu) | |
1882 | { | |
1883 | static int reported; | |
1884 | ||
1885 | if (!reported) { | |
1886 | reported = 1; | |
1887 | printk(KERN_WARNING "kvm: emulating exchange as write\n"); | |
1888 | } | |
1889 | #ifndef CONFIG_X86_64 | |
1890 | /* guests cmpxchg8b have to be emulated atomically */ | |
1891 | if (bytes == 8) { | |
1892 | gpa_t gpa; | |
1893 | struct page *page; | |
1894 | char *kaddr; | |
1895 | u64 val; | |
1896 | ||
1897 | down_read(&vcpu->kvm->slots_lock); | |
1898 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr); | |
1899 | ||
1900 | if (gpa == UNMAPPED_GVA || | |
1901 | (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE) | |
1902 | goto emul_write; | |
1903 | ||
1904 | if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK)) | |
1905 | goto emul_write; | |
1906 | ||
1907 | val = *(u64 *)new; | |
1908 | ||
1909 | down_read(¤t->mm->mmap_sem); | |
1910 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); | |
1911 | up_read(¤t->mm->mmap_sem); | |
1912 | ||
1913 | kaddr = kmap_atomic(page, KM_USER0); | |
1914 | set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val); | |
1915 | kunmap_atomic(kaddr, KM_USER0); | |
1916 | kvm_release_page_dirty(page); | |
1917 | emul_write: | |
1918 | up_read(&vcpu->kvm->slots_lock); | |
1919 | } | |
1920 | #endif | |
1921 | ||
1922 | return emulator_write_emulated(addr, new, bytes, vcpu); | |
1923 | } | |
1924 | ||
1925 | static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg) | |
1926 | { | |
1927 | return kvm_x86_ops->get_segment_base(vcpu, seg); | |
1928 | } | |
1929 | ||
1930 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address) | |
1931 | { | |
1932 | return X86EMUL_CONTINUE; | |
1933 | } | |
1934 | ||
1935 | int emulate_clts(struct kvm_vcpu *vcpu) | |
1936 | { | |
1937 | kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS); | |
1938 | return X86EMUL_CONTINUE; | |
1939 | } | |
1940 | ||
1941 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest) | |
1942 | { | |
1943 | struct kvm_vcpu *vcpu = ctxt->vcpu; | |
1944 | ||
1945 | switch (dr) { | |
1946 | case 0 ... 3: | |
1947 | *dest = kvm_x86_ops->get_dr(vcpu, dr); | |
1948 | return X86EMUL_CONTINUE; | |
1949 | default: | |
1950 | pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr); | |
1951 | return X86EMUL_UNHANDLEABLE; | |
1952 | } | |
1953 | } | |
1954 | ||
1955 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value) | |
1956 | { | |
1957 | unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U; | |
1958 | int exception; | |
1959 | ||
1960 | kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception); | |
1961 | if (exception) { | |
1962 | /* FIXME: better handling */ | |
1963 | return X86EMUL_UNHANDLEABLE; | |
1964 | } | |
1965 | return X86EMUL_CONTINUE; | |
1966 | } | |
1967 | ||
1968 | void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context) | |
1969 | { | |
1970 | static int reported; | |
1971 | u8 opcodes[4]; | |
1972 | unsigned long rip = vcpu->arch.rip; | |
1973 | unsigned long rip_linear; | |
1974 | ||
1975 | rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS); | |
1976 | ||
1977 | if (reported) | |
1978 | return; | |
1979 | ||
1980 | emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu); | |
1981 | ||
1982 | printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n", | |
1983 | context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]); | |
1984 | reported = 1; | |
1985 | } | |
1986 | EXPORT_SYMBOL_GPL(kvm_report_emulation_failure); | |
1987 | ||
1988 | static struct x86_emulate_ops emulate_ops = { | |
1989 | .read_std = emulator_read_std, | |
1990 | .read_emulated = emulator_read_emulated, | |
1991 | .write_emulated = emulator_write_emulated, | |
1992 | .cmpxchg_emulated = emulator_cmpxchg_emulated, | |
1993 | }; | |
1994 | ||
1995 | int emulate_instruction(struct kvm_vcpu *vcpu, | |
1996 | struct kvm_run *run, | |
1997 | unsigned long cr2, | |
1998 | u16 error_code, | |
1999 | int emulation_type) | |
2000 | { | |
2001 | int r; | |
2002 | struct decode_cache *c; | |
2003 | ||
2004 | vcpu->arch.mmio_fault_cr2 = cr2; | |
2005 | kvm_x86_ops->cache_regs(vcpu); | |
2006 | ||
2007 | vcpu->mmio_is_write = 0; | |
2008 | vcpu->arch.pio.string = 0; | |
2009 | ||
2010 | if (!(emulation_type & EMULTYPE_NO_DECODE)) { | |
2011 | int cs_db, cs_l; | |
2012 | kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l); | |
2013 | ||
2014 | vcpu->arch.emulate_ctxt.vcpu = vcpu; | |
2015 | vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu); | |
2016 | vcpu->arch.emulate_ctxt.mode = | |
2017 | (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM) | |
2018 | ? X86EMUL_MODE_REAL : cs_l | |
2019 | ? X86EMUL_MODE_PROT64 : cs_db | |
2020 | ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16; | |
2021 | ||
2022 | if (vcpu->arch.emulate_ctxt.mode == X86EMUL_MODE_PROT64) { | |
2023 | vcpu->arch.emulate_ctxt.cs_base = 0; | |
2024 | vcpu->arch.emulate_ctxt.ds_base = 0; | |
2025 | vcpu->arch.emulate_ctxt.es_base = 0; | |
2026 | vcpu->arch.emulate_ctxt.ss_base = 0; | |
2027 | } else { | |
2028 | vcpu->arch.emulate_ctxt.cs_base = | |
2029 | get_segment_base(vcpu, VCPU_SREG_CS); | |
2030 | vcpu->arch.emulate_ctxt.ds_base = | |
2031 | get_segment_base(vcpu, VCPU_SREG_DS); | |
2032 | vcpu->arch.emulate_ctxt.es_base = | |
2033 | get_segment_base(vcpu, VCPU_SREG_ES); | |
2034 | vcpu->arch.emulate_ctxt.ss_base = | |
2035 | get_segment_base(vcpu, VCPU_SREG_SS); | |
2036 | } | |
2037 | ||
2038 | vcpu->arch.emulate_ctxt.gs_base = | |
2039 | get_segment_base(vcpu, VCPU_SREG_GS); | |
2040 | vcpu->arch.emulate_ctxt.fs_base = | |
2041 | get_segment_base(vcpu, VCPU_SREG_FS); | |
2042 | ||
2043 | r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); | |
2044 | ||
2045 | /* Reject the instructions other than VMCALL/VMMCALL when | |
2046 | * try to emulate invalid opcode */ | |
2047 | c = &vcpu->arch.emulate_ctxt.decode; | |
2048 | if ((emulation_type & EMULTYPE_TRAP_UD) && | |
2049 | (!(c->twobyte && c->b == 0x01 && | |
2050 | (c->modrm_reg == 0 || c->modrm_reg == 3) && | |
2051 | c->modrm_mod == 3 && c->modrm_rm == 1))) | |
2052 | return EMULATE_FAIL; | |
2053 | ||
2054 | ++vcpu->stat.insn_emulation; | |
2055 | if (r) { | |
2056 | ++vcpu->stat.insn_emulation_fail; | |
2057 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | |
2058 | return EMULATE_DONE; | |
2059 | return EMULATE_FAIL; | |
2060 | } | |
2061 | } | |
2062 | ||
2063 | r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops); | |
2064 | ||
2065 | if (vcpu->arch.pio.string) | |
2066 | return EMULATE_DO_MMIO; | |
2067 | ||
2068 | if ((r || vcpu->mmio_is_write) && run) { | |
2069 | run->exit_reason = KVM_EXIT_MMIO; | |
2070 | run->mmio.phys_addr = vcpu->mmio_phys_addr; | |
2071 | memcpy(run->mmio.data, vcpu->mmio_data, 8); | |
2072 | run->mmio.len = vcpu->mmio_size; | |
2073 | run->mmio.is_write = vcpu->mmio_is_write; | |
2074 | } | |
2075 | ||
2076 | if (r) { | |
2077 | if (kvm_mmu_unprotect_page_virt(vcpu, cr2)) | |
2078 | return EMULATE_DONE; | |
2079 | if (!vcpu->mmio_needed) { | |
2080 | kvm_report_emulation_failure(vcpu, "mmio"); | |
2081 | return EMULATE_FAIL; | |
2082 | } | |
2083 | return EMULATE_DO_MMIO; | |
2084 | } | |
2085 | ||
2086 | kvm_x86_ops->decache_regs(vcpu); | |
2087 | kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags); | |
2088 | ||
2089 | if (vcpu->mmio_is_write) { | |
2090 | vcpu->mmio_needed = 0; | |
2091 | return EMULATE_DO_MMIO; | |
2092 | } | |
2093 | ||
2094 | return EMULATE_DONE; | |
2095 | } | |
2096 | EXPORT_SYMBOL_GPL(emulate_instruction); | |
2097 | ||
2098 | static void free_pio_guest_pages(struct kvm_vcpu *vcpu) | |
2099 | { | |
2100 | int i; | |
2101 | ||
2102 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i) | |
2103 | if (vcpu->arch.pio.guest_pages[i]) { | |
2104 | kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]); | |
2105 | vcpu->arch.pio.guest_pages[i] = NULL; | |
2106 | } | |
2107 | } | |
2108 | ||
2109 | static int pio_copy_data(struct kvm_vcpu *vcpu) | |
2110 | { | |
2111 | void *p = vcpu->arch.pio_data; | |
2112 | void *q; | |
2113 | unsigned bytes; | |
2114 | int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1; | |
2115 | ||
2116 | q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE, | |
2117 | PAGE_KERNEL); | |
2118 | if (!q) { | |
2119 | free_pio_guest_pages(vcpu); | |
2120 | return -ENOMEM; | |
2121 | } | |
2122 | q += vcpu->arch.pio.guest_page_offset; | |
2123 | bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count; | |
2124 | if (vcpu->arch.pio.in) | |
2125 | memcpy(q, p, bytes); | |
2126 | else | |
2127 | memcpy(p, q, bytes); | |
2128 | q -= vcpu->arch.pio.guest_page_offset; | |
2129 | vunmap(q); | |
2130 | free_pio_guest_pages(vcpu); | |
2131 | return 0; | |
2132 | } | |
2133 | ||
2134 | int complete_pio(struct kvm_vcpu *vcpu) | |
2135 | { | |
2136 | struct kvm_pio_request *io = &vcpu->arch.pio; | |
2137 | long delta; | |
2138 | int r; | |
2139 | ||
2140 | kvm_x86_ops->cache_regs(vcpu); | |
2141 | ||
2142 | if (!io->string) { | |
2143 | if (io->in) | |
2144 | memcpy(&vcpu->arch.regs[VCPU_REGS_RAX], vcpu->arch.pio_data, | |
2145 | io->size); | |
2146 | } else { | |
2147 | if (io->in) { | |
2148 | r = pio_copy_data(vcpu); | |
2149 | if (r) { | |
2150 | kvm_x86_ops->cache_regs(vcpu); | |
2151 | return r; | |
2152 | } | |
2153 | } | |
2154 | ||
2155 | delta = 1; | |
2156 | if (io->rep) { | |
2157 | delta *= io->cur_count; | |
2158 | /* | |
2159 | * The size of the register should really depend on | |
2160 | * current address size. | |
2161 | */ | |
2162 | vcpu->arch.regs[VCPU_REGS_RCX] -= delta; | |
2163 | } | |
2164 | if (io->down) | |
2165 | delta = -delta; | |
2166 | delta *= io->size; | |
2167 | if (io->in) | |
2168 | vcpu->arch.regs[VCPU_REGS_RDI] += delta; | |
2169 | else | |
2170 | vcpu->arch.regs[VCPU_REGS_RSI] += delta; | |
2171 | } | |
2172 | ||
2173 | kvm_x86_ops->decache_regs(vcpu); | |
2174 | ||
2175 | io->count -= io->cur_count; | |
2176 | io->cur_count = 0; | |
2177 | ||
2178 | return 0; | |
2179 | } | |
2180 | ||
2181 | static void kernel_pio(struct kvm_io_device *pio_dev, | |
2182 | struct kvm_vcpu *vcpu, | |
2183 | void *pd) | |
2184 | { | |
2185 | /* TODO: String I/O for in kernel device */ | |
2186 | ||
2187 | mutex_lock(&vcpu->kvm->lock); | |
2188 | if (vcpu->arch.pio.in) | |
2189 | kvm_iodevice_read(pio_dev, vcpu->arch.pio.port, | |
2190 | vcpu->arch.pio.size, | |
2191 | pd); | |
2192 | else | |
2193 | kvm_iodevice_write(pio_dev, vcpu->arch.pio.port, | |
2194 | vcpu->arch.pio.size, | |
2195 | pd); | |
2196 | mutex_unlock(&vcpu->kvm->lock); | |
2197 | } | |
2198 | ||
2199 | static void pio_string_write(struct kvm_io_device *pio_dev, | |
2200 | struct kvm_vcpu *vcpu) | |
2201 | { | |
2202 | struct kvm_pio_request *io = &vcpu->arch.pio; | |
2203 | void *pd = vcpu->arch.pio_data; | |
2204 | int i; | |
2205 | ||
2206 | mutex_lock(&vcpu->kvm->lock); | |
2207 | for (i = 0; i < io->cur_count; i++) { | |
2208 | kvm_iodevice_write(pio_dev, io->port, | |
2209 | io->size, | |
2210 | pd); | |
2211 | pd += io->size; | |
2212 | } | |
2213 | mutex_unlock(&vcpu->kvm->lock); | |
2214 | } | |
2215 | ||
2216 | static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu, | |
2217 | gpa_t addr) | |
2218 | { | |
2219 | return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr); | |
2220 | } | |
2221 | ||
2222 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
2223 | int size, unsigned port) | |
2224 | { | |
2225 | struct kvm_io_device *pio_dev; | |
2226 | ||
2227 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
2228 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
2229 | vcpu->run->io.size = vcpu->arch.pio.size = size; | |
2230 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | |
2231 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1; | |
2232 | vcpu->run->io.port = vcpu->arch.pio.port = port; | |
2233 | vcpu->arch.pio.in = in; | |
2234 | vcpu->arch.pio.string = 0; | |
2235 | vcpu->arch.pio.down = 0; | |
2236 | vcpu->arch.pio.guest_page_offset = 0; | |
2237 | vcpu->arch.pio.rep = 0; | |
2238 | ||
2239 | kvm_x86_ops->cache_regs(vcpu); | |
2240 | memcpy(vcpu->arch.pio_data, &vcpu->arch.regs[VCPU_REGS_RAX], 4); | |
2241 | kvm_x86_ops->decache_regs(vcpu); | |
2242 | ||
2243 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2244 | ||
2245 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
2246 | if (pio_dev) { | |
2247 | kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data); | |
2248 | complete_pio(vcpu); | |
2249 | return 1; | |
2250 | } | |
2251 | return 0; | |
2252 | } | |
2253 | EXPORT_SYMBOL_GPL(kvm_emulate_pio); | |
2254 | ||
2255 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
2256 | int size, unsigned long count, int down, | |
2257 | gva_t address, int rep, unsigned port) | |
2258 | { | |
2259 | unsigned now, in_page; | |
2260 | int i, ret = 0; | |
2261 | int nr_pages = 1; | |
2262 | struct page *page; | |
2263 | struct kvm_io_device *pio_dev; | |
2264 | ||
2265 | vcpu->run->exit_reason = KVM_EXIT_IO; | |
2266 | vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT; | |
2267 | vcpu->run->io.size = vcpu->arch.pio.size = size; | |
2268 | vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE; | |
2269 | vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count; | |
2270 | vcpu->run->io.port = vcpu->arch.pio.port = port; | |
2271 | vcpu->arch.pio.in = in; | |
2272 | vcpu->arch.pio.string = 1; | |
2273 | vcpu->arch.pio.down = down; | |
2274 | vcpu->arch.pio.guest_page_offset = offset_in_page(address); | |
2275 | vcpu->arch.pio.rep = rep; | |
2276 | ||
2277 | if (!count) { | |
2278 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2279 | return 1; | |
2280 | } | |
2281 | ||
2282 | if (!down) | |
2283 | in_page = PAGE_SIZE - offset_in_page(address); | |
2284 | else | |
2285 | in_page = offset_in_page(address) + size; | |
2286 | now = min(count, (unsigned long)in_page / size); | |
2287 | if (!now) { | |
2288 | /* | |
2289 | * String I/O straddles page boundary. Pin two guest pages | |
2290 | * so that we satisfy atomicity constraints. Do just one | |
2291 | * transaction to avoid complexity. | |
2292 | */ | |
2293 | nr_pages = 2; | |
2294 | now = 1; | |
2295 | } | |
2296 | if (down) { | |
2297 | /* | |
2298 | * String I/O in reverse. Yuck. Kill the guest, fix later. | |
2299 | */ | |
2300 | pr_unimpl(vcpu, "guest string pio down\n"); | |
2301 | kvm_inject_gp(vcpu, 0); | |
2302 | return 1; | |
2303 | } | |
2304 | vcpu->run->io.count = now; | |
2305 | vcpu->arch.pio.cur_count = now; | |
2306 | ||
2307 | if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count) | |
2308 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2309 | ||
2310 | for (i = 0; i < nr_pages; ++i) { | |
2311 | down_read(&vcpu->kvm->slots_lock); | |
2312 | page = gva_to_page(vcpu, address + i * PAGE_SIZE); | |
2313 | vcpu->arch.pio.guest_pages[i] = page; | |
2314 | up_read(&vcpu->kvm->slots_lock); | |
2315 | if (!page) { | |
2316 | kvm_inject_gp(vcpu, 0); | |
2317 | free_pio_guest_pages(vcpu); | |
2318 | return 1; | |
2319 | } | |
2320 | } | |
2321 | ||
2322 | pio_dev = vcpu_find_pio_dev(vcpu, port); | |
2323 | if (!vcpu->arch.pio.in) { | |
2324 | /* string PIO write */ | |
2325 | ret = pio_copy_data(vcpu); | |
2326 | if (ret >= 0 && pio_dev) { | |
2327 | pio_string_write(pio_dev, vcpu); | |
2328 | complete_pio(vcpu); | |
2329 | if (vcpu->arch.pio.count == 0) | |
2330 | ret = 1; | |
2331 | } | |
2332 | } else if (pio_dev) | |
2333 | pr_unimpl(vcpu, "no string pio read support yet, " | |
2334 | "port %x size %d count %ld\n", | |
2335 | port, size, count); | |
2336 | ||
2337 | return ret; | |
2338 | } | |
2339 | EXPORT_SYMBOL_GPL(kvm_emulate_pio_string); | |
2340 | ||
2341 | int kvm_arch_init(void *opaque) | |
2342 | { | |
2343 | int r; | |
2344 | struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque; | |
2345 | ||
2346 | if (kvm_x86_ops) { | |
2347 | printk(KERN_ERR "kvm: already loaded the other module\n"); | |
2348 | r = -EEXIST; | |
2349 | goto out; | |
2350 | } | |
2351 | ||
2352 | if (!ops->cpu_has_kvm_support()) { | |
2353 | printk(KERN_ERR "kvm: no hardware support\n"); | |
2354 | r = -EOPNOTSUPP; | |
2355 | goto out; | |
2356 | } | |
2357 | if (ops->disabled_by_bios()) { | |
2358 | printk(KERN_ERR "kvm: disabled by bios\n"); | |
2359 | r = -EOPNOTSUPP; | |
2360 | goto out; | |
2361 | } | |
2362 | ||
2363 | r = kvm_mmu_module_init(); | |
2364 | if (r) | |
2365 | goto out; | |
2366 | ||
2367 | kvm_init_msr_list(); | |
2368 | ||
2369 | kvm_x86_ops = ops; | |
2370 | kvm_mmu_set_nonpresent_ptes(0ull, 0ull); | |
2371 | return 0; | |
2372 | ||
2373 | out: | |
2374 | return r; | |
2375 | } | |
2376 | ||
2377 | void kvm_arch_exit(void) | |
2378 | { | |
2379 | kvm_x86_ops = NULL; | |
2380 | kvm_mmu_module_exit(); | |
2381 | } | |
2382 | ||
2383 | int kvm_emulate_halt(struct kvm_vcpu *vcpu) | |
2384 | { | |
2385 | ++vcpu->stat.halt_exits; | |
2386 | if (irqchip_in_kernel(vcpu->kvm)) { | |
2387 | vcpu->arch.mp_state = VCPU_MP_STATE_HALTED; | |
2388 | kvm_vcpu_block(vcpu); | |
2389 | if (vcpu->arch.mp_state != VCPU_MP_STATE_RUNNABLE) | |
2390 | return -EINTR; | |
2391 | return 1; | |
2392 | } else { | |
2393 | vcpu->run->exit_reason = KVM_EXIT_HLT; | |
2394 | return 0; | |
2395 | } | |
2396 | } | |
2397 | EXPORT_SYMBOL_GPL(kvm_emulate_halt); | |
2398 | ||
2399 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) | |
2400 | { | |
2401 | unsigned long nr, a0, a1, a2, a3, ret; | |
2402 | ||
2403 | kvm_x86_ops->cache_regs(vcpu); | |
2404 | ||
2405 | nr = vcpu->arch.regs[VCPU_REGS_RAX]; | |
2406 | a0 = vcpu->arch.regs[VCPU_REGS_RBX]; | |
2407 | a1 = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2408 | a2 = vcpu->arch.regs[VCPU_REGS_RDX]; | |
2409 | a3 = vcpu->arch.regs[VCPU_REGS_RSI]; | |
2410 | ||
2411 | if (!is_long_mode(vcpu)) { | |
2412 | nr &= 0xFFFFFFFF; | |
2413 | a0 &= 0xFFFFFFFF; | |
2414 | a1 &= 0xFFFFFFFF; | |
2415 | a2 &= 0xFFFFFFFF; | |
2416 | a3 &= 0xFFFFFFFF; | |
2417 | } | |
2418 | ||
2419 | switch (nr) { | |
2420 | case KVM_HC_VAPIC_POLL_IRQ: | |
2421 | ret = 0; | |
2422 | break; | |
2423 | default: | |
2424 | ret = -KVM_ENOSYS; | |
2425 | break; | |
2426 | } | |
2427 | vcpu->arch.regs[VCPU_REGS_RAX] = ret; | |
2428 | kvm_x86_ops->decache_regs(vcpu); | |
2429 | ++vcpu->stat.hypercalls; | |
2430 | return 0; | |
2431 | } | |
2432 | EXPORT_SYMBOL_GPL(kvm_emulate_hypercall); | |
2433 | ||
2434 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu) | |
2435 | { | |
2436 | char instruction[3]; | |
2437 | int ret = 0; | |
2438 | ||
2439 | ||
2440 | /* | |
2441 | * Blow out the MMU to ensure that no other VCPU has an active mapping | |
2442 | * to ensure that the updated hypercall appears atomically across all | |
2443 | * VCPUs. | |
2444 | */ | |
2445 | kvm_mmu_zap_all(vcpu->kvm); | |
2446 | ||
2447 | kvm_x86_ops->cache_regs(vcpu); | |
2448 | kvm_x86_ops->patch_hypercall(vcpu, instruction); | |
2449 | if (emulator_write_emulated(vcpu->arch.rip, instruction, 3, vcpu) | |
2450 | != X86EMUL_CONTINUE) | |
2451 | ret = -EFAULT; | |
2452 | ||
2453 | return ret; | |
2454 | } | |
2455 | ||
2456 | static u64 mk_cr_64(u64 curr_cr, u32 new_val) | |
2457 | { | |
2458 | return (curr_cr & ~((1ULL << 32) - 1)) | new_val; | |
2459 | } | |
2460 | ||
2461 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
2462 | { | |
2463 | struct descriptor_table dt = { limit, base }; | |
2464 | ||
2465 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
2466 | } | |
2467 | ||
2468 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base) | |
2469 | { | |
2470 | struct descriptor_table dt = { limit, base }; | |
2471 | ||
2472 | kvm_x86_ops->set_idt(vcpu, &dt); | |
2473 | } | |
2474 | ||
2475 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
2476 | unsigned long *rflags) | |
2477 | { | |
2478 | kvm_lmsw(vcpu, msw); | |
2479 | *rflags = kvm_x86_ops->get_rflags(vcpu); | |
2480 | } | |
2481 | ||
2482 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr) | |
2483 | { | |
2484 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2485 | switch (cr) { | |
2486 | case 0: | |
2487 | return vcpu->arch.cr0; | |
2488 | case 2: | |
2489 | return vcpu->arch.cr2; | |
2490 | case 3: | |
2491 | return vcpu->arch.cr3; | |
2492 | case 4: | |
2493 | return vcpu->arch.cr4; | |
2494 | case 8: | |
2495 | return kvm_get_cr8(vcpu); | |
2496 | default: | |
2497 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | |
2498 | return 0; | |
2499 | } | |
2500 | } | |
2501 | ||
2502 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val, | |
2503 | unsigned long *rflags) | |
2504 | { | |
2505 | switch (cr) { | |
2506 | case 0: | |
2507 | kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val)); | |
2508 | *rflags = kvm_x86_ops->get_rflags(vcpu); | |
2509 | break; | |
2510 | case 2: | |
2511 | vcpu->arch.cr2 = val; | |
2512 | break; | |
2513 | case 3: | |
2514 | kvm_set_cr3(vcpu, val); | |
2515 | break; | |
2516 | case 4: | |
2517 | kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val)); | |
2518 | break; | |
2519 | case 8: | |
2520 | kvm_set_cr8(vcpu, val & 0xfUL); | |
2521 | break; | |
2522 | default: | |
2523 | vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr); | |
2524 | } | |
2525 | } | |
2526 | ||
2527 | static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i) | |
2528 | { | |
2529 | struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i]; | |
2530 | int j, nent = vcpu->arch.cpuid_nent; | |
2531 | ||
2532 | e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT; | |
2533 | /* when no next entry is found, the current entry[i] is reselected */ | |
2534 | for (j = i + 1; j == i; j = (j + 1) % nent) { | |
2535 | struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j]; | |
2536 | if (ej->function == e->function) { | |
2537 | ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT; | |
2538 | return j; | |
2539 | } | |
2540 | } | |
2541 | return 0; /* silence gcc, even though control never reaches here */ | |
2542 | } | |
2543 | ||
2544 | /* find an entry with matching function, matching index (if needed), and that | |
2545 | * should be read next (if it's stateful) */ | |
2546 | static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e, | |
2547 | u32 function, u32 index) | |
2548 | { | |
2549 | if (e->function != function) | |
2550 | return 0; | |
2551 | if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index) | |
2552 | return 0; | |
2553 | if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) && | |
2554 | !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT)) | |
2555 | return 0; | |
2556 | return 1; | |
2557 | } | |
2558 | ||
2559 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu) | |
2560 | { | |
2561 | int i; | |
2562 | u32 function, index; | |
2563 | struct kvm_cpuid_entry2 *e, *best; | |
2564 | ||
2565 | kvm_x86_ops->cache_regs(vcpu); | |
2566 | function = vcpu->arch.regs[VCPU_REGS_RAX]; | |
2567 | index = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2568 | vcpu->arch.regs[VCPU_REGS_RAX] = 0; | |
2569 | vcpu->arch.regs[VCPU_REGS_RBX] = 0; | |
2570 | vcpu->arch.regs[VCPU_REGS_RCX] = 0; | |
2571 | vcpu->arch.regs[VCPU_REGS_RDX] = 0; | |
2572 | best = NULL; | |
2573 | for (i = 0; i < vcpu->arch.cpuid_nent; ++i) { | |
2574 | e = &vcpu->arch.cpuid_entries[i]; | |
2575 | if (is_matching_cpuid_entry(e, function, index)) { | |
2576 | if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) | |
2577 | move_to_next_stateful_cpuid_entry(vcpu, i); | |
2578 | best = e; | |
2579 | break; | |
2580 | } | |
2581 | /* | |
2582 | * Both basic or both extended? | |
2583 | */ | |
2584 | if (((e->function ^ function) & 0x80000000) == 0) | |
2585 | if (!best || e->function > best->function) | |
2586 | best = e; | |
2587 | } | |
2588 | if (best) { | |
2589 | vcpu->arch.regs[VCPU_REGS_RAX] = best->eax; | |
2590 | vcpu->arch.regs[VCPU_REGS_RBX] = best->ebx; | |
2591 | vcpu->arch.regs[VCPU_REGS_RCX] = best->ecx; | |
2592 | vcpu->arch.regs[VCPU_REGS_RDX] = best->edx; | |
2593 | } | |
2594 | kvm_x86_ops->decache_regs(vcpu); | |
2595 | kvm_x86_ops->skip_emulated_instruction(vcpu); | |
2596 | } | |
2597 | EXPORT_SYMBOL_GPL(kvm_emulate_cpuid); | |
2598 | ||
2599 | /* | |
2600 | * Check if userspace requested an interrupt window, and that the | |
2601 | * interrupt window is open. | |
2602 | * | |
2603 | * No need to exit to userspace if we already have an interrupt queued. | |
2604 | */ | |
2605 | static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu, | |
2606 | struct kvm_run *kvm_run) | |
2607 | { | |
2608 | return (!vcpu->arch.irq_summary && | |
2609 | kvm_run->request_interrupt_window && | |
2610 | vcpu->arch.interrupt_window_open && | |
2611 | (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF)); | |
2612 | } | |
2613 | ||
2614 | static void post_kvm_run_save(struct kvm_vcpu *vcpu, | |
2615 | struct kvm_run *kvm_run) | |
2616 | { | |
2617 | kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0; | |
2618 | kvm_run->cr8 = kvm_get_cr8(vcpu); | |
2619 | kvm_run->apic_base = kvm_get_apic_base(vcpu); | |
2620 | if (irqchip_in_kernel(vcpu->kvm)) | |
2621 | kvm_run->ready_for_interrupt_injection = 1; | |
2622 | else | |
2623 | kvm_run->ready_for_interrupt_injection = | |
2624 | (vcpu->arch.interrupt_window_open && | |
2625 | vcpu->arch.irq_summary == 0); | |
2626 | } | |
2627 | ||
2628 | static void vapic_enter(struct kvm_vcpu *vcpu) | |
2629 | { | |
2630 | struct kvm_lapic *apic = vcpu->arch.apic; | |
2631 | struct page *page; | |
2632 | ||
2633 | if (!apic || !apic->vapic_addr) | |
2634 | return; | |
2635 | ||
2636 | down_read(¤t->mm->mmap_sem); | |
2637 | page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); | |
2638 | up_read(¤t->mm->mmap_sem); | |
2639 | ||
2640 | vcpu->arch.apic->vapic_page = page; | |
2641 | } | |
2642 | ||
2643 | static void vapic_exit(struct kvm_vcpu *vcpu) | |
2644 | { | |
2645 | struct kvm_lapic *apic = vcpu->arch.apic; | |
2646 | ||
2647 | if (!apic || !apic->vapic_addr) | |
2648 | return; | |
2649 | ||
2650 | kvm_release_page_dirty(apic->vapic_page); | |
2651 | mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT); | |
2652 | } | |
2653 | ||
2654 | static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |
2655 | { | |
2656 | int r; | |
2657 | ||
2658 | if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED)) { | |
2659 | pr_debug("vcpu %d received sipi with vector # %x\n", | |
2660 | vcpu->vcpu_id, vcpu->arch.sipi_vector); | |
2661 | kvm_lapic_reset(vcpu); | |
2662 | r = kvm_x86_ops->vcpu_reset(vcpu); | |
2663 | if (r) | |
2664 | return r; | |
2665 | vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; | |
2666 | } | |
2667 | ||
2668 | vapic_enter(vcpu); | |
2669 | ||
2670 | preempted: | |
2671 | if (vcpu->guest_debug.enabled) | |
2672 | kvm_x86_ops->guest_debug_pre(vcpu); | |
2673 | ||
2674 | again: | |
2675 | if (vcpu->requests) | |
2676 | if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) | |
2677 | kvm_mmu_unload(vcpu); | |
2678 | ||
2679 | r = kvm_mmu_reload(vcpu); | |
2680 | if (unlikely(r)) | |
2681 | goto out; | |
2682 | ||
2683 | if (vcpu->requests) { | |
2684 | if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests)) | |
2685 | __kvm_migrate_apic_timer(vcpu); | |
2686 | if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS, | |
2687 | &vcpu->requests)) { | |
2688 | kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS; | |
2689 | r = 0; | |
2690 | goto out; | |
2691 | } | |
2692 | if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) { | |
2693 | kvm_run->exit_reason = KVM_EXIT_SHUTDOWN; | |
2694 | r = 0; | |
2695 | goto out; | |
2696 | } | |
2697 | } | |
2698 | ||
2699 | kvm_inject_pending_timer_irqs(vcpu); | |
2700 | ||
2701 | preempt_disable(); | |
2702 | ||
2703 | kvm_x86_ops->prepare_guest_switch(vcpu); | |
2704 | kvm_load_guest_fpu(vcpu); | |
2705 | ||
2706 | local_irq_disable(); | |
2707 | ||
2708 | if (need_resched()) { | |
2709 | local_irq_enable(); | |
2710 | preempt_enable(); | |
2711 | r = 1; | |
2712 | goto out; | |
2713 | } | |
2714 | ||
2715 | if (vcpu->requests) | |
2716 | if (test_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) { | |
2717 | local_irq_enable(); | |
2718 | preempt_enable(); | |
2719 | r = 1; | |
2720 | goto out; | |
2721 | } | |
2722 | ||
2723 | if (signal_pending(current)) { | |
2724 | local_irq_enable(); | |
2725 | preempt_enable(); | |
2726 | r = -EINTR; | |
2727 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
2728 | ++vcpu->stat.signal_exits; | |
2729 | goto out; | |
2730 | } | |
2731 | ||
2732 | if (vcpu->arch.exception.pending) | |
2733 | __queue_exception(vcpu); | |
2734 | else if (irqchip_in_kernel(vcpu->kvm)) | |
2735 | kvm_x86_ops->inject_pending_irq(vcpu); | |
2736 | else | |
2737 | kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run); | |
2738 | ||
2739 | kvm_lapic_sync_to_vapic(vcpu); | |
2740 | ||
2741 | vcpu->guest_mode = 1; | |
2742 | kvm_guest_enter(); | |
2743 | ||
2744 | if (vcpu->requests) | |
2745 | if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests)) | |
2746 | kvm_x86_ops->tlb_flush(vcpu); | |
2747 | ||
2748 | kvm_x86_ops->run(vcpu, kvm_run); | |
2749 | ||
2750 | vcpu->guest_mode = 0; | |
2751 | local_irq_enable(); | |
2752 | ||
2753 | ++vcpu->stat.exits; | |
2754 | ||
2755 | /* | |
2756 | * We must have an instruction between local_irq_enable() and | |
2757 | * kvm_guest_exit(), so the timer interrupt isn't delayed by | |
2758 | * the interrupt shadow. The stat.exits increment will do nicely. | |
2759 | * But we need to prevent reordering, hence this barrier(): | |
2760 | */ | |
2761 | barrier(); | |
2762 | ||
2763 | kvm_guest_exit(); | |
2764 | ||
2765 | preempt_enable(); | |
2766 | ||
2767 | /* | |
2768 | * Profile KVM exit RIPs: | |
2769 | */ | |
2770 | if (unlikely(prof_on == KVM_PROFILING)) { | |
2771 | kvm_x86_ops->cache_regs(vcpu); | |
2772 | profile_hit(KVM_PROFILING, (void *)vcpu->arch.rip); | |
2773 | } | |
2774 | ||
2775 | if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu)) | |
2776 | vcpu->arch.exception.pending = false; | |
2777 | ||
2778 | kvm_lapic_sync_from_vapic(vcpu); | |
2779 | ||
2780 | r = kvm_x86_ops->handle_exit(kvm_run, vcpu); | |
2781 | ||
2782 | if (r > 0) { | |
2783 | if (dm_request_for_irq_injection(vcpu, kvm_run)) { | |
2784 | r = -EINTR; | |
2785 | kvm_run->exit_reason = KVM_EXIT_INTR; | |
2786 | ++vcpu->stat.request_irq_exits; | |
2787 | goto out; | |
2788 | } | |
2789 | if (!need_resched()) | |
2790 | goto again; | |
2791 | } | |
2792 | ||
2793 | out: | |
2794 | if (r > 0) { | |
2795 | kvm_resched(vcpu); | |
2796 | goto preempted; | |
2797 | } | |
2798 | ||
2799 | post_kvm_run_save(vcpu, kvm_run); | |
2800 | ||
2801 | vapic_exit(vcpu); | |
2802 | ||
2803 | return r; | |
2804 | } | |
2805 | ||
2806 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | |
2807 | { | |
2808 | int r; | |
2809 | sigset_t sigsaved; | |
2810 | ||
2811 | vcpu_load(vcpu); | |
2812 | ||
2813 | if (unlikely(vcpu->arch.mp_state == VCPU_MP_STATE_UNINITIALIZED)) { | |
2814 | kvm_vcpu_block(vcpu); | |
2815 | vcpu_put(vcpu); | |
2816 | return -EAGAIN; | |
2817 | } | |
2818 | ||
2819 | if (vcpu->sigset_active) | |
2820 | sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved); | |
2821 | ||
2822 | /* re-sync apic's tpr */ | |
2823 | if (!irqchip_in_kernel(vcpu->kvm)) | |
2824 | kvm_set_cr8(vcpu, kvm_run->cr8); | |
2825 | ||
2826 | if (vcpu->arch.pio.cur_count) { | |
2827 | r = complete_pio(vcpu); | |
2828 | if (r) | |
2829 | goto out; | |
2830 | } | |
2831 | #if CONFIG_HAS_IOMEM | |
2832 | if (vcpu->mmio_needed) { | |
2833 | memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8); | |
2834 | vcpu->mmio_read_completed = 1; | |
2835 | vcpu->mmio_needed = 0; | |
2836 | r = emulate_instruction(vcpu, kvm_run, | |
2837 | vcpu->arch.mmio_fault_cr2, 0, | |
2838 | EMULTYPE_NO_DECODE); | |
2839 | if (r == EMULATE_DO_MMIO) { | |
2840 | /* | |
2841 | * Read-modify-write. Back to userspace. | |
2842 | */ | |
2843 | r = 0; | |
2844 | goto out; | |
2845 | } | |
2846 | } | |
2847 | #endif | |
2848 | if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL) { | |
2849 | kvm_x86_ops->cache_regs(vcpu); | |
2850 | vcpu->arch.regs[VCPU_REGS_RAX] = kvm_run->hypercall.ret; | |
2851 | kvm_x86_ops->decache_regs(vcpu); | |
2852 | } | |
2853 | ||
2854 | r = __vcpu_run(vcpu, kvm_run); | |
2855 | ||
2856 | out: | |
2857 | if (vcpu->sigset_active) | |
2858 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | |
2859 | ||
2860 | vcpu_put(vcpu); | |
2861 | return r; | |
2862 | } | |
2863 | ||
2864 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2865 | { | |
2866 | vcpu_load(vcpu); | |
2867 | ||
2868 | kvm_x86_ops->cache_regs(vcpu); | |
2869 | ||
2870 | regs->rax = vcpu->arch.regs[VCPU_REGS_RAX]; | |
2871 | regs->rbx = vcpu->arch.regs[VCPU_REGS_RBX]; | |
2872 | regs->rcx = vcpu->arch.regs[VCPU_REGS_RCX]; | |
2873 | regs->rdx = vcpu->arch.regs[VCPU_REGS_RDX]; | |
2874 | regs->rsi = vcpu->arch.regs[VCPU_REGS_RSI]; | |
2875 | regs->rdi = vcpu->arch.regs[VCPU_REGS_RDI]; | |
2876 | regs->rsp = vcpu->arch.regs[VCPU_REGS_RSP]; | |
2877 | regs->rbp = vcpu->arch.regs[VCPU_REGS_RBP]; | |
2878 | #ifdef CONFIG_X86_64 | |
2879 | regs->r8 = vcpu->arch.regs[VCPU_REGS_R8]; | |
2880 | regs->r9 = vcpu->arch.regs[VCPU_REGS_R9]; | |
2881 | regs->r10 = vcpu->arch.regs[VCPU_REGS_R10]; | |
2882 | regs->r11 = vcpu->arch.regs[VCPU_REGS_R11]; | |
2883 | regs->r12 = vcpu->arch.regs[VCPU_REGS_R12]; | |
2884 | regs->r13 = vcpu->arch.regs[VCPU_REGS_R13]; | |
2885 | regs->r14 = vcpu->arch.regs[VCPU_REGS_R14]; | |
2886 | regs->r15 = vcpu->arch.regs[VCPU_REGS_R15]; | |
2887 | #endif | |
2888 | ||
2889 | regs->rip = vcpu->arch.rip; | |
2890 | regs->rflags = kvm_x86_ops->get_rflags(vcpu); | |
2891 | ||
2892 | /* | |
2893 | * Don't leak debug flags in case they were set for guest debugging | |
2894 | */ | |
2895 | if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep) | |
2896 | regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF); | |
2897 | ||
2898 | vcpu_put(vcpu); | |
2899 | ||
2900 | return 0; | |
2901 | } | |
2902 | ||
2903 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) | |
2904 | { | |
2905 | vcpu_load(vcpu); | |
2906 | ||
2907 | vcpu->arch.regs[VCPU_REGS_RAX] = regs->rax; | |
2908 | vcpu->arch.regs[VCPU_REGS_RBX] = regs->rbx; | |
2909 | vcpu->arch.regs[VCPU_REGS_RCX] = regs->rcx; | |
2910 | vcpu->arch.regs[VCPU_REGS_RDX] = regs->rdx; | |
2911 | vcpu->arch.regs[VCPU_REGS_RSI] = regs->rsi; | |
2912 | vcpu->arch.regs[VCPU_REGS_RDI] = regs->rdi; | |
2913 | vcpu->arch.regs[VCPU_REGS_RSP] = regs->rsp; | |
2914 | vcpu->arch.regs[VCPU_REGS_RBP] = regs->rbp; | |
2915 | #ifdef CONFIG_X86_64 | |
2916 | vcpu->arch.regs[VCPU_REGS_R8] = regs->r8; | |
2917 | vcpu->arch.regs[VCPU_REGS_R9] = regs->r9; | |
2918 | vcpu->arch.regs[VCPU_REGS_R10] = regs->r10; | |
2919 | vcpu->arch.regs[VCPU_REGS_R11] = regs->r11; | |
2920 | vcpu->arch.regs[VCPU_REGS_R12] = regs->r12; | |
2921 | vcpu->arch.regs[VCPU_REGS_R13] = regs->r13; | |
2922 | vcpu->arch.regs[VCPU_REGS_R14] = regs->r14; | |
2923 | vcpu->arch.regs[VCPU_REGS_R15] = regs->r15; | |
2924 | #endif | |
2925 | ||
2926 | vcpu->arch.rip = regs->rip; | |
2927 | kvm_x86_ops->set_rflags(vcpu, regs->rflags); | |
2928 | ||
2929 | kvm_x86_ops->decache_regs(vcpu); | |
2930 | ||
2931 | vcpu_put(vcpu); | |
2932 | ||
2933 | return 0; | |
2934 | } | |
2935 | ||
2936 | static void get_segment(struct kvm_vcpu *vcpu, | |
2937 | struct kvm_segment *var, int seg) | |
2938 | { | |
2939 | kvm_x86_ops->get_segment(vcpu, var, seg); | |
2940 | } | |
2941 | ||
2942 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l) | |
2943 | { | |
2944 | struct kvm_segment cs; | |
2945 | ||
2946 | get_segment(vcpu, &cs, VCPU_SREG_CS); | |
2947 | *db = cs.db; | |
2948 | *l = cs.l; | |
2949 | } | |
2950 | EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits); | |
2951 | ||
2952 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, | |
2953 | struct kvm_sregs *sregs) | |
2954 | { | |
2955 | struct descriptor_table dt; | |
2956 | int pending_vec; | |
2957 | ||
2958 | vcpu_load(vcpu); | |
2959 | ||
2960 | get_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
2961 | get_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
2962 | get_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
2963 | get_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
2964 | get_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
2965 | get_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
2966 | ||
2967 | get_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
2968 | get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
2969 | ||
2970 | kvm_x86_ops->get_idt(vcpu, &dt); | |
2971 | sregs->idt.limit = dt.limit; | |
2972 | sregs->idt.base = dt.base; | |
2973 | kvm_x86_ops->get_gdt(vcpu, &dt); | |
2974 | sregs->gdt.limit = dt.limit; | |
2975 | sregs->gdt.base = dt.base; | |
2976 | ||
2977 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
2978 | sregs->cr0 = vcpu->arch.cr0; | |
2979 | sregs->cr2 = vcpu->arch.cr2; | |
2980 | sregs->cr3 = vcpu->arch.cr3; | |
2981 | sregs->cr4 = vcpu->arch.cr4; | |
2982 | sregs->cr8 = kvm_get_cr8(vcpu); | |
2983 | sregs->efer = vcpu->arch.shadow_efer; | |
2984 | sregs->apic_base = kvm_get_apic_base(vcpu); | |
2985 | ||
2986 | if (irqchip_in_kernel(vcpu->kvm)) { | |
2987 | memset(sregs->interrupt_bitmap, 0, | |
2988 | sizeof sregs->interrupt_bitmap); | |
2989 | pending_vec = kvm_x86_ops->get_irq(vcpu); | |
2990 | if (pending_vec >= 0) | |
2991 | set_bit(pending_vec, | |
2992 | (unsigned long *)sregs->interrupt_bitmap); | |
2993 | } else | |
2994 | memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending, | |
2995 | sizeof sregs->interrupt_bitmap); | |
2996 | ||
2997 | vcpu_put(vcpu); | |
2998 | ||
2999 | return 0; | |
3000 | } | |
3001 | ||
3002 | static void set_segment(struct kvm_vcpu *vcpu, | |
3003 | struct kvm_segment *var, int seg) | |
3004 | { | |
3005 | kvm_x86_ops->set_segment(vcpu, var, seg); | |
3006 | } | |
3007 | ||
3008 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, | |
3009 | struct kvm_sregs *sregs) | |
3010 | { | |
3011 | int mmu_reset_needed = 0; | |
3012 | int i, pending_vec, max_bits; | |
3013 | struct descriptor_table dt; | |
3014 | ||
3015 | vcpu_load(vcpu); | |
3016 | ||
3017 | dt.limit = sregs->idt.limit; | |
3018 | dt.base = sregs->idt.base; | |
3019 | kvm_x86_ops->set_idt(vcpu, &dt); | |
3020 | dt.limit = sregs->gdt.limit; | |
3021 | dt.base = sregs->gdt.base; | |
3022 | kvm_x86_ops->set_gdt(vcpu, &dt); | |
3023 | ||
3024 | vcpu->arch.cr2 = sregs->cr2; | |
3025 | mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3; | |
3026 | vcpu->arch.cr3 = sregs->cr3; | |
3027 | ||
3028 | kvm_set_cr8(vcpu, sregs->cr8); | |
3029 | ||
3030 | mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer; | |
3031 | kvm_x86_ops->set_efer(vcpu, sregs->efer); | |
3032 | kvm_set_apic_base(vcpu, sregs->apic_base); | |
3033 | ||
3034 | kvm_x86_ops->decache_cr4_guest_bits(vcpu); | |
3035 | ||
3036 | mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0; | |
3037 | kvm_x86_ops->set_cr0(vcpu, sregs->cr0); | |
3038 | vcpu->arch.cr0 = sregs->cr0; | |
3039 | ||
3040 | mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4; | |
3041 | kvm_x86_ops->set_cr4(vcpu, sregs->cr4); | |
3042 | if (!is_long_mode(vcpu) && is_pae(vcpu)) | |
3043 | load_pdptrs(vcpu, vcpu->arch.cr3); | |
3044 | ||
3045 | if (mmu_reset_needed) | |
3046 | kvm_mmu_reset_context(vcpu); | |
3047 | ||
3048 | if (!irqchip_in_kernel(vcpu->kvm)) { | |
3049 | memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap, | |
3050 | sizeof vcpu->arch.irq_pending); | |
3051 | vcpu->arch.irq_summary = 0; | |
3052 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i) | |
3053 | if (vcpu->arch.irq_pending[i]) | |
3054 | __set_bit(i, &vcpu->arch.irq_summary); | |
3055 | } else { | |
3056 | max_bits = (sizeof sregs->interrupt_bitmap) << 3; | |
3057 | pending_vec = find_first_bit( | |
3058 | (const unsigned long *)sregs->interrupt_bitmap, | |
3059 | max_bits); | |
3060 | /* Only pending external irq is handled here */ | |
3061 | if (pending_vec < max_bits) { | |
3062 | kvm_x86_ops->set_irq(vcpu, pending_vec); | |
3063 | pr_debug("Set back pending irq %d\n", | |
3064 | pending_vec); | |
3065 | } | |
3066 | } | |
3067 | ||
3068 | set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); | |
3069 | set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); | |
3070 | set_segment(vcpu, &sregs->es, VCPU_SREG_ES); | |
3071 | set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); | |
3072 | set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); | |
3073 | set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); | |
3074 | ||
3075 | set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); | |
3076 | set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); | |
3077 | ||
3078 | vcpu_put(vcpu); | |
3079 | ||
3080 | return 0; | |
3081 | } | |
3082 | ||
3083 | int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu, | |
3084 | struct kvm_debug_guest *dbg) | |
3085 | { | |
3086 | int r; | |
3087 | ||
3088 | vcpu_load(vcpu); | |
3089 | ||
3090 | r = kvm_x86_ops->set_guest_debug(vcpu, dbg); | |
3091 | ||
3092 | vcpu_put(vcpu); | |
3093 | ||
3094 | return r; | |
3095 | } | |
3096 | ||
3097 | /* | |
3098 | * fxsave fpu state. Taken from x86_64/processor.h. To be killed when | |
3099 | * we have asm/x86/processor.h | |
3100 | */ | |
3101 | struct fxsave { | |
3102 | u16 cwd; | |
3103 | u16 swd; | |
3104 | u16 twd; | |
3105 | u16 fop; | |
3106 | u64 rip; | |
3107 | u64 rdp; | |
3108 | u32 mxcsr; | |
3109 | u32 mxcsr_mask; | |
3110 | u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */ | |
3111 | #ifdef CONFIG_X86_64 | |
3112 | u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */ | |
3113 | #else | |
3114 | u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */ | |
3115 | #endif | |
3116 | }; | |
3117 | ||
3118 | /* | |
3119 | * Translate a guest virtual address to a guest physical address. | |
3120 | */ | |
3121 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, | |
3122 | struct kvm_translation *tr) | |
3123 | { | |
3124 | unsigned long vaddr = tr->linear_address; | |
3125 | gpa_t gpa; | |
3126 | ||
3127 | vcpu_load(vcpu); | |
3128 | down_read(&vcpu->kvm->slots_lock); | |
3129 | gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr); | |
3130 | up_read(&vcpu->kvm->slots_lock); | |
3131 | tr->physical_address = gpa; | |
3132 | tr->valid = gpa != UNMAPPED_GVA; | |
3133 | tr->writeable = 1; | |
3134 | tr->usermode = 0; | |
3135 | vcpu_put(vcpu); | |
3136 | ||
3137 | return 0; | |
3138 | } | |
3139 | ||
3140 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
3141 | { | |
3142 | struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; | |
3143 | ||
3144 | vcpu_load(vcpu); | |
3145 | ||
3146 | memcpy(fpu->fpr, fxsave->st_space, 128); | |
3147 | fpu->fcw = fxsave->cwd; | |
3148 | fpu->fsw = fxsave->swd; | |
3149 | fpu->ftwx = fxsave->twd; | |
3150 | fpu->last_opcode = fxsave->fop; | |
3151 | fpu->last_ip = fxsave->rip; | |
3152 | fpu->last_dp = fxsave->rdp; | |
3153 | memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space); | |
3154 | ||
3155 | vcpu_put(vcpu); | |
3156 | ||
3157 | return 0; | |
3158 | } | |
3159 | ||
3160 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) | |
3161 | { | |
3162 | struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image; | |
3163 | ||
3164 | vcpu_load(vcpu); | |
3165 | ||
3166 | memcpy(fxsave->st_space, fpu->fpr, 128); | |
3167 | fxsave->cwd = fpu->fcw; | |
3168 | fxsave->swd = fpu->fsw; | |
3169 | fxsave->twd = fpu->ftwx; | |
3170 | fxsave->fop = fpu->last_opcode; | |
3171 | fxsave->rip = fpu->last_ip; | |
3172 | fxsave->rdp = fpu->last_dp; | |
3173 | memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space); | |
3174 | ||
3175 | vcpu_put(vcpu); | |
3176 | ||
3177 | return 0; | |
3178 | } | |
3179 | ||
3180 | void fx_init(struct kvm_vcpu *vcpu) | |
3181 | { | |
3182 | unsigned after_mxcsr_mask; | |
3183 | ||
3184 | /* Initialize guest FPU by resetting ours and saving into guest's */ | |
3185 | preempt_disable(); | |
3186 | fx_save(&vcpu->arch.host_fx_image); | |
3187 | fpu_init(); | |
3188 | fx_save(&vcpu->arch.guest_fx_image); | |
3189 | fx_restore(&vcpu->arch.host_fx_image); | |
3190 | preempt_enable(); | |
3191 | ||
3192 | vcpu->arch.cr0 |= X86_CR0_ET; | |
3193 | after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space); | |
3194 | vcpu->arch.guest_fx_image.mxcsr = 0x1f80; | |
3195 | memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask, | |
3196 | 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask); | |
3197 | } | |
3198 | EXPORT_SYMBOL_GPL(fx_init); | |
3199 | ||
3200 | void kvm_load_guest_fpu(struct kvm_vcpu *vcpu) | |
3201 | { | |
3202 | if (!vcpu->fpu_active || vcpu->guest_fpu_loaded) | |
3203 | return; | |
3204 | ||
3205 | vcpu->guest_fpu_loaded = 1; | |
3206 | fx_save(&vcpu->arch.host_fx_image); | |
3207 | fx_restore(&vcpu->arch.guest_fx_image); | |
3208 | } | |
3209 | EXPORT_SYMBOL_GPL(kvm_load_guest_fpu); | |
3210 | ||
3211 | void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) | |
3212 | { | |
3213 | if (!vcpu->guest_fpu_loaded) | |
3214 | return; | |
3215 | ||
3216 | vcpu->guest_fpu_loaded = 0; | |
3217 | fx_save(&vcpu->arch.guest_fx_image); | |
3218 | fx_restore(&vcpu->arch.host_fx_image); | |
3219 | ++vcpu->stat.fpu_reload; | |
3220 | } | |
3221 | EXPORT_SYMBOL_GPL(kvm_put_guest_fpu); | |
3222 | ||
3223 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) | |
3224 | { | |
3225 | kvm_x86_ops->vcpu_free(vcpu); | |
3226 | } | |
3227 | ||
3228 | struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, | |
3229 | unsigned int id) | |
3230 | { | |
3231 | return kvm_x86_ops->vcpu_create(kvm, id); | |
3232 | } | |
3233 | ||
3234 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) | |
3235 | { | |
3236 | int r; | |
3237 | ||
3238 | /* We do fxsave: this must be aligned. */ | |
3239 | BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF); | |
3240 | ||
3241 | vcpu_load(vcpu); | |
3242 | r = kvm_arch_vcpu_reset(vcpu); | |
3243 | if (r == 0) | |
3244 | r = kvm_mmu_setup(vcpu); | |
3245 | vcpu_put(vcpu); | |
3246 | if (r < 0) | |
3247 | goto free_vcpu; | |
3248 | ||
3249 | return 0; | |
3250 | free_vcpu: | |
3251 | kvm_x86_ops->vcpu_free(vcpu); | |
3252 | return r; | |
3253 | } | |
3254 | ||
3255 | void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) | |
3256 | { | |
3257 | vcpu_load(vcpu); | |
3258 | kvm_mmu_unload(vcpu); | |
3259 | vcpu_put(vcpu); | |
3260 | ||
3261 | kvm_x86_ops->vcpu_free(vcpu); | |
3262 | } | |
3263 | ||
3264 | int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu) | |
3265 | { | |
3266 | return kvm_x86_ops->vcpu_reset(vcpu); | |
3267 | } | |
3268 | ||
3269 | void kvm_arch_hardware_enable(void *garbage) | |
3270 | { | |
3271 | kvm_x86_ops->hardware_enable(garbage); | |
3272 | } | |
3273 | ||
3274 | void kvm_arch_hardware_disable(void *garbage) | |
3275 | { | |
3276 | kvm_x86_ops->hardware_disable(garbage); | |
3277 | } | |
3278 | ||
3279 | int kvm_arch_hardware_setup(void) | |
3280 | { | |
3281 | return kvm_x86_ops->hardware_setup(); | |
3282 | } | |
3283 | ||
3284 | void kvm_arch_hardware_unsetup(void) | |
3285 | { | |
3286 | kvm_x86_ops->hardware_unsetup(); | |
3287 | } | |
3288 | ||
3289 | void kvm_arch_check_processor_compat(void *rtn) | |
3290 | { | |
3291 | kvm_x86_ops->check_processor_compatibility(rtn); | |
3292 | } | |
3293 | ||
3294 | int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) | |
3295 | { | |
3296 | struct page *page; | |
3297 | struct kvm *kvm; | |
3298 | int r; | |
3299 | ||
3300 | BUG_ON(vcpu->kvm == NULL); | |
3301 | kvm = vcpu->kvm; | |
3302 | ||
3303 | vcpu->arch.mmu.root_hpa = INVALID_PAGE; | |
3304 | if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0) | |
3305 | vcpu->arch.mp_state = VCPU_MP_STATE_RUNNABLE; | |
3306 | else | |
3307 | vcpu->arch.mp_state = VCPU_MP_STATE_UNINITIALIZED; | |
3308 | ||
3309 | page = alloc_page(GFP_KERNEL | __GFP_ZERO); | |
3310 | if (!page) { | |
3311 | r = -ENOMEM; | |
3312 | goto fail; | |
3313 | } | |
3314 | vcpu->arch.pio_data = page_address(page); | |
3315 | ||
3316 | r = kvm_mmu_create(vcpu); | |
3317 | if (r < 0) | |
3318 | goto fail_free_pio_data; | |
3319 | ||
3320 | if (irqchip_in_kernel(kvm)) { | |
3321 | r = kvm_create_lapic(vcpu); | |
3322 | if (r < 0) | |
3323 | goto fail_mmu_destroy; | |
3324 | } | |
3325 | ||
3326 | return 0; | |
3327 | ||
3328 | fail_mmu_destroy: | |
3329 | kvm_mmu_destroy(vcpu); | |
3330 | fail_free_pio_data: | |
3331 | free_page((unsigned long)vcpu->arch.pio_data); | |
3332 | fail: | |
3333 | return r; | |
3334 | } | |
3335 | ||
3336 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) | |
3337 | { | |
3338 | kvm_free_lapic(vcpu); | |
3339 | kvm_mmu_destroy(vcpu); | |
3340 | free_page((unsigned long)vcpu->arch.pio_data); | |
3341 | } | |
3342 | ||
3343 | struct kvm *kvm_arch_create_vm(void) | |
3344 | { | |
3345 | struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL); | |
3346 | ||
3347 | if (!kvm) | |
3348 | return ERR_PTR(-ENOMEM); | |
3349 | ||
3350 | INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); | |
3351 | ||
3352 | return kvm; | |
3353 | } | |
3354 | ||
3355 | static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu) | |
3356 | { | |
3357 | vcpu_load(vcpu); | |
3358 | kvm_mmu_unload(vcpu); | |
3359 | vcpu_put(vcpu); | |
3360 | } | |
3361 | ||
3362 | static void kvm_free_vcpus(struct kvm *kvm) | |
3363 | { | |
3364 | unsigned int i; | |
3365 | ||
3366 | /* | |
3367 | * Unpin any mmu pages first. | |
3368 | */ | |
3369 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | |
3370 | if (kvm->vcpus[i]) | |
3371 | kvm_unload_vcpu_mmu(kvm->vcpus[i]); | |
3372 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | |
3373 | if (kvm->vcpus[i]) { | |
3374 | kvm_arch_vcpu_free(kvm->vcpus[i]); | |
3375 | kvm->vcpus[i] = NULL; | |
3376 | } | |
3377 | } | |
3378 | ||
3379 | } | |
3380 | ||
3381 | void kvm_arch_destroy_vm(struct kvm *kvm) | |
3382 | { | |
3383 | kvm_free_pit(kvm); | |
3384 | kfree(kvm->arch.vpic); | |
3385 | kfree(kvm->arch.vioapic); | |
3386 | kvm_free_vcpus(kvm); | |
3387 | kvm_free_physmem(kvm); | |
3388 | kfree(kvm); | |
3389 | } | |
3390 | ||
3391 | int kvm_arch_set_memory_region(struct kvm *kvm, | |
3392 | struct kvm_userspace_memory_region *mem, | |
3393 | struct kvm_memory_slot old, | |
3394 | int user_alloc) | |
3395 | { | |
3396 | int npages = mem->memory_size >> PAGE_SHIFT; | |
3397 | struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot]; | |
3398 | ||
3399 | /*To keep backward compatibility with older userspace, | |
3400 | *x86 needs to hanlde !user_alloc case. | |
3401 | */ | |
3402 | if (!user_alloc) { | |
3403 | if (npages && !old.rmap) { | |
3404 | down_write(¤t->mm->mmap_sem); | |
3405 | memslot->userspace_addr = do_mmap(NULL, 0, | |
3406 | npages * PAGE_SIZE, | |
3407 | PROT_READ | PROT_WRITE, | |
3408 | MAP_SHARED | MAP_ANONYMOUS, | |
3409 | 0); | |
3410 | up_write(¤t->mm->mmap_sem); | |
3411 | ||
3412 | if (IS_ERR((void *)memslot->userspace_addr)) | |
3413 | return PTR_ERR((void *)memslot->userspace_addr); | |
3414 | } else { | |
3415 | if (!old.user_alloc && old.rmap) { | |
3416 | int ret; | |
3417 | ||
3418 | down_write(¤t->mm->mmap_sem); | |
3419 | ret = do_munmap(current->mm, old.userspace_addr, | |
3420 | old.npages * PAGE_SIZE); | |
3421 | up_write(¤t->mm->mmap_sem); | |
3422 | if (ret < 0) | |
3423 | printk(KERN_WARNING | |
3424 | "kvm_vm_ioctl_set_memory_region: " | |
3425 | "failed to munmap memory\n"); | |
3426 | } | |
3427 | } | |
3428 | } | |
3429 | ||
3430 | if (!kvm->arch.n_requested_mmu_pages) { | |
3431 | unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm); | |
3432 | kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages); | |
3433 | } | |
3434 | ||
3435 | kvm_mmu_slot_remove_write_access(kvm, mem->slot); | |
3436 | kvm_flush_remote_tlbs(kvm); | |
3437 | ||
3438 | return 0; | |
3439 | } | |
3440 | ||
3441 | int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) | |
3442 | { | |
3443 | return vcpu->arch.mp_state == VCPU_MP_STATE_RUNNABLE | |
3444 | || vcpu->arch.mp_state == VCPU_MP_STATE_SIPI_RECEIVED; | |
3445 | } | |
3446 | ||
3447 | static void vcpu_kick_intr(void *info) | |
3448 | { | |
3449 | #ifdef DEBUG | |
3450 | struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info; | |
3451 | printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu); | |
3452 | #endif | |
3453 | } | |
3454 | ||
3455 | void kvm_vcpu_kick(struct kvm_vcpu *vcpu) | |
3456 | { | |
3457 | int ipi_pcpu = vcpu->cpu; | |
3458 | ||
3459 | if (waitqueue_active(&vcpu->wq)) { | |
3460 | wake_up_interruptible(&vcpu->wq); | |
3461 | ++vcpu->stat.halt_wakeup; | |
3462 | } | |
3463 | if (vcpu->guest_mode) | |
3464 | smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0); | |
3465 | } |