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1 | /* | |
2 | * libata-core.c - helper library for ATA | |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
33 | */ | |
34 | ||
35 | #include <linux/kernel.h> | |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
50 | #include <linux/jiffies.h> | |
51 | #include <linux/scatterlist.h> | |
52 | #include <scsi/scsi.h> | |
53 | #include <scsi/scsi_cmnd.h> | |
54 | #include <scsi/scsi_host.h> | |
55 | #include <linux/libata.h> | |
56 | #include <asm/io.h> | |
57 | #include <asm/semaphore.h> | |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
62 | #define DRV_VERSION "2.20" /* must be exactly four chars */ | |
63 | ||
64 | ||
65 | /* debounce timing parameters in msecs { interval, duration, timeout } */ | |
66 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; | |
67 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
68 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
69 | ||
70 | static unsigned int ata_dev_init_params(struct ata_device *dev, | |
71 | u16 heads, u16 sectors); | |
72 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
73 | static void ata_dev_xfermask(struct ata_device *dev); | |
74 | ||
75 | static unsigned int ata_print_id = 1; | |
76 | static struct workqueue_struct *ata_wq; | |
77 | ||
78 | struct workqueue_struct *ata_aux_wq; | |
79 | ||
80 | int atapi_enabled = 1; | |
81 | module_param(atapi_enabled, int, 0444); | |
82 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
83 | ||
84 | int atapi_dmadir = 0; | |
85 | module_param(atapi_dmadir, int, 0444); | |
86 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
87 | ||
88 | int libata_fua = 0; | |
89 | module_param_named(fua, libata_fua, int, 0444); | |
90 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
91 | ||
92 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; | |
93 | module_param(ata_probe_timeout, int, 0444); | |
94 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
95 | ||
96 | int libata_noacpi = 1; | |
97 | module_param_named(noacpi, libata_noacpi, int, 0444); | |
98 | MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in suspend/resume when set"); | |
99 | ||
100 | MODULE_AUTHOR("Jeff Garzik"); | |
101 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
102 | MODULE_LICENSE("GPL"); | |
103 | MODULE_VERSION(DRV_VERSION); | |
104 | ||
105 | ||
106 | /** | |
107 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
108 | * @tf: Taskfile to convert | |
109 | * @fis: Buffer into which data will output | |
110 | * @pmp: Port multiplier port | |
111 | * | |
112 | * Converts a standard ATA taskfile to a Serial ATA | |
113 | * FIS structure (Register - Host to Device). | |
114 | * | |
115 | * LOCKING: | |
116 | * Inherited from caller. | |
117 | */ | |
118 | ||
119 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp) | |
120 | { | |
121 | fis[0] = 0x27; /* Register - Host to Device FIS */ | |
122 | fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number, | |
123 | bit 7 indicates Command FIS */ | |
124 | fis[2] = tf->command; | |
125 | fis[3] = tf->feature; | |
126 | ||
127 | fis[4] = tf->lbal; | |
128 | fis[5] = tf->lbam; | |
129 | fis[6] = tf->lbah; | |
130 | fis[7] = tf->device; | |
131 | ||
132 | fis[8] = tf->hob_lbal; | |
133 | fis[9] = tf->hob_lbam; | |
134 | fis[10] = tf->hob_lbah; | |
135 | fis[11] = tf->hob_feature; | |
136 | ||
137 | fis[12] = tf->nsect; | |
138 | fis[13] = tf->hob_nsect; | |
139 | fis[14] = 0; | |
140 | fis[15] = tf->ctl; | |
141 | ||
142 | fis[16] = 0; | |
143 | fis[17] = 0; | |
144 | fis[18] = 0; | |
145 | fis[19] = 0; | |
146 | } | |
147 | ||
148 | /** | |
149 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
150 | * @fis: Buffer from which data will be input | |
151 | * @tf: Taskfile to output | |
152 | * | |
153 | * Converts a serial ATA FIS structure to a standard ATA taskfile. | |
154 | * | |
155 | * LOCKING: | |
156 | * Inherited from caller. | |
157 | */ | |
158 | ||
159 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) | |
160 | { | |
161 | tf->command = fis[2]; /* status */ | |
162 | tf->feature = fis[3]; /* error */ | |
163 | ||
164 | tf->lbal = fis[4]; | |
165 | tf->lbam = fis[5]; | |
166 | tf->lbah = fis[6]; | |
167 | tf->device = fis[7]; | |
168 | ||
169 | tf->hob_lbal = fis[8]; | |
170 | tf->hob_lbam = fis[9]; | |
171 | tf->hob_lbah = fis[10]; | |
172 | ||
173 | tf->nsect = fis[12]; | |
174 | tf->hob_nsect = fis[13]; | |
175 | } | |
176 | ||
177 | static const u8 ata_rw_cmds[] = { | |
178 | /* pio multi */ | |
179 | ATA_CMD_READ_MULTI, | |
180 | ATA_CMD_WRITE_MULTI, | |
181 | ATA_CMD_READ_MULTI_EXT, | |
182 | ATA_CMD_WRITE_MULTI_EXT, | |
183 | 0, | |
184 | 0, | |
185 | 0, | |
186 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
187 | /* pio */ | |
188 | ATA_CMD_PIO_READ, | |
189 | ATA_CMD_PIO_WRITE, | |
190 | ATA_CMD_PIO_READ_EXT, | |
191 | ATA_CMD_PIO_WRITE_EXT, | |
192 | 0, | |
193 | 0, | |
194 | 0, | |
195 | 0, | |
196 | /* dma */ | |
197 | ATA_CMD_READ, | |
198 | ATA_CMD_WRITE, | |
199 | ATA_CMD_READ_EXT, | |
200 | ATA_CMD_WRITE_EXT, | |
201 | 0, | |
202 | 0, | |
203 | 0, | |
204 | ATA_CMD_WRITE_FUA_EXT | |
205 | }; | |
206 | ||
207 | /** | |
208 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol | |
209 | * @tf: command to examine and configure | |
210 | * @dev: device tf belongs to | |
211 | * | |
212 | * Examine the device configuration and tf->flags to calculate | |
213 | * the proper read/write commands and protocol to use. | |
214 | * | |
215 | * LOCKING: | |
216 | * caller. | |
217 | */ | |
218 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) | |
219 | { | |
220 | u8 cmd; | |
221 | ||
222 | int index, fua, lba48, write; | |
223 | ||
224 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; | |
225 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; | |
226 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
227 | ||
228 | if (dev->flags & ATA_DFLAG_PIO) { | |
229 | tf->protocol = ATA_PROT_PIO; | |
230 | index = dev->multi_count ? 0 : 8; | |
231 | } else if (lba48 && (dev->ap->flags & ATA_FLAG_PIO_LBA48)) { | |
232 | /* Unable to use DMA due to host limitation */ | |
233 | tf->protocol = ATA_PROT_PIO; | |
234 | index = dev->multi_count ? 0 : 8; | |
235 | } else { | |
236 | tf->protocol = ATA_PROT_DMA; | |
237 | index = 16; | |
238 | } | |
239 | ||
240 | cmd = ata_rw_cmds[index + fua + lba48 + write]; | |
241 | if (cmd) { | |
242 | tf->command = cmd; | |
243 | return 0; | |
244 | } | |
245 | return -1; | |
246 | } | |
247 | ||
248 | /** | |
249 | * ata_tf_read_block - Read block address from ATA taskfile | |
250 | * @tf: ATA taskfile of interest | |
251 | * @dev: ATA device @tf belongs to | |
252 | * | |
253 | * LOCKING: | |
254 | * None. | |
255 | * | |
256 | * Read block address from @tf. This function can handle all | |
257 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
258 | * flags select the address format to use. | |
259 | * | |
260 | * RETURNS: | |
261 | * Block address read from @tf. | |
262 | */ | |
263 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
264 | { | |
265 | u64 block = 0; | |
266 | ||
267 | if (tf->flags & ATA_TFLAG_LBA) { | |
268 | if (tf->flags & ATA_TFLAG_LBA48) { | |
269 | block |= (u64)tf->hob_lbah << 40; | |
270 | block |= (u64)tf->hob_lbam << 32; | |
271 | block |= tf->hob_lbal << 24; | |
272 | } else | |
273 | block |= (tf->device & 0xf) << 24; | |
274 | ||
275 | block |= tf->lbah << 16; | |
276 | block |= tf->lbam << 8; | |
277 | block |= tf->lbal; | |
278 | } else { | |
279 | u32 cyl, head, sect; | |
280 | ||
281 | cyl = tf->lbam | (tf->lbah << 8); | |
282 | head = tf->device & 0xf; | |
283 | sect = tf->lbal; | |
284 | ||
285 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
286 | } | |
287 | ||
288 | return block; | |
289 | } | |
290 | ||
291 | /** | |
292 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
293 | * @tf: Target ATA taskfile | |
294 | * @dev: ATA device @tf belongs to | |
295 | * @block: Block address | |
296 | * @n_block: Number of blocks | |
297 | * @tf_flags: RW/FUA etc... | |
298 | * @tag: tag | |
299 | * | |
300 | * LOCKING: | |
301 | * None. | |
302 | * | |
303 | * Build ATA taskfile @tf for read/write request described by | |
304 | * @block, @n_block, @tf_flags and @tag on @dev. | |
305 | * | |
306 | * RETURNS: | |
307 | * | |
308 | * 0 on success, -ERANGE if the request is too large for @dev, | |
309 | * -EINVAL if the request is invalid. | |
310 | */ | |
311 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
312 | u64 block, u32 n_block, unsigned int tf_flags, | |
313 | unsigned int tag) | |
314 | { | |
315 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
316 | tf->flags |= tf_flags; | |
317 | ||
318 | if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { | |
319 | /* yay, NCQ */ | |
320 | if (!lba_48_ok(block, n_block)) | |
321 | return -ERANGE; | |
322 | ||
323 | tf->protocol = ATA_PROT_NCQ; | |
324 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
325 | ||
326 | if (tf->flags & ATA_TFLAG_WRITE) | |
327 | tf->command = ATA_CMD_FPDMA_WRITE; | |
328 | else | |
329 | tf->command = ATA_CMD_FPDMA_READ; | |
330 | ||
331 | tf->nsect = tag << 3; | |
332 | tf->hob_feature = (n_block >> 8) & 0xff; | |
333 | tf->feature = n_block & 0xff; | |
334 | ||
335 | tf->hob_lbah = (block >> 40) & 0xff; | |
336 | tf->hob_lbam = (block >> 32) & 0xff; | |
337 | tf->hob_lbal = (block >> 24) & 0xff; | |
338 | tf->lbah = (block >> 16) & 0xff; | |
339 | tf->lbam = (block >> 8) & 0xff; | |
340 | tf->lbal = block & 0xff; | |
341 | ||
342 | tf->device = 1 << 6; | |
343 | if (tf->flags & ATA_TFLAG_FUA) | |
344 | tf->device |= 1 << 7; | |
345 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
346 | tf->flags |= ATA_TFLAG_LBA; | |
347 | ||
348 | if (lba_28_ok(block, n_block)) { | |
349 | /* use LBA28 */ | |
350 | tf->device |= (block >> 24) & 0xf; | |
351 | } else if (lba_48_ok(block, n_block)) { | |
352 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
353 | return -ERANGE; | |
354 | ||
355 | /* use LBA48 */ | |
356 | tf->flags |= ATA_TFLAG_LBA48; | |
357 | ||
358 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
359 | ||
360 | tf->hob_lbah = (block >> 40) & 0xff; | |
361 | tf->hob_lbam = (block >> 32) & 0xff; | |
362 | tf->hob_lbal = (block >> 24) & 0xff; | |
363 | } else | |
364 | /* request too large even for LBA48 */ | |
365 | return -ERANGE; | |
366 | ||
367 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
368 | return -EINVAL; | |
369 | ||
370 | tf->nsect = n_block & 0xff; | |
371 | ||
372 | tf->lbah = (block >> 16) & 0xff; | |
373 | tf->lbam = (block >> 8) & 0xff; | |
374 | tf->lbal = block & 0xff; | |
375 | ||
376 | tf->device |= ATA_LBA; | |
377 | } else { | |
378 | /* CHS */ | |
379 | u32 sect, head, cyl, track; | |
380 | ||
381 | /* The request -may- be too large for CHS addressing. */ | |
382 | if (!lba_28_ok(block, n_block)) | |
383 | return -ERANGE; | |
384 | ||
385 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
386 | return -EINVAL; | |
387 | ||
388 | /* Convert LBA to CHS */ | |
389 | track = (u32)block / dev->sectors; | |
390 | cyl = track / dev->heads; | |
391 | head = track % dev->heads; | |
392 | sect = (u32)block % dev->sectors + 1; | |
393 | ||
394 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
395 | (u32)block, track, cyl, head, sect); | |
396 | ||
397 | /* Check whether the converted CHS can fit. | |
398 | Cylinder: 0-65535 | |
399 | Head: 0-15 | |
400 | Sector: 1-255*/ | |
401 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
402 | return -ERANGE; | |
403 | ||
404 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
405 | tf->lbal = sect; | |
406 | tf->lbam = cyl; | |
407 | tf->lbah = cyl >> 8; | |
408 | tf->device |= head; | |
409 | } | |
410 | ||
411 | return 0; | |
412 | } | |
413 | ||
414 | /** | |
415 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
416 | * @pio_mask: pio_mask | |
417 | * @mwdma_mask: mwdma_mask | |
418 | * @udma_mask: udma_mask | |
419 | * | |
420 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
421 | * unsigned int xfer_mask. | |
422 | * | |
423 | * LOCKING: | |
424 | * None. | |
425 | * | |
426 | * RETURNS: | |
427 | * Packed xfer_mask. | |
428 | */ | |
429 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
430 | unsigned int mwdma_mask, | |
431 | unsigned int udma_mask) | |
432 | { | |
433 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
434 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
435 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
436 | } | |
437 | ||
438 | /** | |
439 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
440 | * @xfer_mask: xfer_mask to unpack | |
441 | * @pio_mask: resulting pio_mask | |
442 | * @mwdma_mask: resulting mwdma_mask | |
443 | * @udma_mask: resulting udma_mask | |
444 | * | |
445 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
446 | * Any NULL distination masks will be ignored. | |
447 | */ | |
448 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
449 | unsigned int *pio_mask, | |
450 | unsigned int *mwdma_mask, | |
451 | unsigned int *udma_mask) | |
452 | { | |
453 | if (pio_mask) | |
454 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
455 | if (mwdma_mask) | |
456 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
457 | if (udma_mask) | |
458 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
459 | } | |
460 | ||
461 | static const struct ata_xfer_ent { | |
462 | int shift, bits; | |
463 | u8 base; | |
464 | } ata_xfer_tbl[] = { | |
465 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
466 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
467 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
468 | { -1, }, | |
469 | }; | |
470 | ||
471 | /** | |
472 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
473 | * @xfer_mask: xfer_mask of interest | |
474 | * | |
475 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
476 | * bit of @xfer_mask is considered. | |
477 | * | |
478 | * LOCKING: | |
479 | * None. | |
480 | * | |
481 | * RETURNS: | |
482 | * Matching XFER_* value, 0 if no match found. | |
483 | */ | |
484 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
485 | { | |
486 | int highbit = fls(xfer_mask) - 1; | |
487 | const struct ata_xfer_ent *ent; | |
488 | ||
489 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
490 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
491 | return ent->base + highbit - ent->shift; | |
492 | return 0; | |
493 | } | |
494 | ||
495 | /** | |
496 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
497 | * @xfer_mode: XFER_* of interest | |
498 | * | |
499 | * Return matching xfer_mask for @xfer_mode. | |
500 | * | |
501 | * LOCKING: | |
502 | * None. | |
503 | * | |
504 | * RETURNS: | |
505 | * Matching xfer_mask, 0 if no match found. | |
506 | */ | |
507 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
508 | { | |
509 | const struct ata_xfer_ent *ent; | |
510 | ||
511 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
512 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
513 | return 1 << (ent->shift + xfer_mode - ent->base); | |
514 | return 0; | |
515 | } | |
516 | ||
517 | /** | |
518 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
519 | * @xfer_mode: XFER_* of interest | |
520 | * | |
521 | * Return matching xfer_shift for @xfer_mode. | |
522 | * | |
523 | * LOCKING: | |
524 | * None. | |
525 | * | |
526 | * RETURNS: | |
527 | * Matching xfer_shift, -1 if no match found. | |
528 | */ | |
529 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
530 | { | |
531 | const struct ata_xfer_ent *ent; | |
532 | ||
533 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
534 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
535 | return ent->shift; | |
536 | return -1; | |
537 | } | |
538 | ||
539 | /** | |
540 | * ata_mode_string - convert xfer_mask to string | |
541 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
542 | * | |
543 | * Determine string which represents the highest speed | |
544 | * (highest bit in @modemask). | |
545 | * | |
546 | * LOCKING: | |
547 | * None. | |
548 | * | |
549 | * RETURNS: | |
550 | * Constant C string representing highest speed listed in | |
551 | * @mode_mask, or the constant C string "<n/a>". | |
552 | */ | |
553 | static const char *ata_mode_string(unsigned int xfer_mask) | |
554 | { | |
555 | static const char * const xfer_mode_str[] = { | |
556 | "PIO0", | |
557 | "PIO1", | |
558 | "PIO2", | |
559 | "PIO3", | |
560 | "PIO4", | |
561 | "PIO5", | |
562 | "PIO6", | |
563 | "MWDMA0", | |
564 | "MWDMA1", | |
565 | "MWDMA2", | |
566 | "MWDMA3", | |
567 | "MWDMA4", | |
568 | "UDMA/16", | |
569 | "UDMA/25", | |
570 | "UDMA/33", | |
571 | "UDMA/44", | |
572 | "UDMA/66", | |
573 | "UDMA/100", | |
574 | "UDMA/133", | |
575 | "UDMA7", | |
576 | }; | |
577 | int highbit; | |
578 | ||
579 | highbit = fls(xfer_mask) - 1; | |
580 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
581 | return xfer_mode_str[highbit]; | |
582 | return "<n/a>"; | |
583 | } | |
584 | ||
585 | static const char *sata_spd_string(unsigned int spd) | |
586 | { | |
587 | static const char * const spd_str[] = { | |
588 | "1.5 Gbps", | |
589 | "3.0 Gbps", | |
590 | }; | |
591 | ||
592 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
593 | return "<unknown>"; | |
594 | return spd_str[spd - 1]; | |
595 | } | |
596 | ||
597 | void ata_dev_disable(struct ata_device *dev) | |
598 | { | |
599 | if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) { | |
600 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); | |
601 | ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | | |
602 | ATA_DNXFER_QUIET); | |
603 | dev->class++; | |
604 | } | |
605 | } | |
606 | ||
607 | /** | |
608 | * ata_devchk - PATA device presence detection | |
609 | * @ap: ATA channel to examine | |
610 | * @device: Device to examine (starting at zero) | |
611 | * | |
612 | * This technique was originally described in | |
613 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
614 | * later found its way into the ATA/ATAPI spec. | |
615 | * | |
616 | * Write a pattern to the ATA shadow registers, | |
617 | * and if a device is present, it will respond by | |
618 | * correctly storing and echoing back the | |
619 | * ATA shadow register contents. | |
620 | * | |
621 | * LOCKING: | |
622 | * caller. | |
623 | */ | |
624 | ||
625 | static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) | |
626 | { | |
627 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
628 | u8 nsect, lbal; | |
629 | ||
630 | ap->ops->dev_select(ap, device); | |
631 | ||
632 | iowrite8(0x55, ioaddr->nsect_addr); | |
633 | iowrite8(0xaa, ioaddr->lbal_addr); | |
634 | ||
635 | iowrite8(0xaa, ioaddr->nsect_addr); | |
636 | iowrite8(0x55, ioaddr->lbal_addr); | |
637 | ||
638 | iowrite8(0x55, ioaddr->nsect_addr); | |
639 | iowrite8(0xaa, ioaddr->lbal_addr); | |
640 | ||
641 | nsect = ioread8(ioaddr->nsect_addr); | |
642 | lbal = ioread8(ioaddr->lbal_addr); | |
643 | ||
644 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
645 | return 1; /* we found a device */ | |
646 | ||
647 | return 0; /* nothing found */ | |
648 | } | |
649 | ||
650 | /** | |
651 | * ata_dev_classify - determine device type based on ATA-spec signature | |
652 | * @tf: ATA taskfile register set for device to be identified | |
653 | * | |
654 | * Determine from taskfile register contents whether a device is | |
655 | * ATA or ATAPI, as per "Signature and persistence" section | |
656 | * of ATA/PI spec (volume 1, sect 5.14). | |
657 | * | |
658 | * LOCKING: | |
659 | * None. | |
660 | * | |
661 | * RETURNS: | |
662 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN | |
663 | * the event of failure. | |
664 | */ | |
665 | ||
666 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) | |
667 | { | |
668 | /* Apple's open source Darwin code hints that some devices only | |
669 | * put a proper signature into the LBA mid/high registers, | |
670 | * So, we only check those. It's sufficient for uniqueness. | |
671 | */ | |
672 | ||
673 | if (((tf->lbam == 0) && (tf->lbah == 0)) || | |
674 | ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) { | |
675 | DPRINTK("found ATA device by sig\n"); | |
676 | return ATA_DEV_ATA; | |
677 | } | |
678 | ||
679 | if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) || | |
680 | ((tf->lbam == 0x69) && (tf->lbah == 0x96))) { | |
681 | DPRINTK("found ATAPI device by sig\n"); | |
682 | return ATA_DEV_ATAPI; | |
683 | } | |
684 | ||
685 | DPRINTK("unknown device\n"); | |
686 | return ATA_DEV_UNKNOWN; | |
687 | } | |
688 | ||
689 | /** | |
690 | * ata_dev_try_classify - Parse returned ATA device signature | |
691 | * @ap: ATA channel to examine | |
692 | * @device: Device to examine (starting at zero) | |
693 | * @r_err: Value of error register on completion | |
694 | * | |
695 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
696 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
697 | * shadow registers, indicating the results of device detection | |
698 | * and diagnostics. | |
699 | * | |
700 | * Select the ATA device, and read the values from the ATA shadow | |
701 | * registers. Then parse according to the Error register value, | |
702 | * and the spec-defined values examined by ata_dev_classify(). | |
703 | * | |
704 | * LOCKING: | |
705 | * caller. | |
706 | * | |
707 | * RETURNS: | |
708 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
709 | */ | |
710 | ||
711 | unsigned int | |
712 | ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err) | |
713 | { | |
714 | struct ata_taskfile tf; | |
715 | unsigned int class; | |
716 | u8 err; | |
717 | ||
718 | ap->ops->dev_select(ap, device); | |
719 | ||
720 | memset(&tf, 0, sizeof(tf)); | |
721 | ||
722 | ap->ops->tf_read(ap, &tf); | |
723 | err = tf.feature; | |
724 | if (r_err) | |
725 | *r_err = err; | |
726 | ||
727 | /* see if device passed diags: if master then continue and warn later */ | |
728 | if (err == 0 && device == 0) | |
729 | /* diagnostic fail : do nothing _YET_ */ | |
730 | ap->device[device].horkage |= ATA_HORKAGE_DIAGNOSTIC; | |
731 | else if (err == 1) | |
732 | /* do nothing */ ; | |
733 | else if ((device == 0) && (err == 0x81)) | |
734 | /* do nothing */ ; | |
735 | else | |
736 | return ATA_DEV_NONE; | |
737 | ||
738 | /* determine if device is ATA or ATAPI */ | |
739 | class = ata_dev_classify(&tf); | |
740 | ||
741 | if (class == ATA_DEV_UNKNOWN) | |
742 | return ATA_DEV_NONE; | |
743 | if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
744 | return ATA_DEV_NONE; | |
745 | return class; | |
746 | } | |
747 | ||
748 | /** | |
749 | * ata_id_string - Convert IDENTIFY DEVICE page into string | |
750 | * @id: IDENTIFY DEVICE results we will examine | |
751 | * @s: string into which data is output | |
752 | * @ofs: offset into identify device page | |
753 | * @len: length of string to return. must be an even number. | |
754 | * | |
755 | * The strings in the IDENTIFY DEVICE page are broken up into | |
756 | * 16-bit chunks. Run through the string, and output each | |
757 | * 8-bit chunk linearly, regardless of platform. | |
758 | * | |
759 | * LOCKING: | |
760 | * caller. | |
761 | */ | |
762 | ||
763 | void ata_id_string(const u16 *id, unsigned char *s, | |
764 | unsigned int ofs, unsigned int len) | |
765 | { | |
766 | unsigned int c; | |
767 | ||
768 | while (len > 0) { | |
769 | c = id[ofs] >> 8; | |
770 | *s = c; | |
771 | s++; | |
772 | ||
773 | c = id[ofs] & 0xff; | |
774 | *s = c; | |
775 | s++; | |
776 | ||
777 | ofs++; | |
778 | len -= 2; | |
779 | } | |
780 | } | |
781 | ||
782 | /** | |
783 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string | |
784 | * @id: IDENTIFY DEVICE results we will examine | |
785 | * @s: string into which data is output | |
786 | * @ofs: offset into identify device page | |
787 | * @len: length of string to return. must be an odd number. | |
788 | * | |
789 | * This function is identical to ata_id_string except that it | |
790 | * trims trailing spaces and terminates the resulting string with | |
791 | * null. @len must be actual maximum length (even number) + 1. | |
792 | * | |
793 | * LOCKING: | |
794 | * caller. | |
795 | */ | |
796 | void ata_id_c_string(const u16 *id, unsigned char *s, | |
797 | unsigned int ofs, unsigned int len) | |
798 | { | |
799 | unsigned char *p; | |
800 | ||
801 | WARN_ON(!(len & 1)); | |
802 | ||
803 | ata_id_string(id, s, ofs, len - 1); | |
804 | ||
805 | p = s + strnlen(s, len - 1); | |
806 | while (p > s && p[-1] == ' ') | |
807 | p--; | |
808 | *p = '\0'; | |
809 | } | |
810 | ||
811 | static u64 ata_id_n_sectors(const u16 *id) | |
812 | { | |
813 | if (ata_id_has_lba(id)) { | |
814 | if (ata_id_has_lba48(id)) | |
815 | return ata_id_u64(id, 100); | |
816 | else | |
817 | return ata_id_u32(id, 60); | |
818 | } else { | |
819 | if (ata_id_current_chs_valid(id)) | |
820 | return ata_id_u32(id, 57); | |
821 | else | |
822 | return id[1] * id[3] * id[6]; | |
823 | } | |
824 | } | |
825 | ||
826 | /** | |
827 | * ata_id_to_dma_mode - Identify DMA mode from id block | |
828 | * @dev: device to identify | |
829 | * @unknown: mode to assume if we cannot tell | |
830 | * | |
831 | * Set up the timing values for the device based upon the identify | |
832 | * reported values for the DMA mode. This function is used by drivers | |
833 | * which rely upon firmware configured modes, but wish to report the | |
834 | * mode correctly when possible. | |
835 | * | |
836 | * In addition we emit similarly formatted messages to the default | |
837 | * ata_dev_set_mode handler, in order to provide consistency of | |
838 | * presentation. | |
839 | */ | |
840 | ||
841 | void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) | |
842 | { | |
843 | unsigned int mask; | |
844 | u8 mode; | |
845 | ||
846 | /* Pack the DMA modes */ | |
847 | mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; | |
848 | if (dev->id[53] & 0x04) | |
849 | mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; | |
850 | ||
851 | /* Select the mode in use */ | |
852 | mode = ata_xfer_mask2mode(mask); | |
853 | ||
854 | if (mode != 0) { | |
855 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
856 | ata_mode_string(mask)); | |
857 | } else { | |
858 | /* SWDMA perhaps ? */ | |
859 | mode = unknown; | |
860 | ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); | |
861 | } | |
862 | ||
863 | /* Configure the device reporting */ | |
864 | dev->xfer_mode = mode; | |
865 | dev->xfer_shift = ata_xfer_mode2shift(mode); | |
866 | } | |
867 | ||
868 | /** | |
869 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
870 | * @ap: ATA channel to manipulate | |
871 | * @device: ATA device (numbered from zero) to select | |
872 | * | |
873 | * This function performs no actual function. | |
874 | * | |
875 | * May be used as the dev_select() entry in ata_port_operations. | |
876 | * | |
877 | * LOCKING: | |
878 | * caller. | |
879 | */ | |
880 | void ata_noop_dev_select (struct ata_port *ap, unsigned int device) | |
881 | { | |
882 | } | |
883 | ||
884 | ||
885 | /** | |
886 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
887 | * @ap: ATA channel to manipulate | |
888 | * @device: ATA device (numbered from zero) to select | |
889 | * | |
890 | * Use the method defined in the ATA specification to | |
891 | * make either device 0, or device 1, active on the | |
892 | * ATA channel. Works with both PIO and MMIO. | |
893 | * | |
894 | * May be used as the dev_select() entry in ata_port_operations. | |
895 | * | |
896 | * LOCKING: | |
897 | * caller. | |
898 | */ | |
899 | ||
900 | void ata_std_dev_select (struct ata_port *ap, unsigned int device) | |
901 | { | |
902 | u8 tmp; | |
903 | ||
904 | if (device == 0) | |
905 | tmp = ATA_DEVICE_OBS; | |
906 | else | |
907 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
908 | ||
909 | iowrite8(tmp, ap->ioaddr.device_addr); | |
910 | ata_pause(ap); /* needed; also flushes, for mmio */ | |
911 | } | |
912 | ||
913 | /** | |
914 | * ata_dev_select - Select device 0/1 on ATA bus | |
915 | * @ap: ATA channel to manipulate | |
916 | * @device: ATA device (numbered from zero) to select | |
917 | * @wait: non-zero to wait for Status register BSY bit to clear | |
918 | * @can_sleep: non-zero if context allows sleeping | |
919 | * | |
920 | * Use the method defined in the ATA specification to | |
921 | * make either device 0, or device 1, active on the | |
922 | * ATA channel. | |
923 | * | |
924 | * This is a high-level version of ata_std_dev_select(), | |
925 | * which additionally provides the services of inserting | |
926 | * the proper pauses and status polling, where needed. | |
927 | * | |
928 | * LOCKING: | |
929 | * caller. | |
930 | */ | |
931 | ||
932 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
933 | unsigned int wait, unsigned int can_sleep) | |
934 | { | |
935 | if (ata_msg_probe(ap)) | |
936 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " | |
937 | "device %u, wait %u\n", device, wait); | |
938 | ||
939 | if (wait) | |
940 | ata_wait_idle(ap); | |
941 | ||
942 | ap->ops->dev_select(ap, device); | |
943 | ||
944 | if (wait) { | |
945 | if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI) | |
946 | msleep(150); | |
947 | ata_wait_idle(ap); | |
948 | } | |
949 | } | |
950 | ||
951 | /** | |
952 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
953 | * @id: IDENTIFY DEVICE page to dump | |
954 | * | |
955 | * Dump selected 16-bit words from the given IDENTIFY DEVICE | |
956 | * page. | |
957 | * | |
958 | * LOCKING: | |
959 | * caller. | |
960 | */ | |
961 | ||
962 | static inline void ata_dump_id(const u16 *id) | |
963 | { | |
964 | DPRINTK("49==0x%04x " | |
965 | "53==0x%04x " | |
966 | "63==0x%04x " | |
967 | "64==0x%04x " | |
968 | "75==0x%04x \n", | |
969 | id[49], | |
970 | id[53], | |
971 | id[63], | |
972 | id[64], | |
973 | id[75]); | |
974 | DPRINTK("80==0x%04x " | |
975 | "81==0x%04x " | |
976 | "82==0x%04x " | |
977 | "83==0x%04x " | |
978 | "84==0x%04x \n", | |
979 | id[80], | |
980 | id[81], | |
981 | id[82], | |
982 | id[83], | |
983 | id[84]); | |
984 | DPRINTK("88==0x%04x " | |
985 | "93==0x%04x\n", | |
986 | id[88], | |
987 | id[93]); | |
988 | } | |
989 | ||
990 | /** | |
991 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
992 | * @id: IDENTIFY data to compute xfer mask from | |
993 | * | |
994 | * Compute the xfermask for this device. This is not as trivial | |
995 | * as it seems if we must consider early devices correctly. | |
996 | * | |
997 | * FIXME: pre IDE drive timing (do we care ?). | |
998 | * | |
999 | * LOCKING: | |
1000 | * None. | |
1001 | * | |
1002 | * RETURNS: | |
1003 | * Computed xfermask | |
1004 | */ | |
1005 | static unsigned int ata_id_xfermask(const u16 *id) | |
1006 | { | |
1007 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1008 | ||
1009 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1010 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1011 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1012 | pio_mask <<= 3; | |
1013 | pio_mask |= 0x7; | |
1014 | } else { | |
1015 | /* If word 64 isn't valid then Word 51 high byte holds | |
1016 | * the PIO timing number for the maximum. Turn it into | |
1017 | * a mask. | |
1018 | */ | |
1019 | u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; | |
1020 | if (mode < 5) /* Valid PIO range */ | |
1021 | pio_mask = (2 << mode) - 1; | |
1022 | else | |
1023 | pio_mask = 1; | |
1024 | ||
1025 | /* But wait.. there's more. Design your standards by | |
1026 | * committee and you too can get a free iordy field to | |
1027 | * process. However its the speeds not the modes that | |
1028 | * are supported... Note drivers using the timing API | |
1029 | * will get this right anyway | |
1030 | */ | |
1031 | } | |
1032 | ||
1033 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
1034 | ||
1035 | if (ata_id_is_cfa(id)) { | |
1036 | /* | |
1037 | * Process compact flash extended modes | |
1038 | */ | |
1039 | int pio = id[163] & 0x7; | |
1040 | int dma = (id[163] >> 3) & 7; | |
1041 | ||
1042 | if (pio) | |
1043 | pio_mask |= (1 << 5); | |
1044 | if (pio > 1) | |
1045 | pio_mask |= (1 << 6); | |
1046 | if (dma) | |
1047 | mwdma_mask |= (1 << 3); | |
1048 | if (dma > 1) | |
1049 | mwdma_mask |= (1 << 4); | |
1050 | } | |
1051 | ||
1052 | udma_mask = 0; | |
1053 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1054 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
1055 | ||
1056 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1057 | } | |
1058 | ||
1059 | /** | |
1060 | * ata_port_queue_task - Queue port_task | |
1061 | * @ap: The ata_port to queue port_task for | |
1062 | * @fn: workqueue function to be scheduled | |
1063 | * @data: data for @fn to use | |
1064 | * @delay: delay time for workqueue function | |
1065 | * | |
1066 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1067 | * port_task. There is one port_task per port and it's the | |
1068 | * user(low level driver)'s responsibility to make sure that only | |
1069 | * one task is active at any given time. | |
1070 | * | |
1071 | * libata core layer takes care of synchronization between | |
1072 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1073 | * synchronization. | |
1074 | * | |
1075 | * LOCKING: | |
1076 | * Inherited from caller. | |
1077 | */ | |
1078 | void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, | |
1079 | unsigned long delay) | |
1080 | { | |
1081 | int rc; | |
1082 | ||
1083 | if (ap->pflags & ATA_PFLAG_FLUSH_PORT_TASK) | |
1084 | return; | |
1085 | ||
1086 | PREPARE_DELAYED_WORK(&ap->port_task, fn); | |
1087 | ap->port_task_data = data; | |
1088 | ||
1089 | rc = queue_delayed_work(ata_wq, &ap->port_task, delay); | |
1090 | ||
1091 | /* rc == 0 means that another user is using port task */ | |
1092 | WARN_ON(rc == 0); | |
1093 | } | |
1094 | ||
1095 | /** | |
1096 | * ata_port_flush_task - Flush port_task | |
1097 | * @ap: The ata_port to flush port_task for | |
1098 | * | |
1099 | * After this function completes, port_task is guranteed not to | |
1100 | * be running or scheduled. | |
1101 | * | |
1102 | * LOCKING: | |
1103 | * Kernel thread context (may sleep) | |
1104 | */ | |
1105 | void ata_port_flush_task(struct ata_port *ap) | |
1106 | { | |
1107 | unsigned long flags; | |
1108 | ||
1109 | DPRINTK("ENTER\n"); | |
1110 | ||
1111 | spin_lock_irqsave(ap->lock, flags); | |
1112 | ap->pflags |= ATA_PFLAG_FLUSH_PORT_TASK; | |
1113 | spin_unlock_irqrestore(ap->lock, flags); | |
1114 | ||
1115 | DPRINTK("flush #1\n"); | |
1116 | flush_workqueue(ata_wq); | |
1117 | ||
1118 | /* | |
1119 | * At this point, if a task is running, it's guaranteed to see | |
1120 | * the FLUSH flag; thus, it will never queue pio tasks again. | |
1121 | * Cancel and flush. | |
1122 | */ | |
1123 | if (!cancel_delayed_work(&ap->port_task)) { | |
1124 | if (ata_msg_ctl(ap)) | |
1125 | ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", | |
1126 | __FUNCTION__); | |
1127 | flush_workqueue(ata_wq); | |
1128 | } | |
1129 | ||
1130 | spin_lock_irqsave(ap->lock, flags); | |
1131 | ap->pflags &= ~ATA_PFLAG_FLUSH_PORT_TASK; | |
1132 | spin_unlock_irqrestore(ap->lock, flags); | |
1133 | ||
1134 | if (ata_msg_ctl(ap)) | |
1135 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
1136 | } | |
1137 | ||
1138 | static void ata_qc_complete_internal(struct ata_queued_cmd *qc) | |
1139 | { | |
1140 | struct completion *waiting = qc->private_data; | |
1141 | ||
1142 | complete(waiting); | |
1143 | } | |
1144 | ||
1145 | /** | |
1146 | * ata_exec_internal_sg - execute libata internal command | |
1147 | * @dev: Device to which the command is sent | |
1148 | * @tf: Taskfile registers for the command and the result | |
1149 | * @cdb: CDB for packet command | |
1150 | * @dma_dir: Data tranfer direction of the command | |
1151 | * @sg: sg list for the data buffer of the command | |
1152 | * @n_elem: Number of sg entries | |
1153 | * | |
1154 | * Executes libata internal command with timeout. @tf contains | |
1155 | * command on entry and result on return. Timeout and error | |
1156 | * conditions are reported via return value. No recovery action | |
1157 | * is taken after a command times out. It's caller's duty to | |
1158 | * clean up after timeout. | |
1159 | * | |
1160 | * LOCKING: | |
1161 | * None. Should be called with kernel context, might sleep. | |
1162 | * | |
1163 | * RETURNS: | |
1164 | * Zero on success, AC_ERR_* mask on failure | |
1165 | */ | |
1166 | unsigned ata_exec_internal_sg(struct ata_device *dev, | |
1167 | struct ata_taskfile *tf, const u8 *cdb, | |
1168 | int dma_dir, struct scatterlist *sg, | |
1169 | unsigned int n_elem) | |
1170 | { | |
1171 | struct ata_port *ap = dev->ap; | |
1172 | u8 command = tf->command; | |
1173 | struct ata_queued_cmd *qc; | |
1174 | unsigned int tag, preempted_tag; | |
1175 | u32 preempted_sactive, preempted_qc_active; | |
1176 | DECLARE_COMPLETION_ONSTACK(wait); | |
1177 | unsigned long flags; | |
1178 | unsigned int err_mask; | |
1179 | int rc; | |
1180 | ||
1181 | spin_lock_irqsave(ap->lock, flags); | |
1182 | ||
1183 | /* no internal command while frozen */ | |
1184 | if (ap->pflags & ATA_PFLAG_FROZEN) { | |
1185 | spin_unlock_irqrestore(ap->lock, flags); | |
1186 | return AC_ERR_SYSTEM; | |
1187 | } | |
1188 | ||
1189 | /* initialize internal qc */ | |
1190 | ||
1191 | /* XXX: Tag 0 is used for drivers with legacy EH as some | |
1192 | * drivers choke if any other tag is given. This breaks | |
1193 | * ata_tag_internal() test for those drivers. Don't use new | |
1194 | * EH stuff without converting to it. | |
1195 | */ | |
1196 | if (ap->ops->error_handler) | |
1197 | tag = ATA_TAG_INTERNAL; | |
1198 | else | |
1199 | tag = 0; | |
1200 | ||
1201 | if (test_and_set_bit(tag, &ap->qc_allocated)) | |
1202 | BUG(); | |
1203 | qc = __ata_qc_from_tag(ap, tag); | |
1204 | ||
1205 | qc->tag = tag; | |
1206 | qc->scsicmd = NULL; | |
1207 | qc->ap = ap; | |
1208 | qc->dev = dev; | |
1209 | ata_qc_reinit(qc); | |
1210 | ||
1211 | preempted_tag = ap->active_tag; | |
1212 | preempted_sactive = ap->sactive; | |
1213 | preempted_qc_active = ap->qc_active; | |
1214 | ap->active_tag = ATA_TAG_POISON; | |
1215 | ap->sactive = 0; | |
1216 | ap->qc_active = 0; | |
1217 | ||
1218 | /* prepare & issue qc */ | |
1219 | qc->tf = *tf; | |
1220 | if (cdb) | |
1221 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
1222 | qc->flags |= ATA_QCFLAG_RESULT_TF; | |
1223 | qc->dma_dir = dma_dir; | |
1224 | if (dma_dir != DMA_NONE) { | |
1225 | unsigned int i, buflen = 0; | |
1226 | ||
1227 | for (i = 0; i < n_elem; i++) | |
1228 | buflen += sg[i].length; | |
1229 | ||
1230 | ata_sg_init(qc, sg, n_elem); | |
1231 | qc->nbytes = buflen; | |
1232 | } | |
1233 | ||
1234 | qc->private_data = &wait; | |
1235 | qc->complete_fn = ata_qc_complete_internal; | |
1236 | ||
1237 | ata_qc_issue(qc); | |
1238 | ||
1239 | spin_unlock_irqrestore(ap->lock, flags); | |
1240 | ||
1241 | rc = wait_for_completion_timeout(&wait, ata_probe_timeout); | |
1242 | ||
1243 | ata_port_flush_task(ap); | |
1244 | ||
1245 | if (!rc) { | |
1246 | spin_lock_irqsave(ap->lock, flags); | |
1247 | ||
1248 | /* We're racing with irq here. If we lose, the | |
1249 | * following test prevents us from completing the qc | |
1250 | * twice. If we win, the port is frozen and will be | |
1251 | * cleaned up by ->post_internal_cmd(). | |
1252 | */ | |
1253 | if (qc->flags & ATA_QCFLAG_ACTIVE) { | |
1254 | qc->err_mask |= AC_ERR_TIMEOUT; | |
1255 | ||
1256 | if (ap->ops->error_handler) | |
1257 | ata_port_freeze(ap); | |
1258 | else | |
1259 | ata_qc_complete(qc); | |
1260 | ||
1261 | if (ata_msg_warn(ap)) | |
1262 | ata_dev_printk(dev, KERN_WARNING, | |
1263 | "qc timeout (cmd 0x%x)\n", command); | |
1264 | } | |
1265 | ||
1266 | spin_unlock_irqrestore(ap->lock, flags); | |
1267 | } | |
1268 | ||
1269 | /* do post_internal_cmd */ | |
1270 | if (ap->ops->post_internal_cmd) | |
1271 | ap->ops->post_internal_cmd(qc); | |
1272 | ||
1273 | if ((qc->flags & ATA_QCFLAG_FAILED) && !qc->err_mask) { | |
1274 | if (ata_msg_warn(ap)) | |
1275 | ata_dev_printk(dev, KERN_WARNING, | |
1276 | "zero err_mask for failed " | |
1277 | "internal command, assuming AC_ERR_OTHER\n"); | |
1278 | qc->err_mask |= AC_ERR_OTHER; | |
1279 | } | |
1280 | ||
1281 | /* finish up */ | |
1282 | spin_lock_irqsave(ap->lock, flags); | |
1283 | ||
1284 | *tf = qc->result_tf; | |
1285 | err_mask = qc->err_mask; | |
1286 | ||
1287 | ata_qc_free(qc); | |
1288 | ap->active_tag = preempted_tag; | |
1289 | ap->sactive = preempted_sactive; | |
1290 | ap->qc_active = preempted_qc_active; | |
1291 | ||
1292 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. | |
1293 | * Until those drivers are fixed, we detect the condition | |
1294 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1295 | * port. | |
1296 | * | |
1297 | * Note that this doesn't change any behavior as internal | |
1298 | * command failure results in disabling the device in the | |
1299 | * higher layer for LLDDs without new reset/EH callbacks. | |
1300 | * | |
1301 | * Kill the following code as soon as those drivers are fixed. | |
1302 | */ | |
1303 | if (ap->flags & ATA_FLAG_DISABLED) { | |
1304 | err_mask |= AC_ERR_SYSTEM; | |
1305 | ata_port_probe(ap); | |
1306 | } | |
1307 | ||
1308 | spin_unlock_irqrestore(ap->lock, flags); | |
1309 | ||
1310 | return err_mask; | |
1311 | } | |
1312 | ||
1313 | /** | |
1314 | * ata_exec_internal - execute libata internal command | |
1315 | * @dev: Device to which the command is sent | |
1316 | * @tf: Taskfile registers for the command and the result | |
1317 | * @cdb: CDB for packet command | |
1318 | * @dma_dir: Data tranfer direction of the command | |
1319 | * @buf: Data buffer of the command | |
1320 | * @buflen: Length of data buffer | |
1321 | * | |
1322 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1323 | * buffer instead of sg list. | |
1324 | * | |
1325 | * LOCKING: | |
1326 | * None. Should be called with kernel context, might sleep. | |
1327 | * | |
1328 | * RETURNS: | |
1329 | * Zero on success, AC_ERR_* mask on failure | |
1330 | */ | |
1331 | unsigned ata_exec_internal(struct ata_device *dev, | |
1332 | struct ata_taskfile *tf, const u8 *cdb, | |
1333 | int dma_dir, void *buf, unsigned int buflen) | |
1334 | { | |
1335 | struct scatterlist *psg = NULL, sg; | |
1336 | unsigned int n_elem = 0; | |
1337 | ||
1338 | if (dma_dir != DMA_NONE) { | |
1339 | WARN_ON(!buf); | |
1340 | sg_init_one(&sg, buf, buflen); | |
1341 | psg = &sg; | |
1342 | n_elem++; | |
1343 | } | |
1344 | ||
1345 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem); | |
1346 | } | |
1347 | ||
1348 | /** | |
1349 | * ata_do_simple_cmd - execute simple internal command | |
1350 | * @dev: Device to which the command is sent | |
1351 | * @cmd: Opcode to execute | |
1352 | * | |
1353 | * Execute a 'simple' command, that only consists of the opcode | |
1354 | * 'cmd' itself, without filling any other registers | |
1355 | * | |
1356 | * LOCKING: | |
1357 | * Kernel thread context (may sleep). | |
1358 | * | |
1359 | * RETURNS: | |
1360 | * Zero on success, AC_ERR_* mask on failure | |
1361 | */ | |
1362 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) | |
1363 | { | |
1364 | struct ata_taskfile tf; | |
1365 | ||
1366 | ata_tf_init(dev, &tf); | |
1367 | ||
1368 | tf.command = cmd; | |
1369 | tf.flags |= ATA_TFLAG_DEVICE; | |
1370 | tf.protocol = ATA_PROT_NODATA; | |
1371 | ||
1372 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
1373 | } | |
1374 | ||
1375 | /** | |
1376 | * ata_pio_need_iordy - check if iordy needed | |
1377 | * @adev: ATA device | |
1378 | * | |
1379 | * Check if the current speed of the device requires IORDY. Used | |
1380 | * by various controllers for chip configuration. | |
1381 | */ | |
1382 | ||
1383 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) | |
1384 | { | |
1385 | int pio; | |
1386 | int speed = adev->pio_mode - XFER_PIO_0; | |
1387 | ||
1388 | if (speed < 2) | |
1389 | return 0; | |
1390 | if (speed > 2) | |
1391 | return 1; | |
1392 | ||
1393 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ | |
1394 | ||
1395 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ | |
1396 | pio = adev->id[ATA_ID_EIDE_PIO]; | |
1397 | /* Is the speed faster than the drive allows non IORDY ? */ | |
1398 | if (pio) { | |
1399 | /* This is cycle times not frequency - watch the logic! */ | |
1400 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
1401 | return 1; | |
1402 | return 0; | |
1403 | } | |
1404 | } | |
1405 | return 0; | |
1406 | } | |
1407 | ||
1408 | /** | |
1409 | * ata_dev_read_id - Read ID data from the specified device | |
1410 | * @dev: target device | |
1411 | * @p_class: pointer to class of the target device (may be changed) | |
1412 | * @flags: ATA_READID_* flags | |
1413 | * @id: buffer to read IDENTIFY data into | |
1414 | * | |
1415 | * Read ID data from the specified device. ATA_CMD_ID_ATA is | |
1416 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
1417 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS | |
1418 | * for pre-ATA4 drives. | |
1419 | * | |
1420 | * LOCKING: | |
1421 | * Kernel thread context (may sleep) | |
1422 | * | |
1423 | * RETURNS: | |
1424 | * 0 on success, -errno otherwise. | |
1425 | */ | |
1426 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, | |
1427 | unsigned int flags, u16 *id) | |
1428 | { | |
1429 | struct ata_port *ap = dev->ap; | |
1430 | unsigned int class = *p_class; | |
1431 | struct ata_taskfile tf; | |
1432 | unsigned int err_mask = 0; | |
1433 | const char *reason; | |
1434 | int rc; | |
1435 | ||
1436 | if (ata_msg_ctl(ap)) | |
1437 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); | |
1438 | ||
1439 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ | |
1440 | ||
1441 | retry: | |
1442 | ata_tf_init(dev, &tf); | |
1443 | ||
1444 | switch (class) { | |
1445 | case ATA_DEV_ATA: | |
1446 | tf.command = ATA_CMD_ID_ATA; | |
1447 | break; | |
1448 | case ATA_DEV_ATAPI: | |
1449 | tf.command = ATA_CMD_ID_ATAPI; | |
1450 | break; | |
1451 | default: | |
1452 | rc = -ENODEV; | |
1453 | reason = "unsupported class"; | |
1454 | goto err_out; | |
1455 | } | |
1456 | ||
1457 | tf.protocol = ATA_PROT_PIO; | |
1458 | ||
1459 | /* Some devices choke if TF registers contain garbage. Make | |
1460 | * sure those are properly initialized. | |
1461 | */ | |
1462 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
1463 | ||
1464 | /* Device presence detection is unreliable on some | |
1465 | * controllers. Always poll IDENTIFY if available. | |
1466 | */ | |
1467 | tf.flags |= ATA_TFLAG_POLLING; | |
1468 | ||
1469 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, | |
1470 | id, sizeof(id[0]) * ATA_ID_WORDS); | |
1471 | if (err_mask) { | |
1472 | if (err_mask & AC_ERR_NODEV_HINT) { | |
1473 | DPRINTK("ata%u.%d: NODEV after polling detection\n", | |
1474 | ap->print_id, dev->devno); | |
1475 | return -ENOENT; | |
1476 | } | |
1477 | ||
1478 | rc = -EIO; | |
1479 | reason = "I/O error"; | |
1480 | goto err_out; | |
1481 | } | |
1482 | ||
1483 | swap_buf_le16(id, ATA_ID_WORDS); | |
1484 | ||
1485 | /* sanity check */ | |
1486 | rc = -EINVAL; | |
1487 | reason = "device reports illegal type"; | |
1488 | ||
1489 | if (class == ATA_DEV_ATA) { | |
1490 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1491 | goto err_out; | |
1492 | } else { | |
1493 | if (ata_id_is_ata(id)) | |
1494 | goto err_out; | |
1495 | } | |
1496 | ||
1497 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { | |
1498 | /* | |
1499 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1500 | * SRST RESET | |
1501 | * IDENTIFY | |
1502 | * INITIALIZE DEVICE PARAMETERS | |
1503 | * anything else.. | |
1504 | * Some drives were very specific about that exact sequence. | |
1505 | */ | |
1506 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
1507 | err_mask = ata_dev_init_params(dev, id[3], id[6]); | |
1508 | if (err_mask) { | |
1509 | rc = -EIO; | |
1510 | reason = "INIT_DEV_PARAMS failed"; | |
1511 | goto err_out; | |
1512 | } | |
1513 | ||
1514 | /* current CHS translation info (id[53-58]) might be | |
1515 | * changed. reread the identify device info. | |
1516 | */ | |
1517 | flags &= ~ATA_READID_POSTRESET; | |
1518 | goto retry; | |
1519 | } | |
1520 | } | |
1521 | ||
1522 | *p_class = class; | |
1523 | ||
1524 | return 0; | |
1525 | ||
1526 | err_out: | |
1527 | if (ata_msg_warn(ap)) | |
1528 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " | |
1529 | "(%s, err_mask=0x%x)\n", reason, err_mask); | |
1530 | return rc; | |
1531 | } | |
1532 | ||
1533 | static inline u8 ata_dev_knobble(struct ata_device *dev) | |
1534 | { | |
1535 | return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | |
1536 | } | |
1537 | ||
1538 | static void ata_dev_config_ncq(struct ata_device *dev, | |
1539 | char *desc, size_t desc_sz) | |
1540 | { | |
1541 | struct ata_port *ap = dev->ap; | |
1542 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); | |
1543 | ||
1544 | if (!ata_id_has_ncq(dev->id)) { | |
1545 | desc[0] = '\0'; | |
1546 | return; | |
1547 | } | |
1548 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_NONCQ) { | |
1549 | snprintf(desc, desc_sz, "NCQ (not used)"); | |
1550 | return; | |
1551 | } | |
1552 | if (ap->flags & ATA_FLAG_NCQ) { | |
1553 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); | |
1554 | dev->flags |= ATA_DFLAG_NCQ; | |
1555 | } | |
1556 | ||
1557 | if (hdepth >= ddepth) | |
1558 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
1559 | else | |
1560 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
1561 | } | |
1562 | ||
1563 | static void ata_set_port_max_cmd_len(struct ata_port *ap) | |
1564 | { | |
1565 | int i; | |
1566 | ||
1567 | if (ap->scsi_host) { | |
1568 | unsigned int len = 0; | |
1569 | ||
1570 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1571 | len = max(len, ap->device[i].cdb_len); | |
1572 | ||
1573 | ap->scsi_host->max_cmd_len = len; | |
1574 | } | |
1575 | } | |
1576 | ||
1577 | /** | |
1578 | * ata_dev_configure - Configure the specified ATA/ATAPI device | |
1579 | * @dev: Target device to configure | |
1580 | * | |
1581 | * Configure @dev according to @dev->id. Generic and low-level | |
1582 | * driver specific fixups are also applied. | |
1583 | * | |
1584 | * LOCKING: | |
1585 | * Kernel thread context (may sleep) | |
1586 | * | |
1587 | * RETURNS: | |
1588 | * 0 on success, -errno otherwise | |
1589 | */ | |
1590 | int ata_dev_configure(struct ata_device *dev) | |
1591 | { | |
1592 | struct ata_port *ap = dev->ap; | |
1593 | int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO; | |
1594 | const u16 *id = dev->id; | |
1595 | unsigned int xfer_mask; | |
1596 | char revbuf[7]; /* XYZ-99\0 */ | |
1597 | char fwrevbuf[ATA_ID_FW_REV_LEN+1]; | |
1598 | char modelbuf[ATA_ID_PROD_LEN+1]; | |
1599 | int rc; | |
1600 | ||
1601 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { | |
1602 | ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", | |
1603 | __FUNCTION__); | |
1604 | return 0; | |
1605 | } | |
1606 | ||
1607 | if (ata_msg_probe(ap)) | |
1608 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); | |
1609 | ||
1610 | /* set _SDD */ | |
1611 | rc = ata_acpi_push_id(ap, dev->devno); | |
1612 | if (rc) { | |
1613 | ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n", | |
1614 | rc); | |
1615 | } | |
1616 | ||
1617 | /* retrieve and execute the ATA task file of _GTF */ | |
1618 | ata_acpi_exec_tfs(ap); | |
1619 | ||
1620 | /* print device capabilities */ | |
1621 | if (ata_msg_probe(ap)) | |
1622 | ata_dev_printk(dev, KERN_DEBUG, | |
1623 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
1624 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
1625 | __FUNCTION__, | |
1626 | id[49], id[82], id[83], id[84], | |
1627 | id[85], id[86], id[87], id[88]); | |
1628 | ||
1629 | /* initialize to-be-configured parameters */ | |
1630 | dev->flags &= ~ATA_DFLAG_CFG_MASK; | |
1631 | dev->max_sectors = 0; | |
1632 | dev->cdb_len = 0; | |
1633 | dev->n_sectors = 0; | |
1634 | dev->cylinders = 0; | |
1635 | dev->heads = 0; | |
1636 | dev->sectors = 0; | |
1637 | ||
1638 | /* | |
1639 | * common ATA, ATAPI feature tests | |
1640 | */ | |
1641 | ||
1642 | /* find max transfer mode; for printk only */ | |
1643 | xfer_mask = ata_id_xfermask(id); | |
1644 | ||
1645 | if (ata_msg_probe(ap)) | |
1646 | ata_dump_id(id); | |
1647 | ||
1648 | /* ATA-specific feature tests */ | |
1649 | if (dev->class == ATA_DEV_ATA) { | |
1650 | if (ata_id_is_cfa(id)) { | |
1651 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
1652 | ata_dev_printk(dev, KERN_WARNING, | |
1653 | "supports DRM functions and may " | |
1654 | "not be fully accessable.\n"); | |
1655 | snprintf(revbuf, 7, "CFA"); | |
1656 | } | |
1657 | else | |
1658 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
1659 | ||
1660 | dev->n_sectors = ata_id_n_sectors(id); | |
1661 | ||
1662 | /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ | |
1663 | ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, | |
1664 | sizeof(fwrevbuf)); | |
1665 | ||
1666 | ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, | |
1667 | sizeof(modelbuf)); | |
1668 | ||
1669 | if (dev->id[59] & 0x100) | |
1670 | dev->multi_count = dev->id[59] & 0xff; | |
1671 | ||
1672 | if (ata_id_has_lba(id)) { | |
1673 | const char *lba_desc; | |
1674 | char ncq_desc[20]; | |
1675 | ||
1676 | lba_desc = "LBA"; | |
1677 | dev->flags |= ATA_DFLAG_LBA; | |
1678 | if (ata_id_has_lba48(id)) { | |
1679 | dev->flags |= ATA_DFLAG_LBA48; | |
1680 | lba_desc = "LBA48"; | |
1681 | ||
1682 | if (dev->n_sectors >= (1UL << 28) && | |
1683 | ata_id_has_flush_ext(id)) | |
1684 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
1685 | } | |
1686 | ||
1687 | /* config NCQ */ | |
1688 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
1689 | ||
1690 | /* print device info to dmesg */ | |
1691 | if (ata_msg_drv(ap) && print_info) { | |
1692 | ata_dev_printk(dev, KERN_INFO, | |
1693 | "%s: %s, %s, max %s\n", | |
1694 | revbuf, modelbuf, fwrevbuf, | |
1695 | ata_mode_string(xfer_mask)); | |
1696 | ata_dev_printk(dev, KERN_INFO, | |
1697 | "%Lu sectors, multi %u: %s %s\n", | |
1698 | (unsigned long long)dev->n_sectors, | |
1699 | dev->multi_count, lba_desc, ncq_desc); | |
1700 | } | |
1701 | } else { | |
1702 | /* CHS */ | |
1703 | ||
1704 | /* Default translation */ | |
1705 | dev->cylinders = id[1]; | |
1706 | dev->heads = id[3]; | |
1707 | dev->sectors = id[6]; | |
1708 | ||
1709 | if (ata_id_current_chs_valid(id)) { | |
1710 | /* Current CHS translation is valid. */ | |
1711 | dev->cylinders = id[54]; | |
1712 | dev->heads = id[55]; | |
1713 | dev->sectors = id[56]; | |
1714 | } | |
1715 | ||
1716 | /* print device info to dmesg */ | |
1717 | if (ata_msg_drv(ap) && print_info) { | |
1718 | ata_dev_printk(dev, KERN_INFO, | |
1719 | "%s: %s, %s, max %s\n", | |
1720 | revbuf, modelbuf, fwrevbuf, | |
1721 | ata_mode_string(xfer_mask)); | |
1722 | ata_dev_printk(dev, KERN_INFO, | |
1723 | "%Lu sectors, multi %u, CHS %u/%u/%u\n", | |
1724 | (unsigned long long)dev->n_sectors, | |
1725 | dev->multi_count, dev->cylinders, | |
1726 | dev->heads, dev->sectors); | |
1727 | } | |
1728 | } | |
1729 | ||
1730 | dev->cdb_len = 16; | |
1731 | } | |
1732 | ||
1733 | /* ATAPI-specific feature tests */ | |
1734 | else if (dev->class == ATA_DEV_ATAPI) { | |
1735 | char *cdb_intr_string = ""; | |
1736 | ||
1737 | rc = atapi_cdb_len(id); | |
1738 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { | |
1739 | if (ata_msg_warn(ap)) | |
1740 | ata_dev_printk(dev, KERN_WARNING, | |
1741 | "unsupported CDB len\n"); | |
1742 | rc = -EINVAL; | |
1743 | goto err_out_nosup; | |
1744 | } | |
1745 | dev->cdb_len = (unsigned int) rc; | |
1746 | ||
1747 | if (ata_id_cdb_intr(dev->id)) { | |
1748 | dev->flags |= ATA_DFLAG_CDB_INTR; | |
1749 | cdb_intr_string = ", CDB intr"; | |
1750 | } | |
1751 | ||
1752 | /* print device info to dmesg */ | |
1753 | if (ata_msg_drv(ap) && print_info) | |
1754 | ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n", | |
1755 | ata_mode_string(xfer_mask), | |
1756 | cdb_intr_string); | |
1757 | } | |
1758 | ||
1759 | /* determine max_sectors */ | |
1760 | dev->max_sectors = ATA_MAX_SECTORS; | |
1761 | if (dev->flags & ATA_DFLAG_LBA48) | |
1762 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
1763 | ||
1764 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { | |
1765 | /* Let the user know. We don't want to disallow opens for | |
1766 | rescue purposes, or in case the vendor is just a blithering | |
1767 | idiot */ | |
1768 | if (print_info) { | |
1769 | ata_dev_printk(dev, KERN_WARNING, | |
1770 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
1771 | ata_dev_printk(dev, KERN_WARNING, | |
1772 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
1773 | } | |
1774 | } | |
1775 | ||
1776 | ata_set_port_max_cmd_len(ap); | |
1777 | ||
1778 | /* limit bridge transfers to udma5, 200 sectors */ | |
1779 | if (ata_dev_knobble(dev)) { | |
1780 | if (ata_msg_drv(ap) && print_info) | |
1781 | ata_dev_printk(dev, KERN_INFO, | |
1782 | "applying bridge limits\n"); | |
1783 | dev->udma_mask &= ATA_UDMA5; | |
1784 | dev->max_sectors = ATA_MAX_SECTORS; | |
1785 | } | |
1786 | ||
1787 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_MAX_SEC_128) | |
1788 | dev->max_sectors = min(ATA_MAX_SECTORS_128, dev->max_sectors); | |
1789 | ||
1790 | /* limit ATAPI DMA to R/W commands only */ | |
1791 | if (ata_device_blacklisted(dev) & ATA_HORKAGE_DMA_RW_ONLY) | |
1792 | dev->horkage |= ATA_HORKAGE_DMA_RW_ONLY; | |
1793 | ||
1794 | if (ap->ops->dev_config) | |
1795 | ap->ops->dev_config(ap, dev); | |
1796 | ||
1797 | if (ata_msg_probe(ap)) | |
1798 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
1799 | __FUNCTION__, ata_chk_status(ap)); | |
1800 | return 0; | |
1801 | ||
1802 | err_out_nosup: | |
1803 | if (ata_msg_probe(ap)) | |
1804 | ata_dev_printk(dev, KERN_DEBUG, | |
1805 | "%s: EXIT, err\n", __FUNCTION__); | |
1806 | return rc; | |
1807 | } | |
1808 | ||
1809 | /** | |
1810 | * ata_bus_probe - Reset and probe ATA bus | |
1811 | * @ap: Bus to probe | |
1812 | * | |
1813 | * Master ATA bus probing function. Initiates a hardware-dependent | |
1814 | * bus reset, then attempts to identify any devices found on | |
1815 | * the bus. | |
1816 | * | |
1817 | * LOCKING: | |
1818 | * PCI/etc. bus probe sem. | |
1819 | * | |
1820 | * RETURNS: | |
1821 | * Zero on success, negative errno otherwise. | |
1822 | */ | |
1823 | ||
1824 | int ata_bus_probe(struct ata_port *ap) | |
1825 | { | |
1826 | unsigned int classes[ATA_MAX_DEVICES]; | |
1827 | int tries[ATA_MAX_DEVICES]; | |
1828 | int i, rc; | |
1829 | struct ata_device *dev; | |
1830 | ||
1831 | ata_port_probe(ap); | |
1832 | ||
1833 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1834 | tries[i] = ATA_PROBE_MAX_TRIES; | |
1835 | ||
1836 | retry: | |
1837 | /* reset and determine device classes */ | |
1838 | ap->ops->phy_reset(ap); | |
1839 | ||
1840 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
1841 | dev = &ap->device[i]; | |
1842 | ||
1843 | if (!(ap->flags & ATA_FLAG_DISABLED) && | |
1844 | dev->class != ATA_DEV_UNKNOWN) | |
1845 | classes[dev->devno] = dev->class; | |
1846 | else | |
1847 | classes[dev->devno] = ATA_DEV_NONE; | |
1848 | ||
1849 | dev->class = ATA_DEV_UNKNOWN; | |
1850 | } | |
1851 | ||
1852 | ata_port_probe(ap); | |
1853 | ||
1854 | /* after the reset the device state is PIO 0 and the controller | |
1855 | state is undefined. Record the mode */ | |
1856 | ||
1857 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1858 | ap->device[i].pio_mode = XFER_PIO_0; | |
1859 | ||
1860 | /* read IDENTIFY page and configure devices. We have to do the identify | |
1861 | specific sequence bass-ackwards so that PDIAG- is released by | |
1862 | the slave device */ | |
1863 | ||
1864 | for (i = ATA_MAX_DEVICES - 1; i >= 0; i--) { | |
1865 | dev = &ap->device[i]; | |
1866 | ||
1867 | if (tries[i]) | |
1868 | dev->class = classes[i]; | |
1869 | ||
1870 | if (!ata_dev_enabled(dev)) | |
1871 | continue; | |
1872 | ||
1873 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, | |
1874 | dev->id); | |
1875 | if (rc) | |
1876 | goto fail; | |
1877 | } | |
1878 | ||
1879 | /* After the identify sequence we can now set up the devices. We do | |
1880 | this in the normal order so that the user doesn't get confused */ | |
1881 | ||
1882 | for(i = 0; i < ATA_MAX_DEVICES; i++) { | |
1883 | dev = &ap->device[i]; | |
1884 | if (!ata_dev_enabled(dev)) | |
1885 | continue; | |
1886 | ||
1887 | ap->eh_context.i.flags |= ATA_EHI_PRINTINFO; | |
1888 | rc = ata_dev_configure(dev); | |
1889 | ap->eh_context.i.flags &= ~ATA_EHI_PRINTINFO; | |
1890 | if (rc) | |
1891 | goto fail; | |
1892 | } | |
1893 | ||
1894 | /* configure transfer mode */ | |
1895 | rc = ata_set_mode(ap, &dev); | |
1896 | if (rc) | |
1897 | goto fail; | |
1898 | ||
1899 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
1900 | if (ata_dev_enabled(&ap->device[i])) | |
1901 | return 0; | |
1902 | ||
1903 | /* no device present, disable port */ | |
1904 | ata_port_disable(ap); | |
1905 | ap->ops->port_disable(ap); | |
1906 | return -ENODEV; | |
1907 | ||
1908 | fail: | |
1909 | tries[dev->devno]--; | |
1910 | ||
1911 | switch (rc) { | |
1912 | case -EINVAL: | |
1913 | /* eeek, something went very wrong, give up */ | |
1914 | tries[dev->devno] = 0; | |
1915 | break; | |
1916 | ||
1917 | case -ENODEV: | |
1918 | /* give it just one more chance */ | |
1919 | tries[dev->devno] = min(tries[dev->devno], 1); | |
1920 | case -EIO: | |
1921 | if (tries[dev->devno] == 1) { | |
1922 | /* This is the last chance, better to slow | |
1923 | * down than lose it. | |
1924 | */ | |
1925 | sata_down_spd_limit(ap); | |
1926 | ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); | |
1927 | } | |
1928 | } | |
1929 | ||
1930 | if (!tries[dev->devno]) | |
1931 | ata_dev_disable(dev); | |
1932 | ||
1933 | goto retry; | |
1934 | } | |
1935 | ||
1936 | /** | |
1937 | * ata_port_probe - Mark port as enabled | |
1938 | * @ap: Port for which we indicate enablement | |
1939 | * | |
1940 | * Modify @ap data structure such that the system | |
1941 | * thinks that the entire port is enabled. | |
1942 | * | |
1943 | * LOCKING: host lock, or some other form of | |
1944 | * serialization. | |
1945 | */ | |
1946 | ||
1947 | void ata_port_probe(struct ata_port *ap) | |
1948 | { | |
1949 | ap->flags &= ~ATA_FLAG_DISABLED; | |
1950 | } | |
1951 | ||
1952 | /** | |
1953 | * sata_print_link_status - Print SATA link status | |
1954 | * @ap: SATA port to printk link status about | |
1955 | * | |
1956 | * This function prints link speed and status of a SATA link. | |
1957 | * | |
1958 | * LOCKING: | |
1959 | * None. | |
1960 | */ | |
1961 | static void sata_print_link_status(struct ata_port *ap) | |
1962 | { | |
1963 | u32 sstatus, scontrol, tmp; | |
1964 | ||
1965 | if (sata_scr_read(ap, SCR_STATUS, &sstatus)) | |
1966 | return; | |
1967 | sata_scr_read(ap, SCR_CONTROL, &scontrol); | |
1968 | ||
1969 | if (ata_port_online(ap)) { | |
1970 | tmp = (sstatus >> 4) & 0xf; | |
1971 | ata_port_printk(ap, KERN_INFO, | |
1972 | "SATA link up %s (SStatus %X SControl %X)\n", | |
1973 | sata_spd_string(tmp), sstatus, scontrol); | |
1974 | } else { | |
1975 | ata_port_printk(ap, KERN_INFO, | |
1976 | "SATA link down (SStatus %X SControl %X)\n", | |
1977 | sstatus, scontrol); | |
1978 | } | |
1979 | } | |
1980 | ||
1981 | /** | |
1982 | * __sata_phy_reset - Wake/reset a low-level SATA PHY | |
1983 | * @ap: SATA port associated with target SATA PHY. | |
1984 | * | |
1985 | * This function issues commands to standard SATA Sxxx | |
1986 | * PHY registers, to wake up the phy (and device), and | |
1987 | * clear any reset condition. | |
1988 | * | |
1989 | * LOCKING: | |
1990 | * PCI/etc. bus probe sem. | |
1991 | * | |
1992 | */ | |
1993 | void __sata_phy_reset(struct ata_port *ap) | |
1994 | { | |
1995 | u32 sstatus; | |
1996 | unsigned long timeout = jiffies + (HZ * 5); | |
1997 | ||
1998 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
1999 | /* issue phy wake/reset */ | |
2000 | sata_scr_write_flush(ap, SCR_CONTROL, 0x301); | |
2001 | /* Couldn't find anything in SATA I/II specs, but | |
2002 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
2003 | mdelay(1); | |
2004 | } | |
2005 | /* phy wake/clear reset */ | |
2006 | sata_scr_write_flush(ap, SCR_CONTROL, 0x300); | |
2007 | ||
2008 | /* wait for phy to become ready, if necessary */ | |
2009 | do { | |
2010 | msleep(200); | |
2011 | sata_scr_read(ap, SCR_STATUS, &sstatus); | |
2012 | if ((sstatus & 0xf) != 1) | |
2013 | break; | |
2014 | } while (time_before(jiffies, timeout)); | |
2015 | ||
2016 | /* print link status */ | |
2017 | sata_print_link_status(ap); | |
2018 | ||
2019 | /* TODO: phy layer with polling, timeouts, etc. */ | |
2020 | if (!ata_port_offline(ap)) | |
2021 | ata_port_probe(ap); | |
2022 | else | |
2023 | ata_port_disable(ap); | |
2024 | ||
2025 | if (ap->flags & ATA_FLAG_DISABLED) | |
2026 | return; | |
2027 | ||
2028 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2029 | ata_port_disable(ap); | |
2030 | return; | |
2031 | } | |
2032 | ||
2033 | ap->cbl = ATA_CBL_SATA; | |
2034 | } | |
2035 | ||
2036 | /** | |
2037 | * sata_phy_reset - Reset SATA bus. | |
2038 | * @ap: SATA port associated with target SATA PHY. | |
2039 | * | |
2040 | * This function resets the SATA bus, and then probes | |
2041 | * the bus for devices. | |
2042 | * | |
2043 | * LOCKING: | |
2044 | * PCI/etc. bus probe sem. | |
2045 | * | |
2046 | */ | |
2047 | void sata_phy_reset(struct ata_port *ap) | |
2048 | { | |
2049 | __sata_phy_reset(ap); | |
2050 | if (ap->flags & ATA_FLAG_DISABLED) | |
2051 | return; | |
2052 | ata_bus_reset(ap); | |
2053 | } | |
2054 | ||
2055 | /** | |
2056 | * ata_dev_pair - return other device on cable | |
2057 | * @adev: device | |
2058 | * | |
2059 | * Obtain the other device on the same cable, or if none is | |
2060 | * present NULL is returned | |
2061 | */ | |
2062 | ||
2063 | struct ata_device *ata_dev_pair(struct ata_device *adev) | |
2064 | { | |
2065 | struct ata_port *ap = adev->ap; | |
2066 | struct ata_device *pair = &ap->device[1 - adev->devno]; | |
2067 | if (!ata_dev_enabled(pair)) | |
2068 | return NULL; | |
2069 | return pair; | |
2070 | } | |
2071 | ||
2072 | /** | |
2073 | * ata_port_disable - Disable port. | |
2074 | * @ap: Port to be disabled. | |
2075 | * | |
2076 | * Modify @ap data structure such that the system | |
2077 | * thinks that the entire port is disabled, and should | |
2078 | * never attempt to probe or communicate with devices | |
2079 | * on this port. | |
2080 | * | |
2081 | * LOCKING: host lock, or some other form of | |
2082 | * serialization. | |
2083 | */ | |
2084 | ||
2085 | void ata_port_disable(struct ata_port *ap) | |
2086 | { | |
2087 | ap->device[0].class = ATA_DEV_NONE; | |
2088 | ap->device[1].class = ATA_DEV_NONE; | |
2089 | ap->flags |= ATA_FLAG_DISABLED; | |
2090 | } | |
2091 | ||
2092 | /** | |
2093 | * sata_down_spd_limit - adjust SATA spd limit downward | |
2094 | * @ap: Port to adjust SATA spd limit for | |
2095 | * | |
2096 | * Adjust SATA spd limit of @ap downward. Note that this | |
2097 | * function only adjusts the limit. The change must be applied | |
2098 | * using sata_set_spd(). | |
2099 | * | |
2100 | * LOCKING: | |
2101 | * Inherited from caller. | |
2102 | * | |
2103 | * RETURNS: | |
2104 | * 0 on success, negative errno on failure | |
2105 | */ | |
2106 | int sata_down_spd_limit(struct ata_port *ap) | |
2107 | { | |
2108 | u32 sstatus, spd, mask; | |
2109 | int rc, highbit; | |
2110 | ||
2111 | rc = sata_scr_read(ap, SCR_STATUS, &sstatus); | |
2112 | if (rc) | |
2113 | return rc; | |
2114 | ||
2115 | mask = ap->sata_spd_limit; | |
2116 | if (mask <= 1) | |
2117 | return -EINVAL; | |
2118 | highbit = fls(mask) - 1; | |
2119 | mask &= ~(1 << highbit); | |
2120 | ||
2121 | spd = (sstatus >> 4) & 0xf; | |
2122 | if (spd <= 1) | |
2123 | return -EINVAL; | |
2124 | spd--; | |
2125 | mask &= (1 << spd) - 1; | |
2126 | if (!mask) | |
2127 | return -EINVAL; | |
2128 | ||
2129 | ap->sata_spd_limit = mask; | |
2130 | ||
2131 | ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n", | |
2132 | sata_spd_string(fls(mask))); | |
2133 | ||
2134 | return 0; | |
2135 | } | |
2136 | ||
2137 | static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol) | |
2138 | { | |
2139 | u32 spd, limit; | |
2140 | ||
2141 | if (ap->sata_spd_limit == UINT_MAX) | |
2142 | limit = 0; | |
2143 | else | |
2144 | limit = fls(ap->sata_spd_limit); | |
2145 | ||
2146 | spd = (*scontrol >> 4) & 0xf; | |
2147 | *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4); | |
2148 | ||
2149 | return spd != limit; | |
2150 | } | |
2151 | ||
2152 | /** | |
2153 | * sata_set_spd_needed - is SATA spd configuration needed | |
2154 | * @ap: Port in question | |
2155 | * | |
2156 | * Test whether the spd limit in SControl matches | |
2157 | * @ap->sata_spd_limit. This function is used to determine | |
2158 | * whether hardreset is necessary to apply SATA spd | |
2159 | * configuration. | |
2160 | * | |
2161 | * LOCKING: | |
2162 | * Inherited from caller. | |
2163 | * | |
2164 | * RETURNS: | |
2165 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2166 | */ | |
2167 | int sata_set_spd_needed(struct ata_port *ap) | |
2168 | { | |
2169 | u32 scontrol; | |
2170 | ||
2171 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol)) | |
2172 | return 0; | |
2173 | ||
2174 | return __sata_set_spd_needed(ap, &scontrol); | |
2175 | } | |
2176 | ||
2177 | /** | |
2178 | * sata_set_spd - set SATA spd according to spd limit | |
2179 | * @ap: Port to set SATA spd for | |
2180 | * | |
2181 | * Set SATA spd of @ap according to sata_spd_limit. | |
2182 | * | |
2183 | * LOCKING: | |
2184 | * Inherited from caller. | |
2185 | * | |
2186 | * RETURNS: | |
2187 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
2188 | * changed. Negative errno if SCR registers are inaccessible. | |
2189 | */ | |
2190 | int sata_set_spd(struct ata_port *ap) | |
2191 | { | |
2192 | u32 scontrol; | |
2193 | int rc; | |
2194 | ||
2195 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2196 | return rc; | |
2197 | ||
2198 | if (!__sata_set_spd_needed(ap, &scontrol)) | |
2199 | return 0; | |
2200 | ||
2201 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2202 | return rc; | |
2203 | ||
2204 | return 1; | |
2205 | } | |
2206 | ||
2207 | /* | |
2208 | * This mode timing computation functionality is ported over from | |
2209 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2210 | */ | |
2211 | /* | |
2212 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). | |
2213 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except | |
2214 | * for UDMA6, which is currently supported only by Maxtor drives. | |
2215 | * | |
2216 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
2217 | */ | |
2218 | ||
2219 | static const struct ata_timing ata_timing[] = { | |
2220 | ||
2221 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2222 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2223 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2224 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2225 | ||
2226 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, | |
2227 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
2228 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, | |
2229 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2230 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2231 | ||
2232 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2233 | ||
2234 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, | |
2235 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2236 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2237 | ||
2238 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, | |
2239 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2240 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2241 | ||
2242 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, | |
2243 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
2244 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, | |
2245 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2246 | ||
2247 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2248 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2249 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2250 | ||
2251 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2252 | ||
2253 | { 0xFF } | |
2254 | }; | |
2255 | ||
2256 | #define ENOUGH(v,unit) (((v)-1)/(unit)+1) | |
2257 | #define EZ(v,unit) ((v)?ENOUGH(v,unit):0) | |
2258 | ||
2259 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2260 | { | |
2261 | q->setup = EZ(t->setup * 1000, T); | |
2262 | q->act8b = EZ(t->act8b * 1000, T); | |
2263 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2264 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2265 | q->active = EZ(t->active * 1000, T); | |
2266 | q->recover = EZ(t->recover * 1000, T); | |
2267 | q->cycle = EZ(t->cycle * 1000, T); | |
2268 | q->udma = EZ(t->udma * 1000, UT); | |
2269 | } | |
2270 | ||
2271 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2272 | struct ata_timing *m, unsigned int what) | |
2273 | { | |
2274 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2275 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2276 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2277 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2278 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2279 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2280 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2281 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2282 | } | |
2283 | ||
2284 | static const struct ata_timing* ata_timing_find_mode(unsigned short speed) | |
2285 | { | |
2286 | const struct ata_timing *t; | |
2287 | ||
2288 | for (t = ata_timing; t->mode != speed; t++) | |
2289 | if (t->mode == 0xFF) | |
2290 | return NULL; | |
2291 | return t; | |
2292 | } | |
2293 | ||
2294 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2295 | struct ata_timing *t, int T, int UT) | |
2296 | { | |
2297 | const struct ata_timing *s; | |
2298 | struct ata_timing p; | |
2299 | ||
2300 | /* | |
2301 | * Find the mode. | |
2302 | */ | |
2303 | ||
2304 | if (!(s = ata_timing_find_mode(speed))) | |
2305 | return -EINVAL; | |
2306 | ||
2307 | memcpy(t, s, sizeof(*s)); | |
2308 | ||
2309 | /* | |
2310 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2311 | * PIO/MW_DMA cycle timing. | |
2312 | */ | |
2313 | ||
2314 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2315 | memset(&p, 0, sizeof(p)); | |
2316 | if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { | |
2317 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; | |
2318 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2319 | } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { | |
2320 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; | |
2321 | } | |
2322 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2323 | } | |
2324 | ||
2325 | /* | |
2326 | * Convert the timing to bus clock counts. | |
2327 | */ | |
2328 | ||
2329 | ata_timing_quantize(t, t, T, UT); | |
2330 | ||
2331 | /* | |
2332 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, | |
2333 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2334 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
2335 | */ | |
2336 | ||
2337 | if (speed > XFER_PIO_6) { | |
2338 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); | |
2339 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2340 | } | |
2341 | ||
2342 | /* | |
2343 | * Lengthen active & recovery time so that cycle time is correct. | |
2344 | */ | |
2345 | ||
2346 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2347 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2348 | t->rec8b = t->cyc8b - t->act8b; | |
2349 | } | |
2350 | ||
2351 | if (t->active + t->recover < t->cycle) { | |
2352 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2353 | t->recover = t->cycle - t->active; | |
2354 | } | |
2355 | ||
2356 | return 0; | |
2357 | } | |
2358 | ||
2359 | /** | |
2360 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
2361 | * @dev: Device to adjust xfer masks | |
2362 | * @sel: ATA_DNXFER_* selector | |
2363 | * | |
2364 | * Adjust xfer masks of @dev downward. Note that this function | |
2365 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2366 | * will apply the limit. | |
2367 | * | |
2368 | * LOCKING: | |
2369 | * Inherited from caller. | |
2370 | * | |
2371 | * RETURNS: | |
2372 | * 0 on success, negative errno on failure | |
2373 | */ | |
2374 | int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) | |
2375 | { | |
2376 | char buf[32]; | |
2377 | unsigned int orig_mask, xfer_mask; | |
2378 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
2379 | int quiet, highbit; | |
2380 | ||
2381 | quiet = !!(sel & ATA_DNXFER_QUIET); | |
2382 | sel &= ~ATA_DNXFER_QUIET; | |
2383 | ||
2384 | xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, | |
2385 | dev->mwdma_mask, | |
2386 | dev->udma_mask); | |
2387 | ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); | |
2388 | ||
2389 | switch (sel) { | |
2390 | case ATA_DNXFER_PIO: | |
2391 | highbit = fls(pio_mask) - 1; | |
2392 | pio_mask &= ~(1 << highbit); | |
2393 | break; | |
2394 | ||
2395 | case ATA_DNXFER_DMA: | |
2396 | if (udma_mask) { | |
2397 | highbit = fls(udma_mask) - 1; | |
2398 | udma_mask &= ~(1 << highbit); | |
2399 | if (!udma_mask) | |
2400 | return -ENOENT; | |
2401 | } else if (mwdma_mask) { | |
2402 | highbit = fls(mwdma_mask) - 1; | |
2403 | mwdma_mask &= ~(1 << highbit); | |
2404 | if (!mwdma_mask) | |
2405 | return -ENOENT; | |
2406 | } | |
2407 | break; | |
2408 | ||
2409 | case ATA_DNXFER_40C: | |
2410 | udma_mask &= ATA_UDMA_MASK_40C; | |
2411 | break; | |
2412 | ||
2413 | case ATA_DNXFER_FORCE_PIO0: | |
2414 | pio_mask &= 1; | |
2415 | case ATA_DNXFER_FORCE_PIO: | |
2416 | mwdma_mask = 0; | |
2417 | udma_mask = 0; | |
2418 | break; | |
2419 | ||
2420 | default: | |
2421 | BUG(); | |
2422 | } | |
2423 | ||
2424 | xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
2425 | ||
2426 | if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) | |
2427 | return -ENOENT; | |
2428 | ||
2429 | if (!quiet) { | |
2430 | if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) | |
2431 | snprintf(buf, sizeof(buf), "%s:%s", | |
2432 | ata_mode_string(xfer_mask), | |
2433 | ata_mode_string(xfer_mask & ATA_MASK_PIO)); | |
2434 | else | |
2435 | snprintf(buf, sizeof(buf), "%s", | |
2436 | ata_mode_string(xfer_mask)); | |
2437 | ||
2438 | ata_dev_printk(dev, KERN_WARNING, | |
2439 | "limiting speed to %s\n", buf); | |
2440 | } | |
2441 | ||
2442 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
2443 | &dev->udma_mask); | |
2444 | ||
2445 | return 0; | |
2446 | } | |
2447 | ||
2448 | static int ata_dev_set_mode(struct ata_device *dev) | |
2449 | { | |
2450 | struct ata_eh_context *ehc = &dev->ap->eh_context; | |
2451 | unsigned int err_mask; | |
2452 | int rc; | |
2453 | ||
2454 | dev->flags &= ~ATA_DFLAG_PIO; | |
2455 | if (dev->xfer_shift == ATA_SHIFT_PIO) | |
2456 | dev->flags |= ATA_DFLAG_PIO; | |
2457 | ||
2458 | err_mask = ata_dev_set_xfermode(dev); | |
2459 | /* Old CFA may refuse this command, which is just fine */ | |
2460 | if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) | |
2461 | err_mask &= ~AC_ERR_DEV; | |
2462 | ||
2463 | if (err_mask) { | |
2464 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " | |
2465 | "(err_mask=0x%x)\n", err_mask); | |
2466 | return -EIO; | |
2467 | } | |
2468 | ||
2469 | ehc->i.flags |= ATA_EHI_POST_SETMODE; | |
2470 | rc = ata_dev_revalidate(dev, 0); | |
2471 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; | |
2472 | if (rc) | |
2473 | return rc; | |
2474 | ||
2475 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", | |
2476 | dev->xfer_shift, (int)dev->xfer_mode); | |
2477 | ||
2478 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
2479 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
2480 | return 0; | |
2481 | } | |
2482 | ||
2483 | /** | |
2484 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
2485 | * @ap: port on which timings will be programmed | |
2486 | * @r_failed_dev: out paramter for failed device | |
2487 | * | |
2488 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
2489 | * ata_set_mode() fails, pointer to the failing device is | |
2490 | * returned in @r_failed_dev. | |
2491 | * | |
2492 | * LOCKING: | |
2493 | * PCI/etc. bus probe sem. | |
2494 | * | |
2495 | * RETURNS: | |
2496 | * 0 on success, negative errno otherwise | |
2497 | */ | |
2498 | int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev) | |
2499 | { | |
2500 | struct ata_device *dev; | |
2501 | int i, rc = 0, used_dma = 0, found = 0; | |
2502 | ||
2503 | /* has private set_mode? */ | |
2504 | if (ap->ops->set_mode) | |
2505 | return ap->ops->set_mode(ap, r_failed_dev); | |
2506 | ||
2507 | /* step 1: calculate xfer_mask */ | |
2508 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
2509 | unsigned int pio_mask, dma_mask; | |
2510 | ||
2511 | dev = &ap->device[i]; | |
2512 | ||
2513 | if (!ata_dev_enabled(dev)) | |
2514 | continue; | |
2515 | ||
2516 | ata_dev_xfermask(dev); | |
2517 | ||
2518 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); | |
2519 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
2520 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); | |
2521 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
2522 | ||
2523 | found = 1; | |
2524 | if (dev->dma_mode) | |
2525 | used_dma = 1; | |
2526 | } | |
2527 | if (!found) | |
2528 | goto out; | |
2529 | ||
2530 | /* step 2: always set host PIO timings */ | |
2531 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
2532 | dev = &ap->device[i]; | |
2533 | if (!ata_dev_enabled(dev)) | |
2534 | continue; | |
2535 | ||
2536 | if (!dev->pio_mode) { | |
2537 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); | |
2538 | rc = -EINVAL; | |
2539 | goto out; | |
2540 | } | |
2541 | ||
2542 | dev->xfer_mode = dev->pio_mode; | |
2543 | dev->xfer_shift = ATA_SHIFT_PIO; | |
2544 | if (ap->ops->set_piomode) | |
2545 | ap->ops->set_piomode(ap, dev); | |
2546 | } | |
2547 | ||
2548 | /* step 3: set host DMA timings */ | |
2549 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
2550 | dev = &ap->device[i]; | |
2551 | ||
2552 | if (!ata_dev_enabled(dev) || !dev->dma_mode) | |
2553 | continue; | |
2554 | ||
2555 | dev->xfer_mode = dev->dma_mode; | |
2556 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
2557 | if (ap->ops->set_dmamode) | |
2558 | ap->ops->set_dmamode(ap, dev); | |
2559 | } | |
2560 | ||
2561 | /* step 4: update devices' xfer mode */ | |
2562 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
2563 | dev = &ap->device[i]; | |
2564 | ||
2565 | /* don't update suspended devices' xfer mode */ | |
2566 | if (!ata_dev_ready(dev)) | |
2567 | continue; | |
2568 | ||
2569 | rc = ata_dev_set_mode(dev); | |
2570 | if (rc) | |
2571 | goto out; | |
2572 | } | |
2573 | ||
2574 | /* Record simplex status. If we selected DMA then the other | |
2575 | * host channels are not permitted to do so. | |
2576 | */ | |
2577 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) | |
2578 | ap->host->simplex_claimed = ap; | |
2579 | ||
2580 | /* step5: chip specific finalisation */ | |
2581 | if (ap->ops->post_set_mode) | |
2582 | ap->ops->post_set_mode(ap); | |
2583 | out: | |
2584 | if (rc) | |
2585 | *r_failed_dev = dev; | |
2586 | return rc; | |
2587 | } | |
2588 | ||
2589 | /** | |
2590 | * ata_tf_to_host - issue ATA taskfile to host controller | |
2591 | * @ap: port to which command is being issued | |
2592 | * @tf: ATA taskfile register set | |
2593 | * | |
2594 | * Issues ATA taskfile register set to ATA host controller, | |
2595 | * with proper synchronization with interrupt handler and | |
2596 | * other threads. | |
2597 | * | |
2598 | * LOCKING: | |
2599 | * spin_lock_irqsave(host lock) | |
2600 | */ | |
2601 | ||
2602 | static inline void ata_tf_to_host(struct ata_port *ap, | |
2603 | const struct ata_taskfile *tf) | |
2604 | { | |
2605 | ap->ops->tf_load(ap, tf); | |
2606 | ap->ops->exec_command(ap, tf); | |
2607 | } | |
2608 | ||
2609 | /** | |
2610 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
2611 | * @ap: port containing status register to be polled | |
2612 | * @tmout_pat: impatience timeout | |
2613 | * @tmout: overall timeout | |
2614 | * | |
2615 | * Sleep until ATA Status register bit BSY clears, | |
2616 | * or a timeout occurs. | |
2617 | * | |
2618 | * LOCKING: | |
2619 | * Kernel thread context (may sleep). | |
2620 | * | |
2621 | * RETURNS: | |
2622 | * 0 on success, -errno otherwise. | |
2623 | */ | |
2624 | int ata_busy_sleep(struct ata_port *ap, | |
2625 | unsigned long tmout_pat, unsigned long tmout) | |
2626 | { | |
2627 | unsigned long timer_start, timeout; | |
2628 | u8 status; | |
2629 | ||
2630 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
2631 | timer_start = jiffies; | |
2632 | timeout = timer_start + tmout_pat; | |
2633 | while (status != 0xff && (status & ATA_BUSY) && | |
2634 | time_before(jiffies, timeout)) { | |
2635 | msleep(50); | |
2636 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
2637 | } | |
2638 | ||
2639 | if (status != 0xff && (status & ATA_BUSY)) | |
2640 | ata_port_printk(ap, KERN_WARNING, | |
2641 | "port is slow to respond, please be patient " | |
2642 | "(Status 0x%x)\n", status); | |
2643 | ||
2644 | timeout = timer_start + tmout; | |
2645 | while (status != 0xff && (status & ATA_BUSY) && | |
2646 | time_before(jiffies, timeout)) { | |
2647 | msleep(50); | |
2648 | status = ata_chk_status(ap); | |
2649 | } | |
2650 | ||
2651 | if (status == 0xff) | |
2652 | return -ENODEV; | |
2653 | ||
2654 | if (status & ATA_BUSY) { | |
2655 | ata_port_printk(ap, KERN_ERR, "port failed to respond " | |
2656 | "(%lu secs, Status 0x%x)\n", | |
2657 | tmout / HZ, status); | |
2658 | return -EBUSY; | |
2659 | } | |
2660 | ||
2661 | return 0; | |
2662 | } | |
2663 | ||
2664 | static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask) | |
2665 | { | |
2666 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2667 | unsigned int dev0 = devmask & (1 << 0); | |
2668 | unsigned int dev1 = devmask & (1 << 1); | |
2669 | unsigned long timeout; | |
2670 | ||
2671 | /* if device 0 was found in ata_devchk, wait for its | |
2672 | * BSY bit to clear | |
2673 | */ | |
2674 | if (dev0) | |
2675 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2676 | ||
2677 | /* if device 1 was found in ata_devchk, wait for | |
2678 | * register access, then wait for BSY to clear | |
2679 | */ | |
2680 | timeout = jiffies + ATA_TMOUT_BOOT; | |
2681 | while (dev1) { | |
2682 | u8 nsect, lbal; | |
2683 | ||
2684 | ap->ops->dev_select(ap, 1); | |
2685 | nsect = ioread8(ioaddr->nsect_addr); | |
2686 | lbal = ioread8(ioaddr->lbal_addr); | |
2687 | if ((nsect == 1) && (lbal == 1)) | |
2688 | break; | |
2689 | if (time_after(jiffies, timeout)) { | |
2690 | dev1 = 0; | |
2691 | break; | |
2692 | } | |
2693 | msleep(50); /* give drive a breather */ | |
2694 | } | |
2695 | if (dev1) | |
2696 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
2697 | ||
2698 | /* is all this really necessary? */ | |
2699 | ap->ops->dev_select(ap, 0); | |
2700 | if (dev1) | |
2701 | ap->ops->dev_select(ap, 1); | |
2702 | if (dev0) | |
2703 | ap->ops->dev_select(ap, 0); | |
2704 | } | |
2705 | ||
2706 | static unsigned int ata_bus_softreset(struct ata_port *ap, | |
2707 | unsigned int devmask) | |
2708 | { | |
2709 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2710 | ||
2711 | DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); | |
2712 | ||
2713 | /* software reset. causes dev0 to be selected */ | |
2714 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
2715 | udelay(20); /* FIXME: flush */ | |
2716 | iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
2717 | udelay(20); /* FIXME: flush */ | |
2718 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
2719 | ||
2720 | /* spec mandates ">= 2ms" before checking status. | |
2721 | * We wait 150ms, because that was the magic delay used for | |
2722 | * ATAPI devices in Hale Landis's ATADRVR, for the period of time | |
2723 | * between when the ATA command register is written, and then | |
2724 | * status is checked. Because waiting for "a while" before | |
2725 | * checking status is fine, post SRST, we perform this magic | |
2726 | * delay here as well. | |
2727 | * | |
2728 | * Old drivers/ide uses the 2mS rule and then waits for ready | |
2729 | */ | |
2730 | msleep(150); | |
2731 | ||
2732 | /* Before we perform post reset processing we want to see if | |
2733 | * the bus shows 0xFF because the odd clown forgets the D7 | |
2734 | * pulldown resistor. | |
2735 | */ | |
2736 | if (ata_check_status(ap) == 0xFF) | |
2737 | return 0; | |
2738 | ||
2739 | ata_bus_post_reset(ap, devmask); | |
2740 | ||
2741 | return 0; | |
2742 | } | |
2743 | ||
2744 | /** | |
2745 | * ata_bus_reset - reset host port and associated ATA channel | |
2746 | * @ap: port to reset | |
2747 | * | |
2748 | * This is typically the first time we actually start issuing | |
2749 | * commands to the ATA channel. We wait for BSY to clear, then | |
2750 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
2751 | * result. Determine what devices, if any, are on the channel | |
2752 | * by looking at the device 0/1 error register. Look at the signature | |
2753 | * stored in each device's taskfile registers, to determine if | |
2754 | * the device is ATA or ATAPI. | |
2755 | * | |
2756 | * LOCKING: | |
2757 | * PCI/etc. bus probe sem. | |
2758 | * Obtains host lock. | |
2759 | * | |
2760 | * SIDE EFFECTS: | |
2761 | * Sets ATA_FLAG_DISABLED if bus reset fails. | |
2762 | */ | |
2763 | ||
2764 | void ata_bus_reset(struct ata_port *ap) | |
2765 | { | |
2766 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
2767 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
2768 | u8 err; | |
2769 | unsigned int dev0, dev1 = 0, devmask = 0; | |
2770 | ||
2771 | DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); | |
2772 | ||
2773 | /* determine if device 0/1 are present */ | |
2774 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
2775 | dev0 = 1; | |
2776 | else { | |
2777 | dev0 = ata_devchk(ap, 0); | |
2778 | if (slave_possible) | |
2779 | dev1 = ata_devchk(ap, 1); | |
2780 | } | |
2781 | ||
2782 | if (dev0) | |
2783 | devmask |= (1 << 0); | |
2784 | if (dev1) | |
2785 | devmask |= (1 << 1); | |
2786 | ||
2787 | /* select device 0 again */ | |
2788 | ap->ops->dev_select(ap, 0); | |
2789 | ||
2790 | /* issue bus reset */ | |
2791 | if (ap->flags & ATA_FLAG_SRST) | |
2792 | if (ata_bus_softreset(ap, devmask)) | |
2793 | goto err_out; | |
2794 | ||
2795 | /* | |
2796 | * determine by signature whether we have ATA or ATAPI devices | |
2797 | */ | |
2798 | ap->device[0].class = ata_dev_try_classify(ap, 0, &err); | |
2799 | if ((slave_possible) && (err != 0x81)) | |
2800 | ap->device[1].class = ata_dev_try_classify(ap, 1, &err); | |
2801 | ||
2802 | /* re-enable interrupts */ | |
2803 | ap->ops->irq_on(ap); | |
2804 | ||
2805 | /* is double-select really necessary? */ | |
2806 | if (ap->device[1].class != ATA_DEV_NONE) | |
2807 | ap->ops->dev_select(ap, 1); | |
2808 | if (ap->device[0].class != ATA_DEV_NONE) | |
2809 | ap->ops->dev_select(ap, 0); | |
2810 | ||
2811 | /* if no devices were detected, disable this port */ | |
2812 | if ((ap->device[0].class == ATA_DEV_NONE) && | |
2813 | (ap->device[1].class == ATA_DEV_NONE)) | |
2814 | goto err_out; | |
2815 | ||
2816 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
2817 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
2818 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
2819 | } | |
2820 | ||
2821 | DPRINTK("EXIT\n"); | |
2822 | return; | |
2823 | ||
2824 | err_out: | |
2825 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); | |
2826 | ap->ops->port_disable(ap); | |
2827 | ||
2828 | DPRINTK("EXIT\n"); | |
2829 | } | |
2830 | ||
2831 | /** | |
2832 | * sata_phy_debounce - debounce SATA phy status | |
2833 | * @ap: ATA port to debounce SATA phy status for | |
2834 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2835 | * | |
2836 | * Make sure SStatus of @ap reaches stable state, determined by | |
2837 | * holding the same value where DET is not 1 for @duration polled | |
2838 | * every @interval, before @timeout. Timeout constraints the | |
2839 | * beginning of the stable state. Because, after hot unplugging, | |
2840 | * DET gets stuck at 1 on some controllers, this functions waits | |
2841 | * until timeout then returns 0 if DET is stable at 1. | |
2842 | * | |
2843 | * LOCKING: | |
2844 | * Kernel thread context (may sleep) | |
2845 | * | |
2846 | * RETURNS: | |
2847 | * 0 on success, -errno on failure. | |
2848 | */ | |
2849 | int sata_phy_debounce(struct ata_port *ap, const unsigned long *params) | |
2850 | { | |
2851 | unsigned long interval_msec = params[0]; | |
2852 | unsigned long duration = params[1] * HZ / 1000; | |
2853 | unsigned long timeout = jiffies + params[2] * HZ / 1000; | |
2854 | unsigned long last_jiffies; | |
2855 | u32 last, cur; | |
2856 | int rc; | |
2857 | ||
2858 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2859 | return rc; | |
2860 | cur &= 0xf; | |
2861 | ||
2862 | last = cur; | |
2863 | last_jiffies = jiffies; | |
2864 | ||
2865 | while (1) { | |
2866 | msleep(interval_msec); | |
2867 | if ((rc = sata_scr_read(ap, SCR_STATUS, &cur))) | |
2868 | return rc; | |
2869 | cur &= 0xf; | |
2870 | ||
2871 | /* DET stable? */ | |
2872 | if (cur == last) { | |
2873 | if (cur == 1 && time_before(jiffies, timeout)) | |
2874 | continue; | |
2875 | if (time_after(jiffies, last_jiffies + duration)) | |
2876 | return 0; | |
2877 | continue; | |
2878 | } | |
2879 | ||
2880 | /* unstable, start over */ | |
2881 | last = cur; | |
2882 | last_jiffies = jiffies; | |
2883 | ||
2884 | /* check timeout */ | |
2885 | if (time_after(jiffies, timeout)) | |
2886 | return -EBUSY; | |
2887 | } | |
2888 | } | |
2889 | ||
2890 | /** | |
2891 | * sata_phy_resume - resume SATA phy | |
2892 | * @ap: ATA port to resume SATA phy for | |
2893 | * @params: timing parameters { interval, duratinon, timeout } in msec | |
2894 | * | |
2895 | * Resume SATA phy of @ap and debounce it. | |
2896 | * | |
2897 | * LOCKING: | |
2898 | * Kernel thread context (may sleep) | |
2899 | * | |
2900 | * RETURNS: | |
2901 | * 0 on success, -errno on failure. | |
2902 | */ | |
2903 | int sata_phy_resume(struct ata_port *ap, const unsigned long *params) | |
2904 | { | |
2905 | u32 scontrol; | |
2906 | int rc; | |
2907 | ||
2908 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
2909 | return rc; | |
2910 | ||
2911 | scontrol = (scontrol & 0x0f0) | 0x300; | |
2912 | ||
2913 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
2914 | return rc; | |
2915 | ||
2916 | /* Some PHYs react badly if SStatus is pounded immediately | |
2917 | * after resuming. Delay 200ms before debouncing. | |
2918 | */ | |
2919 | msleep(200); | |
2920 | ||
2921 | return sata_phy_debounce(ap, params); | |
2922 | } | |
2923 | ||
2924 | static void ata_wait_spinup(struct ata_port *ap) | |
2925 | { | |
2926 | struct ata_eh_context *ehc = &ap->eh_context; | |
2927 | unsigned long end, secs; | |
2928 | int rc; | |
2929 | ||
2930 | /* first, debounce phy if SATA */ | |
2931 | if (ap->cbl == ATA_CBL_SATA) { | |
2932 | rc = sata_phy_debounce(ap, sata_deb_timing_hotplug); | |
2933 | ||
2934 | /* if debounced successfully and offline, no need to wait */ | |
2935 | if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap)) | |
2936 | return; | |
2937 | } | |
2938 | ||
2939 | /* okay, let's give the drive time to spin up */ | |
2940 | end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000; | |
2941 | secs = ((end - jiffies) + HZ - 1) / HZ; | |
2942 | ||
2943 | if (time_after(jiffies, end)) | |
2944 | return; | |
2945 | ||
2946 | if (secs > 5) | |
2947 | ata_port_printk(ap, KERN_INFO, "waiting for device to spin up " | |
2948 | "(%lu secs)\n", secs); | |
2949 | ||
2950 | schedule_timeout_uninterruptible(end - jiffies); | |
2951 | } | |
2952 | ||
2953 | /** | |
2954 | * ata_std_prereset - prepare for reset | |
2955 | * @ap: ATA port to be reset | |
2956 | * | |
2957 | * @ap is about to be reset. Initialize it. | |
2958 | * | |
2959 | * LOCKING: | |
2960 | * Kernel thread context (may sleep) | |
2961 | * | |
2962 | * RETURNS: | |
2963 | * 0 on success, -errno otherwise. | |
2964 | */ | |
2965 | int ata_std_prereset(struct ata_port *ap) | |
2966 | { | |
2967 | struct ata_eh_context *ehc = &ap->eh_context; | |
2968 | const unsigned long *timing = sata_ehc_deb_timing(ehc); | |
2969 | int rc; | |
2970 | ||
2971 | /* handle link resume & hotplug spinup */ | |
2972 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && | |
2973 | (ap->flags & ATA_FLAG_HRST_TO_RESUME)) | |
2974 | ehc->i.action |= ATA_EH_HARDRESET; | |
2975 | ||
2976 | if ((ehc->i.flags & ATA_EHI_HOTPLUGGED) && | |
2977 | (ap->flags & ATA_FLAG_SKIP_D2H_BSY)) | |
2978 | ata_wait_spinup(ap); | |
2979 | ||
2980 | /* if we're about to do hardreset, nothing more to do */ | |
2981 | if (ehc->i.action & ATA_EH_HARDRESET) | |
2982 | return 0; | |
2983 | ||
2984 | /* if SATA, resume phy */ | |
2985 | if (ap->cbl == ATA_CBL_SATA) { | |
2986 | rc = sata_phy_resume(ap, timing); | |
2987 | if (rc && rc != -EOPNOTSUPP) { | |
2988 | /* phy resume failed */ | |
2989 | ata_port_printk(ap, KERN_WARNING, "failed to resume " | |
2990 | "link for reset (errno=%d)\n", rc); | |
2991 | return rc; | |
2992 | } | |
2993 | } | |
2994 | ||
2995 | /* Wait for !BSY if the controller can wait for the first D2H | |
2996 | * Reg FIS and we don't know that no device is attached. | |
2997 | */ | |
2998 | if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap)) | |
2999 | ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT); | |
3000 | ||
3001 | return 0; | |
3002 | } | |
3003 | ||
3004 | /** | |
3005 | * ata_std_softreset - reset host port via ATA SRST | |
3006 | * @ap: port to reset | |
3007 | * @classes: resulting classes of attached devices | |
3008 | * | |
3009 | * Reset host port using ATA SRST. | |
3010 | * | |
3011 | * LOCKING: | |
3012 | * Kernel thread context (may sleep) | |
3013 | * | |
3014 | * RETURNS: | |
3015 | * 0 on success, -errno otherwise. | |
3016 | */ | |
3017 | int ata_std_softreset(struct ata_port *ap, unsigned int *classes) | |
3018 | { | |
3019 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
3020 | unsigned int devmask = 0, err_mask; | |
3021 | u8 err; | |
3022 | ||
3023 | DPRINTK("ENTER\n"); | |
3024 | ||
3025 | if (ata_port_offline(ap)) { | |
3026 | classes[0] = ATA_DEV_NONE; | |
3027 | goto out; | |
3028 | } | |
3029 | ||
3030 | /* determine if device 0/1 are present */ | |
3031 | if (ata_devchk(ap, 0)) | |
3032 | devmask |= (1 << 0); | |
3033 | if (slave_possible && ata_devchk(ap, 1)) | |
3034 | devmask |= (1 << 1); | |
3035 | ||
3036 | /* select device 0 again */ | |
3037 | ap->ops->dev_select(ap, 0); | |
3038 | ||
3039 | /* issue bus reset */ | |
3040 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
3041 | err_mask = ata_bus_softreset(ap, devmask); | |
3042 | if (err_mask) { | |
3043 | ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n", | |
3044 | err_mask); | |
3045 | return -EIO; | |
3046 | } | |
3047 | ||
3048 | /* determine by signature whether we have ATA or ATAPI devices */ | |
3049 | classes[0] = ata_dev_try_classify(ap, 0, &err); | |
3050 | if (slave_possible && err != 0x81) | |
3051 | classes[1] = ata_dev_try_classify(ap, 1, &err); | |
3052 | ||
3053 | out: | |
3054 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); | |
3055 | return 0; | |
3056 | } | |
3057 | ||
3058 | /** | |
3059 | * sata_port_hardreset - reset port via SATA phy reset | |
3060 | * @ap: port to reset | |
3061 | * @timing: timing parameters { interval, duratinon, timeout } in msec | |
3062 | * | |
3063 | * SATA phy-reset host port using DET bits of SControl register. | |
3064 | * | |
3065 | * LOCKING: | |
3066 | * Kernel thread context (may sleep) | |
3067 | * | |
3068 | * RETURNS: | |
3069 | * 0 on success, -errno otherwise. | |
3070 | */ | |
3071 | int sata_port_hardreset(struct ata_port *ap, const unsigned long *timing) | |
3072 | { | |
3073 | u32 scontrol; | |
3074 | int rc; | |
3075 | ||
3076 | DPRINTK("ENTER\n"); | |
3077 | ||
3078 | if (sata_set_spd_needed(ap)) { | |
3079 | /* SATA spec says nothing about how to reconfigure | |
3080 | * spd. To be on the safe side, turn off phy during | |
3081 | * reconfiguration. This works for at least ICH7 AHCI | |
3082 | * and Sil3124. | |
3083 | */ | |
3084 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
3085 | goto out; | |
3086 | ||
3087 | scontrol = (scontrol & 0x0f0) | 0x304; | |
3088 | ||
3089 | if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol))) | |
3090 | goto out; | |
3091 | ||
3092 | sata_set_spd(ap); | |
3093 | } | |
3094 | ||
3095 | /* issue phy wake/reset */ | |
3096 | if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol))) | |
3097 | goto out; | |
3098 | ||
3099 | scontrol = (scontrol & 0x0f0) | 0x301; | |
3100 | ||
3101 | if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol))) | |
3102 | goto out; | |
3103 | ||
3104 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 | |
3105 | * 10.4.2 says at least 1 ms. | |
3106 | */ | |
3107 | msleep(1); | |
3108 | ||
3109 | /* bring phy back */ | |
3110 | rc = sata_phy_resume(ap, timing); | |
3111 | out: | |
3112 | DPRINTK("EXIT, rc=%d\n", rc); | |
3113 | return rc; | |
3114 | } | |
3115 | ||
3116 | /** | |
3117 | * sata_std_hardreset - reset host port via SATA phy reset | |
3118 | * @ap: port to reset | |
3119 | * @class: resulting class of attached device | |
3120 | * | |
3121 | * SATA phy-reset host port using DET bits of SControl register, | |
3122 | * wait for !BSY and classify the attached device. | |
3123 | * | |
3124 | * LOCKING: | |
3125 | * Kernel thread context (may sleep) | |
3126 | * | |
3127 | * RETURNS: | |
3128 | * 0 on success, -errno otherwise. | |
3129 | */ | |
3130 | int sata_std_hardreset(struct ata_port *ap, unsigned int *class) | |
3131 | { | |
3132 | const unsigned long *timing = sata_ehc_deb_timing(&ap->eh_context); | |
3133 | int rc; | |
3134 | ||
3135 | DPRINTK("ENTER\n"); | |
3136 | ||
3137 | /* do hardreset */ | |
3138 | rc = sata_port_hardreset(ap, timing); | |
3139 | if (rc) { | |
3140 | ata_port_printk(ap, KERN_ERR, | |
3141 | "COMRESET failed (errno=%d)\n", rc); | |
3142 | return rc; | |
3143 | } | |
3144 | ||
3145 | /* TODO: phy layer with polling, timeouts, etc. */ | |
3146 | if (ata_port_offline(ap)) { | |
3147 | *class = ATA_DEV_NONE; | |
3148 | DPRINTK("EXIT, link offline\n"); | |
3149 | return 0; | |
3150 | } | |
3151 | ||
3152 | /* wait a while before checking status, see SRST for more info */ | |
3153 | msleep(150); | |
3154 | ||
3155 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
3156 | ata_port_printk(ap, KERN_ERR, | |
3157 | "COMRESET failed (device not ready)\n"); | |
3158 | return -EIO; | |
3159 | } | |
3160 | ||
3161 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ | |
3162 | ||
3163 | *class = ata_dev_try_classify(ap, 0, NULL); | |
3164 | ||
3165 | DPRINTK("EXIT, class=%u\n", *class); | |
3166 | return 0; | |
3167 | } | |
3168 | ||
3169 | /** | |
3170 | * ata_std_postreset - standard postreset callback | |
3171 | * @ap: the target ata_port | |
3172 | * @classes: classes of attached devices | |
3173 | * | |
3174 | * This function is invoked after a successful reset. Note that | |
3175 | * the device might have been reset more than once using | |
3176 | * different reset methods before postreset is invoked. | |
3177 | * | |
3178 | * LOCKING: | |
3179 | * Kernel thread context (may sleep) | |
3180 | */ | |
3181 | void ata_std_postreset(struct ata_port *ap, unsigned int *classes) | |
3182 | { | |
3183 | u32 serror; | |
3184 | ||
3185 | DPRINTK("ENTER\n"); | |
3186 | ||
3187 | /* print link status */ | |
3188 | sata_print_link_status(ap); | |
3189 | ||
3190 | /* clear SError */ | |
3191 | if (sata_scr_read(ap, SCR_ERROR, &serror) == 0) | |
3192 | sata_scr_write(ap, SCR_ERROR, serror); | |
3193 | ||
3194 | /* re-enable interrupts */ | |
3195 | if (!ap->ops->error_handler) | |
3196 | ap->ops->irq_on(ap); | |
3197 | ||
3198 | /* is double-select really necessary? */ | |
3199 | if (classes[0] != ATA_DEV_NONE) | |
3200 | ap->ops->dev_select(ap, 1); | |
3201 | if (classes[1] != ATA_DEV_NONE) | |
3202 | ap->ops->dev_select(ap, 0); | |
3203 | ||
3204 | /* bail out if no device is present */ | |
3205 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3206 | DPRINTK("EXIT, no device\n"); | |
3207 | return; | |
3208 | } | |
3209 | ||
3210 | /* set up device control */ | |
3211 | if (ap->ioaddr.ctl_addr) | |
3212 | iowrite8(ap->ctl, ap->ioaddr.ctl_addr); | |
3213 | ||
3214 | DPRINTK("EXIT\n"); | |
3215 | } | |
3216 | ||
3217 | /** | |
3218 | * ata_dev_same_device - Determine whether new ID matches configured device | |
3219 | * @dev: device to compare against | |
3220 | * @new_class: class of the new device | |
3221 | * @new_id: IDENTIFY page of the new device | |
3222 | * | |
3223 | * Compare @new_class and @new_id against @dev and determine | |
3224 | * whether @dev is the device indicated by @new_class and | |
3225 | * @new_id. | |
3226 | * | |
3227 | * LOCKING: | |
3228 | * None. | |
3229 | * | |
3230 | * RETURNS: | |
3231 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
3232 | */ | |
3233 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, | |
3234 | const u16 *new_id) | |
3235 | { | |
3236 | const u16 *old_id = dev->id; | |
3237 | unsigned char model[2][ATA_ID_PROD_LEN + 1]; | |
3238 | unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; | |
3239 | u64 new_n_sectors; | |
3240 | ||
3241 | if (dev->class != new_class) { | |
3242 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", | |
3243 | dev->class, new_class); | |
3244 | return 0; | |
3245 | } | |
3246 | ||
3247 | ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); | |
3248 | ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); | |
3249 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); | |
3250 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); | |
3251 | new_n_sectors = ata_id_n_sectors(new_id); | |
3252 | ||
3253 | if (strcmp(model[0], model[1])) { | |
3254 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " | |
3255 | "'%s' != '%s'\n", model[0], model[1]); | |
3256 | return 0; | |
3257 | } | |
3258 | ||
3259 | if (strcmp(serial[0], serial[1])) { | |
3260 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " | |
3261 | "'%s' != '%s'\n", serial[0], serial[1]); | |
3262 | return 0; | |
3263 | } | |
3264 | ||
3265 | if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) { | |
3266 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " | |
3267 | "%llu != %llu\n", | |
3268 | (unsigned long long)dev->n_sectors, | |
3269 | (unsigned long long)new_n_sectors); | |
3270 | return 0; | |
3271 | } | |
3272 | ||
3273 | return 1; | |
3274 | } | |
3275 | ||
3276 | /** | |
3277 | * ata_dev_revalidate - Revalidate ATA device | |
3278 | * @dev: device to revalidate | |
3279 | * @readid_flags: read ID flags | |
3280 | * | |
3281 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
3282 | * the port. | |
3283 | * | |
3284 | * LOCKING: | |
3285 | * Kernel thread context (may sleep) | |
3286 | * | |
3287 | * RETURNS: | |
3288 | * 0 on success, negative errno otherwise | |
3289 | */ | |
3290 | int ata_dev_revalidate(struct ata_device *dev, unsigned int readid_flags) | |
3291 | { | |
3292 | unsigned int class = dev->class; | |
3293 | u16 *id = (void *)dev->ap->sector_buf; | |
3294 | int rc; | |
3295 | ||
3296 | if (!ata_dev_enabled(dev)) { | |
3297 | rc = -ENODEV; | |
3298 | goto fail; | |
3299 | } | |
3300 | ||
3301 | /* read ID data */ | |
3302 | rc = ata_dev_read_id(dev, &class, readid_flags, id); | |
3303 | if (rc) | |
3304 | goto fail; | |
3305 | ||
3306 | /* is the device still there? */ | |
3307 | if (!ata_dev_same_device(dev, class, id)) { | |
3308 | rc = -ENODEV; | |
3309 | goto fail; | |
3310 | } | |
3311 | ||
3312 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); | |
3313 | ||
3314 | /* configure device according to the new ID */ | |
3315 | rc = ata_dev_configure(dev); | |
3316 | if (rc == 0) | |
3317 | return 0; | |
3318 | ||
3319 | fail: | |
3320 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); | |
3321 | return rc; | |
3322 | } | |
3323 | ||
3324 | struct ata_blacklist_entry { | |
3325 | const char *model_num; | |
3326 | const char *model_rev; | |
3327 | unsigned long horkage; | |
3328 | }; | |
3329 | ||
3330 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
3331 | /* Devices with DMA related problems under Linux */ | |
3332 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
3333 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
3334 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
3335 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
3336 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
3337 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
3338 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
3339 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
3340 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
3341 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
3342 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
3343 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
3344 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
3345 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
3346 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
3347 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
3348 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
3349 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
3350 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
3351 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
3352 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
3353 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
3354 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
3355 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
3356 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
3357 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
3358 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, | |
3359 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
3360 | { "SAMSUNG CD-ROM SN-124","N001", ATA_HORKAGE_NODMA }, | |
3361 | ||
3362 | /* Weird ATAPI devices */ | |
3363 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 | | |
3364 | ATA_HORKAGE_DMA_RW_ONLY }, | |
3365 | ||
3366 | /* Devices we expect to fail diagnostics */ | |
3367 | ||
3368 | /* Devices where NCQ should be avoided */ | |
3369 | /* NCQ is slow */ | |
3370 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, | |
3371 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ | |
3372 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, | |
3373 | /* NCQ is broken */ | |
3374 | { "Maxtor 6L250S0", "BANC1G10", ATA_HORKAGE_NONCQ }, | |
3375 | /* NCQ hard hangs device under heavier load, needs hard power cycle */ | |
3376 | { "Maxtor 6B250S0", "BANC1B70", ATA_HORKAGE_NONCQ }, | |
3377 | /* Blacklist entries taken from Silicon Image 3124/3132 | |
3378 | Windows driver .inf file - also several Linux problem reports */ | |
3379 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, | |
3380 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, | |
3381 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, | |
3382 | ||
3383 | /* Devices with NCQ limits */ | |
3384 | ||
3385 | /* End Marker */ | |
3386 | { } | |
3387 | }; | |
3388 | ||
3389 | unsigned long ata_device_blacklisted(const struct ata_device *dev) | |
3390 | { | |
3391 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; | |
3392 | unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; | |
3393 | const struct ata_blacklist_entry *ad = ata_device_blacklist; | |
3394 | ||
3395 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); | |
3396 | ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); | |
3397 | ||
3398 | while (ad->model_num) { | |
3399 | if (!strcmp(ad->model_num, model_num)) { | |
3400 | if (ad->model_rev == NULL) | |
3401 | return ad->horkage; | |
3402 | if (!strcmp(ad->model_rev, model_rev)) | |
3403 | return ad->horkage; | |
3404 | } | |
3405 | ad++; | |
3406 | } | |
3407 | return 0; | |
3408 | } | |
3409 | ||
3410 | static int ata_dma_blacklisted(const struct ata_device *dev) | |
3411 | { | |
3412 | /* We don't support polling DMA. | |
3413 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
3414 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
3415 | */ | |
3416 | if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) && | |
3417 | (dev->flags & ATA_DFLAG_CDB_INTR)) | |
3418 | return 1; | |
3419 | return (ata_device_blacklisted(dev) & ATA_HORKAGE_NODMA) ? 1 : 0; | |
3420 | } | |
3421 | ||
3422 | /** | |
3423 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
3424 | * @dev: Device to compute xfermask for | |
3425 | * | |
3426 | * Compute supported xfermask of @dev and store it in | |
3427 | * dev->*_mask. This function is responsible for applying all | |
3428 | * known limits including host controller limits, device | |
3429 | * blacklist, etc... | |
3430 | * | |
3431 | * LOCKING: | |
3432 | * None. | |
3433 | */ | |
3434 | static void ata_dev_xfermask(struct ata_device *dev) | |
3435 | { | |
3436 | struct ata_port *ap = dev->ap; | |
3437 | struct ata_host *host = ap->host; | |
3438 | unsigned long xfer_mask; | |
3439 | ||
3440 | /* controller modes available */ | |
3441 | xfer_mask = ata_pack_xfermask(ap->pio_mask, | |
3442 | ap->mwdma_mask, ap->udma_mask); | |
3443 | ||
3444 | /* Apply cable rule here. Don't apply it early because when | |
3445 | * we handle hot plug the cable type can itself change. | |
3446 | */ | |
3447 | if (ap->cbl == ATA_CBL_PATA40) | |
3448 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
3449 | /* Apply drive side cable rule. Unknown or 80 pin cables reported | |
3450 | * host side are checked drive side as well. Cases where we know a | |
3451 | * 40wire cable is used safely for 80 are not checked here. | |
3452 | */ | |
3453 | if (ata_drive_40wire(dev->id) && (ap->cbl == ATA_CBL_PATA_UNK || ap->cbl == ATA_CBL_PATA80)) | |
3454 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
3455 | ||
3456 | ||
3457 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, | |
3458 | dev->mwdma_mask, dev->udma_mask); | |
3459 | xfer_mask &= ata_id_xfermask(dev->id); | |
3460 | ||
3461 | /* | |
3462 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
3463 | * cable | |
3464 | */ | |
3465 | if (ata_dev_pair(dev)) { | |
3466 | /* No PIO5 or PIO6 */ | |
3467 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
3468 | /* No MWDMA3 or MWDMA 4 */ | |
3469 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
3470 | } | |
3471 | ||
3472 | if (ata_dma_blacklisted(dev)) { | |
3473 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
3474 | ata_dev_printk(dev, KERN_WARNING, | |
3475 | "device is on DMA blacklist, disabling DMA\n"); | |
3476 | } | |
3477 | ||
3478 | if ((host->flags & ATA_HOST_SIMPLEX) && | |
3479 | host->simplex_claimed && host->simplex_claimed != ap) { | |
3480 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
3481 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
3482 | "other device, disabling DMA\n"); | |
3483 | } | |
3484 | ||
3485 | if (ap->ops->mode_filter) | |
3486 | xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask); | |
3487 | ||
3488 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, | |
3489 | &dev->mwdma_mask, &dev->udma_mask); | |
3490 | } | |
3491 | ||
3492 | /** | |
3493 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
3494 | * @dev: Device to which command will be sent | |
3495 | * | |
3496 | * Issue SET FEATURES - XFER MODE command to device @dev | |
3497 | * on port @ap. | |
3498 | * | |
3499 | * LOCKING: | |
3500 | * PCI/etc. bus probe sem. | |
3501 | * | |
3502 | * RETURNS: | |
3503 | * 0 on success, AC_ERR_* mask otherwise. | |
3504 | */ | |
3505 | ||
3506 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) | |
3507 | { | |
3508 | struct ata_taskfile tf; | |
3509 | unsigned int err_mask; | |
3510 | ||
3511 | /* set up set-features taskfile */ | |
3512 | DPRINTK("set features - xfer mode\n"); | |
3513 | ||
3514 | ata_tf_init(dev, &tf); | |
3515 | tf.command = ATA_CMD_SET_FEATURES; | |
3516 | tf.feature = SETFEATURES_XFER; | |
3517 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3518 | tf.protocol = ATA_PROT_NODATA; | |
3519 | tf.nsect = dev->xfer_mode; | |
3520 | ||
3521 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
3522 | ||
3523 | DPRINTK("EXIT, err_mask=%x\n", err_mask); | |
3524 | return err_mask; | |
3525 | } | |
3526 | ||
3527 | /** | |
3528 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
3529 | * @dev: Device to which command will be sent | |
3530 | * @heads: Number of heads (taskfile parameter) | |
3531 | * @sectors: Number of sectors (taskfile parameter) | |
3532 | * | |
3533 | * LOCKING: | |
3534 | * Kernel thread context (may sleep) | |
3535 | * | |
3536 | * RETURNS: | |
3537 | * 0 on success, AC_ERR_* mask otherwise. | |
3538 | */ | |
3539 | static unsigned int ata_dev_init_params(struct ata_device *dev, | |
3540 | u16 heads, u16 sectors) | |
3541 | { | |
3542 | struct ata_taskfile tf; | |
3543 | unsigned int err_mask; | |
3544 | ||
3545 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
3546 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
3547 | return AC_ERR_INVALID; | |
3548 | ||
3549 | /* set up init dev params taskfile */ | |
3550 | DPRINTK("init dev params \n"); | |
3551 | ||
3552 | ata_tf_init(dev, &tf); | |
3553 | tf.command = ATA_CMD_INIT_DEV_PARAMS; | |
3554 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
3555 | tf.protocol = ATA_PROT_NODATA; | |
3556 | tf.nsect = sectors; | |
3557 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
3558 | ||
3559 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0); | |
3560 | ||
3561 | DPRINTK("EXIT, err_mask=%x\n", err_mask); | |
3562 | return err_mask; | |
3563 | } | |
3564 | ||
3565 | /** | |
3566 | * ata_sg_clean - Unmap DMA memory associated with command | |
3567 | * @qc: Command containing DMA memory to be released | |
3568 | * | |
3569 | * Unmap all mapped DMA memory associated with this command. | |
3570 | * | |
3571 | * LOCKING: | |
3572 | * spin_lock_irqsave(host lock) | |
3573 | */ | |
3574 | void ata_sg_clean(struct ata_queued_cmd *qc) | |
3575 | { | |
3576 | struct ata_port *ap = qc->ap; | |
3577 | struct scatterlist *sg = qc->__sg; | |
3578 | int dir = qc->dma_dir; | |
3579 | void *pad_buf = NULL; | |
3580 | ||
3581 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); | |
3582 | WARN_ON(sg == NULL); | |
3583 | ||
3584 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
3585 | WARN_ON(qc->n_elem > 1); | |
3586 | ||
3587 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); | |
3588 | ||
3589 | /* if we padded the buffer out to 32-bit bound, and data | |
3590 | * xfer direction is from-device, we must copy from the | |
3591 | * pad buffer back into the supplied buffer | |
3592 | */ | |
3593 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
3594 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3595 | ||
3596 | if (qc->flags & ATA_QCFLAG_SG) { | |
3597 | if (qc->n_elem) | |
3598 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); | |
3599 | /* restore last sg */ | |
3600 | sg[qc->orig_n_elem - 1].length += qc->pad_len; | |
3601 | if (pad_buf) { | |
3602 | struct scatterlist *psg = &qc->pad_sgent; | |
3603 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3604 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); | |
3605 | kunmap_atomic(addr, KM_IRQ0); | |
3606 | } | |
3607 | } else { | |
3608 | if (qc->n_elem) | |
3609 | dma_unmap_single(ap->dev, | |
3610 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), | |
3611 | dir); | |
3612 | /* restore sg */ | |
3613 | sg->length += qc->pad_len; | |
3614 | if (pad_buf) | |
3615 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
3616 | pad_buf, qc->pad_len); | |
3617 | } | |
3618 | ||
3619 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
3620 | qc->__sg = NULL; | |
3621 | } | |
3622 | ||
3623 | /** | |
3624 | * ata_fill_sg - Fill PCI IDE PRD table | |
3625 | * @qc: Metadata associated with taskfile to be transferred | |
3626 | * | |
3627 | * Fill PCI IDE PRD (scatter-gather) table with segments | |
3628 | * associated with the current disk command. | |
3629 | * | |
3630 | * LOCKING: | |
3631 | * spin_lock_irqsave(host lock) | |
3632 | * | |
3633 | */ | |
3634 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
3635 | { | |
3636 | struct ata_port *ap = qc->ap; | |
3637 | struct scatterlist *sg; | |
3638 | unsigned int idx; | |
3639 | ||
3640 | WARN_ON(qc->__sg == NULL); | |
3641 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); | |
3642 | ||
3643 | idx = 0; | |
3644 | ata_for_each_sg(sg, qc) { | |
3645 | u32 addr, offset; | |
3646 | u32 sg_len, len; | |
3647 | ||
3648 | /* determine if physical DMA addr spans 64K boundary. | |
3649 | * Note h/w doesn't support 64-bit, so we unconditionally | |
3650 | * truncate dma_addr_t to u32. | |
3651 | */ | |
3652 | addr = (u32) sg_dma_address(sg); | |
3653 | sg_len = sg_dma_len(sg); | |
3654 | ||
3655 | while (sg_len) { | |
3656 | offset = addr & 0xffff; | |
3657 | len = sg_len; | |
3658 | if ((offset + sg_len) > 0x10000) | |
3659 | len = 0x10000 - offset; | |
3660 | ||
3661 | ap->prd[idx].addr = cpu_to_le32(addr); | |
3662 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
3663 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
3664 | ||
3665 | idx++; | |
3666 | sg_len -= len; | |
3667 | addr += len; | |
3668 | } | |
3669 | } | |
3670 | ||
3671 | if (idx) | |
3672 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
3673 | } | |
3674 | /** | |
3675 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
3676 | * @qc: Metadata associated with taskfile to check | |
3677 | * | |
3678 | * Allow low-level driver to filter ATA PACKET commands, returning | |
3679 | * a status indicating whether or not it is OK to use DMA for the | |
3680 | * supplied PACKET command. | |
3681 | * | |
3682 | * LOCKING: | |
3683 | * spin_lock_irqsave(host lock) | |
3684 | * | |
3685 | * RETURNS: 0 when ATAPI DMA can be used | |
3686 | * nonzero otherwise | |
3687 | */ | |
3688 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
3689 | { | |
3690 | struct ata_port *ap = qc->ap; | |
3691 | int rc = 0; /* Assume ATAPI DMA is OK by default */ | |
3692 | ||
3693 | /* some drives can only do ATAPI DMA on read/write */ | |
3694 | if (unlikely(qc->dev->horkage & ATA_HORKAGE_DMA_RW_ONLY)) { | |
3695 | struct scsi_cmnd *cmd = qc->scsicmd; | |
3696 | u8 *scsicmd = cmd->cmnd; | |
3697 | ||
3698 | switch (scsicmd[0]) { | |
3699 | case READ_10: | |
3700 | case WRITE_10: | |
3701 | case READ_12: | |
3702 | case WRITE_12: | |
3703 | case READ_6: | |
3704 | case WRITE_6: | |
3705 | /* atapi dma maybe ok */ | |
3706 | break; | |
3707 | default: | |
3708 | /* turn off atapi dma */ | |
3709 | return 1; | |
3710 | } | |
3711 | } | |
3712 | ||
3713 | if (ap->ops->check_atapi_dma) | |
3714 | rc = ap->ops->check_atapi_dma(qc); | |
3715 | ||
3716 | return rc; | |
3717 | } | |
3718 | /** | |
3719 | * ata_qc_prep - Prepare taskfile for submission | |
3720 | * @qc: Metadata associated with taskfile to be prepared | |
3721 | * | |
3722 | * Prepare ATA taskfile for submission. | |
3723 | * | |
3724 | * LOCKING: | |
3725 | * spin_lock_irqsave(host lock) | |
3726 | */ | |
3727 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
3728 | { | |
3729 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
3730 | return; | |
3731 | ||
3732 | ata_fill_sg(qc); | |
3733 | } | |
3734 | ||
3735 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } | |
3736 | ||
3737 | /** | |
3738 | * ata_sg_init_one - Associate command with memory buffer | |
3739 | * @qc: Command to be associated | |
3740 | * @buf: Memory buffer | |
3741 | * @buflen: Length of memory buffer, in bytes. | |
3742 | * | |
3743 | * Initialize the data-related elements of queued_cmd @qc | |
3744 | * to point to a single memory buffer, @buf of byte length @buflen. | |
3745 | * | |
3746 | * LOCKING: | |
3747 | * spin_lock_irqsave(host lock) | |
3748 | */ | |
3749 | ||
3750 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) | |
3751 | { | |
3752 | qc->flags |= ATA_QCFLAG_SINGLE; | |
3753 | ||
3754 | qc->__sg = &qc->sgent; | |
3755 | qc->n_elem = 1; | |
3756 | qc->orig_n_elem = 1; | |
3757 | qc->buf_virt = buf; | |
3758 | qc->nbytes = buflen; | |
3759 | ||
3760 | sg_init_one(&qc->sgent, buf, buflen); | |
3761 | } | |
3762 | ||
3763 | /** | |
3764 | * ata_sg_init - Associate command with scatter-gather table. | |
3765 | * @qc: Command to be associated | |
3766 | * @sg: Scatter-gather table. | |
3767 | * @n_elem: Number of elements in s/g table. | |
3768 | * | |
3769 | * Initialize the data-related elements of queued_cmd @qc | |
3770 | * to point to a scatter-gather table @sg, containing @n_elem | |
3771 | * elements. | |
3772 | * | |
3773 | * LOCKING: | |
3774 | * spin_lock_irqsave(host lock) | |
3775 | */ | |
3776 | ||
3777 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, | |
3778 | unsigned int n_elem) | |
3779 | { | |
3780 | qc->flags |= ATA_QCFLAG_SG; | |
3781 | qc->__sg = sg; | |
3782 | qc->n_elem = n_elem; | |
3783 | qc->orig_n_elem = n_elem; | |
3784 | } | |
3785 | ||
3786 | /** | |
3787 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. | |
3788 | * @qc: Command with memory buffer to be mapped. | |
3789 | * | |
3790 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
3791 | * | |
3792 | * LOCKING: | |
3793 | * spin_lock_irqsave(host lock) | |
3794 | * | |
3795 | * RETURNS: | |
3796 | * Zero on success, negative on error. | |
3797 | */ | |
3798 | ||
3799 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
3800 | { | |
3801 | struct ata_port *ap = qc->ap; | |
3802 | int dir = qc->dma_dir; | |
3803 | struct scatterlist *sg = qc->__sg; | |
3804 | dma_addr_t dma_address; | |
3805 | int trim_sg = 0; | |
3806 | ||
3807 | /* we must lengthen transfers to end on a 32-bit boundary */ | |
3808 | qc->pad_len = sg->length & 3; | |
3809 | if (qc->pad_len) { | |
3810 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3811 | struct scatterlist *psg = &qc->pad_sgent; | |
3812 | ||
3813 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); | |
3814 | ||
3815 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3816 | ||
3817 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
3818 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
3819 | qc->pad_len); | |
3820 | ||
3821 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3822 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3823 | /* trim sg */ | |
3824 | sg->length -= qc->pad_len; | |
3825 | if (sg->length == 0) | |
3826 | trim_sg = 1; | |
3827 | ||
3828 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
3829 | sg->length, qc->pad_len); | |
3830 | } | |
3831 | ||
3832 | if (trim_sg) { | |
3833 | qc->n_elem--; | |
3834 | goto skip_map; | |
3835 | } | |
3836 | ||
3837 | dma_address = dma_map_single(ap->dev, qc->buf_virt, | |
3838 | sg->length, dir); | |
3839 | if (dma_mapping_error(dma_address)) { | |
3840 | /* restore sg */ | |
3841 | sg->length += qc->pad_len; | |
3842 | return -1; | |
3843 | } | |
3844 | ||
3845 | sg_dma_address(sg) = dma_address; | |
3846 | sg_dma_len(sg) = sg->length; | |
3847 | ||
3848 | skip_map: | |
3849 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), | |
3850 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
3851 | ||
3852 | return 0; | |
3853 | } | |
3854 | ||
3855 | /** | |
3856 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. | |
3857 | * @qc: Command with scatter-gather table to be mapped. | |
3858 | * | |
3859 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
3860 | * | |
3861 | * LOCKING: | |
3862 | * spin_lock_irqsave(host lock) | |
3863 | * | |
3864 | * RETURNS: | |
3865 | * Zero on success, negative on error. | |
3866 | * | |
3867 | */ | |
3868 | ||
3869 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
3870 | { | |
3871 | struct ata_port *ap = qc->ap; | |
3872 | struct scatterlist *sg = qc->__sg; | |
3873 | struct scatterlist *lsg = &sg[qc->n_elem - 1]; | |
3874 | int n_elem, pre_n_elem, dir, trim_sg = 0; | |
3875 | ||
3876 | VPRINTK("ENTER, ata%u\n", ap->print_id); | |
3877 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); | |
3878 | ||
3879 | /* we must lengthen transfers to end on a 32-bit boundary */ | |
3880 | qc->pad_len = lsg->length & 3; | |
3881 | if (qc->pad_len) { | |
3882 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
3883 | struct scatterlist *psg = &qc->pad_sgent; | |
3884 | unsigned int offset; | |
3885 | ||
3886 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); | |
3887 | ||
3888 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
3889 | ||
3890 | /* | |
3891 | * psg->page/offset are used to copy to-be-written | |
3892 | * data in this function or read data in ata_sg_clean. | |
3893 | */ | |
3894 | offset = lsg->offset + lsg->length - qc->pad_len; | |
3895 | psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT); | |
3896 | psg->offset = offset_in_page(offset); | |
3897 | ||
3898 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
3899 | void *addr = kmap_atomic(psg->page, KM_IRQ0); | |
3900 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); | |
3901 | kunmap_atomic(addr, KM_IRQ0); | |
3902 | } | |
3903 | ||
3904 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
3905 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
3906 | /* trim last sg */ | |
3907 | lsg->length -= qc->pad_len; | |
3908 | if (lsg->length == 0) | |
3909 | trim_sg = 1; | |
3910 | ||
3911 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
3912 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
3913 | } | |
3914 | ||
3915 | pre_n_elem = qc->n_elem; | |
3916 | if (trim_sg && pre_n_elem) | |
3917 | pre_n_elem--; | |
3918 | ||
3919 | if (!pre_n_elem) { | |
3920 | n_elem = 0; | |
3921 | goto skip_map; | |
3922 | } | |
3923 | ||
3924 | dir = qc->dma_dir; | |
3925 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); | |
3926 | if (n_elem < 1) { | |
3927 | /* restore last sg */ | |
3928 | lsg->length += qc->pad_len; | |
3929 | return -1; | |
3930 | } | |
3931 | ||
3932 | DPRINTK("%d sg elements mapped\n", n_elem); | |
3933 | ||
3934 | skip_map: | |
3935 | qc->n_elem = n_elem; | |
3936 | ||
3937 | return 0; | |
3938 | } | |
3939 | ||
3940 | /** | |
3941 | * swap_buf_le16 - swap halves of 16-bit words in place | |
3942 | * @buf: Buffer to swap | |
3943 | * @buf_words: Number of 16-bit words in buffer. | |
3944 | * | |
3945 | * Swap halves of 16-bit words if needed to convert from | |
3946 | * little-endian byte order to native cpu byte order, or | |
3947 | * vice-versa. | |
3948 | * | |
3949 | * LOCKING: | |
3950 | * Inherited from caller. | |
3951 | */ | |
3952 | void swap_buf_le16(u16 *buf, unsigned int buf_words) | |
3953 | { | |
3954 | #ifdef __BIG_ENDIAN | |
3955 | unsigned int i; | |
3956 | ||
3957 | for (i = 0; i < buf_words; i++) | |
3958 | buf[i] = le16_to_cpu(buf[i]); | |
3959 | #endif /* __BIG_ENDIAN */ | |
3960 | } | |
3961 | ||
3962 | /** | |
3963 | * ata_data_xfer - Transfer data by PIO | |
3964 | * @adev: device to target | |
3965 | * @buf: data buffer | |
3966 | * @buflen: buffer length | |
3967 | * @write_data: read/write | |
3968 | * | |
3969 | * Transfer data from/to the device data register by PIO. | |
3970 | * | |
3971 | * LOCKING: | |
3972 | * Inherited from caller. | |
3973 | */ | |
3974 | void ata_data_xfer(struct ata_device *adev, unsigned char *buf, | |
3975 | unsigned int buflen, int write_data) | |
3976 | { | |
3977 | struct ata_port *ap = adev->ap; | |
3978 | unsigned int words = buflen >> 1; | |
3979 | ||
3980 | /* Transfer multiple of 2 bytes */ | |
3981 | if (write_data) | |
3982 | iowrite16_rep(ap->ioaddr.data_addr, buf, words); | |
3983 | else | |
3984 | ioread16_rep(ap->ioaddr.data_addr, buf, words); | |
3985 | ||
3986 | /* Transfer trailing 1 byte, if any. */ | |
3987 | if (unlikely(buflen & 0x01)) { | |
3988 | u16 align_buf[1] = { 0 }; | |
3989 | unsigned char *trailing_buf = buf + buflen - 1; | |
3990 | ||
3991 | if (write_data) { | |
3992 | memcpy(align_buf, trailing_buf, 1); | |
3993 | iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | |
3994 | } else { | |
3995 | align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); | |
3996 | memcpy(trailing_buf, align_buf, 1); | |
3997 | } | |
3998 | } | |
3999 | } | |
4000 | ||
4001 | /** | |
4002 | * ata_data_xfer_noirq - Transfer data by PIO | |
4003 | * @adev: device to target | |
4004 | * @buf: data buffer | |
4005 | * @buflen: buffer length | |
4006 | * @write_data: read/write | |
4007 | * | |
4008 | * Transfer data from/to the device data register by PIO. Do the | |
4009 | * transfer with interrupts disabled. | |
4010 | * | |
4011 | * LOCKING: | |
4012 | * Inherited from caller. | |
4013 | */ | |
4014 | void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, | |
4015 | unsigned int buflen, int write_data) | |
4016 | { | |
4017 | unsigned long flags; | |
4018 | local_irq_save(flags); | |
4019 | ata_data_xfer(adev, buf, buflen, write_data); | |
4020 | local_irq_restore(flags); | |
4021 | } | |
4022 | ||
4023 | ||
4024 | /** | |
4025 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | |
4026 | * @qc: Command on going | |
4027 | * | |
4028 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | |
4029 | * | |
4030 | * LOCKING: | |
4031 | * Inherited from caller. | |
4032 | */ | |
4033 | ||
4034 | static void ata_pio_sector(struct ata_queued_cmd *qc) | |
4035 | { | |
4036 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
4037 | struct scatterlist *sg = qc->__sg; | |
4038 | struct ata_port *ap = qc->ap; | |
4039 | struct page *page; | |
4040 | unsigned int offset; | |
4041 | unsigned char *buf; | |
4042 | ||
4043 | if (qc->curbytes == qc->nbytes - ATA_SECT_SIZE) | |
4044 | ap->hsm_task_state = HSM_ST_LAST; | |
4045 | ||
4046 | page = sg[qc->cursg].page; | |
4047 | offset = sg[qc->cursg].offset + qc->cursg_ofs; | |
4048 | ||
4049 | /* get the current page and offset */ | |
4050 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4051 | offset %= PAGE_SIZE; | |
4052 | ||
4053 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
4054 | ||
4055 | if (PageHighMem(page)) { | |
4056 | unsigned long flags; | |
4057 | ||
4058 | /* FIXME: use a bounce buffer */ | |
4059 | local_irq_save(flags); | |
4060 | buf = kmap_atomic(page, KM_IRQ0); | |
4061 | ||
4062 | /* do the actual data transfer */ | |
4063 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); | |
4064 | ||
4065 | kunmap_atomic(buf, KM_IRQ0); | |
4066 | local_irq_restore(flags); | |
4067 | } else { | |
4068 | buf = page_address(page); | |
4069 | ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write); | |
4070 | } | |
4071 | ||
4072 | qc->curbytes += ATA_SECT_SIZE; | |
4073 | qc->cursg_ofs += ATA_SECT_SIZE; | |
4074 | ||
4075 | if (qc->cursg_ofs == (&sg[qc->cursg])->length) { | |
4076 | qc->cursg++; | |
4077 | qc->cursg_ofs = 0; | |
4078 | } | |
4079 | } | |
4080 | ||
4081 | /** | |
4082 | * ata_pio_sectors - Transfer one or many 512-byte sectors. | |
4083 | * @qc: Command on going | |
4084 | * | |
4085 | * Transfer one or many ATA_SECT_SIZE of data from/to the | |
4086 | * ATA device for the DRQ request. | |
4087 | * | |
4088 | * LOCKING: | |
4089 | * Inherited from caller. | |
4090 | */ | |
4091 | ||
4092 | static void ata_pio_sectors(struct ata_queued_cmd *qc) | |
4093 | { | |
4094 | if (is_multi_taskfile(&qc->tf)) { | |
4095 | /* READ/WRITE MULTIPLE */ | |
4096 | unsigned int nsect; | |
4097 | ||
4098 | WARN_ON(qc->dev->multi_count == 0); | |
4099 | ||
4100 | nsect = min((qc->nbytes - qc->curbytes) / ATA_SECT_SIZE, | |
4101 | qc->dev->multi_count); | |
4102 | while (nsect--) | |
4103 | ata_pio_sector(qc); | |
4104 | } else | |
4105 | ata_pio_sector(qc); | |
4106 | } | |
4107 | ||
4108 | /** | |
4109 | * atapi_send_cdb - Write CDB bytes to hardware | |
4110 | * @ap: Port to which ATAPI device is attached. | |
4111 | * @qc: Taskfile currently active | |
4112 | * | |
4113 | * When device has indicated its readiness to accept | |
4114 | * a CDB, this function is called. Send the CDB. | |
4115 | * | |
4116 | * LOCKING: | |
4117 | * caller. | |
4118 | */ | |
4119 | ||
4120 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4121 | { | |
4122 | /* send SCSI cdb */ | |
4123 | DPRINTK("send cdb\n"); | |
4124 | WARN_ON(qc->dev->cdb_len < 12); | |
4125 | ||
4126 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); | |
4127 | ata_altstatus(ap); /* flush */ | |
4128 | ||
4129 | switch (qc->tf.protocol) { | |
4130 | case ATA_PROT_ATAPI: | |
4131 | ap->hsm_task_state = HSM_ST; | |
4132 | break; | |
4133 | case ATA_PROT_ATAPI_NODATA: | |
4134 | ap->hsm_task_state = HSM_ST_LAST; | |
4135 | break; | |
4136 | case ATA_PROT_ATAPI_DMA: | |
4137 | ap->hsm_task_state = HSM_ST_LAST; | |
4138 | /* initiate bmdma */ | |
4139 | ap->ops->bmdma_start(qc); | |
4140 | break; | |
4141 | } | |
4142 | } | |
4143 | ||
4144 | /** | |
4145 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4146 | * @qc: Command on going | |
4147 | * @bytes: number of bytes | |
4148 | * | |
4149 | * Transfer Transfer data from/to the ATAPI device. | |
4150 | * | |
4151 | * LOCKING: | |
4152 | * Inherited from caller. | |
4153 | * | |
4154 | */ | |
4155 | ||
4156 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | |
4157 | { | |
4158 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
4159 | struct scatterlist *sg = qc->__sg; | |
4160 | struct ata_port *ap = qc->ap; | |
4161 | struct page *page; | |
4162 | unsigned char *buf; | |
4163 | unsigned int offset, count; | |
4164 | ||
4165 | if (qc->curbytes + bytes >= qc->nbytes) | |
4166 | ap->hsm_task_state = HSM_ST_LAST; | |
4167 | ||
4168 | next_sg: | |
4169 | if (unlikely(qc->cursg >= qc->n_elem)) { | |
4170 | /* | |
4171 | * The end of qc->sg is reached and the device expects | |
4172 | * more data to transfer. In order not to overrun qc->sg | |
4173 | * and fulfill length specified in the byte count register, | |
4174 | * - for read case, discard trailing data from the device | |
4175 | * - for write case, padding zero data to the device | |
4176 | */ | |
4177 | u16 pad_buf[1] = { 0 }; | |
4178 | unsigned int words = bytes >> 1; | |
4179 | unsigned int i; | |
4180 | ||
4181 | if (words) /* warning if bytes > 1 */ | |
4182 | ata_dev_printk(qc->dev, KERN_WARNING, | |
4183 | "%u bytes trailing data\n", bytes); | |
4184 | ||
4185 | for (i = 0; i < words; i++) | |
4186 | ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write); | |
4187 | ||
4188 | ap->hsm_task_state = HSM_ST_LAST; | |
4189 | return; | |
4190 | } | |
4191 | ||
4192 | sg = &qc->__sg[qc->cursg]; | |
4193 | ||
4194 | page = sg->page; | |
4195 | offset = sg->offset + qc->cursg_ofs; | |
4196 | ||
4197 | /* get the current page and offset */ | |
4198 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
4199 | offset %= PAGE_SIZE; | |
4200 | ||
4201 | /* don't overrun current sg */ | |
4202 | count = min(sg->length - qc->cursg_ofs, bytes); | |
4203 | ||
4204 | /* don't cross page boundaries */ | |
4205 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
4206 | ||
4207 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
4208 | ||
4209 | if (PageHighMem(page)) { | |
4210 | unsigned long flags; | |
4211 | ||
4212 | /* FIXME: use bounce buffer */ | |
4213 | local_irq_save(flags); | |
4214 | buf = kmap_atomic(page, KM_IRQ0); | |
4215 | ||
4216 | /* do the actual data transfer */ | |
4217 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); | |
4218 | ||
4219 | kunmap_atomic(buf, KM_IRQ0); | |
4220 | local_irq_restore(flags); | |
4221 | } else { | |
4222 | buf = page_address(page); | |
4223 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); | |
4224 | } | |
4225 | ||
4226 | bytes -= count; | |
4227 | qc->curbytes += count; | |
4228 | qc->cursg_ofs += count; | |
4229 | ||
4230 | if (qc->cursg_ofs == sg->length) { | |
4231 | qc->cursg++; | |
4232 | qc->cursg_ofs = 0; | |
4233 | } | |
4234 | ||
4235 | if (bytes) | |
4236 | goto next_sg; | |
4237 | } | |
4238 | ||
4239 | /** | |
4240 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
4241 | * @qc: Command on going | |
4242 | * | |
4243 | * Transfer Transfer data from/to the ATAPI device. | |
4244 | * | |
4245 | * LOCKING: | |
4246 | * Inherited from caller. | |
4247 | */ | |
4248 | ||
4249 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) | |
4250 | { | |
4251 | struct ata_port *ap = qc->ap; | |
4252 | struct ata_device *dev = qc->dev; | |
4253 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
4254 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
4255 | ||
4256 | /* Abuse qc->result_tf for temp storage of intermediate TF | |
4257 | * here to save some kernel stack usage. | |
4258 | * For normal completion, qc->result_tf is not relevant. For | |
4259 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
4260 | * So, the correctness of qc->result_tf is not affected. | |
4261 | */ | |
4262 | ap->ops->tf_read(ap, &qc->result_tf); | |
4263 | ireason = qc->result_tf.nsect; | |
4264 | bc_lo = qc->result_tf.lbam; | |
4265 | bc_hi = qc->result_tf.lbah; | |
4266 | bytes = (bc_hi << 8) | bc_lo; | |
4267 | ||
4268 | /* shall be cleared to zero, indicating xfer of data */ | |
4269 | if (ireason & (1 << 0)) | |
4270 | goto err_out; | |
4271 | ||
4272 | /* make sure transfer direction matches expected */ | |
4273 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
4274 | if (do_write != i_write) | |
4275 | goto err_out; | |
4276 | ||
4277 | VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); | |
4278 | ||
4279 | __atapi_pio_bytes(qc, bytes); | |
4280 | ||
4281 | return; | |
4282 | ||
4283 | err_out: | |
4284 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); | |
4285 | qc->err_mask |= AC_ERR_HSM; | |
4286 | ap->hsm_task_state = HSM_ST_ERR; | |
4287 | } | |
4288 | ||
4289 | /** | |
4290 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. | |
4291 | * @ap: the target ata_port | |
4292 | * @qc: qc on going | |
4293 | * | |
4294 | * RETURNS: | |
4295 | * 1 if ok in workqueue, 0 otherwise. | |
4296 | */ | |
4297 | ||
4298 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
4299 | { | |
4300 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
4301 | return 1; | |
4302 | ||
4303 | if (ap->hsm_task_state == HSM_ST_FIRST) { | |
4304 | if (qc->tf.protocol == ATA_PROT_PIO && | |
4305 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
4306 | return 1; | |
4307 | ||
4308 | if (is_atapi_taskfile(&qc->tf) && | |
4309 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
4310 | return 1; | |
4311 | } | |
4312 | ||
4313 | return 0; | |
4314 | } | |
4315 | ||
4316 | /** | |
4317 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
4318 | * @qc: Command to complete | |
4319 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4320 | * | |
4321 | * Finish @qc which is running on standard HSM. | |
4322 | * | |
4323 | * LOCKING: | |
4324 | * If @in_wq is zero, spin_lock_irqsave(host lock). | |
4325 | * Otherwise, none on entry and grabs host lock. | |
4326 | */ | |
4327 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
4328 | { | |
4329 | struct ata_port *ap = qc->ap; | |
4330 | unsigned long flags; | |
4331 | ||
4332 | if (ap->ops->error_handler) { | |
4333 | if (in_wq) { | |
4334 | spin_lock_irqsave(ap->lock, flags); | |
4335 | ||
4336 | /* EH might have kicked in while host lock is | |
4337 | * released. | |
4338 | */ | |
4339 | qc = ata_qc_from_tag(ap, qc->tag); | |
4340 | if (qc) { | |
4341 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
4342 | ap->ops->irq_on(ap); | |
4343 | ata_qc_complete(qc); | |
4344 | } else | |
4345 | ata_port_freeze(ap); | |
4346 | } | |
4347 | ||
4348 | spin_unlock_irqrestore(ap->lock, flags); | |
4349 | } else { | |
4350 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
4351 | ata_qc_complete(qc); | |
4352 | else | |
4353 | ata_port_freeze(ap); | |
4354 | } | |
4355 | } else { | |
4356 | if (in_wq) { | |
4357 | spin_lock_irqsave(ap->lock, flags); | |
4358 | ap->ops->irq_on(ap); | |
4359 | ata_qc_complete(qc); | |
4360 | spin_unlock_irqrestore(ap->lock, flags); | |
4361 | } else | |
4362 | ata_qc_complete(qc); | |
4363 | } | |
4364 | ||
4365 | ata_altstatus(ap); /* flush */ | |
4366 | } | |
4367 | ||
4368 | /** | |
4369 | * ata_hsm_move - move the HSM to the next state. | |
4370 | * @ap: the target ata_port | |
4371 | * @qc: qc on going | |
4372 | * @status: current device status | |
4373 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
4374 | * | |
4375 | * RETURNS: | |
4376 | * 1 when poll next status needed, 0 otherwise. | |
4377 | */ | |
4378 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, | |
4379 | u8 status, int in_wq) | |
4380 | { | |
4381 | unsigned long flags = 0; | |
4382 | int poll_next; | |
4383 | ||
4384 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); | |
4385 | ||
4386 | /* Make sure ata_qc_issue_prot() does not throw things | |
4387 | * like DMA polling into the workqueue. Notice that | |
4388 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
4389 | */ | |
4390 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); | |
4391 | ||
4392 | fsm_start: | |
4393 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", | |
4394 | ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); | |
4395 | ||
4396 | switch (ap->hsm_task_state) { | |
4397 | case HSM_ST_FIRST: | |
4398 | /* Send first data block or PACKET CDB */ | |
4399 | ||
4400 | /* If polling, we will stay in the work queue after | |
4401 | * sending the data. Otherwise, interrupt handler | |
4402 | * takes over after sending the data. | |
4403 | */ | |
4404 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
4405 | ||
4406 | /* check device status */ | |
4407 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4408 | /* handle BSY=0, DRQ=0 as error */ | |
4409 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4410 | /* device stops HSM for abort/error */ | |
4411 | qc->err_mask |= AC_ERR_DEV; | |
4412 | else | |
4413 | /* HSM violation. Let EH handle this */ | |
4414 | qc->err_mask |= AC_ERR_HSM; | |
4415 | ||
4416 | ap->hsm_task_state = HSM_ST_ERR; | |
4417 | goto fsm_start; | |
4418 | } | |
4419 | ||
4420 | /* Device should not ask for data transfer (DRQ=1) | |
4421 | * when it finds something wrong. | |
4422 | * We ignore DRQ here and stop the HSM by | |
4423 | * changing hsm_task_state to HSM_ST_ERR and | |
4424 | * let the EH abort the command or reset the device. | |
4425 | */ | |
4426 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4427 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " | |
4428 | "error, dev_stat 0x%X\n", status); | |
4429 | qc->err_mask |= AC_ERR_HSM; | |
4430 | ap->hsm_task_state = HSM_ST_ERR; | |
4431 | goto fsm_start; | |
4432 | } | |
4433 | ||
4434 | /* Send the CDB (atapi) or the first data block (ata pio out). | |
4435 | * During the state transition, interrupt handler shouldn't | |
4436 | * be invoked before the data transfer is complete and | |
4437 | * hsm_task_state is changed. Hence, the following locking. | |
4438 | */ | |
4439 | if (in_wq) | |
4440 | spin_lock_irqsave(ap->lock, flags); | |
4441 | ||
4442 | if (qc->tf.protocol == ATA_PROT_PIO) { | |
4443 | /* PIO data out protocol. | |
4444 | * send first data block. | |
4445 | */ | |
4446 | ||
4447 | /* ata_pio_sectors() might change the state | |
4448 | * to HSM_ST_LAST. so, the state is changed here | |
4449 | * before ata_pio_sectors(). | |
4450 | */ | |
4451 | ap->hsm_task_state = HSM_ST; | |
4452 | ata_pio_sectors(qc); | |
4453 | ata_altstatus(ap); /* flush */ | |
4454 | } else | |
4455 | /* send CDB */ | |
4456 | atapi_send_cdb(ap, qc); | |
4457 | ||
4458 | if (in_wq) | |
4459 | spin_unlock_irqrestore(ap->lock, flags); | |
4460 | ||
4461 | /* if polling, ata_pio_task() handles the rest. | |
4462 | * otherwise, interrupt handler takes over from here. | |
4463 | */ | |
4464 | break; | |
4465 | ||
4466 | case HSM_ST: | |
4467 | /* complete command or read/write the data register */ | |
4468 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
4469 | /* ATAPI PIO protocol */ | |
4470 | if ((status & ATA_DRQ) == 0) { | |
4471 | /* No more data to transfer or device error. | |
4472 | * Device error will be tagged in HSM_ST_LAST. | |
4473 | */ | |
4474 | ap->hsm_task_state = HSM_ST_LAST; | |
4475 | goto fsm_start; | |
4476 | } | |
4477 | ||
4478 | /* Device should not ask for data transfer (DRQ=1) | |
4479 | * when it finds something wrong. | |
4480 | * We ignore DRQ here and stop the HSM by | |
4481 | * changing hsm_task_state to HSM_ST_ERR and | |
4482 | * let the EH abort the command or reset the device. | |
4483 | */ | |
4484 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4485 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " | |
4486 | "device error, dev_stat 0x%X\n", | |
4487 | status); | |
4488 | qc->err_mask |= AC_ERR_HSM; | |
4489 | ap->hsm_task_state = HSM_ST_ERR; | |
4490 | goto fsm_start; | |
4491 | } | |
4492 | ||
4493 | atapi_pio_bytes(qc); | |
4494 | ||
4495 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) | |
4496 | /* bad ireason reported by device */ | |
4497 | goto fsm_start; | |
4498 | ||
4499 | } else { | |
4500 | /* ATA PIO protocol */ | |
4501 | if (unlikely((status & ATA_DRQ) == 0)) { | |
4502 | /* handle BSY=0, DRQ=0 as error */ | |
4503 | if (likely(status & (ATA_ERR | ATA_DF))) | |
4504 | /* device stops HSM for abort/error */ | |
4505 | qc->err_mask |= AC_ERR_DEV; | |
4506 | else | |
4507 | /* HSM violation. Let EH handle this. | |
4508 | * Phantom devices also trigger this | |
4509 | * condition. Mark hint. | |
4510 | */ | |
4511 | qc->err_mask |= AC_ERR_HSM | | |
4512 | AC_ERR_NODEV_HINT; | |
4513 | ||
4514 | ap->hsm_task_state = HSM_ST_ERR; | |
4515 | goto fsm_start; | |
4516 | } | |
4517 | ||
4518 | /* For PIO reads, some devices may ask for | |
4519 | * data transfer (DRQ=1) alone with ERR=1. | |
4520 | * We respect DRQ here and transfer one | |
4521 | * block of junk data before changing the | |
4522 | * hsm_task_state to HSM_ST_ERR. | |
4523 | * | |
4524 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
4525 | * sense since the data block has been | |
4526 | * transferred to the device. | |
4527 | */ | |
4528 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
4529 | /* data might be corrputed */ | |
4530 | qc->err_mask |= AC_ERR_DEV; | |
4531 | ||
4532 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
4533 | ata_pio_sectors(qc); | |
4534 | ata_altstatus(ap); | |
4535 | status = ata_wait_idle(ap); | |
4536 | } | |
4537 | ||
4538 | if (status & (ATA_BUSY | ATA_DRQ)) | |
4539 | qc->err_mask |= AC_ERR_HSM; | |
4540 | ||
4541 | /* ata_pio_sectors() might change the | |
4542 | * state to HSM_ST_LAST. so, the state | |
4543 | * is changed after ata_pio_sectors(). | |
4544 | */ | |
4545 | ap->hsm_task_state = HSM_ST_ERR; | |
4546 | goto fsm_start; | |
4547 | } | |
4548 | ||
4549 | ata_pio_sectors(qc); | |
4550 | ||
4551 | if (ap->hsm_task_state == HSM_ST_LAST && | |
4552 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
4553 | /* all data read */ | |
4554 | ata_altstatus(ap); | |
4555 | status = ata_wait_idle(ap); | |
4556 | goto fsm_start; | |
4557 | } | |
4558 | } | |
4559 | ||
4560 | ata_altstatus(ap); /* flush */ | |
4561 | poll_next = 1; | |
4562 | break; | |
4563 | ||
4564 | case HSM_ST_LAST: | |
4565 | if (unlikely(!ata_ok(status))) { | |
4566 | qc->err_mask |= __ac_err_mask(status); | |
4567 | ap->hsm_task_state = HSM_ST_ERR; | |
4568 | goto fsm_start; | |
4569 | } | |
4570 | ||
4571 | /* no more data to transfer */ | |
4572 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", | |
4573 | ap->print_id, qc->dev->devno, status); | |
4574 | ||
4575 | WARN_ON(qc->err_mask); | |
4576 | ||
4577 | ap->hsm_task_state = HSM_ST_IDLE; | |
4578 | ||
4579 | /* complete taskfile transaction */ | |
4580 | ata_hsm_qc_complete(qc, in_wq); | |
4581 | ||
4582 | poll_next = 0; | |
4583 | break; | |
4584 | ||
4585 | case HSM_ST_ERR: | |
4586 | /* make sure qc->err_mask is available to | |
4587 | * know what's wrong and recover | |
4588 | */ | |
4589 | WARN_ON(qc->err_mask == 0); | |
4590 | ||
4591 | ap->hsm_task_state = HSM_ST_IDLE; | |
4592 | ||
4593 | /* complete taskfile transaction */ | |
4594 | ata_hsm_qc_complete(qc, in_wq); | |
4595 | ||
4596 | poll_next = 0; | |
4597 | break; | |
4598 | default: | |
4599 | poll_next = 0; | |
4600 | BUG(); | |
4601 | } | |
4602 | ||
4603 | return poll_next; | |
4604 | } | |
4605 | ||
4606 | static void ata_pio_task(struct work_struct *work) | |
4607 | { | |
4608 | struct ata_port *ap = | |
4609 | container_of(work, struct ata_port, port_task.work); | |
4610 | struct ata_queued_cmd *qc = ap->port_task_data; | |
4611 | u8 status; | |
4612 | int poll_next; | |
4613 | ||
4614 | fsm_start: | |
4615 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); | |
4616 | ||
4617 | /* | |
4618 | * This is purely heuristic. This is a fast path. | |
4619 | * Sometimes when we enter, BSY will be cleared in | |
4620 | * a chk-status or two. If not, the drive is probably seeking | |
4621 | * or something. Snooze for a couple msecs, then | |
4622 | * chk-status again. If still busy, queue delayed work. | |
4623 | */ | |
4624 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
4625 | if (status & ATA_BUSY) { | |
4626 | msleep(2); | |
4627 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
4628 | if (status & ATA_BUSY) { | |
4629 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); | |
4630 | return; | |
4631 | } | |
4632 | } | |
4633 | ||
4634 | /* move the HSM */ | |
4635 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
4636 | ||
4637 | /* another command or interrupt handler | |
4638 | * may be running at this point. | |
4639 | */ | |
4640 | if (poll_next) | |
4641 | goto fsm_start; | |
4642 | } | |
4643 | ||
4644 | /** | |
4645 | * ata_qc_new - Request an available ATA command, for queueing | |
4646 | * @ap: Port associated with device @dev | |
4647 | * @dev: Device from whom we request an available command structure | |
4648 | * | |
4649 | * LOCKING: | |
4650 | * None. | |
4651 | */ | |
4652 | ||
4653 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
4654 | { | |
4655 | struct ata_queued_cmd *qc = NULL; | |
4656 | unsigned int i; | |
4657 | ||
4658 | /* no command while frozen */ | |
4659 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) | |
4660 | return NULL; | |
4661 | ||
4662 | /* the last tag is reserved for internal command. */ | |
4663 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
4664 | if (!test_and_set_bit(i, &ap->qc_allocated)) { | |
4665 | qc = __ata_qc_from_tag(ap, i); | |
4666 | break; | |
4667 | } | |
4668 | ||
4669 | if (qc) | |
4670 | qc->tag = i; | |
4671 | ||
4672 | return qc; | |
4673 | } | |
4674 | ||
4675 | /** | |
4676 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
4677 | * @dev: Device from whom we request an available command structure | |
4678 | * | |
4679 | * LOCKING: | |
4680 | * None. | |
4681 | */ | |
4682 | ||
4683 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) | |
4684 | { | |
4685 | struct ata_port *ap = dev->ap; | |
4686 | struct ata_queued_cmd *qc; | |
4687 | ||
4688 | qc = ata_qc_new(ap); | |
4689 | if (qc) { | |
4690 | qc->scsicmd = NULL; | |
4691 | qc->ap = ap; | |
4692 | qc->dev = dev; | |
4693 | ||
4694 | ata_qc_reinit(qc); | |
4695 | } | |
4696 | ||
4697 | return qc; | |
4698 | } | |
4699 | ||
4700 | /** | |
4701 | * ata_qc_free - free unused ata_queued_cmd | |
4702 | * @qc: Command to complete | |
4703 | * | |
4704 | * Designed to free unused ata_queued_cmd object | |
4705 | * in case something prevents using it. | |
4706 | * | |
4707 | * LOCKING: | |
4708 | * spin_lock_irqsave(host lock) | |
4709 | */ | |
4710 | void ata_qc_free(struct ata_queued_cmd *qc) | |
4711 | { | |
4712 | struct ata_port *ap = qc->ap; | |
4713 | unsigned int tag; | |
4714 | ||
4715 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | |
4716 | ||
4717 | qc->flags = 0; | |
4718 | tag = qc->tag; | |
4719 | if (likely(ata_tag_valid(tag))) { | |
4720 | qc->tag = ATA_TAG_POISON; | |
4721 | clear_bit(tag, &ap->qc_allocated); | |
4722 | } | |
4723 | } | |
4724 | ||
4725 | void __ata_qc_complete(struct ata_queued_cmd *qc) | |
4726 | { | |
4727 | struct ata_port *ap = qc->ap; | |
4728 | ||
4729 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | |
4730 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
4731 | ||
4732 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4733 | ata_sg_clean(qc); | |
4734 | ||
4735 | /* command should be marked inactive atomically with qc completion */ | |
4736 | if (qc->tf.protocol == ATA_PROT_NCQ) | |
4737 | ap->sactive &= ~(1 << qc->tag); | |
4738 | else | |
4739 | ap->active_tag = ATA_TAG_POISON; | |
4740 | ||
4741 | /* atapi: mark qc as inactive to prevent the interrupt handler | |
4742 | * from completing the command twice later, before the error handler | |
4743 | * is called. (when rc != 0 and atapi request sense is needed) | |
4744 | */ | |
4745 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
4746 | ap->qc_active &= ~(1 << qc->tag); | |
4747 | ||
4748 | /* call completion callback */ | |
4749 | qc->complete_fn(qc); | |
4750 | } | |
4751 | ||
4752 | static void fill_result_tf(struct ata_queued_cmd *qc) | |
4753 | { | |
4754 | struct ata_port *ap = qc->ap; | |
4755 | ||
4756 | qc->result_tf.flags = qc->tf.flags; | |
4757 | ap->ops->tf_read(ap, &qc->result_tf); | |
4758 | } | |
4759 | ||
4760 | /** | |
4761 | * ata_qc_complete - Complete an active ATA command | |
4762 | * @qc: Command to complete | |
4763 | * @err_mask: ATA Status register contents | |
4764 | * | |
4765 | * Indicate to the mid and upper layers that an ATA | |
4766 | * command has completed, with either an ok or not-ok status. | |
4767 | * | |
4768 | * LOCKING: | |
4769 | * spin_lock_irqsave(host lock) | |
4770 | */ | |
4771 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
4772 | { | |
4773 | struct ata_port *ap = qc->ap; | |
4774 | ||
4775 | /* XXX: New EH and old EH use different mechanisms to | |
4776 | * synchronize EH with regular execution path. | |
4777 | * | |
4778 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
4779 | * Normal execution path is responsible for not accessing a | |
4780 | * failed qc. libata core enforces the rule by returning NULL | |
4781 | * from ata_qc_from_tag() for failed qcs. | |
4782 | * | |
4783 | * Old EH depends on ata_qc_complete() nullifying completion | |
4784 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
4785 | * not synchronize with interrupt handler. Only PIO task is | |
4786 | * taken care of. | |
4787 | */ | |
4788 | if (ap->ops->error_handler) { | |
4789 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); | |
4790 | ||
4791 | if (unlikely(qc->err_mask)) | |
4792 | qc->flags |= ATA_QCFLAG_FAILED; | |
4793 | ||
4794 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
4795 | if (!ata_tag_internal(qc->tag)) { | |
4796 | /* always fill result TF for failed qc */ | |
4797 | fill_result_tf(qc); | |
4798 | ata_qc_schedule_eh(qc); | |
4799 | return; | |
4800 | } | |
4801 | } | |
4802 | ||
4803 | /* read result TF if requested */ | |
4804 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
4805 | fill_result_tf(qc); | |
4806 | ||
4807 | __ata_qc_complete(qc); | |
4808 | } else { | |
4809 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
4810 | return; | |
4811 | ||
4812 | /* read result TF if failed or requested */ | |
4813 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
4814 | fill_result_tf(qc); | |
4815 | ||
4816 | __ata_qc_complete(qc); | |
4817 | } | |
4818 | } | |
4819 | ||
4820 | /** | |
4821 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
4822 | * @ap: port in question | |
4823 | * @qc_active: new qc_active mask | |
4824 | * @finish_qc: LLDD callback invoked before completing a qc | |
4825 | * | |
4826 | * Complete in-flight commands. This functions is meant to be | |
4827 | * called from low-level driver's interrupt routine to complete | |
4828 | * requests normally. ap->qc_active and @qc_active is compared | |
4829 | * and commands are completed accordingly. | |
4830 | * | |
4831 | * LOCKING: | |
4832 | * spin_lock_irqsave(host lock) | |
4833 | * | |
4834 | * RETURNS: | |
4835 | * Number of completed commands on success, -errno otherwise. | |
4836 | */ | |
4837 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
4838 | void (*finish_qc)(struct ata_queued_cmd *)) | |
4839 | { | |
4840 | int nr_done = 0; | |
4841 | u32 done_mask; | |
4842 | int i; | |
4843 | ||
4844 | done_mask = ap->qc_active ^ qc_active; | |
4845 | ||
4846 | if (unlikely(done_mask & qc_active)) { | |
4847 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
4848 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
4849 | return -EINVAL; | |
4850 | } | |
4851 | ||
4852 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
4853 | struct ata_queued_cmd *qc; | |
4854 | ||
4855 | if (!(done_mask & (1 << i))) | |
4856 | continue; | |
4857 | ||
4858 | if ((qc = ata_qc_from_tag(ap, i))) { | |
4859 | if (finish_qc) | |
4860 | finish_qc(qc); | |
4861 | ata_qc_complete(qc); | |
4862 | nr_done++; | |
4863 | } | |
4864 | } | |
4865 | ||
4866 | return nr_done; | |
4867 | } | |
4868 | ||
4869 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) | |
4870 | { | |
4871 | struct ata_port *ap = qc->ap; | |
4872 | ||
4873 | switch (qc->tf.protocol) { | |
4874 | case ATA_PROT_NCQ: | |
4875 | case ATA_PROT_DMA: | |
4876 | case ATA_PROT_ATAPI_DMA: | |
4877 | return 1; | |
4878 | ||
4879 | case ATA_PROT_ATAPI: | |
4880 | case ATA_PROT_PIO: | |
4881 | if (ap->flags & ATA_FLAG_PIO_DMA) | |
4882 | return 1; | |
4883 | ||
4884 | /* fall through */ | |
4885 | ||
4886 | default: | |
4887 | return 0; | |
4888 | } | |
4889 | ||
4890 | /* never reached */ | |
4891 | } | |
4892 | ||
4893 | /** | |
4894 | * ata_qc_issue - issue taskfile to device | |
4895 | * @qc: command to issue to device | |
4896 | * | |
4897 | * Prepare an ATA command to submission to device. | |
4898 | * This includes mapping the data into a DMA-able | |
4899 | * area, filling in the S/G table, and finally | |
4900 | * writing the taskfile to hardware, starting the command. | |
4901 | * | |
4902 | * LOCKING: | |
4903 | * spin_lock_irqsave(host lock) | |
4904 | */ | |
4905 | void ata_qc_issue(struct ata_queued_cmd *qc) | |
4906 | { | |
4907 | struct ata_port *ap = qc->ap; | |
4908 | ||
4909 | /* Make sure only one non-NCQ command is outstanding. The | |
4910 | * check is skipped for old EH because it reuses active qc to | |
4911 | * request ATAPI sense. | |
4912 | */ | |
4913 | WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag)); | |
4914 | ||
4915 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4916 | WARN_ON(ap->sactive & (1 << qc->tag)); | |
4917 | ap->sactive |= 1 << qc->tag; | |
4918 | } else { | |
4919 | WARN_ON(ap->sactive); | |
4920 | ap->active_tag = qc->tag; | |
4921 | } | |
4922 | ||
4923 | qc->flags |= ATA_QCFLAG_ACTIVE; | |
4924 | ap->qc_active |= 1 << qc->tag; | |
4925 | ||
4926 | if (ata_should_dma_map(qc)) { | |
4927 | if (qc->flags & ATA_QCFLAG_SG) { | |
4928 | if (ata_sg_setup(qc)) | |
4929 | goto sg_err; | |
4930 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { | |
4931 | if (ata_sg_setup_one(qc)) | |
4932 | goto sg_err; | |
4933 | } | |
4934 | } else { | |
4935 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4936 | } | |
4937 | ||
4938 | ap->ops->qc_prep(qc); | |
4939 | ||
4940 | qc->err_mask |= ap->ops->qc_issue(qc); | |
4941 | if (unlikely(qc->err_mask)) | |
4942 | goto err; | |
4943 | return; | |
4944 | ||
4945 | sg_err: | |
4946 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
4947 | qc->err_mask |= AC_ERR_SYSTEM; | |
4948 | err: | |
4949 | ata_qc_complete(qc); | |
4950 | } | |
4951 | ||
4952 | /** | |
4953 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
4954 | * @qc: command to issue to device | |
4955 | * | |
4956 | * Using various libata functions and hooks, this function | |
4957 | * starts an ATA command. ATA commands are grouped into | |
4958 | * classes called "protocols", and issuing each type of protocol | |
4959 | * is slightly different. | |
4960 | * | |
4961 | * May be used as the qc_issue() entry in ata_port_operations. | |
4962 | * | |
4963 | * LOCKING: | |
4964 | * spin_lock_irqsave(host lock) | |
4965 | * | |
4966 | * RETURNS: | |
4967 | * Zero on success, AC_ERR_* mask on failure | |
4968 | */ | |
4969 | ||
4970 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |
4971 | { | |
4972 | struct ata_port *ap = qc->ap; | |
4973 | ||
4974 | /* Use polling pio if the LLD doesn't handle | |
4975 | * interrupt driven pio and atapi CDB interrupt. | |
4976 | */ | |
4977 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
4978 | switch (qc->tf.protocol) { | |
4979 | case ATA_PROT_PIO: | |
4980 | case ATA_PROT_NODATA: | |
4981 | case ATA_PROT_ATAPI: | |
4982 | case ATA_PROT_ATAPI_NODATA: | |
4983 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
4984 | break; | |
4985 | case ATA_PROT_ATAPI_DMA: | |
4986 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
4987 | /* see ata_dma_blacklisted() */ | |
4988 | BUG(); | |
4989 | break; | |
4990 | default: | |
4991 | break; | |
4992 | } | |
4993 | } | |
4994 | ||
4995 | /* Some controllers show flaky interrupt behavior after | |
4996 | * setting xfer mode. Use polling instead. | |
4997 | */ | |
4998 | if (unlikely(qc->tf.command == ATA_CMD_SET_FEATURES && | |
4999 | qc->tf.feature == SETFEATURES_XFER) && | |
5000 | (ap->flags & ATA_FLAG_SETXFER_POLLING)) | |
5001 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
5002 | ||
5003 | /* select the device */ | |
5004 | ata_dev_select(ap, qc->dev->devno, 1, 0); | |
5005 | ||
5006 | /* start the command */ | |
5007 | switch (qc->tf.protocol) { | |
5008 | case ATA_PROT_NODATA: | |
5009 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5010 | ata_qc_set_polling(qc); | |
5011 | ||
5012 | ata_tf_to_host(ap, &qc->tf); | |
5013 | ap->hsm_task_state = HSM_ST_LAST; | |
5014 | ||
5015 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5016 | ata_port_queue_task(ap, ata_pio_task, qc, 0); | |
5017 | ||
5018 | break; | |
5019 | ||
5020 | case ATA_PROT_DMA: | |
5021 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); | |
5022 | ||
5023 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
5024 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5025 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
5026 | ap->hsm_task_state = HSM_ST_LAST; | |
5027 | break; | |
5028 | ||
5029 | case ATA_PROT_PIO: | |
5030 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5031 | ata_qc_set_polling(qc); | |
5032 | ||
5033 | ata_tf_to_host(ap, &qc->tf); | |
5034 | ||
5035 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
5036 | /* PIO data out protocol */ | |
5037 | ap->hsm_task_state = HSM_ST_FIRST; | |
5038 | ata_port_queue_task(ap, ata_pio_task, qc, 0); | |
5039 | ||
5040 | /* always send first data block using | |
5041 | * the ata_pio_task() codepath. | |
5042 | */ | |
5043 | } else { | |
5044 | /* PIO data in protocol */ | |
5045 | ap->hsm_task_state = HSM_ST; | |
5046 | ||
5047 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5048 | ata_port_queue_task(ap, ata_pio_task, qc, 0); | |
5049 | ||
5050 | /* if polling, ata_pio_task() handles the rest. | |
5051 | * otherwise, interrupt handler takes over from here. | |
5052 | */ | |
5053 | } | |
5054 | ||
5055 | break; | |
5056 | ||
5057 | case ATA_PROT_ATAPI: | |
5058 | case ATA_PROT_ATAPI_NODATA: | |
5059 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
5060 | ata_qc_set_polling(qc); | |
5061 | ||
5062 | ata_tf_to_host(ap, &qc->tf); | |
5063 | ||
5064 | ap->hsm_task_state = HSM_ST_FIRST; | |
5065 | ||
5066 | /* send cdb by polling if no cdb interrupt */ | |
5067 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
5068 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
5069 | ata_port_queue_task(ap, ata_pio_task, qc, 0); | |
5070 | break; | |
5071 | ||
5072 | case ATA_PROT_ATAPI_DMA: | |
5073 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); | |
5074 | ||
5075 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | |
5076 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
5077 | ap->hsm_task_state = HSM_ST_FIRST; | |
5078 | ||
5079 | /* send cdb by polling if no cdb interrupt */ | |
5080 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
5081 | ata_port_queue_task(ap, ata_pio_task, qc, 0); | |
5082 | break; | |
5083 | ||
5084 | default: | |
5085 | WARN_ON(1); | |
5086 | return AC_ERR_SYSTEM; | |
5087 | } | |
5088 | ||
5089 | return 0; | |
5090 | } | |
5091 | ||
5092 | /** | |
5093 | * ata_host_intr - Handle host interrupt for given (port, task) | |
5094 | * @ap: Port on which interrupt arrived (possibly...) | |
5095 | * @qc: Taskfile currently active in engine | |
5096 | * | |
5097 | * Handle host interrupt for given queued command. Currently, | |
5098 | * only DMA interrupts are handled. All other commands are | |
5099 | * handled via polling with interrupts disabled (nIEN bit). | |
5100 | * | |
5101 | * LOCKING: | |
5102 | * spin_lock_irqsave(host lock) | |
5103 | * | |
5104 | * RETURNS: | |
5105 | * One if interrupt was handled, zero if not (shared irq). | |
5106 | */ | |
5107 | ||
5108 | inline unsigned int ata_host_intr (struct ata_port *ap, | |
5109 | struct ata_queued_cmd *qc) | |
5110 | { | |
5111 | struct ata_eh_info *ehi = &ap->eh_info; | |
5112 | u8 status, host_stat = 0; | |
5113 | ||
5114 | VPRINTK("ata%u: protocol %d task_state %d\n", | |
5115 | ap->print_id, qc->tf.protocol, ap->hsm_task_state); | |
5116 | ||
5117 | /* Check whether we are expecting interrupt in this state */ | |
5118 | switch (ap->hsm_task_state) { | |
5119 | case HSM_ST_FIRST: | |
5120 | /* Some pre-ATAPI-4 devices assert INTRQ | |
5121 | * at this state when ready to receive CDB. | |
5122 | */ | |
5123 | ||
5124 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. | |
5125 | * The flag was turned on only for atapi devices. | |
5126 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
5127 | */ | |
5128 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
5129 | goto idle_irq; | |
5130 | break; | |
5131 | case HSM_ST_LAST: | |
5132 | if (qc->tf.protocol == ATA_PROT_DMA || | |
5133 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
5134 | /* check status of DMA engine */ | |
5135 | host_stat = ap->ops->bmdma_status(ap); | |
5136 | VPRINTK("ata%u: host_stat 0x%X\n", | |
5137 | ap->print_id, host_stat); | |
5138 | ||
5139 | /* if it's not our irq... */ | |
5140 | if (!(host_stat & ATA_DMA_INTR)) | |
5141 | goto idle_irq; | |
5142 | ||
5143 | /* before we do anything else, clear DMA-Start bit */ | |
5144 | ap->ops->bmdma_stop(qc); | |
5145 | ||
5146 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
5147 | /* error when transfering data to/from memory */ | |
5148 | qc->err_mask |= AC_ERR_HOST_BUS; | |
5149 | ap->hsm_task_state = HSM_ST_ERR; | |
5150 | } | |
5151 | } | |
5152 | break; | |
5153 | case HSM_ST: | |
5154 | break; | |
5155 | default: | |
5156 | goto idle_irq; | |
5157 | } | |
5158 | ||
5159 | /* check altstatus */ | |
5160 | status = ata_altstatus(ap); | |
5161 | if (status & ATA_BUSY) | |
5162 | goto idle_irq; | |
5163 | ||
5164 | /* check main status, clearing INTRQ */ | |
5165 | status = ata_chk_status(ap); | |
5166 | if (unlikely(status & ATA_BUSY)) | |
5167 | goto idle_irq; | |
5168 | ||
5169 | /* ack bmdma irq events */ | |
5170 | ap->ops->irq_clear(ap); | |
5171 | ||
5172 | ata_hsm_move(ap, qc, status, 0); | |
5173 | ||
5174 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
5175 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
5176 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
5177 | ||
5178 | return 1; /* irq handled */ | |
5179 | ||
5180 | idle_irq: | |
5181 | ap->stats.idle_irq++; | |
5182 | ||
5183 | #ifdef ATA_IRQ_TRAP | |
5184 | if ((ap->stats.idle_irq % 1000) == 0) { | |
5185 | ap->ops->irq_ack(ap, 0); /* debug trap */ | |
5186 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); | |
5187 | return 1; | |
5188 | } | |
5189 | #endif | |
5190 | return 0; /* irq not handled */ | |
5191 | } | |
5192 | ||
5193 | /** | |
5194 | * ata_interrupt - Default ATA host interrupt handler | |
5195 | * @irq: irq line (unused) | |
5196 | * @dev_instance: pointer to our ata_host information structure | |
5197 | * | |
5198 | * Default interrupt handler for PCI IDE devices. Calls | |
5199 | * ata_host_intr() for each port that is not disabled. | |
5200 | * | |
5201 | * LOCKING: | |
5202 | * Obtains host lock during operation. | |
5203 | * | |
5204 | * RETURNS: | |
5205 | * IRQ_NONE or IRQ_HANDLED. | |
5206 | */ | |
5207 | ||
5208 | irqreturn_t ata_interrupt (int irq, void *dev_instance) | |
5209 | { | |
5210 | struct ata_host *host = dev_instance; | |
5211 | unsigned int i; | |
5212 | unsigned int handled = 0; | |
5213 | unsigned long flags; | |
5214 | ||
5215 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
5216 | spin_lock_irqsave(&host->lock, flags); | |
5217 | ||
5218 | for (i = 0; i < host->n_ports; i++) { | |
5219 | struct ata_port *ap; | |
5220 | ||
5221 | ap = host->ports[i]; | |
5222 | if (ap && | |
5223 | !(ap->flags & ATA_FLAG_DISABLED)) { | |
5224 | struct ata_queued_cmd *qc; | |
5225 | ||
5226 | qc = ata_qc_from_tag(ap, ap->active_tag); | |
5227 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && | |
5228 | (qc->flags & ATA_QCFLAG_ACTIVE)) | |
5229 | handled |= ata_host_intr(ap, qc); | |
5230 | } | |
5231 | } | |
5232 | ||
5233 | spin_unlock_irqrestore(&host->lock, flags); | |
5234 | ||
5235 | return IRQ_RETVAL(handled); | |
5236 | } | |
5237 | ||
5238 | /** | |
5239 | * sata_scr_valid - test whether SCRs are accessible | |
5240 | * @ap: ATA port to test SCR accessibility for | |
5241 | * | |
5242 | * Test whether SCRs are accessible for @ap. | |
5243 | * | |
5244 | * LOCKING: | |
5245 | * None. | |
5246 | * | |
5247 | * RETURNS: | |
5248 | * 1 if SCRs are accessible, 0 otherwise. | |
5249 | */ | |
5250 | int sata_scr_valid(struct ata_port *ap) | |
5251 | { | |
5252 | return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read; | |
5253 | } | |
5254 | ||
5255 | /** | |
5256 | * sata_scr_read - read SCR register of the specified port | |
5257 | * @ap: ATA port to read SCR for | |
5258 | * @reg: SCR to read | |
5259 | * @val: Place to store read value | |
5260 | * | |
5261 | * Read SCR register @reg of @ap into *@val. This function is | |
5262 | * guaranteed to succeed if the cable type of the port is SATA | |
5263 | * and the port implements ->scr_read. | |
5264 | * | |
5265 | * LOCKING: | |
5266 | * None. | |
5267 | * | |
5268 | * RETURNS: | |
5269 | * 0 on success, negative errno on failure. | |
5270 | */ | |
5271 | int sata_scr_read(struct ata_port *ap, int reg, u32 *val) | |
5272 | { | |
5273 | if (sata_scr_valid(ap)) { | |
5274 | *val = ap->ops->scr_read(ap, reg); | |
5275 | return 0; | |
5276 | } | |
5277 | return -EOPNOTSUPP; | |
5278 | } | |
5279 | ||
5280 | /** | |
5281 | * sata_scr_write - write SCR register of the specified port | |
5282 | * @ap: ATA port to write SCR for | |
5283 | * @reg: SCR to write | |
5284 | * @val: value to write | |
5285 | * | |
5286 | * Write @val to SCR register @reg of @ap. This function is | |
5287 | * guaranteed to succeed if the cable type of the port is SATA | |
5288 | * and the port implements ->scr_read. | |
5289 | * | |
5290 | * LOCKING: | |
5291 | * None. | |
5292 | * | |
5293 | * RETURNS: | |
5294 | * 0 on success, negative errno on failure. | |
5295 | */ | |
5296 | int sata_scr_write(struct ata_port *ap, int reg, u32 val) | |
5297 | { | |
5298 | if (sata_scr_valid(ap)) { | |
5299 | ap->ops->scr_write(ap, reg, val); | |
5300 | return 0; | |
5301 | } | |
5302 | return -EOPNOTSUPP; | |
5303 | } | |
5304 | ||
5305 | /** | |
5306 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
5307 | * @ap: ATA port to write SCR for | |
5308 | * @reg: SCR to write | |
5309 | * @val: value to write | |
5310 | * | |
5311 | * This function is identical to sata_scr_write() except that this | |
5312 | * function performs flush after writing to the register. | |
5313 | * | |
5314 | * LOCKING: | |
5315 | * None. | |
5316 | * | |
5317 | * RETURNS: | |
5318 | * 0 on success, negative errno on failure. | |
5319 | */ | |
5320 | int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val) | |
5321 | { | |
5322 | if (sata_scr_valid(ap)) { | |
5323 | ap->ops->scr_write(ap, reg, val); | |
5324 | ap->ops->scr_read(ap, reg); | |
5325 | return 0; | |
5326 | } | |
5327 | return -EOPNOTSUPP; | |
5328 | } | |
5329 | ||
5330 | /** | |
5331 | * ata_port_online - test whether the given port is online | |
5332 | * @ap: ATA port to test | |
5333 | * | |
5334 | * Test whether @ap is online. Note that this function returns 0 | |
5335 | * if online status of @ap cannot be obtained, so | |
5336 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5337 | * | |
5338 | * LOCKING: | |
5339 | * None. | |
5340 | * | |
5341 | * RETURNS: | |
5342 | * 1 if the port online status is available and online. | |
5343 | */ | |
5344 | int ata_port_online(struct ata_port *ap) | |
5345 | { | |
5346 | u32 sstatus; | |
5347 | ||
5348 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3) | |
5349 | return 1; | |
5350 | return 0; | |
5351 | } | |
5352 | ||
5353 | /** | |
5354 | * ata_port_offline - test whether the given port is offline | |
5355 | * @ap: ATA port to test | |
5356 | * | |
5357 | * Test whether @ap is offline. Note that this function returns | |
5358 | * 0 if offline status of @ap cannot be obtained, so | |
5359 | * ata_port_online(ap) != !ata_port_offline(ap). | |
5360 | * | |
5361 | * LOCKING: | |
5362 | * None. | |
5363 | * | |
5364 | * RETURNS: | |
5365 | * 1 if the port offline status is available and offline. | |
5366 | */ | |
5367 | int ata_port_offline(struct ata_port *ap) | |
5368 | { | |
5369 | u32 sstatus; | |
5370 | ||
5371 | if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3) | |
5372 | return 1; | |
5373 | return 0; | |
5374 | } | |
5375 | ||
5376 | int ata_flush_cache(struct ata_device *dev) | |
5377 | { | |
5378 | unsigned int err_mask; | |
5379 | u8 cmd; | |
5380 | ||
5381 | if (!ata_try_flush_cache(dev)) | |
5382 | return 0; | |
5383 | ||
5384 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) | |
5385 | cmd = ATA_CMD_FLUSH_EXT; | |
5386 | else | |
5387 | cmd = ATA_CMD_FLUSH; | |
5388 | ||
5389 | err_mask = ata_do_simple_cmd(dev, cmd); | |
5390 | if (err_mask) { | |
5391 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
5392 | return -EIO; | |
5393 | } | |
5394 | ||
5395 | return 0; | |
5396 | } | |
5397 | ||
5398 | #ifdef CONFIG_PM | |
5399 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, | |
5400 | unsigned int action, unsigned int ehi_flags, | |
5401 | int wait) | |
5402 | { | |
5403 | unsigned long flags; | |
5404 | int i, rc; | |
5405 | ||
5406 | for (i = 0; i < host->n_ports; i++) { | |
5407 | struct ata_port *ap = host->ports[i]; | |
5408 | ||
5409 | /* Previous resume operation might still be in | |
5410 | * progress. Wait for PM_PENDING to clear. | |
5411 | */ | |
5412 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
5413 | ata_port_wait_eh(ap); | |
5414 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5415 | } | |
5416 | ||
5417 | /* request PM ops to EH */ | |
5418 | spin_lock_irqsave(ap->lock, flags); | |
5419 | ||
5420 | ap->pm_mesg = mesg; | |
5421 | if (wait) { | |
5422 | rc = 0; | |
5423 | ap->pm_result = &rc; | |
5424 | } | |
5425 | ||
5426 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
5427 | ap->eh_info.action |= action; | |
5428 | ap->eh_info.flags |= ehi_flags; | |
5429 | ||
5430 | ata_port_schedule_eh(ap); | |
5431 | ||
5432 | spin_unlock_irqrestore(ap->lock, flags); | |
5433 | ||
5434 | /* wait and check result */ | |
5435 | if (wait) { | |
5436 | ata_port_wait_eh(ap); | |
5437 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
5438 | if (rc) | |
5439 | return rc; | |
5440 | } | |
5441 | } | |
5442 | ||
5443 | return 0; | |
5444 | } | |
5445 | ||
5446 | /** | |
5447 | * ata_host_suspend - suspend host | |
5448 | * @host: host to suspend | |
5449 | * @mesg: PM message | |
5450 | * | |
5451 | * Suspend @host. Actual operation is performed by EH. This | |
5452 | * function requests EH to perform PM operations and waits for EH | |
5453 | * to finish. | |
5454 | * | |
5455 | * LOCKING: | |
5456 | * Kernel thread context (may sleep). | |
5457 | * | |
5458 | * RETURNS: | |
5459 | * 0 on success, -errno on failure. | |
5460 | */ | |
5461 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) | |
5462 | { | |
5463 | int i, j, rc; | |
5464 | ||
5465 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); | |
5466 | if (rc) | |
5467 | goto fail; | |
5468 | ||
5469 | /* EH is quiescent now. Fail if we have any ready device. | |
5470 | * This happens if hotplug occurs between completion of device | |
5471 | * suspension and here. | |
5472 | */ | |
5473 | for (i = 0; i < host->n_ports; i++) { | |
5474 | struct ata_port *ap = host->ports[i]; | |
5475 | ||
5476 | for (j = 0; j < ATA_MAX_DEVICES; j++) { | |
5477 | struct ata_device *dev = &ap->device[j]; | |
5478 | ||
5479 | if (ata_dev_ready(dev)) { | |
5480 | ata_port_printk(ap, KERN_WARNING, | |
5481 | "suspend failed, device %d " | |
5482 | "still active\n", dev->devno); | |
5483 | rc = -EBUSY; | |
5484 | goto fail; | |
5485 | } | |
5486 | } | |
5487 | } | |
5488 | ||
5489 | host->dev->power.power_state = mesg; | |
5490 | return 0; | |
5491 | ||
5492 | fail: | |
5493 | ata_host_resume(host); | |
5494 | return rc; | |
5495 | } | |
5496 | ||
5497 | /** | |
5498 | * ata_host_resume - resume host | |
5499 | * @host: host to resume | |
5500 | * | |
5501 | * Resume @host. Actual operation is performed by EH. This | |
5502 | * function requests EH to perform PM operations and returns. | |
5503 | * Note that all resume operations are performed parallely. | |
5504 | * | |
5505 | * LOCKING: | |
5506 | * Kernel thread context (may sleep). | |
5507 | */ | |
5508 | void ata_host_resume(struct ata_host *host) | |
5509 | { | |
5510 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, | |
5511 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
5512 | host->dev->power.power_state = PMSG_ON; | |
5513 | } | |
5514 | #endif | |
5515 | ||
5516 | /** | |
5517 | * ata_port_start - Set port up for dma. | |
5518 | * @ap: Port to initialize | |
5519 | * | |
5520 | * Called just after data structures for each port are | |
5521 | * initialized. Allocates space for PRD table. | |
5522 | * | |
5523 | * May be used as the port_start() entry in ata_port_operations. | |
5524 | * | |
5525 | * LOCKING: | |
5526 | * Inherited from caller. | |
5527 | */ | |
5528 | int ata_port_start(struct ata_port *ap) | |
5529 | { | |
5530 | struct device *dev = ap->dev; | |
5531 | int rc; | |
5532 | ||
5533 | ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, | |
5534 | GFP_KERNEL); | |
5535 | if (!ap->prd) | |
5536 | return -ENOMEM; | |
5537 | ||
5538 | rc = ata_pad_alloc(ap, dev); | |
5539 | if (rc) | |
5540 | return rc; | |
5541 | ||
5542 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, | |
5543 | (unsigned long long)ap->prd_dma); | |
5544 | return 0; | |
5545 | } | |
5546 | ||
5547 | /** | |
5548 | * ata_dev_init - Initialize an ata_device structure | |
5549 | * @dev: Device structure to initialize | |
5550 | * | |
5551 | * Initialize @dev in preparation for probing. | |
5552 | * | |
5553 | * LOCKING: | |
5554 | * Inherited from caller. | |
5555 | */ | |
5556 | void ata_dev_init(struct ata_device *dev) | |
5557 | { | |
5558 | struct ata_port *ap = dev->ap; | |
5559 | unsigned long flags; | |
5560 | ||
5561 | /* SATA spd limit is bound to the first device */ | |
5562 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5563 | ||
5564 | /* High bits of dev->flags are used to record warm plug | |
5565 | * requests which occur asynchronously. Synchronize using | |
5566 | * host lock. | |
5567 | */ | |
5568 | spin_lock_irqsave(ap->lock, flags); | |
5569 | dev->flags &= ~ATA_DFLAG_INIT_MASK; | |
5570 | spin_unlock_irqrestore(ap->lock, flags); | |
5571 | ||
5572 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, | |
5573 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
5574 | dev->pio_mask = UINT_MAX; | |
5575 | dev->mwdma_mask = UINT_MAX; | |
5576 | dev->udma_mask = UINT_MAX; | |
5577 | } | |
5578 | ||
5579 | /** | |
5580 | * ata_port_init - Initialize an ata_port structure | |
5581 | * @ap: Structure to initialize | |
5582 | * @host: Collection of hosts to which @ap belongs | |
5583 | * @ent: Probe information provided by low-level driver | |
5584 | * @port_no: Port number associated with this ata_port | |
5585 | * | |
5586 | * Initialize a new ata_port structure. | |
5587 | * | |
5588 | * LOCKING: | |
5589 | * Inherited from caller. | |
5590 | */ | |
5591 | void ata_port_init(struct ata_port *ap, struct ata_host *host, | |
5592 | const struct ata_probe_ent *ent, unsigned int port_no) | |
5593 | { | |
5594 | unsigned int i; | |
5595 | ||
5596 | ap->lock = &host->lock; | |
5597 | ap->flags = ATA_FLAG_DISABLED; | |
5598 | ap->print_id = ata_print_id++; | |
5599 | ap->ctl = ATA_DEVCTL_OBS; | |
5600 | ap->host = host; | |
5601 | ap->dev = ent->dev; | |
5602 | ap->port_no = port_no; | |
5603 | if (port_no == 1 && ent->pinfo2) { | |
5604 | ap->pio_mask = ent->pinfo2->pio_mask; | |
5605 | ap->mwdma_mask = ent->pinfo2->mwdma_mask; | |
5606 | ap->udma_mask = ent->pinfo2->udma_mask; | |
5607 | ap->flags |= ent->pinfo2->flags; | |
5608 | ap->ops = ent->pinfo2->port_ops; | |
5609 | } else { | |
5610 | ap->pio_mask = ent->pio_mask; | |
5611 | ap->mwdma_mask = ent->mwdma_mask; | |
5612 | ap->udma_mask = ent->udma_mask; | |
5613 | ap->flags |= ent->port_flags; | |
5614 | ap->ops = ent->port_ops; | |
5615 | } | |
5616 | ap->hw_sata_spd_limit = UINT_MAX; | |
5617 | ap->active_tag = ATA_TAG_POISON; | |
5618 | ap->last_ctl = 0xFF; | |
5619 | ||
5620 | #if defined(ATA_VERBOSE_DEBUG) | |
5621 | /* turn on all debugging levels */ | |
5622 | ap->msg_enable = 0x00FF; | |
5623 | #elif defined(ATA_DEBUG) | |
5624 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
5625 | #else | |
5626 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; | |
5627 | #endif | |
5628 | ||
5629 | INIT_DELAYED_WORK(&ap->port_task, NULL); | |
5630 | INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); | |
5631 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); | |
5632 | INIT_LIST_HEAD(&ap->eh_done_q); | |
5633 | init_waitqueue_head(&ap->eh_wait_q); | |
5634 | ||
5635 | /* set cable type */ | |
5636 | ap->cbl = ATA_CBL_NONE; | |
5637 | if (ap->flags & ATA_FLAG_SATA) | |
5638 | ap->cbl = ATA_CBL_SATA; | |
5639 | ||
5640 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
5641 | struct ata_device *dev = &ap->device[i]; | |
5642 | dev->ap = ap; | |
5643 | dev->devno = i; | |
5644 | ata_dev_init(dev); | |
5645 | } | |
5646 | ||
5647 | #ifdef ATA_IRQ_TRAP | |
5648 | ap->stats.unhandled_irq = 1; | |
5649 | ap->stats.idle_irq = 1; | |
5650 | #endif | |
5651 | ||
5652 | memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports)); | |
5653 | } | |
5654 | ||
5655 | /** | |
5656 | * ata_port_init_shost - Initialize SCSI host associated with ATA port | |
5657 | * @ap: ATA port to initialize SCSI host for | |
5658 | * @shost: SCSI host associated with @ap | |
5659 | * | |
5660 | * Initialize SCSI host @shost associated with ATA port @ap. | |
5661 | * | |
5662 | * LOCKING: | |
5663 | * Inherited from caller. | |
5664 | */ | |
5665 | static void ata_port_init_shost(struct ata_port *ap, struct Scsi_Host *shost) | |
5666 | { | |
5667 | ap->scsi_host = shost; | |
5668 | ||
5669 | shost->unique_id = ap->print_id; | |
5670 | shost->max_id = 16; | |
5671 | shost->max_lun = 1; | |
5672 | shost->max_channel = 1; | |
5673 | shost->max_cmd_len = 12; | |
5674 | } | |
5675 | ||
5676 | /** | |
5677 | * ata_port_add - Attach low-level ATA driver to system | |
5678 | * @ent: Information provided by low-level driver | |
5679 | * @host: Collections of ports to which we add | |
5680 | * @port_no: Port number associated with this host | |
5681 | * | |
5682 | * Attach low-level ATA driver to system. | |
5683 | * | |
5684 | * LOCKING: | |
5685 | * PCI/etc. bus probe sem. | |
5686 | * | |
5687 | * RETURNS: | |
5688 | * New ata_port on success, for NULL on error. | |
5689 | */ | |
5690 | static struct ata_port * ata_port_add(const struct ata_probe_ent *ent, | |
5691 | struct ata_host *host, | |
5692 | unsigned int port_no) | |
5693 | { | |
5694 | struct Scsi_Host *shost; | |
5695 | struct ata_port *ap; | |
5696 | ||
5697 | DPRINTK("ENTER\n"); | |
5698 | ||
5699 | if (!ent->port_ops->error_handler && | |
5700 | !(ent->port_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) { | |
5701 | printk(KERN_ERR "ata%u: no reset mechanism available\n", | |
5702 | port_no); | |
5703 | return NULL; | |
5704 | } | |
5705 | ||
5706 | shost = scsi_host_alloc(ent->sht, sizeof(struct ata_port)); | |
5707 | if (!shost) | |
5708 | return NULL; | |
5709 | ||
5710 | shost->transportt = &ata_scsi_transport_template; | |
5711 | ||
5712 | ap = ata_shost_to_port(shost); | |
5713 | ||
5714 | ata_port_init(ap, host, ent, port_no); | |
5715 | ata_port_init_shost(ap, shost); | |
5716 | ||
5717 | return ap; | |
5718 | } | |
5719 | ||
5720 | static void ata_host_release(struct device *gendev, void *res) | |
5721 | { | |
5722 | struct ata_host *host = dev_get_drvdata(gendev); | |
5723 | int i; | |
5724 | ||
5725 | for (i = 0; i < host->n_ports; i++) { | |
5726 | struct ata_port *ap = host->ports[i]; | |
5727 | ||
5728 | if (ap && ap->ops->port_stop) | |
5729 | ap->ops->port_stop(ap); | |
5730 | } | |
5731 | ||
5732 | if (host->ops->host_stop) | |
5733 | host->ops->host_stop(host); | |
5734 | ||
5735 | for (i = 0; i < host->n_ports; i++) { | |
5736 | struct ata_port *ap = host->ports[i]; | |
5737 | ||
5738 | if (ap) | |
5739 | scsi_host_put(ap->scsi_host); | |
5740 | ||
5741 | host->ports[i] = NULL; | |
5742 | } | |
5743 | ||
5744 | dev_set_drvdata(gendev, NULL); | |
5745 | } | |
5746 | ||
5747 | /** | |
5748 | * ata_sas_host_init - Initialize a host struct | |
5749 | * @host: host to initialize | |
5750 | * @dev: device host is attached to | |
5751 | * @flags: host flags | |
5752 | * @ops: port_ops | |
5753 | * | |
5754 | * LOCKING: | |
5755 | * PCI/etc. bus probe sem. | |
5756 | * | |
5757 | */ | |
5758 | ||
5759 | void ata_host_init(struct ata_host *host, struct device *dev, | |
5760 | unsigned long flags, const struct ata_port_operations *ops) | |
5761 | { | |
5762 | spin_lock_init(&host->lock); | |
5763 | host->dev = dev; | |
5764 | host->flags = flags; | |
5765 | host->ops = ops; | |
5766 | } | |
5767 | ||
5768 | /** | |
5769 | * ata_device_add - Register hardware device with ATA and SCSI layers | |
5770 | * @ent: Probe information describing hardware device to be registered | |
5771 | * | |
5772 | * This function processes the information provided in the probe | |
5773 | * information struct @ent, allocates the necessary ATA and SCSI | |
5774 | * host information structures, initializes them, and registers | |
5775 | * everything with requisite kernel subsystems. | |
5776 | * | |
5777 | * This function requests irqs, probes the ATA bus, and probes | |
5778 | * the SCSI bus. | |
5779 | * | |
5780 | * LOCKING: | |
5781 | * PCI/etc. bus probe sem. | |
5782 | * | |
5783 | * RETURNS: | |
5784 | * Number of ports registered. Zero on error (no ports registered). | |
5785 | */ | |
5786 | int ata_device_add(const struct ata_probe_ent *ent) | |
5787 | { | |
5788 | unsigned int i; | |
5789 | struct device *dev = ent->dev; | |
5790 | struct ata_host *host; | |
5791 | int rc; | |
5792 | ||
5793 | DPRINTK("ENTER\n"); | |
5794 | ||
5795 | if (ent->irq == 0) { | |
5796 | dev_printk(KERN_ERR, dev, "is not available: No interrupt assigned.\n"); | |
5797 | return 0; | |
5798 | } | |
5799 | ||
5800 | if (!devres_open_group(dev, ata_device_add, GFP_KERNEL)) | |
5801 | return 0; | |
5802 | ||
5803 | /* alloc a container for our list of ATA ports (buses) */ | |
5804 | host = devres_alloc(ata_host_release, sizeof(struct ata_host) + | |
5805 | (ent->n_ports * sizeof(void *)), GFP_KERNEL); | |
5806 | if (!host) | |
5807 | goto err_out; | |
5808 | devres_add(dev, host); | |
5809 | dev_set_drvdata(dev, host); | |
5810 | ||
5811 | ata_host_init(host, dev, ent->_host_flags, ent->port_ops); | |
5812 | host->n_ports = ent->n_ports; | |
5813 | host->irq = ent->irq; | |
5814 | host->irq2 = ent->irq2; | |
5815 | host->iomap = ent->iomap; | |
5816 | host->private_data = ent->private_data; | |
5817 | ||
5818 | /* register each port bound to this device */ | |
5819 | for (i = 0; i < host->n_ports; i++) { | |
5820 | struct ata_port *ap; | |
5821 | unsigned long xfer_mode_mask; | |
5822 | int irq_line = ent->irq; | |
5823 | ||
5824 | ap = ata_port_add(ent, host, i); | |
5825 | host->ports[i] = ap; | |
5826 | if (!ap) | |
5827 | goto err_out; | |
5828 | ||
5829 | /* dummy? */ | |
5830 | if (ent->dummy_port_mask & (1 << i)) { | |
5831 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); | |
5832 | ap->ops = &ata_dummy_port_ops; | |
5833 | continue; | |
5834 | } | |
5835 | ||
5836 | /* start port */ | |
5837 | rc = ap->ops->port_start(ap); | |
5838 | if (rc) { | |
5839 | host->ports[i] = NULL; | |
5840 | scsi_host_put(ap->scsi_host); | |
5841 | goto err_out; | |
5842 | } | |
5843 | ||
5844 | /* Report the secondary IRQ for second channel legacy */ | |
5845 | if (i == 1 && ent->irq2) | |
5846 | irq_line = ent->irq2; | |
5847 | ||
5848 | xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) | | |
5849 | (ap->mwdma_mask << ATA_SHIFT_MWDMA) | | |
5850 | (ap->pio_mask << ATA_SHIFT_PIO); | |
5851 | ||
5852 | /* print per-port info to dmesg */ | |
5853 | ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p " | |
5854 | "ctl 0x%p bmdma 0x%p irq %d\n", | |
5855 | ap->flags & ATA_FLAG_SATA ? 'S' : 'P', | |
5856 | ata_mode_string(xfer_mode_mask), | |
5857 | ap->ioaddr.cmd_addr, | |
5858 | ap->ioaddr.ctl_addr, | |
5859 | ap->ioaddr.bmdma_addr, | |
5860 | irq_line); | |
5861 | ||
5862 | /* freeze port before requesting IRQ */ | |
5863 | ata_eh_freeze_port(ap); | |
5864 | } | |
5865 | ||
5866 | /* obtain irq, that may be shared between channels */ | |
5867 | rc = devm_request_irq(dev, ent->irq, ent->port_ops->irq_handler, | |
5868 | ent->irq_flags, DRV_NAME, host); | |
5869 | if (rc) { | |
5870 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5871 | ent->irq, rc); | |
5872 | goto err_out; | |
5873 | } | |
5874 | ||
5875 | /* do we have a second IRQ for the other channel, eg legacy mode */ | |
5876 | if (ent->irq2) { | |
5877 | /* We will get weird core code crashes later if this is true | |
5878 | so trap it now */ | |
5879 | BUG_ON(ent->irq == ent->irq2); | |
5880 | ||
5881 | rc = devm_request_irq(dev, ent->irq2, | |
5882 | ent->port_ops->irq_handler, ent->irq_flags, | |
5883 | DRV_NAME, host); | |
5884 | if (rc) { | |
5885 | dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n", | |
5886 | ent->irq2, rc); | |
5887 | goto err_out; | |
5888 | } | |
5889 | } | |
5890 | ||
5891 | /* resource acquisition complete */ | |
5892 | devres_remove_group(dev, ata_device_add); | |
5893 | ||
5894 | /* perform each probe synchronously */ | |
5895 | DPRINTK("probe begin\n"); | |
5896 | for (i = 0; i < host->n_ports; i++) { | |
5897 | struct ata_port *ap = host->ports[i]; | |
5898 | u32 scontrol; | |
5899 | int rc; | |
5900 | ||
5901 | /* init sata_spd_limit to the current value */ | |
5902 | if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) { | |
5903 | int spd = (scontrol >> 4) & 0xf; | |
5904 | ap->hw_sata_spd_limit &= (1 << spd) - 1; | |
5905 | } | |
5906 | ap->sata_spd_limit = ap->hw_sata_spd_limit; | |
5907 | ||
5908 | rc = scsi_add_host(ap->scsi_host, dev); | |
5909 | if (rc) { | |
5910 | ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n"); | |
5911 | /* FIXME: do something useful here */ | |
5912 | /* FIXME: handle unconditional calls to | |
5913 | * scsi_scan_host and ata_host_remove, below, | |
5914 | * at the very least | |
5915 | */ | |
5916 | } | |
5917 | ||
5918 | if (ap->ops->error_handler) { | |
5919 | struct ata_eh_info *ehi = &ap->eh_info; | |
5920 | unsigned long flags; | |
5921 | ||
5922 | ata_port_probe(ap); | |
5923 | ||
5924 | /* kick EH for boot probing */ | |
5925 | spin_lock_irqsave(ap->lock, flags); | |
5926 | ||
5927 | ehi->probe_mask = (1 << ATA_MAX_DEVICES) - 1; | |
5928 | ehi->action |= ATA_EH_SOFTRESET; | |
5929 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
5930 | ||
5931 | ap->pflags |= ATA_PFLAG_LOADING; | |
5932 | ata_port_schedule_eh(ap); | |
5933 | ||
5934 | spin_unlock_irqrestore(ap->lock, flags); | |
5935 | ||
5936 | /* wait for EH to finish */ | |
5937 | ata_port_wait_eh(ap); | |
5938 | } else { | |
5939 | DPRINTK("ata%u: bus probe begin\n", ap->print_id); | |
5940 | rc = ata_bus_probe(ap); | |
5941 | DPRINTK("ata%u: bus probe end\n", ap->print_id); | |
5942 | ||
5943 | if (rc) { | |
5944 | /* FIXME: do something useful here? | |
5945 | * Current libata behavior will | |
5946 | * tear down everything when | |
5947 | * the module is removed | |
5948 | * or the h/w is unplugged. | |
5949 | */ | |
5950 | } | |
5951 | } | |
5952 | } | |
5953 | ||
5954 | /* probes are done, now scan each port's disk(s) */ | |
5955 | DPRINTK("host probe begin\n"); | |
5956 | for (i = 0; i < host->n_ports; i++) { | |
5957 | struct ata_port *ap = host->ports[i]; | |
5958 | ||
5959 | ata_scsi_scan_host(ap); | |
5960 | } | |
5961 | ||
5962 | VPRINTK("EXIT, returning %u\n", ent->n_ports); | |
5963 | return ent->n_ports; /* success */ | |
5964 | ||
5965 | err_out: | |
5966 | devres_release_group(dev, ata_device_add); | |
5967 | VPRINTK("EXIT, returning %d\n", rc); | |
5968 | return 0; | |
5969 | } | |
5970 | ||
5971 | /** | |
5972 | * ata_port_detach - Detach ATA port in prepration of device removal | |
5973 | * @ap: ATA port to be detached | |
5974 | * | |
5975 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
5976 | * then, remove the associated SCSI host. @ap is guaranteed to | |
5977 | * be quiescent on return from this function. | |
5978 | * | |
5979 | * LOCKING: | |
5980 | * Kernel thread context (may sleep). | |
5981 | */ | |
5982 | void ata_port_detach(struct ata_port *ap) | |
5983 | { | |
5984 | unsigned long flags; | |
5985 | int i; | |
5986 | ||
5987 | if (!ap->ops->error_handler) | |
5988 | goto skip_eh; | |
5989 | ||
5990 | /* tell EH we're leaving & flush EH */ | |
5991 | spin_lock_irqsave(ap->lock, flags); | |
5992 | ap->pflags |= ATA_PFLAG_UNLOADING; | |
5993 | spin_unlock_irqrestore(ap->lock, flags); | |
5994 | ||
5995 | ata_port_wait_eh(ap); | |
5996 | ||
5997 | /* EH is now guaranteed to see UNLOADING, so no new device | |
5998 | * will be attached. Disable all existing devices. | |
5999 | */ | |
6000 | spin_lock_irqsave(ap->lock, flags); | |
6001 | ||
6002 | for (i = 0; i < ATA_MAX_DEVICES; i++) | |
6003 | ata_dev_disable(&ap->device[i]); | |
6004 | ||
6005 | spin_unlock_irqrestore(ap->lock, flags); | |
6006 | ||
6007 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
6008 | * will be skipped and retrials will be terminated with bad | |
6009 | * target. | |
6010 | */ | |
6011 | spin_lock_irqsave(ap->lock, flags); | |
6012 | ata_port_freeze(ap); /* won't be thawed */ | |
6013 | spin_unlock_irqrestore(ap->lock, flags); | |
6014 | ||
6015 | ata_port_wait_eh(ap); | |
6016 | ||
6017 | /* Flush hotplug task. The sequence is similar to | |
6018 | * ata_port_flush_task(). | |
6019 | */ | |
6020 | flush_workqueue(ata_aux_wq); | |
6021 | cancel_delayed_work(&ap->hotplug_task); | |
6022 | flush_workqueue(ata_aux_wq); | |
6023 | ||
6024 | skip_eh: | |
6025 | /* remove the associated SCSI host */ | |
6026 | scsi_remove_host(ap->scsi_host); | |
6027 | } | |
6028 | ||
6029 | /** | |
6030 | * ata_host_detach - Detach all ports of an ATA host | |
6031 | * @host: Host to detach | |
6032 | * | |
6033 | * Detach all ports of @host. | |
6034 | * | |
6035 | * LOCKING: | |
6036 | * Kernel thread context (may sleep). | |
6037 | */ | |
6038 | void ata_host_detach(struct ata_host *host) | |
6039 | { | |
6040 | int i; | |
6041 | ||
6042 | for (i = 0; i < host->n_ports; i++) | |
6043 | ata_port_detach(host->ports[i]); | |
6044 | } | |
6045 | ||
6046 | struct ata_probe_ent * | |
6047 | ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port) | |
6048 | { | |
6049 | struct ata_probe_ent *probe_ent; | |
6050 | ||
6051 | probe_ent = devm_kzalloc(dev, sizeof(*probe_ent), GFP_KERNEL); | |
6052 | if (!probe_ent) { | |
6053 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | |
6054 | kobject_name(&(dev->kobj))); | |
6055 | return NULL; | |
6056 | } | |
6057 | ||
6058 | INIT_LIST_HEAD(&probe_ent->node); | |
6059 | probe_ent->dev = dev; | |
6060 | ||
6061 | probe_ent->sht = port->sht; | |
6062 | probe_ent->port_flags = port->flags; | |
6063 | probe_ent->pio_mask = port->pio_mask; | |
6064 | probe_ent->mwdma_mask = port->mwdma_mask; | |
6065 | probe_ent->udma_mask = port->udma_mask; | |
6066 | probe_ent->port_ops = port->port_ops; | |
6067 | probe_ent->private_data = port->private_data; | |
6068 | ||
6069 | return probe_ent; | |
6070 | } | |
6071 | ||
6072 | /** | |
6073 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
6074 | * @ioaddr: IO address structure to be initialized | |
6075 | * | |
6076 | * Utility function which initializes data_addr, error_addr, | |
6077 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
6078 | * device_addr, status_addr, and command_addr to standard offsets | |
6079 | * relative to cmd_addr. | |
6080 | * | |
6081 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
6082 | */ | |
6083 | ||
6084 | void ata_std_ports(struct ata_ioports *ioaddr) | |
6085 | { | |
6086 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
6087 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
6088 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
6089 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
6090 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
6091 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
6092 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
6093 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
6094 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
6095 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
6096 | } | |
6097 | ||
6098 | ||
6099 | #ifdef CONFIG_PCI | |
6100 | ||
6101 | /** | |
6102 | * ata_pci_remove_one - PCI layer callback for device removal | |
6103 | * @pdev: PCI device that was removed | |
6104 | * | |
6105 | * PCI layer indicates to libata via this hook that hot-unplug or | |
6106 | * module unload event has occurred. Detach all ports. Resource | |
6107 | * release is handled via devres. | |
6108 | * | |
6109 | * LOCKING: | |
6110 | * Inherited from PCI layer (may sleep). | |
6111 | */ | |
6112 | void ata_pci_remove_one(struct pci_dev *pdev) | |
6113 | { | |
6114 | struct device *dev = pci_dev_to_dev(pdev); | |
6115 | struct ata_host *host = dev_get_drvdata(dev); | |
6116 | ||
6117 | ata_host_detach(host); | |
6118 | } | |
6119 | ||
6120 | /* move to PCI subsystem */ | |
6121 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) | |
6122 | { | |
6123 | unsigned long tmp = 0; | |
6124 | ||
6125 | switch (bits->width) { | |
6126 | case 1: { | |
6127 | u8 tmp8 = 0; | |
6128 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
6129 | tmp = tmp8; | |
6130 | break; | |
6131 | } | |
6132 | case 2: { | |
6133 | u16 tmp16 = 0; | |
6134 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
6135 | tmp = tmp16; | |
6136 | break; | |
6137 | } | |
6138 | case 4: { | |
6139 | u32 tmp32 = 0; | |
6140 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
6141 | tmp = tmp32; | |
6142 | break; | |
6143 | } | |
6144 | ||
6145 | default: | |
6146 | return -EINVAL; | |
6147 | } | |
6148 | ||
6149 | tmp &= bits->mask; | |
6150 | ||
6151 | return (tmp == bits->val) ? 1 : 0; | |
6152 | } | |
6153 | ||
6154 | #ifdef CONFIG_PM | |
6155 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
6156 | { | |
6157 | pci_save_state(pdev); | |
6158 | pci_disable_device(pdev); | |
6159 | ||
6160 | if (mesg.event == PM_EVENT_SUSPEND) | |
6161 | pci_set_power_state(pdev, PCI_D3hot); | |
6162 | } | |
6163 | ||
6164 | int ata_pci_device_do_resume(struct pci_dev *pdev) | |
6165 | { | |
6166 | int rc; | |
6167 | ||
6168 | pci_set_power_state(pdev, PCI_D0); | |
6169 | pci_restore_state(pdev); | |
6170 | ||
6171 | rc = pcim_enable_device(pdev); | |
6172 | if (rc) { | |
6173 | dev_printk(KERN_ERR, &pdev->dev, | |
6174 | "failed to enable device after resume (%d)\n", rc); | |
6175 | return rc; | |
6176 | } | |
6177 | ||
6178 | pci_set_master(pdev); | |
6179 | return 0; | |
6180 | } | |
6181 | ||
6182 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
6183 | { | |
6184 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | |
6185 | int rc = 0; | |
6186 | ||
6187 | rc = ata_host_suspend(host, mesg); | |
6188 | if (rc) | |
6189 | return rc; | |
6190 | ||
6191 | ata_pci_device_do_suspend(pdev, mesg); | |
6192 | ||
6193 | return 0; | |
6194 | } | |
6195 | ||
6196 | int ata_pci_device_resume(struct pci_dev *pdev) | |
6197 | { | |
6198 | struct ata_host *host = dev_get_drvdata(&pdev->dev); | |
6199 | int rc; | |
6200 | ||
6201 | rc = ata_pci_device_do_resume(pdev); | |
6202 | if (rc == 0) | |
6203 | ata_host_resume(host); | |
6204 | return rc; | |
6205 | } | |
6206 | #endif /* CONFIG_PM */ | |
6207 | ||
6208 | #endif /* CONFIG_PCI */ | |
6209 | ||
6210 | ||
6211 | static int __init ata_init(void) | |
6212 | { | |
6213 | ata_probe_timeout *= HZ; | |
6214 | ata_wq = create_workqueue("ata"); | |
6215 | if (!ata_wq) | |
6216 | return -ENOMEM; | |
6217 | ||
6218 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); | |
6219 | if (!ata_aux_wq) { | |
6220 | destroy_workqueue(ata_wq); | |
6221 | return -ENOMEM; | |
6222 | } | |
6223 | ||
6224 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); | |
6225 | return 0; | |
6226 | } | |
6227 | ||
6228 | static void __exit ata_exit(void) | |
6229 | { | |
6230 | destroy_workqueue(ata_wq); | |
6231 | destroy_workqueue(ata_aux_wq); | |
6232 | } | |
6233 | ||
6234 | subsys_initcall(ata_init); | |
6235 | module_exit(ata_exit); | |
6236 | ||
6237 | static unsigned long ratelimit_time; | |
6238 | static DEFINE_SPINLOCK(ata_ratelimit_lock); | |
6239 | ||
6240 | int ata_ratelimit(void) | |
6241 | { | |
6242 | int rc; | |
6243 | unsigned long flags; | |
6244 | ||
6245 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
6246 | ||
6247 | if (time_after(jiffies, ratelimit_time)) { | |
6248 | rc = 1; | |
6249 | ratelimit_time = jiffies + (HZ/5); | |
6250 | } else | |
6251 | rc = 0; | |
6252 | ||
6253 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
6254 | ||
6255 | return rc; | |
6256 | } | |
6257 | ||
6258 | /** | |
6259 | * ata_wait_register - wait until register value changes | |
6260 | * @reg: IO-mapped register | |
6261 | * @mask: Mask to apply to read register value | |
6262 | * @val: Wait condition | |
6263 | * @interval_msec: polling interval in milliseconds | |
6264 | * @timeout_msec: timeout in milliseconds | |
6265 | * | |
6266 | * Waiting for some bits of register to change is a common | |
6267 | * operation for ATA controllers. This function reads 32bit LE | |
6268 | * IO-mapped register @reg and tests for the following condition. | |
6269 | * | |
6270 | * (*@reg & mask) != val | |
6271 | * | |
6272 | * If the condition is met, it returns; otherwise, the process is | |
6273 | * repeated after @interval_msec until timeout. | |
6274 | * | |
6275 | * LOCKING: | |
6276 | * Kernel thread context (may sleep) | |
6277 | * | |
6278 | * RETURNS: | |
6279 | * The final register value. | |
6280 | */ | |
6281 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
6282 | unsigned long interval_msec, | |
6283 | unsigned long timeout_msec) | |
6284 | { | |
6285 | unsigned long timeout; | |
6286 | u32 tmp; | |
6287 | ||
6288 | tmp = ioread32(reg); | |
6289 | ||
6290 | /* Calculate timeout _after_ the first read to make sure | |
6291 | * preceding writes reach the controller before starting to | |
6292 | * eat away the timeout. | |
6293 | */ | |
6294 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
6295 | ||
6296 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
6297 | msleep(interval_msec); | |
6298 | tmp = ioread32(reg); | |
6299 | } | |
6300 | ||
6301 | return tmp; | |
6302 | } | |
6303 | ||
6304 | /* | |
6305 | * Dummy port_ops | |
6306 | */ | |
6307 | static void ata_dummy_noret(struct ata_port *ap) { } | |
6308 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
6309 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
6310 | ||
6311 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
6312 | { | |
6313 | return ATA_DRDY; | |
6314 | } | |
6315 | ||
6316 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
6317 | { | |
6318 | return AC_ERR_SYSTEM; | |
6319 | } | |
6320 | ||
6321 | const struct ata_port_operations ata_dummy_port_ops = { | |
6322 | .port_disable = ata_port_disable, | |
6323 | .check_status = ata_dummy_check_status, | |
6324 | .check_altstatus = ata_dummy_check_status, | |
6325 | .dev_select = ata_noop_dev_select, | |
6326 | .qc_prep = ata_noop_qc_prep, | |
6327 | .qc_issue = ata_dummy_qc_issue, | |
6328 | .freeze = ata_dummy_noret, | |
6329 | .thaw = ata_dummy_noret, | |
6330 | .error_handler = ata_dummy_noret, | |
6331 | .post_internal_cmd = ata_dummy_qc_noret, | |
6332 | .irq_clear = ata_dummy_noret, | |
6333 | .port_start = ata_dummy_ret0, | |
6334 | .port_stop = ata_dummy_noret, | |
6335 | }; | |
6336 | ||
6337 | /* | |
6338 | * libata is essentially a library of internal helper functions for | |
6339 | * low-level ATA host controller drivers. As such, the API/ABI is | |
6340 | * likely to change as new drivers are added and updated. | |
6341 | * Do not depend on ABI/API stability. | |
6342 | */ | |
6343 | ||
6344 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); | |
6345 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
6346 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
6347 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); | |
6348 | EXPORT_SYMBOL_GPL(ata_std_bios_param); | |
6349 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
6350 | EXPORT_SYMBOL_GPL(ata_host_init); | |
6351 | EXPORT_SYMBOL_GPL(ata_device_add); | |
6352 | EXPORT_SYMBOL_GPL(ata_host_detach); | |
6353 | EXPORT_SYMBOL_GPL(ata_sg_init); | |
6354 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
6355 | EXPORT_SYMBOL_GPL(ata_hsm_move); | |
6356 | EXPORT_SYMBOL_GPL(ata_qc_complete); | |
6357 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); | |
6358 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); | |
6359 | EXPORT_SYMBOL_GPL(ata_tf_load); | |
6360 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
6361 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
6362 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
6363 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); | |
6364 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
6365 | EXPORT_SYMBOL_GPL(ata_check_status); | |
6366 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
6367 | EXPORT_SYMBOL_GPL(ata_exec_command); | |
6368 | EXPORT_SYMBOL_GPL(ata_port_start); | |
6369 | EXPORT_SYMBOL_GPL(ata_interrupt); | |
6370 | EXPORT_SYMBOL_GPL(ata_data_xfer); | |
6371 | EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); | |
6372 | EXPORT_SYMBOL_GPL(ata_qc_prep); | |
6373 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); | |
6374 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); | |
6375 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
6376 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
6377 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
6378 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6379 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); | |
6380 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
6381 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
6382 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
6383 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
6384 | EXPORT_SYMBOL_GPL(ata_port_probe); | |
6385 | EXPORT_SYMBOL_GPL(ata_dev_disable); | |
6386 | EXPORT_SYMBOL_GPL(sata_set_spd); | |
6387 | EXPORT_SYMBOL_GPL(sata_phy_debounce); | |
6388 | EXPORT_SYMBOL_GPL(sata_phy_resume); | |
6389 | EXPORT_SYMBOL_GPL(sata_phy_reset); | |
6390 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
6391 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
6392 | EXPORT_SYMBOL_GPL(ata_std_prereset); | |
6393 | EXPORT_SYMBOL_GPL(ata_std_softreset); | |
6394 | EXPORT_SYMBOL_GPL(sata_port_hardreset); | |
6395 | EXPORT_SYMBOL_GPL(sata_std_hardreset); | |
6396 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
6397 | EXPORT_SYMBOL_GPL(ata_dev_classify); | |
6398 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
6399 | EXPORT_SYMBOL_GPL(ata_port_disable); | |
6400 | EXPORT_SYMBOL_GPL(ata_ratelimit); | |
6401 | EXPORT_SYMBOL_GPL(ata_wait_register); | |
6402 | EXPORT_SYMBOL_GPL(ata_busy_sleep); | |
6403 | EXPORT_SYMBOL_GPL(ata_port_queue_task); | |
6404 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); | |
6405 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
6406 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); | |
6407 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); | |
6408 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); | |
6409 | EXPORT_SYMBOL_GPL(ata_host_intr); | |
6410 | EXPORT_SYMBOL_GPL(sata_scr_valid); | |
6411 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
6412 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
6413 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
6414 | EXPORT_SYMBOL_GPL(ata_port_online); | |
6415 | EXPORT_SYMBOL_GPL(ata_port_offline); | |
6416 | #ifdef CONFIG_PM | |
6417 | EXPORT_SYMBOL_GPL(ata_host_suspend); | |
6418 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6419 | #endif /* CONFIG_PM */ | |
6420 | EXPORT_SYMBOL_GPL(ata_id_string); | |
6421 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
6422 | EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); | |
6423 | EXPORT_SYMBOL_GPL(ata_device_blacklisted); | |
6424 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); | |
6425 | ||
6426 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); | |
6427 | EXPORT_SYMBOL_GPL(ata_timing_compute); | |
6428 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
6429 | ||
6430 | #ifdef CONFIG_PCI | |
6431 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
6432 | EXPORT_SYMBOL_GPL(ata_pci_init_native_mode); | |
6433 | EXPORT_SYMBOL_GPL(ata_pci_init_one); | |
6434 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
6435 | #ifdef CONFIG_PM | |
6436 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); | |
6437 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
6438 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); | |
6439 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
6440 | #endif /* CONFIG_PM */ | |
6441 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); | |
6442 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
6443 | #endif /* CONFIG_PCI */ | |
6444 | ||
6445 | #ifdef CONFIG_PM | |
6446 | EXPORT_SYMBOL_GPL(ata_scsi_device_suspend); | |
6447 | EXPORT_SYMBOL_GPL(ata_scsi_device_resume); | |
6448 | #endif /* CONFIG_PM */ | |
6449 | ||
6450 | EXPORT_SYMBOL_GPL(ata_eng_timeout); | |
6451 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); | |
6452 | EXPORT_SYMBOL_GPL(ata_port_abort); | |
6453 | EXPORT_SYMBOL_GPL(ata_port_freeze); | |
6454 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); | |
6455 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
6456 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); | |
6457 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
6458 | EXPORT_SYMBOL_GPL(ata_do_eh); | |
6459 | EXPORT_SYMBOL_GPL(ata_irq_on); | |
6460 | EXPORT_SYMBOL_GPL(ata_dummy_irq_on); | |
6461 | EXPORT_SYMBOL_GPL(ata_irq_ack); | |
6462 | EXPORT_SYMBOL_GPL(ata_dummy_irq_ack); | |
6463 | EXPORT_SYMBOL_GPL(ata_dev_try_classify); |