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1 | ||
2 | menuconfig CRYPTO_HW | |
3 | bool "Hardware crypto devices" | |
4 | default y | |
5 | ---help--- | |
6 | Say Y here to get to see options for hardware crypto devices and | |
7 | processors. This option alone does not add any kernel code. | |
8 | ||
9 | If you say N, all options in this submenu will be skipped and disabled. | |
10 | ||
11 | if CRYPTO_HW | |
12 | ||
13 | config CRYPTO_DEV_PADLOCK | |
14 | tristate "Support for VIA PadLock ACE" | |
15 | depends on X86 && !UML | |
16 | help | |
17 | Some VIA processors come with an integrated crypto engine | |
18 | (so called VIA PadLock ACE, Advanced Cryptography Engine) | |
19 | that provides instructions for very fast cryptographic | |
20 | operations with supported algorithms. | |
21 | ||
22 | The instructions are used only when the CPU supports them. | |
23 | Otherwise software encryption is used. | |
24 | ||
25 | config CRYPTO_DEV_PADLOCK_AES | |
26 | tristate "PadLock driver for AES algorithm" | |
27 | depends on CRYPTO_DEV_PADLOCK | |
28 | select CRYPTO_BLKCIPHER | |
29 | select CRYPTO_AES | |
30 | help | |
31 | Use VIA PadLock for AES algorithm. | |
32 | ||
33 | Available in VIA C3 and newer CPUs. | |
34 | ||
35 | If unsure say M. The compiled module will be | |
36 | called padlock-aes. | |
37 | ||
38 | config CRYPTO_DEV_PADLOCK_SHA | |
39 | tristate "PadLock driver for SHA1 and SHA256 algorithms" | |
40 | depends on CRYPTO_DEV_PADLOCK | |
41 | select CRYPTO_HASH | |
42 | select CRYPTO_SHA1 | |
43 | select CRYPTO_SHA256 | |
44 | help | |
45 | Use VIA PadLock for SHA1/SHA256 algorithms. | |
46 | ||
47 | Available in VIA C7 and newer processors. | |
48 | ||
49 | If unsure say M. The compiled module will be | |
50 | called padlock-sha. | |
51 | ||
52 | config CRYPTO_DEV_GEODE | |
53 | tristate "Support for the Geode LX AES engine" | |
54 | depends on X86_32 && PCI | |
55 | select CRYPTO_ALGAPI | |
56 | select CRYPTO_BLKCIPHER | |
57 | help | |
58 | Say 'Y' here to use the AMD Geode LX processor on-board AES | |
59 | engine for the CryptoAPI AES algorithm. | |
60 | ||
61 | To compile this driver as a module, choose M here: the module | |
62 | will be called geode-aes. | |
63 | ||
64 | config ZCRYPT | |
65 | tristate "Support for PCI-attached cryptographic adapters" | |
66 | depends on S390 | |
67 | select ZCRYPT_MONOLITHIC if ZCRYPT="y" | |
68 | select HW_RANDOM | |
69 | help | |
70 | Select this option if you want to use a PCI-attached cryptographic | |
71 | adapter like: | |
72 | + PCI Cryptographic Accelerator (PCICA) | |
73 | + PCI Cryptographic Coprocessor (PCICC) | |
74 | + PCI-X Cryptographic Coprocessor (PCIXCC) | |
75 | + Crypto Express2 Coprocessor (CEX2C) | |
76 | + Crypto Express2 Accelerator (CEX2A) | |
77 | ||
78 | config ZCRYPT_MONOLITHIC | |
79 | bool "Monolithic zcrypt module" | |
80 | depends on ZCRYPT | |
81 | help | |
82 | Select this option if you want to have a single module z90crypt, | |
83 | that contains all parts of the crypto device driver (ap bus, | |
84 | request router and all the card drivers). | |
85 | ||
86 | config CRYPTO_SHA1_S390 | |
87 | tristate "SHA1 digest algorithm" | |
88 | depends on S390 | |
89 | select CRYPTO_HASH | |
90 | help | |
91 | This is the s390 hardware accelerated implementation of the | |
92 | SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). | |
93 | ||
94 | config CRYPTO_SHA256_S390 | |
95 | tristate "SHA256 digest algorithm" | |
96 | depends on S390 | |
97 | select CRYPTO_HASH | |
98 | help | |
99 | This is the s390 hardware accelerated implementation of the | |
100 | SHA256 secure hash standard (DFIPS 180-2). | |
101 | ||
102 | This version of SHA implements a 256 bit hash with 128 bits of | |
103 | security against collision attacks. | |
104 | ||
105 | config CRYPTO_SHA512_S390 | |
106 | tristate "SHA384 and SHA512 digest algorithm" | |
107 | depends on S390 | |
108 | select CRYPTO_HASH | |
109 | help | |
110 | This is the s390 hardware accelerated implementation of the | |
111 | SHA512 secure hash standard. | |
112 | ||
113 | This version of SHA implements a 512 bit hash with 256 bits of | |
114 | security against collision attacks. The code also includes SHA-384, | |
115 | a 384 bit hash with 192 bits of security against collision attacks. | |
116 | ||
117 | ||
118 | config CRYPTO_DES_S390 | |
119 | tristate "DES and Triple DES cipher algorithms" | |
120 | depends on S390 | |
121 | select CRYPTO_ALGAPI | |
122 | select CRYPTO_BLKCIPHER | |
123 | help | |
124 | This us the s390 hardware accelerated implementation of the | |
125 | DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). | |
126 | ||
127 | config CRYPTO_AES_S390 | |
128 | tristate "AES cipher algorithms" | |
129 | depends on S390 | |
130 | select CRYPTO_ALGAPI | |
131 | select CRYPTO_BLKCIPHER | |
132 | help | |
133 | This is the s390 hardware accelerated implementation of the | |
134 | AES cipher algorithms (FIPS-197). AES uses the Rijndael | |
135 | algorithm. | |
136 | ||
137 | Rijndael appears to be consistently a very good performer in | |
138 | both hardware and software across a wide range of computing | |
139 | environments regardless of its use in feedback or non-feedback | |
140 | modes. Its key setup time is excellent, and its key agility is | |
141 | good. Rijndael's very low memory requirements make it very well | |
142 | suited for restricted-space environments, in which it also | |
143 | demonstrates excellent performance. Rijndael's operations are | |
144 | among the easiest to defend against power and timing attacks. | |
145 | ||
146 | On s390 the System z9-109 currently only supports the key size | |
147 | of 128 bit. | |
148 | ||
149 | config S390_PRNG | |
150 | tristate "Pseudo random number generator device driver" | |
151 | depends on S390 | |
152 | default "m" | |
153 | help | |
154 | Select this option if you want to use the s390 pseudo random number | |
155 | generator. The PRNG is part of the cryptographic processor functions | |
156 | and uses triple-DES to generate secure random numbers like the | |
157 | ANSI X9.17 standard. The PRNG is usable via the char device | |
158 | /dev/prandom. | |
159 | ||
160 | config CRYPTO_DEV_MV_CESA | |
161 | tristate "Marvell's Cryptographic Engine" | |
162 | depends on PLAT_ORION | |
163 | select CRYPTO_ALGAPI | |
164 | select CRYPTO_AES | |
165 | select CRYPTO_BLKCIPHER2 | |
166 | help | |
167 | This driver allows you to utilize the Cryptographic Engines and | |
168 | Security Accelerator (CESA) which can be found on the Marvell Orion | |
169 | and Kirkwood SoCs, such as QNAP's TS-209. | |
170 | ||
171 | Currently the driver supports AES in ECB and CBC mode without DMA. | |
172 | ||
173 | config CRYPTO_DEV_NIAGARA2 | |
174 | tristate "Niagara2 Stream Processing Unit driver" | |
175 | select CRYPTO_DES | |
176 | select CRYPTO_ALGAPI | |
177 | depends on SPARC64 | |
178 | help | |
179 | Each core of a Niagara2 processor contains a Stream | |
180 | Processing Unit, which itself contains several cryptographic | |
181 | sub-units. One set provides the Modular Arithmetic Unit, | |
182 | used for SSL offload. The other set provides the Cipher | |
183 | Group, which can perform encryption, decryption, hashing, | |
184 | checksumming, and raw copies. | |
185 | ||
186 | config CRYPTO_DEV_HIFN_795X | |
187 | tristate "Driver HIFN 795x crypto accelerator chips" | |
188 | select CRYPTO_DES | |
189 | select CRYPTO_ALGAPI | |
190 | select CRYPTO_BLKCIPHER | |
191 | select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG | |
192 | depends on PCI | |
193 | help | |
194 | This option allows you to have support for HIFN 795x crypto adapters. | |
195 | ||
196 | config CRYPTO_DEV_HIFN_795X_RNG | |
197 | bool "HIFN 795x random number generator" | |
198 | depends on CRYPTO_DEV_HIFN_795X | |
199 | help | |
200 | Select this option if you want to enable the random number generator | |
201 | on the HIFN 795x crypto adapters. | |
202 | ||
203 | config CRYPTO_DEV_TALITOS | |
204 | tristate "Talitos Freescale Security Engine (SEC)" | |
205 | select CRYPTO_ALGAPI | |
206 | select CRYPTO_AUTHENC | |
207 | select HW_RANDOM | |
208 | depends on FSL_SOC | |
209 | help | |
210 | Say 'Y' here to use the Freescale Security Engine (SEC) | |
211 | to offload cryptographic algorithm computation. | |
212 | ||
213 | The Freescale SEC is present on PowerQUICC 'E' processors, such | |
214 | as the MPC8349E and MPC8548E. | |
215 | ||
216 | To compile this driver as a module, choose M here: the module | |
217 | will be called talitos. | |
218 | ||
219 | config CRYPTO_DEV_IXP4XX | |
220 | tristate "Driver for IXP4xx crypto hardware acceleration" | |
221 | depends on ARCH_IXP4XX | |
222 | select CRYPTO_DES | |
223 | select CRYPTO_ALGAPI | |
224 | select CRYPTO_AUTHENC | |
225 | select CRYPTO_BLKCIPHER | |
226 | help | |
227 | Driver for the IXP4xx NPE crypto engine. | |
228 | ||
229 | config CRYPTO_DEV_PPC4XX | |
230 | tristate "Driver AMCC PPC4xx crypto accelerator" | |
231 | depends on PPC && 4xx | |
232 | select CRYPTO_HASH | |
233 | select CRYPTO_ALGAPI | |
234 | select CRYPTO_BLKCIPHER | |
235 | help | |
236 | This option allows you to have support for AMCC crypto acceleration. | |
237 | ||
238 | config CRYPTO_DEV_OMAP_SHAM | |
239 | tristate "Support for OMAP SHA1/MD5 hw accelerator" | |
240 | depends on ARCH_OMAP2 || ARCH_OMAP3 | |
241 | select CRYPTO_SHA1 | |
242 | select CRYPTO_MD5 | |
243 | help | |
244 | OMAP processors have SHA1/MD5 hw accelerator. Select this if you | |
245 | want to use the OMAP module for SHA1/MD5 algorithms. | |
246 | ||
247 | config CRYPTO_DEV_OMAP_AES | |
248 | tristate "Support for OMAP AES hw engine" | |
249 | depends on ARCH_OMAP2 || ARCH_OMAP3 | |
250 | select CRYPTO_AES | |
251 | help | |
252 | OMAP processors have AES module accelerator. Select this if you | |
253 | want to use the OMAP module for AES algorithms. | |
254 | ||
255 | endif # CRYPTO_HW |