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1 | # | |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
5 | menuconfig DMADEVICES | |
6 | bool "DMA Engine support" | |
7 | depends on HAS_DMA | |
8 | help | |
9 | DMA engines can do asynchronous data transfers without | |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
12 | RAID operations in the MD driver. This menu only presents | |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
15 | ||
16 | config DMADEVICES_DEBUG | |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
32 | if DMADEVICES | |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
36 | #core | |
37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
38 | bool | |
39 | ||
40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL | |
41 | bool | |
42 | ||
43 | config DMA_ENGINE | |
44 | bool | |
45 | ||
46 | config DMA_VIRTUAL_CHANNELS | |
47 | tristate | |
48 | ||
49 | config DMA_ACPI | |
50 | def_bool y | |
51 | depends on ACPI | |
52 | ||
53 | config DMA_OF | |
54 | def_bool y | |
55 | depends on OF | |
56 | select DMA_ENGINE | |
57 | ||
58 | #devices | |
59 | config AMBA_PL08X | |
60 | bool "ARM PrimeCell PL080 or PL081 support" | |
61 | depends on ARM_AMBA | |
62 | select DMA_ENGINE | |
63 | select DMA_VIRTUAL_CHANNELS | |
64 | help | |
65 | Platform has a PL08x DMAC device | |
66 | which can provide DMA engine support | |
67 | ||
68 | config AMCC_PPC440SPE_ADMA | |
69 | tristate "AMCC PPC440SPe ADMA support" | |
70 | depends on 440SPe || 440SP | |
71 | select DMA_ENGINE | |
72 | select DMA_ENGINE_RAID | |
73 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL | |
74 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
75 | help | |
76 | Enable support for the AMCC PPC440SPe RAID engines. | |
77 | ||
78 | config AT_HDMAC | |
79 | tristate "Atmel AHB DMA support" | |
80 | depends on ARCH_AT91 | |
81 | select DMA_ENGINE | |
82 | help | |
83 | Support the Atmel AHB DMA controller. | |
84 | ||
85 | config AT_XDMAC | |
86 | tristate "Atmel XDMA support" | |
87 | depends on ARCH_AT91 | |
88 | select DMA_ENGINE | |
89 | help | |
90 | Support the Atmel XDMA controller. | |
91 | ||
92 | config AXI_DMAC | |
93 | tristate "Analog Devices AXI-DMAC DMA support" | |
94 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST | |
95 | select DMA_ENGINE | |
96 | select DMA_VIRTUAL_CHANNELS | |
97 | help | |
98 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA | |
99 | controller is often used in Analog Device's reference designs for FPGA | |
100 | platforms. | |
101 | ||
102 | config COH901318 | |
103 | bool "ST-Ericsson COH901318 DMA support" | |
104 | select DMA_ENGINE | |
105 | depends on ARCH_U300 || COMPILE_TEST | |
106 | help | |
107 | Enable support for ST-Ericsson COH 901 318 DMA. | |
108 | ||
109 | config DMA_BCM2835 | |
110 | tristate "BCM2835 DMA engine support" | |
111 | depends on ARCH_BCM2835 | |
112 | select DMA_ENGINE | |
113 | select DMA_VIRTUAL_CHANNELS | |
114 | ||
115 | config DMA_JZ4740 | |
116 | tristate "JZ4740 DMA support" | |
117 | depends on MACH_JZ4740 || COMPILE_TEST | |
118 | select DMA_ENGINE | |
119 | select DMA_VIRTUAL_CHANNELS | |
120 | ||
121 | config DMA_JZ4780 | |
122 | tristate "JZ4780 DMA support" | |
123 | depends on MACH_JZ4780 || COMPILE_TEST | |
124 | select DMA_ENGINE | |
125 | select DMA_VIRTUAL_CHANNELS | |
126 | help | |
127 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. | |
128 | If you have a board based on such a SoC and wish to use DMA for | |
129 | devices which can use the DMA controller, say Y or M here. | |
130 | ||
131 | config DMA_OMAP | |
132 | tristate "OMAP DMA support" | |
133 | depends on ARCH_OMAP || COMPILE_TEST | |
134 | select DMA_ENGINE | |
135 | select DMA_VIRTUAL_CHANNELS | |
136 | select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) | |
137 | ||
138 | config DMA_SA11X0 | |
139 | tristate "SA-11x0 DMA support" | |
140 | depends on ARCH_SA1100 || COMPILE_TEST | |
141 | select DMA_ENGINE | |
142 | select DMA_VIRTUAL_CHANNELS | |
143 | help | |
144 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
145 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
146 | devices. | |
147 | ||
148 | config DMA_SUN4I | |
149 | tristate "Allwinner A10 DMA SoCs support" | |
150 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I | |
151 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) | |
152 | select DMA_ENGINE | |
153 | select DMA_VIRTUAL_CHANNELS | |
154 | help | |
155 | Enable support for the DMA controller present in the sun4i, | |
156 | sun5i and sun7i Allwinner ARM SoCs. | |
157 | ||
158 | config DMA_SUN6I | |
159 | tristate "Allwinner A31 SoCs DMA support" | |
160 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST | |
161 | depends on RESET_CONTROLLER | |
162 | select DMA_ENGINE | |
163 | select DMA_VIRTUAL_CHANNELS | |
164 | help | |
165 | Support for the DMA engine first found in Allwinner A31 SoCs. | |
166 | ||
167 | config EP93XX_DMA | |
168 | bool "Cirrus Logic EP93xx DMA support" | |
169 | depends on ARCH_EP93XX || COMPILE_TEST | |
170 | select DMA_ENGINE | |
171 | help | |
172 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
173 | ||
174 | config FSL_DMA | |
175 | tristate "Freescale Elo series DMA support" | |
176 | depends on FSL_SOC | |
177 | select DMA_ENGINE | |
178 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
179 | ---help--- | |
180 | Enable support for the Freescale Elo series DMA controllers. | |
181 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
182 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
183 | some Txxx and Bxxx parts. | |
184 | ||
185 | config FSL_EDMA | |
186 | tristate "Freescale eDMA engine support" | |
187 | depends on OF | |
188 | select DMA_ENGINE | |
189 | select DMA_VIRTUAL_CHANNELS | |
190 | help | |
191 | Support the Freescale eDMA engine with programmable channel | |
192 | multiplexing capability for DMA request sources(slot). | |
193 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
194 | ||
195 | config FSL_RAID | |
196 | tristate "Freescale RAID engine Support" | |
197 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
198 | select DMA_ENGINE | |
199 | select DMA_ENGINE_RAID | |
200 | ---help--- | |
201 | Enable support for Freescale RAID Engine. RAID Engine is | |
202 | available on some QorIQ SoCs (like P5020/P5040). It has | |
203 | the capability to offload memcpy, xor and pq computation | |
204 | for raid5/6. | |
205 | ||
206 | config IMG_MDC_DMA | |
207 | tristate "IMG MDC support" | |
208 | depends on MIPS || COMPILE_TEST | |
209 | depends on MFD_SYSCON | |
210 | select DMA_ENGINE | |
211 | select DMA_VIRTUAL_CHANNELS | |
212 | help | |
213 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
214 | ||
215 | config IMX_DMA | |
216 | tristate "i.MX DMA support" | |
217 | depends on ARCH_MXC | |
218 | select DMA_ENGINE | |
219 | help | |
220 | Support the i.MX DMA engine. This engine is integrated into | |
221 | Freescale i.MX1/21/27 chips. | |
222 | ||
223 | config IMX_SDMA | |
224 | tristate "i.MX SDMA support" | |
225 | depends on ARCH_MXC | |
226 | select DMA_ENGINE | |
227 | help | |
228 | Support the i.MX SDMA engine. This engine is integrated into | |
229 | Freescale i.MX25/31/35/51/53/6 chips. | |
230 | ||
231 | config INTEL_IDMA64 | |
232 | tristate "Intel integrated DMA 64-bit support" | |
233 | select DMA_ENGINE | |
234 | select DMA_VIRTUAL_CHANNELS | |
235 | help | |
236 | Enable DMA support for Intel Low Power Subsystem such as found on | |
237 | Intel Skylake PCH. | |
238 | ||
239 | config INTEL_IOATDMA | |
240 | tristate "Intel I/OAT DMA support" | |
241 | depends on PCI && X86_64 | |
242 | select DMA_ENGINE | |
243 | select DMA_ENGINE_RAID | |
244 | select DCA | |
245 | help | |
246 | Enable support for the Intel(R) I/OAT DMA engine present | |
247 | in recent Intel Xeon chipsets. | |
248 | ||
249 | Say Y here if you have such a chipset. | |
250 | ||
251 | If unsure, say N. | |
252 | ||
253 | config INTEL_IOP_ADMA | |
254 | tristate "Intel IOP ADMA support" | |
255 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
256 | select DMA_ENGINE | |
257 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
258 | help | |
259 | Enable support for the Intel(R) IOP Series RAID engines. | |
260 | ||
261 | config INTEL_MIC_X100_DMA | |
262 | tristate "Intel MIC X100 DMA Driver" | |
263 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
264 | select DMA_ENGINE | |
265 | help | |
266 | This enables DMA support for the Intel Many Integrated Core | |
267 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
268 | run a 64 bit Linux OS. This driver will be used by both MIC | |
269 | host and card drivers. | |
270 | ||
271 | If you are building host kernel with a MIC device or a card | |
272 | kernel for a MIC device, then say M (recommended) or Y, else | |
273 | say N. If unsure say N. | |
274 | ||
275 | More information about the Intel MIC family as well as the Linux | |
276 | OS and tools for MIC to use with this driver are available from | |
277 | <http://software.intel.com/en-us/mic-developer>. | |
278 | ||
279 | config K3_DMA | |
280 | tristate "Hisilicon K3 DMA support" | |
281 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST | |
282 | select DMA_ENGINE | |
283 | select DMA_VIRTUAL_CHANNELS | |
284 | help | |
285 | Support the DMA engine for Hisilicon K3 platform | |
286 | devices. | |
287 | ||
288 | config LPC18XX_DMAMUX | |
289 | bool "NXP LPC18xx/43xx DMA MUX for PL080" | |
290 | depends on ARCH_LPC18XX || COMPILE_TEST | |
291 | depends on OF && AMBA_PL08X | |
292 | select MFD_SYSCON | |
293 | help | |
294 | Enable support for DMA on NXP LPC18xx/43xx platforms | |
295 | with PL080 and multiplexed DMA request lines. | |
296 | ||
297 | config MMP_PDMA | |
298 | bool "MMP PDMA support" | |
299 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST | |
300 | select DMA_ENGINE | |
301 | help | |
302 | Support the MMP PDMA engine for PXA and MMP platform. | |
303 | ||
304 | config MMP_TDMA | |
305 | bool "MMP Two-Channel DMA support" | |
306 | depends on ARCH_MMP || COMPILE_TEST | |
307 | select DMA_ENGINE | |
308 | select MMP_SRAM if ARCH_MMP | |
309 | select GENERIC_ALLOCATOR | |
310 | help | |
311 | Support the MMP Two-Channel DMA engine. | |
312 | This engine used for MMP Audio DMA and pxa910 SQU. | |
313 | It needs sram driver under mach-mmp. | |
314 | ||
315 | config MOXART_DMA | |
316 | tristate "MOXART DMA support" | |
317 | depends on ARCH_MOXART | |
318 | select DMA_ENGINE | |
319 | select DMA_VIRTUAL_CHANNELS | |
320 | help | |
321 | Enable support for the MOXA ART SoC DMA controller. | |
322 | ||
323 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
324 | ||
325 | config MPC512X_DMA | |
326 | tristate "Freescale MPC512x built-in DMA engine support" | |
327 | depends on PPC_MPC512x || PPC_MPC831x | |
328 | select DMA_ENGINE | |
329 | ---help--- | |
330 | Enable support for the Freescale MPC512x built-in DMA engine. | |
331 | ||
332 | config MV_XOR | |
333 | bool "Marvell XOR engine support" | |
334 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST | |
335 | select DMA_ENGINE | |
336 | select DMA_ENGINE_RAID | |
337 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
338 | ---help--- | |
339 | Enable support for the Marvell XOR engine. | |
340 | ||
341 | config MV_XOR_V2 | |
342 | bool "Marvell XOR engine version 2 support " | |
343 | depends on ARM64 | |
344 | select DMA_ENGINE | |
345 | select DMA_ENGINE_RAID | |
346 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
347 | select GENERIC_MSI_IRQ_DOMAIN | |
348 | ---help--- | |
349 | Enable support for the Marvell version 2 XOR engine. | |
350 | ||
351 | This engine provides acceleration for copy, XOR and RAID6 | |
352 | operations, and is available on Marvell Armada 7K and 8K | |
353 | platforms. | |
354 | ||
355 | config MXS_DMA | |
356 | bool "MXS DMA support" | |
357 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL | |
358 | select STMP_DEVICE | |
359 | select DMA_ENGINE | |
360 | help | |
361 | Support the MXS DMA engine. This engine including APBH-DMA | |
362 | and APBX-DMA is integrated into Freescale | |
363 | i.MX23/28/MX6Q/MX6DL/MX6UL chips. | |
364 | ||
365 | config MX3_IPU | |
366 | bool "MX3x Image Processing Unit support" | |
367 | depends on ARCH_MXC | |
368 | select DMA_ENGINE | |
369 | default y | |
370 | help | |
371 | If you plan to use the Image Processing unit in the i.MX3x, say | |
372 | Y here. If unsure, select Y. | |
373 | ||
374 | config MX3_IPU_IRQS | |
375 | int "Number of dynamically mapped interrupts for IPU" | |
376 | depends on MX3_IPU | |
377 | range 2 137 | |
378 | default 4 | |
379 | help | |
380 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
381 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
382 | number of IRQ slots and map them dynamically to specific sources. | |
383 | ||
384 | config NBPFAXI_DMA | |
385 | tristate "Renesas Type-AXI NBPF DMA support" | |
386 | select DMA_ENGINE | |
387 | depends on ARM || COMPILE_TEST | |
388 | help | |
389 | Support for "Type-AXI" NBPF DMA IPs from Renesas | |
390 | ||
391 | config PCH_DMA | |
392 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" | |
393 | depends on PCI && (X86_32 || COMPILE_TEST) | |
394 | select DMA_ENGINE | |
395 | help | |
396 | Enable support for Intel EG20T PCH DMA engine. | |
397 | ||
398 | This driver also can be used for LAPIS Semiconductor IOH(Input/ | |
399 | Output Hub), ML7213, ML7223 and ML7831. | |
400 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
401 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
402 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
403 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
404 | ||
405 | config PL330_DMA | |
406 | tristate "DMA API Driver for PL330" | |
407 | select DMA_ENGINE | |
408 | depends on ARM_AMBA | |
409 | help | |
410 | Select if your platform has one or more PL330 DMACs. | |
411 | You need to provide platform specific settings via | |
412 | platform_data for a dma-pl330 device. | |
413 | ||
414 | config PXA_DMA | |
415 | bool "PXA DMA support" | |
416 | depends on (ARCH_MMP || ARCH_PXA) | |
417 | select DMA_ENGINE | |
418 | select DMA_VIRTUAL_CHANNELS | |
419 | help | |
420 | Support the DMA engine for PXA. It is also compatible with MMP PDMA | |
421 | platform. The internal DMA IP of all PXA variants is supported, with | |
422 | 16 to 32 channels for peripheral to memory or memory to memory | |
423 | transfers. | |
424 | ||
425 | config SIRF_DMA | |
426 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
427 | depends on ARCH_SIRF | |
428 | select DMA_ENGINE | |
429 | help | |
430 | Enable support for the CSR SiRFprimaII DMA engine. | |
431 | ||
432 | config STE_DMA40 | |
433 | bool "ST-Ericsson DMA40 support" | |
434 | depends on ARCH_U8500 | |
435 | select DMA_ENGINE | |
436 | help | |
437 | Support for ST-Ericsson DMA40 controller | |
438 | ||
439 | config ST_FDMA | |
440 | tristate "ST FDMA dmaengine support" | |
441 | depends on ARCH_STI | |
442 | depends on REMOTEPROC | |
443 | select ST_SLIM_REMOTEPROC | |
444 | select DMA_ENGINE | |
445 | select DMA_VIRTUAL_CHANNELS | |
446 | help | |
447 | Enable support for ST FDMA controller. | |
448 | It supports 16 independent DMA channels, accepts up to 32 DMA requests | |
449 | ||
450 | Say Y here if you have such a chipset. | |
451 | If unsure, say N. | |
452 | ||
453 | config STM32_DMA | |
454 | bool "STMicroelectronics STM32 DMA support" | |
455 | depends on ARCH_STM32 || COMPILE_TEST | |
456 | select DMA_ENGINE | |
457 | select DMA_VIRTUAL_CHANNELS | |
458 | help | |
459 | Enable support for the on-chip DMA controller on STMicroelectronics | |
460 | STM32 MCUs. | |
461 | If you have a board based on such a MCU and wish to use DMA say Y or M | |
462 | here. | |
463 | ||
464 | config S3C24XX_DMAC | |
465 | bool "Samsung S3C24XX DMA support" | |
466 | depends on ARCH_S3C24XX || COMPILE_TEST | |
467 | select DMA_ENGINE | |
468 | select DMA_VIRTUAL_CHANNELS | |
469 | help | |
470 | Support for the Samsung S3C24XX DMA controller driver. The | |
471 | DMA controller is having multiple DMA channels which can be | |
472 | configured for different peripherals like audio, UART, SPI. | |
473 | The DMA controller can transfer data from memory to peripheral, | |
474 | periphal to memory, periphal to periphal and memory to memory. | |
475 | ||
476 | config TXX9_DMAC | |
477 | tristate "Toshiba TXx9 SoC DMA support" | |
478 | depends on MACH_TX49XX || MACH_TX39XX | |
479 | select DMA_ENGINE | |
480 | help | |
481 | Support the TXx9 SoC internal DMA controller. This can be | |
482 | integrated in chips such as the Toshiba TX4927/38/39. | |
483 | ||
484 | config TEGRA20_APB_DMA | |
485 | bool "NVIDIA Tegra20 APB DMA support" | |
486 | depends on ARCH_TEGRA | |
487 | select DMA_ENGINE | |
488 | help | |
489 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
490 | DMA controller is having multiple DMA channel which can be | |
491 | configured for different peripherals like audio, UART, SPI, | |
492 | I2C etc which is in APB bus. | |
493 | This DMA controller transfers data from memory to peripheral fifo | |
494 | or vice versa. It does not support memory to memory data transfer. | |
495 | ||
496 | config TEGRA210_ADMA | |
497 | tristate "NVIDIA Tegra210 ADMA support" | |
498 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK | |
499 | select DMA_ENGINE | |
500 | select DMA_VIRTUAL_CHANNELS | |
501 | help | |
502 | Support for the NVIDIA Tegra210 ADMA controller driver. The | |
503 | DMA controller has multiple DMA channels and is used to service | |
504 | various audio clients in the Tegra210 audio processing engine | |
505 | (APE). This DMA controller transfers data from memory to | |
506 | peripheral and vice versa. It does not support memory to | |
507 | memory data transfer. | |
508 | ||
509 | config TIMB_DMA | |
510 | tristate "Timberdale FPGA DMA support" | |
511 | depends on MFD_TIMBERDALE || COMPILE_TEST | |
512 | select DMA_ENGINE | |
513 | help | |
514 | Enable support for the Timberdale FPGA DMA engine. | |
515 | ||
516 | config TI_CPPI41 | |
517 | tristate "AM33xx CPPI41 DMA support" | |
518 | depends on ARCH_OMAP | |
519 | select DMA_ENGINE | |
520 | help | |
521 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
522 | is currently used by the USB driver on AM335x platforms. | |
523 | ||
524 | config TI_DMA_CROSSBAR | |
525 | bool | |
526 | ||
527 | config TI_EDMA | |
528 | bool "TI EDMA support" | |
529 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST | |
530 | select DMA_ENGINE | |
531 | select DMA_VIRTUAL_CHANNELS | |
532 | select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) | |
533 | default n | |
534 | help | |
535 | Enable support for the TI EDMA controller. This DMA | |
536 | engine is found on TI DaVinci and AM33xx parts. | |
537 | ||
538 | config XGENE_DMA | |
539 | tristate "APM X-Gene DMA support" | |
540 | depends on ARCH_XGENE || COMPILE_TEST | |
541 | select DMA_ENGINE | |
542 | select DMA_ENGINE_RAID | |
543 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
544 | help | |
545 | Enable support for the APM X-Gene SoC DMA engine. | |
546 | ||
547 | config XILINX_DMA | |
548 | tristate "Xilinx AXI DMAS Engine" | |
549 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
550 | select DMA_ENGINE | |
551 | help | |
552 | Enable support for Xilinx AXI VDMA Soft IP. | |
553 | ||
554 | AXI VDMA engine provides high-bandwidth direct memory access | |
555 | between memory and AXI4-Stream video type target | |
556 | peripherals including peripherals which support AXI4- | |
557 | Stream Video Protocol. It has two stream interfaces/ | |
558 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
559 | Memory Mapped (S2MM) for the data transfers. | |
560 | AXI CDMA engine provides high-bandwidth direct memory access | |
561 | between a memory-mapped source address and a memory-mapped | |
562 | destination address. | |
563 | AXI DMA engine provides high-bandwidth one dimensional direct | |
564 | memory access between memory and AXI4-Stream target peripherals. | |
565 | ||
566 | config XILINX_ZYNQMP_DMA | |
567 | tristate "Xilinx ZynqMP DMA Engine" | |
568 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) | |
569 | select DMA_ENGINE | |
570 | help | |
571 | Enable support for Xilinx ZynqMP DMA controller. | |
572 | ||
573 | config ZX_DMA | |
574 | tristate "ZTE ZX296702 DMA support" | |
575 | depends on ARCH_ZX || COMPILE_TEST | |
576 | select DMA_ENGINE | |
577 | select DMA_VIRTUAL_CHANNELS | |
578 | help | |
579 | Support the DMA engine for ZTE ZX296702 platform devices. | |
580 | ||
581 | ||
582 | # driver files | |
583 | source "drivers/dma/bestcomm/Kconfig" | |
584 | ||
585 | source "drivers/dma/qcom/Kconfig" | |
586 | ||
587 | source "drivers/dma/dw/Kconfig" | |
588 | ||
589 | source "drivers/dma/hsu/Kconfig" | |
590 | ||
591 | source "drivers/dma/sh/Kconfig" | |
592 | ||
593 | # clients | |
594 | comment "DMA Clients" | |
595 | depends on DMA_ENGINE | |
596 | ||
597 | config ASYNC_TX_DMA | |
598 | bool "Async_tx: Offload support for the async_tx api" | |
599 | depends on DMA_ENGINE | |
600 | help | |
601 | This allows the async_tx api to take advantage of offload engines for | |
602 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
603 | a dma engine that can perform raid operations and you have enabled | |
604 | MD_RAID456 say Y. | |
605 | ||
606 | If unsure, say N. | |
607 | ||
608 | config DMATEST | |
609 | tristate "DMA Test client" | |
610 | depends on DMA_ENGINE | |
611 | help | |
612 | Simple DMA test client. Say N unless you're debugging a | |
613 | DMA Device driver. | |
614 | ||
615 | config DMA_ENGINE_RAID | |
616 | bool | |
617 | ||
618 | endif |