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1 | # | |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
5 | menuconfig DMADEVICES | |
6 | bool "DMA Engine support" | |
7 | depends on HAS_DMA | |
8 | help | |
9 | DMA engines can do asynchronous data transfers without | |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
12 | RAID operations in the MD driver. This menu only presents | |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
15 | ||
16 | config DMADEVICES_DEBUG | |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
32 | if DMADEVICES | |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
36 | config INTEL_MID_DMAC | |
37 | tristate "Intel MID DMA support for Peripheral DMA controllers" | |
38 | depends on PCI && X86 | |
39 | select DMA_ENGINE | |
40 | default n | |
41 | help | |
42 | Enable support for the Intel(R) MID DMA engine present | |
43 | in Intel MID chipsets. | |
44 | ||
45 | Say Y here if you have such a chipset. | |
46 | ||
47 | If unsure, say N. | |
48 | ||
49 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
50 | bool | |
51 | ||
52 | config AMBA_PL08X | |
53 | bool "ARM PrimeCell PL080 or PL081 support" | |
54 | depends on ARM_AMBA | |
55 | select DMA_ENGINE | |
56 | select DMA_VIRTUAL_CHANNELS | |
57 | help | |
58 | Platform has a PL08x DMAC device | |
59 | which can provide DMA engine support | |
60 | ||
61 | config INTEL_IOATDMA | |
62 | tristate "Intel I/OAT DMA support" | |
63 | depends on PCI && X86 | |
64 | select DMA_ENGINE | |
65 | select DCA | |
66 | help | |
67 | Enable support for the Intel(R) I/OAT DMA engine present | |
68 | in recent Intel Xeon chipsets. | |
69 | ||
70 | Say Y here if you have such a chipset. | |
71 | ||
72 | If unsure, say N. | |
73 | ||
74 | config INTEL_IOP_ADMA | |
75 | tristate "Intel IOP ADMA support" | |
76 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
77 | select DMA_ENGINE | |
78 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
79 | help | |
80 | Enable support for the Intel(R) IOP Series RAID engines. | |
81 | ||
82 | source "drivers/dma/dw/Kconfig" | |
83 | ||
84 | config AT_HDMAC | |
85 | tristate "Atmel AHB DMA support" | |
86 | depends on ARCH_AT91 | |
87 | select DMA_ENGINE | |
88 | help | |
89 | Support the Atmel AHB DMA controller. | |
90 | ||
91 | config FSL_DMA | |
92 | tristate "Freescale Elo and Elo Plus DMA support" | |
93 | depends on FSL_SOC | |
94 | select DMA_ENGINE | |
95 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
96 | ---help--- | |
97 | Enable support for the Freescale Elo and Elo Plus DMA controllers. | |
98 | The Elo is the DMA controller on some 82xx and 83xx parts, and the | |
99 | Elo Plus is the DMA controller on 85xx and 86xx parts. | |
100 | ||
101 | config MPC512X_DMA | |
102 | tristate "Freescale MPC512x built-in DMA engine support" | |
103 | depends on PPC_MPC512x || PPC_MPC831x | |
104 | select DMA_ENGINE | |
105 | ---help--- | |
106 | Enable support for the Freescale MPC512x built-in DMA engine. | |
107 | ||
108 | source "drivers/dma/bestcomm/Kconfig" | |
109 | ||
110 | config MV_XOR | |
111 | bool "Marvell XOR engine support" | |
112 | depends on PLAT_ORION | |
113 | select DMA_ENGINE | |
114 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
115 | ---help--- | |
116 | Enable support for the Marvell XOR engine. | |
117 | ||
118 | config MX3_IPU | |
119 | bool "MX3x Image Processing Unit support" | |
120 | depends on ARCH_MXC | |
121 | select DMA_ENGINE | |
122 | default y | |
123 | help | |
124 | If you plan to use the Image Processing unit in the i.MX3x, say | |
125 | Y here. If unsure, select Y. | |
126 | ||
127 | config MX3_IPU_IRQS | |
128 | int "Number of dynamically mapped interrupts for IPU" | |
129 | depends on MX3_IPU | |
130 | range 2 137 | |
131 | default 4 | |
132 | help | |
133 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
134 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
135 | number of IRQ slots and map them dynamically to specific sources. | |
136 | ||
137 | config TXX9_DMAC | |
138 | tristate "Toshiba TXx9 SoC DMA support" | |
139 | depends on MACH_TX49XX || MACH_TX39XX | |
140 | select DMA_ENGINE | |
141 | help | |
142 | Support the TXx9 SoC internal DMA controller. This can be | |
143 | integrated in chips such as the Toshiba TX4927/38/39. | |
144 | ||
145 | config TEGRA20_APB_DMA | |
146 | bool "NVIDIA Tegra20 APB DMA support" | |
147 | depends on ARCH_TEGRA | |
148 | select DMA_ENGINE | |
149 | help | |
150 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
151 | DMA controller is having multiple DMA channel which can be | |
152 | configured for different peripherals like audio, UART, SPI, | |
153 | I2C etc which is in APB bus. | |
154 | This DMA controller transfers data from memory to peripheral fifo | |
155 | or vice versa. It does not support memory to memory data transfer. | |
156 | ||
157 | source "drivers/dma/sh/Kconfig" | |
158 | ||
159 | config COH901318 | |
160 | bool "ST-Ericsson COH901318 DMA support" | |
161 | select DMA_ENGINE | |
162 | depends on ARCH_U300 | |
163 | help | |
164 | Enable support for ST-Ericsson COH 901 318 DMA. | |
165 | ||
166 | config STE_DMA40 | |
167 | bool "ST-Ericsson DMA40 support" | |
168 | depends on ARCH_U8500 | |
169 | select DMA_ENGINE | |
170 | help | |
171 | Support for ST-Ericsson DMA40 controller | |
172 | ||
173 | config AMCC_PPC440SPE_ADMA | |
174 | tristate "AMCC PPC440SPe ADMA support" | |
175 | depends on 440SPe || 440SP | |
176 | select DMA_ENGINE | |
177 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL | |
178 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
179 | help | |
180 | Enable support for the AMCC PPC440SPe RAID engines. | |
181 | ||
182 | config TIMB_DMA | |
183 | tristate "Timberdale FPGA DMA support" | |
184 | depends on MFD_TIMBERDALE || HAS_IOMEM | |
185 | select DMA_ENGINE | |
186 | help | |
187 | Enable support for the Timberdale FPGA DMA engine. | |
188 | ||
189 | config SIRF_DMA | |
190 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" | |
191 | depends on ARCH_SIRF | |
192 | select DMA_ENGINE | |
193 | help | |
194 | Enable support for the CSR SiRFprimaII DMA engine. | |
195 | ||
196 | config TI_EDMA | |
197 | bool "TI EDMA support" | |
198 | depends on ARCH_DAVINCI || ARCH_OMAP | |
199 | select DMA_ENGINE | |
200 | select DMA_VIRTUAL_CHANNELS | |
201 | default n | |
202 | help | |
203 | Enable support for the TI EDMA controller. This DMA | |
204 | engine is found on TI DaVinci and AM33xx parts. | |
205 | ||
206 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL | |
207 | bool | |
208 | ||
209 | config PL330_DMA | |
210 | tristate "DMA API Driver for PL330" | |
211 | select DMA_ENGINE | |
212 | depends on ARM_AMBA | |
213 | help | |
214 | Select if your platform has one or more PL330 DMACs. | |
215 | You need to provide platform specific settings via | |
216 | platform_data for a dma-pl330 device. | |
217 | ||
218 | config PCH_DMA | |
219 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" | |
220 | depends on PCI && X86 | |
221 | select DMA_ENGINE | |
222 | help | |
223 | Enable support for Intel EG20T PCH DMA engine. | |
224 | ||
225 | This driver also can be used for LAPIS Semiconductor IOH(Input/ | |
226 | Output Hub), ML7213, ML7223 and ML7831. | |
227 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
228 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
229 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
230 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
231 | ||
232 | config IMX_SDMA | |
233 | tristate "i.MX SDMA support" | |
234 | depends on ARCH_MXC | |
235 | select DMA_ENGINE | |
236 | help | |
237 | Support the i.MX SDMA engine. This engine is integrated into | |
238 | Freescale i.MX25/31/35/51/53 chips. | |
239 | ||
240 | config IMX_DMA | |
241 | tristate "i.MX DMA support" | |
242 | depends on ARCH_MXC | |
243 | select DMA_ENGINE | |
244 | help | |
245 | Support the i.MX DMA engine. This engine is integrated into | |
246 | Freescale i.MX1/21/27 chips. | |
247 | ||
248 | config MXS_DMA | |
249 | bool "MXS DMA support" | |
250 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q | |
251 | select STMP_DEVICE | |
252 | select DMA_ENGINE | |
253 | help | |
254 | Support the MXS DMA engine. This engine including APBH-DMA | |
255 | and APBX-DMA is integrated into Freescale i.MX23/28 chips. | |
256 | ||
257 | config EP93XX_DMA | |
258 | bool "Cirrus Logic EP93xx DMA support" | |
259 | depends on ARCH_EP93XX | |
260 | select DMA_ENGINE | |
261 | help | |
262 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
263 | ||
264 | config DMA_SA11X0 | |
265 | tristate "SA-11x0 DMA support" | |
266 | depends on ARCH_SA1100 | |
267 | select DMA_ENGINE | |
268 | select DMA_VIRTUAL_CHANNELS | |
269 | help | |
270 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
271 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
272 | devices. | |
273 | ||
274 | config MMP_TDMA | |
275 | bool "MMP Two-Channel DMA support" | |
276 | depends on ARCH_MMP | |
277 | select DMA_ENGINE | |
278 | help | |
279 | Support the MMP Two-Channel DMA engine. | |
280 | This engine used for MMP Audio DMA and pxa910 SQU. | |
281 | ||
282 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
283 | ||
284 | config DMA_OMAP | |
285 | tristate "OMAP DMA support" | |
286 | depends on ARCH_OMAP | |
287 | select DMA_ENGINE | |
288 | select DMA_VIRTUAL_CHANNELS | |
289 | ||
290 | config TI_CPPI41 | |
291 | tristate "AM33xx CPPI41 DMA support" | |
292 | depends on ARCH_OMAP | |
293 | select DMA_ENGINE | |
294 | help | |
295 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
296 | is currently used by the USB driver on AM335x platforms. | |
297 | ||
298 | config MMP_PDMA | |
299 | bool "MMP PDMA support" | |
300 | depends on (ARCH_MMP || ARCH_PXA) | |
301 | select DMA_ENGINE | |
302 | help | |
303 | Support the MMP PDMA engine for PXA and MMP platfrom. | |
304 | ||
305 | config DMA_JZ4740 | |
306 | tristate "JZ4740 DMA support" | |
307 | depends on MACH_JZ4740 | |
308 | select DMA_ENGINE | |
309 | select DMA_VIRTUAL_CHANNELS | |
310 | ||
311 | config DMA_ENGINE | |
312 | bool | |
313 | ||
314 | config DMA_VIRTUAL_CHANNELS | |
315 | tristate | |
316 | ||
317 | config DMA_ACPI | |
318 | def_bool y | |
319 | depends on ACPI | |
320 | ||
321 | config DMA_OF | |
322 | def_bool y | |
323 | depends on OF | |
324 | ||
325 | comment "DMA Clients" | |
326 | depends on DMA_ENGINE | |
327 | ||
328 | config NET_DMA | |
329 | bool "Network: TCP receive copy offload" | |
330 | depends on DMA_ENGINE && NET | |
331 | default (INTEL_IOATDMA || FSL_DMA) | |
332 | help | |
333 | This enables the use of DMA engines in the network stack to | |
334 | offload receive copy-to-user operations, freeing CPU cycles. | |
335 | ||
336 | Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise | |
337 | say N. | |
338 | ||
339 | config ASYNC_TX_DMA | |
340 | bool "Async_tx: Offload support for the async_tx api" | |
341 | depends on DMA_ENGINE | |
342 | help | |
343 | This allows the async_tx api to take advantage of offload engines for | |
344 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
345 | a dma engine that can perform raid operations and you have enabled | |
346 | MD_RAID456 say Y. | |
347 | ||
348 | If unsure, say N. | |
349 | ||
350 | config DMATEST | |
351 | tristate "DMA Test client" | |
352 | depends on DMA_ENGINE | |
353 | help | |
354 | Simple DMA test client. Say N unless you're debugging a | |
355 | DMA Device driver. | |
356 | ||
357 | endif |